u8 sink_tp;
OUTP_TRACE(&dp->outp, "training pattern %d", pattern);
- dp->func->pattern(dp, pattern);
+ dp->outp.ior->func->dp.pattern(dp->outp.ior, pattern);
nvkm_rdaux(dp->aux, DPCD_LC02, &sink_tp, 1);
sink_tp &= ~DPCD_LC02_TRAINING_PATTERN_SET;
#define nvkm_output_dp nvkm_dp
struct nvkm_output_dp_func {
- int (*pattern)(struct nvkm_output_dp *, int);
int (*drv_ctl)(struct nvkm_output_dp *, int ln, int vs, int pe, int pc);
void (*vcpi)(struct nvkm_output_dp *, int head, u8 start_slot,
u8 num_slots, u16 pbn, u16 aligned_pbn);
int gm107_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
struct nvkm_output **);
-int gm107_sor_dp_pattern(struct nvkm_dp *, int);
int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
struct nvkm_output **);
u8 lanes[4];
int (*links)(struct nvkm_ior *, struct nvkm_i2c_aux *);
void (*power)(struct nvkm_ior *, int nr);
+ void (*pattern)(struct nvkm_ior *, int pattern);
} dp;
};
void g94_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
int g94_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
void g94_sor_dp_power(struct nvkm_ior *, int);
+void g94_sor_dp_pattern(struct nvkm_ior *, int);
void gf119_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
int gf119_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
+void gf119_sor_dp_pattern(struct nvkm_ior *, int);
+
+void gm107_sor_dp_pattern(struct nvkm_ior *, int);
void g84_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);
void gt215_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);
* DisplayPort
*****************************************************************************/
static int
-nv50_pior_output_dp_pattern(struct nvkm_output_dp *outp, int pattern)
-{
- return 0;
-}
-
-static int
nv50_pior_dp_links(struct nvkm_ior *pior, struct nvkm_i2c_aux *aux)
{
int ret = nvkm_i2c_aux_lnk_ctl(aux, pior->dp.nr, pior->dp.bw,
static const struct nvkm_output_dp_func
nv50_pior_output_dp_func = {
- .pattern = nv50_pior_output_dp_pattern,
};
int
return 0;
}
-static int
-g94_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
+void
+g94_sor_dp_pattern(struct nvkm_ior *sor, int pattern)
{
- struct nvkm_device *device = outp->base.disp->engine.subdev.device;
- const u32 loff = g94_sor_loff(outp);
+ struct nvkm_device *device = sor->disp->engine.subdev.device;
+ const u32 loff = nv50_sor_link(sor);
nvkm_mask(device, 0x61c10c + loff, 0x0f000000, pattern << 24);
- return 0;
}
void
static const struct nvkm_output_dp_func
g94_sor_dp_func = {
- .pattern = g94_sor_dp_pattern,
.drv_ctl = g94_sor_dp_drv_ctl,
};
.lanes = { 2, 1, 0, 3},
.links = g94_sor_dp_links,
.power = g94_sor_dp_power,
+ .pattern = g94_sor_dp_pattern,
},
};
return 0;
}
-static int
-gf119_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
+void
+gf119_sor_dp_pattern(struct nvkm_ior *sor, int pattern)
{
- struct nvkm_device *device = outp->base.disp->engine.subdev.device;
- const u32 soff = gf119_sor_soff(outp);
+ struct nvkm_device *device = sor->disp->engine.subdev.device;
+ const u32 soff = nv50_ior_base(sor);
nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, 0x01010101 * pattern);
- return 0;
}
int
static const struct nvkm_output_dp_func
gf119_sor_dp_func = {
- .pattern = gf119_sor_dp_pattern,
.drv_ctl = gf119_sor_dp_drv_ctl,
.vcpi = gf119_sor_dp_vcpi,
};
.lanes = { 2, 1, 0, 3 },
.links = gf119_sor_dp_links,
.power = g94_sor_dp_power,
+ .pattern = gf119_sor_dp_pattern,
},
};
.lanes = { 2, 1, 0, 3 },
.links = gf119_sor_dp_links,
.power = g94_sor_dp_power,
+ .pattern = gf119_sor_dp_pattern,
},
};
#include "ior.h"
#include "nv50.h"
-int
-gm107_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
+void
+gm107_sor_dp_pattern(struct nvkm_ior *sor, int pattern)
{
- struct nvkm_device *device = outp->base.disp->engine.subdev.device;
- const u32 soff = outp->base.or * 0x800;
+ struct nvkm_device *device = sor->disp->engine.subdev.device;
+ const u32 soff = nv50_ior_base(sor);
const u32 data = 0x01010101 * pattern;
- if (outp->base.info.sorconf.link & 1)
+ if (sor->asy.link & 1)
nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
else
nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
- return 0;
}
static const struct nvkm_output_dp_func
gm107_sor_dp_func = {
- .pattern = gm107_sor_dp_pattern,
.drv_ctl = gf119_sor_dp_drv_ctl,
.vcpi = gf119_sor_dp_vcpi,
};
.lanes = { 0, 1, 2, 3 },
.links = gf119_sor_dp_links,
.power = g94_sor_dp_power,
+ .pattern = gm107_sor_dp_pattern,
},
};
static const struct nvkm_output_dp_func
gm200_sor_dp_func = {
- .pattern = gm107_sor_dp_pattern,
.drv_ctl = gm200_sor_dp_drv_ctl,
.vcpi = gf119_sor_dp_vcpi,
};
.lanes = { 0, 1, 2, 3 },
.links = gf119_sor_dp_links,
.power = g94_sor_dp_power,
+ .pattern = gm107_sor_dp_pattern,
},
};
.lanes = { 2, 1, 0, 3 },
.links = g94_sor_dp_links,
.power = g94_sor_dp_power,
+ .pattern = g94_sor_dp_pattern,
},
};
.lanes = { 2, 1, 0, 3},
.links = g94_sor_dp_links,
.power = g94_sor_dp_power,
+ .pattern = g94_sor_dp_pattern,
},
};
.lanes = { 3, 2, 1, 0 },
.links = g94_sor_dp_links,
.power = g94_sor_dp_power,
+ .pattern = g94_sor_dp_pattern,
},
};