static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, unsigned int i2c_reg,
unsigned int paged)
{
+ struct cs8409_spec *spec = codec->spec;
unsigned int i2c_reg_data;
unsigned int read_data;
+ if (spec->cs42l42_suspended)
+ return -EPERM;
+
cs8409_enable_i2c_clock(codec, 1);
cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address);
static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, unsigned int i2c_reg,
unsigned int i2c_data, unsigned int paged)
{
+ struct cs8409_spec *spec = codec->spec;
unsigned int i2c_reg_data;
+ if (spec->cs42l42_suspended)
+ return -EPERM;
+
cs8409_enable_i2c_clock(codec, 1);
cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address);
/* wait ~10ms */
usleep_range(10000, 15000);
+ spec->cs42l42_suspended = 0;
+
mutex_lock(&spec->cs8409_i2c_mux);
/* Clear interrupts, by reading interrupt status registers */
/* Power down CS42L42 ASP/EQ/MIX/HP */
cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1101, 0xfe, 1);
mutex_unlock(&spec->cs8409_i2c_mux);
+
+ spec->cs42l42_suspended = 1;
+
/* Assert CS42L42 RTS# line */
snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, 0);
spec->cs42l42_hp_jack_in = 0;
spec->cs42l42_mic_jack_in = 0;
+ spec->cs42l42_suspended = 1;
/* Basic initial sequence for specific hw configuration */
snd_hda_sequence_write(codec, cs8409_cs42l42_init_verbs);