int ret; /* variable which stored handle reset gpio pin */
struct device_node *root; /* root node */
struct device_node *gpio; /* gpio node */
- struct of_gpio_chip *of_gc = NULL;
- enum of_gpio_flags flags ;
+ struct gpio_chip *gc;
+ u32 flags;
const void *gpio_spec;
/* find out root node */
goto err0;
}
- of_gc = gpio->data;
- if (!of_gc) {
+ gc = gpio->data;
+ if (!gc) {
pr_debug("%s: gpio controller %s isn't registered\n",
root->full_name, gpio->full_name);
ret = -ENODEV;
goto err1;
}
- ret = of_gc->xlate(of_gc, root, gpio_spec, &flags);
+ ret = gc->of_xlate(gc, root, gpio_spec, &flags);
if (ret < 0)
goto err1;
- ret += of_gc->gc.base;
+ ret += gc->base;
err1:
of_node_put(gpio);
err0:
{
struct mpc52xx_gpiochip *chip;
struct mpc52xx_gpio_wkup __iomem *regs;
- struct of_gpio_chip *ofchip;
+ struct gpio_chip *gc;
int ret;
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
if (!chip)
return -ENOMEM;
- ofchip = &chip->mmchip.of_gc;
+ gc = &chip->mmchip.gc;
- ofchip->gpio_cells = 2;
- ofchip->gc.ngpio = 8;
- ofchip->gc.direction_input = mpc52xx_wkup_gpio_dir_in;
- ofchip->gc.direction_output = mpc52xx_wkup_gpio_dir_out;
- ofchip->gc.get = mpc52xx_wkup_gpio_get;
- ofchip->gc.set = mpc52xx_wkup_gpio_set;
+ gc->of_gpio_n_cells = 2;
+ gc->ngpio = 8;
+ gc->direction_input = mpc52xx_wkup_gpio_dir_in;
+ gc->direction_output = mpc52xx_wkup_gpio_dir_out;
+ gc->get = mpc52xx_wkup_gpio_get;
+ gc->set = mpc52xx_wkup_gpio_set;
ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip);
if (ret)
const struct of_device_id *match)
{
struct mpc52xx_gpiochip *chip;
- struct of_gpio_chip *ofchip;
+ struct gpio_chip *gc;
struct mpc52xx_gpio __iomem *regs;
int ret;
if (!chip)
return -ENOMEM;
- ofchip = &chip->mmchip.of_gc;
+ gc = &chip->mmchip.gc;
- ofchip->gpio_cells = 2;
- ofchip->gc.ngpio = 32;
- ofchip->gc.direction_input = mpc52xx_simple_gpio_dir_in;
- ofchip->gc.direction_output = mpc52xx_simple_gpio_dir_out;
- ofchip->gc.get = mpc52xx_simple_gpio_get;
- ofchip->gc.set = mpc52xx_simple_gpio_set;
+ gc->of_gpio_n_cells = 2;
+ gc->ngpio = 32;
+ gc->direction_input = mpc52xx_simple_gpio_dir_in;
+ gc->direction_output = mpc52xx_simple_gpio_dir_out;
+ gc->get = mpc52xx_simple_gpio_get;
+ gc->set = mpc52xx_simple_gpio_set;
ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip);
if (ret)
* @dev: pointer to device structure
* @regs: virtual address of GPT registers
* @lock: spinlock to coordinate between different functions.
- * @of_gc: of_gpio_chip instance structure; used when GPIO is enabled
+ * @gc: gpio_chip instance structure; used when GPIO is enabled
* @irqhost: Pointer to irq_host instance; used when IRQ mode is supported
* @wdt_mode: only relevant for gpt0: bit 0 (MPC52xx_GPT_CAN_WDT) indicates
* if the gpt may be used as wdt, bit 1 (MPC52xx_GPT_IS_WDT) indicates
u8 wdt_mode;
#if defined(CONFIG_GPIOLIB)
- struct of_gpio_chip of_gc;
+ struct gpio_chip gc;
#endif
};
#if defined(CONFIG_GPIOLIB)
static inline struct mpc52xx_gpt_priv *gc_to_mpc52xx_gpt(struct gpio_chip *gc)
{
- return container_of(to_of_gpio_chip(gc), struct mpc52xx_gpt_priv,of_gc);
+ return container_of(gc, struct mpc52xx_gpt_priv, gc);
}
static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
if (!of_find_property(node, "gpio-controller", NULL))
return;
- gpt->of_gc.gc.label = kstrdup(node->full_name, GFP_KERNEL);
- if (!gpt->of_gc.gc.label) {
+ gpt->gc.label = kstrdup(node->full_name, GFP_KERNEL);
+ if (!gpt->gc.label) {
dev_err(gpt->dev, "out of memory\n");
return;
}
- gpt->of_gc.gpio_cells = 2;
- gpt->of_gc.gc.ngpio = 1;
- gpt->of_gc.gc.direction_input = mpc52xx_gpt_gpio_dir_in;
- gpt->of_gc.gc.direction_output = mpc52xx_gpt_gpio_dir_out;
- gpt->of_gc.gc.get = mpc52xx_gpt_gpio_get;
- gpt->of_gc.gc.set = mpc52xx_gpt_gpio_set;
- gpt->of_gc.gc.base = -1;
- gpt->of_gc.xlate = of_gpio_simple_xlate;
- node->data = &gpt->of_gc;
+ gpt->gc.ngpio = 1;
+ gpt->gc.direction_input = mpc52xx_gpt_gpio_dir_in;
+ gpt->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
+ gpt->gc.get = mpc52xx_gpt_gpio_get;
+ gpt->gc.set = mpc52xx_gpt_gpio_set;
+ gpt->gc.base = -1;
+ gpt->gc.of_gpio_n_cells = 2;
+ gpt->gc.of_xlate = of_gpio_simple_xlate;
of_node_get(node);
/* Setup external pin in GPIO mode */
clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK,
MPC52xx_GPT_MODE_MS_GPIO);
- rc = gpiochip_add(&gpt->of_gc.gc);
+ rc = gpiochip_add(&gpt->gc);
if (rc)
dev_err(gpt->dev, "gpiochip_add() failed; rc=%i\n", rc);
struct mutex lock;
struct device_node *np;
struct i2c_client *client;
- struct of_gpio_chip of_gc;
+ struct gpio_chip gc;
u8 reg_ctrl;
};
static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
- struct of_gpio_chip *of_gc = to_of_gpio_chip(gc);
- struct mcu *mcu = container_of(of_gc, struct mcu, of_gc);
+ struct mcu *mcu = container_of(gc, struct mcu, gc);
u8 bit = 1 << (4 + gpio);
mutex_lock(&mcu->lock);
static int mcu_gpiochip_add(struct mcu *mcu)
{
struct device_node *np;
- struct of_gpio_chip *of_gc = &mcu->of_gc;
- struct gpio_chip *gc = &of_gc->gc;
+ struct gpio_chip *gc = &mcu->gc;
int ret;
np = of_find_compatible_node(NULL, NULL, "fsl,mcu-mpc8349emitx");
gc->base = -1;
gc->set = mcu_gpio_set;
gc->direction_output = mcu_gpio_dir_out;
- of_gc->gpio_cells = 2;
- of_gc->xlate = of_gpio_simple_xlate;
+ gc->of_gpio_n_cells = 2;
+ gc->of_xlate = of_gpio_simple_xlate;
- np->data = of_gc;
mcu->np = np;
/*
{
int ret;
- ret = gpiochip_remove(&mcu->of_gc.gc);
+ ret = gpiochip_remove(&mcu->gc);
if (ret)
return ret;
of_node_put(mcu->np);
}
/* Setup pointers to chip functions */
- gef_gpio_chip->of_gc.gpio_cells = 2;
- gef_gpio_chip->of_gc.gc.ngpio = 19;
- gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
- gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
- gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
- gef_gpio_chip->of_gc.gc.set = gef_gpio_set;
+ gef_gpio_chip->gc.of_gpio_n_cells = 2;
+ gef_gpio_chip->gc.ngpio = 19;
+ gef_gpio_chip->gc.direction_input = gef_gpio_dir_in;
+ gef_gpio_chip->gc.direction_output = gef_gpio_dir_out;
+ gef_gpio_chip->gc.get = gef_gpio_get;
+ gef_gpio_chip->gc.set = gef_gpio_set;
/* This function adds a memory mapped GPIO chip */
retval = of_mm_gpiochip_add(np, gef_gpio_chip);
}
/* Setup pointers to chip functions */
- gef_gpio_chip->of_gc.gpio_cells = 2;
- gef_gpio_chip->of_gc.gc.ngpio = 6;
- gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
- gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
- gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
- gef_gpio_chip->of_gc.gc.set = gef_gpio_set;
+ gef_gpio_chip->gc.of_gpio_n_cells = 2;
+ gef_gpio_chip->gc.ngpio = 6;
+ gef_gpio_chip->gc.direction_input = gef_gpio_dir_in;
+ gef_gpio_chip->gc.direction_output = gef_gpio_dir_out;
+ gef_gpio_chip->gc.get = gef_gpio_get;
+ gef_gpio_chip->gc.set = gef_gpio_set;
/* This function adds a memory mapped GPIO chip */
retval = of_mm_gpiochip_add(np, gef_gpio_chip);
{
struct cpm1_gpio16_chip *cpm1_gc;
struct of_mm_gpio_chip *mm_gc;
- struct of_gpio_chip *of_gc;
struct gpio_chip *gc;
cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);
spin_lock_init(&cpm1_gc->lock);
mm_gc = &cpm1_gc->mm_gc;
- of_gc = &mm_gc->of_gc;
- gc = &of_gc->gc;
+ gc = &mm_gc->gc;
mm_gc->save_regs = cpm1_gpio16_save_regs;
- of_gc->gpio_cells = 2;
+ gc->of_gpio_n_cells = 2;
gc->ngpio = 16;
gc->direction_input = cpm1_gpio16_dir_in;
gc->direction_output = cpm1_gpio16_dir_out;
{
struct cpm1_gpio32_chip *cpm1_gc;
struct of_mm_gpio_chip *mm_gc;
- struct of_gpio_chip *of_gc;
struct gpio_chip *gc;
cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);
spin_lock_init(&cpm1_gc->lock);
mm_gc = &cpm1_gc->mm_gc;
- of_gc = &mm_gc->of_gc;
- gc = &of_gc->gc;
+ gc = &mm_gc->gc;
mm_gc->save_regs = cpm1_gpio32_save_regs;
- of_gc->gpio_cells = 2;
+ gc->of_gpio_n_cells = 2;
gc->ngpio = 32;
gc->direction_input = cpm1_gpio32_dir_in;
gc->direction_output = cpm1_gpio32_dir_out;
{
struct cpm2_gpio32_chip *cpm2_gc;
struct of_mm_gpio_chip *mm_gc;
- struct of_gpio_chip *of_gc;
struct gpio_chip *gc;
cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
spin_lock_init(&cpm2_gc->lock);
mm_gc = &cpm2_gc->mm_gc;
- of_gc = &mm_gc->of_gc;
- gc = &of_gc->gc;
+ gc = &mm_gc->gc;
mm_gc->save_regs = cpm2_gpio32_save_regs;
- of_gc->gpio_cells = 2;
+ gc->of_gpio_n_cells = 2;
gc->ngpio = 32;
gc->direction_input = cpm2_gpio32_dir_in;
gc->direction_output = cpm2_gpio32_dir_out;
{
struct mpc8xxx_gpio_chip *mpc8xxx_gc;
struct of_mm_gpio_chip *mm_gc;
- struct of_gpio_chip *of_gc;
struct gpio_chip *gc;
unsigned hwirq;
int ret;
spin_lock_init(&mpc8xxx_gc->lock);
mm_gc = &mpc8xxx_gc->mm_gc;
- of_gc = &mm_gc->of_gc;
- gc = &of_gc->gc;
+ gc = &mm_gc->gc;
mm_gc->save_regs = mpc8xxx_gpio_save_regs;
- of_gc->gpio_cells = 2;
+ gc->of_gpio_n_cells = 2;
gc->ngpio = MPC8XXX_GPIO_PINS;
gc->direction_input = mpc8xxx_gpio_dir_in;
gc->direction_output = mpc8xxx_gpio_dir_out;
int ret;
struct ppc4xx_gpio_chip *ppc4xx_gc;
struct of_mm_gpio_chip *mm_gc;
- struct of_gpio_chip *of_gc;
struct gpio_chip *gc;
ppc4xx_gc = kzalloc(sizeof(*ppc4xx_gc), GFP_KERNEL);
spin_lock_init(&ppc4xx_gc->lock);
mm_gc = &ppc4xx_gc->mm_gc;
- of_gc = &mm_gc->of_gc;
- gc = &of_gc->gc;
+ gc = &mm_gc->gc;
- of_gc->gpio_cells = 2;
+ gc->of_gpio_n_cells = 2;
gc->ngpio = 32;
gc->direction_input = ppc4xx_gpio_dir_in;
gc->direction_output = ppc4xx_gpio_dir_out;
struct qe_pin *qe_pin_request(struct device_node *np, int index)
{
struct qe_pin *qe_pin;
- struct device_node *gc;
- struct of_gpio_chip *of_gc = NULL;
+ struct device_node *gpio_np;
+ struct gpio_chip *gc;
struct of_mm_gpio_chip *mm_gc;
struct qe_gpio_chip *qe_gc;
int err;
}
err = of_parse_phandles_with_args(np, "gpios", "#gpio-cells", index,
- &gc, &gpio_spec);
+ &gpio_np, &gpio_spec);
if (err) {
pr_debug("%s: can't parse gpios property\n", __func__);
goto err0;
}
- if (!of_device_is_compatible(gc, "fsl,mpc8323-qe-pario-bank")) {
+ if (!of_device_is_compatible(gpio_np, "fsl,mpc8323-qe-pario-bank")) {
pr_debug("%s: tried to get a non-qe pin\n", __func__);
err = -EINVAL;
goto err1;
}
- of_gc = gc->data;
- if (!of_gc) {
+ gc = gpio_np->data;
+ if (!gc) {
pr_debug("%s: gpio controller %s isn't registered\n",
- np->full_name, gc->full_name);
+ np->full_name, gpio_np->full_name);
err = -ENODEV;
goto err1;
}
- gpio_cells = of_get_property(gc, "#gpio-cells", &size);
+ gpio_cells = of_get_property(gpio_np, "#gpio-cells", &size);
if (!gpio_cells || size != sizeof(*gpio_cells) ||
- *gpio_cells != of_gc->gpio_cells) {
+ *gpio_cells != gc->of_gpio_n_cells) {
pr_debug("%s: wrong #gpio-cells for %s\n",
- np->full_name, gc->full_name);
+ np->full_name, gpio_np->full_name);
err = -EINVAL;
goto err1;
}
- err = of_gc->xlate(of_gc, np, gpio_spec, NULL);
+ err = gc->of_xlate(gc, np, gpio_spec, NULL);
if (err < 0)
goto err1;
- mm_gc = to_of_mm_gpio_chip(&of_gc->gc);
+ mm_gc = to_of_mm_gpio_chip(gc);
qe_gc = to_qe_gpio_chip(mm_gc);
spin_lock_irqsave(&qe_gc->lock, flags);
if (!err)
return qe_pin;
err1:
- of_node_put(gc);
+ of_node_put(gpio_np);
err0:
kfree(qe_pin);
pr_debug("%s failed with status %d\n", __func__, err);
int ret;
struct qe_gpio_chip *qe_gc;
struct of_mm_gpio_chip *mm_gc;
- struct of_gpio_chip *of_gc;
struct gpio_chip *gc;
qe_gc = kzalloc(sizeof(*qe_gc), GFP_KERNEL);
spin_lock_init(&qe_gc->lock);
mm_gc = &qe_gc->mm_gc;
- of_gc = &mm_gc->of_gc;
- gc = &of_gc->gc;
+ gc = &mm_gc->gc;
mm_gc->save_regs = qe_gpio_save_regs;
- of_gc->gpio_cells = 2;
+ gc->of_gpio_n_cells = 2;
gc->ngpio = QE_PIO_PINS;
gc->direction_input = qe_gpio_dir_in;
gc->direction_output = qe_gpio_dir_out;
int ret;
struct u8_gpio_chip *u8_gc;
struct of_mm_gpio_chip *mm_gc;
- struct of_gpio_chip *of_gc;
struct gpio_chip *gc;
u8_gc = kzalloc(sizeof(*u8_gc), GFP_KERNEL);
spin_lock_init(&u8_gc->lock);
mm_gc = &u8_gc->mm_gc;
- of_gc = &mm_gc->of_gc;
- gc = &of_gc->gc;
+ gc = &mm_gc->gc;
mm_gc->save_regs = u8_gpio_save_regs;
- of_gc->gpio_cells = 2;
+ gc->of_gpio_n_cells = 2;
gc->ngpio = 8;
gc->direction_input = u8_gpio_dir_in;
gc->direction_output = u8_gpio_dir_out;
static int __devinit xgpio_of_probe(struct device_node *np)
{
struct xgpio_instance *chip;
- struct of_gpio_chip *ofchip;
int status = 0;
const u32 *tree_info;
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
if (!chip)
return -ENOMEM;
- ofchip = &chip->mmchip.of_gc;
/* Update GPIO state shadow register with default value */
tree_info = of_get_property(np, "xlnx,dout-default", NULL);
chip->gpio_dir = *tree_info;
/* Check device node and parent device node for device width */
- ofchip->gc.ngpio = 32; /* By default assume full GPIO controller */
+ chip->mmchip.gc.ngpio = 32; /* By default assume full GPIO controller */
tree_info = of_get_property(np, "xlnx,gpio-width", NULL);
if (!tree_info)
tree_info = of_get_property(np->parent,
"xlnx,gpio-width", NULL);
if (tree_info)
- ofchip->gc.ngpio = *tree_info;
+ chip->mmchip.gc.ngpio = *tree_info;
spin_lock_init(&chip->gpio_lock);
- ofchip->gpio_cells = 2;
- ofchip->gc.direction_input = xgpio_dir_in;
- ofchip->gc.direction_output = xgpio_dir_out;
- ofchip->gc.get = xgpio_get;
- ofchip->gc.set = xgpio_set;
+ chip->mmchip.gc.of_gpio_n_cells = 2;
+ chip->mmchip.gc.direction_input = xgpio_dir_in;
+ chip->mmchip.gc.direction_output = xgpio_dir_out;
+ chip->mmchip.gc.get = xgpio_get;
+ chip->mmchip.gc.set = xgpio_set;
chip->mmchip.save_regs = xgpio_save_regs;
enum of_gpio_flags *flags)
{
int ret;
- struct device_node *gc;
- struct of_gpio_chip *of_gc = NULL;
+ struct device_node *gpio_np;
+ struct gpio_chip *gc;
int size;
const void *gpio_spec;
const __be32 *gpio_cells;
ret = of_parse_phandles_with_args(np, "gpios", "#gpio-cells", index,
- &gc, &gpio_spec);
+ &gpio_np, &gpio_spec);
if (ret) {
pr_debug("%s: can't parse gpios property\n", __func__);
goto err0;
}
- of_gc = gc->data;
- if (!of_gc) {
+ gc = gpio_np->data;
+ if (!gc) {
pr_debug("%s: gpio controller %s isn't registered\n",
- np->full_name, gc->full_name);
+ np->full_name, gpio_np->full_name);
ret = -ENODEV;
goto err1;
}
- gpio_cells = of_get_property(gc, "#gpio-cells", &size);
+ gpio_cells = of_get_property(gpio_np, "#gpio-cells", &size);
if (!gpio_cells || size != sizeof(*gpio_cells) ||
- be32_to_cpup(gpio_cells) != of_gc->gpio_cells) {
+ be32_to_cpup(gpio_cells) != gc->of_gpio_n_cells) {
pr_debug("%s: wrong #gpio-cells for %s\n",
- np->full_name, gc->full_name);
+ np->full_name, gpio_np->full_name);
ret = -EINVAL;
goto err1;
}
if (flags)
*flags = 0;
- ret = of_gc->xlate(of_gc, np, gpio_spec, flags);
+ ret = gc->of_xlate(gc, np, gpio_spec, flags);
if (ret < 0)
goto err1;
- ret += of_gc->gc.base;
+ ret += gc->base;
err1:
- of_node_put(gc);
+ of_node_put(gpio_np);
err0:
pr_debug("%s exited with status %d\n", __func__, ret);
return ret;
/**
* of_gpio_simple_xlate - translate gpio_spec to the GPIO number and flags
- * @of_gc: pointer to the of_gpio_chip structure
+ * @gc: pointer to the gpio_chip structure
* @np: device node of the GPIO chip
* @gpio_spec: gpio specifier as found in the device tree
* @flags: a flags pointer to fill in
* gpio chips. This function performs only one sanity check: whether gpio
* is less than ngpios (that is specified in the gpio_chip).
*/
-int of_gpio_simple_xlate(struct of_gpio_chip *of_gc, struct device_node *np,
- const void *gpio_spec, enum of_gpio_flags *flags)
+int of_gpio_simple_xlate(struct gpio_chip *gc, struct device_node *np,
+ const void *gpio_spec, u32 *flags)
{
const __be32 *gpio = gpio_spec;
const u32 n = be32_to_cpup(gpio);
* number and the flags from a single gpio cell -- this is possible,
* but not recommended).
*/
- if (of_gc->gpio_cells < 2) {
+ if (gc->of_gpio_n_cells < 2) {
WARN_ON(1);
return -EINVAL;
}
- if (n > of_gc->gc.ngpio)
+ if (n > gc->ngpio)
return -EINVAL;
if (flags)
*
* 1) In the gpio_chip structure:
* - all the callbacks
- *
- * 2) In the of_gpio_chip structure:
- * - gpio_cells
- * - xlate callback (optional)
+ * - of_gpio_n_cells
+ * - of_xlate callback (optional)
*
* 3) In the of_mm_gpio_chip structure:
* - save_regs callback (optional)
struct of_mm_gpio_chip *mm_gc)
{
int ret = -ENOMEM;
- struct of_gpio_chip *of_gc = &mm_gc->of_gc;
- struct gpio_chip *gc = &of_gc->gc;
+ struct gpio_chip *gc = &mm_gc->gc;
gc->label = kstrdup(np->full_name, GFP_KERNEL);
if (!gc->label)
gc->base = -1;
- if (!of_gc->xlate)
- of_gc->xlate = of_gpio_simple_xlate;
+ if (!gc->of_xlate)
+ gc->of_xlate = of_gpio_simple_xlate;
if (mm_gc->save_regs)
mm_gc->save_regs(mm_gc);
- np->data = of_gc;
+ np->data = &mm_gc->gc;
+ mm_gc->gc.of_node = np;
ret = gpiochip_add(gc);
if (ret)
struct device;
struct seq_file;
struct module;
+struct device_node;
/**
* struct gpio_chip - abstract a GPIO controller
const char *const *names;
unsigned can_sleep:1;
unsigned exported:1;
+
+#if defined(CONFIG_OF_GPIO)
+ /*
+ * If CONFIG_OF is enabled, then all GPIO controllers described in the
+ * device tree automatically may have an OF translation
+ */
+ struct device_node *of_node;
+ int of_gpio_n_cells;
+ int (*of_xlate)(struct gpio_chip *gc, struct device_node *np,
+ const void *gpio_spec, u32 *flags);
+#endif
};
extern const char *gpiochip_is_requested(struct gpio_chip *chip,
#ifdef CONFIG_OF_GPIO
/*
- * Generic OF GPIO chip
- */
-struct of_gpio_chip {
- struct gpio_chip gc;
- int gpio_cells;
- int (*xlate)(struct of_gpio_chip *of_gc, struct device_node *np,
- const void *gpio_spec, enum of_gpio_flags *flags);
-};
-
-static inline struct of_gpio_chip *to_of_gpio_chip(struct gpio_chip *gc)
-{
- return container_of(gc, struct of_gpio_chip, gc);
-}
-
-/*
* OF GPIO chip for memory mapped banks
*/
struct of_mm_gpio_chip {
- struct of_gpio_chip of_gc;
+ struct gpio_chip gc;
void (*save_regs)(struct of_mm_gpio_chip *mm_gc);
void __iomem *regs;
};
static inline struct of_mm_gpio_chip *to_of_mm_gpio_chip(struct gpio_chip *gc)
{
- struct of_gpio_chip *of_gc = to_of_gpio_chip(gc);
-
- return container_of(of_gc, struct of_mm_gpio_chip, of_gc);
+ return container_of(gc, struct of_mm_gpio_chip, gc);
}
extern int of_get_gpio_flags(struct device_node *np, int index,
extern int of_mm_gpiochip_add(struct device_node *np,
struct of_mm_gpio_chip *mm_gc);
-extern int of_gpio_simple_xlate(struct of_gpio_chip *of_gc,
- struct device_node *np,
- const void *gpio_spec,
- enum of_gpio_flags *flags);
-#else
+extern int of_gpio_simple_xlate(struct gpio_chip *gc, struct device_node *np,
+ const void *gpio_spec, u32 *flags);
+#else /* CONFIG_OF_GPIO */
/* Drivers may not strictly depend on the GPIO support, so let them link. */
static inline int of_get_gpio_flags(struct device_node *np, int index,