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tcg/ia64: fix tlb addend read
author
Aurelien Jarno
<aurelien@aurel32.net>
Thu, 8 Apr 2010 09:10:48 +0000
(11:10 +0200)
committer
Aurelien Jarno
<aurelien@aurel32.net>
Thu, 8 Apr 2010 09:11:21 +0000
(11:11 +0200)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/ia64/tcg-target.c
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diff --git
a/tcg/ia64/tcg-target.c
b/tcg/ia64/tcg-target.c
index 113f245dcb814bda7cfa38bd02dd55b98473a1e8..6e69ef4b49ed3576fe442fc8f1f876e9686197c6 100644
(file)
--- a/
tcg/ia64/tcg-target.c
+++ b/
tcg/ia64/tcg-target.c
@@
-1449,13
+1449,8
@@
static inline void tcg_out_qemu_tlb(TCGContext *s, TCGArg addr_reg,
tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2,
TCG_REG_R2, TCG_AREG0));
tcg_out_bundle(s, mII,
-#if TARGET_LONG_BITS == 32
- tcg_opc_m3 (TCG_REG_P0, OPC_LD4_M3, TCG_REG_R57,
- TCG_REG_R2, offset_addend - offset_rw),
-#else
tcg_opc_m3 (TCG_REG_P0, OPC_LD8_M3, TCG_REG_R57,
TCG_REG_R2, offset_addend - offset_rw),
-#endif
tcg_opc_a1 (TCG_REG_P0, OPC_AND_A1, TCG_REG_R3,
TCG_REG_R3, TCG_REG_R56),
tcg_opc_a6 (TCG_REG_P0, OPC_CMP_EQ_A6, TCG_REG_P6,