arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
authorGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 2 May 2022 13:35:17 +0000 (15:35 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 6 May 2022 09:09:34 +0000 (11:09 +0200)
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family.  Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4 instead of
R-Car Gen3:
  - DMAC,
  - (H)SCIF,
  - I2C,
  - IPMMU,
  - WDT.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/73cea9d5e1a6639422c67e4df4285042e31c9fd5.1651497071.git.geert+renesas@glider.be
arch/arm64/boot/dts/renesas/r8a779a0.dtsi

index 57d49d2..b973150 100644 (file)
@@ -86,7 +86,7 @@
 
                rwdt: watchdog@e6020000 {
                        compatible = "renesas,r8a779a0-wdt",
-                                    "renesas,rcar-gen3-wdt";
+                                    "renesas,rcar-gen4-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
                        interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 907>;
 
                i2c0: i2c@e6500000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe6500000 0 0x40>;
                        interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 518>;
 
                i2c1: i2c@e6508000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe6508000 0 0x40>;
                        interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 519>;
 
                i2c2: i2c@e6510000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe6510000 0 0x40>;
                        interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 520>;
 
                i2c3: i2c@e66d0000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe66d0000 0 0x40>;
                        interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 521>;
 
                i2c4: i2c@e66d8000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe66d8000 0 0x40>;
                        interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 522>;
 
                i2c5: i2c@e66e0000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe66e0000 0 0x40>;
                        interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 523>;
 
                i2c6: i2c@e66e8000 {
                        compatible = "renesas,i2c-r8a779a0",
-                                    "renesas,rcar-gen3-i2c";
+                                    "renesas,rcar-gen4-i2c";
                        reg = <0 0xe66e8000 0 0x40>;
                        interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 524>;
 
                hscif0: serial@e6540000 {
                        compatible = "renesas,hscif-r8a779a0",
-                                    "renesas,rcar-gen3-hscif", "renesas,hscif";
+                                    "renesas,rcar-gen4-hscif", "renesas,hscif";
                        reg = <0 0xe6540000 0 0x60>;
                        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 514>,
 
                hscif1: serial@e6550000 {
                        compatible = "renesas,hscif-r8a779a0",
-                                    "renesas,rcar-gen3-hscif", "renesas,hscif";
+                                    "renesas,rcar-gen4-hscif", "renesas,hscif";
                        reg = <0 0xe6550000 0 0x60>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 515>,
 
                hscif2: serial@e6560000 {
                        compatible = "renesas,hscif-r8a779a0",
-                                    "renesas,rcar-gen3-hscif", "renesas,hscif";
+                                    "renesas,rcar-gen4-hscif", "renesas,hscif";
                        reg = <0 0xe6560000 0 0x60>;
                        interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 516>,
 
                hscif3: serial@e66a0000 {
                        compatible = "renesas,hscif-r8a779a0",
-                                    "renesas,rcar-gen3-hscif", "renesas,hscif";
+                                    "renesas,rcar-gen4-hscif", "renesas,hscif";
                        reg = <0 0xe66a0000 0 0x60>;
                        interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 517>,
 
                scif0: serial@e6e60000 {
                        compatible = "renesas,scif-r8a779a0",
-                                    "renesas,rcar-gen3-scif", "renesas,scif";
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
                        reg = <0 0xe6e60000 0 64>;
                        interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 702>,
 
                scif1: serial@e6e68000 {
                        compatible = "renesas,scif-r8a779a0",
-                                    "renesas,rcar-gen3-scif", "renesas,scif";
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
                        reg = <0 0xe6e68000 0 64>;
                        interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 703>,
 
                scif3: serial@e6c50000 {
                        compatible = "renesas,scif-r8a779a0",
-                                    "renesas,rcar-gen3-scif", "renesas,scif";
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
                        reg = <0 0xe6c50000 0 64>;
                        interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 704>,
 
                scif4: serial@e6c40000 {
                        compatible = "renesas,scif-r8a779a0",
-                                    "renesas,rcar-gen3-scif", "renesas,scif";
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
                        reg = <0 0xe6c40000 0 64>;
                        interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 705>,
                };
 
                dmac1: dma-controller@e7350000 {
-                       compatible = "renesas,dmac-r8a779a0";
+                       compatible = "renesas,dmac-r8a779a0",
+                                    "renesas,rcar-gen4-dmac";
                        reg = <0 0xe7350000 0 0x1000>,
                              <0 0xe7300000 0 0x10000>;
                        interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
                };
 
                dmac2: dma-controller@e7351000 {
-                       compatible = "renesas,dmac-r8a779a0";
+                       compatible = "renesas,dmac-r8a779a0",
+                                    "renesas,rcar-gen4-dmac";
                        reg = <0 0xe7351000 0 0x1000>,
                              <0 0xe7310000 0 0x10000>;
                        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
                };
 
                ipmmu_rt0: iommu@ee480000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xee480000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 10>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_rt1: iommu@ee4c0000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xee4c0000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 19>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_ds0: iommu@eed00000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeed00000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 0>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_ds1: iommu@eed40000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeed40000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 1>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_ir: iommu@eed80000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeed80000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 3>;
                        power-domains = <&sysc R8A779A0_PD_A3IR>;
                };
 
                ipmmu_vc0: iommu@eedc0000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeedc0000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 12>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_vi0: iommu@eee80000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeee80000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 14>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_vi1: iommu@eeec0000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeeec0000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 15>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_3dg: iommu@eee00000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeee00000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 6>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_vip0: iommu@eef00000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeef00000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 5>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_vip1: iommu@eef40000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeef40000 0 0x20000>;
                        renesas,ipmmu-main = <&ipmmu_mm 11>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                };
 
                ipmmu_mm: iommu@eefc0000 {
-                       compatible = "renesas,ipmmu-r8a779a0";
+                       compatible = "renesas,ipmmu-r8a779a0",
+                                    "renesas,rcar-gen4-ipmmu-vmsa";
                        reg = <0 0xeefc0000 0 0x20000>;
                        interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;