drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow it

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index 7a98d41..6785269 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -451,11 +451,10 @@ nv50_graph_register(struct drm_device *dev)
        }
 
        /* compute */
-       if (dev_priv->chipset <= 0xa0 ||
-           dev_priv->chipset == 0xaa ||
-           dev_priv->chipset == 0xac)
-               NVOBJ_CLASS(dev, 0x50c0, GR);
-       else
+       NVOBJ_CLASS(dev, 0x50c0, GR);
+       if (dev_priv->chipset  > 0xa0 &&
+           dev_priv->chipset != 0xaa &&
+           dev_priv->chipset != 0xac)
                NVOBJ_CLASS(dev, 0x85c0, GR);
 
        dev_priv->engine.graph.registered = true;