ARM: dts: armada388-clearfog: move ethernet related nodes

Move the ethernet, buffer manager, and mdio nodes over to use label form
to reference the devices rather than replicating the device path.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

diff --git a/arch/arm/boot/dts/armada-388-clearfog.dtsi b/arch/arm/boot/dts/armada-388-clearfog.dtsi
index eeb845b..6149699 100644 (file)
--- a/arch/arm/boot/dts/armada-388-clearfog.dtsi
+++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi
@@ -71,27 +71,6 @@
 
        soc {
                internal-regs {
-                       ethernet@30000 {
-                               phy-mode = "sgmii";
-                               buffer-manager = <&bm>;
-                               bm,pool-long = <2>;
-                               bm,pool-short = <1>;
-                               status = "okay";
-                       };
-
-                       ethernet@34000 {
-                               phy-mode = "sgmii";
-                               buffer-manager = <&bm>;
-                               bm,pool-long = <3>;
-                               bm,pool-short = <1>;
-                               status = "okay";
-
-                               fixed-link {
-                                       speed = <1000>;
-                                       full-duplex;
-                               };
-                       };
-
                        sata@a8000 {
                                /* pinctrl? */
                                status = "okay";
@@ -147,6 +126,29 @@
        };
 };
 
+&eth1 {
+       /* ethernet@30000 */
+       bm,pool-long = <2>;
+       bm,pool-short = <1>;
+       buffer-manager = <&bm>;
+       phy-mode = "sgmii";
+       status = "okay";
+};
+
+&eth2 {
+       /* ethernet@34000 */
+       bm,pool-long = <3>;
+       bm,pool-short = <1>;
+       buffer-manager = <&bm>;
+       phy-mode = "sgmii";
+       status = "okay";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
 &i2c0 {
        /* Is there anything on this? */
        clock-frequency = <100000>;

diff --git a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
index 116f461..213b1fb 100644 (file)
--- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
@@ -62,38 +62,6 @@
                          MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
 
                internal-regs {
-                       ethernet@70000 {
-                               pinctrl-0 = <&ge0_rgmii_pins>;
-                               pinctrl-names = "default";
-                               phy = <&phy_dedicated>;
-                               phy-mode = "rgmii-id";
-                               buffer-manager = <&bm>;
-                               bm,pool-long = <0>;
-                               bm,pool-short = <1>;
-                               status = "okay";
-                       };
-
-                       mdio@72004 {
-                               /*
-                                * Add the phy clock here, so the phy can be
-                                * accessed to read its IDs prior to binding
-                                * with the driver.
-                                */
-                               pinctrl-0 = <&mdio_pins &microsom_phy_clk_pins>;
-                               pinctrl-names = "default";
-
-                               phy_dedicated: ethernet-phy@0 {
-                                       /*
-                                        * Annoyingly, the marvell phy driver
-                                        * configures the LED register, rather
-                                        * than preserving reset-loaded setting.
-                                        * We undo that rubbish here.
-                                        */
-                                       marvell,reg-init = <3 16 0 0x101e>;
-                                       reg = <0>;
-                               };
-                       };
-
                        rtc@a3800 {
                                /*
                                 * If the rtc doesn't work, run "date reset"
@@ -107,16 +75,46 @@
                                pinctrl-names = "default";
                                status = "okay";
                        };
-
-                       bm@c8000 {
-                               status = "okay";
-                       };
                };
+       };
+};
 
-               bm-bppi {
-                       status = "okay";
-               };
+&bm {
+       status = "okay";
+};
+
+&bm_bppi {
+       status = "okay";
+};
+
+&eth0 {
+       /* ethernet@70000 */
+       pinctrl-0 = <&ge0_rgmii_pins>;
+       pinctrl-names = "default";
+       phy = <&phy_dedicated>;
+       phy-mode = "rgmii-id";
+       buffer-manager = <&bm>;
+       bm,pool-long = <0>;
+       bm,pool-short = <1>;
+       status = "okay";
+};
+
+&mdio {
+       /*
+        * Add the phy clock here, so the phy can be accessed to read its
+        * IDs prior to binding with the driver.
+        */
+       pinctrl-0 = <&mdio_pins &microsom_phy_clk_pins>;
+       pinctrl-names = "default";
 
+       phy_dedicated: ethernet-phy@0 {
+               /*
+                * Annoyingly, the marvell phy driver configures the LED
+                * register, rather than preserving reset-loaded setting.
+                * We undo that rubbish here.
+                */
+               marvell,reg-init = <3 16 0 0x101e>;
+               reg = <0>;
        };
 };