Fix typo which broke MIPS32R2 64-bit FPU support.
authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Wed, 9 Jan 2008 12:03:22 +0000 (12:03 +0000)
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Wed, 9 Jan 2008 12:03:22 +0000 (12:03 +0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3902 c046a42c-6fe2-441c-8c8c-71466251a162

target-mips/exec.h

index 35e71e4a75e96fe43ca747d9b9d119e3fc05b443..b612cec70fdca4048251c5687293a128348540c8 100644 (file)
@@ -258,7 +258,7 @@ static always_inline void compute_hflags(CPUState *env)
     if (env->CP0_Status & (1 << CP0St_FR))
         env->hflags |= MIPS_HFLAG_F64;
     if (env->insn_flags & ISA_MIPS32R2) {
-        if (env->fpu->fcr0 & FCR0_F64)
+        if (env->fpu->fcr0 & (1 << FCR0_F64))
             env->hflags |= MIPS_HFLAG_COP1X;
     } else if (env->insn_flags & ISA_MIPS32) {
         if (env->hflags & MIPS_HFLAG_64)