drm/amdgpu: Add reset_ras_error_count for mmhub v1_8

Add reset_ras_error_count callback for mmhub
v1_8. It will be used to reset mmhub ras error
count.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
index 11240ca..f40a6a9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
@@ -672,3 +672,31 @@ static void mmhub_v1_8_query_ras_error_count(struct amdgpu_device *adev,
        for_each_inst(i, inst_mask)
                mmhub_v1_8_inst_query_ras_error_count(adev, i, ras_err_status);
 }
+
+static void mmhub_v1_8_inst_reset_ras_error_count(struct amdgpu_device *adev,
+                                                 uint32_t mmhub_inst)
+{
+       amdgpu_ras_inst_reset_ras_error_count(adev,
+                                       mmhub_v1_8_ce_reg_list,
+                                       ARRAY_SIZE(mmhub_v1_8_ce_reg_list),
+                                       mmhub_inst);
+       amdgpu_ras_inst_reset_ras_error_count(adev,
+                                       mmhub_v1_8_ue_reg_list,
+                                       ARRAY_SIZE(mmhub_v1_8_ue_reg_list),
+                                       mmhub_inst);
+}
+
+static void mmhub_v1_8_reset_ras_error_count(struct amdgpu_device *adev)
+{
+       uint32_t inst_mask;
+       uint32_t i;
+
+       if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB)) {
+               dev_warn(adev->dev, "MMHUB RAS is not supported\n");
+               return;
+       }
+
+       inst_mask = adev->aid_mask;
+       for_each_inst(i, inst_mask)
+               mmhub_v1_8_inst_reset_ras_error_count(adev, i);
+}