arm64: zynqmp: Wire psgtr for zc1751-xm015
authorMichal Simek <michal.simek@xilinx.com>
Mon, 14 Jun 2021 15:25:15 +0000 (17:25 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 13 Sep 2021 06:55:52 +0000 (08:55 +0200)
Add psgtr description for SATA and USB. Display Port could be also added
but it wasn't tested yet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3fb11fdb9ade828fa174379515e45ba02bc17247.1623684253.git.michal.simek@xilinx.com
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts

index 5b25812..f57cb53 100644 (file)
@@ -11,6 +11,7 @@
 
 #include "zynqmp.dtsi"
 #include "zynqmp-clk-ccf.dtsi"
+#include <dt-bindings/phy/phy.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
 
                device_type = "memory";
                reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
        };
+
+       clock_si5338_0: clk27 { /* u55 SI5338-GM */
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <27000000>;
+       };
+
+       clock_si5338_2: clk26 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <26000000>;
+       };
+
+       clock_si5338_3: clk150 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <150000000>;
+       };
+};
+
+&psgtr {
+       status = "okay";
+       /* dp, usb3, sata */
+       clocks = <&clock_si5338_0>, <&clock_si5338_2>, <&clock_si5338_3>;
+       clock-names = "ref1", "ref2", "ref3";
 };
 
 &fpd_dma_chan1 {
        ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
        ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
        ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+       phy-names = "sata-phy";
+       phys = <&psgtr 3 PHY_TYPE_SATA 1 3>;
 };
 
 /* eMMC */
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
        dr_mode = "host";
+       phy-names = "usb3-phy";
+       phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
+       maximum-speed = "super-speed";
 };