drm/msm: Check for powered down HW in the devfreq callbacks
authorJordan Crouse <jcrouse@codeaurora.org>
Fri, 1 May 2020 19:43:26 +0000 (13:43 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 24 Jun 2020 15:50:50 +0000 (17:50 +0200)
commit eadf79286a4badebc95af7061530bdb50a7e6f38 upstream.

Writing to the devfreq sysfs nodes while the GPU is powered down can
result in a system crash (on a5xx) or a nasty GMU error (on a6xx):

 $ /sys/class/devfreq/5000000.gpu# echo 500000000 > min_freq
  [  104.841625] platform 506a000.gmu: [drm:a6xx_gmu_set_oob]
*ERROR* Timeout waiting for GMU OOB set GPU_DCVS: 0x0

Despite the fact that we carefully try to suspend the devfreq device when
the hardware is powered down there are lots of holes in the governors that
don't check for the suspend state and blindly call into the devfreq
callbacks that end up triggering hardware reads in the GPU driver.

Call pm_runtime_get_if_in_use() in the gpu_busy() and gpu_set_freq()
callbacks to skip the hardware access if it isn't active.

v3: Only check pm_runtime_get_if_in_use() for == 0 per Eric Anholt
v2: Use pm_runtime_get_if_in_use() per Eric Anholt

Cc: stable@vger.kernel.org
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/msm/adreno/a5xx_gpu.c
drivers/gpu/drm/msm/adreno/a6xx_gmu.c
drivers/gpu/drm/msm/adreno/a6xx_gpu.c

index 99cd6e6..7829247 100644 (file)
@@ -1359,6 +1359,10 @@ static unsigned long a5xx_gpu_busy(struct msm_gpu *gpu)
 {
        u64 busy_cycles, busy_time;
 
+       /* Only read the gpu busy if the hardware is already active */
+       if (pm_runtime_get_if_in_use(&gpu->pdev->dev) == 0)
+               return 0;
+
        busy_cycles = gpu_read64(gpu, REG_A5XX_RBBM_PERFCTR_RBBM_0_LO,
                        REG_A5XX_RBBM_PERFCTR_RBBM_0_HI);
 
@@ -1367,6 +1371,8 @@ static unsigned long a5xx_gpu_busy(struct msm_gpu *gpu)
 
        gpu->devfreq.busy_cycles = busy_cycles;
 
+       pm_runtime_put(&gpu->pdev->dev);
+
        if (WARN_ON(busy_time > ~0LU))
                return ~0LU;
 
index 85f14fe..e62b286 100644 (file)
@@ -107,6 +107,13 @@ static void __a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index)
        struct msm_gpu *gpu = &adreno_gpu->base;
        int ret;
 
+       /*
+        * This can get called from devfreq while the hardware is idle. Don't
+        * bring up the power if it isn't already active
+        */
+       if (pm_runtime_get_if_in_use(gmu->dev) == 0)
+               return;
+
        gmu_write(gmu, REG_A6XX_GMU_DCVS_ACK_OPTION, 0);
 
        gmu_write(gmu, REG_A6XX_GMU_DCVS_PERF_SETTING,
@@ -133,6 +140,7 @@ static void __a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index)
         * for now leave it at max so that the performance is nominal.
         */
        icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
+       pm_runtime_put(gmu->dev);
 }
 
 void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq)
index 686c34d..be68d4e 100644 (file)
@@ -803,6 +803,11 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu)
        struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
        u64 busy_cycles, busy_time;
 
+
+       /* Only read the gpu busy if the hardware is already active */
+       if (pm_runtime_get_if_in_use(a6xx_gpu->gmu.dev) == 0)
+               return 0;
+
        busy_cycles = gmu_read64(&a6xx_gpu->gmu,
                        REG_A6XX_GMU_CX_GMU_POWER_COUNTER_XOCLK_0_L,
                        REG_A6XX_GMU_CX_GMU_POWER_COUNTER_XOCLK_0_H);
@@ -812,6 +817,8 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu)
 
        gpu->devfreq.busy_cycles = busy_cycles;
 
+       pm_runtime_put(a6xx_gpu->gmu.dev);
+
        if (WARN_ON(busy_time > ~0LU))
                return ~0LU;