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Fix the ARM32 build.
author
Pat Gavlin
<pgavlin@gmail.com>
Tue, 13 Dec 2016 23:30:09 +0000
(15:30 -0800)
committer
Pat Gavlin
<pgavlin@gmail.com>
Tue, 13 Dec 2016 23:30:09 +0000
(15:30 -0800)
Commit migrated from https://github.com/dotnet/coreclr/commit/
795435d457d4c06b85354afa3ff075a919497292
src/coreclr/src/jit/codegenarm.cpp
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diff --git
a/src/coreclr/src/jit/codegenarm.cpp
b/src/coreclr/src/jit/codegenarm.cpp
index
057521f
..
f988cf0
100644
(file)
--- a/
src/coreclr/src/jit/codegenarm.cpp
+++ b/
src/coreclr/src/jit/codegenarm.cpp
@@
-662,7
+662,7
@@
void CodeGen::genCodeForTreeNode(GenTreePtr treeNode)
case GT_LOCKADD:
case GT_XCHG:
case GT_XADD:
- genLockedInstructions(treeNode);
+ genLockedInstructions(treeNode
->AsOp()
);
break;
case GT_CMPXCHG:
@@
-749,7
+749,7
@@
void CodeGen::genCodeForTreeNode(GenTreePtr treeNode)
// generate code for the locked operations:
// GT_LOCKADD, GT_XCHG, GT_XADD
-void CodeGen::genLockedInstructions(GenTree* treeNode)
+void CodeGen::genLockedInstructions(GenTree
Op
* treeNode)
{
NYI("genLockedInstructions");
}