drm/amdgpu/gfx10: set number of me(c)/pipe/queue for navi12

Same as other navi asics.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 754a212..99669c1 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1228,6 +1228,7 @@ static int gfx_v10_0_sw_init(void *handle)
        switch (adev->asic_type) {
        case CHIP_NAVI10:
        case CHIP_NAVI14:
+       case CHIP_NAVI12:
                adev->gfx.me.num_me = 1;
                adev->gfx.me.num_pipe_per_me = 2;
                adev->gfx.me.num_queue_per_pipe = 1;