anv: fix anv_nir_lower_ubo_loads pass
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Fri, 21 Apr 2023 09:29:00 +0000 (12:29 +0300)
committerMarge Bot <emma+marge@anholt.net>
Thu, 27 Apr 2023 09:08:03 +0000 (09:08 +0000)
In order to use load_global_const_block_intel we need to ensure the
64bit address in src[0] is uniform. This is not the case in the
vkd3d-proton test_bindless_cbv tests for example.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22624>

src/intel/vulkan/anv_nir_lower_ubo_loads.c
src/intel/vulkan/anv_pipeline.c

index 5a17035..f1609a2 100644 (file)
@@ -47,7 +47,7 @@ lower_ubo_load_instr(nir_builder *b, nir_instr *instr, UNUSED void *_data)
    unsigned byte_size = bit_size / 8;
 
    nir_ssa_def *val;
-   if (nir_src_is_const(load->src[1])) {
+   if (!nir_src_is_divergent(load->src[0]) && nir_src_is_const(load->src[1])) {
       uint32_t offset = nir_src_as_uint(load->src[1]);
 
       /* Things should be component-aligned. */
index a8f5a2d..bea64f5 100644 (file)
@@ -954,8 +954,16 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline,
    NIR_PASS(_, nir, nir_copy_prop);
    NIR_PASS(_, nir, nir_opt_constant_folding);
 
+   /* Required for nir_divergence_analysis() which is needed for
+    * anv_nir_lower_ubo_loads.
+    */
+   NIR_PASS(_, nir, nir_convert_to_lcssa, true, true);
+   nir_divergence_analysis(nir);
+
    NIR_PASS(_, nir, anv_nir_lower_ubo_loads);
 
+   NIR_PASS(_, nir, nir_opt_remove_phis);
+
    enum nir_lower_non_uniform_access_type lower_non_uniform_access_types =
       nir_lower_non_uniform_texture_access | nir_lower_non_uniform_image_access;