r600g: set enable always bits for r600/r700 sq registers.

This makes sure these are enabled even if set to 0 at startup.

Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c
index 234834e..44957db 100644 (file)
--- a/src/gallium/winsys/r600/drm/r600_hw_context.c
+++ b/src/gallium/winsys/r600/drm/r600_hw_context.c
@@ -206,17 +206,17 @@ int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg,
 /* R600/R700 configuration */
 static const struct r600_reg r600_config_reg_list[] = {
        {R_008958_VGT_PRIMITIVE_TYPE, 0, 0, 0},
-       {R_008C00_SQ_CONFIG, 0, 0, 0},
-       {R_008C04_SQ_GPR_RESOURCE_MGMT_1, 0, 0, 0},
-       {R_008C08_SQ_GPR_RESOURCE_MGMT_2, 0, 0, 0},
-       {R_008C0C_SQ_THREAD_RESOURCE_MGMT, 0, 0, 0},
-       {R_008C10_SQ_STACK_RESOURCE_MGMT_1, 0, 0, 0},
-       {R_008C14_SQ_STACK_RESOURCE_MGMT_2, 0, 0, 0},
-       {R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0, 0, 0},
-       {R_009508_TA_CNTL_AUX, 0, 0, 0},
-       {R_009714_VC_ENHANCE, 0, 0, 0},
-       {R_009830_DB_DEBUG, 0, 0, 0},
-       {R_009838_DB_WATERMARKS, 0, 0, 0},
+       {R_008C00_SQ_CONFIG, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_008C04_SQ_GPR_RESOURCE_MGMT_1, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_008C08_SQ_GPR_RESOURCE_MGMT_2, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_008C0C_SQ_THREAD_RESOURCE_MGMT, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_008C10_SQ_STACK_RESOURCE_MGMT_1, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_008C14_SQ_STACK_RESOURCE_MGMT_2, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_009508_TA_CNTL_AUX, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_009714_VC_ENHANCE, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_009830_DB_DEBUG, REG_FLAG_ENABLE_ALWAYS, 0, 0},
+       {R_009838_DB_WATERMARKS, REG_FLAG_ENABLE_ALWAYS, 0, 0},
 };
 
 static const struct r600_reg r600_ctl_const_list[] = {