Allow vsx_extract_<mode> to use Altivec registers.

I noticed that the vsx_extract_<mode> pattern for V2DImode and V2DFmode
only allowed traditional floating point registers, and it did not allow
Altivec registers.  The original code was written a few years ago when we
used the old register allocator, and support for scalar floating point in
Altivec registers was just being added to GCC.

I have built the spec 2017 benchmark suite With all 4 patches in this
series applied, and compared it to the build with the previous 3 patches
applied.  In addition to the changes from the previous 3 patches, this
patch now changes the code for the following 3 benchmarks (2 floating
point, 1 integer):

	bwaves_r, fotonik3d_r, xalancbmk_r

I have built bootstrap versions on the following systems.  There were no
regressions in the runs:

	Power9 little endian, --with-cpu=power9
	Power10 little endian, --with-cpu=power10
	Power8 big endian, --with-cpu=power8 (both 32-bit & 64-bit tests)

2022-03-29   Michael Meissner  <meissner@linux.ibm.com>

gcc/
	* config/rs6000/vsx.md (vsx_extract_<mode>): Allow destination to
	be any VSX register.

diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 15bd86d..1b75538 100644 (file)
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3397,15 +3397,12 @@
 ;; Optimize cases were we can do a simple or direct move.
 ;; Or see if we can avoid doing the move at all
 
-;; There are some unresolved problems with reload that show up if an Altivec
-;; register was picked.  Limit the scalar value to FPRs for now.
-
 (define_insn "vsx_extract_<mode>"
-  [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=d, d,  wr, wr")
+  [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=wa, wa, wr, wr")
        (vec_select:<VS_scalar>
-        (match_operand:VSX_D 1 "gpc_reg_operand"      "wa, wa, wa, wa")
+        (match_operand:VSX_D 1 "gpc_reg_operand"       "wa, wa, wa, wa")
         (parallel
-         [(match_operand:QI 2 "const_0_to_1_operand"  "wD, n,  wD, n")])))]
+         [(match_operand:QI 2 "const_0_to_1_operand"   "wD, n,  wD, n")])))]
   "VECTOR_MEM_VSX_P (<MODE>mode)"
 {
   int element = INTVAL (operands[2]);