pinctrl: mediatek: don't hardcode mode encoding in common code

MT8365 encode the pins mode differently than other
MTK pinctrl drivers that use the PINCTRL_MTK common code.

Add 3 new fields in mtk_pinctrl_devdata in order to store how
pin modes are encoded into the register. At the
same time update all the pinctrl driver that depends on
CONFIG_PINCTRL_MTK.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210519162409.3755679-2-fparent@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt2701.c b/drivers/pinctrl/mediatek/pinctrl-mt2701.c
index df8c6fb129558589175150fb035b95f4d4027e07..37228dd5103ef5d8ecad581cf19cb329be9fae0f 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mt2701.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt2701.c
@@ -523,6 +523,9 @@ static const struct mtk_pinctrl_devdata mt2701_pinctrl_data = {
        .port_shf = 4,
        .port_mask = 0x1f,
        .port_align = 4,
+       .mode_mask = 0xf,
+       .mode_per_reg = 5,
+       .mode_shf = 4,
        .eint_hw = {
                .port_mask = 6,
                .ports     = 6,

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt2712.c b/drivers/pinctrl/mediatek/pinctrl-mt2712.c
index 8398d55c01cb49b82d1097853ab3ae0646eea36d..ba35fc6cc1384562e38864a34c2a5125c1e4f622 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mt2712.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt2712.c
@@ -576,6 +576,9 @@ static const struct mtk_pinctrl_devdata mt2712_pinctrl_data = {
        .port_shf = 4,
        .port_mask = 0xf,
        .port_align = 4,
+       .mode_mask = 0xf,
+       .mode_per_reg = 5,
+       .mode_shf = 4,
        .eint_hw = {
                .port_mask = 0xf,
                .ports     = 8,

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6397.c b/drivers/pinctrl/mediatek/pinctrl-mt6397.c
index a1914e0e49c798de1332f09d485c3dc062ddfe4e..bc5c3dfcdc765dd15763d3b11264012ec7bc9c8a 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mt6397.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt6397.c
@@ -33,6 +33,9 @@ static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = {
        .port_shf = 3,
        .port_mask = 0x3,
        .port_align = 2,
+       .mode_mask = 0xf,
+       .mode_per_reg = 5,
+       .mode_shf = 4,
 };
 
 static int mt6397_pinctrl_probe(struct platform_device *pdev)

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8127.c b/drivers/pinctrl/mediatek/pinctrl-mt8127.c
index 5f05be056309cb6e1212e5b80d6dd67c170d17dd..eaf5c76b14c7eedf9f87eae75768707e55da0000 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mt8127.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8127.c
@@ -292,6 +292,9 @@ static const struct mtk_pinctrl_devdata mt8127_pinctrl_data = {
        .port_shf = 4,
        .port_mask = 0xf,
        .port_align = 4,
+       .mode_mask = 0xf,
+       .mode_per_reg = 5,
+       .mode_shf = 4,
        .eint_hw = {
                .port_mask = 7,
                .ports     = 6,

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8135.c b/drivers/pinctrl/mediatek/pinctrl-mt8135.c
index 9ac784c488735c920e56971448f04d907001cf60..b8f4080aab45059b57b83223595cd923d0346e14 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mt8135.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8135.c
@@ -305,6 +305,9 @@ static const struct mtk_pinctrl_devdata mt8135_pinctrl_data = {
        .port_shf = 4,
        .port_mask = 0xf,
        .port_align = 4,
+       .mode_mask = 0xf,
+       .mode_per_reg = 5,
+       .mode_shf = 4,
        .eint_hw = {
                .port_mask = 7,
                .ports     = 6,

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8167.c b/drivers/pinctrl/mediatek/pinctrl-mt8167.c
index 7b68886bad1608b7338f50b15ee850b5c1a9129a..ba12ef795e52927b68f47d9426ecf1667e70a865 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mt8167.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8167.c
@@ -324,6 +324,9 @@ static const struct mtk_pinctrl_devdata mt8167_pinctrl_data = {
        .port_shf = 4,
        .port_mask = 0xf,
        .port_align = 4,
+       .mode_mask = 0xf,
+       .mode_per_reg = 5,
+       .mode_shf = 4,
        .eint_hw = {
                .port_mask = 7,
                .ports     = 6,

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8173.c b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
index 75e7c0978337e539aba2bedc2ab6c57b05288892..fc99df8a11c62ca9a5443d3aeb2ca8ee3601fe3f 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
@@ -332,6 +332,9 @@ static const struct mtk_pinctrl_devdata mt8173_pinctrl_data = {
        .port_shf = 4,
        .port_mask = 0xf,
        .port_align = 4,
+       .mode_mask = 0xf,
+       .mode_per_reg = 5,
+       .mode_shf = 4,
        .eint_hw = {
                .port_mask = 7,
                .ports     = 6,

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8516.c b/drivers/pinctrl/mediatek/pinctrl-mt8516.c
index b375426aa61e41910229b4d0e0c06b33046fe2b4..219fb4bc341f25c3d98ffea475103caaf50dc5d6 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mt8516.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c
@@ -324,6 +324,9 @@ static const struct mtk_pinctrl_devdata mt8516_pinctrl_data = {
        .port_shf = 4,
        .port_mask = 0xf,
        .port_align = 4,
+       .mode_mask = 0xf,
+       .mode_per_reg = 5,
+       .mode_shf = 4,
        .eint_hw = {
                .port_mask = 7,
                .ports     = 6,

diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
index a02ad10ec6fada549a1f03d2903d6c11da1aa4aa..9fe91e11a8779743ea70c5e9fadb4346a5662cef 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -33,7 +33,6 @@
 #include "mtk-eint.h"
 #include "pinctrl-mtk-common.h"
 
-#define MAX_GPIO_MODE_PER_REG 5
 #define GPIO_MODE_BITS        3
 #define GPIO_MODE_PREFIX "GPIO"
 
@@ -61,7 +60,7 @@ static struct regmap *mtk_get_regmap(struct mtk_pinctrl *pctl,
 static unsigned int mtk_get_port(struct mtk_pinctrl *pctl, unsigned long pin)
 {
        /* Different SoC has different mask and port shift. */
-       return ((pin >> 4) & pctl->devdata->port_mask)
+       return ((pin >> pctl->devdata->mode_shf) & pctl->devdata->port_mask)
                        << pctl->devdata->port_shf;
 }
 
@@ -74,7 +73,7 @@ static int mtk_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
        struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 
        reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
-       bit = BIT(offset & 0xf);
+       bit = BIT(offset & pctl->devdata->mode_mask);
 
        if (pctl->devdata->spec_dir_set)
                pctl->devdata->spec_dir_set(&reg_addr, offset);
@@ -96,7 +95,7 @@ static void mtk_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
        struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
 
        reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset;
-       bit = BIT(offset & 0xf);
+       bit = BIT(offset & pctl->devdata->mode_mask);
 
        if (value)
                reg_addr = SET_ADDR(reg_addr, pctl);
@@ -135,7 +134,7 @@ static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin,
                        pin, pctl->devdata->port_align, value, arg);
        }
 
-       bit = BIT(pin & 0xf);
+       bit = BIT(offset & pctl->devdata->mode_mask);
 
        if (arg == PIN_CONFIG_INPUT_ENABLE)
                offset = pctl->devdata->ies_offset;
@@ -311,7 +310,7 @@ static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl,
                return -EINVAL;
        }
 
-       bit = BIT(pin & 0xf);
+       bit = BIT(pin & pctl->devdata->mode_mask);
        if (enable)
                reg_pullen = SET_ADDR(mtk_get_port(pctl, pin) +
                        pctl->devdata->pullen_offset, pctl);
@@ -683,11 +682,11 @@ static int mtk_pmx_set_mode(struct pinctrl_dev *pctldev,
                pctl->devdata->spec_pinmux_set(mtk_get_regmap(pctl, pin),
                                        pin, mode);
 
-       reg_addr = ((pin / MAX_GPIO_MODE_PER_REG) << pctl->devdata->port_shf)
+       reg_addr = ((pin / pctl->devdata->mode_per_reg) << pctl->devdata->port_shf)
                        + pctl->devdata->pinmux_offset;
 
        mode &= mask;
-       bit = pin % MAX_GPIO_MODE_PER_REG;
+       bit = pin % pctl->devdata->mode_per_reg;
        mask <<= (GPIO_MODE_BITS * bit);
        val = (mode << (GPIO_MODE_BITS * bit));
        return regmap_update_bits(mtk_get_regmap(pctl, pin),
@@ -798,7 +797,7 @@ static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
        struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
 
        reg_addr =  mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
-       bit = BIT(offset & 0xf);
+       bit = BIT(offset & pctl->devdata->mode_mask);
 
        if (pctl->devdata->spec_dir_set)
                pctl->devdata->spec_dir_set(&reg_addr, offset);
@@ -820,7 +819,7 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned offset)
        reg_addr = mtk_get_port(pctl, offset) +
                pctl->devdata->din_offset;
 
-       bit = BIT(offset & 0xf);
+       bit = BIT(offset & pctl->devdata->mode_mask);
        regmap_read(pctl->regmap1, reg_addr, &read_val);
        return !!(read_val & bit);
 }

diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
index 69364b56803fb54777743b6ba057ce5e650c9106..98f27cdc609a514796f5b440ed0498ef023373ac 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
@@ -254,6 +254,9 @@ struct mtk_pinctrl_devdata {
        unsigned char  port_align;
        struct mtk_eint_hw eint_hw;
        struct mtk_eint_regs *eint_regs;
+       unsigned int mode_mask;
+       unsigned int mode_per_reg;
+       unsigned int mode_shf;
 };
 
 struct mtk_pinctrl {