ARM: dts: stm32: DT sync with kernel v6.0-rc4 for MCU's boards
authorPatrice Chotard <patrice.chotard@foss.st.com>
Fri, 23 Sep 2022 11:20:33 +0000 (13:20 +0200)
committerPatrice Chotard <patrice.chotard@foss.st.com>
Mon, 26 Sep 2022 13:19:57 +0000 (15:19 +0200)
Device tree alignment with kernel v6.0-rc4.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
19 files changed:
arch/arm/dts/stm32429i-eval-u-boot.dtsi
arch/arm/dts/stm32746g-eval.dts
arch/arm/dts/stm32f4-pinctrl.dtsi
arch/arm/dts/stm32f429-disco-u-boot.dtsi
arch/arm/dts/stm32f429-disco.dts
arch/arm/dts/stm32f429-pinctrl.dtsi
arch/arm/dts/stm32f429.dtsi
arch/arm/dts/stm32f469-disco-u-boot.dtsi
arch/arm/dts/stm32f469-disco.dts
arch/arm/dts/stm32f469-pinctrl.dtsi
arch/arm/dts/stm32f7-pinctrl.dtsi
arch/arm/dts/stm32f7-u-boot.dtsi
arch/arm/dts/stm32f746-disco.dts
arch/arm/dts/stm32f746.dtsi
arch/arm/dts/stm32f769-disco.dts
arch/arm/dts/stm32h743.dtsi
arch/arm/dts/stm32h743i-disco.dts
arch/arm/dts/stm32h743i-eval.dts
arch/arm/dts/stm32h750i-art-pi.dts

index fcab9ae..030da47 100644 (file)
        };
 };
 
-&timer5 {
+&timers5 {
        u-boot,dm-pre-reloc;
 };
index 9940cf1..0e6445a 100644 (file)
                };
        };
 
-       gpio_keys {
+       gpio-keys {
                compatible = "gpio-keys";
-               #address-cells = <1>;
-               #size-cells = <0>;
                autorepeat;
-               button@0 {
+               button-0 {
                        label = "Wake up";
                        linux,code = <KEY_WAKEUP>;
                        gpios = <&gpioc 13 0>;
        bus-width = <4>;
 };
 
+&timers5 {
+       /* Override timer5 to act as clockevent */
+       compatible = "st,stm32-timer";
+       interrupts = <50>;
+       status = "okay";
+       /delete-property/#address-cells;
+       /delete-property/#size-cells;
+       /delete-property/clock-names;
+       /delete-node/pwm;
+       /delete-node/timer@4;
+};
+
 &usart1 {
        pinctrl-0 = <&usart1_pins_a>;
        pinctrl-names = "default";
index adf5026..46815c9 100644 (file)
@@ -9,7 +9,7 @@
 
 / {
        soc {
-               pinctrl: pin-controller {
+               pinctrl: pinctrl@40020000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x40020000 0x3000>;
index c993f86..45f8996 100644 (file)
 
        soc {
                u-boot,dm-pre-reloc;
-               pin-controller {
-                       u-boot,dm-pre-reloc;
-               };
-
                fmc: fmc@A0000000 {
                        compatible = "st,stm32-fmc";
                        reg = <0xa0000000 0x1000>;
 };
 
 &pinctrl {
+       u-boot,dm-pre-reloc;
+
        usart1_pins_a: usart1-0 {
                u-boot,dm-pre-reloc;
                pins1 {
        u-boot,dm-pre-reloc;
 };
 
-&timer5 {
+&timers5 {
        u-boot,dm-pre-reloc;
 };
index 42477c8..30daabd 100644 (file)
                };
        };
 
-       gpio_keys {
+       gpio-keys {
                compatible = "gpio-keys";
-               #address-cells = <1>;
-               #size-cells = <0>;
                autorepeat;
-               button@0 {
+               button-0 {
                        label = "User";
                        linux,code = <KEY_HOME>;
                        gpios = <&gpioa 0 0>;
 
        display: display@1{
                /* Connect panel-ilitek-9341 to ltdc */
-               compatible = "st,sf-tc240t-9370-t";
+               compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
                reg = <1>;
                spi-3wire;
                spi-max-frequency = <10000000>;
        };
 };
 
+&timers5 {
+       /* Override timer5 to act as clockevent */
+       compatible = "st,stm32-timer";
+       interrupts = <50>;
+       status = "okay";
+       /delete-property/#address-cells;
+       /delete-property/#size-cells;
+       /delete-property/clock-names;
+       /delete-node/pwm;
+       /delete-node/timer@4;
+};
+
 &usart1 {
        pinctrl-0 = <&usart1_pins_a>;
        pinctrl-names = "default";
index 575c7ee..5be171e 100644 (file)
@@ -6,54 +6,50 @@
 
 #include "stm32f4-pinctrl.dtsi"
 
-/ {
-       soc {
-               pinctrl: pin-controller {
-                       compatible = "st,stm32f429-pinctrl";
-
-                       gpioa: gpio@40020000 {
-                               gpio-ranges = <&pinctrl 0 0 16>;
-                       };
-
-                       gpiob: gpio@40020400 {
-                               gpio-ranges = <&pinctrl 0 16 16>;
-                       };
-
-                       gpioc: gpio@40020800 {
-                               gpio-ranges = <&pinctrl 0 32 16>;
-                       };
-
-                       gpiod: gpio@40020c00 {
-                               gpio-ranges = <&pinctrl 0 48 16>;
-                       };
-
-                       gpioe: gpio@40021000 {
-                               gpio-ranges = <&pinctrl 0 64 16>;
-                       };
-
-                       gpiof: gpio@40021400 {
-                               gpio-ranges = <&pinctrl 0 80 16>;
-                       };
-
-                       gpiog: gpio@40021800 {
-                               gpio-ranges = <&pinctrl 0 96 16>;
-                       };
-
-                       gpioh: gpio@40021c00 {
-                               gpio-ranges = <&pinctrl 0 112 16>;
-                       };
-
-                       gpioi: gpio@40022000 {
-                               gpio-ranges = <&pinctrl 0 128 16>;
-                       };
-
-                       gpioj: gpio@40022400 {
-                               gpio-ranges = <&pinctrl 0 144 16>;
-                       };
-
-                       gpiok: gpio@40022800 {
-                               gpio-ranges = <&pinctrl 0 160 8>;
-                       };
-               };
+&pinctrl {
+       compatible = "st,stm32f429-pinctrl";
+
+       gpioa: gpio@40020000 {
+               gpio-ranges = <&pinctrl 0 0 16>;
+       };
+
+       gpiob: gpio@40020400 {
+               gpio-ranges = <&pinctrl 0 16 16>;
+       };
+
+       gpioc: gpio@40020800 {
+               gpio-ranges = <&pinctrl 0 32 16>;
+       };
+
+       gpiod: gpio@40020c00 {
+               gpio-ranges = <&pinctrl 0 48 16>;
+       };
+
+       gpioe: gpio@40021000 {
+               gpio-ranges = <&pinctrl 0 64 16>;
+       };
+
+       gpiof: gpio@40021400 {
+               gpio-ranges = <&pinctrl 0 80 16>;
+       };
+
+       gpiog: gpio@40021800 {
+               gpio-ranges = <&pinctrl 0 96 16>;
+       };
+
+       gpioh: gpio@40021c00 {
+               gpio-ranges = <&pinctrl 0 112 16>;
+       };
+
+       gpioi: gpio@40022000 {
+               gpio-ranges = <&pinctrl 0 128 16>;
+       };
+
+       gpioj: gpio@40022400 {
+               gpio-ranges = <&pinctrl 0 144 16>;
+       };
+
+       gpiok: gpio@40022800 {
+               gpio-ranges = <&pinctrl 0 160 8>;
        };
 };
index a81e916..e5b13ac 100644 (file)
                        };
                };
 
-               timer2: timer@40000000 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000000 0x400>;
-                       interrupts = <28>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
-                       status = "disabled";
-               };
-
                timers2: timers@40000000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer3: timer@40000400 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000400 0x400>;
-                       interrupts = <29>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
-                       status = "disabled";
-               };
-
                timers3: timers@40000400 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer4: timer@40000800 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000800 0x400>;
-                       interrupts = <30>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
-                       status = "disabled";
-               };
-
                timers4: timers@40000800 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer5: timer@40000c00 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000c00 0x400>;
-                       interrupts = <50>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
-               };
-
                timers5: timers@40000c00 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer6: timer@40001000 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40001000 0x400>;
-                       interrupts = <54>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
-                       status = "disabled";
-               };
-
                timers6: timers@40001000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer7: timer@40001400 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40001400 0x400>;
-                       interrupts = <55>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>;
-                       status = "disabled";
-               };
-
                timers7: timers@40001400 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                };
 
                timers13: timers@40001c00 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001C00 0x400>;
                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
                };
 
                timers14: timers@40002000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40002000 0x400>;
                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
                        };
                };
 
-               sdio: sdio@40012c00 {
+               sdio: mmc@40012c00 {
                        compatible = "arm,pl180", "arm,primecell";
                        arm,primecell-periphid = <0x00880180>;
                        reg = <0x40012c00 0x400>;
                };
 
                timers10: timers@40014400 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014400 0x400>;
                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
                };
 
                timers11: timers@40014800 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014800 0x400>;
                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
                        status = "disabled";
                };
 
-               rcc: rcc@40023810 {
+               rcc: rcc@40023800 {
                        #reset-cells = <1>;
                        #clock-cells = <2>;
                        compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
                        status = "disabled";
                };
 
+               dma2d: dma2d@4002b000 {
+                       compatible = "st,stm32-dma2d";
+                       reg = <0x4002b000 0xc00>;
+                       interrupts = <90>;
+                       resets = <&rcc STM32F4_AHB1_RESET(DMA2D)>;
+                       clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2D)>;
+                       clock-names = "dma2d";
+                       status = "disabled";
+               };
+
                usbotg_hs: usb@40040000 {
                        compatible = "snps,dwc2";
                        reg = <0x40040000 0x40000>;
index cd17362..ee0c82b 100644 (file)
@@ -28,9 +28,6 @@
 
        soc {
                u-boot,dm-pre-reloc;
-               pin-controller {
-                       u-boot,dm-pre-reloc;
-               };
 
                fmc: fmc@A0000000 {
                        compatible = "st,stm32-fmc";
 };
 
 &pinctrl {
+       u-boot,dm-pre-reloc;
+
        fmc_pins_d32: fmc_d32@0 {
                u-boot,dm-pre-reloc;
                pins
        u-boot,dm-pre-reloc;
 };
 
-&timer5 {
+&timers5 {
        u-boot,dm-pre-reloc;
 };
index 23d87ee..6e0ffc1 100644 (file)
@@ -19,7 +19,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory@00000000 {
+       memory@0 {
                device_type = "memory";
                reg = <0x00000000 0x1000000>;
        };
                };
        };
 
-       gpio_keys {
+       gpio-keys {
                compatible = "gpio-keys";
-               #address-cells = <1>;
-               #size-cells = <0>;
                autorepeat;
-               button@0 {
+               button-0 {
                        label = "User";
                        linux,code = <KEY_WAKEUP>;
                        gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
        clock-frequency = <8000000>;
 };
 
+&dma2d {
+       status = "okay";
+};
+
 &dsi {
        #address-cells = <1>;
        #size-cells = <0>;
        bus-width = <4>;
 };
 
+&timers5 {
+       /* Override timer5 to act as clockevent */
+       compatible = "st,stm32-timer";
+       interrupts = <50>;
+       status = "okay";
+       /delete-property/#address-cells;
+       /delete-property/#size-cells;
+       /delete-property/clock-names;
+       /delete-node/pwm;
+       /delete-node/timer@4;
+};
+
 &usart3 {
        pinctrl-0 = <&usart3_pins_a>;
        pinctrl-names = "default";
index 1e2bb01..0610407 100644 (file)
@@ -5,55 +5,51 @@
 
 #include "stm32f4-pinctrl.dtsi"
 
-/ {
-       soc {
-               pinctrl: pin-controller {
-                       compatible = "st,stm32f469-pinctrl";
-
-                       gpioa: gpio@40020000 {
-                               gpio-ranges = <&pinctrl 0 0 16>;
-                       };
-
-                       gpiob: gpio@40020400 {
-                               gpio-ranges = <&pinctrl 0 16 16>;
-                       };
-
-                       gpioc: gpio@40020800 {
-                               gpio-ranges = <&pinctrl 0 32 16>;
-                       };
-
-                       gpiod: gpio@40020c00 {
-                               gpio-ranges = <&pinctrl 0 48 16>;
-                       };
-
-                       gpioe: gpio@40021000 {
-                               gpio-ranges = <&pinctrl 0 64 16>;
-                       };
-
-                       gpiof: gpio@40021400 {
-                               gpio-ranges = <&pinctrl 0 80 16>;
-                       };
-
-                       gpiog: gpio@40021800 {
-                               gpio-ranges = <&pinctrl 0 96 16>;
-                       };
-
-                       gpioh: gpio@40021c00 {
-                               gpio-ranges = <&pinctrl 0 112 16>;
-                       };
-
-                       gpioi: gpio@40022000 {
-                               gpio-ranges = <&pinctrl 0 128 16>;
-                       };
-
-                       gpioj: gpio@40022400 {
-                               gpio-ranges = <&pinctrl 0 144 6>,
-                                             <&pinctrl 12 156 4>;
-                       };
-
-                       gpiok: gpio@40022800 {
-                               gpio-ranges = <&pinctrl 3 163 5>;
-                       };
-               };
+&pinctrl {
+       compatible = "st,stm32f469-pinctrl";
+
+       gpioa: gpio@40020000 {
+               gpio-ranges = <&pinctrl 0 0 16>;
+       };
+
+       gpiob: gpio@40020400 {
+               gpio-ranges = <&pinctrl 0 16 16>;
+       };
+
+       gpioc: gpio@40020800 {
+               gpio-ranges = <&pinctrl 0 32 16>;
+       };
+
+       gpiod: gpio@40020c00 {
+               gpio-ranges = <&pinctrl 0 48 16>;
+       };
+
+       gpioe: gpio@40021000 {
+               gpio-ranges = <&pinctrl 0 64 16>;
+       };
+
+       gpiof: gpio@40021400 {
+               gpio-ranges = <&pinctrl 0 80 16>;
+       };
+
+       gpiog: gpio@40021800 {
+               gpio-ranges = <&pinctrl 0 96 16>;
+       };
+
+       gpioh: gpio@40021c00 {
+               gpio-ranges = <&pinctrl 0 112 16>;
+       };
+
+       gpioi: gpio@40022000 {
+               gpio-ranges = <&pinctrl 0 128 16>;
+       };
+
+       gpioj: gpio@40022400 {
+               gpio-ranges = <&pinctrl 0 144 6>,
+                             <&pinctrl 12 156 4>;
+       };
+
+       gpiok: gpio@40022800 {
+               gpio-ranges = <&pinctrl 3 163 5>;
        };
 };
index fe4cfda..8f37aef 100644 (file)
@@ -9,7 +9,7 @@
 
 / {
        soc {
-               pinctrl: pin-controller {
+               pinctrl: pinctrl@40020000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x40020000 0x3000>;
index c1b2ac2..0ba8031 100644 (file)
        u-boot,dm-pre-reloc;
 };
 
-&timer5 {
+&timers5 {
        u-boot,dm-pre-reloc;
 };
 
index 9430dc0..1ed58f2 100644 (file)
        bus-width = <4>;
 };
 
+&timers5 {
+       /* Override timer5 to act as clockevent */
+       compatible = "st,stm32-timer";
+       interrupts = <50>;
+       status = "okay";
+       /delete-property/#address-cells;
+       /delete-property/#size-cells;
+       /delete-property/clock-names;
+       /delete-node/pwm;
+       /delete-node/timer@4;
+};
+
 &usart1 {
        pinctrl-0 = <&usart1_pins_b>;
        pinctrl-names = "default";
index 78facde..c97b3d0 100644 (file)
        };
 
        soc {
-               timer2: timer@40000000 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000000 0x400>;
-                       interrupts = <28>;
-                       clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
-                       status = "disabled";
-               };
-
                timers2: timers@40000000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer3: timer@40000400 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000400 0x400>;
-                       interrupts = <29>;
-                       clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
-                       status = "disabled";
-               };
-
                timers3: timers@40000400 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer4: timer@40000800 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000800 0x400>;
-                       interrupts = <30>;
-                       clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
-                       status = "disabled";
-               };
-
                timers4: timers@40000800 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer5: timer@40000c00 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000c00 0x400>;
-                       interrupts = <50>;
-                       clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
-               };
-
                timers5: timers@40000c00 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer6: timer@40001000 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40001000 0x400>;
-                       interrupts = <54>;
-                       clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
-                       status = "disabled";
-               };
-
                timers6: timers@40001000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
-               timer7: timer@40001400 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40001400 0x400>;
-                       interrupts = <55>;
-                       clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
-                       status = "disabled";
-               };
-
                timers7: timers@40001400 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                };
 
                timers13: timers@40001c00 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001C00 0x400>;
                        clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
                };
 
                timers14: timers@40002000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40002000 0x400>;
                        clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
                        clocks = <&rcc 1 CLK_I2C1>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       i2c-analog-filter;
                        status = "disabled";
                };
 
                        clocks = <&rcc 1 CLK_I2C2>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       i2c-analog-filter;
                        status = "disabled";
                };
 
-               i2c3: i2c@40005C00 {
+               i2c3: i2c@40005c00 {
                        compatible = "st,stm32f7-i2c";
-                       reg = <0x40005C00 0x400>;
+                       reg = <0x40005c00 0x400>;
                        interrupts = <72>,
                                     <73>;
                        resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
                        clocks = <&rcc 1 CLK_I2C3>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       i2c-analog-filter;
                        status = "disabled";
                };
 
                        clocks = <&rcc 1 CLK_I2C4>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       i2c-analog-filter;
                        status = "disabled";
                };
 
                        status = "disabled";
                };
 
-               sdio2: sdio2@40011c00 {
+               sdio2: mmc@40011c00 {
                        compatible = "arm,pl180", "arm,primecell";
                        arm,primecell-periphid = <0x00880180>;
                        reg = <0x40011c00 0x400>;
                        status = "disabled";
                };
 
-               sdio1: sdio1@40012c00 {
+               sdio1: mmc@40012c00 {
                        compatible = "arm,pl180", "arm,primecell";
                        arm,primecell-periphid = <0x00880180>;
                        reg = <0x40012c00 0x400>;
                };
 
                timers10: timers@40014400 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014400 0x400>;
                        clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
                };
 
                timers11: timers@40014800 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014800 0x400>;
                        clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;
index 03cfbd7..6f93fc7 100644 (file)
                };
        };
 
-       gpio_keys {
+       gpio-keys {
                compatible = "gpio-keys";
-               #address-cells = <1>;
-               #size-cells = <0>;
                autorepeat;
-               button@0 {
+               button-0 {
                        label = "User";
                        linux,code = <KEY_HOME>;
                        gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
        bus-width = <4>;
 };
 
+&timers5 {
+       /* Override timer5 to act as clockevent */
+       compatible = "st,stm32-timer";
+       interrupts = <50>;
+       status = "okay";
+       /delete-property/#address-cells;
+       /delete-property/#size-cells;
+       /delete-property/clock-names;
+       /delete-node/pwm;
+       /delete-node/timer@4;
+};
+
 &usart1 {
        pinctrl-0 = <&usart1_pins_a>;
        pinctrl-names = "default";
index dbfebf0..ceb629c 100644 (file)
                                     <32>;
                        resets = <&rcc STM32H7_APB1L_RESET(I2C1)>;
                        clocks = <&rcc I2C1_CK>;
-                       i2c-analog-filter;
                        status = "disabled";
                };
 
                                     <34>;
                        resets = <&rcc STM32H7_APB1L_RESET(I2C2)>;
                        clocks = <&rcc I2C2_CK>;
-                       i2c-analog-filter;
                        status = "disabled";
                };
 
                                     <73>;
                        resets = <&rcc STM32H7_APB1L_RESET(I2C3)>;
                        clocks = <&rcc I2C3_CK>;
-                       i2c-analog-filter;
                        status = "disabled";
                };
 
                        dma-requests = <32>;
                };
 
-               sdmmc1: sdmmc@52007000 {
+               sdmmc1: mmc@52007000 {
                        compatible = "arm,pl18x", "arm,primecell";
                        arm,primecell-periphid = <0x10153180>;
                        reg = <0x52007000 0x1000>;
                        interrupts = <49>;
-                       interrupt-names = "cmd_irq";
+                       interrupt-names = "cmd_irq";
                        clocks = <&rcc SDMMC1_CK>;
                        clock-names = "apb_pclk";
                        resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
                        max-frequency = <120000000>;
                };
 
-               sdmmc2: sdmmc@48022400 {
+               sdmmc2: mmc@48022400 {
                        compatible = "arm,pl18x", "arm,primecell";
                        arm,primecell-periphid = <0x10153180>;
                        reg = <0x48022400 0x400>;
                        interrupts = <124>;
-                       interrupt-names = "cmd_irq";
+                       interrupt-names = "cmd_irq";
                        clocks = <&rcc SDMMC2_CK>;
                        clock-names = "apb_pclk";
                        resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>;
                        cap-sd-highspeed;
                        cap-mmc-highspeed;
                        max-frequency = <120000000>;
+                       status = "disabled";
                };
 
                exti: interrupt-controller@58000000 {
                                     <96>;
                        resets = <&rcc STM32H7_APB4_RESET(I2C4)>;
                        clocks = <&rcc I2C4_CK>;
-                       i2c-analog-filter;
                        status = "disabled";
                };
 
                };
 
                lptimer4: timer@58002c00 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-lptimer";
                        reg = <0x58002c00 0x400>;
                        clocks = <&rcc LPTIM4_CK>;
                };
 
                lptimer5: timer@58003000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-lptimer";
                        reg = <0x58003000 0x400>;
                        clocks = <&rcc LPTIM5_CK>;
                        status = "disabled";
                };
 
-               pinctrl: pin-controller@58020000 {
+               pinctrl: pinctrl@58020000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "st,stm32h743-pinctrl";
index 3a01ebd..b31188f 100644 (file)
 
 &mac {
        status = "disabled";
-       pinctrl-0       = <&ethernet_rmii>;
-       pinctrl-names   = "default";
-       phy-mode        = "rmii";
-       phy-handle      = <&phy0>;
+       pinctrl-0 = <&ethernet_rmii>;
+       pinctrl-names = "default";
+       phy-mode = "rmii";
+       phy-handle = <&phy0>;
 
        mdio0 {
                #address-cells = <1>;
index 38cc7fa..5c5d805 100644 (file)
 
 &mac {
        status = "disabled";
-       pinctrl-0       = <&ethernet_rmii>;
-       pinctrl-names   = "default";
-       phy-mode        = "rmii";
-       phy-handle      = <&phy0>;
+       pinctrl-0 = <&ethernet_rmii>;
+       pinctrl-names = "default";
+       phy-mode = "rmii";
+       phy-handle = <&phy0>;
 
        mdio0 {
                #address-cells = <1>;
index 2a4d1cb..c7c7132 100644 (file)
 
 &mac {
        status = "disabled";
-       pinctrl-0       = <&ethernet_rmii>;
-       pinctrl-names   = "default";
-       phy-mode        = "rmii";
-       phy-handle      = <&phy0>;
+       pinctrl-0 = <&ethernet_rmii>;
+       pinctrl-names = "default";
+       phy-mode = "rmii";
+       phy-handle = <&phy0>;
 
        mdio0 {
                #address-cells = <1>;