arm64: dts: qcom: sdm845: Fix cheza qspi pin config
authorDouglas Anderson <dianders@chromium.org>
Thu, 23 Mar 2023 17:30:18 +0000 (10:30 -0700)
committerBjorn Andersson <andersson@kernel.org>
Fri, 7 Apr 2023 17:54:09 +0000 (10:54 -0700)
Cheza's SPI flash hookups (qspi) are exactly the same as trogdor's.
Apply the same solution that's described in the patch ("arm64: dts:
qcom: sc7180: Fix trogdor qspi pin config")

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230323102605.14.I82951106ab8170f973a4c1c7d9b034655bbe2f60@changeid
arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
arch/arm64/boot/dts/qcom/sdm845.dtsi

index e1bab53..d05c511 100644 (file)
 
 &qspi {
        status = "okay";
-       pinctrl-names = "default";
-       pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>;
+       pinctrl-1 = <&qspi_sleep>;
 
        flash@0 {
                compatible = "jedec,spi-nor";
@@ -993,16 +994,19 @@ ap_ts_i2c: &i2c14 {
 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
 
 &qspi_cs0 {
-       bias-disable;
+       bias-disable;           /* External pullup */
 };
 
 &qspi_clk {
-       bias-disable;
+       bias-disable;           /* Rely on Cr50 internal pulldown */
 };
 
-&qspi_data01 {
-       /* High-Z when no transfers; nice to park the lines */
-       bias-pull-up;
+&qspi_data0 {
+       bias-disable;           /* Rely on Cr50 internal pulldown */
+};
+
+&qspi_data1 {
+       bias-pull-down;
 };
 
 &qup_i2c3_default {
@@ -1231,6 +1235,22 @@ ap_ts_i2c: &i2c14 {
                output-high;
        };
 
+       qspi_sleep: qspi-sleep-state {
+               pins = "gpio90", "gpio91", "gpio92", "gpio95";
+
+               /*
+                * When we're not actively transferring we want pins as GPIOs
+                * with output disabled so that the quad SPI IP block stops
+                * driving them. We rely on the normal pulls configured in
+                * the active state and don't redefine them here. Also note
+                * that we don't need the reverse (output-enable) in the
+                * normal mode since the "output-enable" only matters for
+                * GPIO function.
+                */
+               function = "gpio";
+               output-disable;
+       };
+
        sdc2_clk: sdc2-clk-state {
                pins = "sdc2_clk";
                bias-disable;
index e7fabd5..fe1e8b6 100644 (file)
                                function = "qspi_cs";
                        };
 
-                       qspi_data01: qspi-data01-state {
-                               pins = "gpio91", "gpio92";
+                       qspi_data0: qspi-data0-state {
+                               pins = "gpio91";
+                               function = "qspi_data";
+                       };
+
+                       qspi_data1: qspi-data1-state {
+                               pins = "gpio92";
                                function = "qspi_data";
                        };