anv: change most pipe controls in gfx8_cmd_buffer to use pc helper

One using a flag (PSDSyncEnable) that has no corresponding ANV bit.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>

diff --git a/src/intel/vulkan/gfx8_cmd_buffer.c b/src/intel/vulkan/gfx8_cmd_buffer.c
index 68c8a1d..823191e 100644 (file)
--- a/src/intel/vulkan/gfx8_cmd_buffer.c
+++ b/src/intel/vulkan/gfx8_cmd_buffer.c
@@ -49,24 +49,16 @@ genX(cmd_buffer_enable_pma_fix)(struct anv_cmd_buffer *cmd_buffer, bool enable)
     * streamer stall.  However, the hardware seems to violently disagree.
     * A full command streamer stall seems to be needed in both cases.
     */
-   anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
-      pc.DepthCacheFlushEnable = true;
-      pc.CommandStreamerStallEnable = true;
-      pc.RenderTargetCacheFlushEnable = true;
+   genX(batch_emit_pipe_control)
+      (&cmd_buffer->batch, cmd_buffer->device->info,
+       ANV_PIPE_DEPTH_CACHE_FLUSH_BIT |
+       ANV_PIPE_CS_STALL_BIT |
 #if GFX_VER >= 12
-      pc.TileCacheFlushEnable = true;
+       ANV_PIPE_TILE_CACHE_FLUSH_BIT |
 #endif
-
-#if INTEL_NEEDS_WA_1409600907
-      /* Wa_1409600907: "PIPE_CONTROL with Depth Stall Enable bit must
-       * be set with any PIPE_CONTROL with Depth Flush Enable bit set.
-       */
-      pc.DepthStallEnable = true;
-#endif
-   }
+       ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT);
 
 #if GFX_VER == 9
-
    uint32_t cache_mode;
    anv_pack_struct(&cache_mode, GENX(CACHE_MODE_0),
                    .STCPMAOptimizationEnable = enable,
@@ -85,14 +77,14 @@ genX(cmd_buffer_enable_pma_fix)(struct anv_cmd_buffer *cmd_buffer, bool enable)
     * Again, the Skylake docs give a different set of flushes but the BDW
     * flushes seem to work just as well.
     */
-   anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
-      pc.DepthStallEnable = true;
-      pc.DepthCacheFlushEnable = true;
-      pc.RenderTargetCacheFlushEnable = true;
+   genX(batch_emit_pipe_control)
+      (&cmd_buffer->batch, cmd_buffer->device->info,
+       ANV_PIPE_DEPTH_STALL_BIT |
+       ANV_PIPE_DEPTH_CACHE_FLUSH_BIT |
 #if GFX_VER >= 12
-      pc.TileCacheFlushEnable = true;
+       ANV_PIPE_TILE_CACHE_FLUSH_BIT |
 #endif
-   }
+       ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT);
 }
 
 UNUSED static bool