microblaze: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-Boot

Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.

Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 79dc0cf..baf4f51 100644 (file)
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -31,8 +31,8 @@ _start:
        mts     rshr, r1
        addi    r1, r1, -4      /* Decrement SP to top of memory */
 #else
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
-       addi    r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
+       addi    r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_VAL(SYS_MALLOC_F_LEN)
 #else
        addi    r1, r0, CONFIG_SYS_INIT_SP_OFFSET
 #endif
@@ -162,14 +162,14 @@ clear_bss:
 #ifndef CONFIG_SPL_BUILD
        or      r5, r0, r0      /* flags - empty */
        addi    r31, r0, _gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
        addi    r6, r0, CONFIG_SYS_INIT_SP_OFFSET
        swi     r6, r31, GD_MALLOC_BASE
 #endif
        brai    board_init_f
 #else
        addi    r31, r0, _gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
        addi    r6, r0, CONFIG_SPL_STACK_ADDR
        swi     r6, r31, GD_MALLOC_BASE
 #endif