ARM: dts: stm32f429: Add Ethernet support

Add Ethernet support (Synopsys MAC IP 3.50a) on stm32f429 SOC.

Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 3563ac5..35df462 100644 (file)
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -303,6 +303,26 @@
                                        slew-rate = <2>;
                                };
                        };
+
+                       ethernet0_mii: mii@0 {
+                               pins {
+                                       pinmux = <STM32F429_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
+                                                <STM32F429_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
+                                                <STM32F429_PC2_FUNC_ETH_MII_TXD2>,
+                                                <STM32F429_PB8_FUNC_ETH_MII_TXD3>,
+                                                <STM32F429_PC3_FUNC_ETH_MII_TX_CLK>,
+                                                <STM32F429_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
+                                                <STM32F429_PA2_FUNC_ETH_MDIO>,
+                                                <STM32F429_PC1_FUNC_ETH_MDC>,
+                                                <STM32F429_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
+                                                <STM32F429_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
+                                                <STM32F429_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
+                                                <STM32F429_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>,
+                                                <STM32F429_PH6_FUNC_ETH_MII_RXD2>,
+                                                <STM32F429_PH7_FUNC_ETH_MII_RXD3>;
+                                       slew-rate = <2>;
+                               };
+                       };
                };
 
                rcc: rcc@40023810 {
@@ -343,6 +363,21 @@
                        st,mem2mem;
                };
 
+               ethernet0: dwmac@40028000 {
+                       compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
+                       reg = <0x40028000 0x8000>;
+                       reg-names = "stmmaceth";
+                       interrupts = <61>, <62>;
+                       interrupt-names = "macirq", "eth_wake_irq";
+                       clock-names = "stmmaceth", "tx-clk", "rx-clk";
+                       clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
+                       st,syscon = <&syscfg 0x4>;
+                       snps,pbl = <8>;
+                       snps,mixed-burst;
+                       dma-ranges;
+                       status = "disabled";
+               };
+
                usbotg_hs: usb@40040000 {
                        compatible = "snps,dwc2";
                        dma-ranges;