dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers
authorSascha Hauer <s.hauer@pengutronix.de>
Thu, 23 Apr 2015 08:35:43 +0000 (10:35 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 6 May 2015 05:50:40 +0000 (22:50 -0700)
This adds the binding documentation for the apmixedsys, perisys and
infracfg controllers found on Mediatek SoCs.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
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+Mediatek apmixedsys controller
+==============================
+
+The Mediatek apmixedsys controller provides the PLLs to the system.
+
+Required Properties:
+
+- compatible: Should be:
+       - "mediatek,mt8135-apmixedsys"
+       - "mediatek,mt8173-apmixedsys"
+- #clock-cells: Must be 1
+
+The apmixedsys controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+apmixedsys: apmixedsys@10209000 {
+       compatible = "mediatek,mt8173-apmixedsys";
+       reg = <0 0x10209000 0 0x1000>;
+       #clock-cells = <1>;
+};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
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+Mediatek infracfg controller
+============================
+
+The Mediatek infracfg controller provides various clocks and reset
+outputs to the system.
+
+Required Properties:
+
+- compatible: Should be:
+       - "mediatek,mt8135-infracfg", "syscon"
+       - "mediatek,mt8173-infracfg", "syscon"
+- #clock-cells: Must be 1
+- #reset-cells: Must be 1
+
+The infracfg controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+Also it uses the common reset controller binding from
+Documentation/devicetree/bindings/reset/reset.txt.
+The available reset outputs are defined in
+dt-bindings/reset-controller/mt*-resets.h
+
+Example:
+
+infracfg: infracfg@10001000 {
+       compatible = "mediatek,mt8173-infracfg", "syscon";
+       reg = <0 0x10001000 0 0x1000>;
+       #clock-cells = <1>;
+       #reset-cells = <1>;
+};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt
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+Mediatek pericfg controller
+===========================
+
+The Mediatek pericfg controller provides various clocks and reset
+outputs to the system.
+
+Required Properties:
+
+- compatible: Should be:
+       - "mediatek,mt8135-pericfg", "syscon"
+       - "mediatek,mt8173-pericfg", "syscon"
+- #clock-cells: Must be 1
+- #reset-cells: Must be 1
+
+The pericfg controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+Also it uses the common reset controller binding from
+Documentation/devicetree/bindings/reset/reset.txt.
+The available reset outputs are defined in
+dt-bindings/reset-controller/mt*-resets.h
+
+Example:
+
+pericfg: pericfg@10003000 {
+       compatible = "mediatek,mt8173-pericfg", "syscon";
+       reg = <0 0x10003000 0 0x1000>;
+       #clock-cells = <1>;
+       #reset-cells = <1>;
+};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
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+Mediatek topckgen controller
+============================
+
+The Mediatek topckgen controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be:
+       - "mediatek,mt8135-topckgen"
+       - "mediatek,mt8173-topckgen"
+- #clock-cells: Must be 1
+
+The topckgen controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+topckgen: topckgen@10000000 {
+       compatible = "mediatek,mt8173-topckgen";
+       reg = <0 0x10000000 0 0x1000>;
+       #clock-cells = <1>;
+};