Merge branch 'CR_930_V4L2_changhuang.liang' into 'jh7110_fpga_dev_5.15'
authorandy.hu <andy.hu@starfivetech.com>
Fri, 6 May 2022 11:57:40 +0000 (11:57 +0000)
committerandy.hu <andy.hu@starfivetech.com>
Fri, 6 May 2022 11:57:40 +0000 (11:57 +0000)
V4L2: fixed code warning!

See merge request sdk/sft-riscvpi-linux-5.10!52

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arch/riscv/boot/dts/starfive/jh7110.dtsi