ColdFire: Misc update for M53017

Reside Ethernet buffer descriptors in SRAM instead of DRAM. Add
CONFIG_SYS_TX_ETH_BUFFER in platform configuration file. Update
DRAM control and SRAM control register setting. Update cache
setting where size does not write to proper region.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>

diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index 5b134aa..5abd944 100644 (file)
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -284,7 +284,7 @@ _int_handler:
 icache_enable:
        move.l  #0x01000000, %d0                /* Invalidate cache cmd */
        movec   %d0, %CACR                      /* Invalidate cache */
-       move.l  #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0) << 11)), %d0
+       move.l  #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0 - 1) << 16)), %d0
        movec   %d0, %ACR0                      /* Enable cache */
 
        move.l  #0x80000200, %d0                /* Setup cache mask */

diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 30855bd..c351d41 100644 (file)
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -69,6 +69,8 @@
 #      define CONFIG_MII_INIT          1
 #      define CONFIG_SYS_DISCOVER_PHY
 #      define CONFIG_SYS_RX_ETH_BUFFER 8
+#      define CONFIG_SYS_TX_ETH_BUFFER 8
+#      define CONFIG_SYS_FEC_BUF_USE_SRAM
 #      define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 #      define CONFIG_HAS_ETH1
 
@@ -166,7 +168,7 @@
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x80000000
 #define CONFIG_SYS_INIT_RAM_END                0x20000 /* End of used area in internal SRAM */
-#define CONFIG_SYS_INIT_RAM_CTRL       0x21
+#define CONFIG_SYS_INIT_RAM_CTRL       0x221
 #define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET     ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
@@ -180,7 +182,7 @@
 #define CONFIG_SYS_SDRAM_SIZE          64      /* SDRAM size in MB */
 #define CONFIG_SYS_SDRAM_CFG1          0x43711630
 #define CONFIG_SYS_SDRAM_CFG2          0x56670000
-#define CONFIG_SYS_SDRAM_CTRL          0xE1002000
+#define CONFIG_SYS_SDRAM_CTRL          0xE1092000
 #define CONFIG_SYS_SDRAM_EMOD          0x80010000
 #define CONFIG_SYS_SDRAM_MODE          0x00CD0000