phy: qcom: qmp-combo: drop similar functions
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 21 Jun 2023 15:33:15 +0000 (18:33 +0300)
committerVinod Koul <vkoul@kernel.org>
Wed, 12 Jul 2023 16:57:43 +0000 (22:27 +0530)
The functions qmp_v5_configure_dp_phy() and qmp_v6_configure_dp_phy()
are now copies of qmp_v4_configure_dp_phy(). Drop them and use the v4
function in all the cases.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-combo.c

index a2db4ce..0b27b38 100644 (file)
@@ -1433,10 +1433,7 @@ static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp);
 static int qmp_v4_configure_dp_phy(struct qmp_combo *qmp);
 static int qmp_v4_calibrate_dp_phy(struct qmp_combo *qmp);
 
-static int qmp_v5_configure_dp_phy(struct qmp_combo *qmp);
-
 static void qmp_v6_dp_aux_init(struct qmp_combo *qmp);
-static int qmp_v6_configure_dp_phy(struct qmp_combo *qmp);
 
 static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)
 {
@@ -1686,7 +1683,7 @@ static const struct qmp_phy_cfg sc8280xp_usb43dpphy_cfg = {
 
        .dp_aux_init            = qmp_v4_dp_aux_init,
        .configure_dp_tx        = qmp_v4_configure_dp_tx,
-       .configure_dp_phy       = qmp_v5_configure_dp_phy,
+       .configure_dp_phy       = qmp_v4_configure_dp_phy,
        .calibrate_dp_phy       = qmp_v4_calibrate_dp_phy,
 
        .clk_list               = qmp_v4_phy_clk_l,
@@ -1875,7 +1872,7 @@ static const struct qmp_phy_cfg sm8550_usb3dpphy_cfg = {
 
        .dp_aux_init            = qmp_v6_dp_aux_init,
        .configure_dp_tx        = qmp_v4_configure_dp_tx,
-       .configure_dp_phy       = qmp_v6_configure_dp_phy,
+       .configure_dp_phy       = qmp_v4_configure_dp_phy,
        .calibrate_dp_phy       = qmp_v4_calibrate_dp_phy,
 
        .regs                   = qmp_v6_usb3phy_regs_layout,
@@ -2386,122 +2383,6 @@ static int qmp_v4_configure_dp_phy(struct qmp_combo *qmp)
        return 0;
 }
 
-static int qmp_v5_configure_dp_phy(struct qmp_combo *qmp)
-{
-       const struct qmp_phy_cfg *cfg = qmp->cfg;
-       bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE);
-       const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts;
-       u32 bias0_en, drvr0_en, bias1_en, drvr1_en;
-       u32 status;
-       int ret;
-
-       ret = qmp_v456_configure_dp_phy(qmp);
-       if (ret < 0)
-               return ret;
-
-       if (dp_opts->lanes == 1) {
-               bias0_en = reverse ? 0x3e : 0x15;
-               drvr0_en = reverse ? 0x13 : 0x10;
-               bias1_en = reverse ? 0x15 : 0x3e;
-               drvr1_en = reverse ? 0x10 : 0x13;
-       } else if (dp_opts->lanes == 2) {
-               bias0_en = reverse ? 0x3f : 0x15;
-               drvr0_en = 0x10;
-               bias1_en = reverse ? 0x15 : 0x3f;
-               drvr1_en = 0x10;
-       } else {
-               bias0_en = 0x3f;
-               bias1_en = 0x3f;
-               drvr0_en = 0x10;
-               drvr1_en = 0x10;
-       }
-
-       writel(drvr0_en, qmp->dp_tx + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]);
-       writel(bias0_en, qmp->dp_tx + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]);
-       writel(drvr1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]);
-       writel(bias1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]);
-
-       writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
-       udelay(2000);
-       writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
-
-       if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS],
-                       status,
-                       ((status & BIT(1)) > 0),
-                       500,
-                       10000))
-               return -ETIMEDOUT;
-
-       writel(0x0a, qmp->dp_tx + cfg->regs[QPHY_TX_TX_POL_INV]);
-       writel(0x0a, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_POL_INV]);
-
-       writel(0x27, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]);
-       writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]);
-
-       writel(0x20, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
-       writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
-
-       return 0;
-}
-
-static int qmp_v6_configure_dp_phy(struct qmp_combo *qmp)
-{
-       const struct qmp_phy_cfg *cfg = qmp->cfg;
-       bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE);
-       const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts;
-       u32 bias0_en, drvr0_en, bias1_en, drvr1_en;
-       u32 status;
-       int ret;
-
-       ret = qmp_v456_configure_dp_phy(qmp);
-       if (ret < 0)
-               return ret;
-
-       if (dp_opts->lanes == 1) {
-               bias0_en = reverse ? 0x3e : 0x15;
-               drvr0_en = reverse ? 0x13 : 0x10;
-               bias1_en = reverse ? 0x15 : 0x3e;
-               drvr1_en = reverse ? 0x10 : 0x13;
-       } else if (dp_opts->lanes == 2) {
-               bias0_en = reverse ? 0x3f : 0x15;
-               drvr0_en = 0x10;
-               bias1_en = reverse ? 0x15 : 0x3f;
-               drvr1_en = 0x10;
-       } else {
-               bias0_en = 0x3f;
-               bias1_en = 0x3f;
-               drvr0_en = 0x10;
-               drvr1_en = 0x10;
-       }
-
-       writel(drvr0_en, qmp->dp_tx + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]);
-       writel(bias0_en, qmp->dp_tx + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]);
-       writel(drvr1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]);
-       writel(bias1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]);
-
-       writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
-       udelay(2000);
-       writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
-
-       if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS],
-                              status,
-                              ((status & BIT(1)) > 0),
-                              500,
-                              10000))
-               return -ETIMEDOUT;
-
-       writel(0x0a, qmp->dp_tx + cfg->regs[QPHY_TX_TX_POL_INV]);
-       writel(0x0a, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_POL_INV]);
-
-       writel(0x27, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]);
-       writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]);
-
-       writel(0x20, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
-       writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
-
-       return 0;
-}
-
 /*
  * We need to calibrate the aux setting here as many times
  * as the caller tries