arm64: dts: imx8mp: Add iMX8MP PCIe support

Add i.MX8MP PCIe support.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Richard Leitner <richard.leitner@skidata.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index f676dbd..53493dc 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -5,6 +5,7 @@
 
 #include <dt-bindings/clock/imx8mp-clock.h>
 #include <dt-bindings/power/imx8mp-power.h>
+#include <dt-bindings/reset/imx8mp-reset.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interconnect/fsl,imx8mp.h>
@@ -1129,6 +1130,17 @@
                                #power-domain-cells = <1>;
                        };
 
+                       pcie_phy: pcie-phy@32f00000 {
+                               compatible = "fsl,imx8mp-pcie-phy";
+                               reg = <0x32f00000 0x10000>;
+                               resets = <&src IMX8MP_RESET_PCIEPHY>,
+                                        <&src IMX8MP_RESET_PCIEPHY_PERST>;
+                               reset-names = "pciephy", "perst";
+                               power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_PCIE_PHY>;
+                               #phy-cells = <0>;
+                               status = "disabled";
+                       };
+
                        hsio_blk_ctrl: blk-ctrl@32f10000 {
                                compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
                                reg = <0x32f10000 0x24>;
@@ -1149,6 +1161,37 @@
                        };
                };
 
+               pcie: pcie@33800000 {
+                       compatible = "fsl,imx8mp-pcie";
+                       reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
+                       reg-names = "dbi", "config";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       bus-range = <0x00 0xff>;
+                       ranges =  <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */
+                                 <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
+                       num-lanes = <1>;
+                       num-viewport = <4>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "msi";
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 0x7>;
+                       interrupt-map = <0 0 0 1 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+                       fsl,max-link-speed = <3>;
+                       linux,pci-domain = <0>;
+                       power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_PCIE>;
+                       resets = <&src IMX8MP_RESET_PCIE_CTRL_APPS_EN>,
+                                <&src IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF>;
+                       reset-names = "apps", "turnoff";
+                       phys = <&pcie_phy>;
+                       phy-names = "pcie-phy";
+                       status = "disabled";
+               };
+
                gpu3d: gpu@38000000 {
                        compatible = "vivante,gc";
                        reg = <0x38000000 0x8000>;