drm/amdgpu/soc15: add clock gating functions for raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index ff8decc..cee2d8b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -819,6 +819,20 @@ static int soc15_common_set_clockgating_state(void *handle,
                soc15_update_df_medium_grain_clock_gating(adev,
                                state == AMD_CG_STATE_GATE ? true : false);
                break;
+       case CHIP_RAVEN:
+               nbio_v6_1_update_medium_grain_clock_gating(adev,
+                               state == AMD_CG_STATE_GATE ? true : false);
+               nbio_v6_1_update_medium_grain_light_sleep(adev,
+                               state == AMD_CG_STATE_GATE ? true : false);
+               soc15_update_hdp_light_sleep(adev,
+                               state == AMD_CG_STATE_GATE ? true : false);
+               soc15_update_drm_clock_gating(adev,
+                               state == AMD_CG_STATE_GATE ? true : false);
+               soc15_update_drm_light_sleep(adev,
+                               state == AMD_CG_STATE_GATE ? true : false);
+               soc15_update_rom_medium_grain_clock_gating(adev,
+                               state == AMD_CG_STATE_GATE ? true : false);
+               break;
        default:
                break;
        }