include: sbi: Fine grain the permissions for M and SU modes
authorHimanshu Chauhan <hchauhan@ventanamicro.com>
Mon, 9 Jan 2023 05:20:35 +0000 (05:20 +0000)
committerAnup Patel <anup@brainfault.org>
Mon, 9 Jan 2023 12:34:10 +0000 (18:04 +0530)
Split the permissions for M-mode and SU-mode. This would
help if different sections of OpenSBI need to be given
different permissions and if M-mode has different permisssions
than the SU-mode over a region.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
include/sbi/sbi_domain.h

index f0d9289..a42c20d 100644 (file)
@@ -36,11 +36,48 @@ struct sbi_domain_memregion {
         */
        unsigned long base;
        /** Flags representing memory region attributes */
-#define SBI_DOMAIN_MEMREGION_READABLE          (1UL << 0)
-#define SBI_DOMAIN_MEMREGION_WRITEABLE         (1UL << 1)
-#define SBI_DOMAIN_MEMREGION_EXECUTABLE                (1UL << 2)
-#define SBI_DOMAIN_MEMREGION_MMODE             (1UL << 3)
-#define SBI_DOMAIN_MEMREGION_ACCESS_MASK       (0xfUL)
+#define SBI_DOMAIN_MEMREGION_M_READABLE                (1UL << 0)
+#define SBI_DOMAIN_MEMREGION_M_WRITABLE                (1UL << 1)
+#define SBI_DOMAIN_MEMREGION_M_EXECUTABLE      (1UL << 2)
+#define SBI_DOMAIN_MEMREGION_SU_READABLE       (1UL << 3)
+#define SBI_DOMAIN_MEMREGION_SU_WRITABLE       (1UL << 4)
+#define SBI_DOMAIN_MEMREGION_SU_EXECUTABLE     (1UL << 5)
+
+/** Bit to control if permissions are enforced on all modes */
+#define SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS   (1UL << 6)
+
+#define SBI_DOMAIN_MEMREGION_M_RWX             \
+                               (SBI_DOMAIN_MEMREGION_M_READABLE | \
+                                SBI_DOMAIN_MEMREGION_M_WRITABLE | \
+                                SBI_DOMAIN_MEMREGION_M_EXECUTABLE)
+
+/* Unrestricted M-mode accesses but enfoced on SU-mode */
+#define SBI_DOMAIN_MEMREGION_READABLE          \
+                               (SBI_DOMAIN_MEMREGION_SU_READABLE | \
+                                SBI_DOMAIN_MEMREGION_M_RWX)
+#define SBI_DOMAIN_MEMREGION_WRITEABLE         \
+                               (SBI_DOMAIN_MEMREGION_SU_WRITABLE | \
+                                SBI_DOMAIN_MEMREGION_M_RWX)
+#define SBI_DOMAIN_MEMREGION_EXECUTABLE                \
+                               (SBI_DOMAIN_MEMREGION_SU_EXECUTABLE | \
+                                SBI_DOMAIN_MEMREGION_M_RWX)
+
+/* Enforced accesses across all modes */
+#define SBI_DOMAIN_MEMREGION_ENF_READABLE      \
+                               (SBI_DOMAIN_MEMREGION_SU_READABLE | \
+                                SBI_DOMAIN_MEMREGION_M_READABLE)
+#define SBI_DOMAIN_MEMREGION_ENF_WRITABLE      \
+                               (SBI_DOMAIN_MEMREGION_SU_WRITABLE | \
+                                SBI_DOMAIN_MEMREGION_M_WRITABLE)
+#define SBI_DOMAIN_MEMREGION_ENF_EXECUTABLE    \
+                               (SBI_DOMAIN_MEMREGION_SU_EXECUTABLE | \
+                                SBI_DOMAIN_MEMREGION_M_EXECUTABLE)
+
+#define SBI_DOMAIN_MEMREGION_ACCESS_MASK       (0x3fUL)
+#define SBI_DOMAIN_MEMREGION_M_ACCESS_MASK     (0x7UL)
+#define SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK    (0x38UL)
+
+#define SBI_DOMAIN_MEMREGION_SU_ACCESS_SHIFT   (3)
 
 #define SBI_DOMAIN_MEMREGION_MMIO              (1UL << 31)
        unsigned long flags;