re PR testsuite/51258 (64-bit gcc.dg/atomic-compare-exchange-5.c link failure on...

	PR testsuite/51258
	* lib/target-supports.exp
	(check_effective_target_sync_long_long): Also supported on 32bit
	x86 targets.  Add comment about required dg-options.
	Add alpha*-*-* targets.
	(check_effective_target_sync_long_long_runtime): Ditto.

	* gcc.dg/atomic-op-4.c (dg-options): Add -march=pentium for
	32bit x86 targets.
	* gcc.dg/atomic-compare-exchange-4.c: Ditto.
	* gcc.dg/atomic-exchange-4.c: Ditto.
	* gcc.dg/atomic-load-4.c: Ditto.
	* gcc.dg/atomic-store-4.c: Ditto.
	* gcc.dg/di-longlong64-sync-1.c: Ditto.
	* gcc.dg/di-sync-multithread.c: Ditto.
	* gcc.dg/simulate-thread/atomic-load-longlong.c: Ditto.
	* gcc.dg/simulate-thread/atomic-other-longlong.c: Ditto.

From-SVN: r181728

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e53a713..68c78f7 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -2,6 +2,26 @@
 
        PR testsuite/51258
        * lib/target-supports.exp
+       (check_effective_target_sync_long_long): Also supported on 32bit
+       x86 targets.  Add comment about required dg-options.
+       Add alpha*-*-* targets.
+       (check_effective_target_sync_long_long_runtime): Ditto.
+
+       * gcc.dg/atomic-op-4.c (dg-options): Add -march=pentium for
+       32bit x86 targets.
+       * gcc.dg/atomic-compare-exchange-4.c: Ditto.
+       * gcc.dg/atomic-exchange-4.c: Ditto.
+       * gcc.dg/atomic-load-4.c: Ditto.
+       * gcc.dg/atomic-store-4.c: Ditto.
+       * gcc.dg/di-longlong64-sync-1.c: Ditto.
+       * gcc.dg/di-sync-multithread.c: Ditto.
+       * gcc.dg/simulate-thread/atomic-load-longlong.c: Ditto.
+       * gcc.dg/simulate-thread/atomic-other-longlong.c: Ditto.
+
+2011-11-25  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR testsuite/51258
+       * lib/target-supports.exp
        (check_effective_target_sync_int_128_runtime): New procedure.
        (check_effective_target_sync_long_long_runtime): Ditto.
        (check_effective_target_sync_long_long): Add arm*-*-*.

diff --git a/gcc/testsuite/gcc.dg/atomic-compare-exchange-4.c b/gcc/testsuite/gcc.dg/atomic-compare-exchange-4.c
index 2b34f0a..b6c783d 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-compare-exchange-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-compare-exchange-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* Test the execution of __atomic_compare_exchange_n builtin for a long_long.  */
 

diff --git a/gcc/testsuite/gcc.dg/atomic-exchange-4.c b/gcc/testsuite/gcc.dg/atomic-exchange-4.c
index 0c564fd..13022dd 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-exchange-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-exchange-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* Test the execution of the __atomic_X builtin for a long_long.  */
 

diff --git a/gcc/testsuite/gcc.dg/atomic-load-4.c b/gcc/testsuite/gcc.dg/atomic-load-4.c
index 9523429..032ad24 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-load-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-load-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 extern void abort(void);
 

diff --git a/gcc/testsuite/gcc.dg/atomic-op-4.c b/gcc/testsuite/gcc.dg/atomic-op-4.c
index 786b0bb..7c4a819 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-op-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-op-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* Test the execution of the __atomic_*OP builtin routines for long long.  */
 

diff --git a/gcc/testsuite/gcc.dg/atomic-store-4.c b/gcc/testsuite/gcc.dg/atomic-store-4.c
index c526c5c..0863be9 100644 (file)
--- a/gcc/testsuite/gcc.dg/atomic-store-4.c
+++ b/gcc/testsuite/gcc.dg/atomic-store-4.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* Test the execution of the __atomic_store_n builtin for a long long.  */
 

diff --git a/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c b/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c
index 9bb31ba..f04cf62 100644 (file)
--- a/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c
+++ b/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c
@@ -1,6 +1,8 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "-std=gnu99" } */
+/* { dg-additional-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
+
 /* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
 /* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
 

diff --git a/gcc/testsuite/gcc.dg/di-sync-multithread.c b/gcc/testsuite/gcc.dg/di-sync-multithread.c
index 3cd93b0..307ebf8 100644 (file)
--- a/gcc/testsuite/gcc.dg/di-sync-multithread.c
+++ b/gcc/testsuite/gcc.dg/di-sync-multithread.c
@@ -3,6 +3,7 @@
 /* { dg-require-effective-target pthread_h } */
 /* { dg-require-effective-target pthread } */
 /* { dg-options "-pthread -std=gnu99" } */
+/* { dg-additional-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 /* test of long long atomic ops performed in parallel in 3 pthreads
    david.gilbert@linaro.org */

diff --git a/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-longlong.c b/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-longlong.c
index c555c4c..91f9a06 100644 (file)
--- a/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-longlong.c
+++ b/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-longlong.c
@@ -1,6 +1,7 @@
 /* { dg-do link } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 /* { dg-final { simulate-thread } } */
 
 

diff --git a/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-longlong.c b/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-longlong.c
index 3cffbb4..087c466 100644 (file)
--- a/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-longlong.c
+++ b/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-longlong.c
@@ -1,6 +1,7 @@
 /* { dg-do link } */
 /* { dg-require-effective-target sync_long_long_runtime } */
 /* { dg-options "" } */
+/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 /* { dg-final { simulate-thread } } */
 
 

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 49f2d32..78223af 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3644,11 +3644,14 @@ proc check_effective_target_sync_int_128_runtime { } {
 }
 
 # Return 1 if the target supports atomic operations on "long long".
+#
+# Note: 32bit x86 targets require -march=pentium in dg-options.
 
 proc check_effective_target_sync_long_long { } {
-    if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
-        && ![is-effective-target ia32]
-        || [istarget arm*-*-*] } {
+    if { [istarget x86_64-*-*]
+        || [istarget i?86-*-*])
+        || [istarget arm*-*-*]
+        || [istarget alpha*-*-*] } {
        return 1
     } else {
        return 0
@@ -3657,10 +3660,12 @@ proc check_effective_target_sync_long_long { } {
 
 # Return 1 if the target supports atomic operations on "long long"
 # and can execute them.
+#
+# Note: 32bit x86 targets require -march=pentium in dg-options.
 
 proc check_effective_target_sync_long_long_runtime { } {
-    if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
-        && ![is-effective-target ia32] } {
+    if { [istarget x86_64-*-*]
+        || [istarget i?86-*-*] } {
        return [check_cached_effective_target sync_long_long_available {
            check_runtime_nocache sync_long_long_available {
                #include "cpuid.h"
@@ -3689,6 +3694,8 @@ proc check_effective_target_sync_long_long_runtime { } {
              exit (0);
            }
        } "" ]
+    } elseif { [istarget alpha*-*-*] } {
+       return 1
     } else {
        return 0
     }