selftests: bpf: move sub-register zero extension checks into subreg.c

It is better to centralize all sub-register zero extension checks into an
independent file.

This patch takes the first step to move existing sub-register zero
extension checks into subreg.c.

Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Quentin Monnet <quentin.monnet@netronome.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>

diff --git a/tools/testing/selftests/bpf/verifier/basic_instr.c b/tools/testing/selftests/bpf/verifier/basic_instr.c
index 4d84408..ed91a7b 100644 (file)
--- a/tools/testing/selftests/bpf/verifier/basic_instr.c
+++ b/tools/testing/selftests/bpf/verifier/basic_instr.c
@@ -132,42 +132,3 @@
        .prog_type = BPF_PROG_TYPE_SCHED_CLS,
        .result = ACCEPT,
 },
-{
-       "and32 reg zero extend check",
-       .insns = {
-       BPF_MOV64_IMM(BPF_REG_0, -1),
-       BPF_MOV64_IMM(BPF_REG_2, -2),
-       BPF_ALU32_REG(BPF_AND, BPF_REG_0, BPF_REG_2),
-       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
-       BPF_EXIT_INSN(),
-       },
-       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
-       .result = ACCEPT,
-       .retval = 0,
-},
-{
-       "or32 reg zero extend check",
-       .insns = {
-       BPF_MOV64_IMM(BPF_REG_0, -1),
-       BPF_MOV64_IMM(BPF_REG_2, -2),
-       BPF_ALU32_REG(BPF_OR, BPF_REG_0, BPF_REG_2),
-       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
-       BPF_EXIT_INSN(),
-       },
-       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
-       .result = ACCEPT,
-       .retval = 0,
-},
-{
-       "xor32 reg zero extend check",
-       .insns = {
-       BPF_MOV64_IMM(BPF_REG_0, -1),
-       BPF_MOV64_IMM(BPF_REG_2, 0),
-       BPF_ALU32_REG(BPF_XOR, BPF_REG_0, BPF_REG_2),
-       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
-       BPF_EXIT_INSN(),
-       },
-       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
-       .result = ACCEPT,
-       .retval = 0,
-},

diff --git a/tools/testing/selftests/bpf/verifier/subreg.c b/tools/testing/selftests/bpf/verifier/subreg.c
new file mode 100644 (file)
index 0000000..edeca3b
--- /dev/null
+++ b/tools/testing/selftests/bpf/verifier/subreg.c
@@ -0,0 +1,39 @@
+{
+       "or32 reg zero extend check",
+       .insns = {
+       BPF_MOV64_IMM(BPF_REG_0, -1),
+       BPF_MOV64_IMM(BPF_REG_2, -2),
+       BPF_ALU32_REG(BPF_OR, BPF_REG_0, BPF_REG_2),
+       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
+       BPF_EXIT_INSN(),
+       },
+       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
+       .result = ACCEPT,
+       .retval = 0,
+},
+{
+       "and32 reg zero extend check",
+       .insns = {
+       BPF_MOV64_IMM(BPF_REG_0, -1),
+       BPF_MOV64_IMM(BPF_REG_2, -2),
+       BPF_ALU32_REG(BPF_AND, BPF_REG_0, BPF_REG_2),
+       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
+       BPF_EXIT_INSN(),
+       },
+       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
+       .result = ACCEPT,
+       .retval = 0,
+},
+{
+       "xor32 reg zero extend check",
+       .insns = {
+       BPF_MOV64_IMM(BPF_REG_0, -1),
+       BPF_MOV64_IMM(BPF_REG_2, 0),
+       BPF_ALU32_REG(BPF_XOR, BPF_REG_0, BPF_REG_2),
+       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
+       BPF_EXIT_INSN(),
+       },
+       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
+       .result = ACCEPT,
+       .retval = 0,
+},