liquidio: CN23XX napi support
authorRaghu Vatsavayi <rvatsavayi@caviumnetworks.com>
Thu, 1 Sep 2016 18:16:10 +0000 (11:16 -0700)
committerDavid S. Miller <davem@davemloft.net>
Sat, 3 Sep 2016 00:11:31 +0000 (17:11 -0700)
This patch adds NAPI related support for cn23xx device.

Signed-off-by: Derek Chickles <derek.chickles@caviumnetworks.com>
Signed-off-by: Satanand Burla <satananda.burla@caviumnetworks.com>
Signed-off-by: Felix Manlunas <felix.manlunas@caviumnetworks.com>
Signed-off-by: Raghu Vatsavayi <raghu.vatsavayi@caviumnetworks.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/cavium/liquidio/lio_main.c
drivers/net/ethernet/cavium/liquidio/octeon_device.c
drivers/net/ethernet/cavium/liquidio/octeon_droq.c

index a3910a6..a2460e5 100644 (file)
@@ -1001,8 +1001,7 @@ int liquidio_schedule_msix_droq_pkt_handler(struct octeon_droq *droq, u64 ret)
  * \brief Droq packet processor sceduler
  * @param oct octeon device
  */
-static
-void liquidio_schedule_droq_pkt_handlers(struct octeon_device *oct)
+static void liquidio_schedule_droq_pkt_handlers(struct octeon_device *oct)
 {
        struct octeon_device_priv *oct_priv =
                (struct octeon_device_priv *)oct->priv;
@@ -2378,11 +2377,14 @@ static void napi_schedule_wrapper(void *param)
  */
 static void liquidio_napi_drv_callback(void *arg)
 {
+       struct octeon_device *oct;
        struct octeon_droq *droq = arg;
        int this_cpu = smp_processor_id();
 
-       if (droq->cpu_id == this_cpu) {
-               napi_schedule(&droq->napi);
+       oct = droq->oct_dev;
+
+       if (OCTEON_CN23XX_PF(oct) || droq->cpu_id == this_cpu) {
+               napi_schedule_irqoff(&droq->napi);
        } else {
                struct call_single_data *csd = &droq->csd;
 
index 85e3123..586b688 100644 (file)
@@ -1301,17 +1301,36 @@ int lio_get_device_id(void *dev)
 
 void lio_enable_irq(struct octeon_droq *droq, struct octeon_instr_queue *iq)
 {
+       u64 instr_cnt;
+       struct octeon_device *oct = NULL;
+
        /* the whole thing needs to be atomic, ideally */
        if (droq) {
                spin_lock_bh(&droq->lock);
                writel(droq->pkt_count, droq->pkts_sent_reg);
                droq->pkt_count = 0;
                spin_unlock_bh(&droq->lock);
+               oct = droq->oct_dev;
        }
        if (iq) {
                spin_lock_bh(&iq->lock);
                writel(iq->pkt_in_done, iq->inst_cnt_reg);
                iq->pkt_in_done = 0;
                spin_unlock_bh(&iq->lock);
+               oct = iq->oct_dev;
+       }
+       /*write resend. Writing RESEND in SLI_PKTX_CNTS should be enough
+        *to trigger tx interrupts as well, if they are pending.
+        */
+       if (oct && OCTEON_CN23XX_PF(oct)) {
+               if (droq)
+                       writeq(CN23XX_INTR_RESEND, droq->pkts_sent_reg);
+               /*we race with firmrware here. read and write the IN_DONE_CNTS*/
+               else if (iq) {
+                       instr_cnt =  readq(iq->inst_cnt_reg);
+                       writeq(((instr_cnt & 0xFFFFFFFF00000000ULL) |
+                               CN23XX_INTR_RESEND),
+                              iq->inst_cnt_reg);
+               }
        }
 }
index 8848ce2..f60e532 100644 (file)
@@ -573,7 +573,7 @@ octeon_droq_dispatch_pkt(struct octeon_device *oct,
                        (unsigned int)rh->r.opcode,
                        (unsigned int)rh->r.subcode);
                droq->stats.dropped_nodispatch++;
-       }                       /* else (dispatch_fn ... */
+       }
 
        return cnt;
 }
@@ -887,8 +887,11 @@ octeon_process_droq_poll_cmd(struct octeon_device *oct, u32 q_no, int cmd,
                        return 0;
                }
                break;
+               case OCTEON_CN23XX_PF_VID: {
+                       lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]);
+               }
+               break;
                }
-
                return 0;
        }