x86insn: fixes for SSE

diff --git a/orc/orccompiler.c b/orc/orccompiler.c
index 94cb7a8..e7e97b1 100644 (file)
--- a/orc/orccompiler.c
+++ b/orc/orccompiler.c
@@ -660,12 +660,8 @@ orc_compiler_get_temp_reg (OrcCompiler *compiler)
 
   ORC_DEBUG("at insn %d %s", compiler->insn_index,
       compiler->insns[compiler->insn_index].opcode->name);
-  for(j=0;j<8;j++){
-    ORC_DEBUG("xmm%d: %d %d", j, compiler->valid_regs[ORC_VEC_REG_BASE + j],
-        compiler->alloc_regs[ORC_VEC_REG_BASE + j]);
-  }
 
-  for(j=compiler->min_temp_reg;j<ORC_VEC_REG_BASE+16;j++){
+  for(j=compiler->min_temp_reg;j<ORC_VEC_REG_BASE+32;j++){
     if (compiler->valid_regs[j] && !compiler->alloc_regs[j]) {
       compiler->min_temp_reg = j+1;
       if (compiler->max_used_temp_reg < j) compiler->max_used_temp_reg = j;
@@ -1162,12 +1158,7 @@ orc_compiler_get_constant_reg (OrcCompiler *compiler)
     compiler->alloc_regs[j] = 1;
   }
 
-  for(j=0;j<8;j++){
-    ORC_DEBUG("xmm%d: %d %d", j, compiler->valid_regs[ORC_VEC_REG_BASE + j],
-        compiler->alloc_regs[ORC_VEC_REG_BASE + j]);
-  }
-
-  for(j=compiler->max_used_temp_reg;j<ORC_VEC_REG_BASE+16;j++){
+  for(j=compiler->max_used_temp_reg;j<ORC_VEC_REG_BASE+32;j++){
     if (compiler->valid_regs[j] && !compiler->alloc_regs[j]) {
       return j;
     }

diff --git a/orc/orcx86insn.c b/orc/orcx86insn.c
index 4b9c151..2d1fa54 100644 (file)
--- a/orc/orcx86insn.c
+++ b/orc/orcx86insn.c
@@ -154,13 +154,13 @@ static const OrcSysOpcode orc_x86_opcodes[] = {
   { "palignr", ORC_X86_INSN_TYPE_IMM8_MMXM_MMX, 0, 0x66, 0x0f3a0f },
   { "pinsrw", ORC_X86_INSN_TYPE_IMM8_REGM_MMX, 0, 0x01, 0x0fc4 },
   { "movd", ORC_X86_INSN_TYPE_REGM_MMX, 0, 0x01, 0x0f6e },
-  { "movq", ORC_X86_INSN_TYPE_SSEM_SSE, 0, 0xf3, 0x0f7e },
+  { "movq", ORC_X86_INSN_TYPE_MMXM_MMX, 0, 0xf3, 0x0f7e },
   { "movdqa", ORC_X86_INSN_TYPE_MMXM_MMX, 0, 0x66, 0x0f6f },
   { "movdqu", ORC_X86_INSN_TYPE_MMXM_MMX, 0, 0xf3, 0x0f6f },
   { "movhps", ORC_X86_INSN_TYPE_MMXM_MMX, 0, 0x00, 0x0f16 },
   { "pextrw", ORC_X86_INSN_TYPE_IMM8_MMX_REG_REV, 0, 0x01, 0x0f3a15 },
   { "movd", ORC_X86_INSN_TYPE_MMX_REGM_REV, 0, 0x01, 0x0f7e },
-  { "movq", ORC_X86_INSN_TYPE_SSEM_SSE_REV, 0, 0x66, 0x0fd6 },
+  { "movq", ORC_X86_INSN_TYPE_MMXM_MMX_REV, 0, 0x66, 0x0fd6 },
   { "movdqa", ORC_X86_INSN_TYPE_MMXM_MMX_REV, 0, 0x66, 0x0f7f },
   { "movdqu", ORC_X86_INSN_TYPE_MMXM_MMX_REV, 0, 0xf3, 0x0f7f },
   { "movntdq", ORC_X86_INSN_TYPE_MMXM_MMX_REV, 0, 0x66, 0x0fe7 },
@@ -568,6 +568,9 @@ orc_x86_insn_output_opcode (OrcCompiler *p, OrcX86Insn *xinsn)
       output_opcode (p, xinsn->opcode, 4, xinsn->src, xinsn->dest, is_sse);
       break;
     case ORC_X86_INSN_TYPE_IMM8_REGM_MMX:
+      output_opcode (p, xinsn->opcode, xinsn->size, xinsn->src, xinsn->dest,
+          is_sse);
+      break;
     case ORC_X86_INSN_TYPE_MEM:
     case ORC_X86_INSN_TYPE_REGM_REG:
     case ORC_X86_INSN_TYPE_STACK: