intel/genxml: Remove W-tiling on gen12
authorJason Ekstrand <jason.ekstrand@intel.com>
Tue, 9 Jan 2018 00:27:45 +0000 (16:27 -0800)
committerJordan Justen <jordan.l.justen@intel.com>
Thu, 17 Oct 2019 21:47:22 +0000 (14:47 -0700)
It's no longer supported by the hardware

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
src/intel/genxml/gen12.xml
src/intel/isl/isl_surface_state.c

index 609535b..f890df9 100644 (file)
     <field name="Vertical Line Stride" start="11" end="11" type="uint"/>
     <field name="Tile Mode" start="12" end="13" type="uint">
       <value name="LINEAR" value="0"/>
-      <value name="WMAJOR" value="1"/>
       <value name="XMAJOR" value="2"/>
       <value name="YMAJOR" value="3"/>
     </field>
index b22657e..8a16fac 100644 (file)
@@ -72,7 +72,9 @@ static const uint8_t isl_to_gen_tiling[] = {
    [ISL_TILING_Y0]      = YMAJOR,
    [ISL_TILING_Yf]      = YMAJOR,
    [ISL_TILING_Ys]      = YMAJOR,
+#if GEN_GEN <= 11
    [ISL_TILING_W]       = WMAJOR,
+#endif
 };
 #endif
 
@@ -447,6 +449,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
 #endif
 
 #if GEN_GEN >= 8
+   assert(GEN_GEN < 12 || info->surf->tiling != ISL_TILING_W);
    s.TileMode = isl_to_gen_tiling[info->surf->tiling];
 #else
    s.TiledSurface = info->surf->tiling != ISL_TILING_LINEAR,