+++ /dev/null
-SHARED= ../shared-core
-
-SUBDIR = drm mach64 mga r128 radeon savage sis tdfx i915 #nouveau
-
-.include <bsd.obj.mk>
-
-depend: drm_pciids.h
-all: drm_pciids.h
-
-drm_pciids.h: ${SHARED}/drm_pciids.txt
- sh ../scripts/create_bsd_pci_lists.sh < ${SHARED}/drm_pciids.txt
+++ /dev/null
-/*-
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file ati_pcigart.c
- * Implementation of ATI's PCIGART, which provides an aperture in card virtual
- * address space with addresses remapped to system memory.
- */
-
-#include "drmP.h"
-
-#define ATI_PCIGART_PAGE_SIZE 4096 /* PCI GART page size */
-#define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
-
-#define ATI_PCIE_WRITE 0x4
-#define ATI_PCIE_READ 0x8
-
-static void
-drm_ati_alloc_pcigart_table_cb(void *arg, bus_dma_segment_t *segs,
- int nsegs, int error)
-{
- struct drm_dma_handle *dmah = arg;
-
- if (error != 0)
- return;
-
- KASSERT(nsegs == 1,
- ("drm_ati_alloc_pcigart_table_cb: bad dma segment count"));
-
- dmah->busaddr = segs[0].ds_addr;
-}
-
-static int
-drm_ati_alloc_pcigart_table(struct drm_device *dev,
- struct drm_ati_pcigart_info *gart_info)
-{
- struct drm_dma_handle *dmah;
- int flags, ret;
-
- dmah = malloc(sizeof(struct drm_dma_handle), DRM_MEM_DMA,
- M_ZERO | M_NOWAIT);
- if (dmah == NULL)
- return ENOMEM;
-
- DRM_UNLOCK();
- ret = bus_dma_tag_create(NULL, PAGE_SIZE, 0, /* tag, align, boundary */
- gart_info->table_mask, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
- NULL, NULL, /* filtfunc, filtfuncargs */
- gart_info->table_size, 1, /* maxsize, nsegs */
- gart_info->table_size, /* maxsegsize */
- BUS_DMA_ALLOCNOW, NULL, NULL, /* flags, lockfunc, lockfuncargs */
- &dmah->tag);
- if (ret != 0) {
- free(dmah, DRM_MEM_DMA);
- return ENOMEM;
- }
-
- flags = BUS_DMA_NOWAIT | BUS_DMA_ZERO;
- if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
- flags |= BUS_DMA_NOCACHE;
-
- ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, flags, &dmah->map);
- if (ret != 0) {
- bus_dma_tag_destroy(dmah->tag);
- free(dmah, DRM_MEM_DMA);
- return ENOMEM;
- }
- DRM_LOCK();
-
- ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr,
- gart_info->table_size, drm_ati_alloc_pcigart_table_cb, dmah, 0);
- if (ret != 0) {
- bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
- bus_dma_tag_destroy(dmah->tag);
- free(dmah, DRM_MEM_DMA);
- return ENOMEM;
- }
-
- dev->sg->dmah = dmah;
-
- return 0;
-}
-
-static void
-drm_ati_free_pcigart_table(struct drm_device *dev,
- struct drm_ati_pcigart_info *gart_info)
-{
- struct drm_dma_handle *dmah = dev->sg->dmah;
-
- bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
- bus_dma_tag_destroy(dmah->tag);
- free(dmah, DRM_MEM_DMA);
- dev->sg->dmah = NULL;
-}
-
-int
-drm_ati_pcigart_cleanup(struct drm_device *dev,
- struct drm_ati_pcigart_info *gart_info)
-{
- /* we need to support large memory configurations */
- if (dev->sg == NULL) {
- DRM_ERROR("no scatter/gather memory!\n");
- return 0;
- }
-
- if (gart_info->bus_addr) {
- if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
- gart_info->bus_addr = 0;
- if (dev->sg->dmah)
- drm_ati_free_pcigart_table(dev, gart_info);
- }
- }
-
- return 1;
-}
-
-int
-drm_ati_pcigart_init(struct drm_device *dev,
- struct drm_ati_pcigart_info *gart_info)
-{
- void *address = NULL;
- unsigned long pages;
- u32 *pci_gart, page_base;
- dma_addr_t bus_address = 0;
- dma_addr_t entry_addr;
- int i, j, ret = 0;
- int max_pages;
-
- /* we need to support large memory configurations */
- if (dev->sg == NULL) {
- DRM_ERROR("no scatter/gather memory!\n");
- goto done;
- }
-
- if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
- DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
-
- ret = drm_ati_alloc_pcigart_table(dev, gart_info);
- if (ret) {
- DRM_ERROR("cannot allocate PCI GART page!\n");
- goto done;
- }
-
- address = (void *)dev->sg->dmah->vaddr;
- bus_address = dev->sg->dmah->busaddr;
- } else {
- address = gart_info->addr;
- bus_address = gart_info->bus_addr;
- DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n",
- (unsigned int)bus_address, (unsigned long)address);
- }
-
- pci_gart = (u32 *) address;
-
- max_pages = (gart_info->table_size / sizeof(u32));
- pages = (dev->sg->pages <= max_pages)
- ? dev->sg->pages : max_pages;
-
- memset(pci_gart, 0, max_pages * sizeof(u32));
-
- KASSERT(PAGE_SIZE >= ATI_PCIGART_PAGE_SIZE, ("page size too small"));
-
- for (i = 0; i < pages; i++) {
- entry_addr = dev->sg->busaddr[i];
- for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
- page_base = (u32) entry_addr & ATI_PCIGART_PAGE_MASK;
- switch(gart_info->gart_reg_if) {
- case DRM_ATI_GART_IGP:
- page_base |=
- (upper_32_bits(entry_addr) & 0xff) << 4;
- page_base |= 0xc;
- break;
- case DRM_ATI_GART_PCIE:
- page_base >>= 8;
- page_base |=
- (upper_32_bits(entry_addr) & 0xff) << 24;
- page_base |= ATI_PCIE_READ | ATI_PCIE_WRITE;
- break;
- default:
- case DRM_ATI_GART_PCI:
- break;
- }
- *pci_gart = cpu_to_le32(page_base);
- pci_gart++;
- entry_addr += ATI_PCIGART_PAGE_SIZE;
- }
- }
-
- ret = 1;
-
- done:
- gart_info->addr = address;
- gart_info->bus_addr = bus_address;
- return ret;
-}
+++ /dev/null
-../shared-core/drm.h
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD = drm
-NO_MAN = YES
-SRCS = \
- ati_pcigart.c \
- drm_agpsupport.c \
- drm_auth.c \
- drm_bufs.c \
- drm_context.c \
- drm_dma.c \
- drm_drawable.c \
- drm_drv.c \
- drm_fops.c \
- drm_ioctl.c \
- drm_irq.c \
- drm_lock.c \
- drm_memory.c \
- drm_pci.c \
- drm_scatter.c \
- drm_sysctl.c \
- drm_vm.c
-
-SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS += ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-/* drmP.h -- Private header for Direct Rendering Manager -*- linux-c -*-
- * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com
- */
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#ifndef _DRM_P_H_
-#define _DRM_P_H_
-
-#if defined(_KERNEL) || defined(__KERNEL__)
-
-struct drm_device;
-struct drm_file;
-
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/stat.h>
-#if __FreeBSD_version >= 700000
-#include <sys/priv.h>
-#endif
-#include <sys/proc.h>
-#include <sys/lock.h>
-#include <sys/fcntl.h>
-#include <sys/uio.h>
-#include <sys/filio.h>
-#include <sys/sysctl.h>
-#include <sys/bus.h>
-#include <sys/signalvar.h>
-#include <sys/poll.h>
-#include <sys/tree.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_map.h>
-#include <vm/vm_param.h>
-#include <machine/param.h>
-#include <machine/pmap.h>
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <machine/specialreg.h>
-#include <machine/sysarch.h>
-#include <sys/endian.h>
-#include <sys/mman.h>
-#include <sys/rman.h>
-#include <sys/memrange.h>
-#if __FreeBSD_version >= 800004
-#include <dev/agp/agpvar.h>
-#else /* __FreeBSD_version >= 800004 */
-#include <pci/agpvar.h>
-#endif /* __FreeBSD_version >= 800004 */
-#include <sys/agpio.h>
-#include <sys/mutex.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-#include <sys/selinfo.h>
-#include <sys/bus.h>
-
-#include "drm.h"
-#include "drm_linux_list.h"
-#include "drm_atomic.h"
-#include "drm_internal.h"
-
-#include <opt_drm.h>
-#ifdef DRM_DEBUG
-#undef DRM_DEBUG
-#define DRM_DEBUG_DEFAULT_ON 1
-#endif /* DRM_DEBUG */
-
-#if defined(DRM_LINUX) && DRM_LINUX && !defined(__amd64__)
-#include <sys/file.h>
-#include <sys/proc.h>
-#include <machine/../linux/linux.h>
-#include <machine/../linux/linux_proto.h>
-#else
-/* Either it was defined when it shouldn't be (FreeBSD amd64) or it isn't
- * supported on this OS yet.
- */
-#undef DRM_LINUX
-#define DRM_LINUX 0
-#endif
-
-/* driver capabilities and requirements mask */
-#define DRIVER_USE_AGP 0x1
-#define DRIVER_REQUIRE_AGP 0x2
-#define DRIVER_USE_MTRR 0x4
-#define DRIVER_PCI_DMA 0x8
-#define DRIVER_SG 0x10
-#define DRIVER_HAVE_DMA 0x20
-#define DRIVER_HAVE_IRQ 0x40
-#define DRIVER_DMA_QUEUE 0x100
-
-
-#define DRM_HASH_SIZE 16 /* Size of key hash table */
-#define DRM_KERNEL_CONTEXT 0 /* Change drm_resctx if changed */
-#define DRM_RESERVED_CONTEXTS 1 /* Change drm_resctx if changed */
-
-MALLOC_DECLARE(DRM_MEM_DMA);
-MALLOC_DECLARE(DRM_MEM_SAREA);
-MALLOC_DECLARE(DRM_MEM_DRIVER);
-MALLOC_DECLARE(DRM_MEM_MAGIC);
-MALLOC_DECLARE(DRM_MEM_IOCTLS);
-MALLOC_DECLARE(DRM_MEM_MAPS);
-MALLOC_DECLARE(DRM_MEM_BUFS);
-MALLOC_DECLARE(DRM_MEM_SEGS);
-MALLOC_DECLARE(DRM_MEM_PAGES);
-MALLOC_DECLARE(DRM_MEM_FILES);
-MALLOC_DECLARE(DRM_MEM_QUEUES);
-MALLOC_DECLARE(DRM_MEM_CMDS);
-MALLOC_DECLARE(DRM_MEM_MAPPINGS);
-MALLOC_DECLARE(DRM_MEM_BUFLISTS);
-MALLOC_DECLARE(DRM_MEM_AGPLISTS);
-MALLOC_DECLARE(DRM_MEM_CTXBITMAP);
-MALLOC_DECLARE(DRM_MEM_SGLISTS);
-MALLOC_DECLARE(DRM_MEM_DRAWABLE);
-
-#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
-
- /* Internal types and structures */
-#define DRM_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
-#define DRM_MIN(a,b) ((a)<(b)?(a):(b))
-#define DRM_MAX(a,b) ((a)>(b)?(a):(b))
-
-#define DRM_IF_VERSION(maj, min) (maj << 16 | min)
-
-#define __OS_HAS_AGP 1
-
-#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
-#define DRM_DEV_UID 0
-#define DRM_DEV_GID 0
-
-#define wait_queue_head_t atomic_t
-#define DRM_WAKEUP(w) wakeup((void *)w)
-#define DRM_WAKEUP_INT(w) wakeup(w)
-#define DRM_INIT_WAITQUEUE(queue) do {(void)(queue);} while (0)
-
-#define DRM_CURPROC curthread
-#define DRM_STRUCTPROC struct thread
-#define DRM_SPINTYPE struct mtx
-#define DRM_SPININIT(l,name) mtx_init(l, name, NULL, MTX_DEF)
-#define DRM_SPINUNINIT(l) mtx_destroy(l)
-#define DRM_SPINLOCK(l) mtx_lock(l)
-#define DRM_SPINUNLOCK(u) mtx_unlock(u)
-#define DRM_SPINLOCK_IRQSAVE(l, irqflags) do { \
- mtx_lock(l); \
- (void)irqflags; \
-} while (0)
-#define DRM_SPINUNLOCK_IRQRESTORE(u, irqflags) mtx_unlock(u)
-#define DRM_SPINLOCK_ASSERT(l) mtx_assert(l, MA_OWNED)
-#define DRM_CURRENTPID curthread->td_proc->p_pid
-#define DRM_LOCK() mtx_lock(&dev->dev_lock)
-#define DRM_UNLOCK() mtx_unlock(&dev->dev_lock)
-#define DRM_SYSCTL_HANDLER_ARGS (SYSCTL_HANDLER_ARGS)
-
-#define DRM_IRQ_ARGS void *arg
-typedef void irqreturn_t;
-#define IRQ_HANDLED /* nothing */
-#define IRQ_NONE /* nothing */
-
-enum {
- DRM_IS_NOT_AGP,
- DRM_IS_AGP,
- DRM_MIGHT_BE_AGP
-};
-#define DRM_AGP_MEM struct agp_memory_info
-
-#define drm_get_device_from_kdev(_kdev) (_kdev->si_drv1)
-
-#define PAGE_ALIGN(addr) round_page(addr)
-/* DRM_SUSER returns true if the user is superuser */
-#if __FreeBSD_version >= 700000
-#define DRM_SUSER(p) (priv_check(p, PRIV_DRIVER) == 0)
-#else
-#define DRM_SUSER(p) (suser(p) == 0)
-#endif
-#define DRM_AGP_FIND_DEVICE() agp_find_device()
-#define DRM_MTRR_WC MDF_WRITECOMBINE
-#define jiffies ticks
-
-typedef unsigned long dma_addr_t;
-typedef u_int64_t u64;
-typedef u_int32_t u32;
-typedef u_int16_t u16;
-typedef u_int8_t u8;
-
-/* DRM_READMEMORYBARRIER() prevents reordering of reads.
- * DRM_WRITEMEMORYBARRIER() prevents reordering of writes.
- * DRM_MEMORYBARRIER() prevents reordering of reads and writes.
- */
-#if defined(__i386__)
-#define DRM_READMEMORYBARRIER() __asm __volatile( \
- "lock; addl $0,0(%%esp)" : : : "memory");
-#define DRM_WRITEMEMORYBARRIER() __asm __volatile("" : : : "memory");
-#define DRM_MEMORYBARRIER() __asm __volatile( \
- "lock; addl $0,0(%%esp)" : : : "memory");
-#elif defined(__alpha__)
-#define DRM_READMEMORYBARRIER() alpha_mb();
-#define DRM_WRITEMEMORYBARRIER() alpha_wmb();
-#define DRM_MEMORYBARRIER() alpha_mb();
-#elif defined(__amd64__)
-#define DRM_READMEMORYBARRIER() __asm __volatile( \
- "lock; addl $0,0(%%rsp)" : : : "memory");
-#define DRM_WRITEMEMORYBARRIER() __asm __volatile("" : : : "memory");
-#define DRM_MEMORYBARRIER() __asm __volatile( \
- "lock; addl $0,0(%%rsp)" : : : "memory");
-#endif
-
-#define DRM_READ8(map, offset) \
- *(volatile u_int8_t *)(((vm_offset_t)(map)->handle) + \
- (vm_offset_t)(offset))
-#define DRM_READ16(map, offset) \
- *(volatile u_int16_t *)(((vm_offset_t)(map)->handle) + \
- (vm_offset_t)(offset))
-#define DRM_READ32(map, offset) \
- *(volatile u_int32_t *)(((vm_offset_t)(map)->handle) + \
- (vm_offset_t)(offset))
-#define DRM_WRITE8(map, offset, val) \
- *(volatile u_int8_t *)(((vm_offset_t)(map)->handle) + \
- (vm_offset_t)(offset)) = val
-#define DRM_WRITE16(map, offset, val) \
- *(volatile u_int16_t *)(((vm_offset_t)(map)->handle) + \
- (vm_offset_t)(offset)) = val
-#define DRM_WRITE32(map, offset, val) \
- *(volatile u_int32_t *)(((vm_offset_t)(map)->handle) + \
- (vm_offset_t)(offset)) = val
-
-#define DRM_VERIFYAREA_READ( uaddr, size ) \
- (!useracc(__DECONST(caddr_t, uaddr), size, VM_PROT_READ))
-
-#define DRM_COPY_TO_USER(user, kern, size) \
- copyout(kern, user, size)
-#define DRM_COPY_FROM_USER(kern, user, size) \
- copyin(user, kern, size)
-#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \
- copyin(arg2, arg1, arg3)
-#define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3) \
- copyout(arg2, arg1, arg3)
-#define DRM_GET_USER_UNCHECKED(val, uaddr) \
- ((val) = fuword32(uaddr), 0)
-
-#define cpu_to_le32(x) htole32(x)
-#define le32_to_cpu(x) le32toh(x)
-
-#define DRM_HZ hz
-#define DRM_UDELAY(udelay) DELAY(udelay)
-#define DRM_TIME_SLICE (hz/20) /* Time slice for GLXContexts */
-
-#define DRM_GET_PRIV_SAREA(_dev, _ctx, _map) do { \
- (_map) = (_dev)->context_sareas[_ctx]; \
-} while(0)
-
-#define LOCK_TEST_WITH_RETURN(dev, file_priv) \
-do { \
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) || \
- dev->lock.file_priv != file_priv) { \
- DRM_ERROR("%s called without lock held\n", \
- __FUNCTION__); \
- return EINVAL; \
- } \
-} while (0)
-
-/* Returns -errno to shared code */
-#define DRM_WAIT_ON( ret, queue, timeout, condition ) \
-for ( ret = 0 ; !ret && !(condition) ; ) { \
- DRM_UNLOCK(); \
- mtx_lock(&dev->irq_lock); \
- if (!(condition)) \
- ret = -mtx_sleep(&(queue), &dev->irq_lock, \
- PCATCH, "drmwtq", (timeout)); \
- mtx_unlock(&dev->irq_lock); \
- DRM_LOCK(); \
-}
-
-#define DRM_ERROR(fmt, ...) \
- printf("error: [" DRM_NAME ":pid%d:%s] *ERROR* " fmt, \
- DRM_CURRENTPID, __func__ , ##__VA_ARGS__)
-
-#define DRM_INFO(fmt, ...) printf("info: [" DRM_NAME "] " fmt , ##__VA_ARGS__)
-
-#define DRM_DEBUG(fmt, ...) do { \
- if (drm_debug_flag) \
- printf("[" DRM_NAME ":pid%d:%s] " fmt, DRM_CURRENTPID, \
- __func__ , ##__VA_ARGS__); \
-} while (0)
-
-typedef struct drm_pci_id_list
-{
- int vendor;
- int device;
- long driver_private;
- char *name;
-} drm_pci_id_list_t;
-
-struct drm_msi_blacklist_entry
-{
- int vendor;
- int device;
-};
-
-#define DRM_AUTH 0x1
-#define DRM_MASTER 0x2
-#define DRM_ROOT_ONLY 0x4
-typedef struct drm_ioctl_desc {
- unsigned long cmd;
- int (*func)(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
- int flags;
-} drm_ioctl_desc_t;
-/**
- * Creates a driver or general drm_ioctl_desc array entry for the given
- * ioctl, for use by drm_ioctl().
- */
-#define DRM_IOCTL_DEF(ioctl, func, flags) \
- [DRM_IOCTL_NR(ioctl)] = {ioctl, func, flags}
-
-typedef struct drm_magic_entry {
- drm_magic_t magic;
- struct drm_file *priv;
- struct drm_magic_entry *next;
-} drm_magic_entry_t;
-
-typedef struct drm_magic_head {
- struct drm_magic_entry *head;
- struct drm_magic_entry *tail;
-} drm_magic_head_t;
-
-typedef struct drm_buf {
- int idx; /* Index into master buflist */
- int total; /* Buffer size */
- int order; /* log-base-2(total) */
- int used; /* Amount of buffer in use (for DMA) */
- unsigned long offset; /* Byte offset (used internally) */
- void *address; /* Address of buffer */
- unsigned long bus_address; /* Bus address of buffer */
- struct drm_buf *next; /* Kernel-only: used for free list */
- __volatile__ int pending; /* On hardware DMA queue */
- struct drm_file *file_priv; /* Unique identifier of holding process */
- int context; /* Kernel queue for this buffer */
- enum {
- DRM_LIST_NONE = 0,
- DRM_LIST_FREE = 1,
- DRM_LIST_WAIT = 2,
- DRM_LIST_PEND = 3,
- DRM_LIST_PRIO = 4,
- DRM_LIST_RECLAIM = 5
- } list; /* Which list we're on */
-
- int dev_priv_size; /* Size of buffer private stoarge */
- void *dev_private; /* Per-buffer private storage */
-} drm_buf_t;
-
-typedef struct drm_freelist {
- int initialized; /* Freelist in use */
- atomic_t count; /* Number of free buffers */
- drm_buf_t *next; /* End pointer */
-
- int low_mark; /* Low water mark */
- int high_mark; /* High water mark */
-} drm_freelist_t;
-
-typedef struct drm_dma_handle {
- void *vaddr;
- bus_addr_t busaddr;
- bus_dma_tag_t tag;
- bus_dmamap_t map;
-} drm_dma_handle_t;
-
-typedef struct drm_buf_entry {
- int buf_size;
- int buf_count;
- drm_buf_t *buflist;
- int seg_count;
- drm_dma_handle_t **seglist;
- int page_order;
-
- drm_freelist_t freelist;
-} drm_buf_entry_t;
-
-typedef TAILQ_HEAD(drm_file_list, drm_file) drm_file_list_t;
-struct drm_file {
- TAILQ_ENTRY(drm_file) link;
- struct drm_device *dev;
- int authenticated;
- int master;
- int minor;
- pid_t pid;
- uid_t uid;
- drm_magic_t magic;
- unsigned long ioctl_count;
- void *driver_priv;
-};
-
-typedef struct drm_lock_data {
- struct drm_hw_lock *hw_lock; /* Hardware lock */
- struct drm_file *file_priv; /* Unique identifier of holding process (NULL is kernel)*/
- int lock_queue; /* Queue of blocked processes */
- unsigned long lock_time; /* Time of last lock in jiffies */
-} drm_lock_data_t;
-
-/* This structure, in the struct drm_device, is always initialized while the
- * device
- * is open. dev->dma_lock protects the incrementing of dev->buf_use, which
- * when set marks that no further bufs may be allocated until device teardown
- * occurs (when the last open of the device has closed). The high/low
- * watermarks of bufs are only touched by the X Server, and thus not
- * concurrently accessed, so no locking is needed.
- */
-typedef struct drm_device_dma {
- drm_buf_entry_t bufs[DRM_MAX_ORDER+1];
- int buf_count;
- drm_buf_t **buflist; /* Vector of pointers info bufs */
- int seg_count;
- int page_count;
- unsigned long *pagelist;
- unsigned long byte_count;
- enum {
- _DRM_DMA_USE_AGP = 0x01,
- _DRM_DMA_USE_SG = 0x02
- } flags;
-} drm_device_dma_t;
-
-typedef struct drm_agp_mem {
- void *handle;
- unsigned long bound; /* address */
- int pages;
- struct drm_agp_mem *prev;
- struct drm_agp_mem *next;
-} drm_agp_mem_t;
-
-typedef struct drm_agp_head {
- device_t agpdev;
- struct agp_info info;
- const char *chipset;
- drm_agp_mem_t *memory;
- unsigned long mode;
- int enabled;
- int acquired;
- unsigned long base;
- int mtrr;
- int cant_use_aperture;
- unsigned long page_mask;
-} drm_agp_head_t;
-
-typedef struct drm_sg_mem {
- unsigned long handle;
- void *virtual;
- int pages;
- dma_addr_t *busaddr;
- struct drm_dma_handle *sg_dmah; /* Handle for sg_pages */
- struct drm_dma_handle *dmah; /* Handle to PCI memory */
- /* for ATI PCIGART table */
-} drm_sg_mem_t;
-
-typedef TAILQ_HEAD(drm_map_list, drm_local_map) drm_map_list_t;
-
-typedef struct drm_local_map {
- unsigned long offset; /* Physical address (0 for SAREA)*/
- unsigned long size; /* Physical size (bytes) */
- enum drm_map_type type; /* Type of memory mapped */
- enum drm_map_flags flags; /* Flags */
- void *handle; /* User-space: "Handle" to pass to mmap */
- /* Kernel-space: kernel-virtual address */
- int mtrr; /* Boolean: MTRR used */
- /* Private data */
- int rid; /* PCI resource ID for bus_space */
- struct resource *bsr;
- bus_space_tag_t bst;
- bus_space_handle_t bsh;
- drm_dma_handle_t *dmah;
- TAILQ_ENTRY(drm_local_map) link;
-} drm_local_map_t;
-
-TAILQ_HEAD(drm_vbl_sig_list, drm_vbl_sig);
-typedef struct drm_vbl_sig {
- TAILQ_ENTRY(drm_vbl_sig) link;
- unsigned int sequence;
- int signo;
- int pid;
-} drm_vbl_sig_t;
-
-struct drm_vblank_info {
- wait_queue_head_t queue; /* vblank wait queue */
- atomic_t count; /* number of VBLANK interrupts */
- /* (driver must alloc the right number of counters) */
- struct drm_vbl_sig_list sigs; /* signal list to send on VBLANK */
- atomic_t refcount; /* number of users of vblank interrupts */
- u32 last; /* protected by dev->vbl_lock, used */
- /* for wraparound handling */
- int enabled; /* so we don't call enable more than */
- /* once per disable */
- int inmodeset; /* Display driver is setting mode */
-};
-
-/* location of GART table */
-#define DRM_ATI_GART_MAIN 1
-#define DRM_ATI_GART_FB 2
-
-#define DRM_ATI_GART_PCI 1
-#define DRM_ATI_GART_PCIE 2
-#define DRM_ATI_GART_IGP 3
-
-struct drm_ati_pcigart_info {
- int gart_table_location;
- int gart_reg_if;
- void *addr;
- dma_addr_t bus_addr;
- dma_addr_t table_mask;
- dma_addr_t member_mask;
- struct drm_dma_handle *table_handle;
- drm_local_map_t mapping;
- int table_size;
-};
-
-#ifndef DMA_BIT_MASK
-#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : (1ULL<<(n)) - 1)
-#endif
-
-#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
-
-struct drm_driver_info {
- int (*load)(struct drm_device *, unsigned long flags);
- int (*firstopen)(struct drm_device *);
- int (*open)(struct drm_device *, struct drm_file *);
- void (*preclose)(struct drm_device *, struct drm_file *file_priv);
- void (*postclose)(struct drm_device *, struct drm_file *);
- void (*lastclose)(struct drm_device *);
- int (*unload)(struct drm_device *);
- void (*reclaim_buffers_locked)(struct drm_device *,
- struct drm_file *file_priv);
- int (*dma_ioctl)(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
- void (*dma_ready)(struct drm_device *);
- int (*dma_quiescent)(struct drm_device *);
- int (*dma_flush_block_and_flush)(struct drm_device *, int context,
- enum drm_lock_flags flags);
- int (*dma_flush_unblock)(struct drm_device *, int context,
- enum drm_lock_flags flags);
- int (*context_ctor)(struct drm_device *dev, int context);
- int (*context_dtor)(struct drm_device *dev, int context);
- int (*kernel_context_switch)(struct drm_device *dev, int old,
- int new);
- int (*kernel_context_switch_unlock)(struct drm_device *dev);
- void (*irq_preinstall)(struct drm_device *dev);
- int (*irq_postinstall)(struct drm_device *dev);
- void (*irq_uninstall)(struct drm_device *dev);
- void (*irq_handler)(DRM_IRQ_ARGS);
- u32 (*get_vblank_counter)(struct drm_device *dev, int crtc);
- int (*enable_vblank)(struct drm_device *dev, int crtc);
- void (*disable_vblank)(struct drm_device *dev, int crtc);
-
- drm_pci_id_list_t *id_entry; /* PCI ID, name, and chipset private */
-
- /**
- * Called by \c drm_device_is_agp. Typically used to determine if a
- * card is really attached to AGP or not.
- *
- * \param dev DRM device handle
- *
- * \returns
- * One of three values is returned depending on whether or not the
- * card is absolutely \b not AGP (return of 0), absolutely \b is AGP
- * (return of 1), or may or may not be AGP (return of 2).
- */
- int (*device_is_agp) (struct drm_device * dev);
-
- drm_ioctl_desc_t *ioctls;
- int max_ioctl;
-
- int buf_priv_size;
-
- int major;
- int minor;
- int patchlevel;
- const char *name; /* Simple driver name */
- const char *desc; /* Longer driver name */
- const char *date; /* Date of last major changes. */
-
- u32 driver_features;
-};
-
-/* Length for the array of resource pointers for drm_get_resource_*. */
-#define DRM_MAX_PCI_RESOURCE 6
-
-/**
- * DRM device functions structure
- */
-struct drm_device {
- struct drm_driver_info *driver;
- drm_pci_id_list_t *id_entry; /* PCI ID, name, and chipset private */
-
- u_int16_t pci_device; /* PCI device id */
- u_int16_t pci_vendor; /* PCI vendor id */
-
- char *unique; /* Unique identifier: e.g., busid */
- int unique_len; /* Length of unique field */
- device_t device; /* Device instance from newbus */
- struct cdev *devnode; /* Device number for mknod */
- int if_version; /* Highest interface version set */
-
- int flags; /* Flags to open(2) */
-
- /* Locks */
- struct mtx vbl_lock; /* protects vblank operations */
- struct mtx dma_lock; /* protects dev->dma */
- struct mtx irq_lock; /* protects irq condition checks */
- struct mtx dev_lock; /* protects everything else */
- DRM_SPINTYPE drw_lock;
-
- /* Usage Counters */
- int open_count; /* Outstanding files open */
- int buf_use; /* Buffers in use -- cannot alloc */
-
- /* Performance counters */
- unsigned long counters;
- enum drm_stat_type types[15];
- atomic_t counts[15];
-
- /* Authentication */
- drm_file_list_t files;
- drm_magic_head_t magiclist[DRM_HASH_SIZE];
-
- /* Linked list of mappable regions. Protected by dev_lock */
- drm_map_list_t maplist;
-
- drm_local_map_t **context_sareas;
- int max_context;
-
- drm_lock_data_t lock; /* Information on hardware lock */
-
- /* DMA queues (contexts) */
- drm_device_dma_t *dma; /* Optional pointer for DMA support */
-
- /* Context support */
- int irq; /* Interrupt used by board */
- int irq_enabled; /* True if the irq handler is enabled */
- int msi_enabled; /* MSI enabled */
- int irqrid; /* Interrupt used by board */
- struct resource *irqr; /* Resource for interrupt used by board */
- void *irqh; /* Handle from bus_setup_intr */
-
- /* Storage of resource pointers for drm_get_resource_* */
- struct resource *pcir[DRM_MAX_PCI_RESOURCE];
- int pcirid[DRM_MAX_PCI_RESOURCE];
-
- int pci_domain;
- int pci_bus;
- int pci_slot;
- int pci_func;
-
- atomic_t context_flag; /* Context swapping flag */
- int last_context; /* Last current context */
-
- int vblank_disable_allowed;
- atomic_t vbl_signal_pending; /* number of signals pending on all crtcs */
- struct callout vblank_disable_timer;
- u32 max_vblank_count; /* size of vblank counter register */
- struct drm_vblank_info *vblank; /* per crtc vblank info */
- int num_crtcs;
-
- struct sigio *buf_sigio; /* Processes waiting for SIGIO */
-
- /* Sysctl support */
- struct drm_sysctl_info *sysctl;
-
- drm_agp_head_t *agp;
- drm_sg_mem_t *sg; /* Scatter gather memory */
- atomic_t *ctx_bitmap;
- void *dev_private;
- unsigned int agp_buffer_token;
- drm_local_map_t *agp_buffer_map;
-
- struct unrhdr *drw_unrhdr;
- /* RB tree of drawable infos */
- RB_HEAD(drawable_tree, bsd_drm_drawable_info) drw_head;
-};
-
-static __inline__ int drm_core_check_feature(struct drm_device *dev,
- int feature)
-{
- return ((dev->driver->driver_features & feature) ? 1 : 0);
-}
-
-#if __OS_HAS_AGP
-static inline int drm_core_has_AGP(struct drm_device *dev)
-{
- return drm_core_check_feature(dev, DRIVER_USE_AGP);
-}
-#else
-#define drm_core_has_AGP(dev) (0)
-#endif
-
-extern int drm_debug_flag;
-
-/* Device setup support (drm_drv.c) */
-int drm_probe(device_t kdev, drm_pci_id_list_t *idlist);
-int drm_attach(device_t kdev, drm_pci_id_list_t *idlist);
-void drm_close(void *data);
-int drm_detach(device_t kdev);
-d_ioctl_t drm_ioctl;
-d_open_t drm_open;
-d_read_t drm_read;
-d_poll_t drm_poll;
-d_mmap_t drm_mmap;
-extern drm_local_map_t *drm_getsarea(struct drm_device *dev);
-
-/* File operations helpers (drm_fops.c) */
-extern int drm_open_helper(struct cdev *kdev, int flags, int fmt,
- DRM_STRUCTPROC *p,
- struct drm_device *dev);
-
-/* Memory management support (drm_memory.c) */
-void drm_mem_init(void);
-void drm_mem_uninit(void);
-void *drm_ioremap_wc(struct drm_device *dev, drm_local_map_t *map);
-void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map);
-void drm_ioremapfree(drm_local_map_t *map);
-int drm_mtrr_add(unsigned long offset, size_t size, int flags);
-int drm_mtrr_del(int handle, unsigned long offset, size_t size, int flags);
-
-int drm_context_switch(struct drm_device *dev, int old, int new);
-int drm_context_switch_complete(struct drm_device *dev, int new);
-
-int drm_ctxbitmap_init(struct drm_device *dev);
-void drm_ctxbitmap_cleanup(struct drm_device *dev);
-void drm_ctxbitmap_free(struct drm_device *dev, int ctx_handle);
-int drm_ctxbitmap_next(struct drm_device *dev);
-
-/* Locking IOCTL support (drm_lock.c) */
-int drm_lock_take(struct drm_lock_data *lock_data,
- unsigned int context);
-int drm_lock_transfer(struct drm_lock_data *lock_data,
- unsigned int context);
-int drm_lock_free(struct drm_lock_data *lock_data,
- unsigned int context);
-
-/* Buffer management support (drm_bufs.c) */
-unsigned long drm_get_resource_start(struct drm_device *dev,
- unsigned int resource);
-unsigned long drm_get_resource_len(struct drm_device *dev,
- unsigned int resource);
-void drm_rmmap(struct drm_device *dev, drm_local_map_t *map);
-int drm_order(unsigned long size);
-int drm_addmap(struct drm_device *dev, unsigned long offset,
- unsigned long size,
- enum drm_map_type type, enum drm_map_flags flags,
- drm_local_map_t **map_ptr);
-int drm_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *request);
-int drm_addbufs_sg(struct drm_device *dev, struct drm_buf_desc *request);
-int drm_addbufs_agp(struct drm_device *dev, struct drm_buf_desc *request);
-
-/* DMA support (drm_dma.c) */
-int drm_dma_setup(struct drm_device *dev);
-void drm_dma_takedown(struct drm_device *dev);
-void drm_free_buffer(struct drm_device *dev, drm_buf_t *buf);
-void drm_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv);
-#define drm_core_reclaim_buffers drm_reclaim_buffers
-
-/* IRQ support (drm_irq.c) */
-int drm_irq_install(struct drm_device *dev);
-int drm_irq_uninstall(struct drm_device *dev);
-irqreturn_t drm_irq_handler(DRM_IRQ_ARGS);
-void drm_driver_irq_preinstall(struct drm_device *dev);
-void drm_driver_irq_postinstall(struct drm_device *dev);
-void drm_driver_irq_uninstall(struct drm_device *dev);
-void drm_handle_vblank(struct drm_device *dev, int crtc);
-u32 drm_vblank_count(struct drm_device *dev, int crtc);
-int drm_vblank_get(struct drm_device *dev, int crtc);
-void drm_vblank_put(struct drm_device *dev, int crtc);
-void drm_vblank_cleanup(struct drm_device *dev);
-int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq);
-int drm_vblank_init(struct drm_device *dev, int num_crtcs);
-void drm_vbl_send_signals(struct drm_device *dev, int crtc);
-int drm_modeset_ctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/* AGP/PCI Express/GART support (drm_agpsupport.c) */
-int drm_device_is_agp(struct drm_device *dev);
-int drm_device_is_pcie(struct drm_device *dev);
-drm_agp_head_t *drm_agp_init(void);
-int drm_agp_acquire(struct drm_device *dev);
-int drm_agp_release(struct drm_device *dev);
-int drm_agp_info(struct drm_device * dev, struct drm_agp_info *info);
-int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode);
-void *drm_agp_allocate_memory(size_t pages, u32 type);
-int drm_agp_free_memory(void *handle);
-int drm_agp_bind_memory(void *handle, off_t start);
-int drm_agp_unbind_memory(void *handle);
-int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request);
-int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request);
-int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request);
-int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request);
-
-/* Scatter Gather Support (drm_scatter.c) */
-void drm_sg_cleanup(drm_sg_mem_t *entry);
-int drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather * request);
-
-/* sysctl support (drm_sysctl.h) */
-extern int drm_sysctl_init(struct drm_device *dev);
-extern int drm_sysctl_cleanup(struct drm_device *dev);
-
-/* ATI PCIGART support (ati_pcigart.c) */
-int drm_ati_pcigart_init(struct drm_device *dev,
- struct drm_ati_pcigart_info *gart_info);
-int drm_ati_pcigart_cleanup(struct drm_device *dev,
- struct drm_ati_pcigart_info *gart_info);
-
-/* Locking IOCTL support (drm_drv.c) */
-int drm_lock(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_unlock(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_version(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_setversion(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/* Misc. IOCTL support (drm_ioctl.c) */
-int drm_irq_by_busid(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_getunique(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_setunique(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_getmap(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_getclient(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_getstats(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_noop(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/* Context IOCTL support (drm_context.c) */
-int drm_resctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_addctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_modctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_getctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_switchctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_newctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_rmctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_setsareactx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_getsareactx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/* Drawable IOCTL support (drm_drawable.c) */
-int drm_adddraw(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_rmdraw(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_update_draw(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-struct drm_drawable_info *drm_get_drawable_info(struct drm_device *dev,
- int handle);
-
-/* Drawable support (drm_drawable.c) */
-void drm_drawable_free_all(struct drm_device *dev);
-
-/* Authentication IOCTL support (drm_auth.c) */
-int drm_getmagic(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_authmagic(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/* Buffer management support (drm_bufs.c) */
-int drm_addmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_rmmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_addbufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_infobufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_markbufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_freebufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_mapbufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/* DMA support (drm_dma.c) */
-int drm_dma(struct drm_device *dev, void *data, struct drm_file *file_priv);
-
-/* IRQ support (drm_irq.c) */
-int drm_control(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_wait_vblank(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/* AGP/GART support (drm_agpsupport.c) */
-int drm_agp_acquire_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_agp_release_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_agp_enable_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_agp_info_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_agp_alloc_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_agp_free_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/* Scatter Gather Support (drm_scatter.c) */
-int drm_sg_alloc_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_sg_free(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/* consistent PCI memory functions (drm_pci.c) */
-drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size,
- size_t align, dma_addr_t maxaddr);
-void drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah);
-
-/* Inline replacements for drm_alloc and friends */
-static __inline__ void *
-drm_alloc(size_t size, struct malloc_type *area)
-{
- return malloc(size, area, M_NOWAIT);
-}
-
-static __inline__ void *
-drm_calloc(size_t nmemb, size_t size, struct malloc_type *area)
-{
- return malloc(size * nmemb, area, M_NOWAIT | M_ZERO);
-}
-
-static __inline__ void *
-drm_realloc(void *oldpt, size_t oldsize, size_t size,
- struct malloc_type *area)
-{
- return reallocf(oldpt, size, area, M_NOWAIT);
-}
-
-static __inline__ void
-drm_free(void *pt, size_t size, struct malloc_type *area)
-{
- free(pt, area);
-}
-
-/* Inline replacements for DRM_IOREMAP macros */
-static __inline__ void
-drm_core_ioremap_wc(struct drm_local_map *map, struct drm_device *dev)
-{
- map->handle = drm_ioremap_wc(dev, map);
-}
-static __inline__ void
-drm_core_ioremap(struct drm_local_map *map, struct drm_device *dev)
-{
- map->handle = drm_ioremap(dev, map);
-}
-static __inline__ void
-drm_core_ioremapfree(struct drm_local_map *map, struct drm_device *dev)
-{
- if ( map->handle && map->size )
- drm_ioremapfree(map);
-}
-
-static __inline__ struct drm_local_map *
-drm_core_findmap(struct drm_device *dev, unsigned long offset)
-{
- drm_local_map_t *map;
-
- DRM_SPINLOCK_ASSERT(&dev->dev_lock);
- TAILQ_FOREACH(map, &dev->maplist, link) {
- if (map->offset == offset)
- return map;
- }
- return NULL;
-}
-
-static __inline__ void drm_core_dropmap(struct drm_map *map)
-{
-}
-
-#endif /* __KERNEL__ */
-#endif /* _DRM_P_H_ */
+++ /dev/null
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Author:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_agpsupport.c
- * Support code for tying the kernel AGP support to DRM drivers and
- * the DRM's AGP ioctls.
- */
-
-#include "drmP.h"
-
-#if __FreeBSD_version >= 800004
-#include <dev/agp/agpreg.h>
-#else /* __FreeBSD_version >= 800004 */
-#include <pci/agpreg.h>
-#endif /* __FreeBSD_version >= 800004 */
-#include <dev/pci/pcireg.h>
-
-/* Returns 1 if AGP or 0 if not. */
-static int
-drm_device_find_capability(struct drm_device *dev, int cap)
-{
-#if __FreeBSD_version >= 602102
-
- return (pci_find_extcap(dev->device, cap, NULL) == 0);
-#else
- /* Code taken from agp.c. IWBNI that was a public interface. */
- u_int32_t status;
- u_int8_t ptr, next;
-
- /*
- * Check the CAP_LIST bit of the PCI status register first.
- */
- status = pci_read_config(dev->device, PCIR_STATUS, 2);
- if (!(status & 0x10))
- return 0;
-
- /*
- * Traverse the capabilities list.
- */
- for (ptr = pci_read_config(dev->device, AGP_CAPPTR, 1);
- ptr != 0;
- ptr = next) {
- u_int32_t capid = pci_read_config(dev->device, ptr, 4);
- next = AGP_CAPID_GET_NEXT_PTR(capid);
-
- /*
- * If this capability entry ID is cap, then we are done.
- */
- if (AGP_CAPID_GET_CAP_ID(capid) == cap)
- return 1;
- }
-
- return 0;
-#endif
-}
-
-int drm_device_is_agp(struct drm_device *dev)
-{
- if (dev->driver->device_is_agp != NULL) {
- int ret;
-
- /* device_is_agp returns a tristate, 0 = not AGP, 1 = definitely
- * AGP, 2 = fall back to PCI capability
- */
- ret = (*dev->driver->device_is_agp)(dev);
- if (ret != DRM_MIGHT_BE_AGP)
- return ret;
- }
-
- return (drm_device_find_capability(dev, PCIY_AGP));
-}
-
-int drm_device_is_pcie(struct drm_device *dev)
-{
- return (drm_device_find_capability(dev, PCIY_EXPRESS));
-}
-
-int drm_agp_info(struct drm_device * dev, struct drm_agp_info *info)
-{
- struct agp_info *kern;
-
- if (!dev->agp || !dev->agp->acquired)
- return EINVAL;
-
- kern = &dev->agp->info;
- agp_get_info(dev->agp->agpdev, kern);
- info->agp_version_major = 1;
- info->agp_version_minor = 0;
- info->mode = kern->ai_mode;
- info->aperture_base = kern->ai_aperture_base;
- info->aperture_size = kern->ai_aperture_size;
- info->memory_allowed = kern->ai_memory_allowed;
- info->memory_used = kern->ai_memory_used;
- info->id_vendor = kern->ai_devid & 0xffff;
- info->id_device = kern->ai_devid >> 16;
-
- return 0;
-}
-
-int drm_agp_info_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- int err;
- struct drm_agp_info info;
-
- err = drm_agp_info(dev, &info);
- if (err != 0)
- return err;
-
- *(struct drm_agp_info *) data = info;
- return 0;
-}
-
-int drm_agp_acquire_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
-
- return drm_agp_acquire(dev);
-}
-
-int drm_agp_acquire(struct drm_device *dev)
-{
- int retcode;
-
- if (!dev->agp || dev->agp->acquired)
- return EINVAL;
-
- retcode = agp_acquire(dev->agp->agpdev);
- if (retcode)
- return retcode;
-
- dev->agp->acquired = 1;
- return 0;
-}
-
-int drm_agp_release_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
-
- return drm_agp_release(dev);
-}
-
-int drm_agp_release(struct drm_device * dev)
-{
- if (!dev->agp || !dev->agp->acquired)
- return EINVAL;
- agp_release(dev->agp->agpdev);
- dev->agp->acquired = 0;
- return 0;
-}
-
-int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode)
-{
-
- if (!dev->agp || !dev->agp->acquired)
- return EINVAL;
-
- dev->agp->mode = mode.mode;
- agp_enable(dev->agp->agpdev, mode.mode);
- dev->agp->enabled = 1;
- return 0;
-}
-
-int drm_agp_enable_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_mode mode;
-
- mode = *(struct drm_agp_mode *) data;
-
- return drm_agp_enable(dev, mode);
-}
-
-int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request)
-{
- drm_agp_mem_t *entry;
- void *handle;
- unsigned long pages;
- u_int32_t type;
- struct agp_memory_info info;
-
- if (!dev->agp || !dev->agp->acquired)
- return EINVAL;
-
- entry = malloc(sizeof(*entry), DRM_MEM_AGPLISTS, M_NOWAIT | M_ZERO);
- if (entry == NULL)
- return ENOMEM;
-
- pages = (request->size + PAGE_SIZE - 1) / PAGE_SIZE;
- type = (u_int32_t) request->type;
-
- DRM_UNLOCK();
- handle = drm_agp_allocate_memory(pages, type);
- DRM_LOCK();
- if (handle == NULL) {
- free(entry, DRM_MEM_AGPLISTS);
- return ENOMEM;
- }
-
- entry->handle = handle;
- entry->bound = 0;
- entry->pages = pages;
- entry->prev = NULL;
- entry->next = dev->agp->memory;
- if (dev->agp->memory)
- dev->agp->memory->prev = entry;
- dev->agp->memory = entry;
-
- agp_memory_info(dev->agp->agpdev, entry->handle, &info);
-
- request->handle = (unsigned long) entry->handle;
- request->physical = info.ami_physical;
-
- return 0;
-}
-
-int drm_agp_alloc_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_buffer request;
- int retcode;
-
- request = *(struct drm_agp_buffer *) data;
-
- DRM_LOCK();
- retcode = drm_agp_alloc(dev, &request);
- DRM_UNLOCK();
-
- *(struct drm_agp_buffer *) data = request;
-
- return retcode;
-}
-
-static drm_agp_mem_t * drm_agp_lookup_entry(struct drm_device *dev,
- void *handle)
-{
- drm_agp_mem_t *entry;
-
- for (entry = dev->agp->memory; entry; entry = entry->next) {
- if (entry->handle == handle) return entry;
- }
- return NULL;
-}
-
-int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request)
-{
- drm_agp_mem_t *entry;
- int retcode;
-
- if (!dev->agp || !dev->agp->acquired)
- return EINVAL;
-
- entry = drm_agp_lookup_entry(dev, (void *)request->handle);
- if (entry == NULL || !entry->bound)
- return EINVAL;
-
- DRM_UNLOCK();
- retcode = drm_agp_unbind_memory(entry->handle);
- DRM_LOCK();
-
- if (retcode == 0)
- entry->bound = 0;
-
- return retcode;
-}
-
-int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_binding request;
- int retcode;
-
- request = *(struct drm_agp_binding *) data;
-
- DRM_LOCK();
- retcode = drm_agp_unbind(dev, &request);
- DRM_UNLOCK();
-
- return retcode;
-}
-
-int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request)
-{
- drm_agp_mem_t *entry;
- int retcode;
- int page;
-
- if (!dev->agp || !dev->agp->acquired)
- return EINVAL;
-
- DRM_DEBUG("agp_bind, page_size=%x\n", PAGE_SIZE);
-
- entry = drm_agp_lookup_entry(dev, (void *)request->handle);
- if (entry == NULL || entry->bound)
- return EINVAL;
-
- page = (request->offset + PAGE_SIZE - 1) / PAGE_SIZE;
-
- DRM_UNLOCK();
- retcode = drm_agp_bind_memory(entry->handle, page);
- DRM_LOCK();
- if (retcode == 0)
- entry->bound = dev->agp->base + (page << PAGE_SHIFT);
-
- return retcode;
-}
-
-int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_binding request;
- int retcode;
-
- request = *(struct drm_agp_binding *) data;
-
- DRM_LOCK();
- retcode = drm_agp_bind(dev, &request);
- DRM_UNLOCK();
-
- return retcode;
-}
-
-int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request)
-{
- drm_agp_mem_t *entry;
-
- if (!dev->agp || !dev->agp->acquired)
- return EINVAL;
-
- entry = drm_agp_lookup_entry(dev, (void*)request->handle);
- if (entry == NULL)
- return EINVAL;
-
- if (entry->prev)
- entry->prev->next = entry->next;
- else
- dev->agp->memory = entry->next;
- if (entry->next)
- entry->next->prev = entry->prev;
-
- DRM_UNLOCK();
- if (entry->bound)
- drm_agp_unbind_memory(entry->handle);
- drm_agp_free_memory(entry->handle);
- DRM_LOCK();
-
- free(entry, DRM_MEM_AGPLISTS);
-
- return 0;
-
-}
-
-int drm_agp_free_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_buffer request;
- int retcode;
-
- request = *(struct drm_agp_buffer *) data;
-
- DRM_LOCK();
- retcode = drm_agp_free(dev, &request);
- DRM_UNLOCK();
-
- return retcode;
-}
-
-drm_agp_head_t *drm_agp_init(void)
-{
- device_t agpdev;
- drm_agp_head_t *head = NULL;
- int agp_available = 1;
-
- agpdev = DRM_AGP_FIND_DEVICE();
- if (!agpdev)
- agp_available = 0;
-
- DRM_DEBUG("agp_available = %d\n", agp_available);
-
- if (agp_available) {
- head = malloc(sizeof(*head), DRM_MEM_AGPLISTS,
- M_NOWAIT | M_ZERO);
- if (head == NULL)
- return NULL;
- head->agpdev = agpdev;
- agp_get_info(agpdev, &head->info);
- head->base = head->info.ai_aperture_base;
- head->memory = NULL;
- DRM_INFO("AGP at 0x%08lx %dMB\n",
- (long)head->info.ai_aperture_base,
- (int)(head->info.ai_aperture_size >> 20));
- }
- return head;
-}
-
-void *drm_agp_allocate_memory(size_t pages, u32 type)
-{
- device_t agpdev;
-
- agpdev = DRM_AGP_FIND_DEVICE();
- if (!agpdev)
- return NULL;
-
- return agp_alloc_memory(agpdev, type, pages << AGP_PAGE_SHIFT);
-}
-
-int drm_agp_free_memory(void *handle)
-{
- device_t agpdev;
-
- agpdev = DRM_AGP_FIND_DEVICE();
- if (!agpdev || !handle)
- return 0;
-
- agp_free_memory(agpdev, handle);
- return 1;
-}
-
-int drm_agp_bind_memory(void *handle, off_t start)
-{
- device_t agpdev;
-
- agpdev = DRM_AGP_FIND_DEVICE();
- if (!agpdev || !handle)
- return EINVAL;
-
- return agp_bind_memory(agpdev, handle, start * PAGE_SIZE);
-}
-
-int drm_agp_unbind_memory(void *handle)
-{
- device_t agpdev;
-
- agpdev = DRM_AGP_FIND_DEVICE();
- if (!agpdev || !handle)
- return EINVAL;
-
- return agp_unbind_memory(agpdev, handle);
-}
+++ /dev/null
-/**
- * \file drm_atomic.h
- * Atomic operations used in the DRM which may or may not be provided by the OS.
- *
- * \author Eric Anholt <anholt@FreeBSD.org>
- */
-
-/*-
- * Copyright 2004 Eric Anholt
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/* Many of these implementations are rather fake, but good enough. */
-
-typedef u_int32_t atomic_t;
-
-#define atomic_set(p, v) (*(p) = (v))
-#define atomic_read(p) (*(p))
-#define atomic_inc(p) atomic_add_int(p, 1)
-#define atomic_dec(p) atomic_subtract_int(p, 1)
-#define atomic_add(n, p) atomic_add_int(p, n)
-#define atomic_sub(n, p) atomic_subtract_int(p, n)
-
-static __inline atomic_t
-test_and_set_bit(int b, volatile void *p)
-{
- int s = splhigh();
- unsigned int m = 1<<b;
- unsigned int r = *(volatile int *)p & m;
- *(volatile int *)p |= m;
- splx(s);
- return r;
-}
-
-static __inline void
-clear_bit(int b, volatile void *p)
-{
- atomic_clear_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
-}
-
-static __inline void
-set_bit(int b, volatile void *p)
-{
- atomic_set_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
-}
-
-static __inline int
-test_bit(int b, volatile void *p)
-{
- return ((volatile int *)p)[b >> 5] & (1 << (b & 0x1f));
-}
-
-static __inline int
-find_first_zero_bit(volatile void *p, int max)
-{
- int b;
- volatile int *ptr = (volatile int *)p;
-
- for (b = 0; b < max; b += 32) {
- if (ptr[b >> 5] != ~0) {
- for (;;) {
- if ((ptr[b >> 5] & (1 << (b & 0x1f))) == 0)
- return b;
- b++;
- }
- }
- }
- return max;
-}
+++ /dev/null
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_auth.c
- * Implementation of the get/authmagic ioctls implementing the authentication
- * scheme between the master and clients.
- */
-
-#include "drmP.h"
-
-static int drm_hash_magic(drm_magic_t magic)
-{
- return magic & (DRM_HASH_SIZE-1);
-}
-
-/**
- * Returns the file private associated with the given magic number.
- */
-static struct drm_file *drm_find_file(struct drm_device *dev, drm_magic_t magic)
-{
- drm_magic_entry_t *pt;
- int hash = drm_hash_magic(magic);
-
- DRM_SPINLOCK_ASSERT(&dev->dev_lock);
-
- for (pt = dev->magiclist[hash].head; pt; pt = pt->next) {
- if (pt->magic == magic) {
- return pt->priv;
- }
- }
-
- return NULL;
-}
-
-/**
- * Inserts the given magic number into the hash table of used magic number
- * lists.
- */
-static int drm_add_magic(struct drm_device *dev, struct drm_file *priv,
- drm_magic_t magic)
-{
- int hash;
- drm_magic_entry_t *entry;
-
- DRM_DEBUG("%d\n", magic);
-
- DRM_SPINLOCK_ASSERT(&dev->dev_lock);
-
- hash = drm_hash_magic(magic);
- entry = malloc(sizeof(*entry), DRM_MEM_MAGIC, M_ZERO | M_NOWAIT);
- if (!entry)
- return ENOMEM;
- entry->magic = magic;
- entry->priv = priv;
- entry->next = NULL;
-
- if (dev->magiclist[hash].tail) {
- dev->magiclist[hash].tail->next = entry;
- dev->magiclist[hash].tail = entry;
- } else {
- dev->magiclist[hash].head = entry;
- dev->magiclist[hash].tail = entry;
- }
-
- return 0;
-}
-
-/**
- * Removes the given magic number from the hash table of used magic number
- * lists.
- */
-static int drm_remove_magic(struct drm_device *dev, drm_magic_t magic)
-{
- drm_magic_entry_t *prev = NULL;
- drm_magic_entry_t *pt;
- int hash;
-
- DRM_SPINLOCK_ASSERT(&dev->dev_lock);
-
- DRM_DEBUG("%d\n", magic);
- hash = drm_hash_magic(magic);
-
- for (pt = dev->magiclist[hash].head; pt; prev = pt, pt = pt->next) {
- if (pt->magic == magic) {
- if (dev->magiclist[hash].head == pt) {
- dev->magiclist[hash].head = pt->next;
- }
- if (dev->magiclist[hash].tail == pt) {
- dev->magiclist[hash].tail = prev;
- }
- if (prev) {
- prev->next = pt->next;
- }
- free(pt, DRM_MEM_MAGIC);
- return 0;
- }
- }
-
- return EINVAL;
-}
-
-/**
- * Called by the client, this returns a unique magic number to be authorized
- * by the master.
- *
- * The master may use its own knowledge of the client (such as the X
- * connection that the magic is passed over) to determine if the magic number
- * should be authenticated.
- */
-int drm_getmagic(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- static drm_magic_t sequence = 0;
- struct drm_auth *auth = data;
-
- /* Find unique magic */
- if (file_priv->magic) {
- auth->magic = file_priv->magic;
- } else {
- DRM_LOCK();
- do {
- int old = sequence;
-
- auth->magic = old+1;
-
- if (!atomic_cmpset_int(&sequence, old, auth->magic))
- continue;
- } while (drm_find_file(dev, auth->magic));
- file_priv->magic = auth->magic;
- drm_add_magic(dev, file_priv, auth->magic);
- DRM_UNLOCK();
- }
-
- DRM_DEBUG("%u\n", auth->magic);
-
- return 0;
-}
-
-/**
- * Marks the client associated with the given magic number as authenticated.
- */
-int drm_authmagic(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_auth *auth = data;
- struct drm_file *priv;
-
- DRM_DEBUG("%u\n", auth->magic);
-
- DRM_LOCK();
- priv = drm_find_file(dev, auth->magic);
- if (priv != NULL) {
- priv->authenticated = 1;
- drm_remove_magic(dev, auth->magic);
- DRM_UNLOCK();
- return 0;
- } else {
- DRM_UNLOCK();
- return EINVAL;
- }
-}
+++ /dev/null
-/*-
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_bufs.c
- * Implementation of the ioctls for setup of DRM mappings and DMA buffers.
- */
-
-#include "dev/pci/pcireg.h"
-
-#include "drmP.h"
-
-/* Allocation of PCI memory resources (framebuffer, registers, etc.) for
- * drm_get_resource_*. Note that they are not RF_ACTIVE, so there's no virtual
- * address for accessing them. Cleaned up at unload.
- */
-static int drm_alloc_resource(struct drm_device *dev, int resource)
-{
- if (resource >= DRM_MAX_PCI_RESOURCE) {
- DRM_ERROR("Resource %d too large\n", resource);
- return 1;
- }
-
- DRM_UNLOCK();
- if (dev->pcir[resource] != NULL) {
- DRM_LOCK();
- return 0;
- }
-
- dev->pcirid[resource] = PCIR_BAR(resource);
- dev->pcir[resource] = bus_alloc_resource_any(dev->device,
- SYS_RES_MEMORY, &dev->pcirid[resource], RF_SHAREABLE);
- DRM_LOCK();
-
- if (dev->pcir[resource] == NULL) {
- DRM_ERROR("Couldn't find resource 0x%x\n", resource);
- return 1;
- }
-
- return 0;
-}
-
-unsigned long drm_get_resource_start(struct drm_device *dev,
- unsigned int resource)
-{
- if (drm_alloc_resource(dev, resource) != 0)
- return 0;
-
- return rman_get_start(dev->pcir[resource]);
-}
-
-unsigned long drm_get_resource_len(struct drm_device *dev,
- unsigned int resource)
-{
- if (drm_alloc_resource(dev, resource) != 0)
- return 0;
-
- return rman_get_size(dev->pcir[resource]);
-}
-
-int drm_addmap(struct drm_device * dev, unsigned long offset,
- unsigned long size,
- enum drm_map_type type, enum drm_map_flags flags, drm_local_map_t **map_ptr)
-{
- drm_local_map_t *map;
- int align;
- /*drm_agp_mem_t *entry;
- int valid;*/
-
- /* Only allow shared memory to be removable since we only keep enough
- * book keeping information about shared memory to allow for removal
- * when processes fork.
- */
- if ((flags & _DRM_REMOVABLE) && type != _DRM_SHM) {
- DRM_ERROR("Requested removable map for non-DRM_SHM\n");
- return EINVAL;
- }
- if ((offset & PAGE_MASK) || (size & PAGE_MASK)) {
- DRM_ERROR("offset/size not page aligned: 0x%lx/0x%lx\n",
- offset, size);
- return EINVAL;
- }
- if (offset + size < offset) {
- DRM_ERROR("offset and size wrap around: 0x%lx/0x%lx\n",
- offset, size);
- return EINVAL;
- }
-
- DRM_DEBUG("offset = 0x%08lx, size = 0x%08lx, type = %d\n", offset,
- size, type);
-
- /* Check if this is just another version of a kernel-allocated map, and
- * just hand that back if so.
- */
- if (type == _DRM_REGISTERS || type == _DRM_FRAME_BUFFER ||
- type == _DRM_SHM) {
- TAILQ_FOREACH(map, &dev->maplist, link) {
- if (map->type == type && (map->offset == offset ||
- (map->type == _DRM_SHM &&
- map->flags == _DRM_CONTAINS_LOCK))) {
- map->size = size;
- DRM_DEBUG("Found kernel map %d\n", type);
- goto done;
- }
- }
- }
- DRM_UNLOCK();
-
- /* Allocate a new map structure, fill it in, and do any type-specific
- * initialization necessary.
- */
- map = malloc(sizeof(*map), DRM_MEM_MAPS, M_ZERO | M_NOWAIT);
- if (!map) {
- DRM_LOCK();
- return ENOMEM;
- }
-
- map->offset = offset;
- map->size = size;
- map->type = type;
- map->flags = flags;
-
- switch (map->type) {
- case _DRM_REGISTERS:
- map->handle = drm_ioremap(dev, map);
- if (!(map->flags & _DRM_WRITE_COMBINING))
- break;
- /* FALLTHROUGH */
- case _DRM_FRAME_BUFFER:
- if (drm_mtrr_add(map->offset, map->size, DRM_MTRR_WC) == 0)
- map->mtrr = 1;
- break;
- case _DRM_SHM:
- map->handle = malloc(map->size, DRM_MEM_MAPS, M_NOWAIT);
- DRM_DEBUG("%lu %d %p\n",
- map->size, drm_order(map->size), map->handle);
- if (!map->handle) {
- free(map, DRM_MEM_MAPS);
- DRM_LOCK();
- return ENOMEM;
- }
- map->offset = (unsigned long)map->handle;
- if (map->flags & _DRM_CONTAINS_LOCK) {
- /* Prevent a 2nd X Server from creating a 2nd lock */
- DRM_LOCK();
- if (dev->lock.hw_lock != NULL) {
- DRM_UNLOCK();
- free(map->handle, DRM_MEM_MAPS);
- free(map, DRM_MEM_MAPS);
- return EBUSY;
- }
- dev->lock.hw_lock = map->handle; /* Pointer to lock */
- DRM_UNLOCK();
- }
- break;
- case _DRM_AGP:
- /*valid = 0;*/
- /* In some cases (i810 driver), user space may have already
- * added the AGP base itself, because dev->agp->base previously
- * only got set during AGP enable. So, only add the base
- * address if the map's offset isn't already within the
- * aperture.
- */
- if (map->offset < dev->agp->base ||
- map->offset > dev->agp->base +
- dev->agp->info.ai_aperture_size - 1) {
- map->offset += dev->agp->base;
- }
- map->mtrr = dev->agp->mtrr; /* for getmap */
- /*for (entry = dev->agp->memory; entry; entry = entry->next) {
- if ((map->offset >= entry->bound) &&
- (map->offset + map->size <=
- entry->bound + entry->pages * PAGE_SIZE)) {
- valid = 1;
- break;
- }
- }
- if (!valid) {
- free(map, DRM_MEM_MAPS);
- DRM_LOCK();
- return EACCES;
- }*/
- break;
- case _DRM_SCATTER_GATHER:
- if (!dev->sg) {
- free(map, DRM_MEM_MAPS);
- DRM_LOCK();
- return EINVAL;
- }
- map->offset += dev->sg->handle;
- break;
- case _DRM_CONSISTENT:
- /* Unfortunately, we don't get any alignment specification from
- * the caller, so we have to guess. drm_pci_alloc requires
- * a power-of-two alignment, so try to align the bus address of
- * the map to it size if possible, otherwise just assume
- * PAGE_SIZE alignment.
- */
- align = map->size;
- if ((align & (align - 1)) != 0)
- align = PAGE_SIZE;
- map->dmah = drm_pci_alloc(dev, map->size, align, 0xfffffffful);
- if (map->dmah == NULL) {
- free(map, DRM_MEM_MAPS);
- DRM_LOCK();
- return ENOMEM;
- }
- map->handle = map->dmah->vaddr;
- map->offset = map->dmah->busaddr;
- break;
- default:
- DRM_ERROR("Bad map type %d\n", map->type);
- free(map, DRM_MEM_MAPS);
- DRM_LOCK();
- return EINVAL;
- }
-
- DRM_LOCK();
- TAILQ_INSERT_TAIL(&dev->maplist, map, link);
-
-done:
- /* Jumped to, with lock held, when a kernel map is found. */
-
- DRM_DEBUG("Added map %d 0x%lx/0x%lx\n", map->type, map->offset,
- map->size);
-
- *map_ptr = map;
-
- return 0;
-}
-
-int drm_addmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_map *request = data;
- drm_local_map_t *map;
- int err;
-
- if (!(dev->flags & (FREAD|FWRITE)))
- return EACCES; /* Require read/write */
-
- if (!DRM_SUSER(DRM_CURPROC) && request->type != _DRM_AGP)
- return EACCES;
-
- DRM_LOCK();
- err = drm_addmap(dev, request->offset, request->size, request->type,
- request->flags, &map);
- DRM_UNLOCK();
- if (err != 0)
- return err;
-
- request->offset = map->offset;
- request->size = map->size;
- request->type = map->type;
- request->flags = map->flags;
- request->mtrr = map->mtrr;
- request->handle = map->handle;
-
- if (request->type != _DRM_SHM) {
- request->handle = (void *)request->offset;
- }
-
- return 0;
-}
-
-void drm_rmmap(struct drm_device *dev, drm_local_map_t *map)
-{
- DRM_SPINLOCK_ASSERT(&dev->dev_lock);
-
- TAILQ_REMOVE(&dev->maplist, map, link);
-
- switch (map->type) {
- case _DRM_REGISTERS:
- if (map->bsr == NULL)
- drm_ioremapfree(map);
- /* FALLTHROUGH */
- case _DRM_FRAME_BUFFER:
- if (map->mtrr) {
- int __unused retcode;
-
- retcode = drm_mtrr_del(0, map->offset, map->size,
- DRM_MTRR_WC);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
- break;
- case _DRM_SHM:
- free(map->handle, DRM_MEM_MAPS);
- break;
- case _DRM_AGP:
- case _DRM_SCATTER_GATHER:
- break;
- case _DRM_CONSISTENT:
- drm_pci_free(dev, map->dmah);
- break;
- default:
- DRM_ERROR("Bad map type %d\n", map->type);
- break;
- }
-
- if (map->bsr != NULL) {
- bus_release_resource(dev->device, SYS_RES_MEMORY, map->rid,
- map->bsr);
- }
-
- free(map, DRM_MEM_MAPS);
-}
-
-/* Remove a map private from list and deallocate resources if the mapping
- * isn't in use.
- */
-
-int drm_rmmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_local_map_t *map;
- struct drm_map *request = data;
-
- DRM_LOCK();
- TAILQ_FOREACH(map, &dev->maplist, link) {
- if (map->handle == request->handle &&
- map->flags & _DRM_REMOVABLE)
- break;
- }
-
- /* No match found. */
- if (map == NULL) {
- DRM_UNLOCK();
- return EINVAL;
- }
-
- drm_rmmap(dev, map);
-
- DRM_UNLOCK();
-
- return 0;
-}
-
-
-static void drm_cleanup_buf_error(struct drm_device *dev,
- drm_buf_entry_t *entry)
-{
- int i;
-
- if (entry->seg_count) {
- for (i = 0; i < entry->seg_count; i++) {
- drm_pci_free(dev, entry->seglist[i]);
- }
- free(entry->seglist, DRM_MEM_SEGS);
-
- entry->seg_count = 0;
- }
-
- if (entry->buf_count) {
- for (i = 0; i < entry->buf_count; i++) {
- free(entry->buflist[i].dev_private, DRM_MEM_BUFS);
- }
- free(entry->buflist, DRM_MEM_BUFS);
-
- entry->buf_count = 0;
- }
-}
-
-static int drm_do_addbufs_agp(struct drm_device *dev, struct drm_buf_desc *request)
-{
- drm_device_dma_t *dma = dev->dma;
- drm_buf_entry_t *entry;
- /*drm_agp_mem_t *agp_entry;
- int valid*/
- drm_buf_t *buf;
- unsigned long offset;
- unsigned long agp_offset;
- int count;
- int order;
- int size;
- int alignment;
- int page_order;
- int total;
- int byte_count;
- int i;
- drm_buf_t **temp_buflist;
-
- count = request->count;
- order = drm_order(request->size);
- size = 1 << order;
-
- alignment = (request->flags & _DRM_PAGE_ALIGN)
- ? round_page(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- byte_count = 0;
- agp_offset = dev->agp->base + request->agp_start;
-
- DRM_DEBUG("count: %d\n", count);
- DRM_DEBUG("order: %d\n", order);
- DRM_DEBUG("size: %d\n", size);
- DRM_DEBUG("agp_offset: 0x%lx\n", agp_offset);
- DRM_DEBUG("alignment: %d\n", alignment);
- DRM_DEBUG("page_order: %d\n", page_order);
- DRM_DEBUG("total: %d\n", total);
-
- /* Make sure buffers are located in AGP memory that we own */
- /* Breaks MGA due to drm_alloc_agp not setting up entries for the
- * memory. Safe to ignore for now because these ioctls are still
- * root-only.
- */
- /*valid = 0;
- for (agp_entry = dev->agp->memory; agp_entry;
- agp_entry = agp_entry->next) {
- if ((agp_offset >= agp_entry->bound) &&
- (agp_offset + total * count <=
- agp_entry->bound + agp_entry->pages * PAGE_SIZE)) {
- valid = 1;
- break;
- }
- }
- if (!valid) {
- DRM_DEBUG("zone invalid\n");
- return EINVAL;
- }*/
-
- entry = &dma->bufs[order];
-
- entry->buflist = malloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS,
- M_NOWAIT | M_ZERO);
- if (!entry->buflist) {
- return ENOMEM;
- }
-
- entry->buf_size = size;
- entry->page_order = page_order;
-
- offset = 0;
-
- while (entry->buf_count < count) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
-
- buf->offset = (dma->byte_count + offset);
- buf->bus_address = agp_offset + offset;
- buf->address = (void *)(agp_offset + offset);
- buf->next = NULL;
- buf->pending = 0;
- buf->file_priv = NULL;
-
- buf->dev_priv_size = dev->driver->buf_priv_size;
- buf->dev_private = malloc(buf->dev_priv_size, DRM_MEM_BUFS,
- M_NOWAIT | M_ZERO);
- if (buf->dev_private == NULL) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- drm_cleanup_buf_error(dev, entry);
- return ENOMEM;
- }
-
- offset += alignment;
- entry->buf_count++;
- byte_count += PAGE_SIZE << page_order;
- }
-
- DRM_DEBUG("byte_count: %d\n", byte_count);
-
- temp_buflist = realloc(dma->buflist,
- (dma->buf_count + entry->buf_count) * sizeof(*dma->buflist),
- DRM_MEM_BUFS, M_NOWAIT);
- if (temp_buflist == NULL) {
- /* Free the entry because it isn't valid */
- drm_cleanup_buf_error(dev, entry);
- return ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for (i = 0; i < entry->buf_count; i++) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- dma->buf_count += entry->buf_count;
- dma->byte_count += byte_count;
-
- DRM_DEBUG("dma->buf_count : %d\n", dma->buf_count);
- DRM_DEBUG("entry->buf_count : %d\n", entry->buf_count);
-
- request->count = entry->buf_count;
- request->size = size;
-
- dma->flags = _DRM_DMA_USE_AGP;
-
- return 0;
-}
-
-static int drm_do_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *request)
-{
- drm_device_dma_t *dma = dev->dma;
- int count;
- int order;
- int size;
- int total;
- int page_order;
- drm_buf_entry_t *entry;
- drm_buf_t *buf;
- int alignment;
- unsigned long offset;
- int i;
- int byte_count;
- int page_count;
- unsigned long *temp_pagelist;
- drm_buf_t **temp_buflist;
-
- count = request->count;
- order = drm_order(request->size);
- size = 1 << order;
-
- DRM_DEBUG("count=%d, size=%d (%d), order=%d\n",
- request->count, request->size, size, order);
-
- alignment = (request->flags & _DRM_PAGE_ALIGN)
- ? round_page(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- entry = &dma->bufs[order];
-
- entry->buflist = malloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS,
- M_NOWAIT | M_ZERO);
- entry->seglist = malloc(count * sizeof(*entry->seglist), DRM_MEM_SEGS,
- M_NOWAIT | M_ZERO);
-
- /* Keep the original pagelist until we know all the allocations
- * have succeeded
- */
- temp_pagelist = malloc((dma->page_count + (count << page_order)) *
- sizeof(*dma->pagelist), DRM_MEM_PAGES, M_NOWAIT);
-
- if (entry->buflist == NULL || entry->seglist == NULL ||
- temp_pagelist == NULL) {
- free(temp_pagelist, DRM_MEM_PAGES);
- free(entry->seglist, DRM_MEM_SEGS);
- free(entry->buflist, DRM_MEM_BUFS);
- return ENOMEM;
- }
-
- memcpy(temp_pagelist, dma->pagelist, dma->page_count *
- sizeof(*dma->pagelist));
-
- DRM_DEBUG("pagelist: %d entries\n",
- dma->page_count + (count << page_order));
-
- entry->buf_size = size;
- entry->page_order = page_order;
- byte_count = 0;
- page_count = 0;
-
- while (entry->buf_count < count) {
- DRM_SPINUNLOCK(&dev->dma_lock);
- drm_dma_handle_t *dmah = drm_pci_alloc(dev, size, alignment,
- 0xfffffffful);
- DRM_SPINLOCK(&dev->dma_lock);
- if (dmah == NULL) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- entry->seg_count = count;
- drm_cleanup_buf_error(dev, entry);
- free(temp_pagelist, DRM_MEM_PAGES);
- return ENOMEM;
- }
-
- entry->seglist[entry->seg_count++] = dmah;
- for (i = 0; i < (1 << page_order); i++) {
- DRM_DEBUG("page %d @ %p\n",
- dma->page_count + page_count,
- (char *)dmah->vaddr + PAGE_SIZE * i);
- temp_pagelist[dma->page_count + page_count++] =
- (long)dmah->vaddr + PAGE_SIZE * i;
- }
- for (offset = 0;
- offset + size <= total && entry->buf_count < count;
- offset += alignment, ++entry->buf_count) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
- buf->offset = (dma->byte_count + byte_count + offset);
- buf->address = ((char *)dmah->vaddr + offset);
- buf->bus_address = dmah->busaddr + offset;
- buf->next = NULL;
- buf->pending = 0;
- buf->file_priv = NULL;
-
- buf->dev_priv_size = dev->driver->buf_priv_size;
- buf->dev_private = malloc(buf->dev_priv_size,
- DRM_MEM_BUFS, M_NOWAIT | M_ZERO);
- if (buf->dev_private == NULL) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- entry->seg_count = count;
- drm_cleanup_buf_error(dev, entry);
- free(temp_pagelist, DRM_MEM_PAGES);
- return ENOMEM;
- }
-
- DRM_DEBUG("buffer %d @ %p\n",
- entry->buf_count, buf->address);
- }
- byte_count += PAGE_SIZE << page_order;
- }
-
- temp_buflist = realloc(dma->buflist,
- (dma->buf_count + entry->buf_count) * sizeof(*dma->buflist),
- DRM_MEM_BUFS, M_NOWAIT);
- if (temp_buflist == NULL) {
- /* Free the entry because it isn't valid */
- drm_cleanup_buf_error(dev, entry);
- free(temp_pagelist, DRM_MEM_PAGES);
- return ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for (i = 0; i < entry->buf_count; i++) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- /* No allocations failed, so now we can replace the orginal pagelist
- * with the new one.
- */
- free(dma->pagelist, DRM_MEM_PAGES);
- dma->pagelist = temp_pagelist;
-
- dma->buf_count += entry->buf_count;
- dma->seg_count += entry->seg_count;
- dma->page_count += entry->seg_count << page_order;
- dma->byte_count += PAGE_SIZE * (entry->seg_count << page_order);
-
- request->count = entry->buf_count;
- request->size = size;
-
- return 0;
-
-}
-
-static int drm_do_addbufs_sg(struct drm_device *dev, struct drm_buf_desc *request)
-{
- drm_device_dma_t *dma = dev->dma;
- drm_buf_entry_t *entry;
- drm_buf_t *buf;
- unsigned long offset;
- unsigned long agp_offset;
- int count;
- int order;
- int size;
- int alignment;
- int page_order;
- int total;
- int byte_count;
- int i;
- drm_buf_t **temp_buflist;
-
- count = request->count;
- order = drm_order(request->size);
- size = 1 << order;
-
- alignment = (request->flags & _DRM_PAGE_ALIGN)
- ? round_page(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- byte_count = 0;
- agp_offset = request->agp_start;
-
- DRM_DEBUG("count: %d\n", count);
- DRM_DEBUG("order: %d\n", order);
- DRM_DEBUG("size: %d\n", size);
- DRM_DEBUG("agp_offset: %ld\n", agp_offset);
- DRM_DEBUG("alignment: %d\n", alignment);
- DRM_DEBUG("page_order: %d\n", page_order);
- DRM_DEBUG("total: %d\n", total);
-
- entry = &dma->bufs[order];
-
- entry->buflist = malloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS,
- M_NOWAIT | M_ZERO);
- if (entry->buflist == NULL)
- return ENOMEM;
-
- entry->buf_size = size;
- entry->page_order = page_order;
-
- offset = 0;
-
- while (entry->buf_count < count) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
-
- buf->offset = (dma->byte_count + offset);
- buf->bus_address = agp_offset + offset;
- buf->address = (void *)(agp_offset + offset + dev->sg->handle);
- buf->next = NULL;
- buf->pending = 0;
- buf->file_priv = NULL;
-
- buf->dev_priv_size = dev->driver->buf_priv_size;
- buf->dev_private = malloc(buf->dev_priv_size, DRM_MEM_BUFS,
- M_NOWAIT | M_ZERO);
- if (buf->dev_private == NULL) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- drm_cleanup_buf_error(dev, entry);
- return ENOMEM;
- }
-
- DRM_DEBUG("buffer %d @ %p\n",
- entry->buf_count, buf->address);
-
- offset += alignment;
- entry->buf_count++;
- byte_count += PAGE_SIZE << page_order;
- }
-
- DRM_DEBUG("byte_count: %d\n", byte_count);
-
- temp_buflist = realloc(dma->buflist,
- (dma->buf_count + entry->buf_count) * sizeof(*dma->buflist),
- DRM_MEM_BUFS, M_NOWAIT);
- if (temp_buflist == NULL) {
- /* Free the entry because it isn't valid */
- drm_cleanup_buf_error(dev, entry);
- return ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for (i = 0; i < entry->buf_count; i++) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- dma->buf_count += entry->buf_count;
- dma->byte_count += byte_count;
-
- DRM_DEBUG("dma->buf_count : %d\n", dma->buf_count);
- DRM_DEBUG("entry->buf_count : %d\n", entry->buf_count);
-
- request->count = entry->buf_count;
- request->size = size;
-
- dma->flags = _DRM_DMA_USE_SG;
-
- return 0;
-}
-
-int drm_addbufs_agp(struct drm_device *dev, struct drm_buf_desc *request)
-{
- int order, ret;
-
- if (request->count < 0 || request->count > 4096)
- return EINVAL;
-
- order = drm_order(request->size);
- if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
- return EINVAL;
-
- DRM_SPINLOCK(&dev->dma_lock);
-
- /* No more allocations after first buffer-using ioctl. */
- if (dev->buf_use != 0) {
- DRM_SPINUNLOCK(&dev->dma_lock);
- return EBUSY;
- }
- /* No more than one allocation per order */
- if (dev->dma->bufs[order].buf_count != 0) {
- DRM_SPINUNLOCK(&dev->dma_lock);
- return ENOMEM;
- }
-
- ret = drm_do_addbufs_agp(dev, request);
-
- DRM_SPINUNLOCK(&dev->dma_lock);
-
- return ret;
-}
-
-int drm_addbufs_sg(struct drm_device *dev, struct drm_buf_desc *request)
-{
- int order, ret;
-
- if (!DRM_SUSER(DRM_CURPROC))
- return EACCES;
-
- if (request->count < 0 || request->count > 4096)
- return EINVAL;
-
- order = drm_order(request->size);
- if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
- return EINVAL;
-
- DRM_SPINLOCK(&dev->dma_lock);
-
- /* No more allocations after first buffer-using ioctl. */
- if (dev->buf_use != 0) {
- DRM_SPINUNLOCK(&dev->dma_lock);
- return EBUSY;
- }
- /* No more than one allocation per order */
- if (dev->dma->bufs[order].buf_count != 0) {
- DRM_SPINUNLOCK(&dev->dma_lock);
- return ENOMEM;
- }
-
- ret = drm_do_addbufs_sg(dev, request);
-
- DRM_SPINUNLOCK(&dev->dma_lock);
-
- return ret;
-}
-
-int drm_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *request)
-{
- int order, ret;
-
- if (!DRM_SUSER(DRM_CURPROC))
- return EACCES;
-
- if (request->count < 0 || request->count > 4096)
- return EINVAL;
-
- order = drm_order(request->size);
- if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
- return EINVAL;
-
- DRM_SPINLOCK(&dev->dma_lock);
-
- /* No more allocations after first buffer-using ioctl. */
- if (dev->buf_use != 0) {
- DRM_SPINUNLOCK(&dev->dma_lock);
- return EBUSY;
- }
- /* No more than one allocation per order */
- if (dev->dma->bufs[order].buf_count != 0) {
- DRM_SPINUNLOCK(&dev->dma_lock);
- return ENOMEM;
- }
-
- ret = drm_do_addbufs_pci(dev, request);
-
- DRM_SPINUNLOCK(&dev->dma_lock);
-
- return ret;
-}
-
-int drm_addbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_buf_desc *request = data;
- int err;
-
- if (request->flags & _DRM_AGP_BUFFER)
- err = drm_addbufs_agp(dev, request);
- else if (request->flags & _DRM_SG_BUFFER)
- err = drm_addbufs_sg(dev, request);
- else
- err = drm_addbufs_pci(dev, request);
-
- return err;
-}
-
-int drm_infobufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_device_dma_t *dma = dev->dma;
- struct drm_buf_info *request = data;
- int i;
- int count;
- int retcode = 0;
-
- DRM_SPINLOCK(&dev->dma_lock);
- ++dev->buf_use; /* Can't allocate more after this call */
- DRM_SPINUNLOCK(&dev->dma_lock);
-
- for (i = 0, count = 0; i < DRM_MAX_ORDER + 1; i++) {
- if (dma->bufs[i].buf_count)
- ++count;
- }
-
- DRM_DEBUG("count = %d\n", count);
-
- if (request->count >= count) {
- for (i = 0, count = 0; i < DRM_MAX_ORDER + 1; i++) {
- if (dma->bufs[i].buf_count) {
- struct drm_buf_desc from;
-
- from.count = dma->bufs[i].buf_count;
- from.size = dma->bufs[i].buf_size;
- from.low_mark = dma->bufs[i].freelist.low_mark;
- from.high_mark = dma->bufs[i].freelist.high_mark;
-
- if (DRM_COPY_TO_USER(&request->list[count], &from,
- sizeof(struct drm_buf_desc)) != 0) {
- retcode = EFAULT;
- break;
- }
-
- DRM_DEBUG("%d %d %d %d %d\n",
- i, dma->bufs[i].buf_count,
- dma->bufs[i].buf_size,
- dma->bufs[i].freelist.low_mark,
- dma->bufs[i].freelist.high_mark);
- ++count;
- }
- }
- }
- request->count = count;
-
- return retcode;
-}
-
-int drm_markbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_device_dma_t *dma = dev->dma;
- struct drm_buf_desc *request = data;
- int order;
-
- DRM_DEBUG("%d, %d, %d\n",
- request->size, request->low_mark, request->high_mark);
-
-
- order = drm_order(request->size);
- if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ||
- request->low_mark < 0 || request->high_mark < 0) {
- return EINVAL;
- }
-
- DRM_SPINLOCK(&dev->dma_lock);
- if (request->low_mark > dma->bufs[order].buf_count ||
- request->high_mark > dma->bufs[order].buf_count) {
- DRM_SPINUNLOCK(&dev->dma_lock);
- return EINVAL;
- }
-
- dma->bufs[order].freelist.low_mark = request->low_mark;
- dma->bufs[order].freelist.high_mark = request->high_mark;
- DRM_SPINUNLOCK(&dev->dma_lock);
-
- return 0;
-}
-
-int drm_freebufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_device_dma_t *dma = dev->dma;
- struct drm_buf_free *request = data;
- int i;
- int idx;
- drm_buf_t *buf;
- int retcode = 0;
-
- DRM_DEBUG("%d\n", request->count);
-
- DRM_SPINLOCK(&dev->dma_lock);
- for (i = 0; i < request->count; i++) {
- if (DRM_COPY_FROM_USER(&idx, &request->list[i], sizeof(idx))) {
- retcode = EFAULT;
- break;
- }
- if (idx < 0 || idx >= dma->buf_count) {
- DRM_ERROR("Index %d (of %d max)\n",
- idx, dma->buf_count - 1);
- retcode = EINVAL;
- break;
- }
- buf = dma->buflist[idx];
- if (buf->file_priv != file_priv) {
- DRM_ERROR("Process %d freeing buffer not owned\n",
- DRM_CURRENTPID);
- retcode = EINVAL;
- break;
- }
- drm_free_buffer(dev, buf);
- }
- DRM_SPINUNLOCK(&dev->dma_lock);
-
- return retcode;
-}
-
-int drm_mapbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_device_dma_t *dma = dev->dma;
- int retcode = 0;
- const int zero = 0;
- vm_offset_t address;
- struct vmspace *vms;
- vm_ooffset_t foff;
- vm_size_t size;
- vm_offset_t vaddr;
- struct drm_buf_map *request = data;
- int i;
-
- vms = DRM_CURPROC->td_proc->p_vmspace;
-
- DRM_SPINLOCK(&dev->dma_lock);
- dev->buf_use++; /* Can't allocate more after this call */
- DRM_SPINUNLOCK(&dev->dma_lock);
-
- if (request->count < dma->buf_count)
- goto done;
-
- if ((drm_core_has_AGP(dev) && (dma->flags & _DRM_DMA_USE_AGP)) ||
- (drm_core_check_feature(dev, DRIVER_SG) &&
- (dma->flags & _DRM_DMA_USE_SG))) {
- drm_local_map_t *map = dev->agp_buffer_map;
-
- if (map == NULL) {
- retcode = EINVAL;
- goto done;
- }
- size = round_page(map->size);
- foff = map->offset;
- } else {
- size = round_page(dma->byte_count),
- foff = 0;
- }
-
- vaddr = round_page((vm_offset_t)vms->vm_daddr + MAXDSIZ);
-#if __FreeBSD_version >= 600023
- retcode = vm_mmap(&vms->vm_map, &vaddr, size, PROT_READ | PROT_WRITE,
- VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, OBJT_DEVICE, dev->devnode, foff);
-#else
- retcode = vm_mmap(&vms->vm_map, &vaddr, size, PROT_READ | PROT_WRITE,
- VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, SLIST_FIRST(&dev->devnode->si_hlist),
- foff);
-#endif
- if (retcode)
- goto done;
-
- request->virtual = (void *)vaddr;
-
- for (i = 0; i < dma->buf_count; i++) {
- if (DRM_COPY_TO_USER(&request->list[i].idx,
- &dma->buflist[i]->idx, sizeof(request->list[0].idx))) {
- retcode = EFAULT;
- goto done;
- }
- if (DRM_COPY_TO_USER(&request->list[i].total,
- &dma->buflist[i]->total, sizeof(request->list[0].total))) {
- retcode = EFAULT;
- goto done;
- }
- if (DRM_COPY_TO_USER(&request->list[i].used, &zero,
- sizeof(zero))) {
- retcode = EFAULT;
- goto done;
- }
- address = vaddr + dma->buflist[i]->offset; /* *** */
- if (DRM_COPY_TO_USER(&request->list[i].address, &address,
- sizeof(address))) {
- retcode = EFAULT;
- goto done;
- }
- }
-
- done:
- request->count = dma->buf_count;
-
- DRM_DEBUG("%d buffers, retcode = %d\n", request->count, retcode);
-
- return retcode;
-}
-
-/*
- * Compute order. Can be made faster.
- */
-int drm_order(unsigned long size)
-{
- int order;
-
- if (size == 0)
- return 0;
-
- order = flsl(size) - 1;
- if (size & ~(1ul << order))
- ++order;
-
- return order;
-}
+++ /dev/null
-/*-
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_context.c
- * Implementation of the context management ioctls.
- */
-
-#include "drmP.h"
-
-/* ================================================================
- * Context bitmap support
- */
-
-void drm_ctxbitmap_free(struct drm_device *dev, int ctx_handle)
-{
- if (ctx_handle < 0 || ctx_handle >= DRM_MAX_CTXBITMAP ||
- dev->ctx_bitmap == NULL) {
- DRM_ERROR("Attempt to free invalid context handle: %d\n",
- ctx_handle);
- return;
- }
-
- DRM_LOCK();
- clear_bit(ctx_handle, dev->ctx_bitmap);
- dev->context_sareas[ctx_handle] = NULL;
- DRM_UNLOCK();
- return;
-}
-
-int drm_ctxbitmap_next(struct drm_device *dev)
-{
- int bit;
-
- if (dev->ctx_bitmap == NULL)
- return -1;
-
- DRM_LOCK();
- bit = find_first_zero_bit(dev->ctx_bitmap, DRM_MAX_CTXBITMAP);
- if (bit >= DRM_MAX_CTXBITMAP) {
- DRM_UNLOCK();
- return -1;
- }
-
- set_bit(bit, dev->ctx_bitmap);
- DRM_DEBUG("drm_ctxbitmap_next bit : %d\n", bit);
- if ((bit+1) > dev->max_context) {
- dev->max_context = (bit+1);
- if (dev->context_sareas != NULL) {
- drm_local_map_t **ctx_sareas;
-
- ctx_sareas = realloc(dev->context_sareas,
- dev->max_context * sizeof(*dev->context_sareas),
- DRM_MEM_SAREA, M_NOWAIT);
- if (ctx_sareas == NULL) {
- clear_bit(bit, dev->ctx_bitmap);
- DRM_UNLOCK();
- return -1;
- }
- dev->context_sareas = ctx_sareas;
- dev->context_sareas[bit] = NULL;
- } else {
- /* max_context == 1 at this point */
- dev->context_sareas = malloc(dev->max_context *
- sizeof(*dev->context_sareas), DRM_MEM_SAREA,
- M_NOWAIT);
- if (dev->context_sareas == NULL) {
- clear_bit(bit, dev->ctx_bitmap);
- DRM_UNLOCK();
- return -1;
- }
- dev->context_sareas[bit] = NULL;
- }
- }
- DRM_UNLOCK();
- return bit;
-}
-
-int drm_ctxbitmap_init(struct drm_device *dev)
-{
- int i;
- int temp;
-
- DRM_LOCK();
- dev->ctx_bitmap = malloc(PAGE_SIZE, DRM_MEM_CTXBITMAP,
- M_NOWAIT | M_ZERO);
- if (dev->ctx_bitmap == NULL) {
- DRM_UNLOCK();
- return ENOMEM;
- }
- dev->context_sareas = NULL;
- dev->max_context = -1;
- DRM_UNLOCK();
-
- for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) {
- temp = drm_ctxbitmap_next(dev);
- DRM_DEBUG("drm_ctxbitmap_init : %d\n", temp);
- }
-
- return 0;
-}
-
-void drm_ctxbitmap_cleanup(struct drm_device *dev)
-{
- DRM_LOCK();
- if (dev->context_sareas != NULL)
- free(dev->context_sareas, DRM_MEM_SAREA);
- free(dev->ctx_bitmap, DRM_MEM_CTXBITMAP);
- DRM_UNLOCK();
-}
-
-/* ================================================================
- * Per Context SAREA Support
- */
-
-int drm_getsareactx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx_priv_map *request = data;
- drm_local_map_t *map;
-
- DRM_LOCK();
- if (dev->max_context < 0 ||
- request->ctx_id >= (unsigned) dev->max_context) {
- DRM_UNLOCK();
- return EINVAL;
- }
-
- map = dev->context_sareas[request->ctx_id];
- DRM_UNLOCK();
-
- request->handle = map->handle;
-
- return 0;
-}
-
-int drm_setsareactx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx_priv_map *request = data;
- drm_local_map_t *map = NULL;
-
- DRM_LOCK();
- TAILQ_FOREACH(map, &dev->maplist, link) {
- if (map->handle == request->handle) {
- if (dev->max_context < 0)
- goto bad;
- if (request->ctx_id >= (unsigned) dev->max_context)
- goto bad;
- dev->context_sareas[request->ctx_id] = map;
- DRM_UNLOCK();
- return 0;
- }
- }
-
-bad:
- DRM_UNLOCK();
- return EINVAL;
-}
-
-/* ================================================================
- * The actual DRM context handling routines
- */
-
-int drm_context_switch(struct drm_device *dev, int old, int new)
-{
- if (test_and_set_bit(0, &dev->context_flag)) {
- DRM_ERROR("Reentering -- FIXME\n");
- return EBUSY;
- }
-
- DRM_DEBUG("Context switch from %d to %d\n", old, new);
-
- if (new == dev->last_context) {
- clear_bit(0, &dev->context_flag);
- return 0;
- }
-
- return 0;
-}
-
-int drm_context_switch_complete(struct drm_device *dev, int new)
-{
- dev->last_context = new; /* PRE/POST: This is the _only_ writer. */
-
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("Lock isn't held after context switch\n");
- }
-
- /* If a context switch is ever initiated
- when the kernel holds the lock, release
- that lock here. */
- clear_bit(0, &dev->context_flag);
-
- return 0;
-}
-
-int drm_resctx(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_ctx_res *res = data;
- struct drm_ctx ctx;
- int i;
-
- if (res->count >= DRM_RESERVED_CONTEXTS) {
- bzero(&ctx, sizeof(ctx));
- for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) {
- ctx.handle = i;
- if (DRM_COPY_TO_USER(&res->contexts[i],
- &ctx, sizeof(ctx)))
- return EFAULT;
- }
- }
- res->count = DRM_RESERVED_CONTEXTS;
-
- return 0;
-}
-
-int drm_addctx(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_ctx *ctx = data;
-
- ctx->handle = drm_ctxbitmap_next(dev);
- if (ctx->handle == DRM_KERNEL_CONTEXT) {
- /* Skip kernel's context and get a new one. */
- ctx->handle = drm_ctxbitmap_next(dev);
- }
- DRM_DEBUG("%d\n", ctx->handle);
- if (ctx->handle == -1) {
- DRM_DEBUG("Not enough free contexts.\n");
- /* Should this return -EBUSY instead? */
- return ENOMEM;
- }
-
- if (dev->driver->context_ctor && ctx->handle != DRM_KERNEL_CONTEXT) {
- DRM_LOCK();
- dev->driver->context_ctor(dev, ctx->handle);
- DRM_UNLOCK();
- }
-
- return 0;
-}
-
-int drm_modctx(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- /* This does nothing */
- return 0;
-}
-
-int drm_getctx(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_ctx *ctx = data;
-
- /* This is 0, because we don't handle any context flags */
- ctx->flags = 0;
-
- return 0;
-}
-
-int drm_switchctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx *ctx = data;
-
- DRM_DEBUG("%d\n", ctx->handle);
- return drm_context_switch(dev, dev->last_context, ctx->handle);
-}
-
-int drm_newctx(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_ctx *ctx = data;
-
- DRM_DEBUG("%d\n", ctx->handle);
- drm_context_switch_complete(dev, ctx->handle);
-
- return 0;
-}
-
-int drm_rmctx(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_ctx *ctx = data;
-
- DRM_DEBUG("%d\n", ctx->handle);
- if (ctx->handle != DRM_KERNEL_CONTEXT) {
- if (dev->driver->context_dtor) {
- DRM_LOCK();
- dev->driver->context_dtor(dev, ctx->handle);
- DRM_UNLOCK();
- }
-
- drm_ctxbitmap_free(dev, ctx->handle);
- }
-
- return 0;
-}
+++ /dev/null
-/*-
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_dma.c
- * Support code for DMA buffer management.
- *
- * The implementation used to be significantly more complicated, but the
- * complexity has been moved into the drivers as different buffer management
- * schemes evolved.
- */
-
-#include "drmP.h"
-
-int drm_dma_setup(struct drm_device *dev)
-{
-
- dev->dma = malloc(sizeof(*dev->dma), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
- if (dev->dma == NULL)
- return ENOMEM;
-
- DRM_SPININIT(&dev->dma_lock, "drmdma");
-
- return 0;
-}
-
-void drm_dma_takedown(struct drm_device *dev)
-{
- drm_device_dma_t *dma = dev->dma;
- int i, j;
-
- if (dma == NULL)
- return;
-
- /* Clear dma buffers */
- for (i = 0; i <= DRM_MAX_ORDER; i++) {
- if (dma->bufs[i].seg_count) {
- DRM_DEBUG("order %d: buf_count = %d,"
- " seg_count = %d\n", i, dma->bufs[i].buf_count,
- dma->bufs[i].seg_count);
- for (j = 0; j < dma->bufs[i].seg_count; j++) {
- drm_pci_free(dev, dma->bufs[i].seglist[j]);
- }
- free(dma->bufs[i].seglist, DRM_MEM_SEGS);
- }
-
- if (dma->bufs[i].buf_count) {
- for (j = 0; j < dma->bufs[i].buf_count; j++) {
- free(dma->bufs[i].buflist[j].dev_private,
- DRM_MEM_BUFS);
- }
- free(dma->bufs[i].buflist, DRM_MEM_BUFS);
- }
- }
-
- free(dma->buflist, DRM_MEM_BUFS);
- free(dma->pagelist, DRM_MEM_PAGES);
- free(dev->dma, DRM_MEM_DRIVER);
- dev->dma = NULL;
- DRM_SPINUNINIT(&dev->dma_lock);
-}
-
-
-void drm_free_buffer(struct drm_device *dev, drm_buf_t *buf)
-{
- if (!buf)
- return;
-
- buf->pending = 0;
- buf->file_priv= NULL;
- buf->used = 0;
-}
-
-void drm_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
-{
- drm_device_dma_t *dma = dev->dma;
- int i;
-
- if (!dma)
- return;
-
- for (i = 0; i < dma->buf_count; i++) {
- if (dma->buflist[i]->file_priv == file_priv) {
- switch (dma->buflist[i]->list) {
- case DRM_LIST_NONE:
- drm_free_buffer(dev, dma->buflist[i]);
- break;
- case DRM_LIST_WAIT:
- dma->buflist[i]->list = DRM_LIST_RECLAIM;
- break;
- default:
- /* Buffer already on hardware. */
- break;
- }
- }
- }
-}
-
-/* Call into the driver-specific DMA handler */
-int drm_dma(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
-
- if (dev->driver->dma_ioctl) {
- /* shared code returns -errno */
- return -dev->driver->dma_ioctl(dev, data, file_priv);
- } else {
- DRM_DEBUG("DMA ioctl on driver with no dma handler\n");
- return EINVAL;
- }
-}
+++ /dev/null
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_drawable.c
- * This file implements ioctls to store information along with DRM drawables,
- * such as the current set of cliprects for vblank-synced buffer swaps.
- */
-
-#include "drmP.h"
-
-struct bsd_drm_drawable_info {
- struct drm_drawable_info info;
- int handle;
- RB_ENTRY(bsd_drm_drawable_info) tree;
-};
-
-static int
-drm_drawable_compare(struct bsd_drm_drawable_info *a,
- struct bsd_drm_drawable_info *b)
-{
- if (a->handle > b->handle)
- return 1;
- if (a->handle < b->handle)
- return -1;
- return 0;
-}
-
-RB_GENERATE_STATIC(drawable_tree, bsd_drm_drawable_info, tree,
- drm_drawable_compare);
-
-struct drm_drawable_info *
-drm_get_drawable_info(struct drm_device *dev, int handle)
-{
- struct bsd_drm_drawable_info find, *result;
-
- find.handle = handle;
- result = RB_FIND(drawable_tree, &dev->drw_head, &find);
-
- return &result->info;
-}
-
-int drm_adddraw(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_draw *draw = data;
- struct bsd_drm_drawable_info *info;
-
- info = malloc(sizeof(struct bsd_drm_drawable_info), DRM_MEM_DRAWABLE,
- M_NOWAIT | M_ZERO);
- if (info == NULL)
- return ENOMEM;
-
- info->handle = alloc_unr(dev->drw_unrhdr);
- DRM_SPINLOCK(&dev->drw_lock);
- RB_INSERT(drawable_tree, &dev->drw_head, info);
- draw->handle = info->handle;
- DRM_SPINUNLOCK(&dev->drw_lock);
-
- DRM_DEBUG("%d\n", draw->handle);
-
- return 0;
-}
-
-int drm_rmdraw(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_draw *draw = (struct drm_draw *)data;
- struct drm_drawable_info *info;
-
- DRM_SPINLOCK(&dev->drw_lock);
- info = drm_get_drawable_info(dev, draw->handle);
- if (info != NULL) {
- RB_REMOVE(drawable_tree, &dev->drw_head,
- (struct bsd_drm_drawable_info *)info);
- DRM_SPINUNLOCK(&dev->drw_lock);
- free_unr(dev->drw_unrhdr, draw->handle);
- free(info->rects, DRM_MEM_DRAWABLE);
- free(info, DRM_MEM_DRAWABLE);
- return 0;
- } else {
- DRM_SPINUNLOCK(&dev->drw_lock);
- return EINVAL;
- }
-}
-
-int drm_update_draw(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_drawable_info *info;
- struct drm_update_draw *update = (struct drm_update_draw *)data;
- int ret;
-
- info = drm_get_drawable_info(dev, update->handle);
- if (info == NULL)
- return EINVAL;
-
- switch (update->type) {
- case DRM_DRAWABLE_CLIPRECTS:
- DRM_SPINLOCK(&dev->drw_lock);
- if (update->num != info->num_rects) {
- free(info->rects, DRM_MEM_DRAWABLE);
- info->rects = NULL;
- info->num_rects = 0;
- }
- if (update->num == 0) {
- DRM_SPINUNLOCK(&dev->drw_lock);
- return 0;
- }
- if (info->rects == NULL) {
- info->rects = malloc(sizeof(*info->rects) *
- update->num, DRM_MEM_DRAWABLE, M_NOWAIT);
- if (info->rects == NULL) {
- DRM_SPINUNLOCK(&dev->drw_lock);
- return ENOMEM;
- }
- info->num_rects = update->num;
- }
- /* For some reason the pointer arg is unsigned long long. */
- ret = copyin((void *)(intptr_t)update->data, info->rects,
- sizeof(*info->rects) * info->num_rects);
- DRM_SPINUNLOCK(&dev->drw_lock);
- return ret;
- default:
- return EINVAL;
- }
-}
-
-void drm_drawable_free_all(struct drm_device *dev)
-{
- struct bsd_drm_drawable_info *info, *next;
-
- DRM_SPINLOCK(&dev->drw_lock);
- for (info = RB_MIN(drawable_tree, &dev->drw_head);
- info != NULL ; info = next) {
- next = RB_NEXT(drawable_tree, &dev->drw_head, info);
- RB_REMOVE(drawable_tree, &dev->drw_head,
- (struct bsd_drm_drawable_info *)info);
- DRM_SPINUNLOCK(&dev->drw_lock);
- free_unr(dev->drw_unrhdr, info->handle);
- free(info->info.rects, DRM_MEM_DRAWABLE);
- free(info, DRM_MEM_DRAWABLE);
- DRM_SPINLOCK(&dev->drw_lock);
- }
- DRM_SPINUNLOCK(&dev->drw_lock);
-}
+++ /dev/null
-/*-
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_drv.c
- * The catch-all file for DRM device support, including module setup/teardown,
- * open/close, and ioctl dispatch.
- */
-
-
-#include <sys/limits.h>
-#include "drmP.h"
-#include "drm.h"
-#include "drm_sarea.h"
-
-#ifdef DRM_DEBUG_DEFAULT_ON
-int drm_debug_flag = 1;
-#else
-int drm_debug_flag = 0;
-#endif
-
-static int drm_load(struct drm_device *dev);
-static void drm_unload(struct drm_device *dev);
-static drm_pci_id_list_t *drm_find_description(int vendor, int device,
- drm_pci_id_list_t *idlist);
-
-#define DRIVER_SOFTC(unit) \
- ((struct drm_device *)devclass_get_softc(drm_devclass, unit))
-
-MODULE_VERSION(drm, 1);
-MODULE_DEPEND(drm, agp, 1, 1, 1);
-MODULE_DEPEND(drm, pci, 1, 1, 1);
-MODULE_DEPEND(drm, mem, 1, 1, 1);
-
-static drm_ioctl_desc_t drm_ioctls[256] = {
- DRM_IOCTL_DEF(DRM_IOCTL_VERSION, drm_version, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_UNIQUE, drm_getunique, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_MAGIC, drm_getmagic, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_IRQ_BUSID, drm_irq_by_busid, DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_MAP, drm_getmap, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_CLIENT, drm_getclient, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_STATS, drm_getstats, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_SET_VERSION, drm_setversion, DRM_MASTER|DRM_ROOT_ONLY),
-
- DRM_IOCTL_DEF(DRM_IOCTL_SET_UNIQUE, drm_setunique, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_BLOCK, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_UNBLOCK, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AUTH_MAGIC, drm_authmagic, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-
- DRM_IOCTL_DEF(DRM_IOCTL_ADD_MAP, drm_addmap_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_RM_MAP, drm_rmmap_ioctl, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_SET_SAREA_CTX, drm_setsareactx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_SAREA_CTX, drm_getsareactx, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_ADD_CTX, drm_addctx, DRM_AUTH|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_RM_CTX, drm_rmctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_MOD_CTX, drm_modctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_CTX, drm_getctx, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_SWITCH_CTX, drm_switchctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_NEW_CTX, drm_newctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_RES_CTX, drm_resctx, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_ADD_DRAW, drm_adddraw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_RM_DRAW, drm_rmdraw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-
- DRM_IOCTL_DEF(DRM_IOCTL_LOCK, drm_lock, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_UNLOCK, drm_unlock, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_FINISH, drm_noop, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_ADD_BUFS, drm_addbufs, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_MARK_BUFS, drm_markbufs, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_INFO_BUFS, drm_infobufs, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_MAP_BUFS, drm_mapbufs, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_FREE_BUFS, drm_freebufs, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_DMA, drm_dma, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_CONTROL, drm_control, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_ACQUIRE, drm_agp_acquire_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_RELEASE, drm_agp_release_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_ENABLE, drm_agp_enable_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_INFO, drm_agp_info_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_ALLOC, drm_agp_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_FREE, drm_agp_free_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_BIND, drm_agp_bind_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_UNBIND, drm_agp_unbind_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-
- DRM_IOCTL_DEF(DRM_IOCTL_SG_ALLOC, drm_sg_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_SG_FREE, drm_sg_free, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_MODESET_CTL, drm_modeset_ctl, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_UPDATE_DRAW, drm_update_draw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-};
-
-static struct cdevsw drm_cdevsw = {
- .d_version = D_VERSION,
- .d_open = drm_open,
- .d_read = drm_read,
- .d_ioctl = drm_ioctl,
- .d_poll = drm_poll,
- .d_mmap = drm_mmap,
- .d_name = "drm",
- .d_flags = D_TRACKCLOSE
-};
-
-int drm_msi = 1; /* Enable by default. */
-TUNABLE_INT("hw.drm.msi", &drm_msi);
-
-static struct drm_msi_blacklist_entry drm_msi_blacklist[] = {
- {0x8086, 0x2772}, /* Intel i945G */ \
- {0x8086, 0x27A2}, /* Intel i945GM */ \
- {0x8086, 0x27AE}, /* Intel i945GME */ \
- {0, 0}
-};
-
-static int drm_msi_is_blacklisted(int vendor, int device)
-{
- int i = 0;
-
- for (i = 0; drm_msi_blacklist[i].vendor != 0; i++) {
- if ((drm_msi_blacklist[i].vendor == vendor) &&
- (drm_msi_blacklist[i].device == device)) {
- return 1;
- }
- }
-
- return 0;
-}
-
-int drm_probe(device_t kdev, drm_pci_id_list_t *idlist)
-{
- drm_pci_id_list_t *id_entry;
- int vendor, device;
-#if __FreeBSD_version < 700010
- device_t realdev;
-
- if (!strcmp(device_get_name(kdev), "drmsub"))
- realdev = device_get_parent(kdev);
- else
- realdev = kdev;
- vendor = pci_get_vendor(realdev);
- device = pci_get_device(realdev);
-#else
- vendor = pci_get_vendor(kdev);
- device = pci_get_device(kdev);
-#endif
-
- if (pci_get_class(kdev) != PCIC_DISPLAY
- || pci_get_subclass(kdev) != PCIS_DISPLAY_VGA)
- return ENXIO;
-
- id_entry = drm_find_description(vendor, device, idlist);
- if (id_entry != NULL) {
- if (!device_get_desc(kdev)) {
- DRM_DEBUG("desc : %s\n", device_get_desc(kdev));
- device_set_desc(kdev, id_entry->name);
- }
- return 0;
- }
-
- return ENXIO;
-}
-
-int drm_attach(device_t kdev, drm_pci_id_list_t *idlist)
-{
- struct drm_device *dev;
- drm_pci_id_list_t *id_entry;
- int unit, msicount;
-
- unit = device_get_unit(kdev);
- dev = device_get_softc(kdev);
-
-#if __FreeBSD_version < 700010
- if (!strcmp(device_get_name(kdev), "drmsub"))
- dev->device = device_get_parent(kdev);
- else
- dev->device = kdev;
-#else
- dev->device = kdev;
-#endif
- dev->devnode = make_dev(&drm_cdevsw,
- unit,
- DRM_DEV_UID,
- DRM_DEV_GID,
- DRM_DEV_MODE,
- "dri/card%d", unit);
-
-#if __FreeBSD_version >= 700053
- dev->pci_domain = pci_get_domain(dev->device);
-#else
- dev->pci_domain = 0;
-#endif
- dev->pci_bus = pci_get_bus(dev->device);
- dev->pci_slot = pci_get_slot(dev->device);
- dev->pci_func = pci_get_function(dev->device);
-
- dev->pci_vendor = pci_get_vendor(dev->device);
- dev->pci_device = pci_get_device(dev->device);
-
- if (drm_msi &&
- !drm_msi_is_blacklisted(dev->pci_vendor, dev->pci_device)) {
- msicount = pci_msi_count(dev->device);
- DRM_DEBUG("MSI count = %d\n", msicount);
- if (msicount > 1)
- msicount = 1;
-
- if (pci_alloc_msi(dev->device, &msicount) == 0) {
- DRM_INFO("MSI enabled %d message(s)\n", msicount);
- dev->msi_enabled = 1;
- dev->irqrid = 1;
- }
- }
-
- dev->irqr = bus_alloc_resource_any(dev->device, SYS_RES_IRQ,
- &dev->irqrid, RF_SHAREABLE);
- if (!dev->irqr) {
- return ENOENT;
- }
-
- dev->irq = (int) rman_get_start(dev->irqr);
-
- mtx_init(&dev->dev_lock, "drmdev", NULL, MTX_DEF);
- mtx_init(&dev->irq_lock, "drmirq", NULL, MTX_DEF);
- mtx_init(&dev->vbl_lock, "drmvbl", NULL, MTX_DEF);
- mtx_init(&dev->drw_lock, "drmdrw", NULL, MTX_DEF);
-
- id_entry = drm_find_description(dev->pci_vendor,
- dev->pci_device, idlist);
- dev->id_entry = id_entry;
-
- return drm_load(dev);
-}
-
-int drm_detach(device_t kdev)
-{
- struct drm_device *dev;
-
- dev = device_get_softc(kdev);
-
- drm_unload(dev);
-
- bus_release_resource(dev->device, SYS_RES_IRQ, dev->irqrid, dev->irqr);
-
- if (dev->msi_enabled) {
- pci_release_msi(dev->device);
- DRM_INFO("MSI released\n");
- }
-
- return 0;
-}
-
-#ifndef DRM_DEV_NAME
-#define DRM_DEV_NAME "drm"
-#endif
-
-devclass_t drm_devclass;
-
-drm_pci_id_list_t *drm_find_description(int vendor, int device,
- drm_pci_id_list_t *idlist)
-{
- int i = 0;
-
- for (i = 0; idlist[i].vendor != 0; i++) {
- if ((idlist[i].vendor == vendor) &&
- ((idlist[i].device == device) ||
- (idlist[i].device == 0))) {
- return &idlist[i];
- }
- }
- return NULL;
-}
-
-static int drm_firstopen(struct drm_device *dev)
-{
- drm_local_map_t *map;
- int i;
-
- DRM_SPINLOCK_ASSERT(&dev->dev_lock);
-
- /* prebuild the SAREA */
- i = drm_addmap(dev, 0, SAREA_MAX, _DRM_SHM,
- _DRM_CONTAINS_LOCK, &map);
- if (i != 0)
- return i;
-
- if (dev->driver->firstopen)
- dev->driver->firstopen(dev);
-
- dev->buf_use = 0;
-
- if (drm_core_check_feature(dev, DRIVER_HAVE_DMA)) {
- i = drm_dma_setup(dev);
- if (i != 0)
- return i;
- }
-
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- dev->magiclist[i].head = NULL;
- dev->magiclist[i].tail = NULL;
- }
-
- dev->lock.lock_queue = 0;
- dev->irq_enabled = 0;
- dev->context_flag = 0;
- dev->last_context = 0;
- dev->if_version = 0;
-
- dev->buf_sigio = NULL;
-
- DRM_DEBUG("\n");
-
- return 0;
-}
-
-static int drm_lastclose(struct drm_device *dev)
-{
- drm_magic_entry_t *pt, *next;
- drm_local_map_t *map, *mapsave;
- int i;
-
- DRM_SPINLOCK_ASSERT(&dev->dev_lock);
-
- DRM_DEBUG("\n");
-
- if (dev->driver->lastclose != NULL)
- dev->driver->lastclose(dev);
-
- if (dev->irq_enabled)
- drm_irq_uninstall(dev);
-
- if (dev->unique) {
- free(dev->unique, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- /* Clear pid list */
- for (i = 0; i < DRM_HASH_SIZE; i++) {
- for (pt = dev->magiclist[i].head; pt; pt = next) {
- next = pt->next;
- free(pt, DRM_MEM_MAGIC);
- }
- dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
- }
-
- DRM_UNLOCK();
- drm_drawable_free_all(dev);
- DRM_LOCK();
-
- /* Clear AGP information */
- if (dev->agp) {
- drm_agp_mem_t *entry;
- drm_agp_mem_t *nexte;
-
- /* Remove AGP resources, but leave dev->agp intact until
- * drm_unload is called.
- */
- for (entry = dev->agp->memory; entry; entry = nexte) {
- nexte = entry->next;
- if (entry->bound)
- drm_agp_unbind_memory(entry->handle);
- drm_agp_free_memory(entry->handle);
- free(entry, DRM_MEM_AGPLISTS);
- }
- dev->agp->memory = NULL;
-
- if (dev->agp->acquired)
- drm_agp_release(dev);
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
- if (dev->sg != NULL) {
- drm_sg_cleanup(dev->sg);
- dev->sg = NULL;
- }
-
- TAILQ_FOREACH_SAFE(map, &dev->maplist, link, mapsave) {
- if (!(map->flags & _DRM_DRIVER))
- drm_rmmap(dev, map);
- }
-
- drm_dma_takedown(dev);
- if (dev->lock.hw_lock) {
- dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.file_priv = NULL;
- DRM_WAKEUP_INT((void *)&dev->lock.lock_queue);
- }
-
- return 0;
-}
-
-static int drm_load(struct drm_device *dev)
-{
- int i, retcode;
-
- DRM_DEBUG("\n");
-
- TAILQ_INIT(&dev->maplist);
-
- drm_mem_init();
- drm_sysctl_init(dev);
- TAILQ_INIT(&dev->files);
-
- dev->counters = 6;
- dev->types[0] = _DRM_STAT_LOCK;
- dev->types[1] = _DRM_STAT_OPENS;
- dev->types[2] = _DRM_STAT_CLOSES;
- dev->types[3] = _DRM_STAT_IOCTLS;
- dev->types[4] = _DRM_STAT_LOCKS;
- dev->types[5] = _DRM_STAT_UNLOCKS;
-
- for (i = 0; i < DRM_ARRAY_SIZE(dev->counts); i++)
- atomic_set(&dev->counts[i], 0);
-
- if (dev->driver->load != NULL) {
- DRM_LOCK();
- /* Shared code returns -errno. */
- retcode = -dev->driver->load(dev,
- dev->id_entry->driver_private);
- if (pci_enable_busmaster(dev->device))
- DRM_ERROR("Request to enable bus-master failed.\n");
- DRM_UNLOCK();
- if (retcode != 0)
- goto error;
- }
-
- if (drm_core_has_AGP(dev)) {
- if (drm_device_is_agp(dev))
- dev->agp = drm_agp_init();
- if (drm_core_check_feature(dev, DRIVER_REQUIRE_AGP) &&
- dev->agp == NULL) {
- DRM_ERROR("Card isn't AGP, or couldn't initialize "
- "AGP.\n");
- retcode = ENOMEM;
- goto error;
- }
- if (dev->agp != NULL) {
- if (drm_mtrr_add(dev->agp->info.ai_aperture_base,
- dev->agp->info.ai_aperture_size, DRM_MTRR_WC) == 0)
- dev->agp->mtrr = 1;
- }
- }
-
- retcode = drm_ctxbitmap_init(dev);
- if (retcode != 0) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- goto error;
- }
-
- dev->drw_unrhdr = new_unrhdr(1, INT_MAX, NULL);
- if (dev->drw_unrhdr == NULL) {
- DRM_ERROR("Couldn't allocate drawable number allocator\n");
- goto error;
- }
-
- DRM_INFO("Initialized %s %d.%d.%d %s\n",
- dev->driver->name,
- dev->driver->major,
- dev->driver->minor,
- dev->driver->patchlevel,
- dev->driver->date);
-
- return 0;
-
-error:
- drm_sysctl_cleanup(dev);
- DRM_LOCK();
- drm_lastclose(dev);
- DRM_UNLOCK();
- destroy_dev(dev->devnode);
-
- mtx_destroy(&dev->drw_lock);
- mtx_destroy(&dev->vbl_lock);
- mtx_destroy(&dev->irq_lock);
- mtx_destroy(&dev->dev_lock);
-
- return retcode;
-}
-
-static void drm_unload(struct drm_device *dev)
-{
- int i;
-
- DRM_DEBUG("\n");
-
- drm_sysctl_cleanup(dev);
- destroy_dev(dev->devnode);
-
- drm_ctxbitmap_cleanup(dev);
-
- if (dev->agp && dev->agp->mtrr) {
- int __unused retcode;
-
- retcode = drm_mtrr_del(0, dev->agp->info.ai_aperture_base,
- dev->agp->info.ai_aperture_size, DRM_MTRR_WC);
- DRM_DEBUG("mtrr_del = %d", retcode);
- }
-
- DRM_LOCK();
- drm_lastclose(dev);
- DRM_UNLOCK();
-
- drm_vblank_cleanup(dev);
-
- /* Clean up PCI resources allocated by drm_bufs.c. We're not really
- * worried about resource consumption while the DRM is inactive (between
- * lastclose and firstopen or unload) because these aren't actually
- * taking up KVA, just keeping the PCI resource allocated.
- */
- for (i = 0; i < DRM_MAX_PCI_RESOURCE; i++) {
- if (dev->pcir[i] == NULL)
- continue;
- bus_release_resource(dev->device, SYS_RES_MEMORY,
- dev->pcirid[i], dev->pcir[i]);
- dev->pcir[i] = NULL;
- }
-
- if (dev->agp) {
- free(dev->agp, DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
-
- if (dev->driver->unload != NULL) {
- DRM_LOCK();
- dev->driver->unload(dev);
- DRM_UNLOCK();
- }
-
- delete_unrhdr(dev->drw_unrhdr);
-
- drm_mem_uninit();
-
- if (pci_disable_busmaster(dev->device))
- DRM_ERROR("Request to disable bus-master failed.\n");
-
- mtx_destroy(&dev->drw_lock);
- mtx_destroy(&dev->vbl_lock);
- mtx_destroy(&dev->irq_lock);
- mtx_destroy(&dev->dev_lock);
-}
-
-int drm_version(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_version *version = data;
- int len;
-
-#define DRM_COPY( name, value ) \
- len = strlen( value ); \
- if ( len > name##_len ) len = name##_len; \
- name##_len = strlen( value ); \
- if ( len && name ) { \
- if ( DRM_COPY_TO_USER( name, value, len ) ) \
- return EFAULT; \
- }
-
- version->version_major = dev->driver->major;
- version->version_minor = dev->driver->minor;
- version->version_patchlevel = dev->driver->patchlevel;
-
- DRM_COPY(version->name, dev->driver->name);
- DRM_COPY(version->date, dev->driver->date);
- DRM_COPY(version->desc, dev->driver->desc);
-
- return 0;
-}
-
-int drm_open(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p)
-{
- struct drm_device *dev = NULL;
- int retcode = 0;
-
- dev = DRIVER_SOFTC(dev2unit(kdev));
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
-
- retcode = drm_open_helper(kdev, flags, fmt, p, dev);
-
- if (!retcode) {
- atomic_inc(&dev->counts[_DRM_STAT_OPENS]);
- DRM_LOCK();
- device_busy(dev->device);
- if (!dev->open_count++)
- retcode = drm_firstopen(dev);
- DRM_UNLOCK();
- }
-
- return retcode;
-}
-
-void drm_close(void *data)
-{
- struct drm_file *file_priv = data;
- struct drm_device *dev = file_priv->dev;
- int retcode = 0;
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
-
- DRM_LOCK();
-
- if (dev->driver->preclose != NULL)
- dev->driver->preclose(dev, file_priv);
-
- /* ========================================================
- * Begin inline drm_release
- */
-
- DRM_DEBUG("pid = %d, device = 0x%lx, open_count = %d\n",
- DRM_CURRENTPID, (long)dev->device, dev->open_count);
-
- if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
- && dev->lock.file_priv == file_priv) {
- DRM_DEBUG("Process %d dead, freeing lock for context %d\n",
- DRM_CURRENTPID,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- if (dev->driver->reclaim_buffers_locked != NULL)
- dev->driver->reclaim_buffers_locked(dev, file_priv);
-
- drm_lock_free(&dev->lock,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
-
- /* FIXME: may require heavy-handed reset of
- hardware at this point, possibly
- processed via a callback to the X
- server. */
- } else if (dev->driver->reclaim_buffers_locked != NULL &&
- dev->lock.hw_lock != NULL) {
- /* The lock is required to reclaim buffers */
- for (;;) {
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- retcode = EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock, DRM_KERNEL_CONTEXT)) {
- dev->lock.file_priv = file_priv;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->counts[_DRM_STAT_LOCKS]);
- break; /* Got lock */
- }
- /* Contention */
- retcode = mtx_sleep((void *)&dev->lock.lock_queue,
- &dev->dev_lock, PCATCH, "drmlk2", 0);
- if (retcode)
- break;
- }
- if (retcode == 0) {
- dev->driver->reclaim_buffers_locked(dev, file_priv);
- drm_lock_free(&dev->lock, DRM_KERNEL_CONTEXT);
- }
- }
-
- if (drm_core_check_feature(dev, DRIVER_HAVE_DMA) &&
- !dev->driver->reclaim_buffers_locked)
- drm_reclaim_buffers(dev, file_priv);
-
- funsetown(&dev->buf_sigio);
-
- if (dev->driver->postclose != NULL)
- dev->driver->postclose(dev, file_priv);
- TAILQ_REMOVE(&dev->files, file_priv, link);
- free(file_priv, DRM_MEM_FILES);
-
- /* ========================================================
- * End inline drm_release
- */
-
- atomic_inc(&dev->counts[_DRM_STAT_CLOSES]);
- device_unbusy(dev->device);
- if (--dev->open_count == 0) {
- retcode = drm_lastclose(dev);
- }
-
- DRM_UNLOCK();
-}
-
-/* drm_ioctl is called whenever a process performs an ioctl on /dev/drm.
- */
-int drm_ioctl(struct cdev *kdev, u_long cmd, caddr_t data, int flags,
- DRM_STRUCTPROC *p)
-{
- struct drm_device *dev = drm_get_device_from_kdev(kdev);
- int retcode = 0;
- drm_ioctl_desc_t *ioctl;
- int (*func)(struct drm_device *dev, void *data, struct drm_file *file_priv);
- int nr = DRM_IOCTL_NR(cmd);
- int is_driver_ioctl = 0;
- struct drm_file *file_priv;
-
- retcode = devfs_get_cdevpriv((void **)&file_priv);
- if (retcode != 0) {
- DRM_ERROR("can't find authenticator\n");
- return EINVAL;
- }
-
- atomic_inc(&dev->counts[_DRM_STAT_IOCTLS]);
- ++file_priv->ioctl_count;
-
- DRM_DEBUG("pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n",
- DRM_CURRENTPID, cmd, nr, (long)dev->device,
- file_priv->authenticated);
-
- switch (cmd) {
- case FIONBIO:
- case FIOASYNC:
- return 0;
-
- case FIOSETOWN:
- return fsetown(*(int *)data, &dev->buf_sigio);
-
- case FIOGETOWN:
- *(int *) data = fgetown(&dev->buf_sigio);
- return 0;
- }
-
- if (IOCGROUP(cmd) != DRM_IOCTL_BASE) {
- DRM_DEBUG("Bad ioctl group 0x%x\n", (int)IOCGROUP(cmd));
- return EINVAL;
- }
-
- ioctl = &drm_ioctls[nr];
- /* It's not a core DRM ioctl, try driver-specific. */
- if (ioctl->func == NULL && nr >= DRM_COMMAND_BASE) {
- /* The array entries begin at DRM_COMMAND_BASE ioctl nr */
- nr -= DRM_COMMAND_BASE;
- if (nr > dev->driver->max_ioctl) {
- DRM_DEBUG("Bad driver ioctl number, 0x%x (of 0x%x)\n",
- nr, dev->driver->max_ioctl);
- return EINVAL;
- }
- ioctl = &dev->driver->ioctls[nr];
- is_driver_ioctl = 1;
- }
- func = ioctl->func;
-
- if (func == NULL) {
- DRM_DEBUG("no function\n");
- return EINVAL;
- }
-
- if (((ioctl->flags & DRM_ROOT_ONLY) && !DRM_SUSER(p)) ||
- ((ioctl->flags & DRM_AUTH) && !file_priv->authenticated) ||
- ((ioctl->flags & DRM_MASTER) && !file_priv->master))
- return EACCES;
-
- if (is_driver_ioctl) {
- DRM_LOCK();
- /* shared code returns -errno */
- retcode = -func(dev, data, file_priv);
- DRM_UNLOCK();
- } else {
- retcode = func(dev, data, file_priv);
- }
-
- if (retcode != 0)
- DRM_DEBUG(" returning %d\n", retcode);
-
- return retcode;
-}
-
-drm_local_map_t *drm_getsarea(struct drm_device *dev)
-{
- drm_local_map_t *map;
-
- DRM_SPINLOCK_ASSERT(&dev->dev_lock);
- TAILQ_FOREACH(map, &dev->maplist, link) {
- if (map->type == _DRM_SHM && (map->flags & _DRM_CONTAINS_LOCK))
- return map;
- }
-
- return NULL;
-}
-
-#if DRM_LINUX
-
-#include <sys/sysproto.h>
-
-MODULE_DEPEND(DRIVER_NAME, linux, 1, 1, 1);
-
-#define LINUX_IOCTL_DRM_MIN 0x6400
-#define LINUX_IOCTL_DRM_MAX 0x64ff
-
-static linux_ioctl_function_t drm_linux_ioctl;
-static struct linux_ioctl_handler drm_handler = {drm_linux_ioctl,
- LINUX_IOCTL_DRM_MIN, LINUX_IOCTL_DRM_MAX};
-
-SYSINIT(drm_register, SI_SUB_KLD, SI_ORDER_MIDDLE,
- linux_ioctl_register_handler, &drm_handler);
-SYSUNINIT(drm_unregister, SI_SUB_KLD, SI_ORDER_MIDDLE,
- linux_ioctl_unregister_handler, &drm_handler);
-
-/* The bits for in/out are switched on Linux */
-#define LINUX_IOC_IN IOC_OUT
-#define LINUX_IOC_OUT IOC_IN
-
-static int
-drm_linux_ioctl(DRM_STRUCTPROC *p, struct linux_ioctl_args* args)
-{
- int error;
- int cmd = args->cmd;
-
- args->cmd &= ~(LINUX_IOC_IN | LINUX_IOC_OUT);
- if (cmd & LINUX_IOC_IN)
- args->cmd |= IOC_IN;
- if (cmd & LINUX_IOC_OUT)
- args->cmd |= IOC_OUT;
-
- error = ioctl(p, (struct ioctl_args *)args);
-
- return error;
-}
-#endif /* DRM_LINUX */
+++ /dev/null
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Daryll Strauss <daryll@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_fops.c
- * Support code for dealing with the file privates associated with each
- * open of the DRM device.
- */
-
-#include "drmP.h"
-
-/* drm_open_helper is called whenever a process opens /dev/drm. */
-int drm_open_helper(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p,
- struct drm_device *dev)
-{
- struct drm_file *priv;
- int m = dev2unit(kdev);
- int retcode;
-
- if (flags & O_EXCL)
- return EBUSY; /* No exclusive opens */
- dev->flags = flags;
-
- DRM_DEBUG("pid = %d, minor = %d\n", DRM_CURRENTPID, m);
-
- priv = malloc(sizeof(*priv), DRM_MEM_FILES, M_NOWAIT | M_ZERO);
- if (priv == NULL) {
- return ENOMEM;
- }
-
- retcode = devfs_set_cdevpriv(priv, drm_close);
- if (retcode != 0) {
- free(priv, DRM_MEM_FILES);
- return retcode;
- }
-
- DRM_LOCK();
- priv->dev = dev;
- priv->uid = p->td_ucred->cr_svuid;
- priv->pid = p->td_proc->p_pid;
- priv->minor = m;
- priv->ioctl_count = 0;
-
- /* for compatibility root is always authenticated */
- priv->authenticated = DRM_SUSER(p);
-
- if (dev->driver->open) {
- /* shared code returns -errno */
- retcode = -dev->driver->open(dev, priv);
- if (retcode != 0) {
- devfs_clear_cdevpriv();
- free(priv, DRM_MEM_FILES);
- DRM_UNLOCK();
- return retcode;
- }
- }
-
- /* first opener automatically becomes master */
- priv->master = TAILQ_EMPTY(&dev->files);
-
- TAILQ_INSERT_TAIL(&dev->files, priv, link);
- DRM_UNLOCK();
- kdev->si_drv1 = dev;
- return 0;
-}
-
-
-/* The drm_read and drm_poll are stubs to prevent spurious errors
- * on older X Servers (4.3.0 and earlier) */
-
-int drm_read(struct cdev *kdev, struct uio *uio, int ioflag)
-{
- return 0;
-}
-
-int drm_poll(struct cdev *kdev, int events, DRM_STRUCTPROC *p)
-{
- return 0;
-}
+++ /dev/null
-../shared-core/drm_internal.h
\ No newline at end of file
+++ /dev/null
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_ioctl.c
- * Varios minor DRM ioctls not applicable to other files, such as versioning
- * information and reporting DRM information to userland.
- */
-
-#include "drmP.h"
-
-/*
- * Beginning in revision 1.1 of the DRM interface, getunique will return
- * a unique in the form pci:oooo:bb:dd.f (o=domain, b=bus, d=device, f=function)
- * before setunique has been called. The format for the bus-specific part of
- * the unique is not defined for any other bus.
- */
-int drm_getunique(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_unique *u = data;
-
- if (u->unique_len >= dev->unique_len) {
- if (DRM_COPY_TO_USER(u->unique, dev->unique, dev->unique_len))
- return EFAULT;
- }
- u->unique_len = dev->unique_len;
-
- return 0;
-}
-
-/* Deprecated in DRM version 1.1, and will return EBUSY when setversion has
- * requested version 1.1 or greater.
- */
-int drm_setunique(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_unique *u = data;
- int domain, bus, slot, func, ret;
- char *busid;
-
- /* Check and copy in the submitted Bus ID */
- if (!u->unique_len || u->unique_len > 1024)
- return EINVAL;
-
- busid = malloc(u->unique_len + 1, DRM_MEM_DRIVER, M_WAITOK);
- if (busid == NULL)
- return ENOMEM;
-
- if (DRM_COPY_FROM_USER(busid, u->unique, u->unique_len)) {
- free(busid, DRM_MEM_DRIVER);
- return EFAULT;
- }
- busid[u->unique_len] = '\0';
-
- /* Return error if the busid submitted doesn't match the device's actual
- * busid.
- */
- ret = sscanf(busid, "PCI:%d:%d:%d", &bus, &slot, &func);
- if (ret != 3) {
- free(busid, DRM_MEM_DRIVER);
- return EINVAL;
- }
- domain = bus >> 8;
- bus &= 0xff;
-
- if ((domain != dev->pci_domain) ||
- (bus != dev->pci_bus) ||
- (slot != dev->pci_slot) ||
- (func != dev->pci_func)) {
- free(busid, DRM_MEM_DRIVER);
- return EINVAL;
- }
-
- /* Actually set the device's busid now. */
- DRM_LOCK();
- if (dev->unique_len || dev->unique) {
- DRM_UNLOCK();
- return EBUSY;
- }
-
- dev->unique_len = u->unique_len;
- dev->unique = busid;
- DRM_UNLOCK();
-
- return 0;
-}
-
-
-static int
-drm_set_busid(struct drm_device *dev)
-{
-
- DRM_LOCK();
-
- if (dev->unique != NULL) {
- DRM_UNLOCK();
- return EBUSY;
- }
-
- dev->unique_len = 20;
- dev->unique = malloc(dev->unique_len + 1, DRM_MEM_DRIVER, M_NOWAIT);
- if (dev->unique == NULL) {
- DRM_UNLOCK();
- return ENOMEM;
- }
-
- snprintf(dev->unique, dev->unique_len, "pci:%04x:%02x:%02x.%1x",
- dev->pci_domain, dev->pci_bus, dev->pci_slot, dev->pci_func);
-
- DRM_UNLOCK();
-
- return 0;
-}
-
-int drm_getmap(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_map *map = data;
- drm_local_map_t *mapinlist;
- int idx;
- int i = 0;
-
- idx = map->offset;
-
- DRM_LOCK();
- if (idx < 0) {
- DRM_UNLOCK();
- return EINVAL;
- }
-
- TAILQ_FOREACH(mapinlist, &dev->maplist, link) {
- if (i == idx) {
- map->offset = mapinlist->offset;
- map->size = mapinlist->size;
- map->type = mapinlist->type;
- map->flags = mapinlist->flags;
- map->handle = mapinlist->handle;
- map->mtrr = mapinlist->mtrr;
- break;
- }
- i++;
- }
-
- DRM_UNLOCK();
-
- if (mapinlist == NULL)
- return EINVAL;
-
- return 0;
-}
-
-int drm_getclient(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_client *client = data;
- struct drm_file *pt;
- int idx;
- int i = 0;
-
- idx = client->idx;
- DRM_LOCK();
- TAILQ_FOREACH(pt, &dev->files, link) {
- if (i == idx) {
- client->auth = pt->authenticated;
- client->pid = pt->pid;
- client->uid = pt->uid;
- client->magic = pt->magic;
- client->iocs = pt->ioctl_count;
- DRM_UNLOCK();
- return 0;
- }
- i++;
- }
- DRM_UNLOCK();
-
- return EINVAL;
-}
-
-int drm_getstats(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_stats *stats = data;
- int i;
-
- memset(stats, 0, sizeof(struct drm_stats));
-
- DRM_LOCK();
-
- for (i = 0; i < dev->counters; i++) {
- if (dev->types[i] == _DRM_STAT_LOCK)
- stats->data[i].value =
- (dev->lock.hw_lock ? dev->lock.hw_lock->lock : 0);
- else
- stats->data[i].value = atomic_read(&dev->counts[i]);
- stats->data[i].type = dev->types[i];
- }
-
- stats->count = dev->counters;
-
- DRM_UNLOCK();
-
- return 0;
-}
-
-#define DRM_IF_MAJOR 1
-#define DRM_IF_MINOR 2
-
-int drm_setversion(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_set_version *sv = data;
- struct drm_set_version ver;
- int if_version;
-
- /* Save the incoming data, and set the response before continuing
- * any further.
- */
- ver = *sv;
- sv->drm_di_major = DRM_IF_MAJOR;
- sv->drm_di_minor = DRM_IF_MINOR;
- sv->drm_dd_major = dev->driver->major;
- sv->drm_dd_minor = dev->driver->minor;
-
- if (ver.drm_di_major != -1) {
- if (ver.drm_di_major != DRM_IF_MAJOR ||
- ver.drm_di_minor < 0 || ver.drm_di_minor > DRM_IF_MINOR) {
- return EINVAL;
- }
- if_version = DRM_IF_VERSION(ver.drm_di_major,
- ver.drm_dd_minor);
- dev->if_version = DRM_MAX(if_version, dev->if_version);
- if (ver.drm_di_minor >= 1) {
- /*
- * Version 1.1 includes tying of DRM to specific device
- */
- drm_set_busid(dev);
- }
- }
-
- if (ver.drm_dd_major != -1) {
- if (ver.drm_dd_major != dev->driver->major ||
- ver.drm_dd_minor < 0 ||
- ver.drm_dd_minor > dev->driver->minor)
- {
- return EINVAL;
- }
- }
-
- return 0;
-}
-
-
-int drm_noop(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- DRM_DEBUG("\n");
- return 0;
-}
+++ /dev/null
-/*-
- * Copyright 2003 Eric Anholt
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <anholt@FreeBSD.org>
- *
- */
-
-/** @file drm_irq.c
- * Support code for handling setup/teardown of interrupt handlers and
- * handing interrupt handlers off to the drivers.
- */
-
-#include "drmP.h"
-#include "drm.h"
-
-int drm_irq_by_busid(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_irq_busid *irq = data;
-
- if ((irq->busnum >> 8) != dev->pci_domain ||
- (irq->busnum & 0xff) != dev->pci_bus ||
- irq->devnum != dev->pci_slot ||
- irq->funcnum != dev->pci_func)
- return EINVAL;
-
- irq->irq = dev->irq;
-
- DRM_DEBUG("%d:%d:%d => IRQ %d\n",
- irq->busnum, irq->devnum, irq->funcnum, irq->irq);
-
- return 0;
-}
-
-static irqreturn_t
-drm_irq_handler_wrap(DRM_IRQ_ARGS)
-{
- struct drm_device *dev = arg;
-
- DRM_SPINLOCK(&dev->irq_lock);
- dev->driver->irq_handler(arg);
- DRM_SPINUNLOCK(&dev->irq_lock);
-}
-
-static void vblank_disable_fn(void *arg)
-{
- struct drm_device *dev = (struct drm_device *)arg;
- int i;
-
- if (callout_pending(&dev->vblank_disable_timer)) {
- /* callout was reset */
- return;
- }
- if (!callout_active(&dev->vblank_disable_timer)) {
- /* callout was stopped */
- return;
- }
- callout_deactivate(&dev->vblank_disable_timer);
-
- DRM_DEBUG("vblank_disable_allowed=%d\n", dev->vblank_disable_allowed);
- if (!dev->vblank_disable_allowed)
- return;
-
- for (i = 0; i < dev->num_crtcs; i++) {
- if (atomic_read(&dev->vblank[i].refcount) == 0 &&
- dev->vblank[i].enabled) {
- DRM_DEBUG("disabling vblank on crtc %d\n", i);
- dev->vblank[i].last =
- dev->driver->get_vblank_counter(dev, i);
- dev->driver->disable_vblank(dev, i);
- dev->vblank[i].enabled = 0;
- }
- }
-}
-
-void drm_vblank_cleanup(struct drm_device *dev)
-{
- unsigned long irqflags;
-
- /* Bail if the driver didn't call drm_vblank_init() */
- if (dev->num_crtcs == 0)
- return;
-
- DRM_SPINLOCK_IRQSAVE(&dev->vbl_lock, irqflags);
- callout_stop(&dev->vblank_disable_timer);
- DRM_SPINUNLOCK_IRQRESTORE(&dev->vbl_lock, irqflags);
-
- callout_drain(&dev->vblank_disable_timer);
-
- vblank_disable_fn((void *)dev);
-
- free(dev->vblank, DRM_MEM_DRIVER);
-
- dev->num_crtcs = 0;
-}
-
-int drm_vblank_init(struct drm_device *dev, int num_crtcs)
-{
- int i, ret = ENOMEM;
-
- callout_init_mtx(&dev->vblank_disable_timer, &dev->vbl_lock, 0);
- atomic_set(&dev->vbl_signal_pending, 0);
- dev->num_crtcs = num_crtcs;
-
- dev->vblank = malloc(sizeof(struct drm_vblank_info) * num_crtcs,
- DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
- if (!dev->vblank)
- goto err;
-
- DRM_DEBUG("\n");
-
- /* Zero per-crtc vblank stuff */
- for (i = 0; i < num_crtcs; i++) {
- DRM_INIT_WAITQUEUE(&dev->vblank[i].queue);
- TAILQ_INIT(&dev->vblank[i].sigs);
- atomic_set(&dev->vblank[i].count, 0);
- atomic_set(&dev->vblank[i].refcount, 0);
- }
-
- dev->vblank_disable_allowed = 0;
-
- return 0;
-
-err:
- drm_vblank_cleanup(dev);
- return ret;
-}
-
-int drm_irq_install(struct drm_device *dev)
-{
- int retcode;
-
- if (dev->irq == 0 || dev->dev_private == NULL)
- return EINVAL;
-
- DRM_DEBUG("irq=%d\n", dev->irq);
-
- DRM_LOCK();
- if (dev->irq_enabled) {
- DRM_UNLOCK();
- return EBUSY;
- }
- dev->irq_enabled = 1;
-
- dev->context_flag = 0;
-
- /* Before installing handler */
- dev->driver->irq_preinstall(dev);
- DRM_UNLOCK();
-
- /* Install handler */
-#if __FreeBSD_version >= 700031
- retcode = bus_setup_intr(dev->device, dev->irqr,
- INTR_TYPE_TTY | INTR_MPSAFE,
- NULL, drm_irq_handler_wrap, dev, &dev->irqh);
-#else
- retcode = bus_setup_intr(dev->device, dev->irqr,
- INTR_TYPE_TTY | INTR_MPSAFE,
- drm_irq_handler_wrap, dev, &dev->irqh);
-#endif
- if (retcode != 0)
- goto err;
-
- /* After installing handler */
- DRM_LOCK();
- dev->driver->irq_postinstall(dev);
- DRM_UNLOCK();
-
- return 0;
-err:
- DRM_LOCK();
- dev->irq_enabled = 0;
- DRM_UNLOCK();
-
- return retcode;
-}
-
-int drm_irq_uninstall(struct drm_device *dev)
-{
- if (!dev->irq_enabled)
- return EINVAL;
-
- dev->irq_enabled = 0;
-
- DRM_DEBUG("irq=%d\n", dev->irq);
-
- dev->driver->irq_uninstall(dev);
-
- DRM_UNLOCK();
- bus_teardown_intr(dev->device, dev->irqr, dev->irqh);
- DRM_LOCK();
-
- return 0;
-}
-
-int drm_control(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_control *ctl = data;
- int err;
-
- switch (ctl->func) {
- case DRM_INST_HANDLER:
- /* Handle drivers whose DRM used to require IRQ setup but the
- * no longer does.
- */
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return 0;
- if (dev->if_version < DRM_IF_VERSION(1, 2) &&
- ctl->irq != dev->irq)
- return EINVAL;
- return drm_irq_install(dev);
- case DRM_UNINST_HANDLER:
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return 0;
- DRM_LOCK();
- err = drm_irq_uninstall(dev);
- DRM_UNLOCK();
- return err;
- default:
- return EINVAL;
- }
-}
-
-u32 drm_vblank_count(struct drm_device *dev, int crtc)
-{
- return atomic_read(&dev->vblank[crtc].count);
-}
-
-static void drm_update_vblank_count(struct drm_device *dev, int crtc)
-{
- u32 cur_vblank, diff;
-
- /*
- * Interrupts were disabled prior to this call, so deal with counter
- * wrap if needed.
- * NOTE! It's possible we lost a full dev->max_vblank_count events
- * here if the register is small or we had vblank interrupts off for
- * a long time.
- */
- cur_vblank = dev->driver->get_vblank_counter(dev, crtc);
- diff = cur_vblank - dev->vblank[crtc].last;
- if (cur_vblank < dev->vblank[crtc].last) {
- diff += dev->max_vblank_count;
-
- DRM_DEBUG("vblank[%d].last=0x%x, cur_vblank=0x%x => diff=0x%x\n",
- crtc, dev->vblank[crtc].last, cur_vblank, diff);
- }
-
- DRM_DEBUG("enabling vblank interrupts on crtc %d, missed %d\n",
- crtc, diff);
-
- atomic_add(diff, &dev->vblank[crtc].count);
-}
-
-int drm_vblank_get(struct drm_device *dev, int crtc)
-{
- unsigned long irqflags;
- int ret = 0;
-
- DRM_SPINLOCK_IRQSAVE(&dev->vbl_lock, irqflags);
- /* Going from 0->1 means we have to enable interrupts again */
- atomic_add_acq_int(&dev->vblank[crtc].refcount, 1);
- DRM_DEBUG("vblank refcount = %d\n", dev->vblank[crtc].refcount);
- if (dev->vblank[crtc].refcount == 1 &&
- !dev->vblank[crtc].enabled) {
- ret = dev->driver->enable_vblank(dev, crtc);
- if (ret)
- atomic_dec(&dev->vblank[crtc].refcount);
- else {
- dev->vblank[crtc].enabled = 1;
- drm_update_vblank_count(dev, crtc);
- }
- }
- DRM_SPINUNLOCK_IRQRESTORE(&dev->vbl_lock, irqflags);
-
- return ret;
-}
-
-void drm_vblank_put(struct drm_device *dev, int crtc)
-{
- unsigned long irqflags;
-
- DRM_SPINLOCK_IRQSAVE(&dev->vbl_lock, irqflags);
- /* Last user schedules interrupt disable */
- atomic_subtract_acq_int(&dev->vblank[crtc].refcount, 1);
- DRM_DEBUG("vblank refcount = %d\n", dev->vblank[crtc].refcount);
- if (dev->vblank[crtc].refcount == 0)
- callout_reset(&dev->vblank_disable_timer, 5 * DRM_HZ,
- (timeout_t *)vblank_disable_fn, (void *)dev);
- DRM_SPINUNLOCK_IRQRESTORE(&dev->vbl_lock, irqflags);
-}
-
-int drm_modeset_ctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_modeset_ctl *modeset = data;
- unsigned long irqflags;
- int crtc, ret = 0;
-
- DRM_DEBUG("num_crtcs=%d\n", dev->num_crtcs);
- /* If drm_vblank_init() hasn't been called yet, just no-op */
- if (!dev->num_crtcs)
- goto out;
-
- crtc = modeset->crtc;
- DRM_DEBUG("crtc=%d\n", crtc);
- if (crtc >= dev->num_crtcs) {
- ret = EINVAL;
- goto out;
- }
-
- /*
- * To avoid all the problems that might happen if interrupts
- * were enabled/disabled around or between these calls, we just
- * have the kernel take a reference on the CRTC (just once though
- * to avoid corrupting the count if multiple, mismatch calls occur),
- * so that interrupts remain enabled in the interim.
- */
- switch (modeset->cmd) {
- case _DRM_PRE_MODESET:
- DRM_DEBUG("pre-modeset\n");
- if (!dev->vblank[crtc].inmodeset) {
- dev->vblank[crtc].inmodeset = 1;
- drm_vblank_get(dev, crtc);
- }
- break;
- case _DRM_POST_MODESET:
- DRM_DEBUG("post-modeset\n");
- if (dev->vblank[crtc].inmodeset) {
- DRM_SPINLOCK_IRQSAVE(&dev->vbl_lock, irqflags);
- dev->vblank_disable_allowed = 1;
- dev->vblank[crtc].inmodeset = 0;
- DRM_SPINUNLOCK_IRQRESTORE(&dev->vbl_lock, irqflags);
- drm_vblank_put(dev, crtc);
- }
- break;
- default:
- ret = EINVAL;
- break;
- }
-
-out:
- return ret;
-}
-
-int drm_wait_vblank(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- union drm_wait_vblank *vblwait = data;
- unsigned int flags, seq, crtc;
- int ret = 0;
-
- if (!dev->irq_enabled)
- return EINVAL;
-
- if (vblwait->request.type &
- ~(_DRM_VBLANK_TYPES_MASK | _DRM_VBLANK_FLAGS_MASK)) {
- DRM_ERROR("Unsupported type value 0x%x, supported mask 0x%x\n",
- vblwait->request.type,
- (_DRM_VBLANK_TYPES_MASK | _DRM_VBLANK_FLAGS_MASK));
- return EINVAL;
- }
-
- flags = vblwait->request.type & _DRM_VBLANK_FLAGS_MASK;
- crtc = flags & _DRM_VBLANK_SECONDARY ? 1 : 0;
-
- if (crtc >= dev->num_crtcs)
- return EINVAL;
-
- ret = drm_vblank_get(dev, crtc);
- if (ret) {
- DRM_ERROR("failed to acquire vblank counter, %d\n", ret);
- return ret;
- }
- seq = drm_vblank_count(dev, crtc);
-
- switch (vblwait->request.type & _DRM_VBLANK_TYPES_MASK) {
- case _DRM_VBLANK_RELATIVE:
- vblwait->request.sequence += seq;
- vblwait->request.type &= ~_DRM_VBLANK_RELATIVE;
- case _DRM_VBLANK_ABSOLUTE:
- break;
- default:
- ret = EINVAL;
- goto done;
- }
-
- if ((flags & _DRM_VBLANK_NEXTONMISS) &&
- (seq - vblwait->request.sequence) <= (1<<23)) {
- vblwait->request.sequence = seq + 1;
- }
-
- if (flags & _DRM_VBLANK_SIGNAL) {
-#if 0 /* disabled */
- drm_vbl_sig_t *vbl_sig = malloc(sizeof(drm_vbl_sig_t),
- DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
- if (vbl_sig == NULL)
- return ENOMEM;
-
- vbl_sig->sequence = vblwait->request.sequence;
- vbl_sig->signo = vblwait->request.signal;
- vbl_sig->pid = DRM_CURRENTPID;
-
- vblwait->reply.sequence = atomic_read(&dev->vbl_received);
-
- DRM_SPINLOCK(&dev->vbl_lock);
- TAILQ_INSERT_HEAD(&dev->vbl_sig_list, vbl_sig, link);
- DRM_SPINUNLOCK(&dev->vbl_lock);
- ret = 0;
-#endif
- ret = EINVAL;
- } else {
- DRM_DEBUG("waiting on vblank count %d, crtc %d\n",
- vblwait->request.sequence, crtc);
- for ( ret = 0 ; !ret && !((drm_vblank_count(dev, crtc) -
- vblwait->request.sequence) <= (1 << 23)) ; ) {
- mtx_lock(&dev->irq_lock);
- if (!((drm_vblank_count(dev, crtc) -
- vblwait->request.sequence) <= (1 << 23)))
- ret = mtx_sleep(&dev->vblank[crtc].queue,
- &dev->irq_lock, PCATCH, "vblwtq",
- 3 * DRM_HZ);
- mtx_unlock(&dev->irq_lock);
- }
-
- DRM_DEBUG("return = %d\n", ret);
- if (ret != EINTR) {
- struct timeval now;
-
- microtime(&now);
- vblwait->reply.tval_sec = now.tv_sec;
- vblwait->reply.tval_usec = now.tv_usec;
- vblwait->reply.sequence = drm_vblank_count(dev, crtc);
- DRM_DEBUG("returning %d to client\n",
- vblwait->reply.sequence);
- } else {
- DRM_DEBUG("vblank wait interrupted by signal\n");
- }
- }
-
-done:
- drm_vblank_put(dev, crtc);
- return ret;
-}
-
-void drm_vbl_send_signals(struct drm_device *dev, int crtc)
-{
-}
-
-#if 0 /* disabled */
-void drm_vbl_send_signals(struct drm_device *dev, int crtc )
-{
- drm_vbl_sig_t *vbl_sig;
- unsigned int vbl_seq = atomic_read( &dev->vbl_received );
- struct proc *p;
-
- vbl_sig = TAILQ_FIRST(&dev->vbl_sig_list);
- while (vbl_sig != NULL) {
- drm_vbl_sig_t *next = TAILQ_NEXT(vbl_sig, link);
-
- if ((vbl_seq - vbl_sig->sequence) <= (1 << 23)) {
- p = pfind(vbl_sig->pid);
- if (p != NULL)
- psignal(p, vbl_sig->signo);
-
- TAILQ_REMOVE(&dev->vbl_sig_list, vbl_sig, link);
- DRM_FREE(vbl_sig,sizeof(*vbl_sig));
- }
- vbl_sig = next;
- }
-}
-#endif
-
-void drm_handle_vblank(struct drm_device *dev, int crtc)
-{
- atomic_inc(&dev->vblank[crtc].count);
- DRM_WAKEUP(&dev->vblank[crtc].queue);
- drm_vbl_send_signals(dev, crtc);
-}
-
+++ /dev/null
-/* drm_linux_list.h -- linux list functions for the BSDs.
- * Created: Mon Apr 7 14:30:16 1999 by anholt@FreeBSD.org
- */
-/*-
- * Copyright 2003 Eric Anholt
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <anholt@FreeBSD.org>
- *
- */
-
-struct list_head {
- struct list_head *next, *prev;
-};
-
-/* Cheat, assume the list_head is at the start of the struct */
-#define list_entry(entry, type, member) (type *)(entry)
-
-static __inline__ void
-INIT_LIST_HEAD(struct list_head *head) {
- (head)->next = head;
- (head)->prev = head;
-}
-
-static __inline__ int
-list_empty(struct list_head *head) {
- return (head)->next == head;
-}
-
-static __inline__ void
-list_add_tail(struct list_head *entry, struct list_head *head) {
- (entry)->prev = (head)->prev;
- (entry)->next = head;
- (head)->prev->next = entry;
- (head)->prev = entry;
-}
-
-static __inline__ void
-list_del(struct list_head *entry) {
- (entry)->next->prev = (entry)->prev;
- (entry)->prev->next = (entry)->next;
-}
-
-#define list_for_each(entry, head) \
- for (entry = (head)->next; entry != head; entry = (entry)->next)
-
-#define list_for_each_prev(entry, head) \
- for (entry = (head)->prev; entry != (head); \
- entry = entry->prev)
-
-#define list_for_each_safe(entry, temp, head) \
- for (entry = (head)->next, temp = (entry)->next; \
- entry != head; \
- entry = temp, temp = entry->next)
-
+++ /dev/null
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_lock.c
- * Implementation of the ioctls and other support code for dealing with the
- * hardware lock.
- *
- * The DRM hardware lock is a shared structure between the kernel and userland.
- *
- * On uncontended access where the new context was the last context, the
- * client may take the lock without dropping down into the kernel, using atomic
- * compare-and-set.
- *
- * If the client finds during compare-and-set that it was not the last owner
- * of the lock, it calls the DRM lock ioctl, which may sleep waiting for the
- * lock, and may have side-effects of kernel-managed context switching.
- *
- * When the client releases the lock, if the lock is marked as being contended
- * by another client, then the DRM unlock ioctl is called so that the
- * contending client may be woken up.
- */
-
-#include "drmP.h"
-
-int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_lock *lock = data;
- int ret = 0;
-
- if (lock->context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- DRM_CURRENTPID, lock->context);
- return EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock->context, DRM_CURRENTPID, dev->lock.hw_lock->lock,
- lock->flags);
-
- if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE) &&
- lock->context < 0)
- return EINVAL;
-
- DRM_LOCK();
- for (;;) {
- if (drm_lock_take(&dev->lock, lock->context)) {
- dev->lock.file_priv = file_priv;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->counts[_DRM_STAT_LOCKS]);
- break; /* Got lock */
- }
-
- /* Contention */
- ret = mtx_sleep((void *)&dev->lock.lock_queue, &dev->dev_lock,
- PCATCH, "drmlk2", 0);
- if (ret != 0)
- break;
- }
- DRM_UNLOCK();
- DRM_DEBUG("%d %s\n", lock->context, ret ? "interrupted" : "has lock");
-
- if (ret != 0)
- return ret;
-
- /* XXX: Add signal blocking here */
-
- if (dev->driver->dma_quiescent != NULL &&
- (lock->flags & _DRM_LOCK_QUIESCENT))
- dev->driver->dma_quiescent(dev);
-
- return 0;
-}
-
-int drm_unlock(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_lock *lock = data;
-
- DRM_DEBUG("%d (pid %d) requests unlock (0x%08x), flags = 0x%08x\n",
- lock->context, DRM_CURRENTPID, dev->lock.hw_lock->lock,
- lock->flags);
-
- if (lock->context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- DRM_CURRENTPID, lock->context);
- return EINVAL;
- }
-
- atomic_inc(&dev->counts[_DRM_STAT_UNLOCKS]);
-
- DRM_LOCK();
- drm_lock_transfer(&dev->lock, DRM_KERNEL_CONTEXT);
-
- if (drm_lock_free(&dev->lock, DRM_KERNEL_CONTEXT)) {
- DRM_ERROR("\n");
- }
- DRM_UNLOCK();
-
- return 0;
-}
-
-int drm_lock_take(struct drm_lock_data *lock_data, unsigned int context)
-{
- volatile unsigned int *lock = &lock_data->hw_lock->lock;
- unsigned int old, new;
-
- do {
- old = *lock;
- if (old & _DRM_LOCK_HELD)
- new = old | _DRM_LOCK_CONT;
- else
- new = context | _DRM_LOCK_HELD;
- } while (!atomic_cmpset_int(lock, old, new));
-
- if (_DRM_LOCKING_CONTEXT(old) == context) {
- if (old & _DRM_LOCK_HELD) {
- if (context != DRM_KERNEL_CONTEXT) {
- DRM_ERROR("%d holds heavyweight lock\n",
- context);
- }
- return 0;
- }
- }
- if (new == (context | _DRM_LOCK_HELD)) {
- /* Have lock */
- return 1;
- }
- return 0;
-}
-
-/* This takes a lock forcibly and hands it to context. Should ONLY be used
- inside *_unlock to give lock to kernel before calling *_dma_schedule. */
-int drm_lock_transfer(struct drm_lock_data *lock_data, unsigned int context)
-{
- volatile unsigned int *lock = &lock_data->hw_lock->lock;
- unsigned int old, new;
-
- lock_data->file_priv = NULL;
- do {
- old = *lock;
- new = context | _DRM_LOCK_HELD;
- } while (!atomic_cmpset_int(lock, old, new));
-
- return 1;
-}
-
-int drm_lock_free(struct drm_lock_data *lock_data, unsigned int context)
-{
- volatile unsigned int *lock = &lock_data->hw_lock->lock;
- unsigned int old, new;
-
- lock_data->file_priv = NULL;
- do {
- old = *lock;
- new = 0;
- } while (!atomic_cmpset_int(lock, old, new));
-
- if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) {
- DRM_ERROR("%d freed heavyweight lock held by %d\n",
- context, _DRM_LOCKING_CONTEXT(old));
- return 1;
- }
- DRM_WAKEUP_INT((void *)&lock_data->lock_queue);
- return 0;
-}
+++ /dev/null
-/*-
- *Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-/** @file drm_memory.c
- * Wrappers for kernel memory allocation routines, and MTRR management support.
- *
- * This file previously implemented a memory consumption tracking system using
- * the "area" argument for various different types of allocations, but that
- * has been stripped out for now.
- */
-
-#include "drmP.h"
-
-MALLOC_DEFINE(DRM_MEM_DMA, "drm_dma", "DRM DMA Data Structures");
-MALLOC_DEFINE(DRM_MEM_SAREA, "drm_sarea", "DRM SAREA Data Structures");
-MALLOC_DEFINE(DRM_MEM_DRIVER, "drm_driver", "DRM DRIVER Data Structures");
-MALLOC_DEFINE(DRM_MEM_MAGIC, "drm_magic", "DRM MAGIC Data Structures");
-MALLOC_DEFINE(DRM_MEM_IOCTLS, "drm_ioctls", "DRM IOCTL Data Structures");
-MALLOC_DEFINE(DRM_MEM_MAPS, "drm_maps", "DRM MAP Data Structures");
-MALLOC_DEFINE(DRM_MEM_BUFS, "drm_bufs", "DRM BUFFER Data Structures");
-MALLOC_DEFINE(DRM_MEM_SEGS, "drm_segs", "DRM SEGMENTS Data Structures");
-MALLOC_DEFINE(DRM_MEM_PAGES, "drm_pages", "DRM PAGES Data Structures");
-MALLOC_DEFINE(DRM_MEM_FILES, "drm_files", "DRM FILE Data Structures");
-MALLOC_DEFINE(DRM_MEM_QUEUES, "drm_queues", "DRM QUEUE Data Structures");
-MALLOC_DEFINE(DRM_MEM_CMDS, "drm_cmds", "DRM COMMAND Data Structures");
-MALLOC_DEFINE(DRM_MEM_MAPPINGS, "drm_mapping", "DRM MAPPING Data Structures");
-MALLOC_DEFINE(DRM_MEM_BUFLISTS, "drm_buflists", "DRM BUFLISTS Data Structures");
-MALLOC_DEFINE(DRM_MEM_AGPLISTS, "drm_agplists", "DRM AGPLISTS Data Structures");
-MALLOC_DEFINE(DRM_MEM_CTXBITMAP, "drm_ctxbitmap",
- "DRM CTXBITMAP Data Structures");
-MALLOC_DEFINE(DRM_MEM_SGLISTS, "drm_sglists", "DRM SGLISTS Data Structures");
-MALLOC_DEFINE(DRM_MEM_DRAWABLE, "drm_drawable", "DRM DRAWABLE Data Structures");
-
-void drm_mem_init(void)
-{
-}
-
-void drm_mem_uninit(void)
-{
-}
-
-void *drm_ioremap_wc(struct drm_device *dev, drm_local_map_t *map)
-{
- return pmap_mapdev_attr(map->offset, map->size, PAT_WRITE_COMBINING);
-}
-
-void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map)
-{
- return pmap_mapdev(map->offset, map->size);
-}
-
-void drm_ioremapfree(drm_local_map_t *map)
-{
- pmap_unmapdev((vm_offset_t) map->handle, map->size);
-}
-
-int
-drm_mtrr_add(unsigned long offset, size_t size, int flags)
-{
- int act;
- struct mem_range_desc mrdesc;
-
- mrdesc.mr_base = offset;
- mrdesc.mr_len = size;
- mrdesc.mr_flags = flags;
- act = MEMRANGE_SET_UPDATE;
- strlcpy(mrdesc.mr_owner, "drm", sizeof(mrdesc.mr_owner));
- return mem_range_attr_set(&mrdesc, &act);
-}
-
-int
-drm_mtrr_del(int __unused handle, unsigned long offset, size_t size, int flags)
-{
- int act;
- struct mem_range_desc mrdesc;
-
- mrdesc.mr_base = offset;
- mrdesc.mr_len = size;
- mrdesc.mr_flags = flags;
- act = MEMRANGE_SET_REMOVE;
- strlcpy(mrdesc.mr_owner, "drm", sizeof(mrdesc.mr_owner));
- return mem_range_attr_set(&mrdesc, &act);
-}
+++ /dev/null
-../shared-core/drm_mode.h
\ No newline at end of file
+++ /dev/null
-/*-
- * Copyright 2003 Eric Anholt.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/**
- * \file drm_pci.h
- * \brief PCI consistent, DMA-accessible memory allocation.
- *
- * \author Eric Anholt <anholt@FreeBSD.org>
- */
-
-#include "drmP.h"
-
-/**********************************************************************/
-/** \name PCI memory */
-/*@{*/
-
-static void
-drm_pci_busdma_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
-{
- drm_dma_handle_t *dmah = arg;
-
- if (error != 0)
- return;
-
- KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count"));
- dmah->busaddr = segs[0].ds_addr;
-}
-
-/**
- * \brief Allocate a physically contiguous DMA-accessible consistent
- * memory block.
- */
-drm_dma_handle_t *
-drm_pci_alloc(struct drm_device *dev, size_t size,
- size_t align, dma_addr_t maxaddr)
-{
- drm_dma_handle_t *dmah;
- int ret;
-
- /* Need power-of-two alignment, so fail the allocation if it isn't. */
- if ((align & (align - 1)) != 0) {
- DRM_ERROR("drm_pci_alloc with non-power-of-two alignment %d\n",
- (int)align);
- return NULL;
- }
-
- dmah = malloc(sizeof(drm_dma_handle_t), DRM_MEM_DMA, M_ZERO | M_NOWAIT);
- if (dmah == NULL)
- return NULL;
-
- /* Make sure we aren't holding locks here */
- mtx_assert(&dev->dev_lock, MA_NOTOWNED);
- if (mtx_owned(&dev->dev_lock))
- DRM_ERROR("called while holding dev_lock\n");
- mtx_assert(&dev->dma_lock, MA_NOTOWNED);
- if (mtx_owned(&dev->dma_lock))
- DRM_ERROR("called while holding dma_lock\n");
-
- ret = bus_dma_tag_create(NULL, align, 0, /* tag, align, boundary */
- maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
- NULL, NULL, /* filtfunc, filtfuncargs */
- size, 1, size, /* maxsize, nsegs, maxsegsize */
- 0, NULL, NULL, /* flags, lockfunc, lockfuncargs */
- &dmah->tag);
- if (ret != 0) {
- free(dmah, DRM_MEM_DMA);
- return NULL;
- }
-
- ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr,
- BUS_DMA_WAITOK | BUS_DMA_ZERO, &dmah->map);
- if (ret != 0) {
- bus_dma_tag_destroy(dmah->tag);
- free(dmah, DRM_MEM_DMA);
- return NULL;
- }
-
- ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, size,
- drm_pci_busdma_callback, dmah, BUS_DMA_NOWAIT | BUS_DMA_NOCACHE);
- if (ret != 0) {
- bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
- bus_dma_tag_destroy(dmah->tag);
- free(dmah, DRM_MEM_DMA);
- return NULL;
- }
-
- return dmah;
-}
-
-/**
- * \brief Free a DMA-accessible consistent memory block.
- */
-void
-drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah)
-{
- if (dmah == NULL)
- return;
-
- bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
- bus_dma_tag_destroy(dmah->tag);
-
- free(dmah, DRM_MEM_DMA);
-}
-
-/*@}*/
+++ /dev/null
-../shared-core/drm_sarea.h
\ No newline at end of file
+++ /dev/null
-/*-
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- * Eric Anholt <anholt@FreeBSD.org>
- *
- */
-
-/** @file drm_scatter.c
- * Allocation of memory for scatter-gather mappings by the graphics chip.
- *
- * The memory allocated here is then made into an aperture in the card
- * by drm_ati_pcigart_init().
- */
-
-#include "drmP.h"
-
-static void drm_sg_alloc_cb(void *arg, bus_dma_segment_t *segs,
- int nsegs, int error);
-
-int
-drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather *request)
-{
- struct drm_sg_mem *entry;
- struct drm_dma_handle *dmah;
- unsigned long pages;
- int ret;
-
- if (dev->sg)
- return EINVAL;
-
- entry = malloc(sizeof(*entry), DRM_MEM_SGLISTS, M_WAITOK | M_ZERO);
- if (!entry)
- return ENOMEM;
-
- pages = round_page(request->size) / PAGE_SIZE;
- DRM_DEBUG("sg size=%ld pages=%ld\n", request->size, pages);
-
- entry->pages = pages;
-
- entry->busaddr = malloc(pages * sizeof(*entry->busaddr), DRM_MEM_PAGES,
- M_WAITOK | M_ZERO);
- if (!entry->busaddr) {
- free(entry, DRM_MEM_SGLISTS);
- return ENOMEM;
- }
-
- dmah = malloc(sizeof(struct drm_dma_handle), DRM_MEM_DMA,
- M_ZERO | M_NOWAIT);
- if (dmah == NULL) {
- free(entry->busaddr, DRM_MEM_PAGES);
- free(entry, DRM_MEM_SGLISTS);
- return ENOMEM;
- }
-
- ret = bus_dma_tag_create(NULL, PAGE_SIZE, 0, /* tag, align, boundary */
- BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
- NULL, NULL, /* filtfunc, filtfuncargs */
- request->size, pages, /* maxsize, nsegs */
- PAGE_SIZE, 0, /* maxsegsize, flags */
- NULL, NULL, /* lockfunc, lockfuncargs */
- &dmah->tag);
- if (ret != 0) {
- free(dmah, DRM_MEM_DMA);
- free(entry->busaddr, DRM_MEM_PAGES);
- free(entry, DRM_MEM_SGLISTS);
- return ENOMEM;
- }
-
- ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr,
- BUS_DMA_WAITOK | BUS_DMA_ZERO, &dmah->map);
- if (ret != 0) {
- bus_dma_tag_destroy(dmah->tag);
- free(dmah, DRM_MEM_DMA);
- free(entry->busaddr, DRM_MEM_PAGES);
- free(entry, DRM_MEM_SGLISTS);
- return ENOMEM;
- }
-
- ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr,
- request->size, drm_sg_alloc_cb, entry,
- BUS_DMA_NOWAIT | BUS_DMA_NOCACHE);
- if (ret != 0) {
- bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
- bus_dma_tag_destroy(dmah->tag);
- free(dmah, DRM_MEM_DMA);
- free(entry->busaddr, DRM_MEM_PAGES);
- free(entry, DRM_MEM_SGLISTS);
- return ENOMEM;
- }
-
- entry->sg_dmah = dmah;
- entry->handle = (unsigned long)dmah->vaddr;
-
- DRM_DEBUG("sg alloc handle = %08lx\n", entry->handle);
-
- entry->virtual = (void *)entry->handle;
- request->handle = entry->handle;
-
- DRM_LOCK();
- if (dev->sg) {
- DRM_UNLOCK();
- drm_sg_cleanup(entry);
- return EINVAL;
- }
- dev->sg = entry;
- DRM_UNLOCK();
-
- return 0;
-}
-
-static void
-drm_sg_alloc_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
-{
- struct drm_sg_mem *entry = arg;
- int i;
-
- if (error != 0)
- return;
-
- for(i = 0 ; i < nsegs ; i++) {
- entry->busaddr[i] = segs[i].ds_addr;
- }
-}
-
-int
-drm_sg_alloc_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_scatter_gather *request = data;
-
- DRM_DEBUG("\n");
-
- return drm_sg_alloc(dev, request);
-}
-
-void
-drm_sg_cleanup(struct drm_sg_mem *entry)
-{
- struct drm_dma_handle *dmah = entry->sg_dmah;
-
- bus_dmamap_unload(dmah->tag, dmah->map);
- bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
- bus_dma_tag_destroy(dmah->tag);
- free(dmah, DRM_MEM_DMA);
- free(entry->busaddr, DRM_MEM_PAGES);
- free(entry, DRM_MEM_SGLISTS);
-}
-
-int
-drm_sg_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_scatter_gather *request = data;
- struct drm_sg_mem *entry;
-
- DRM_LOCK();
- entry = dev->sg;
- dev->sg = NULL;
- DRM_UNLOCK();
-
- if (!entry || entry->handle != request->handle)
- return EINVAL;
-
- DRM_DEBUG("sg free virtual = 0x%lx\n", entry->handle);
-
- drm_sg_cleanup(entry);
-
- return 0;
-}
+++ /dev/null
-/*-
- * Copyright 2003 Eric Anholt
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/** @file drm_sysctl.c
- * Implementation of various sysctls for controlling DRM behavior and reporting
- * debug information.
- */
-
-#include "drmP.h"
-#include "drm.h"
-
-#include <sys/sysctl.h>
-
-static int drm_name_info DRM_SYSCTL_HANDLER_ARGS;
-static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS;
-static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS;
-static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS;
-
-struct drm_sysctl_list {
- const char *name;
- int (*f) DRM_SYSCTL_HANDLER_ARGS;
-} drm_sysctl_list[] = {
- {"name", drm_name_info},
- {"vm", drm_vm_info},
- {"clients", drm_clients_info},
- {"bufs", drm_bufs_info},
-};
-#define DRM_SYSCTL_ENTRIES (sizeof(drm_sysctl_list)/sizeof(drm_sysctl_list[0]))
-
-struct drm_sysctl_info {
- struct sysctl_ctx_list ctx;
- char name[2];
-};
-
-int drm_sysctl_init(struct drm_device *dev)
-{
- struct drm_sysctl_info *info;
- struct sysctl_oid *oid;
- struct sysctl_oid *top, *drioid;
- int i;
-
- info = malloc(sizeof *info, DRM_MEM_DRIVER, M_WAITOK | M_ZERO);
- if ( !info )
- return 1;
- dev->sysctl = info;
-
- /* Add the sysctl node for DRI if it doesn't already exist */
- drioid = SYSCTL_ADD_NODE( &info->ctx, &sysctl__hw_children, OID_AUTO, "dri", CTLFLAG_RW, NULL, "DRI Graphics");
- if (!drioid)
- return 1;
-
- /* Find the next free slot under hw.dri */
- i = 0;
- SLIST_FOREACH(oid, SYSCTL_CHILDREN(drioid), oid_link) {
- if (i <= oid->oid_arg2)
- i = oid->oid_arg2 + 1;
- }
- if (i>9)
- return 1;
-
- /* Add the hw.dri.x for our device */
- info->name[0] = '0' + i;
- info->name[1] = 0;
- top = SYSCTL_ADD_NODE( &info->ctx, SYSCTL_CHILDREN(drioid), OID_AUTO, info->name, CTLFLAG_RW, NULL, NULL);
- if (!top)
- return 1;
-
- for (i = 0; i < DRM_SYSCTL_ENTRIES; i++) {
- oid = SYSCTL_ADD_OID(&info->ctx,
- SYSCTL_CHILDREN(top),
- OID_AUTO,
- drm_sysctl_list[i].name,
- CTLTYPE_INT | CTLFLAG_RD,
- dev,
- 0,
- drm_sysctl_list[i].f,
- "A",
- NULL);
- if (!oid)
- return 1;
- }
- SYSCTL_ADD_INT(&info->ctx, SYSCTL_CHILDREN(top), OID_AUTO, "debug",
- CTLFLAG_RW, &drm_debug_flag, sizeof(drm_debug_flag),
- "Enable debugging output");
-
- return 0;
-}
-
-int drm_sysctl_cleanup(struct drm_device *dev)
-{
- int error;
- error = sysctl_ctx_free( &dev->sysctl->ctx );
-
- free(dev->sysctl, DRM_MEM_DRIVER);
- dev->sysctl = NULL;
-
- return error;
-}
-
-#define DRM_SYSCTL_PRINT(fmt, arg...) \
-do { \
- snprintf(buf, sizeof(buf), fmt, ##arg); \
- retcode = SYSCTL_OUT(req, buf, strlen(buf)); \
- if (retcode) \
- goto done; \
-} while (0)
-
-static int drm_name_info DRM_SYSCTL_HANDLER_ARGS
-{
- struct drm_device *dev = arg1;
- char buf[128];
- int retcode;
- int hasunique = 0;
-
- DRM_SYSCTL_PRINT("%s 0x%x", dev->driver->name, dev2udev(dev->devnode));
-
- DRM_LOCK();
- if (dev->unique) {
- snprintf(buf, sizeof(buf), " %s", dev->unique);
- hasunique = 1;
- }
- DRM_UNLOCK();
-
- if (hasunique)
- SYSCTL_OUT(req, buf, strlen(buf));
-
- SYSCTL_OUT(req, "", 1);
-
-done:
- return retcode;
-}
-
-static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS
-{
- struct drm_device *dev = arg1;
- drm_local_map_t *map, *tempmaps;
- const char *types[] = { "FB", "REG", "SHM", "AGP", "SG" };
- const char *type, *yesno;
- int i, mapcount;
- char buf[128];
- int retcode;
-
- /* We can't hold the lock while doing SYSCTL_OUTs, so allocate a
- * temporary copy of all the map entries and then SYSCTL_OUT that.
- */
- DRM_LOCK();
-
- mapcount = 0;
- TAILQ_FOREACH(map, &dev->maplist, link)
- mapcount++;
-
- tempmaps = malloc(sizeof(drm_local_map_t) * mapcount, DRM_MEM_DRIVER,
- M_NOWAIT);
- if (tempmaps == NULL) {
- DRM_UNLOCK();
- return ENOMEM;
- }
-
- i = 0;
- TAILQ_FOREACH(map, &dev->maplist, link)
- tempmaps[i++] = *map;
-
- DRM_UNLOCK();
-
- DRM_SYSCTL_PRINT("\nslot offset size "
- "type flags address mtrr\n");
-
- for (i = 0; i < mapcount; i++) {
- map = &tempmaps[i];
-
- if (map->type < 0 || map->type > 4)
- type = "??";
- else
- type = types[map->type];
-
- if (!map->mtrr)
- yesno = "no";
- else
- yesno = "yes";
-
- DRM_SYSCTL_PRINT(
- "%4d 0x%016lx 0x%08lx %4.4s 0x%02x 0x%016lx %s\n", i,
- map->offset, map->size, type, map->flags,
- (unsigned long)map->handle, yesno);
- }
- SYSCTL_OUT(req, "", 1);
-
-done:
- free(tempmaps, DRM_MEM_DRIVER);
- return retcode;
-}
-
-static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS
-{
- struct drm_device *dev = arg1;
- drm_device_dma_t *dma = dev->dma;
- drm_device_dma_t tempdma;
- int *templists;
- int i;
- char buf[128];
- int retcode;
-
- /* We can't hold the locks around DRM_SYSCTL_PRINT, so make a temporary
- * copy of the whole structure and the relevant data from buflist.
- */
- DRM_LOCK();
- if (dma == NULL) {
- DRM_UNLOCK();
- return 0;
- }
- DRM_SPINLOCK(&dev->dma_lock);
- tempdma = *dma;
- templists = malloc(sizeof(int) * dma->buf_count, DRM_MEM_DRIVER,
- M_NOWAIT);
- for (i = 0; i < dma->buf_count; i++)
- templists[i] = dma->buflist[i]->list;
- dma = &tempdma;
- DRM_SPINUNLOCK(&dev->dma_lock);
- DRM_UNLOCK();
-
- DRM_SYSCTL_PRINT("\n o size count free segs pages kB\n");
- for (i = 0; i <= DRM_MAX_ORDER; i++) {
- if (dma->bufs[i].buf_count)
- DRM_SYSCTL_PRINT("%2d %8d %5d %5d %5d %5d %5d\n",
- i,
- dma->bufs[i].buf_size,
- dma->bufs[i].buf_count,
- atomic_read(&dma->bufs[i]
- .freelist.count),
- dma->bufs[i].seg_count,
- dma->bufs[i].seg_count
- *(1 << dma->bufs[i].page_order),
- (dma->bufs[i].seg_count
- * (1 << dma->bufs[i].page_order))
- * PAGE_SIZE / 1024);
- }
- DRM_SYSCTL_PRINT("\n");
- for (i = 0; i < dma->buf_count; i++) {
- if (i && !(i%32)) DRM_SYSCTL_PRINT("\n");
- DRM_SYSCTL_PRINT(" %d", templists[i]);
- }
- DRM_SYSCTL_PRINT("\n");
-
- SYSCTL_OUT(req, "", 1);
-done:
- free(templists, DRM_MEM_DRIVER);
- return retcode;
-}
-
-static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS
-{
- struct drm_device *dev = arg1;
- struct drm_file *priv, *tempprivs;
- char buf[128];
- int retcode;
- int privcount, i;
-
- DRM_LOCK();
-
- privcount = 0;
- TAILQ_FOREACH(priv, &dev->files, link)
- privcount++;
-
- tempprivs = malloc(sizeof(struct drm_file) * privcount, DRM_MEM_DRIVER,
- M_NOWAIT);
- if (tempprivs == NULL) {
- DRM_UNLOCK();
- return ENOMEM;
- }
- i = 0;
- TAILQ_FOREACH(priv, &dev->files, link)
- tempprivs[i++] = *priv;
-
- DRM_UNLOCK();
-
- DRM_SYSCTL_PRINT("\na dev pid uid magic ioctls\n");
- for (i = 0; i < privcount; i++) {
- priv = &tempprivs[i];
- DRM_SYSCTL_PRINT("%c %3d %5d %5d %10u %10lu\n",
- priv->authenticated ? 'y' : 'n',
- priv->minor,
- priv->pid,
- priv->uid,
- priv->magic,
- priv->ioctl_count);
- }
-
- SYSCTL_OUT(req, "", 1);
-done:
- free(tempprivs, DRM_MEM_DRIVER);
- return retcode;
-}
+++ /dev/null
-/*-
- * Copyright 2003 Eric Anholt
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/** @file drm_vm.c
- * Support code for mmaping of DRM maps.
- */
-
-#include "drmP.h"
-#include "drm.h"
-
-int drm_mmap(struct cdev *kdev, vm_offset_t offset, vm_paddr_t *paddr,
- int prot)
-{
- struct drm_device *dev = drm_get_device_from_kdev(kdev);
- struct drm_file *file_priv = NULL;
- drm_local_map_t *map;
- enum drm_map_type type;
- vm_paddr_t phys;
- int error;
-
- /* d_mmap gets called twice, we can only reference file_priv during
- * the first call. We need to assume that if error is EBADF the
- * call was succesful and the client is authenticated.
- */
- error = devfs_get_cdevpriv((void **)&file_priv);
- if (error == ENOENT) {
- DRM_ERROR("Could not find authenticator!\n");
- return EINVAL;
- }
-
- if (file_priv && !file_priv->authenticated)
- return EACCES;
-
- if (dev->dma && offset >= 0 && offset < ptoa(dev->dma->page_count)) {
- drm_device_dma_t *dma = dev->dma;
-
- DRM_SPINLOCK(&dev->dma_lock);
-
- if (dma->pagelist != NULL) {
- unsigned long page = offset >> PAGE_SHIFT;
- unsigned long phys = dma->pagelist[page];
-
- DRM_SPINUNLOCK(&dev->dma_lock);
- *paddr = phys;
- return 0;
- } else {
- DRM_SPINUNLOCK(&dev->dma_lock);
- return -1;
- }
- }
-
- /* A sequential search of a linked list is
- fine here because: 1) there will only be
- about 5-10 entries in the list and, 2) a
- DRI client only has to do this mapping
- once, so it doesn't have to be optimized
- for performance, even if the list was a
- bit longer. */
- DRM_LOCK();
- TAILQ_FOREACH(map, &dev->maplist, link) {
- if (offset >= map->offset && offset < map->offset + map->size)
- break;
- }
-
- if (map == NULL) {
- DRM_DEBUG("Can't find map, requested offset = %016lx\n",
- offset);
- TAILQ_FOREACH(map, &dev->maplist, link) {
- DRM_DEBUG("map offset = %016lx, handle = %016lx\n",
- map->offset, (unsigned long)map->handle);
- }
- DRM_UNLOCK();
- return -1;
- }
- if (((map->flags&_DRM_RESTRICTED) && !DRM_SUSER(DRM_CURPROC))) {
- DRM_UNLOCK();
- DRM_DEBUG("restricted map\n");
- return -1;
- }
- type = map->type;
- DRM_UNLOCK();
-
- switch (type) {
- case _DRM_FRAME_BUFFER:
- case _DRM_REGISTERS:
- case _DRM_AGP:
- phys = offset;
- break;
- case _DRM_CONSISTENT:
- phys = vtophys((char *)map->handle + (offset - map->offset));
- break;
- case _DRM_SCATTER_GATHER:
- case _DRM_SHM:
- phys = vtophys(offset);
- break;
- default:
- DRM_ERROR("bad map type %d\n", type);
- return -1; /* This should never happen. */
- }
-
- *paddr = phys;
- return 0;
-}
-
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD = i915
-NO_MAN = YES
-SRCS = i915_dma.c i915_drv.c i915_irq.c i915_mem.c i915_suspend.c
-SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS += ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-../shared-core/i915_dma.c
\ No newline at end of file
+++ /dev/null
-../shared-core/i915_drm.h
\ No newline at end of file
+++ /dev/null
-/* i915_drv.c -- Intel i915 driver -*- linux-c -*-
- * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com
- */
-/*-
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "i915_drm.h"
-#include "i915_drv.h"
-#include "drm_pciids.h"
-
-/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
-static drm_pci_id_list_t i915_pciidlist[] = {
- i915_PCI_IDS
-};
-
-static int i915_suspend(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- if (!dev || !dev_priv) {
- DRM_ERROR("dev: 0x%lx, dev_priv: 0x%lx\n",
- (unsigned long) dev, (unsigned long) dev_priv);
- DRM_ERROR("DRM not initialized, aborting suspend.\n");
- return -ENODEV;
- }
-
- i915_save_state(dev);
-
- return (bus_generic_suspend(kdev));
-}
-
-static int i915_resume(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- i915_restore_state(dev);
-
- return (bus_generic_resume(kdev));
-}
-
-static void i915_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
- DRIVER_HAVE_IRQ;
-
- dev->driver->buf_priv_size = sizeof(drm_i915_private_t);
- dev->driver->load = i915_driver_load;
- dev->driver->unload = i915_driver_unload;
- dev->driver->preclose = i915_driver_preclose;
- dev->driver->lastclose = i915_driver_lastclose;
- dev->driver->device_is_agp = i915_driver_device_is_agp;
- dev->driver->enable_vblank = i915_enable_vblank;
- dev->driver->disable_vblank = i915_disable_vblank;
- dev->driver->irq_preinstall = i915_driver_irq_preinstall;
- dev->driver->irq_postinstall = i915_driver_irq_postinstall;
- dev->driver->irq_uninstall = i915_driver_irq_uninstall;
- dev->driver->irq_handler = i915_driver_irq_handler;
-
- dev->driver->ioctls = i915_ioctls;
- dev->driver->max_ioctl = i915_max_ioctl;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-i915_probe(device_t kdev)
-{
- return drm_probe(kdev, i915_pciidlist);
-}
-
-static int
-i915_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- i915_configure(dev);
-
- return drm_attach(kdev, i915_pciidlist);
-}
-
-static int
-i915_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t i915_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, i915_probe),
- DEVMETHOD(device_attach, i915_attach),
- DEVMETHOD(device_suspend, i915_suspend),
- DEVMETHOD(device_resume, i915_resume),
- DEVMETHOD(device_detach, i915_detach),
-
- { 0, 0 }
-};
-
-static driver_t i915_driver = {
-#if __FreeBSD_version >= 700010
- "drm",
-#else
- "drmsub",
-#endif
- i915_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-#if __FreeBSD_version >= 700010
-DRIVER_MODULE(i915, vgapci, i915_driver, drm_devclass, 0, 0);
-#else
-DRIVER_MODULE(i915, agp, i915_driver, drm_devclass, 0, 0);
-#endif
-MODULE_DEPEND(i915, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/i915_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/i915_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/i915_mem.c
\ No newline at end of file
+++ /dev/null
-../shared-core/i915_reg.h
\ No newline at end of file
+++ /dev/null
-../shared-core/i915_suspend.c
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD = mach64
-NO_MAN = YES
-SRCS = mach64_dma.c mach64_drv.c mach64_irq.c mach64_state.c
-SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS += ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-../shared-core/mach64_dma.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mach64_drm.h
\ No newline at end of file
+++ /dev/null
-/* mach64_drv.c -- ATI Rage 128 driver -*- linux-c -*-
- * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com
- */
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- */
-
-
-#include <sys/types.h>
-
-#include "drmP.h"
-#include "drm.h"
-#include "mach64_drm.h"
-#include "mach64_drv.h"
-#include "drm_pciids.h"
-
-/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
-static drm_pci_id_list_t mach64_pciidlist[] = {
- mach64_PCI_IDS
-};
-
-static void mach64_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
- DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ;
-
- dev->driver->buf_priv_size = 1; /* No dev_priv */
- dev->driver->load = mach64_driver_load;
- dev->driver->lastclose = mach64_driver_lastclose;
- dev->driver->get_vblank_counter = mach64_get_vblank_counter;
- dev->driver->enable_vblank = mach64_enable_vblank;
- dev->driver->disable_vblank = mach64_disable_vblank;
- dev->driver->irq_preinstall = mach64_driver_irq_preinstall;
- dev->driver->irq_postinstall = mach64_driver_irq_postinstall;
- dev->driver->irq_uninstall = mach64_driver_irq_uninstall;
- dev->driver->irq_handler = mach64_driver_irq_handler;
- dev->driver->dma_ioctl = mach64_dma_buffers;
-
- dev->driver->ioctls = mach64_ioctls;
- dev->driver->max_ioctl = mach64_max_ioctl;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-mach64_probe(device_t kdev)
-{
- return drm_probe(kdev, mach64_pciidlist);
-}
-
-static int
-mach64_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- mach64_configure(dev);
-
- return drm_attach(kdev, mach64_pciidlist);
-}
-
-int
-mach64_driver_load(struct drm_device * dev, unsigned long flags)
-{
- return drm_vblank_init(dev, 1);
-}
-
-static int
-mach64_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t mach64_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, mach64_probe),
- DEVMETHOD(device_attach, mach64_attach),
- DEVMETHOD(device_detach, mach64_detach),
-
- { 0, 0 }
-};
-
-static driver_t mach64_driver = {
- "drm",
- mach64_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-#if __FreeBSD_version >= 700010
-DRIVER_MODULE(mach64, vgapci, mach64_driver, drm_devclass, 0, 0);
-#else
-DRIVER_MODULE(mach64, pci, mach64_driver, drm_devclass, 0, 0);
-#endif
-MODULE_DEPEND(mach64, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/mach64_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/mach64_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mach64_state.c
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD= mga
-NO_MAN= YES
-SRCS= mga_drv.c mga_state.c mga_warp.c mga_dma.c mga_irq.c
-SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS+= ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-../shared-core/mga_dma.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_drm.h
\ No newline at end of file
+++ /dev/null
-/* mga_drv.c -- Matrox G200/G400 driver -*- linux-c -*-
- * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
- */
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "mga_drm.h"
-#include "mga_drv.h"
-#include "drm_pciids.h"
-
-/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
-static drm_pci_id_list_t mga_pciidlist[] = {
- mga_PCI_IDS
-};
-
-/**
- * Determine if the device really is AGP or not.
- *
- * In addition to the usual tests performed by \c drm_device_is_agp, this
- * function detects PCI G450 cards that appear to the system exactly like
- * AGP G450 cards.
- *
- * \param dev The device to be tested.
- *
- * \returns
- * If the device is a PCI G450, zero is returned. Otherwise non-zero is
- * returned.
- *
- * \bug
- * This function needs to be filled in! The implementation in
- * linux-core/mga_drv.c shows what needs to be done.
- */
-static int mga_driver_device_is_agp(struct drm_device * dev)
-{
- device_t bus;
-
- /* There are PCI versions of the G450. These cards have the
- * same PCI ID as the AGP G450, but have an additional PCI-to-PCI
- * bridge chip. We detect these cards, which are not currently
- * supported by this driver, by looking at the device ID of the
- * bus the "card" is on. If vendor is 0x3388 (Hint Corp) and the
- * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the
- * device.
- */
-#if __FreeBSD_version >= 700010
- bus = device_get_parent(device_get_parent(dev->device));
-#else
- bus = device_get_parent(dev->device);
-#endif
- if (pci_get_device(dev->device) == 0x0525 &&
- pci_get_vendor(bus) == 0x3388 &&
- pci_get_device(bus) == 0x0021)
- return DRM_IS_NOT_AGP;
- else
- return DRM_MIGHT_BE_AGP;
-}
-
-static void mga_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
- DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ;
-
- dev->driver->buf_priv_size = sizeof(drm_mga_buf_priv_t);
- dev->driver->load = mga_driver_load;
- dev->driver->unload = mga_driver_unload;
- dev->driver->lastclose = mga_driver_lastclose;
- dev->driver->get_vblank_counter = mga_get_vblank_counter;
- dev->driver->enable_vblank = mga_enable_vblank;
- dev->driver->disable_vblank = mga_disable_vblank;
- dev->driver->irq_preinstall = mga_driver_irq_preinstall;
- dev->driver->irq_postinstall = mga_driver_irq_postinstall;
- dev->driver->irq_uninstall = mga_driver_irq_uninstall;
- dev->driver->irq_handler = mga_driver_irq_handler;
- dev->driver->dma_ioctl = mga_dma_buffers;
- dev->driver->dma_quiescent = mga_driver_dma_quiescent;
- dev->driver->device_is_agp = mga_driver_device_is_agp;
-
- dev->driver->ioctls = mga_ioctls;
- dev->driver->max_ioctl = mga_max_ioctl;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-mga_probe(device_t kdev)
-{
- return drm_probe(kdev, mga_pciidlist);
-}
-
-static int
-mga_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- mga_configure(dev);
-
- return drm_attach(kdev, mga_pciidlist);
-}
-
-static int
-mga_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t mga_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, mga_probe),
- DEVMETHOD(device_attach, mga_attach),
- DEVMETHOD(device_detach, mga_detach),
-
- { 0, 0 }
-};
-
-static driver_t mga_driver = {
- "drm",
- mga_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-#if __FreeBSD_version >= 700010
-DRIVER_MODULE(mga, vgapci, mga_driver, drm_devclass, 0, 0);
-#else
-DRIVER_MODULE(mga, pci, mga_driver, drm_devclass, 0, 0);
-#endif
-MODULE_DEPEND(mga, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/mga_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_state.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_ucode.h
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_warp.c
\ No newline at end of file
+++ /dev/null
-/usr/src/sys
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD = nouveau
-NO_MAN = YES
-SRCS = nouveau_drv.c nouveau_state.c nouveau_mem.c nouveau_object.c \
- nouveau_sgdma.c nouveau_fifo.c nouveau_notifier.c nouveau_dma.c \
- nouveau_irq.c nouveau_swmthd.c \
- nv04_timer.c \
- nv04_mc.c nv40_mc.c nv50_mc.c \
- nv04_fb.c nv10_fb.c nv40_fb.c \
- nv04_fifo.c nv10_fifo.c nv40_fifo.c nv50_fifo.c \
- nv04_graph.c nv10_graph.c nv20_graph.c \
- nv40_graph.c nv50_graph.c \
- nv04_instmem.c nv50_instmem.c
-# nouveau_bo.c nouveau_fence.c \
-SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS += ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-/usr/src/sys/amd64/include
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_dma.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_dma.h
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_drm.h
\ No newline at end of file
+++ /dev/null
-/* nouveau_drv.c.c -- nouveau nouveau driver -*- linux-c -*-
- * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com
- */
-/*-
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "drm_pciids.h"
-
-extern struct drm_ioctl_desc nouveau_ioctls[];
-extern int nouveau_max_ioctl;
-
-/* drv_PCI_IDs for nouveau is just to match the vendor id */
-static struct drm_pci_id_list nouveau_pciidlist[] = {
- {0x10DE, 0, 0, "NVidia Display Adapter"}, \
- {0, 0, 0, NULL}
-};
-
-static void nouveau_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | DRIVER_HAVE_IRQ;
-
- dev->driver->buf_priv_size = sizeof(struct drm_nouveau_private);
- dev->driver->load = nouveau_load;
- dev->driver->unload = nouveau_unload;
- dev->driver->firstopen = nouveau_firstopen;
- dev->driver->preclose = nouveau_preclose;
- dev->driver->lastclose = nouveau_lastclose;
- dev->driver->irq_preinstall = nouveau_irq_preinstall;
- dev->driver->irq_postinstall = nouveau_irq_postinstall;
- dev->driver->irq_uninstall = nouveau_irq_uninstall;
- dev->driver->irq_handler = nouveau_irq_handler;
-
- dev->driver->ioctls = nouveau_ioctls;
- dev->driver->max_ioctl = nouveau_max_ioctl;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-nouveau_probe(device_t kdev)
-{
- int vendor;
-
- if (pci_get_class(kdev) == PCIC_DISPLAY) {
- vendor = pci_get_vendor(kdev);
- if (vendor == 0x10de) {
-
- const char *ident;
- char model[64];
-
- if (pci_get_vpd_ident(kdev, &ident) == 0) {
- snprintf(model, 64, "%s", ident);
- device_set_desc_copy(kdev, model);
- DRM_DEBUG("VPD : %s\n", model);
- }
-
- return drm_probe(kdev, nouveau_pciidlist);
- }
- }
- return ENXIO;
-}
-
-static int
-nouveau_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- nouveau_configure(dev);
-
- return drm_attach(kdev, nouveau_pciidlist);
-}
-
-static int
-nouveau_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t nouveau_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, nouveau_probe),
- DEVMETHOD(device_attach, nouveau_attach),
- DEVMETHOD(device_detach, nouveau_detach),
-
- { 0, 0 }
-};
-
-static driver_t nouveau_driver = {
-#if __FreeBSD_version >= 700010
- "drm",
-#else
- "drmsub",
-#endif
- nouveau_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-#if __FreeBSD_version >= 700010
-DRIVER_MODULE(nouveau, vgapci, nouveau_driver, drm_devclass, 0, 0);
-#else
-DRIVER_MODULE(nouveau, agp, nouveau_driver, drm_devclass, 0, 0);
-#endif
-MODULE_DEPEND(nouveau, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/nouveau_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_fifo.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_mem.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_notifier.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_object.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_reg.h
\ No newline at end of file
+++ /dev/null
-#include "drmP.h"
-#include "nouveau_drv.h"
-
-#define NV_CTXDMA_PAGE_SHIFT 12
-#define NV_CTXDMA_PAGE_SIZE (1 << NV_CTXDMA_PAGE_SHIFT)
-#define NV_CTXDMA_PAGE_MASK (NV_CTXDMA_PAGE_SIZE - 1)
-
-#if 0
-struct nouveau_sgdma_be {
- struct drm_ttm_backend backend;
- struct drm_device *dev;
-
- int pages;
- int pages_populated;
- dma_addr_t *pagelist;
- int is_bound;
-
- unsigned int pte_start;
-};
-
-static int
-nouveau_sgdma_needs_ub_cache_adjust(struct drm_ttm_backend *be)
-{
- return ((be->flags & DRM_BE_FLAG_BOUND_CACHED) ? 0 : 1);
-}
-
-static int
-nouveau_sgdma_populate(struct drm_ttm_backend *be, unsigned long num_pages,
- struct page **pages, struct page *dummy_read_page)
-{
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
- int p, d, o;
-
- DRM_DEBUG("num_pages = %ld\n", num_pages);
-
- if (nvbe->pagelist)
- return -EINVAL;
- nvbe->pages = (num_pages << PAGE_SHIFT) >> NV_CTXDMA_PAGE_SHIFT;
- nvbe->pagelist = drm_alloc(nvbe->pages*sizeof(dma_addr_t),
- DRM_MEM_PAGES);
-
- nvbe->pages_populated = d = 0;
- for (p = 0; p < num_pages; p++) {
- for (o = 0; o < PAGE_SIZE; o += NV_CTXDMA_PAGE_SIZE) {
- struct page *page = pages[p];
- if (!page)
- page = dummy_read_page;
-#ifdef __linux__
- nvbe->pagelist[d] = pci_map_page(nvbe->dev->pdev,
- page, o,
- NV_CTXDMA_PAGE_SIZE,
- PCI_DMA_BIDIRECTIONAL);
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))
- if (pci_dma_mapping_error(nvbe->dev->pdev, nvbe->pagelist[d])) {
-#else
- if (pci_dma_mapping_error(nvbe->pagelist[d])) {
-#endif
- be->func->clear(be);
- DRM_ERROR("pci_map_page failed\n");
- return -EINVAL;
- }
-#endif
- nvbe->pages_populated = ++d;
- }
- }
-
- return 0;
-}
-
-static void
-nouveau_sgdma_clear(struct drm_ttm_backend *be)
-{
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
-#ifdef __linux__
- int d;
-#endif
- DRM_DEBUG("\n");
-
- if (nvbe && nvbe->pagelist) {
- if (nvbe->is_bound)
- be->func->unbind(be);
-#ifdef __linux__
- for (d = 0; d < nvbe->pages_populated; d++) {
- pci_unmap_page(nvbe->dev->pdev, nvbe->pagelist[d],
- NV_CTXDMA_PAGE_SIZE,
- PCI_DMA_BIDIRECTIONAL);
- }
-#endif
- drm_free(nvbe->pagelist, nvbe->pages*sizeof(dma_addr_t),
- DRM_MEM_PAGES);
- }
-}
-
-static int
-nouveau_sgdma_bind(struct drm_ttm_backend *be, struct drm_bo_mem_reg *mem)
-{
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
- struct drm_nouveau_private *dev_priv = nvbe->dev->dev_private;
- struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
- uint64_t offset = (mem->mm_node->start << PAGE_SHIFT);
- uint32_t i;
-
- DRM_DEBUG("pg=0x%lx (0x%llx), cached=%d\n", mem->mm_node->start,
- (unsigned long long)offset,
- (mem->flags & DRM_BO_FLAG_CACHED) == 1);
-
- if (offset & NV_CTXDMA_PAGE_MASK)
- return -EINVAL;
- nvbe->pte_start = (offset >> NV_CTXDMA_PAGE_SHIFT);
- if (dev_priv->card_type < NV_50)
- nvbe->pte_start += 2; /* skip ctxdma header */
-
- for (i = nvbe->pte_start; i < nvbe->pte_start + nvbe->pages; i++) {
- uint64_t pteval = nvbe->pagelist[i - nvbe->pte_start];
-
- if (pteval & NV_CTXDMA_PAGE_MASK) {
- DRM_ERROR("Bad pteval 0x%llx\n",
- (unsigned long long)pteval);
- return -EINVAL;
- }
-
- if (dev_priv->card_type < NV_50) {
- INSTANCE_WR(gpuobj, i, pteval | 3);
- } else {
- INSTANCE_WR(gpuobj, (i<<1)+0, pteval | 0x21);
- INSTANCE_WR(gpuobj, (i<<1)+1, 0x00000000);
- }
- }
-
- nvbe->is_bound = 1;
- return 0;
-}
-
-static int
-nouveau_sgdma_unbind(struct drm_ttm_backend *be)
-{
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
- struct drm_nouveau_private *dev_priv = nvbe->dev->dev_private;
-
- DRM_DEBUG("\n");
-
- if (nvbe->is_bound) {
- struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
- unsigned int pte;
-
- pte = nvbe->pte_start;
- while (pte < (nvbe->pte_start + nvbe->pages)) {
- uint64_t pteval = dev_priv->gart_info.sg_dummy_bus;
-
- if (dev_priv->card_type < NV_50) {
- INSTANCE_WR(gpuobj, pte, pteval | 3);
- } else {
- INSTANCE_WR(gpuobj, (pte<<1)+0, pteval | 0x21);
- INSTANCE_WR(gpuobj, (pte<<1)+1, 0x00000000);
- }
-
- pte++;
- }
-
- nvbe->is_bound = 0;
- }
-
- return 0;
-}
-
-static void
-nouveau_sgdma_destroy(struct drm_ttm_backend *be)
-{
- DRM_DEBUG("\n");
- if (be) {
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
- if (nvbe) {
- if (nvbe->pagelist)
- be->func->clear(be);
- drm_ctl_free(nvbe, sizeof(*nvbe), DRM_MEM_TTM);
- }
- }
-}
-
-static struct drm_ttm_backend_func nouveau_sgdma_backend = {
- .needs_ub_cache_adjust = nouveau_sgdma_needs_ub_cache_adjust,
- .populate = nouveau_sgdma_populate,
- .clear = nouveau_sgdma_clear,
- .bind = nouveau_sgdma_bind,
- .unbind = nouveau_sgdma_unbind,
- .destroy = nouveau_sgdma_destroy
-};
-
-struct drm_ttm_backend *
-nouveau_sgdma_init_ttm(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_sgdma_be *nvbe;
-
- if (!dev_priv->gart_info.sg_ctxdma)
- return NULL;
-
- nvbe = drm_ctl_calloc(1, sizeof(*nvbe), DRM_MEM_TTM);
- if (!nvbe)
- return NULL;
-
- nvbe->dev = dev;
-
- nvbe->backend.func = &nouveau_sgdma_backend;
-
- return &nvbe->backend;
-}
-#endif
-
-int
-nouveau_sgdma_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *gpuobj = NULL;
- uint32_t aper_size, obj_size;
- int i, ret;
-
- if (dev_priv->card_type < NV_50) {
- aper_size = (64 * 1024 * 1024);
- obj_size = (aper_size >> NV_CTXDMA_PAGE_SHIFT) * 4;
- obj_size += 8; /* ctxdma header */
- } else {
- /* 1 entire VM page table */
- aper_size = (512 * 1024 * 1024);
- obj_size = (aper_size >> NV_CTXDMA_PAGE_SHIFT) * 8;
- }
-
- if ((ret = nouveau_gpuobj_new(dev, NULL, obj_size, 16,
- NVOBJ_FLAG_ALLOW_NO_REFS |
- NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ZERO_FREE, &gpuobj))) {
- DRM_ERROR("Error creating sgdma object: %d\n", ret);
- return ret;
- }
-#ifdef __linux__
- dev_priv->gart_info.sg_dummy_page =
- alloc_page(GFP_KERNEL|__GFP_DMA32);
- set_page_locked(dev_priv->gart_info.sg_dummy_page);
- dev_priv->gart_info.sg_dummy_bus =
- pci_map_page(dev->pdev, dev_priv->gart_info.sg_dummy_page, 0,
- PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
-#endif
- if (dev_priv->card_type < NV_50) {
- /* Maybe use NV_DMA_TARGET_AGP for PCIE? NVIDIA do this, and
- * confirmed to work on c51. Perhaps means NV_DMA_TARGET_PCIE
- * on those cards? */
- INSTANCE_WR(gpuobj, 0, NV_CLASS_DMA_IN_MEMORY |
- (1 << 12) /* PT present */ |
- (0 << 13) /* PT *not* linear */ |
- (NV_DMA_ACCESS_RW << 14) |
- (NV_DMA_TARGET_PCI << 16));
- INSTANCE_WR(gpuobj, 1, aper_size - 1);
- for (i=2; i<2+(aper_size>>12); i++) {
- INSTANCE_WR(gpuobj, i,
- dev_priv->gart_info.sg_dummy_bus | 3);
- }
- } else {
- for (i=0; i<obj_size; i+=8) {
- INSTANCE_WR(gpuobj, (i+0)/4,
- dev_priv->gart_info.sg_dummy_bus | 0x21);
- INSTANCE_WR(gpuobj, (i+4)/4, 0);
- }
- }
-
- dev_priv->gart_info.type = NOUVEAU_GART_SGDMA;
- dev_priv->gart_info.aper_base = 0;
- dev_priv->gart_info.aper_size = aper_size;
- dev_priv->gart_info.sg_ctxdma = gpuobj;
- return 0;
-}
-
-void
-nouveau_sgdma_takedown(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- if (dev_priv->gart_info.sg_dummy_page) {
-#ifdef __linux__
- pci_unmap_page(dev->pdev, dev_priv->gart_info.sg_dummy_bus,
- NV_CTXDMA_PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
- unlock_page(dev_priv->gart_info.sg_dummy_page);
- __free_page(dev_priv->gart_info.sg_dummy_page);
-#endif
- dev_priv->gart_info.sg_dummy_page = NULL;
- dev_priv->gart_info.sg_dummy_bus = 0;
- }
-
- nouveau_gpuobj_del(dev, &dev_priv->gart_info.sg_ctxdma);
-}
-
-#if 0
-int
-nouveau_sgdma_nottm_hack_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_ttm_backend *be;
- struct drm_scatter_gather sgreq;
- struct drm_mm_node mm_node;
- struct drm_bo_mem_reg mem;
- int ret;
-
- dev_priv->gart_info.sg_be = nouveau_sgdma_init_ttm(dev);
- if (!dev_priv->gart_info.sg_be)
- return -ENOMEM;
- be = dev_priv->gart_info.sg_be;
-
- /* Hack the aperture size down to the amount of system memory
- * we're going to bind into it.
- */
- if (dev_priv->gart_info.aper_size > 32*1024*1024)
- dev_priv->gart_info.aper_size = 32*1024*1024;
-
- sgreq.size = dev_priv->gart_info.aper_size;
- if ((ret = drm_sg_alloc(dev, &sgreq))) {
- DRM_ERROR("drm_sg_alloc failed: %d\n", ret);
- return ret;
- }
- dev_priv->gart_info.sg_handle = sgreq.handle;
-
- if ((ret = be->func->populate(be, dev->sg->pages, dev->sg->pagelist, dev->bm.dummy_read_page))) {
- DRM_ERROR("failed populate: %d\n", ret);
- return ret;
- }
-
- mm_node.start = 0;
- mem.mm_node = &mm_node;
-
- if ((ret = be->func->bind(be, &mem))) {
- DRM_ERROR("failed bind: %d\n", ret);
- return ret;
- }
-
- return 0;
-}
-
-void
-nouveau_sgdma_nottm_hack_takedown(struct drm_device *dev)
-{
-}
-#endif
-
-int
-nouveau_sgdma_get_page(struct drm_device *dev, uint32_t offset, uint32_t *page)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
- int pte;
-
- pte = (offset >> NV_CTXDMA_PAGE_SHIFT);
- if (dev_priv->card_type < NV_50) {
- *page = INSTANCE_RD(gpuobj, (pte + 2)) & ~NV_CTXDMA_PAGE_MASK;
- return 0;
- }
-
- DRM_ERROR("Unimplemented on NV50\n");
- return -EINVAL;
-}
+++ /dev/null
-../shared-core/nouveau_state.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_swmthd.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_swmthd.h
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_fb.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_fifo.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_instmem.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_mc.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_timer.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv10_fb.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv10_fifo.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv10_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv20_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv40_fb.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv40_fifo.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv40_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv40_mc.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_fifo.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_grctx.h
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_instmem.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_mc.c
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD = r128
-NO_MAN = YES
-SRCS = r128_cce.c r128_drv.c r128_state.c r128_irq.c
-SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS += ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-../shared-core/r128_cce.c
\ No newline at end of file
+++ /dev/null
-../shared-core/r128_drm.h
\ No newline at end of file
+++ /dev/null
-/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*-
- * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com
- */
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "r128_drm.h"
-#include "r128_drv.h"
-#include "drm_pciids.h"
-
-/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
-static drm_pci_id_list_t r128_pciidlist[] = {
- r128_PCI_IDS
-};
-
-static void r128_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
- DRIVER_SG | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ;
-
- dev->driver->buf_priv_size = sizeof(drm_r128_buf_priv_t);
- dev->driver->load = r128_driver_load;
- dev->driver->preclose = r128_driver_preclose;
- dev->driver->lastclose = r128_driver_lastclose;
- dev->driver->get_vblank_counter = r128_get_vblank_counter;
- dev->driver->enable_vblank = r128_enable_vblank;
- dev->driver->disable_vblank = r128_disable_vblank;
- dev->driver->irq_preinstall = r128_driver_irq_preinstall;
- dev->driver->irq_postinstall = r128_driver_irq_postinstall;
- dev->driver->irq_uninstall = r128_driver_irq_uninstall;
- dev->driver->irq_handler = r128_driver_irq_handler;
- dev->driver->dma_ioctl = r128_cce_buffers;
-
- dev->driver->ioctls = r128_ioctls;
- dev->driver->max_ioctl = r128_max_ioctl;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-r128_probe(device_t kdev)
-{
- return drm_probe(kdev, r128_pciidlist);
-}
-
-static int
-r128_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- r128_configure(dev);
-
- return drm_attach(kdev, r128_pciidlist);
-}
-
-int r128_driver_load(struct drm_device * dev, unsigned long flags)
-{
- return drm_vblank_init(dev, 1);
-}
-
-static int
-r128_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t r128_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, r128_probe),
- DEVMETHOD(device_attach, r128_attach),
- DEVMETHOD(device_detach, r128_detach),
-
- { 0, 0 }
-};
-
-static driver_t r128_driver = {
- "drm",
- r128_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-#if __FreeBSD_version >= 700010
-DRIVER_MODULE(r128, vgapci, r128_driver, drm_devclass, 0, 0);
-#else
-DRIVER_MODULE(r128, pci, r128_driver, drm_devclass, 0, 0);
-#endif
-MODULE_DEPEND(r128, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/r128_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/r128_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/r128_state.c
\ No newline at end of file
+++ /dev/null
-../shared-core/r300_cmdbuf.c
\ No newline at end of file
+++ /dev/null
-../shared-core/r300_reg.h
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD = radeon
-NO_MAN = YES
-SRCS = r300_cmdbuf.c radeon_cp.c radeon_drv.c radeon_state.c radeon_irq.c \
- radeon_mem.c
-SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS += ${DEBUG_FLAGS} -I. -I..
-
-.if ${CC} != "icc"
-CFLAGS += --param large-function-growth=1000
-.endif
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-../shared-core/radeon_cp.c
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_drm.h
\ No newline at end of file
+++ /dev/null
-/* radeon_drv.c -- ATI Radeon driver -*- linux-c -*-
- * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com
- */
-/*-
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "radeon_drm.h"
-#include "radeon_drv.h"
-#include "drm_pciids.h"
-
-int radeon_no_wb;
-
-/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
-static drm_pci_id_list_t radeon_pciidlist[] = {
- radeon_PCI_IDS
-};
-
-static void radeon_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
- DRIVER_SG | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ;
-
- dev->driver->buf_priv_size = sizeof(drm_radeon_buf_priv_t);
- dev->driver->load = radeon_driver_load;
- dev->driver->unload = radeon_driver_unload;
- dev->driver->firstopen = radeon_driver_firstopen;
- dev->driver->open = radeon_driver_open;
- dev->driver->preclose = radeon_driver_preclose;
- dev->driver->postclose = radeon_driver_postclose;
- dev->driver->lastclose = radeon_driver_lastclose;
- dev->driver->get_vblank_counter = radeon_get_vblank_counter;
- dev->driver->enable_vblank = radeon_enable_vblank;
- dev->driver->disable_vblank = radeon_disable_vblank;
- dev->driver->irq_preinstall = radeon_driver_irq_preinstall;
- dev->driver->irq_postinstall = radeon_driver_irq_postinstall;
- dev->driver->irq_uninstall = radeon_driver_irq_uninstall;
- dev->driver->irq_handler = radeon_driver_irq_handler;
- dev->driver->dma_ioctl = radeon_cp_buffers;
-
- dev->driver->ioctls = radeon_ioctls;
- dev->driver->max_ioctl = radeon_max_ioctl;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-radeon_probe(device_t kdev)
-{
- return drm_probe(kdev, radeon_pciidlist);
-}
-
-static int
-radeon_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- radeon_configure(dev);
-
- return drm_attach(kdev, radeon_pciidlist);
-}
-
-static int
-radeon_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t radeon_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, radeon_probe),
- DEVMETHOD(device_attach, radeon_attach),
- DEVMETHOD(device_detach, radeon_detach),
-
- { 0, 0 }
-};
-
-static driver_t radeon_driver = {
- "drm",
- radeon_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-#if __FreeBSD_version >= 700010
-DRIVER_MODULE(radeon, vgapci, radeon_driver, drm_devclass, 0, 0);
-#else
-DRIVER_MODULE(radeon, pci, radeon_driver, drm_devclass, 0, 0);
-#endif
-MODULE_DEPEND(radeon, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/radeon_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_mem.c
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_microcode.h
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_state.c
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD = savage
-NO_MAN = YES
-SRCS = savage_bci.c savage_drv.c savage_state.c
-SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS += ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-../shared-core/savage_bci.c
\ No newline at end of file
+++ /dev/null
-../shared-core/savage_drm.h
\ No newline at end of file
+++ /dev/null
-/* savage_drv.c -- Savage DRI driver
- */
-/*-
- * Copyright 2005 Eric Anholt
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <anholt@FreeBSD.org>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "savage_drm.h"
-#include "savage_drv.h"
-#include "drm_pciids.h"
-
-/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
-static drm_pci_id_list_t savage_pciidlist[] = {
- savage_PCI_IDS
-};
-
-static void savage_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
- DRIVER_HAVE_DMA;
-
- dev->driver->buf_priv_size = sizeof(drm_savage_buf_priv_t);
- dev->driver->load = savage_driver_load;
- dev->driver->firstopen = savage_driver_firstopen;
- dev->driver->lastclose = savage_driver_lastclose;
- dev->driver->unload = savage_driver_unload;
- dev->driver->reclaim_buffers_locked = savage_reclaim_buffers;
- dev->driver->dma_ioctl = savage_bci_buffers;
-
- dev->driver->ioctls = savage_ioctls;
- dev->driver->max_ioctl = savage_max_ioctl;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-savage_probe(device_t kdev)
-{
- return drm_probe(kdev, savage_pciidlist);
-}
-
-static int
-savage_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- savage_configure(dev);
-
- return drm_attach(kdev, savage_pciidlist);
-}
-
-static int
-savage_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t savage_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, savage_probe),
- DEVMETHOD(device_attach, savage_attach),
- DEVMETHOD(device_detach, savage_detach),
-
- { 0, 0 }
-};
-
-static driver_t savage_driver = {
- "drm",
- savage_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-#if __FreeBSD_version >= 700010
-DRIVER_MODULE(savage, vgapci, savage_driver, drm_devclass, 0, 0);
-#else
-DRIVER_MODULE(savage, pci, savage_driver, drm_devclass, 0, 0);
-#endif
-MODULE_DEPEND(savage, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/savage_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/savage_state.c
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD= sis
-NO_MAN= YES
-SRCS= sis_drv.c sis_ds.c sis_mm.c
-SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS+= ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-../shared-core/sis_drm.h
\ No newline at end of file
+++ /dev/null
-/* sis.c -- sis driver -*- linux-c -*-
- */
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "sis_drm.h"
-#include "sis_drv.h"
-#include "drm_pciids.h"
-
-/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
-static drm_pci_id_list_t sis_pciidlist[] = {
- sis_PCI_IDS
-};
-
-static void sis_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR;
-
- dev->driver->buf_priv_size = 1; /* No dev_priv */
- dev->driver->context_ctor = sis_init_context;
- dev->driver->context_dtor = sis_final_context;
-
- dev->driver->ioctls = sis_ioctls;
- dev->driver->max_ioctl = sis_max_ioctl;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-sis_probe(device_t kdev)
-{
- return drm_probe(kdev, sis_pciidlist);
-}
-
-static int
-sis_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- sis_configure(dev);
-
- return drm_attach(kdev, sis_pciidlist);
-}
-
-static int
-sis_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t sis_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, sis_probe),
- DEVMETHOD(device_attach, sis_attach),
- DEVMETHOD(device_detach, sis_detach),
-
- { 0, 0 }
-};
-
-static driver_t sis_driver = {
- "drm",
- sis_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-#if __FreeBSD_version >= 700010
-DRIVER_MODULE(sisdrm, vgapci, sis_driver, drm_devclass, 0, 0);
-#else
-DRIVER_MODULE(sisdrm, pci, sis_driver, drm_devclass, 0, 0);
-#endif
-MODULE_DEPEND(sisdrm, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/sis_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/sis_ds.c
\ No newline at end of file
+++ /dev/null
-../shared-core/sis_ds.h
\ No newline at end of file
+++ /dev/null
-../shared-core/sis_mm.c
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD= tdfx
-NO_MAN= YES
-SRCS= tdfx_drv.c
-SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS+= ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-/* tdfx_drv.c -- tdfx driver -*- linux-c -*-
- * Created: Thu Oct 7 10:38:32 1999 by faith@precisioninsight.com
- */
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Daryll Strauss <daryll@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#include "tdfx_drv.h"
-#include "drmP.h"
-#include "drm_pciids.h"
-
-/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
-static drm_pci_id_list_t tdfx_pciidlist[] = {
- tdfx_PCI_IDS
-};
-
-static void tdfx_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_MTRR;
-
- dev->driver->buf_priv_size = 1; /* No dev_priv */
-
- dev->driver->max_ioctl = 0;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-tdfx_probe(device_t kdev)
-{
- return drm_probe(kdev, tdfx_pciidlist);
-}
-
-static int
-tdfx_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- tdfx_configure(dev);
-
- return drm_attach(kdev, tdfx_pciidlist);
-}
-
-static int
-tdfx_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t tdfx_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, tdfx_probe),
- DEVMETHOD(device_attach, tdfx_attach),
- DEVMETHOD(device_detach, tdfx_detach),
-
- { 0, 0 }
-};
-
-static driver_t tdfx_driver = {
- "drm",
- tdfx_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-#if __FreeBSD_version >= 700010
-DRIVER_MODULE(tdfx, vgapci, tdfx_driver, drm_devclass, 0, 0);
-#else
-DRIVER_MODULE(tdfx, pci, tdfx_driver, drm_devclass, 0, 0);
-#endif
-MODULE_DEPEND(tdfx, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/tdfx_drv.h
\ No newline at end of file
+++ /dev/null
-# $FreeBSD$
-
-.PATH: ${.CURDIR}/..
-KMOD = via
-NO_MAN = YES
-SRCS = via_dma.c via_drv.c via_ds.c via_irq.c via_map.c via_mm.c \
- via_verifier.c via_video.c
-SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
-CFLAGS += ${DEBUG_FLAGS} -I. -I..
-
-.if defined(DRM_DEBUG)
-DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
-.endif
-
-.if !defined(DRM_NOLINUX)
-DRM_LINUX_OPT= "\#define DRM_LINUX 1"
-.endif
-
-opt_drm.h:
- touch opt_drm.h
- echo $(DRM_DEBUG_OPT) >> opt_drm.h
- echo $(DRM_LINUX_OPT) >> opt_drm.h
-
-.include <bsd.kmod.mk>
+++ /dev/null
-../shared-core/via_3d_reg.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_dma.c
\ No newline at end of file
+++ /dev/null
-../shared-core/via_drm.h
\ No newline at end of file
+++ /dev/null
-/* via_drv.c -- VIA unichrome driver -*- linux-c -*-
- * Created: Fri Aug 12 2005 by anholt@FreeBSD.org
- */
-/*-
- * Copyright 2005 Eric Anholt
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <anholt@FreeBSD.org>
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "via_drm.h"
-#include "via_drv.h"
-#include "drm_pciids.h"
-
-/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
-static drm_pci_id_list_t via_pciidlist[] = {
- viadrv_PCI_IDS
-};
-
-static void via_configure(struct drm_device *dev)
-{
- dev->driver->driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ;
-
- dev->driver->buf_priv_size = 1;
- dev->driver->load = via_driver_load;
- dev->driver->unload = via_driver_unload;
- dev->driver->context_ctor = via_init_context;
- dev->driver->context_dtor = via_final_context;
- dev->driver->get_vblank_counter = via_get_vblank_counter;
- dev->driver->enable_vblank = via_enable_vblank;
- dev->driver->disable_vblank = via_disable_vblank;
- dev->driver->irq_preinstall = via_driver_irq_preinstall;
- dev->driver->irq_postinstall = via_driver_irq_postinstall;
- dev->driver->irq_uninstall = via_driver_irq_uninstall;
- dev->driver->irq_handler = via_driver_irq_handler;
- dev->driver->dma_quiescent = via_driver_dma_quiescent;
-
- dev->driver->ioctls = via_ioctls;
- dev->driver->max_ioctl = via_max_ioctl;
-
- dev->driver->name = DRIVER_NAME;
- dev->driver->desc = DRIVER_DESC;
- dev->driver->date = DRIVER_DATE;
- dev->driver->major = DRIVER_MAJOR;
- dev->driver->minor = DRIVER_MINOR;
- dev->driver->patchlevel = DRIVER_PATCHLEVEL;
-}
-
-static int
-via_probe(device_t kdev)
-{
- return drm_probe(kdev, via_pciidlist);
-}
-
-static int
-via_attach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
-
- dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
- M_WAITOK | M_ZERO);
-
- via_configure(dev);
-
- return drm_attach(kdev, via_pciidlist);
-}
-
-static int
-via_detach(device_t kdev)
-{
- struct drm_device *dev = device_get_softc(kdev);
- int ret;
-
- ret = drm_detach(kdev);
-
- free(dev->driver, DRM_MEM_DRIVER);
-
- return ret;
-}
-
-static device_method_t via_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, via_probe),
- DEVMETHOD(device_attach, via_attach),
- DEVMETHOD(device_detach, via_detach),
-
- { 0, 0 }
-};
-
-static driver_t via_driver = {
- "drm",
- via_methods,
- sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-DRIVER_MODULE(via, pci, via_driver, drm_devclass, 0, 0);
-MODULE_DEPEND(via, drm, 1, 1, 1);
+++ /dev/null
-../shared-core/via_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_ds.c
\ No newline at end of file
+++ /dev/null
-../shared-core/via_ds.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/via_map.c
\ No newline at end of file
+++ /dev/null
-../shared-core/via_mm.c
\ No newline at end of file
+++ /dev/null
-../shared-core/via_mm.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_verifier.c
\ No newline at end of file
+++ /dev/null
-../shared-core/via_verifier.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_video.c
\ No newline at end of file
+++ /dev/null
-Module*.symvers
+++ /dev/null
-#
-# Drm device configuration
-#
-# This driver provides support for the
-# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
-#
-
-tristate ' 3dfx Banshee/Voodoo3+' CONFIG_DRM_TDFX
-#tristate ' 3dlabs GMX 2000' CONFIG_DRM_GAMMA
-tristate ' ATI Rage 128' CONFIG_DRM_R128
-tristate ' ATI Radeon' CONFIG_DRM_RADEON
-dep_tristate ' Intel I810' CONFIG_DRM_I810 $CONFIG_AGP
-dep_tristate ' Intel 830M/845G/852GM/855GM/865G' CONFIG_DRM_I830 $CONFIG_AGP
-dep_tristate ' Matrox g200/g400' CONFIG_DRM_MGA $CONFIG_AGP
-tristate ' SiS' CONFIG_DRM_SIS
-tristate ' Via Unichrome' CONFIG_DRM_VIA
-
+++ /dev/null
-# Doxyfile 1.3.8
-
-# This file describes the settings to be used by the documentation system
-# doxygen (www.doxygen.org) for a project
-#
-# All text after a hash (#) is considered a comment and will be ignored
-# The format is:
-# TAG = value [value, ...]
-# For lists items can also be appended using:
-# TAG += value [value, ...]
-# Values that contain spaces should be placed between quotes (" ")
-
-#---------------------------------------------------------------------------
-# Project related configuration options
-#---------------------------------------------------------------------------
-
-# The PROJECT_NAME tag is a single word (or a sequence of words surrounded
-# by quotes) that should identify the project.
-
-PROJECT_NAME = "Direct Rendering Module"
-
-# The PROJECT_NUMBER tag can be used to enter a project or revision number.
-# This could be handy for archiving the generated documentation or
-# if some version control system is used.
-
-PROJECT_NUMBER =
-
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-# base path where the generated documentation will be put.
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-# files, where putting all generated files in the same directory would otherwise
-# cause performance problems for the file system.
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-CREATE_SUBDIRS = NO
-
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-# documentation generated by doxygen is written. Doxygen will use this
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-# Dutch, Finnish, French, German, Greek, Hungarian, Italian, Japanese,
-# Japanese-en (Japanese with English messages), Korean, Korean-en, Norwegian,
-# Polish, Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish,
-# Swedish, and Ukrainian.
-
-OUTPUT_LANGUAGE = English
-
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-# but also whether or not the output is meant for Windows or non-Windows users.
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-INLINE_INHERITED_MEMB = NO
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-# path before files name in the file list and in the header files. If set
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-FULL_PATH_NAMES = NO
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-# can be used to strip a user-defined part of the path. Stripping is
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-STRIP_FROM_PATH =
-
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-# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
-# (but less readable) file names. This can be useful is your file systems
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-SHORT_NAMES = NO
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-
-# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
-# documentation are documented, even if no documentation was available.
-# Private class members and static file members will be hidden unless
-# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
-
-EXTRACT_ALL = NO
-
-# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
-# will be included in the documentation.
-
-EXTRACT_PRIVATE = YES
-
-# If the EXTRACT_STATIC tag is set to YES all static members of a file
-# will be included in the documentation.
-
-EXTRACT_STATIC = YES
-
-# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
-# defined locally in source files will be included in the documentation.
-# If set to NO only classes defined in header files are included.
-
-EXTRACT_LOCAL_CLASSES = YES
-
-# This flag is only useful for Objective-C code. When set to YES local
-# methods, which are defined in the implementation section but not in
-# the interface are included in the documentation.
-# If set to NO (the default) only methods in the interface are included.
-
-EXTRACT_LOCAL_METHODS = NO
-
-# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
-# undocumented members of documented classes, files or namespaces.
-# If set to NO (the default) these members will be included in the
-# various overviews, but no documentation section is generated.
-# This option has no effect if EXTRACT_ALL is enabled.
-
-HIDE_UNDOC_MEMBERS = NO
-
-# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
-# undocumented classes that are normally visible in the class hierarchy.
-# If set to NO (the default) these classes will be included in the various
-# overviews. This option has no effect if EXTRACT_ALL is enabled.
-
-HIDE_UNDOC_CLASSES = NO
-
-# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
-# friend (class|struct|union) declarations.
-# If set to NO (the default) these declarations will be included in the
-# documentation.
-
-HIDE_FRIEND_COMPOUNDS = NO
-
-# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any
-# documentation blocks found inside the body of a function.
-# If set to NO (the default) these blocks will be appended to the
-# function's detailed documentation block.
-
-HIDE_IN_BODY_DOCS = NO
-
-# The INTERNAL_DOCS tag determines if documentation
-# that is typed after a \internal command is included. If the tag is set
-# to NO (the default) then the documentation will be excluded.
-# Set it to YES to include the internal documentation.
-
-INTERNAL_DOCS = NO
-
-# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
-# file names in lower-case letters. If set to YES upper-case letters are also
-# allowed. This is useful if you have classes or files whose names only differ
-# in case and if your file system supports case sensitive file names. Windows
-# and Mac users are advised to set this option to NO.
-
-CASE_SENSE_NAMES = YES
-
-# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
-# will show members with their full class and namespace scopes in the
-# documentation. If set to YES the scope will be hidden.
-
-HIDE_SCOPE_NAMES = NO
-
-# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
-# will put a list of the files that are included by a file in the documentation
-# of that file.
-
-SHOW_INCLUDE_FILES = NO
-
-# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
-# is inserted in the documentation for inline members.
-
-INLINE_INFO = YES
-
-# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
-# will sort the (detailed) documentation of file and class members
-# alphabetically by member name. If set to NO the members will appear in
-# declaration order.
-
-SORT_MEMBER_DOCS = NO
-
-# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the
-# brief documentation of file, namespace and class members alphabetically
-# by member name. If set to NO (the default) the members will appear in
-# declaration order.
-
-SORT_BRIEF_DOCS = NO
-
-# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be
-# sorted by fully-qualified names, including namespaces. If set to
-# NO (the default), the class list will be sorted only by class name,
-# not including the namespace part.
-# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
-# Note: This option applies only to the class list, not to the
-# alphabetical list.
-
-SORT_BY_SCOPE_NAME = NO
-
-# The GENERATE_TODOLIST tag can be used to enable (YES) or
-# disable (NO) the todo list. This list is created by putting \todo
-# commands in the documentation.
-
-GENERATE_TODOLIST = YES
-
-# The GENERATE_TESTLIST tag can be used to enable (YES) or
-# disable (NO) the test list. This list is created by putting \test
-# commands in the documentation.
-
-GENERATE_TESTLIST = YES
-
-# The GENERATE_BUGLIST tag can be used to enable (YES) or
-# disable (NO) the bug list. This list is created by putting \bug
-# commands in the documentation.
-
-GENERATE_BUGLIST = YES
-
-# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or
-# disable (NO) the deprecated list. This list is created by putting
-# \deprecated commands in the documentation.
-
-GENERATE_DEPRECATEDLIST= YES
-
-# The ENABLED_SECTIONS tag can be used to enable conditional
-# documentation sections, marked by \if sectionname ... \endif.
-
-ENABLED_SECTIONS =
-
-# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
-# the initial value of a variable or define consists of for it to appear in
-# the documentation. If the initializer consists of more lines than specified
-# here it will be hidden. Use a value of 0 to hide initializers completely.
-# The appearance of the initializer of individual variables and defines in the
-# documentation can be controlled using \showinitializer or \hideinitializer
-# command in the documentation regardless of this setting.
-
-MAX_INITIALIZER_LINES = 30
-
-# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
-# at the bottom of the documentation of classes and structs. If set to YES the
-# list will mention the files that were used to generate the documentation.
-
-SHOW_USED_FILES = YES
-
-#---------------------------------------------------------------------------
-# configuration options related to warning and progress messages
-#---------------------------------------------------------------------------
-
-# The QUIET tag can be used to turn on/off the messages that are generated
-# by doxygen. Possible values are YES and NO. If left blank NO is used.
-
-QUIET = YES
-
-# The WARNINGS tag can be used to turn on/off the warning messages that are
-# generated by doxygen. Possible values are YES and NO. If left blank
-# NO is used.
-
-WARNINGS = YES
-
-# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
-# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
-# automatically be disabled.
-
-WARN_IF_UNDOCUMENTED = NO
-
-# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
-# potential errors in the documentation, such as not documenting some
-# parameters in a documented function, or documenting parameters that
-# don't exist or using markup commands wrongly.
-
-WARN_IF_DOC_ERROR = YES
-
-# The WARN_FORMAT tag determines the format of the warning messages that
-# doxygen can produce. The string should contain the $file, $line, and $text
-# tags, which will be replaced by the file and line number from which the
-# warning originated and the warning text.
-
-WARN_FORMAT = "$file:$line: $text"
-
-# The WARN_LOGFILE tag can be used to specify a file to which warning
-# and error messages should be written. If left blank the output is written
-# to stderr.
-
-WARN_LOGFILE =
-
-#---------------------------------------------------------------------------
-# configuration options related to the input files
-#---------------------------------------------------------------------------
-
-# The INPUT tag can be used to specify the files and/or directories that contain
-# documented source files. You may enter file names like "myfile.cpp" or
-# directories like "/usr/src/myproject". Separate the files or directories
-# with spaces.
-
-INPUT = . \
- ../shared-core
-
-# If the value of the INPUT tag contains directories, you can use the
-# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
-# and *.h) to filter out the source-files in the directories. If left
-# blank the following patterns are tested:
-# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx *.hpp
-# *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm
-
-FILE_PATTERNS = *.c \
- *.h
-
-# The RECURSIVE tag can be used to turn specify whether or not subdirectories
-# should be searched for input files as well. Possible values are YES and NO.
-# If left blank NO is used.
-
-RECURSIVE = NO
-
-# The EXCLUDE tag can be used to specify files and/or directories that should
-# excluded from the INPUT source files. This way you can easily exclude a
-# subdirectory from a directory tree whose root is specified with the INPUT tag.
-
-EXCLUDE =
-
-# The EXCLUDE_SYMLINKS tag can be used select whether or not files or directories
-# that are symbolic links (a Unix filesystem feature) are excluded from the input.
-
-EXCLUDE_SYMLINKS = YES
-
-# If the value of the INPUT tag contains directories, you can use the
-# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
-# certain files from those directories.
-
-EXCLUDE_PATTERNS =
-
-# The EXAMPLE_PATH tag can be used to specify one or more files or
-# directories that contain example code fragments that are included (see
-# the \include command).
-
-EXAMPLE_PATH =
-
-# If the value of the EXAMPLE_PATH tag contains directories, you can use the
-# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
-# and *.h) to filter out the source-files in the directories. If left
-# blank all files are included.
-
-EXAMPLE_PATTERNS =
-
-# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
-# searched for input files to be used with the \include or \dontinclude
-# commands irrespective of the value of the RECURSIVE tag.
-# Possible values are YES and NO. If left blank NO is used.
-
-EXAMPLE_RECURSIVE = NO
-
-# The IMAGE_PATH tag can be used to specify one or more files or
-# directories that contain image that are included in the documentation (see
-# the \image command).
-
-IMAGE_PATH =
-
-# The INPUT_FILTER tag can be used to specify a program that doxygen should
-# invoke to filter for each input file. Doxygen will invoke the filter program
-# by executing (via popen()) the command <filter> <input-file>, where <filter>
-# is the value of the INPUT_FILTER tag, and <input-file> is the name of an
-# input file. Doxygen will then use the output that the filter program writes
-# to standard output. If FILTER_PATTERNS is specified, this tag will be
-# ignored.
-
-INPUT_FILTER =
-
-# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
-# basis. Doxygen will compare the file name with each pattern and apply the
-# filter if there is a match. The filters are a list of the form:
-# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further
-# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER
-# is applied to all files.
-
-FILTER_PATTERNS =
-
-# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
-# INPUT_FILTER) will be used to filter the input files when producing source
-# files to browse (i.e. when SOURCE_BROWSER is set to YES).
-
-FILTER_SOURCE_FILES = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to source browsing
-#---------------------------------------------------------------------------
-
-# If the SOURCE_BROWSER tag is set to YES then a list of source files will
-# be generated. Documented entities will be cross-referenced with these sources.
-# Note: To get rid of all source code in the generated output, make sure also
-# VERBATIM_HEADERS is set to NO.
-
-SOURCE_BROWSER = NO
-
-# Setting the INLINE_SOURCES tag to YES will include the body
-# of functions and classes directly in the documentation.
-
-INLINE_SOURCES = NO
-
-# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
-# doxygen to hide any special comment blocks from generated source code
-# fragments. Normal C and C++ comments will always remain visible.
-
-STRIP_CODE_COMMENTS = YES
-
-# If the REFERENCED_BY_RELATION tag is set to YES (the default)
-# then for each documented function all documented
-# functions referencing it will be listed.
-
-REFERENCED_BY_RELATION = YES
-
-# If the REFERENCES_RELATION tag is set to YES (the default)
-# then for each documented function all documented entities
-# called/used by that function will be listed.
-
-REFERENCES_RELATION = YES
-
-# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
-# will generate a verbatim copy of the header file for each class for
-# which an include is specified. Set to NO to disable this.
-
-VERBATIM_HEADERS = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to the alphabetical class index
-#---------------------------------------------------------------------------
-
-# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
-# of all compounds will be generated. Enable this if the project
-# contains a lot of classes, structs, unions or interfaces.
-
-ALPHABETICAL_INDEX = NO
-
-# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
-# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns
-# in which this list will be split (can be a number in the range [1..20])
-
-COLS_IN_ALPHA_INDEX = 5
-
-# In case all classes in a project start with a common prefix, all
-# classes will be put under the same header in the alphabetical index.
-# The IGNORE_PREFIX tag can be used to specify one or more prefixes that
-# should be ignored while generating the index headers.
-
-IGNORE_PREFIX =
-
-#---------------------------------------------------------------------------
-# configuration options related to the HTML output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_HTML tag is set to YES (the default) Doxygen will
-# generate HTML output.
-
-GENERATE_HTML = YES
-
-# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `html' will be used as the default path.
-
-HTML_OUTPUT = html
-
-# The HTML_FILE_EXTENSION tag can be used to specify the file extension for
-# each generated HTML page (for example: .htm,.php,.asp). If it is left blank
-# doxygen will generate files with .html extension.
-
-HTML_FILE_EXTENSION = .html
-
-# The HTML_HEADER tag can be used to specify a personal HTML header for
-# each generated HTML page. If it is left blank doxygen will generate a
-# standard header.
-
-HTML_HEADER =
-
-# The HTML_FOOTER tag can be used to specify a personal HTML footer for
-# each generated HTML page. If it is left blank doxygen will generate a
-# standard footer.
-
-HTML_FOOTER =
-
-# The HTML_STYLESHEET tag can be used to specify a user-defined cascading
-# style sheet that is used by each HTML page. It can be used to
-# fine-tune the look of the HTML output. If the tag is left blank doxygen
-# will generate a default style sheet. Note that doxygen will try to copy
-# the style sheet file to the HTML output directory, so don't put your own
-# stylesheet in the HTML output directory as well, or it will be erased!
-
-HTML_STYLESHEET =
-
-# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes,
-# files or namespaces will be aligned in HTML using tables. If set to
-# NO a bullet list will be used.
-
-HTML_ALIGN_MEMBERS = YES
-
-# If the GENERATE_HTMLHELP tag is set to YES, additional index files
-# will be generated that can be used as input for tools like the
-# Microsoft HTML help workshop to generate a compressed HTML help file (.chm)
-# of the generated HTML documentation.
-
-GENERATE_HTMLHELP = NO
-
-# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can
-# be used to specify the file name of the resulting .chm file. You
-# can add a path in front of the file if the result should not be
-# written to the html output directory.
-
-CHM_FILE =
-
-# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can
-# be used to specify the location (absolute path including file name) of
-# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run
-# the HTML help compiler on the generated index.hhp.
-
-HHC_LOCATION =
-
-# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
-# controls if a separate .chi index file is generated (YES) or that
-# it should be included in the master .chm file (NO).
-
-GENERATE_CHI = NO
-
-# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
-# controls whether a binary table of contents is generated (YES) or a
-# normal table of contents (NO) in the .chm file.
-
-BINARY_TOC = NO
-
-# The TOC_EXPAND flag can be set to YES to add extra items for group members
-# to the contents of the HTML help documentation and to the tree view.
-
-TOC_EXPAND = NO
-
-# The DISABLE_INDEX tag can be used to turn on/off the condensed index at
-# top of each HTML page. The value NO (the default) enables the index and
-# the value YES disables it.
-
-DISABLE_INDEX = NO
-
-# This tag can be used to set the number of enum values (range [1..20])
-# that doxygen will group on one line in the generated HTML documentation.
-
-ENUM_VALUES_PER_LINE = 4
-
-# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be
-# generated containing a tree-like index structure (just like the one that
-# is generated for HTML Help). For this to work a browser that supports
-# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+,
-# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are
-# probably better off using the HTML help feature.
-
-GENERATE_TREEVIEW = NO
-
-# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
-# used to set the initial width (in pixels) of the frame in which the tree
-# is shown.
-
-TREEVIEW_WIDTH = 250
-
-#---------------------------------------------------------------------------
-# configuration options related to the LaTeX output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
-# generate Latex output.
-
-GENERATE_LATEX = NO
-
-# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `latex' will be used as the default path.
-
-LATEX_OUTPUT = latex
-
-# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
-# invoked. If left blank `latex' will be used as the default command name.
-
-LATEX_CMD_NAME = latex
-
-# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
-# generate index for LaTeX. If left blank `makeindex' will be used as the
-# default command name.
-
-MAKEINDEX_CMD_NAME = makeindex
-
-# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
-# LaTeX documents. This may be useful for small projects and may help to
-# save some trees in general.
-
-COMPACT_LATEX = NO
-
-# The PAPER_TYPE tag can be used to set the paper type that is used
-# by the printer. Possible values are: a4, a4wide, letter, legal and
-# executive. If left blank a4wide will be used.
-
-PAPER_TYPE = a4wide
-
-# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX
-# packages that should be included in the LaTeX output.
-
-EXTRA_PACKAGES =
-
-# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
-# the generated latex document. The header should contain everything until
-# the first chapter. If it is left blank doxygen will generate a
-# standard header. Notice: only use this tag if you know what you are doing!
-
-LATEX_HEADER =
-
-# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
-# is prepared for conversion to pdf (using ps2pdf). The pdf file will
-# contain links (just like the HTML output) instead of page references
-# This makes the output suitable for online browsing using a pdf viewer.
-
-PDF_HYPERLINKS = NO
-
-# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
-# plain latex in the generated Makefile. Set this option to YES to get a
-# higher quality PDF documentation.
-
-USE_PDFLATEX = NO
-
-# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
-# command to the generated LaTeX files. This will instruct LaTeX to keep
-# running if errors occur, instead of asking the user for help.
-# This option is also used when generating formulas in HTML.
-
-LATEX_BATCHMODE = NO
-
-# If LATEX_HIDE_INDICES is set to YES then doxygen will not
-# include the index chapters (such as File Index, Compound Index, etc.)
-# in the output.
-
-LATEX_HIDE_INDICES = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to the RTF output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
-# The RTF output is optimized for Word 97 and may not look very pretty with
-# other RTF readers or editors.
-
-GENERATE_RTF = NO
-
-# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `rtf' will be used as the default path.
-
-RTF_OUTPUT = rtf
-
-# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
-# RTF documents. This may be useful for small projects and may help to
-# save some trees in general.
-
-COMPACT_RTF = NO
-
-# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
-# will contain hyperlink fields. The RTF file will
-# contain links (just like the HTML output) instead of page references.
-# This makes the output suitable for online browsing using WORD or other
-# programs which support those fields.
-# Note: wordpad (write) and others do not support links.
-
-RTF_HYPERLINKS = NO
-
-# Load stylesheet definitions from file. Syntax is similar to doxygen's
-# config file, i.e. a series of assignments. You only have to provide
-# replacements, missing definitions are set to their default value.
-
-RTF_STYLESHEET_FILE =
-
-# Set optional variables used in the generation of an rtf document.
-# Syntax is similar to doxygen's config file.
-
-RTF_EXTENSIONS_FILE =
-
-#---------------------------------------------------------------------------
-# configuration options related to the man page output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_MAN tag is set to YES (the default) Doxygen will
-# generate man pages
-
-GENERATE_MAN = NO
-
-# The MAN_OUTPUT tag is used to specify where the man pages will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `man' will be used as the default path.
-
-MAN_OUTPUT = man
-
-# The MAN_EXTENSION tag determines the extension that is added to
-# the generated man pages (default is the subroutine's section .3)
-
-MAN_EXTENSION = .3
-
-# If the MAN_LINKS tag is set to YES and Doxygen generates man output,
-# then it will generate one additional man file for each entity
-# documented in the real man page(s). These additional files
-# only source the real man page, but without them the man command
-# would be unable to find the correct page. The default is NO.
-
-MAN_LINKS = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to the XML output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_XML tag is set to YES Doxygen will
-# generate an XML file that captures the structure of
-# the code including all documentation.
-
-GENERATE_XML = NO
-
-# The XML_OUTPUT tag is used to specify where the XML pages will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `xml' will be used as the default path.
-
-XML_OUTPUT = xml
-
-# The XML_SCHEMA tag can be used to specify an XML schema,
-# which can be used by a validating XML parser to check the
-# syntax of the XML files.
-
-XML_SCHEMA =
-
-# The XML_DTD tag can be used to specify an XML DTD,
-# which can be used by a validating XML parser to check the
-# syntax of the XML files.
-
-XML_DTD =
-
-# If the XML_PROGRAMLISTING tag is set to YES Doxygen will
-# dump the program listings (including syntax highlighting
-# and cross-referencing information) to the XML output. Note that
-# enabling this will significantly increase the size of the XML output.
-
-XML_PROGRAMLISTING = YES
-
-#---------------------------------------------------------------------------
-# configuration options for the AutoGen Definitions output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will
-# generate an AutoGen Definitions (see autogen.sf.net) file
-# that captures the structure of the code including all
-# documentation. Note that this feature is still experimental
-# and incomplete at the moment.
-
-GENERATE_AUTOGEN_DEF = NO
-
-#---------------------------------------------------------------------------
-# configuration options related to the Perl module output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_PERLMOD tag is set to YES Doxygen will
-# generate a Perl module file that captures the structure of
-# the code including all documentation. Note that this
-# feature is still experimental and incomplete at the
-# moment.
-
-GENERATE_PERLMOD = NO
-
-# If the PERLMOD_LATEX tag is set to YES Doxygen will generate
-# the necessary Makefile rules, Perl scripts and LaTeX code to be able
-# to generate PDF and DVI output from the Perl module output.
-
-PERLMOD_LATEX = NO
-
-# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be
-# nicely formatted so it can be parsed by a human reader. This is useful
-# if you want to understand what is going on. On the other hand, if this
-# tag is set to NO the size of the Perl module output will be much smaller
-# and Perl will parse it just the same.
-
-PERLMOD_PRETTY = YES
-
-# The names of the make variables in the generated doxyrules.make file
-# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX.
-# This is useful so different doxyrules.make files included by the same
-# Makefile don't overwrite each other's variables.
-
-PERLMOD_MAKEVAR_PREFIX =
-
-#---------------------------------------------------------------------------
-# Configuration options related to the preprocessor
-#---------------------------------------------------------------------------
-
-# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
-# evaluate all C-preprocessor directives found in the sources and include
-# files.
-
-ENABLE_PREPROCESSING = YES
-
-# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
-# names in the source code. If set to NO (the default) only conditional
-# compilation will be performed. Macro expansion can be done in a controlled
-# way by setting EXPAND_ONLY_PREDEF to YES.
-
-MACRO_EXPANSION = YES
-
-# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
-# then the macro expansion is limited to the macros specified with the
-# PREDEFINED and EXPAND_AS_PREDEFINED tags.
-
-EXPAND_ONLY_PREDEF = YES
-
-# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files
-# in the INCLUDE_PATH (see below) will be search if a #include is found.
-
-SEARCH_INCLUDES = YES
-
-# The INCLUDE_PATH tag can be used to specify one or more directories that
-# contain include files that are not input files but should be processed by
-# the preprocessor.
-
-INCLUDE_PATH =
-
-# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
-# patterns (like *.h and *.hpp) to filter out the header-files in the
-# directories. If left blank, the patterns specified with FILE_PATTERNS will
-# be used.
-
-INCLUDE_FILE_PATTERNS =
-
-# The PREDEFINED tag can be used to specify one or more macro names that
-# are defined before the preprocessor is started (similar to the -D option of
-# gcc). The argument of the tag is a list of macros of the form: name
-# or name=definition (no spaces). If the definition and the = are
-# omitted =1 is assumed.
-
-PREDEFINED = __KERNEL__ \
- DRM(x)=x \
- __OS_HAS_AGP=1 \
- __OS_HAS_MTRR=1
-
-# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then
-# this tag can be used to specify a list of macro names that should be expanded.
-# The macro definition that is found in the sources will be used.
-# Use the PREDEFINED tag if you want to use a different macro definition.
-
-EXPAND_AS_DEFINED = DRMFILE \
- DRM_IOCTL_ARGS \
- DRM_IRQ_ARGS \
- DRM_TASKQUEUE_ARGS
-
-# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then
-# doxygen's preprocessor will remove all function-like macros that are alone
-# on a line, have an all uppercase name, and do not end with a semicolon. Such
-# function macros are typically used for boiler-plate code, and will confuse the
-# parser if not removed.
-
-SKIP_FUNCTION_MACROS = YES
-
-#---------------------------------------------------------------------------
-# Configuration::additions related to external references
-#---------------------------------------------------------------------------
-
-# The TAGFILES option can be used to specify one or more tagfiles.
-# Optionally an initial location of the external documentation
-# can be added for each tagfile. The format of a tag file without
-# this location is as follows:
-# TAGFILES = file1 file2 ...
-# Adding location for the tag files is done as follows:
-# TAGFILES = file1=loc1 "file2 = loc2" ...
-# where "loc1" and "loc2" can be relative or absolute paths or
-# URLs. If a location is present for each tag, the installdox tool
-# does not have to be run to correct the links.
-# Note that each tag file must have a unique name
-# (where the name does NOT include the path)
-# If a tag file is not located in the directory in which doxygen
-# is run, you must also specify the path to the tagfile here.
-
-TAGFILES =
-
-# When a file name is specified after GENERATE_TAGFILE, doxygen will create
-# a tag file that is based on the input files it reads.
-
-GENERATE_TAGFILE =
-
-# If the ALLEXTERNALS tag is set to YES all external classes will be listed
-# in the class index. If set to NO only the inherited external classes
-# will be listed.
-
-ALLEXTERNALS = NO
-
-# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed
-# in the modules index. If set to NO, only the current project's groups will
-# be listed.
-
-EXTERNAL_GROUPS = YES
-
-# The PERL_PATH should be the absolute path and name of the perl script
-# interpreter (i.e. the result of `which perl').
-
-PERL_PATH = /usr/bin/perl
-
-#---------------------------------------------------------------------------
-# Configuration options related to the dot tool
-#---------------------------------------------------------------------------
-
-# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
-# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base or
-# super classes. Setting the tag to NO turns the diagrams off. Note that this
-# option is superseded by the HAVE_DOT option below. This is only a fallback. It is
-# recommended to install and use dot, since it yields more powerful graphs.
-
-CLASS_DIAGRAMS = YES
-
-# If set to YES, the inheritance and collaboration graphs will hide
-# inheritance and usage relations if the target is undocumented
-# or is not a class.
-
-HIDE_UNDOC_RELATIONS = YES
-
-# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
-# available from the path. This tool is part of Graphviz, a graph visualization
-# toolkit from AT&T and Lucent Bell Labs. The other options in this section
-# have no effect if this option is set to NO (the default)
-
-HAVE_DOT = NO
-
-# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for each documented class showing the direct and
-# indirect inheritance relations. Setting this tag to YES will force the
-# the CLASS_DIAGRAMS tag to NO.
-
-CLASS_GRAPH = YES
-
-# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for each documented class showing the direct and
-# indirect implementation dependencies (inheritance, containment, and
-# class references variables) of the class with other documented classes.
-
-COLLABORATION_GRAPH = YES
-
-# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
-# collaboration diagrams in a style similar to the OMG's Unified Modeling
-# Language.
-
-UML_LOOK = NO
-
-# If set to YES, the inheritance and collaboration graphs will show the
-# relations between templates and their instances.
-
-TEMPLATE_RELATIONS = YES
-
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
-# tags are set to YES then doxygen will generate a graph for each documented
-# file showing the direct and indirect include dependencies of the file with
-# other documented files.
-
-INCLUDE_GRAPH = YES
-
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
-# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
-# documented header file showing the documented files that directly or
-# indirectly include this file.
-
-INCLUDED_BY_GRAPH = YES
-
-# If the CALL_GRAPH and HAVE_DOT tags are set to YES then doxygen will
-# generate a call dependency graph for every global function or class method.
-# Note that enabling this option will significantly increase the time of a run.
-# So in most cases it will be better to enable call graphs for selected
-# functions only using the \callgraph command.
-
-CALL_GRAPH = NO
-
-# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
-# will graphical hierarchy of all classes instead of a textual one.
-
-GRAPHICAL_HIERARCHY = YES
-
-# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
-# generated by dot. Possible values are png, jpg, or gif
-# If left blank png will be used.
-
-DOT_IMAGE_FORMAT = png
-
-# The tag DOT_PATH can be used to specify the path where the dot tool can be
-# found. If left blank, it is assumed the dot tool can be found on the path.
-
-DOT_PATH =
-
-# The DOTFILE_DIRS tag can be used to specify one or more directories that
-# contain dot files that are included in the documentation (see the
-# \dotfile command).
-
-DOTFILE_DIRS =
-
-# The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width
-# (in pixels) of the graphs generated by dot. If a graph becomes larger than
-# this value, doxygen will try to truncate the graph, so that it fits within
-# the specified constraint. Beware that most browsers cannot cope with very
-# large images.
-
-MAX_DOT_GRAPH_WIDTH = 1024
-
-# The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height
-# (in pixels) of the graphs generated by dot. If a graph becomes larger than
-# this value, doxygen will try to truncate the graph, so that it fits within
-# the specified constraint. Beware that most browsers cannot cope with very
-# large images.
-
-MAX_DOT_GRAPH_HEIGHT = 1024
-
-# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the
-# graphs generated by dot. A depth value of 3 means that only nodes reachable
-# from the root by following a path via at most 3 edges will be shown. Nodes that
-# lay further from the root node will be omitted. Note that setting this option to
-# 1 or 2 may greatly reduce the computation time needed for large code bases. Also
-# note that a graph may be further truncated if the graph's image dimensions are
-# not sufficient to fit the graph (see MAX_DOT_GRAPH_WIDTH and MAX_DOT_GRAPH_HEIGHT).
-# If 0 is used for the depth value (the default), the graph is not depth-constrained.
-
-MAX_DOT_GRAPH_DEPTH = 0
-
-# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will
-# generate a legend page explaining the meaning of the various boxes and
-# arrows in the dot generated graphs.
-
-GENERATE_LEGEND = YES
-
-# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will
-# remove the intermediate dot files that are used to generate
-# the various graphs.
-
-DOT_CLEANUP = YES
-
-#---------------------------------------------------------------------------
-# Configuration::additions related to the search engine
-#---------------------------------------------------------------------------
-
-# The SEARCHENGINE tag specifies whether or not a search engine should be
-# used. If set to NO the values of all tags below this one will be ignored.
-
-SEARCHENGINE = NO
+++ /dev/null
-#
-# Drm device configuration
-#
-# This driver provides support for the
-# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
-#
-config DRM
- bool "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)"
- help
- Kernel-level support for the Direct Rendering Infrastructure (DRI)
- introduced in XFree86 4.0. If you say Y here, you need to select
- the module that's right for your graphics card from the list below.
- These modules provide support for synchronization, security, and
- DMA transfers. Please see <http://dri.sourceforge.net/> for more
- details. You should also select and configure AGP
- (/dev/agpgart) support.
-
-config DRM_TDFX
- tristate "3dfx Banshee/Voodoo3+"
- depends on DRM && PCI
- help
- Choose this option if you have a 3dfx Banshee or Voodoo3 (or later),
- graphics card. If M is selected, the module will be called tdfx.
-
-config DRM_R128
- tristate "ATI Rage 128"
- depends on DRM && PCI
- help
- Choose this option if you have an ATI Rage 128 graphics card. If M
- is selected, the module will be called r128. AGP support for
- this card is strongly suggested (unless you have a PCI version).
-
-config DRM_RADEON
- tristate "ATI Radeon"
- depends on DRM && PCI
- help
- Choose this option if you have an ATI Radeon graphics card. There
- are both PCI and AGP versions. You don't need to choose this to
- run the Radeon in plain VGA mode. There is a product page at
- <http://www.ati.com/na/pages/products/pc/radeon32/index.html>.
- If M is selected, the module will be called radeon.
-
-config DRM_I810
- tristate "Intel I810"
- depends on DRM && AGP && AGP_INTEL
- help
- Choose this option if you have an Intel I810 graphics card. If M is
- selected, the module will be called i810. AGP support is required
- for this driver to work.
-
-config DRM_MGA
- tristate "Matrox g200/g400"
- depends on DRM && (!X86_64 || BROKEN) && (!PPC || BROKEN)
- help
- Choose this option if you have a Matrox G200, G400, G450 or G550
- graphics card. If M is selected, the module will be called mga.
-
-config DRM_SIS
- tristate "SiS video cards"
- depends on DRM
- help
- Choose this option if you have a SiS 630 or compatible video
- chipset. If M is selected the module will be called sis.
-
-config DRM_VIA
- tristate "Via unichrome video cards"
- depends on DRM
- help
- Choose this option if you have a Via unichrome or compatible video
- chipset. If M is selected the module will be called via.
-
-config DRM_MACH64
- tristate "ATI Rage Pro (Mach64)"
- depends on DRM && PCI
- help
- Choose this option if you have an ATI Rage Pro (mach64 chipset)
- graphics card. Example cards include: 3D Rage Pro, Xpert 98,
- 3D Rage LT Pro, 3D Rage XL/XC, and 3D Rage Mobility (P/M, M1).
- Cards earlier than ATI Rage Pro (e.g. Rage II) are not supported.
- If M is selected, the module will be called mach64. AGP support for
- this card is strongly suggested (unless you have a PCI version).
-
-
+++ /dev/null
-# Makefile -- For the Direct Rendering Manager module (drm)
-#
-# Based on David Woodhouse's mtd build.
-#
-# Modified to handle the DRM requirements and builds on a wider range of
-# platforms in a flexible way by David Dawes. It's not clear, however,
-# that this approach is simpler than the old one.
-#
-# The purpose of this Makefile is to handle setting up everything
-# needed for an out-of-kernel source build. Makefile.kernel contains
-# everything required for in-kernel source builds. It is included into
-# this file, so none of that should be duplicated here.
-#
-# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux,v 1.40 2003/08/17 17:12:25 dawes Exp $
-#
-
-#
-# By default, the build is done against the running linux kernel source.
-# To build against a different kernel source tree, set LINUXDIR:
-#
-# make LINUXDIR=/path/to/kernel/source
-
-#
-# To build only some modules, either set DRM_MODULES to the list of modules,
-# or specify the modules as targets:
-#
-# make r128.o radeon.o
-#
-# or:
-#
-# make DRM_MODULES="r128 radeon"
-#
-
-SHELL=/bin/sh
-
-.SUFFIXES:
-
-ifndef LINUXDIR
-RUNNING_REL := $(shell uname -r)
-
-LINUXDIR := $(shell if [ -e /lib/modules/$(RUNNING_REL)/source ]; then \
- echo /lib/modules/$(RUNNING_REL)/source; \
- else echo /lib/modules/$(RUNNING_REL)/build; fi)
-endif
-
-ifndef O
-O := $(shell if [ -e /lib/modules/$(RUNNING_REL)/build ]; then \
- echo /lib/modules/$(RUNNING_REL)/build; \
- else echo ""; fi)
-#O := $(LINUXDIR)
-endif
-
-ifdef ARCH
-MACHINE := $(ARCH)
-else
-MACHINE := $(shell uname -m)
-endif
-
-# Modules for all architectures
-MODULE_LIST := drm.o tdfx.o r128.o radeon.o mga.o sis.o savage.o via.o \
- mach64.o xgi.o
-
-# Modules only for ix86 architectures
-ifneq (,$(findstring 86,$(MACHINE)))
-ARCHX86 := 1
-MODULE_LIST += i810.o
-endif
-
-ifneq (,$(findstring sparc64,$(MACHINE)))
-ARCHSPARC64 := 1
-#MODULE_LIST += ffb.o
-endif
-
-DRM_MODULES ?= $(MODULE_LIST)
-
-# These definitions are for handling dependencies in the out of kernel build.
-
-DRMHEADERS = drmP.h drm_compat.h drm_os_linux.h drm.h drm_sarea.h
-COREHEADERS = drm_core.h drm_sman.h drm_hashtab.h
-
-TDFXHEADERS = tdfx_drv.h $(DRMHEADERS)
-R128HEADERS = r128_drv.h r128_drm.h $(DRMHEADERS)
-RADEONHEADERS = radeon_drv.h radeon_drm.h r300_reg.h $(DRMHEADERS)
-MGAHEADERS = mga_drv.h mga_drm.h mga_ucode.h $(DRMHEADERS)
-I810HEADERS = i810_drv.h i810_drm.h $(DRMHEADERS)
-SISHEADERS= sis_drv.h sis_drm.h drm_hashtab.h drm_sman.h $(DRMHEADERS)
-SAVAGEHEADERS= savage_drv.h savage_drm.h $(DRMHEADERS)
-VIAHEADERS = via_drm.h via_drv.h via_3d_reg.h via_verifier.h $(DRMHEADERS)
-MACH64HEADERS = mach64_drv.h mach64_drm.h $(DRMHEADERS)
-FFBHEADERS = ffb_drv.h $(DRMHEADERS)
-NOUVEAUHEADERS = nouveau_drv.h nouveau_drm.h nouveau_reg.h $(DRMHEADERS)
-XGIHEADERS = xgi_cmdlist.h xgi_drv.h xgi_misc.h xgi_regs.h $(DRMHEADERS)
-
-CLEANFILES = *.o *.ko .depend .*.flags .*.d .*.cmd *.mod.c drm_pciids.h .tmp_versions
-
-# VERSION is not defined from the initial invocation. It is defined when
-# this Makefile is invoked from the kernel's root Makefile.
-
-ifndef VERSION
-
-ifdef RUNNING_REL
-
-# SuSE has the version.h and autoconf.h headers for the current kernel
-# in /boot as /boot/vmlinuz.version.h and /boot/vmlinuz.autoconf.h.
-# Check these first to see if they match the running kernel.
-
-BOOTVERSION_PREFIX = /boot/vmlinuz.
-
-V := $(shell if [ -f $(BOOTVERSION_PREFIX)version.h ]; then \
- grep UTS_RELEASE $(BOOTVERSION_PREFIX)version.h | \
- cut -d' ' -f3; fi)
-
-ifeq ($(V),"$(RUNNING_REL)")
-HEADERFROMBOOT := 1
-GETCONFIG := MAKEFILES=$(shell /bin/pwd)/.config
-HAVECONFIG := y
-endif
-
-# On Red Hat we need to check if there is a .config file in the kernel
-# source directory. If there isn't, we need to check if there's a
-# matching file in the configs subdirectory.
-
-ifneq ($(HAVECONFIG),y)
-HAVECONFIG := $(shell if [ -e $(LINUXDIR)/.config ]; then echo y; fi)
-endif
-
-ifneq ($(HAVECONFIG),y)
-REL_BASE := $(shell echo $(RUNNING_REL) | sed 's/-.*//')
-REL_TYPE := $(shell echo $(RUNNING_REL) | sed 's/[0-9.-]//g')
-ifeq ($(REL_TYPE),)
-RHCONFIG := configs/kernel-$(REL_BASE)-$(MACHINE).config
-else
-RHCONFIG := configs/kernel-$(REL_BASE)-$(MACHINE)-$(REL_TYPE).config
-endif
-HAVECONFIG := $(shell if [ -e $(LINUXDIR)/$(RHCONFIG) ]; then echo y; fi)
-ifneq ($(HAVECONFIG),y)
-RHCONFIG :=
-endif
-endif
-
-ifneq ($(HAVECONFIG),y)
-ifneq ($(0),$(LINUXDIR))
-GETCONFIG += O=$(O)
-endif
-HAVECONFIG := $(shell if [ -e $(O)/.config ]; then echo y; fi)
-endif
-
-ifneq ($(HAVECONFIG),y)
-$(error Cannot find a kernel config file)
-endif
-
-endif
-
-CLEANCONFIG := $(shell if cmp -s $(LINUXDIR)/.config .config; then echo y; fi)
-ifeq ($(CLEANCONFIG),y)
-CLEANFILES += $(LINUXDIR)/.config .config $(LINUXDIR)/tmp_include_depends
-endif
-
-all: modules
-
-modules: includes
- +make -C $(LINUXDIR) $(GETCONFIG) SUBDIRS=`/bin/pwd` DRMSRCDIR=`/bin/pwd` modules
-
-ifeq ($(HEADERFROMBOOT),1)
-
-BOOTHEADERS = version.h autoconf.h
-BOOTCONFIG = .config
-
-CLEANFILES += $(BOOTHEADERS) $(BOOTCONFIG)
-
-includes:: $(BOOTHEADERS) $(BOOTCONFIG)
-
-version.h: $(BOOTVERSION_PREFIX)version.h
- rm -f $@
- ln -s $< $@
-
-autoconf.h: $(BOOTVERSION_PREFIX)autoconf.h
- rm -f $@
- ln -s $< $@
-
-.config: $(BOOTVERSION_PREFIX)config
- rm -f $@
- ln -s $< $@
-endif
-
-# This prepares an unused Red Hat kernel tree for the build.
-ifneq ($(RHCONFIG),)
-includes:: $(LINUXDIR)/.config $(LINUXDIR)/tmp_include_depends .config
-
-$(LINUXDIR)/.config: $(LINUXDIR)/$(RHCONFIG)
- rm -f $@
- ln -s $< $@
-
-.config: $(LINUXDIR)/$(RHCONFIG)
- rm -f $@
- ln -s $< $@
-
-$(LINUXDIR)/tmp_include_depends:
- echo all: > $@
-endif
-
-# Make sure that the shared source files are linked into this directory.
-
-
-SHAREDDIR := ../shared-core
-
-ifeq ($(shell if [ -d $(SHAREDDIR) ]; then echo y; fi),y)
-includes:: drm_pciids.h
-
-drm_pciids.h: $(SHAREDDIR)/drm_pciids.txt
- sh ../scripts/create_linux_pci_lists.sh < $(SHAREDDIR)/drm_pciids.txt
-endif
-
-clean cleandir:
- rm -rf $(CLEANFILES)
-
-$(MODULE_LIST)::
- make DRM_MODULES=$@ modules
-
-install:
- make -C $(LINUXDIR) $(GETCONFIG) SUBDIRS=`/bin/pwd` DRMSRCDIR=`/bin/pwd` modules_install
-
-else
-
-# Check for kernel versions that we don't support.
-
-BELOW26 := $(shell if [ $(VERSION) -lt 2 -o $(PATCHLEVEL) -lt 6 ]; then \
- echo y; fi)
-
-ifeq ($(BELOW26),y)
-$(error Only 2.6.x and later kernels are supported \
- ($(VERSION).$(PATCHLEVEL).$(SUBLEVEL)))
-endif
-
-ifdef ARCHX86
-ifndef CONFIG_X86_CMPXCHG
-$(error CONFIG_X86_CMPXCHG needs to be enabled in the kernel)
-endif
-endif
-
-# This needs to go before all other include paths.
-CC += -I$(DRMSRCDIR)
-
-# Check for PAGE_AGP definition
-PAGE_AGP := $(shell cat $(LINUXDIR)/include/asm/agp.h 2>/dev/null | \
- grep -c PAGE_AGP)
-
-ifneq ($(PAGE_AGP),0)
-EXTRA_CFLAGS += -DHAVE_PAGE_AGP
-endif
-
-ifeq ($(OS_HAS_GEM), 1)
-EXTRA_CFLAGS += -DOS_HAS_GEM=1
-endif
-
-# Start with all modules turned off.
-CONFIG_DRM_GAMMA := n
-CONFIG_DRM_TDFX := n
-CONFIG_DRM_MGA := n
-CONFIG_DRM_I810 := n
-CONFIG_DRM_R128 := n
-CONFIG_DRM_RADEON := n
-CONFIG_DRM_SIS := n
-CONFIG_DRM_FFB := n
-CONFIG_DRM_SAVAGE := n
-CONFIG_DRM_VIA := n
-CONFIG_DRM_MACH64 := n
-CONFIG_DRM_NOUVEAU := n
-CONFIG_DRM_XGI := n
-
-# Enable module builds for the modules requested/supported.
-
-ifneq (,$(findstring tdfx,$(DRM_MODULES)))
-CONFIG_DRM_TDFX := m
-endif
-ifneq (,$(findstring r128,$(DRM_MODULES)))
-CONFIG_DRM_R128 := m
-endif
-ifneq (,$(findstring radeon,$(DRM_MODULES)))
-CONFIG_DRM_RADEON := m
-endif
-ifneq (,$(findstring sis,$(DRM_MODULES)))
-CONFIG_DRM_SIS := m
-endif
-ifneq (,$(findstring via,$(DRM_MODULES)))
-CONFIG_DRM_VIA := m
-endif
-ifneq (,$(findstring mach64,$(DRM_MODULES)))
-CONFIG_DRM_MACH64 := m
-endif
-ifneq (,$(findstring ffb,$(DRM_MODULES)))
-CONFIG_DRM_FFB := m
-endif
-ifneq (,$(findstring savage,$(DRM_MODULES)))
-CONFIG_DRM_SAVAGE := m
-endif
-ifneq (,$(findstring mga,$(DRM_MODULES)))
-CONFIG_DRM_MGA := m
-endif
-ifneq (,$(findstring nouveau,$(DRM_MODULES)))
-CONFIG_DRM_NOUVEAU := m
-endif
-ifneq (,$(findstring xgi,$(DRM_MODULES)))
-CONFIG_DRM_XGI := m
-endif
-
-# These require AGP support
-
-ifneq (,$(findstring i810,$(DRM_MODULES)))
-CONFIG_DRM_I810 := m
-endif
-
-GIT_REVISION := $(shell cd "$(DRMSRCDIR)" && git describe --abbrev=17)
-ifneq ($(GIT_REVISION),)
-EXTRA_CFLAGS+=-D"GIT_REVISION=\"$(GIT_REVISION)\""
-endif
-
-include $(DRMSRCDIR)/Makefile.kernel
-
-# Depencencies
-$(drm-objs): $(DRMHEADERS) $(COREHEADERS)
-$(tdfx-objs): $(TDFXHEADERS)
-$(r128-objs): $(R128HEADERS)
-$(mga-objs): $(MGAHEADERS)
-$(i810-objs): $(I810HEADERS)
-$(radeon-objs): $(RADEONHEADERS)
-$(sis-objs): $(SISHEADERS)
-$(ffb-objs): $(FFBHEADERS)
-$(savage-objs): $(SAVAGEHEADERS)
-$(via-objs): $(VIAHEADERS)
-$(mach64-objs): $(MACH64HEADERS)
-$(nouveau-objs): $(NOUVEAUHEADERS)
-$(xgi-objs): $(XGIHEADERS)
-
-endif
-
+++ /dev/null
-#
-# Makefile for the drm device driver. This driver provides support for the
-# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
-#
-# Based on David Woodhouse's mtd build.
-#
-# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel,v 1.18 2003/08/16 17:59:17 dawes Exp $
-#
-
-drm-objs := drm_auth.o drm_bufs.o drm_context.o drm_dma.o drm_drawable.o \
- drm_drv.o drm_fops.o drm_ioctl.o drm_irq.o \
- drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
- drm_sysfs.o drm_pci.o drm_agpsupport.o drm_scatter.o \
- drm_memory_debug.o ati_pcigart.o drm_sman.o \
- drm_hashtab.o drm_mm.o drm_compat.o \
- drm_vm_nopage_compat.o drm_gem.o
-tdfx-objs := tdfx_drv.o
-r128-objs := r128_drv.o r128_cce.o r128_state.o r128_irq.o
-mga-objs := mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o
-i810-objs := i810_drv.o i810_dma.o
-nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
- nouveau_object.o nouveau_irq.o nouveau_notifier.o nouveau_swmthd.o \
- nouveau_sgdma.o nouveau_dma.o nouveau_bo.o nouveau_fence.o \
- nouveau_backlight.o \
- nv04_timer.o \
- nv04_mc.o nv40_mc.o nv50_mc.o \
- nv04_fb.o nv10_fb.o nv40_fb.o \
- nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \
- nv04_graph.o nv10_graph.o nv20_graph.o \
- nv40_graph.o nv50_graph.o \
- nv04_instmem.o nv50_instmem.o
-radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o
-sis-objs := sis_drv.o sis_mm.o
-ffb-objs := ffb_drv.o ffb_context.o
-savage-objs := savage_drv.o savage_bci.o savage_state.o
-via-objs := via_irq.o via_drv.o via_map.o via_mm.o via_dma.o via_verifier.o \
- via_video.o via_dmablit.o
-mach64-objs := mach64_drv.o mach64_dma.o mach64_irq.o mach64_state.o
-xgi-objs := xgi_cmdlist.o xgi_drv.o xgi_fb.o xgi_misc.o xgi_pcie.o \
- xgi_fence.o
-
-ifeq ($(CONFIG_COMPAT),y)
-drm-objs += drm_ioc32.o
-radeon-objs += radeon_ioc32.o
-mga-objs += mga_ioc32.o
-r128-objs += r128_ioc32.o
-nouveau-objs += nouveau_ioc32.o
-xgi-objs += xgi_ioc32.o
-endif
-
-obj-m += drm.o
-obj-$(CONFIG_DRM_TDFX) += tdfx.o
-obj-$(CONFIG_DRM_R128) += r128.o
-obj-$(CONFIG_DRM_RADEON)+= radeon.o
-obj-$(CONFIG_DRM_MGA) += mga.o
-obj-$(CONFIG_DRM_I810) += i810.o
-obj-$(CONFIG_DRM_SIS) += sis.o
-obj-$(CONFIG_DRM_FFB) += ffb.o
-obj-$(CONFIG_DRM_SAVAGE)+= savage.o
-obj-$(CONFIG_DRM_VIA) += via.o
-obj-$(CONFIG_DRM_MACH64)+= mach64.o
-obj-$(CONFIG_DRM_NOUVEAU) += nouveau.o
-obj-$(CONFIG_DRM_XGI) += xgi.o
+++ /dev/null
-************************************************************
-* For the very latest on DRI development, please see: *
-* http://dri.freedesktop.org/ *
-************************************************************
-
-The Direct Rendering Manager (drm) is a device-independent kernel-level
-device driver that provides support for the XFree86 Direct Rendering
-Infrastructure (DRI).
-
-The DRM supports the Direct Rendering Infrastructure (DRI) in four major
-ways:
-
- 1. The DRM provides synchronized access to the graphics hardware via
- the use of an optimized two-tiered lock.
-
- 2. The DRM enforces the DRI security policy for access to the graphics
- hardware by only allowing authenticated X11 clients access to
- restricted regions of memory.
-
- 3. The DRM provides a generic DMA engine, complete with multiple
- queues and the ability to detect the need for an OpenGL context
- switch.
-
- 4. The DRM is extensible via the use of small device-specific modules
- that rely extensively on the API exported by the DRM module.
+++ /dev/null
-/**
- * \file ati_pcigart.c
- * ATI PCI GART support
- *
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
-# define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
-
-#define ATI_PCIE_WRITE 0x4
-#define ATI_PCIE_READ 0x8
-
-static __inline__ void gart_insert_page_into_table(struct drm_ati_pcigart_info *gart_info, dma_addr_t addr, u32 *pci_gart)
-{
- u32 page_base;
-
- page_base = (u32)addr & ATI_PCIGART_PAGE_MASK;
- switch(gart_info->gart_reg_if) {
- case DRM_ATI_GART_IGP:
- page_base |= (upper_32_bits(addr) & 0xff) << 4;
- page_base |= 0xc;
- break;
- case DRM_ATI_GART_PCIE:
- page_base >>= 8;
- page_base |= (upper_32_bits(addr) & 0xff) << 24;
- page_base |= ATI_PCIE_READ | ATI_PCIE_WRITE;
- break;
- default:
- case DRM_ATI_GART_PCI:
- break;
- }
- *pci_gart = cpu_to_le32(page_base);
-}
-
-static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
- struct drm_ati_pcigart_info *gart_info)
-{
- gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
- PAGE_SIZE,
- gart_info->table_mask);
- if (gart_info->table_handle == NULL)
- return -ENOMEM;
-
- return 0;
-}
-
-static void drm_ati_free_pcigart_table(struct drm_device *dev,
- struct drm_ati_pcigart_info *gart_info)
-{
- drm_pci_free(dev, gart_info->table_handle);
- gart_info->table_handle = NULL;
-}
-
-int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
-{
- struct drm_sg_mem *entry = dev->sg;
- unsigned long pages;
- int i;
- int max_pages;
-
- /* we need to support large memory configurations */
- if (!entry) {
- DRM_ERROR("no scatter/gather memory!\n");
- return 0;
- }
-
- if (gart_info->bus_addr) {
-
- max_pages = (gart_info->table_size / sizeof(u32));
- pages = (entry->pages <= max_pages)
- ? entry->pages : max_pages;
-
- for (i = 0; i < pages; i++) {
- if (!entry->busaddr[i])
- break;
- pci_unmap_page(dev->pdev, entry->busaddr[i],
- PAGE_SIZE, PCI_DMA_TODEVICE);
- }
-
- if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
- gart_info->bus_addr = 0;
- }
-
-
- if (gart_info->gart_table_location == DRM_ATI_GART_MAIN
- && gart_info->table_handle) {
-
- drm_ati_free_pcigart_table(dev, gart_info);
- }
-
- return 1;
-}
-EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
-
-int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
-{
- struct drm_sg_mem *entry = dev->sg;
- void *address = NULL;
- unsigned long pages;
- u32 *pci_gart;
- dma_addr_t bus_address = 0;
- int i, j, ret = 0;
- int max_pages;
- dma_addr_t entry_addr;
-
- if (!entry) {
- DRM_ERROR("no scatter/gather memory!\n");
- goto done;
- }
-
- if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
- DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
-
- ret = drm_ati_alloc_pcigart_table(dev, gart_info);
- if (ret) {
- DRM_ERROR("cannot allocate PCI GART page!\n");
- goto done;
- }
-
- address = gart_info->table_handle->vaddr;
- bus_address = gart_info->table_handle->busaddr;
- } else {
- address = gart_info->addr;
- bus_address = gart_info->bus_addr;
- DRM_DEBUG("PCI: Gart Table: VRAM %08llX mapped at %08lX\n",
- (u64)bus_address, (unsigned long)address);
- }
-
- pci_gart = (u32 *) address;
-
- max_pages = (gart_info->table_size / sizeof(u32));
- pages = (entry->pages <= max_pages)
- ? entry->pages : max_pages;
-
- memset(pci_gart, 0, max_pages * sizeof(u32));
-
- for (i = 0; i < pages; i++) {
- /* we need to support large memory configurations */
- entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
- 0, PAGE_SIZE, PCI_DMA_TODEVICE);
- if (entry->busaddr[i] == 0) {
- DRM_ERROR("unable to map PCIGART pages!\n");
- drm_ati_pcigart_cleanup(dev, gart_info);
- address = NULL;
- bus_address = 0;
- goto done;
- }
-
- entry_addr = entry->busaddr[i];
- for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
- gart_insert_page_into_table(gart_info, entry_addr, pci_gart);
- pci_gart++;
- entry_addr += ATI_PCIGART_PAGE_SIZE;
- }
- }
-
- ret = 1;
-
-#if defined(__i386__) || defined(__x86_64__)
- wbinvd();
-#else
- mb();
-#endif
-
- done:
- gart_info->addr = address;
- gart_info->bus_addr = bus_address;
- return ret;
-}
-EXPORT_SYMBOL(drm_ati_pcigart_init);
+++ /dev/null
- The Graphics Execution Manager
- Part of the Direct Rendering Manager
- ==============================
-
- Keith Packard <keithp@keithp.com>
- Eric Anholt <eric@anholt.net>
- 2008-5-9
-
-Contents:
-
- 1. GEM Overview
- 2. API overview and conventions
- 3. Object Creation/Destruction
- 4. Reading/writing contents
- 5. Mapping objects to userspace
- 6. Memory Domains
- 7. Execution (Intel specific)
- 8. Other misc Intel-specific functions
-
-1. Graphics Execution Manager Overview
-
-Gem is designed to manage graphics memory, control access to the graphics
-device execution context and handle the essentially NUMA environment unique
-to modern graphics hardware. Gem allows multiple applications to share
-graphics device resources without the need to constantly reload the entire
-graphics card. Data may be shared between multiple applications with gem
-ensuring that the correct memory synchronization occurs.
-
-Graphics data can consume arbitrary amounts of memory, with 3D applications
-constructing ever larger sets of textures and vertices. With graphics cards
-memory space growing larger every year, and graphics APIs growing more
-complex, we can no longer insist that each application save a complete copy
-of their graphics state so that the card can be re-initialized from user
-space at each context switch. Ensuring that graphics data remains persistent
-across context switches allows applications significant new functionality
-while also improving performance for existing APIs.
-
-Modern linux desktops include significant 3D rendering as a fundemental
-component of the desktop image construction process. 2D and 3D applications
-paint their content to offscreen storage and the central 'compositing
-manager' constructs the final screen image from those window contents. This
-means that pixel image data from these applications must move within reach
-of the compositing manager and used as source operands for screen image
-rendering operations.
-
-Gem provides simple mechanisms to manage graphics data and control execution
-flow within the linux operating system. Using many existing kernel
-subsystems, it does this with a modest amount of code.
-
-2. API Overview and Conventions
-
-All APIs here are defined in terms of ioctls appplied to the DRM file
-descriptor. To create and manipulate objects, an application must be
-'authorized' using the DRI or DRI2 protocols with the X server. To relax
-that, we will need to implement some better access control mechanisms within
-the hardware portion of the driver to prevent inappropriate
-cross-application data access.
-
-Any DRM driver which does not support GEM will return -ENODEV for all of
-these ioctls. Invalid object handles return -EINVAL. Invalid object names
-return -ENOENT. Other errors are as documented in the specific API below.
-
-To avoid the need to translate ioctl contents on mixed-size systems (with
-32-bit user space running on a 64-bit kernel), the ioctl data structures
-contain explicitly sized objects, using 64-bits for all size and pointer
-data and 32-bits for identifiers. In addition, the 64-bit objects are all
-carefully aligned on 64-bit boundaries. Because of this, all pointers in the
-ioctl data structures are passed as uint64_t values. Suitable casts will
-be necessary.
-
-One significant operation which is explicitly left out of this API is object
-locking. Applications are expected to perform locking of shared objects
-outside of the GEM api. This kind of locking is not necessary to safely
-manipulate the graphics engine, and with multiple objects interacting in
-unknown ways, per-object locking would likely introduce all kinds of
-lock-order issues. Punting this to the application seems like the only
-sensible plan. Given that DRM already offers a global lock on the hardware,
-this doesn't change the current situation.
-
-3. Object Creation and Destruction
-
-Gem provides explicit memory management primitives. System pages are
-allocated when the object is created, either as the fundemental storage for
-hardware where system memory is used by the graphics processor directly, or
-as backing store for graphics-processor resident memory.
-
-Objects are referenced from user space using handles. These are, for all
-intents and purposes, equivalent to file descriptors. We could simply use
-file descriptors were it not for the small limit (1024) of file descriptors
-available to applications, and for the fact that the X server (a rather
-significant user of this API) uses 'select' and has a limited maximum file
-descriptor for that operation. Given the ability to allocate more file
-descriptors, and given the ability to place these 'higher' in the file
-descriptor space, we'd love to simply use file descriptors.
-
-Objects may be published with a name so that other applications can access
-them. The name remains valid as long as the object exists. Right now, our
-DRI APIs use 32-bit integer names, so that's what we expose here
-
- A. Creation
-
- struct drm_gem_create {
- /**
- * Requested size for the object.
- *
- * The (page-aligned) allocated size for the object
- * will be returned.
- */
- uint64_t size;
- /**
- * Returned handle for the object.
- *
- * Object handles are nonzero.
- */
- uint32_t handle;
- uint32_t pad;
- };
-
- /* usage */
- create.size = 16384;
- ret = ioctl (fd, DRM_IOCTL_GEM_CREATE, &create);
- if (ret == 0)
- return create.handle;
-
- Note that the size is rounded up to a page boundary, and that
- the rounded-up size is returned in 'size'. No name is assigned to
- this object, making it local to this process.
-
- If insufficient memory is availabe, -ENOMEM will be returned.
-
- B. Closing
-
- struct drm_gem_close {
- /** Handle of the object to be closed. */
- uint32_t handle;
- uint32_t pad;
- };
-
-
- /* usage */
- close.handle = <handle>;
- ret = ioctl (fd, DRM_IOCTL_GEM_CLOSE, &close);
-
- This call makes the specified handle invalid, and if no other
- applications are using the object, any necessary graphics hardware
- synchronization is performed and the resources used by the object
- released.
-
- C. Naming
-
- struct drm_gem_flink {
- /** Handle for the object being named */
- uint32_t handle;
-
- /** Returned global name */
- uint32_t name;
- };
-
- /* usage */
- flink.handle = <handle>;
- ret = ioctl (fd, DRM_IOCTL_GEM_FLINK, &flink);
- if (ret == 0)
- return flink.name;
-
- Flink creates a name for the object and returns it to the
- application. This name can be used by other applications to gain
- access to the same object.
-
- D. Opening by name
-
- struct drm_gem_open {
- /** Name of object being opened */
- uint32_t name;
-
- /** Returned handle for the object */
- uint32_t handle;
-
- /** Returned size of the object */
- uint64_t size;
- };
-
- /* usage */
- open.name = <name>;
- ret = ioctl (fd, DRM_IOCTL_GEM_OPEN, &open);
- if (ret == 0) {
- *sizep = open.size;
- return open.handle;
- }
-
- Open accesses an existing object and returns a handle for it. If the
- object doesn't exist, -ENOENT is returned. The size of the object is
- also returned. This handle has all the same capabilities as the
- handle used to create the object. In particular, the object is not
- destroyed until all handles are closed.
-
-4. Basic read/write operations
-
-By default, gem objects are not mapped to the applications address space,
-getting data in and out of them is done with I/O operations instead. This
-allows the data to reside in otherwise unmapped pages, including pages in
-video memory on an attached discrete graphics card. In addition, using
-explicit I/O operations allows better control over cache contents, as
-graphics devices are generally not cache coherent with the CPU, mapping
-pages used for graphics into an application address space requires the use
-of expensive cache flushing operations. Providing direct control over
-graphics data access ensures that data are handled in the most efficient
-possible fashion.
-
- A. Reading
-
- struct drm_gem_pread {
- /** Handle for the object being read. */
- uint32_t handle;
- uint32_t pad;
- /** Offset into the object to read from */
- uint64_t offset;
- /** Length of data to read */
- uint64_t size;
- /** Pointer to write the data into. */
- uint64_t data_ptr; /* void * */
- };
-
- This copies data into the specified object at the specified
- position. Any necessary graphics device synchronization and
- flushing will be done automatically.
-
- struct drm_gem_pwrite {
- /** Handle for the object being written to. */
- uint32_t handle;
- uint32_t pad;
- /** Offset into the object to write to */
- uint64_t offset;
- /** Length of data to write */
- uint64_t size;
- /** Pointer to read the data from. */
- uint64_t data_ptr; /* void * */
- };
-
- This copies data out of the specified object into the
- waiting user memory. Again, device synchronization will
- be handled by the kernel to ensure user space sees a
- consistent view of the graphics device.
-
-5. Mapping objects to user space
-
-For most objects, reading/writing is the preferred interaction mode.
-However, when the CPU is involved in rendering to cover deficiencies in
-hardware support for particular operations, the CPU will want to directly
-access the relevant objects.
-
-Because mmap is fairly heavyweight, we allow applications to retain maps to
-objects persistently and then update how they're using the memory through a
-separate interface. Applications which fail to use this separate interface
-may exhibit unpredictable behaviour as memory consistency will not be
-preserved.
-
- A. Mapping
-
- struct drm_gem_mmap {
- /** Handle for the object being mapped. */
- uint32_t handle;
- uint32_t pad;
- /** Offset in the object to map. */
- uint64_t offset;
- /**
- * Length of data to map.
- *
- * The value will be page-aligned.
- */
- uint64_t size;
- /** Returned pointer the data was mapped at */
- uint64_t addr_ptr; /* void * */
- };
-
- /* usage */
- mmap.handle = <handle>;
- mmap.offset = <offset>;
- mmap.size = <size>;
- ret = ioctl (fd, DRM_IOCTL_GEM_MMAP, &mmap);
- if (ret == 0)
- return (void *) (uintptr_t) mmap.addr_ptr;
-
-
- B. Unmapping
-
- munmap (addr, length);
-
- Nothing strange here, just use the normal munmap syscall.
-
-6. Memory Domains
-
-Graphics devices remain a strong bastion of non cache-coherent memory. As a
-result, accessing data through one functional unit will end up loading that
-cache with data which then needs to be manually synchronized when that data
-is used with another functional unit.
-
-Tracking where data are resident is done by identifying how functional units
-deal with caches. Each cache is labeled as a separate memory domain. Then,
-each sequence of operations is expected to load data into various read
-domains and leave data in at most one write domain. Gem tracks the read and
-write memory domains of each object and performs the necessary
-synchronization operations when objects move from one domain set to another.
-
-For example, if operation 'A' constructs an image that is immediately used
-by operation 'B', then when the read domain for 'B' is not the same as the
-write domain for 'A', then the write domain must be flushed, and the read
-domain invalidated. If these two operations are both executed in the same
-command queue, then the flush operation can go inbetween them in the same
-queue, avoiding any kind of CPU-based synchronization and leaving the GPU to
-do the work itself.
-
-6.1 Memory Domains (GPU-independent)
-
- * DRM_GEM_DOMAIN_CPU.
-
- Objects in this domain are using caches which are connected to the CPU.
- Moving objects from non-CPU domains into the CPU domain can involve waiting
- for the GPU to finish with operations using this object. Moving objects
- from this domain to a GPU domain can involve flushing CPU caches and chipset
- buffers.
-
-6.1 GPU-independent memory domain ioctl
-
-This ioctl is independent of the GPU in use. So far, no use other than
-synchronizing objects to the CPU domain have been found; if that turns out
-to be generally true, this ioctl may be simplified further.
-
- A. Explicit domain control
-
- struct drm_gem_set_domain {
- /** Handle for the object */
- uint32_t handle;
-
- /** New read domains */
- uint32_t read_domains;
-
- /** New write domain */
- uint32_t write_domain;
- };
-
- /* usage */
- set_domain.handle = <handle>;
- set_domain.read_domains = <read_domains>;
- set_domain.write_domain = <write_domain>;
- ret = ioctl (fd, DRM_IOCTL_GEM_SET_DOMAIN, &set_domain);
-
- When the application wants to explicitly manage memory domains for
- an object, it can use this function. Usually, this is only used
- when the application wants to synchronize object contents between
- the GPU and CPU-based application rendering. In that case,
- the <read_domains> would be set to DRM_GEM_DOMAIN_CPU, and if the
- application were going to write to the object, the <write_domain>
- would also be set to DRM_GEM_DOMAIN_CPU. After the call, gem
- guarantees that all previous rendering operations involving this
- object are complete. The application is then free to access the
- object through the address returned by the mmap call. Afterwards,
- when the application again uses the object through the GPU, any
- necessary CPU flushing will occur and the object will be correctly
- synchronized with the GPU.
-
- Note that this synchronization is not required for any accesses
- going through the driver itself. The pread, pwrite and execbuffer
- ioctls all perform the necessary domain management internally.
- Explicit synchronization is only necessary when accessing the object
- through the mmap'd address.
-
-7. Execution (Intel specific)
-
-Managing the command buffers is inherently chip-specific, so the core of gem
-doesn't have any intrinsic functions. Rather, execution is left to the
-device-specific portions of the driver.
-
-The Intel DRM_I915_GEM_EXECBUFFER ioctl takes a list of gem objects, all of
-which are mapped to the graphics device. The last object in the list is the
-command buffer.
-
-7.1. Relocations
-
-Command buffers often refer to other objects, and to allow the kernel driver
-to move objects around, a sequence of relocations is associated with each
-object. Device-specific relocation operations are used to place the
-target-object relative value into the object.
-
-The Intel driver has a single relocation type:
-
- struct drm_i915_gem_relocation_entry {
- /**
- * Handle of the buffer being pointed to by this
- * relocation entry.
- *
- * It's appealing to make this be an index into the
- * mm_validate_entry list to refer to the buffer,
- * but this allows the driver to create a relocation
- * list for state buffers and not re-write it per
- * exec using the buffer.
- */
- uint32_t target_handle;
-
- /**
- * Value to be added to the offset of the target
- * buffer to make up the relocation entry.
- */
- uint32_t delta;
-
- /**
- * Offset in the buffer the relocation entry will be
- * written into
- */
- uint64_t offset;
-
- /**
- * Offset value of the target buffer that the
- * relocation entry was last written as.
- *
- * If the buffer has the same offset as last time, we
- * can skip syncing and writing the relocation. This
- * value is written back out by the execbuffer ioctl
- * when the relocation is written.
- */
- uint64_t presumed_offset;
-
- /**
- * Target memory domains read by this operation.
- */
- uint32_t read_domains;
-
- /*
- * Target memory domains written by this operation.
- *
- * Note that only one domain may be written by the
- * whole execbuffer operation, so that where there are
- * conflicts, the application will get -EINVAL back.
- */
- uint32_t write_domain;
- };
-
- 'target_handle', the handle to the target object. This object must
- be one of the objects listed in the execbuffer request or
- bad things will happen. The kernel doesn't check for this.
-
- 'offset' is where, in the source object, the relocation data
- are written. Each relocation value is a 32-bit value consisting
- of the location of the target object in the GPU memory space plus
- the 'delta' value included in the relocation.
-
- 'presumed_offset' is where user-space believes the target object
- lies in GPU memory space. If this value matches where the object
- actually is, then no relocation data are written, the kernel
- assumes that user space has set up data in the source object
- using this presumption. This offers a fairly important optimization
- as writing relocation data requires mapping of the source object
- into the kernel memory space.
-
- 'read_domains' and 'write_domains' list the usage by the source
- object of the target object. The kernel unions all of the domain
- information from all relocations in the execbuffer request. No more
- than one write_domain is allowed, otherwise an EINVAL error is
- returned. read_domains must contain write_domain. This domain
- information is used to synchronize buffer contents as described
- above in the section on domains.
-
-7.1.1 Memory Domains (Intel specific)
-
-The Intel GPU has several internal caches which are not coherent and hence
-require explicit synchronization. Memory domains provide the necessary data
-to synchronize what is needed while leaving other cache contents intact.
-
- * DRM_GEM_DOMAIN_I915_RENDER.
- The GPU 3D and 2D rendering operations use a unified rendering cache, so
- operations doing 3D painting and 2D blts will use this domain
-
- * DRM_GEM_DOMAIN_I915_SAMPLER
- Textures are loaded by the sampler through a separate cache, so
- any texture reading will use this domain. Note that the sampler
- and renderer use different caches, so moving an object from render target
- to texture source will require a domain transfer.
-
- * DRM_GEM_DOMAIN_I915_COMMAND
- The command buffer doesn't have an explicit cache (although it does
- read ahead quite a bit), so this domain just indicates that the object
- needs to be flushed to the GPU.
-
- * DRM_GEM_DOMAIN_I915_INSTRUCTION
- All of the programs on Gen4 and later chips use an instruction cache to
- speed program execution. It must be explicitly flushed when new programs
- are written to memory by the CPU.
-
- * DRM_GEM_DOMAIN_I915_VERTEX
- Vertex data uses two different vertex caches, but they're
- both flushed with the same instruction.
-
-7.2 Execution object list (Intel specific)
-
- struct drm_i915_gem_exec_object {
- /**
- * User's handle for a buffer to be bound into the GTT
- * for this operation.
- */
- uint32_t handle;
-
- /**
- * List of relocations to be performed on this buffer
- */
- uint32_t relocation_count;
- /* struct drm_i915_gem_relocation_entry *relocs */
- uint64_t relocs_ptr;
-
- /**
- * Required alignment in graphics aperture
- */
- uint64_t alignment;
-
- /**
- * Returned value of the updated offset of the object,
- * for future presumed_offset writes.
- */
- uint64_t offset;
- };
-
- Each object involved in a particular execution operation must be
- listed using one of these structures.
-
- 'handle' references the object.
-
- 'relocs_ptr' is a user-mode pointer to a array of 'relocation_count'
- drm_i915_gem_relocation_entry structs (see above) that
- define the relocations necessary in this buffer. Note that all
- relocations must reference other exec_object structures in the same
- execbuffer ioctl and that those other buffers must come earlier in
- the exec_object array. In other words, the dependencies mapped by the
- exec_object relocations must form a directed acyclic graph.
-
- 'alignment' is the byte alignment necessary for this buffer. Each
- object has specific alignment requirements, as the kernel doesn't
- know what each object is being used for, those requirements must be
- provided by user mode. If an object is used in two different ways,
- it's quite possible that the alignment requirements will differ.
-
- 'offset' is a return value, receiving the location of the object
- during this execbuffer operation. The application should use this
- as the presumed offset in future operations; if the object does not
- move, then kernel need not write relocation data.
-
-7.3 Execbuffer ioctl (Intel specific)
-
- struct drm_i915_gem_execbuffer {
- /**
- * List of buffers to be validated with their
- * relocations to be performend on them.
- *
- * These buffers must be listed in an order such that
- * all relocations a buffer is performing refer to
- * buffers that have already appeared in the validate
- * list.
- */
- /* struct drm_i915_gem_validate_entry *buffers */
- uint64_t buffers_ptr;
- uint32_t buffer_count;
-
- /**
- * Offset in the batchbuffer to start execution from.
- */
- uint32_t batch_start_offset;
-
- /**
- * Bytes used in batchbuffer from batch_start_offset
- */
- uint32_t batch_len;
- uint32_t DR1;
- uint32_t DR4;
- uint32_t num_cliprects;
- uint64_t cliprects_ptr; /* struct drm_clip_rect *cliprects */
- };
-
-
- 'buffers_ptr' is a user-mode pointer to an array of 'buffer_count'
- drm_i915_gem_exec_object structures which contains the complete set
- of objects required for this execbuffer operation. The last entry in
- this array, the 'batch buffer', is the buffer of commands which will
- be linked to the ring and executed.
-
- 'batch_start_offset' is the byte offset within the batch buffer which
- contains the first command to execute. So far, we haven't found a
- reason to use anything other than '0' here, but the thought was that
- some space might be allocated for additional initialization which
- could be skipped in some cases. This must be a multiple of 4.
-
- 'batch_len' is the length, in bytes, of the data to be executed
- (i.e., the amount of data after batch_start_offset). This must
- be a multiple of 4.
-
- 'num_cliprects' and 'cliprects_ptr' reference an array of
- drm_clip_rect structures that is num_cliprects long. The entire
- batch buffer will be executed multiple times, once for each
- rectangle in this list. If num_cliprects is 0, then no clipping
- rectangle will be set.
-
- 'DR1' and 'DR4' are portions of the 3DSTATE_DRAWING_RECTANGLE
- command which will be queued when this operation is clipped
- (num_cliprects != 0).
-
- DR1 bit definition
- 31 Fast Scissor Clip Disable (debug only).
- Disables a hardware optimization that
- improves performance. This should have
- no visible effect, other than reducing
- performance
-
- 30 Depth Buffer Coordinate Offset Disable.
- This disables the addition of the
- depth buffer offset bits which are used
- to change the location of the depth buffer
- relative to the front buffer.
-
- 27:26 X Dither Offset. Specifies the X pixel
- offset to use when accessing the dither table
-
- 25:24 Y Dither Offset. Specifies the Y pixel
- offset to use when accessing the dither
- table.
-
- DR4 bit definition
- 31:16 Drawing Rectangle Origin Y. Specifies the Y
- origin of coordinates relative to the
- draw buffer.
-
- 15:0 Drawing Rectangle Origin X. Specifies the X
- origin of coordinates relative to the
- draw buffer.
-
- As you can see, these two fields are necessary for correctly
- offsetting drawing within a buffer which contains multiple surfaces.
- Note that DR1 is only used on Gen3 and earlier hardware and that
- newer hardware sticks the dither offset elsewhere.
-
-7.3.1 Detailed Execution Description
-
- Execution of a single batch buffer requires several preparatory
- steps to make the objects visible to the graphics engine and resolve
- relocations to account for their current addresses.
-
- A. Mapping and Relocation
-
- Each exec_object structure in the array is examined in turn.
-
- If the object is not already bound to the GTT, it is assigned a
- location in the graphics address space. If no space is available in
- the GTT, some other object will be evicted. This may require waiting
- for previous execbuffer requests to complete before that object can
- be unmapped. With the location assigned, the pages for the object
- are pinned in memory using find_or_create_page and the GTT entries
- updated to point at the relevant pages using drm_agp_bind_pages.
-
- Then the array of relocations is traversed. Each relocation record
- looks up the target object and, if the presumed offset does not
- match the current offset (remember that this buffer has already been
- assigned an address as it must have been mapped earlier), the
- relocation value is computed using the current offset. If the
- object is currently in use by the graphics engine, writing the data
- out must be preceeded by a delay while the object is still busy.
- Once it is idle, then the page containing the relocation is mapped
- by the CPU and the updated relocation data written out.
-
- The read_domains and write_domain entries in each relocation are
- used to compute the new read_domains and write_domain values for the
- target buffers. The actual execution of the domain changes must wait
- until all of the exec_object entries have been evaluated as the
- complete set of domain information will not be available until then.
-
- B. Memory Domain Resolution
-
- After all of the new memory domain data has been pulled out of the
- relocations and computed for each object, the list of objects is
- again traversed and the new memory domains compared against the
- current memory domains. There are two basic operations involved here:
-
- * Flushing the current write domain. If the new read domains
- are not equal to the current write domain, then the current
- write domain must be flushed. Otherwise, reads will not see data
- present in the write domain cache. In addition, any new read domains
- other than the current write domain must be invalidated to ensure
- that the flushed data are re-read into their caches.
-
- * Invaliding new read domains. Any domains which were not currently
- used for this object must be invalidated as old objects which
- were mapped at the same location may have stale data in the new
- domain caches.
-
- If the CPU cache is being invalidated and some GPU cache is being
- flushed, then we'll have to wait for rendering to complete so that
- any pending GPU writes will be complete before we flush the GPU
- cache.
-
- If the CPU cache is being flushed, then we use 'clflush' to get data
- written from the CPU.
-
- Because the GPU caches cannot be partially flushed or invalidated,
- we don't actually flush them during this traversal stage. Rather, we
- gather the invalidate and flush bits up in the device structure.
-
- Once all of the object domain changes have been evaluated, then the
- gathered invalidate and flush bits are examined. For any GPU flush
- operations, we emit a single MI_FLUSH command that performs all of
- the necessary flushes. We then look to see if the CPU cache was
- flushed. If so, we use the chipset flush magic (writing to a special
- page) to get the data out of the chipset and into memory.
-
- C. Queuing Batch Buffer to the Ring
-
- With all of the objects resident in graphics memory space, and all
- of the caches prepared with appropriate data, the batch buffer
- object can be queued to the ring. If there are clip rectangles, then
- the buffer is queued once per rectangle, with suitable clipping
- inserted into the ring just before the batch buffer.
-
- D. Creating an IRQ Cookie
-
- Right after the batch buffer is placed in the ring, a request to
- generate an IRQ is added to the ring along with a command to write a
- marker into memory. When the IRQ fires, the driver can look at the
- memory location to see where in the ring the GPU has passed. This
- magic cookie value is stored in each object used in this execbuffer
- command; it is used whereever you saw 'wait for rendering' above in
- this document.
-
- E. Writing back the new object offsets
-
- So that the application has a better idea what to use for
- 'presumed_offset' values later, the current object offsets are
- written back to the exec_object structures.
-
-
-8. Other misc Intel-specific functions.
-
-To complete the driver, a few other functions were necessary.
-
-8.1 Initialization from the X server
-
-As the X server is currently responsible for apportioning memory between 2D
-and 3D, it must tell the kernel which region of the GTT aperture is
-available for 3D objects to be mapped into.
-
- struct drm_i915_gem_init {
- /**
- * Beginning offset in the GTT to be managed by the
- * DRM memory manager.
- */
- uint64_t gtt_start;
- /**
- * Ending offset in the GTT to be managed by the DRM
- * memory manager.
- */
- uint64_t gtt_end;
- };
- /* usage */
- init.gtt_start = <gtt_start>;
- init.gtt_end = <gtt_end>;
- ret = ioctl (fd, DRM_IOCTL_I915_GEM_INIT, &init);
-
- The GTT aperture between gtt_start and gtt_end will be used to map
- objects. This also tells the kernel that the ring can be used,
- pulling the ring addresses from the device registers.
-
-8.2 Pinning objects in the GTT
-
-For scan-out buffers and the current shared depth and back buffers, we need
-to have them always available in the GTT, at least for now. Pinning means to
-lock their pages in memory along with keeping them at a fixed offset in the
-graphics aperture. These operations are available only to root.
-
- struct drm_i915_gem_pin {
- /** Handle of the buffer to be pinned. */
- uint32_t handle;
- uint32_t pad;
-
- /** alignment required within the aperture */
- uint64_t alignment;
-
- /** Returned GTT offset of the buffer. */
- uint64_t offset;
- };
-
- /* usage */
- pin.handle = <handle>;
- pin.alignment = <alignment>;
- ret = ioctl (fd, DRM_IOCTL_I915_GEM_PIN, &pin);
- if (ret == 0)
- return pin.offset;
-
- Pinning an object ensures that it will not be evicted from the GTT
- or moved. It will stay resident until destroyed or unpinned.
-
- struct drm_i915_gem_unpin {
- /** Handle of the buffer to be unpinned. */
- uint32_t handle;
- uint32_t pad;
- };
-
- /* usage */
- unpin.handle = <handle>;
- ret = ioctl (fd, DRM_IOCTL_I915_GEM_UNPIN, &unpin);
-
- Unpinning an object makes it possible to evict this object from the
- GTT. It doesn't ensure that it will be evicted, just that it may.
-
+++ /dev/null
-../shared-core/drm.h
\ No newline at end of file
+++ /dev/null
-/**
- * \file drmP.h
- * Private header for Direct Rendering Manager
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef _DRM_P_H_
-#define _DRM_P_H_
-
-#ifdef __KERNEL__
-#ifdef __alpha__
-/* add include of current.h so that "current" is defined
- * before static inline funcs in wait.h. Doing this so we
- * can build the DRM (part of PI DRI). 4/21/2000 S + B */
-#include <asm/current.h>
-#endif /* __alpha__ */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/miscdevice.h>
-#include <linux/fs.h>
-#include <linux/proc_fs.h>
-#include <linux/init.h>
-#include <linux/file.h>
-#include <linux/pci.h>
-#include <linux/version.h>
-#include <linux/sched.h>
-#include <linux/smp_lock.h> /* For (un)lock_kernel */
-#include <linux/dma-mapping.h>
-#include <linux/mm.h>
-#include <linux/kref.h>
-#include <linux/pagemap.h>
-#include <linux/mutex.h>
-#if defined(__alpha__) || defined(__powerpc__)
-#include <asm/pgtable.h> /* For pte_wrprotect */
-#endif
-#include <asm/io.h>
-#include <asm/mman.h>
-#include <asm/uaccess.h>
-#ifdef CONFIG_MTRR
-#include <asm/mtrr.h>
-#endif
-#include <asm/agp.h>
-#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
-#include <linux/types.h>
-#include <linux/agp_backend.h>
-#endif
-#include <linux/workqueue.h>
-#include <linux/poll.h>
-#include <asm/pgalloc.h>
-#include "drm.h"
-#include <linux/slab.h>
-#include <linux/idr.h>
-
-#define __OS_HAS_AGP (defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE)))
-#define __OS_HAS_MTRR (defined(CONFIG_MTRR))
-
-#include "drm_os_linux.h"
-#include "drm_hashtab.h"
-#include "drm_internal.h"
-
-struct drm_device;
-struct drm_file;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-typedef unsigned long uintptr_t;
-#endif
-
-/* If you want the memory alloc debug functionality, change define below */
-/* #define DEBUG_MEMORY */
-
-/***********************************************************************/
-/** \name DRM template customization defaults */
-/*@{*/
-
-/* driver capabilities and requirements mask */
-#define DRIVER_USE_AGP 0x1
-#define DRIVER_REQUIRE_AGP 0x2
-#define DRIVER_USE_MTRR 0x4
-#define DRIVER_PCI_DMA 0x8
-#define DRIVER_SG 0x10
-#define DRIVER_HAVE_DMA 0x20
-#define DRIVER_HAVE_IRQ 0x40
-#define DRIVER_IRQ_SHARED 0x80
-#define DRIVER_DMA_QUEUE 0x100
-#define DRIVER_FB_DMA 0x200
-#define DRIVER_GEM 0x400
-
-/*@}*/
-
-/***********************************************************************/
-/** \name Begin the DRM... */
-/*@{*/
-
-#define DRM_DEBUG_CODE 2 /**< Include debugging code if > 1, then
- also include looping detection. */
-
-#define DRM_MAGIC_HASH_ORDER 4 /**< Size of key hash table. Must be power of 2. */
-#define DRM_KERNEL_CONTEXT 0 /**< Change drm_resctx if changed */
-#define DRM_RESERVED_CONTEXTS 1 /**< Change drm_resctx if changed */
-#define DRM_LOOPING_LIMIT 5000000
-#define DRM_TIME_SLICE (HZ/20) /**< Time slice for GLXContexts */
-#define DRM_LOCK_SLICE 1 /**< Time slice for lock, in jiffies */
-
-#define DRM_FLAG_DEBUG 0x01
-
-#define DRM_MEM_DMA 0
-#define DRM_MEM_SAREA 1
-#define DRM_MEM_DRIVER 2
-#define DRM_MEM_MAGIC 3
-#define DRM_MEM_IOCTLS 4
-#define DRM_MEM_MAPS 5
-#define DRM_MEM_VMAS 6
-#define DRM_MEM_BUFS 7
-#define DRM_MEM_SEGS 8
-#define DRM_MEM_PAGES 9
-#define DRM_MEM_FILES 10
-#define DRM_MEM_QUEUES 11
-#define DRM_MEM_CMDS 12
-#define DRM_MEM_MAPPINGS 13
-#define DRM_MEM_BUFLISTS 14
-#define DRM_MEM_AGPLISTS 15
-#define DRM_MEM_TOTALAGP 16
-#define DRM_MEM_BOUNDAGP 17
-#define DRM_MEM_CTXBITMAP 18
-#define DRM_MEM_STUB 19
-#define DRM_MEM_SGLISTS 20
-#define DRM_MEM_CTXLIST 21
-#define DRM_MEM_MM 22
-#define DRM_MEM_HASHTAB 23
-#define DRM_MEM_OBJECTS 24
-#define DRM_MEM_BUFOBJ 27
-
-#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
-#define DRM_MAP_HASH_OFFSET 0x10000000
-#define DRM_MAP_HASH_ORDER 12
-#define DRM_OBJECT_HASH_ORDER 12
-#define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFFUL >> PAGE_SHIFT) + 1)
-#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFFUL >> PAGE_SHIFT) * 16)
-/*
- * This should be small enough to allow the use of kmalloc for hash tables
- * instead of vmalloc.
- */
-
-#define DRM_FILE_HASH_ORDER 8
-#define DRM_MM_INIT_MAX_PAGES 256
-
-/*@}*/
-
-#include "drm_compat.h"
-
-/***********************************************************************/
-/** \name Macros to make printk easier */
-/*@{*/
-
-/**
- * Error output.
- *
- * \param fmt printf() like format string.
- * \param arg arguments
- */
-#define DRM_ERROR(fmt, arg...) \
- printk(KERN_ERR "[" DRM_NAME ":%s] *ERROR* " fmt , __FUNCTION__ , ##arg)
-
-/**
- * Memory error output.
- *
- * \param area memory area where the error occurred.
- * \param fmt printf() like format string.
- * \param arg arguments
- */
-#define DRM_MEM_ERROR(area, fmt, arg...) \
- printk(KERN_ERR "[" DRM_NAME ":%s:%s] *ERROR* " fmt , __FUNCTION__, \
- drm_mem_stats[area].name , ##arg)
-#define DRM_INFO(fmt, arg...) printk(KERN_INFO "[" DRM_NAME "] " fmt , ##arg)
-
-/**
- * Debug output.
- *
- * \param fmt printf() like format string.
- * \param arg arguments
- */
-#if DRM_DEBUG_CODE
-#define DRM_DEBUG(fmt, arg...) \
- do { \
- if ( drm_debug ) \
- printk(KERN_DEBUG \
- "[" DRM_NAME ":%s] " fmt , \
- __FUNCTION__ , ##arg); \
- } while (0)
-#else
-#define DRM_DEBUG(fmt, arg...) do { } while (0)
-#endif
-
-#define DRM_PROC_LIMIT (PAGE_SIZE-80)
-
-#define DRM_PROC_PRINT(fmt, arg...) \
- len += sprintf(&buf[len], fmt , ##arg); \
- if (len > DRM_PROC_LIMIT) { *eof = 1; return len - offset; }
-
-#define DRM_PROC_PRINT_RET(ret, fmt, arg...) \
- len += sprintf(&buf[len], fmt , ##arg); \
- if (len > DRM_PROC_LIMIT) { ret; *eof = 1; return len - offset; }
-
-/*@}*/
-
-/***********************************************************************/
-/** \name Internal types and structures */
-/*@{*/
-
-#define DRM_ARRAY_SIZE(x) ARRAY_SIZE(x)
-#define DRM_MIN(a,b) min(a,b)
-#define DRM_MAX(a,b) max(a,b)
-
-#define DRM_LEFTCOUNT(x) (((x)->rp + (x)->count - (x)->wp) % ((x)->count + 1))
-#define DRM_BUFCOUNT(x) ((x)->count - DRM_LEFTCOUNT(x))
-#define DRM_WAITCOUNT(dev,idx) DRM_BUFCOUNT(&dev->queuelist[idx]->waitlist)
-
-#define DRM_IF_VERSION(maj, min) (maj << 16 | min)
-/**
- * Get the private SAREA mapping.
- *
- * \param _dev DRM device.
- * \param _ctx context number.
- * \param _map output mapping.
- */
-#define DRM_GET_PRIV_SAREA(_dev, _ctx, _map) do { \
- (_map) = (_dev)->context_sareas[_ctx]; \
-} while(0)
-
-/**
- * Test that the hardware lock is held by the caller, returning otherwise.
- *
- * \param dev DRM device.
- * \param file_priv DRM file private pointer of the caller.
- */
-#define LOCK_TEST_WITH_RETURN( dev, file_priv ) \
-do { \
- if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
- dev->lock.file_priv != file_priv ) { \
- DRM_ERROR( "%s called without lock held, held %d owner %p %p\n",\
- __FUNCTION__, _DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ),\
- dev->lock.file_priv, file_priv ); \
- return -EINVAL; \
- } \
-} while (0)
-
-/**
- * Copy and IOCTL return string to user space
- */
-#define DRM_COPY( name, value ) \
- len = strlen( value ); \
- if ( len > name##_len ) len = name##_len; \
- name##_len = strlen( value ); \
- if ( len && name ) { \
- if ( copy_to_user( name, value, len ) ) \
- return -EFAULT; \
- }
-
-/**
- * Ioctl function type.
- *
- * \param dev DRM device structure
- * \param data pointer to kernel-space stored data, copied in and out according
- * to ioctl description.
- * \param file_priv DRM file private pointer.
- */
-typedef int drm_ioctl_t(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-typedef int drm_ioctl_compat_t(struct file *filp, unsigned int cmd,
- unsigned long arg);
-
-#define DRM_AUTH 0x1
-#define DRM_MASTER 0x2
-#define DRM_ROOT_ONLY 0x4
-
-struct drm_ioctl_desc {
- unsigned int cmd;
- drm_ioctl_t *func;
- int flags;
-};
-/**
- * Creates a driver or general drm_ioctl_desc array entry for the given
- * ioctl, for use by drm_ioctl().
- */
-#define DRM_IOCTL_DEF(ioctl, func, flags) \
- [DRM_IOCTL_NR(ioctl)] = {ioctl, func, flags}
-
-struct drm_magic_entry {
- struct list_head head;
- struct drm_hash_item hash_item;
- struct drm_file *priv;
-};
-
-struct drm_vma_entry {
- struct list_head head;
- struct vm_area_struct *vma;
- pid_t pid;
-};
-
-/**
- * DMA buffer.
- */
-struct drm_buf {
- int idx; /**< Index into master buflist */
- int total; /**< Buffer size */
- int order; /**< log-base-2(total) */
- int used; /**< Amount of buffer in use (for DMA) */
- unsigned long offset; /**< Byte offset (used internally) */
- void *address; /**< Address of buffer */
- unsigned long bus_address; /**< Bus address of buffer */
- struct drm_buf *next; /**< Kernel-only: used for free list */
- __volatile__ int waiting; /**< On kernel DMA queue */
- __volatile__ int pending; /**< On hardware DMA queue */
- wait_queue_head_t dma_wait; /**< Processes waiting */
- struct drm_file *file_priv; /**< Private of holding file descr */
- int context; /**< Kernel queue for this buffer */
- int while_locked; /**< Dispatch this buffer while locked */
- enum {
- DRM_LIST_NONE = 0,
- DRM_LIST_FREE = 1,
- DRM_LIST_WAIT = 2,
- DRM_LIST_PEND = 3,
- DRM_LIST_PRIO = 4,
- DRM_LIST_RECLAIM = 5
- } list; /**< Which list we're on */
-
- int dev_priv_size; /**< Size of buffer private storage */
- void *dev_private; /**< Per-buffer private storage */
-};
-
-/** bufs is one longer than it has to be */
-struct drm_waitlist {
- int count; /**< Number of possible buffers */
- struct drm_buf **bufs; /**< List of pointers to buffers */
- struct drm_buf **rp; /**< Read pointer */
- struct drm_buf **wp; /**< Write pointer */
- struct drm_buf **end; /**< End pointer */
- spinlock_t read_lock;
- spinlock_t write_lock;
-};
-
-struct drm_freelist {
- int initialized; /**< Freelist in use */
- atomic_t count; /**< Number of free buffers */
- struct drm_buf *next; /**< End pointer */
-
- wait_queue_head_t waiting; /**< Processes waiting on free bufs */
- int low_mark; /**< Low water mark */
- int high_mark; /**< High water mark */
- atomic_t wfh; /**< If waiting for high mark */
- spinlock_t lock;
-};
-
-typedef struct drm_dma_handle {
- dma_addr_t busaddr;
- void *vaddr;
- size_t size;
-} drm_dma_handle_t;
-
-/**
- * Buffer entry. There is one of this for each buffer size order.
- */
-struct drm_buf_entry {
- int buf_size; /**< size */
- int buf_count; /**< number of buffers */
- struct drm_buf *buflist; /**< buffer list */
- int seg_count;
- int page_order;
- struct drm_dma_handle **seglist;
- struct drm_freelist freelist;
-};
-
-
-enum drm_ref_type {
- _DRM_REF_USE = 0,
- _DRM_REF_TYPE1,
- _DRM_NO_REF_TYPES
-};
-
-
-/** File private data */
-struct drm_file {
- int authenticated;
- int master;
- pid_t pid;
- uid_t uid;
- drm_magic_t magic;
- unsigned long ioctl_count;
- struct list_head lhead;
- struct drm_minor *minor;
- int remove_auth_on_close;
- unsigned long lock_count;
-
- /*
- * The user object hash table is global and resides in the
- * drm_device structure. We protect the lists and hash tables with the
- * device struct_mutex. A bit coarse-grained but probably the best
- * option.
- */
-
- struct list_head refd_objects;
-
- /** Mapping of mm object handles to object pointers. */
- struct idr object_idr;
- /** Lock for synchronization of access to object_idr. */
- spinlock_t table_lock;
-
- struct drm_open_hash refd_object_hash[_DRM_NO_REF_TYPES];
- struct file *filp;
- void *driver_priv;
-};
-
-/** Wait queue */
-struct drm_queue {
- atomic_t use_count; /**< Outstanding uses (+1) */
- atomic_t finalization; /**< Finalization in progress */
- atomic_t block_count; /**< Count of processes waiting */
- atomic_t block_read; /**< Queue blocked for reads */
- wait_queue_head_t read_queue; /**< Processes waiting on block_read */
- atomic_t block_write; /**< Queue blocked for writes */
- wait_queue_head_t write_queue; /**< Processes waiting on block_write */
-#if 1
- atomic_t total_queued; /**< Total queued statistic */
- atomic_t total_flushed; /**< Total flushes statistic */
- atomic_t total_locks; /**< Total locks statistics */
-#endif
- enum drm_ctx_flags flags; /**< Context preserving and 2D-only */
- struct drm_waitlist waitlist; /**< Pending buffers */
- wait_queue_head_t flush_queue; /**< Processes waiting until flush */
-};
-
-/**
- * Lock data.
- */
-struct drm_lock_data {
- struct drm_hw_lock *hw_lock; /**< Hardware lock */
- /** Private of lock holder's file (NULL=kernel) */
- struct drm_file *file_priv;
- wait_queue_head_t lock_queue; /**< Queue of blocked processes */
- unsigned long lock_time; /**< Time of last lock in jiffies */
- spinlock_t spinlock;
- uint32_t kernel_waiters;
- uint32_t user_waiters;
- int idle_has_lock;
-};
-
-/**
- * DMA data.
- */
-struct drm_device_dma {
-
- struct drm_buf_entry bufs[DRM_MAX_ORDER + 1]; /**< buffers, grouped by their size order */
- int buf_count; /**< total number of buffers */
- struct drm_buf **buflist; /**< Vector of pointers into drm_device_dma::bufs */
- int seg_count;
- int page_count; /**< number of pages */
- unsigned long *pagelist; /**< page list */
- unsigned long byte_count;
- enum {
- _DRM_DMA_USE_AGP = 0x01,
- _DRM_DMA_USE_SG = 0x02,
- _DRM_DMA_USE_FB = 0x04,
- _DRM_DMA_USE_PCI_RO = 0x08
- } flags;
-
-};
-
-/**
- * AGP memory entry. Stored as a doubly linked list.
- */
-struct drm_agp_mem {
- unsigned long handle; /**< handle */
- DRM_AGP_MEM *memory;
- unsigned long bound; /**< address */
- int pages;
- struct list_head head;
-};
-
-/**
- * AGP data.
- *
- * \sa drm_agp_init() and drm_device::agp.
- */
-struct drm_agp_head {
- DRM_AGP_KERN agp_info; /**< AGP device information */
- struct list_head memory;
- unsigned long mode; /**< AGP mode */
- struct agp_bridge_data *bridge;
- int enabled; /**< whether the AGP bus as been enabled */
- int acquired; /**< whether the AGP device has been acquired */
- unsigned long base;
- int agp_mtrr;
- int cant_use_aperture;
- unsigned long page_mask;
-};
-
-/**
- * Scatter-gather memory.
- */
-struct drm_sg_mem {
- unsigned long handle;
- void *virtual;
- int pages;
- struct page **pagelist;
- dma_addr_t *busaddr;
-};
-
-struct drm_sigdata {
- int context;
- struct drm_hw_lock *lock;
-};
-
-
-/*
- * Generic memory manager structs
- */
-
-struct drm_mm_node {
- struct list_head fl_entry;
- struct list_head ml_entry;
- int free;
- unsigned long start;
- unsigned long size;
- struct drm_mm *mm;
- void *private;
-};
-
-struct drm_mm {
- struct list_head fl_entry;
- struct list_head ml_entry;
-};
-
-
-/**
- * Mappings list
- */
-struct drm_map_list {
- struct list_head head; /**< list head */
- struct drm_hash_item hash;
- struct drm_map *map; /**< mapping */
- uint64_t user_token;
- struct drm_mm_node *file_offset_node;
-};
-
-typedef struct drm_map drm_local_map_t;
-
-/**
- * Context handle list
- */
-struct drm_ctx_list {
- struct list_head head; /**< list head */
- drm_context_t handle; /**< context handle */
- struct drm_file *tag; /**< associated fd private data */
-};
-
-struct drm_vbl_sig {
- struct list_head head;
- unsigned int sequence;
- struct siginfo info;
- struct task_struct *task;
-};
-
-/* location of GART table */
-#define DRM_ATI_GART_MAIN 1
-#define DRM_ATI_GART_FB 2
-
-#define DRM_ATI_GART_PCI 1
-#define DRM_ATI_GART_PCIE 2
-#define DRM_ATI_GART_IGP 3
-
-struct drm_ati_pcigart_info {
- int gart_table_location;
- int gart_reg_if;
- void *addr;
- dma_addr_t bus_addr;
- dma_addr_t table_mask;
- dma_addr_t member_mask;
- struct drm_dma_handle *table_handle;
- drm_local_map_t mapping;
- int table_size;
-};
-
-/**
- * This structure defines the drm_mm memory object, which will be used by the
- * DRM for its buffer objects.
- */
-struct drm_gem_object {
- /** Reference count of this object */
- struct kref refcount;
-
- /** Handle count of this object. Each handle also holds a reference */
- struct kref handlecount;
-
- /** Related drm device */
- struct drm_device *dev;
-
- /** File representing the shmem storage */
- struct file *filp;
-
- /**
- * Size of the object, in bytes. Immutable over the object's
- * lifetime.
- */
- size_t size;
-
- /**
- * Global name for this object, starts at 1. 0 means unnamed.
- * Access is covered by the object_name_lock in the related drm_device
- */
- int name;
-
- /**
- * Memory domains. These monitor which caches contain read/write data
- * related to the object. When transitioning from one set of domains
- * to another, the driver is called to ensure that caches are suitably
- * flushed and invalidated
- */
- uint32_t read_domains;
- uint32_t write_domain;
-
- /**
- * While validating an exec operation, the
- * new read/write domain values are computed here.
- * They will be transferred to the above values
- * at the point that any cache flushing occurs
- */
- uint32_t pending_read_domains;
- uint32_t pending_write_domain;
-
- void *driver_private;
-};
-
-/**
- * DRM driver structure. This structure represent the common code for
- * a family of cards. There will one drm_device for each card present
- * in this family
- */
-
-struct drm_driver {
- int (*load) (struct drm_device *, unsigned long flags);
- int (*firstopen) (struct drm_device *);
- int (*open) (struct drm_device *, struct drm_file *);
- void (*preclose) (struct drm_device *, struct drm_file *file_priv);
- void (*postclose) (struct drm_device *, struct drm_file *);
- void (*lastclose) (struct drm_device *);
- int (*unload) (struct drm_device *);
- int (*suspend) (struct drm_device *, pm_message_t state);
- int (*resume) (struct drm_device *);
- int (*dma_ioctl) (struct drm_device *dev, void *data, struct drm_file *file_priv);
- void (*dma_ready) (struct drm_device *);
- int (*dma_quiescent) (struct drm_device *);
- int (*context_ctor) (struct drm_device *dev, int context);
- int (*context_dtor) (struct drm_device *dev, int context);
- int (*kernel_context_switch) (struct drm_device *dev, int old,
- int new);
- void (*kernel_context_switch_unlock) (struct drm_device * dev);
- /**
- * get_vblank_counter - get raw hardware vblank counter
- * @dev: DRM device
- * @crtc: counter to fetch
- *
- * Driver callback for fetching a raw hardware vblank counter
- * for @crtc. If a device doesn't have a hardware counter, the
- * driver can simply return the value of drm_vblank_count and
- * make the enable_vblank() and disable_vblank() hooks into no-ops,
- * leaving interrupts enabled at all times.
- *
- * Wraparound handling and loss of events due to modesetting is dealt
- * with in the DRM core code.
- *
- * RETURNS
- * Raw vblank counter value.
- */
- u32 (*get_vblank_counter) (struct drm_device *dev, int crtc);
-
- /**
- * enable_vblank - enable vblank interrupt events
- * @dev: DRM device
- * @crtc: which irq to enable
- *
- * Enable vblank interrupts for @crtc. If the device doesn't have
- * a hardware vblank counter, this routine should be a no-op, since
- * interrupts will have to stay on to keep the count accurate.
- *
- * RETURNS
- * Zero on success, appropriate errno if the given @crtc's vblank
- * interrupt cannot be enabled.
- */
- int (*enable_vblank) (struct drm_device *dev, int crtc);
-
- /**
- * disable_vblank - disable vblank interrupt events
- * @dev: DRM device
- * @crtc: which irq to enable
- *
- * Disable vblank interrupts for @crtc. If the device doesn't have
- * a hardware vblank counter, this routine should be a no-op, since
- * interrupts will have to stay on to keep the count accurate.
- */
- void (*disable_vblank) (struct drm_device *dev, int crtc);
- int (*dri_library_name) (struct drm_device *dev, char * buf);
-
- /**
- * Called by \c drm_device_is_agp. Typically used to determine if a
- * card is really attached to AGP or not.
- *
- * \param dev DRM device handle
- *
- * \returns
- * One of three values is returned depending on whether or not the
- * card is absolutely \b not AGP (return of 0), absolutely \b is AGP
- * (return of 1), or may or may not be AGP (return of 2).
- */
- int (*device_is_agp) (struct drm_device *dev);
-
-/* these have to be filled in */
- irqreturn_t(*irq_handler) (DRM_IRQ_ARGS);
- void (*irq_preinstall) (struct drm_device *dev);
- int (*irq_postinstall) (struct drm_device *dev);
- void (*irq_uninstall) (struct drm_device *dev);
- void (*reclaim_buffers) (struct drm_device *dev,
- struct drm_file *file_priv);
- void (*reclaim_buffers_locked) (struct drm_device *dev,
- struct drm_file *file_priv);
- void (*reclaim_buffers_idlelocked) (struct drm_device *dev,
- struct drm_file *file_priv);
- unsigned long (*get_map_ofs) (struct drm_map *map);
- unsigned long (*get_reg_ofs) (struct drm_device *dev);
- void (*set_version) (struct drm_device *dev,
- struct drm_set_version *sv);
-
- int (*proc_init)(struct drm_minor *minor);
- void (*proc_cleanup)(struct drm_minor *minor);
-
- /**
- * Driver-specific constructor for drm_gem_objects, to set up
- * obj->driver_private.
- *
- * Returns 0 on success.
- */
- int (*gem_init_object) (struct drm_gem_object *obj);
- void (*gem_free_object) (struct drm_gem_object *obj);
-
- struct drm_fence_driver *fence_driver;
- struct drm_bo_driver *bo_driver;
-
- int major;
- int minor;
- int patchlevel;
- char *name;
- char *desc;
- char *date;
-
-/* variables */
- u32 driver_features;
- int dev_priv_size;
- struct drm_ioctl_desc *ioctls;
- int num_ioctls;
- struct file_operations fops;
- struct pci_driver pci_driver;
-};
-
-#define DRM_MINOR_UNASSIGNED 0
-#define DRM_MINOR_LEGACY 1
-
-/**
- * DRM minor structure. This structure represents a drm minor number.
- */
-struct drm_minor {
- int index; /**< Minor device number */
- int type; /**< Control or render */
- dev_t device; /**< Device number for mknod */
- struct device kdev; /**< Linux device */
- struct drm_device *dev;
- struct proc_dir_entry *dev_root; /**< proc directory entry */
- struct class_device *dev_class;
-};
-
-
-/**
- * DRM device structure. This structure represent a complete card that
- * may contain multiple heads.
- */
-struct drm_device {
- char *unique; /**< Unique identifier: e.g., busid */
- int unique_len; /**< Length of unique field */
- char *devname; /**< For /proc/interrupts */
- int if_version; /**< Highest interface version set */
-
- int blocked; /**< Blocked due to VC switch? */
-
- /** \name Locks */
- /*@{ */
- spinlock_t count_lock; /**< For inuse, drm_device::open_count, drm_device::buf_use */
- struct mutex struct_mutex; /**< For others */
- /*@} */
-
- /** \name Usage Counters */
- /*@{ */
- int open_count; /**< Outstanding files open */
- atomic_t ioctl_count; /**< Outstanding IOCTLs pending */
- atomic_t vma_count; /**< Outstanding vma areas open */
- int buf_use; /**< Buffers in use -- cannot alloc */
- atomic_t buf_alloc; /**< Buffer allocation in progress */
- /*@} */
-
- /** \name Performance counters */
- /*@{ */
- unsigned long counters;
- enum drm_stat_type types[15];
- atomic_t counts[15];
- /*@} */
-
- /** \name Authentication */
- /*@{ */
- struct list_head filelist;
- struct drm_open_hash magiclist;
- struct list_head magicfree;
- /*@} */
-
- /** \name Memory management */
- /*@{ */
- struct list_head maplist; /**< Linked list of regions */
- int map_count; /**< Number of mappable regions */
- struct drm_open_hash map_hash; /**< User token hash table for maps */
-
- /** \name Context handle management */
- /*@{ */
- struct list_head ctxlist; /**< Linked list of context handles */
- int ctx_count; /**< Number of context handles */
- struct mutex ctxlist_mutex; /**< For ctxlist */
-
- struct idr ctx_idr;
-
- struct list_head vmalist; /**< List of vmas (for debugging) */
- struct drm_lock_data lock; /**< Information on hardware lock */
- /*@} */
-
- /** \name DMA queues (contexts) */
- /*@{ */
- int queue_count; /**< Number of active DMA queues */
- int queue_reserved; /**< Number of reserved DMA queues */
- int queue_slots; /**< Actual length of queuelist */
- struct drm_queue **queuelist; /**< Vector of pointers to DMA queues */
- struct drm_device_dma *dma; /**< Optional pointer for DMA support */
- /*@} */
-
- /** \name Context support */
- /*@{ */
- int irq; /**< Interrupt used by board */
- int irq_enabled; /**< True if irq handler is enabled */
- int msi_enabled; /**< True if irq is MSI */
- __volatile__ long context_flag; /**< Context swapping flag */
- __volatile__ long interrupt_flag; /**< Interruption handler flag */
- __volatile__ long dma_flag; /**< DMA dispatch flag */
- struct timer_list timer; /**< Timer for delaying ctx switch */
- wait_queue_head_t context_wait; /**< Processes waiting on ctx switch */
- int last_checked; /**< Last context checked for DMA */
- int last_context; /**< Last current context */
- unsigned long last_switch; /**< jiffies at last context switch */
- /*@} */
-
- struct work_struct work;
-
- /** \name VBLANK IRQ support */
- /*@{ */
-
- /*
- * At load time, disabling the vblank interrupt won't be allowed since
- * old clients may not call the modeset ioctl and therefore misbehave.
- * Once the modeset ioctl *has* been called though, we can safely
- * disable them when unused.
- */
- int vblank_disable_allowed;
-
- wait_queue_head_t *vbl_queue; /**< VBLANK wait queue */
- atomic_t *_vblank_count; /**< number of VBLANK interrupts (driver must alloc the right number of counters) */
- spinlock_t vbl_lock;
- struct list_head *vbl_sigs; /**< signal list to send on VBLANK */
- atomic_t vbl_signal_pending; /* number of signals pending on all crtcs*/
- atomic_t *vblank_refcount; /* number of users of vblank interrupts per crtc */
- u32 *last_vblank; /* protected by dev->vbl_lock, used */
- /* for wraparound handling */
- int *vblank_enabled; /* so we don't call enable more than
- once per disable */
- int *vblank_inmodeset; /* Display driver is setting mode */
- struct timer_list vblank_disable_timer;
-
- u32 max_vblank_count; /**< size of vblank counter register */
- spinlock_t tasklet_lock; /**< For drm_locked_tasklet */
- void (*locked_tasklet_func)(struct drm_device *dev);
-
- /*@} */
- cycles_t ctx_start;
- cycles_t lck_start;
-
- struct fasync_struct *buf_async;/**< Processes waiting for SIGIO */
- wait_queue_head_t buf_readers; /**< Processes waiting to read */
- wait_queue_head_t buf_writers; /**< Processes waiting to ctx switch */
-
- struct drm_agp_head *agp; /**< AGP data */
-
- struct pci_dev *pdev; /**< PCI device structure */
- int pci_vendor; /**< PCI vendor id */
- int pci_device; /**< PCI device id */
-#ifdef __alpha__
- struct pci_controller *hose;
-#endif
- int num_crtcs; /**< Number of CRTCs on this device */
- struct drm_sg_mem *sg; /**< Scatter gather memory */
- void *dev_private; /**< device private data */
- struct drm_sigdata sigdata; /**< For block_all_signals */
- sigset_t sigmask;
-
- struct drm_driver *driver;
- drm_local_map_t *agp_buffer_map;
- unsigned int agp_buffer_token;
- struct drm_minor *primary; /**< render type primary screen head */
-
- /** \name Drawable information */
- /*@{ */
- spinlock_t drw_lock;
- struct idr drw_idr;
- /*@} */
-
- /** \name GEM information */
- /*@{ */
- spinlock_t object_name_lock;
- struct idr object_name_idr;
- atomic_t object_count;
- atomic_t object_memory;
- atomic_t pin_count;
- atomic_t pin_memory;
- atomic_t gtt_count;
- atomic_t gtt_memory;
- uint32_t gtt_total;
- uint32_t invalidate_domains; /* domains pending invalidation */
- uint32_t flush_domains; /* domains pending flush */
- /*@} */
-};
-
-
-static __inline__ int drm_core_check_feature(struct drm_device *dev,
- int feature)
-{
- return ((dev->driver->driver_features & feature) ? 1 : 0);
-}
-
-#ifdef __alpha__
-#define drm_get_pci_domain(dev) dev->hose->index
-#else
-#define drm_get_pci_domain(dev) 0
-#endif
-
-#if __OS_HAS_AGP
-static inline int drm_core_has_AGP(struct drm_device *dev)
-{
- return drm_core_check_feature(dev, DRIVER_USE_AGP);
-}
-#else
-#define drm_core_has_AGP(dev) (0)
-#endif
-
-#if __OS_HAS_MTRR
-static inline int drm_core_has_MTRR(struct drm_device *dev)
-{
- return drm_core_check_feature(dev, DRIVER_USE_MTRR);
-}
-
-#define DRM_MTRR_WC MTRR_TYPE_WRCOMB
-
-static inline int drm_mtrr_add(unsigned long offset, unsigned long size,
- unsigned int flags)
-{
- return mtrr_add(offset, size, flags, 1);
-}
-
-static inline int drm_mtrr_del(int handle, unsigned long offset,
- unsigned long size, unsigned int flags)
-{
- return mtrr_del(handle, offset, size);
-}
-
-#else
-static inline int drm_mtrr_add(unsigned long offset, unsigned long size,
- unsigned int flags)
-{
- return -ENODEV;
-}
-
-static inline int drm_mtrr_del(int handle, unsigned long offset,
- unsigned long size, unsigned int flags)
-{
- return -ENODEV;
-}
-
-#define drm_core_has_MTRR(dev) (0)
-#define DRM_MTRR_WC 0
-#endif
-
-
-/******************************************************************/
-/** \name Internal function definitions */
-/*@{*/
-
- /* Driver support (drm_drv.h) */
-extern int drm_fb_loaded;
-extern int drm_init(struct drm_driver *driver,
- struct pci_device_id *pciidlist);
-extern void drm_exit(struct drm_driver *driver);
-extern void drm_cleanup_pci(struct pci_dev *pdev);
-extern int drm_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern long drm_unlocked_ioctl(struct file *filp,
- unsigned int cmd, unsigned long arg);
-extern long drm_compat_ioctl(struct file *filp,
- unsigned int cmd, unsigned long arg);
-
-extern int drm_lastclose(struct drm_device *dev);
-
- /* Device support (drm_fops.h) */
-extern int drm_open(struct inode *inode, struct file *filp);
-extern int drm_stub_open(struct inode *inode, struct file *filp);
-extern int drm_fasync(int fd, struct file *filp, int on);
-extern int drm_release(struct inode *inode, struct file *filp);
-unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait);
-
- /* Mapping support (drm_vm.h) */
-extern int drm_mmap(struct file *filp, struct vm_area_struct *vma);
-extern unsigned long drm_core_get_map_ofs(struct drm_map * map);
-extern unsigned long drm_core_get_reg_ofs(struct drm_device *dev);
-extern pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma);
-
- /* Memory management support (drm_memory.h) */
-#include "drm_memory.h"
-extern void drm_mem_init(void);
-extern int drm_mem_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-extern void *drm_calloc(size_t nmemb, size_t size, int area);
-extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area);
-extern unsigned long drm_alloc_pages(int order, int area);
-extern void drm_free_pages(unsigned long address, int order, int area);
-extern DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type);
-extern int drm_free_agp(DRM_AGP_MEM * handle, int pages);
-extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start);
-extern DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev,
- struct page **pages,
- unsigned long num_pages,
- uint32_t gtt_offset);
-extern int drm_unbind_agp(DRM_AGP_MEM * handle);
-
-extern void drm_free_memctl(size_t size);
-extern int drm_alloc_memctl(size_t size);
-extern void drm_query_memctl(uint64_t *cur_used,
- uint64_t *emer_used,
- uint64_t *low_threshold,
- uint64_t *high_threshold,
- uint64_t *emer_threshold);
-extern void drm_init_memctl(size_t low_threshold,
- size_t high_threshold,
- size_t unit_size);
-
- /* Misc. IOCTL support (drm_ioctl.h) */
-extern int drm_irq_by_busid(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_getunique(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_setunique(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_getmap(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_getclient(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_getstats(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_setversion(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_noop(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
- /* Context IOCTL support (drm_context.h) */
-extern int drm_resctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_addctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_modctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_getctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_switchctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_newctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_rmctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-extern int drm_ctxbitmap_init(struct drm_device *dev);
-extern void drm_ctxbitmap_cleanup(struct drm_device *dev);
-extern void drm_ctxbitmap_free(struct drm_device *dev, int ctx_handle);
-
-extern int drm_setsareactx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_getsareactx(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
- /* Drawable IOCTL support (drm_drawable.h) */
-extern int drm_adddraw(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_rmdraw(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_update_drawable_info(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern struct drm_drawable_info *drm_get_drawable_info(struct drm_device *dev,
- drm_drawable_t id);
-extern void drm_drawable_free_all(struct drm_device *dev);
-
- /* Authentication IOCTL support (drm_auth.h) */
-extern int drm_getmagic(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_authmagic(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
- /* Locking IOCTL support (drm_lock.h) */
-extern int drm_lock(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_unlock(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_lock_take(struct drm_lock_data *lock_data, unsigned int context);
-extern int drm_lock_free(struct drm_lock_data *lock_data, unsigned int context);
-extern void drm_idlelock_take(struct drm_lock_data *lock_data);
-extern void drm_idlelock_release(struct drm_lock_data *lock_data);
-
-/*
- * These are exported to drivers so that they can implement fencing using
- * DMA quiscent + idle. DMA quiescent usually requires the hardware lock.
- */
-
-extern int drm_i_have_hw_lock(struct drm_device *dev,
- struct drm_file *file_priv);
-
- /* Buffer management support (drm_bufs.h) */
-extern int drm_addbufs_agp(struct drm_device *dev, struct drm_buf_desc * request);
-extern int drm_addbufs_pci(struct drm_device *dev, struct drm_buf_desc * request);
-extern int drm_addbufs_fb (struct drm_device *dev, struct drm_buf_desc * request);
-extern int drm_addmap(struct drm_device *dev, unsigned int offset,
- unsigned int size, enum drm_map_type type,
- enum drm_map_flags flags, drm_local_map_t ** map_ptr);
-extern int drm_addmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_rmmap(struct drm_device *dev, drm_local_map_t *map);
-extern int drm_rmmap_locked(struct drm_device *dev, drm_local_map_t *map);
-extern int drm_rmmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_addbufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_infobufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_markbufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_freebufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_mapbufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_order(unsigned long size);
-extern unsigned long drm_get_resource_start(struct drm_device *dev,
- unsigned int resource);
-extern unsigned long drm_get_resource_len(struct drm_device *dev,
- unsigned int resource);
-extern struct drm_map_list *drm_find_matching_map(struct drm_device *dev,
- drm_local_map_t *map);
-
-
- /* DMA support (drm_dma.h) */
-extern int drm_dma_setup(struct drm_device *dev);
-extern void drm_dma_takedown(struct drm_device *dev);
-extern void drm_free_buffer(struct drm_device *dev, struct drm_buf * buf);
-extern void drm_core_reclaim_buffers(struct drm_device *dev,
- struct drm_file *filp);
-
- /* IRQ support (drm_irq.h) */
-extern int drm_control(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern irqreturn_t drm_irq_handler(DRM_IRQ_ARGS);
-extern int drm_irq_install(struct drm_device *dev);
-extern int drm_irq_uninstall(struct drm_device *dev);
-extern void drm_driver_irq_preinstall(struct drm_device *dev);
-extern void drm_driver_irq_postinstall(struct drm_device *dev);
-extern void drm_driver_irq_uninstall(struct drm_device *dev);
-
-extern int drm_vblank_init(struct drm_device *dev, int num_crtcs);
-extern void drm_vblank_cleanup(struct drm_device *dev);
-extern int drm_wait_vblank(struct drm_device *dev, void *data, struct drm_file *filp);
-extern int drm_vblank_wait(struct drm_device * dev, unsigned int *vbl_seq);
-extern void drm_locked_tasklet(struct drm_device *dev, void(*func)(struct drm_device*));
-extern u32 drm_vblank_count(struct drm_device *dev, int crtc);
-extern void drm_handle_vblank(struct drm_device *dev, int crtc);
-extern int drm_vblank_get(struct drm_device *dev, int crtc);
-extern void drm_vblank_put(struct drm_device *dev, int crtc);
-
- /* Modesetting support */
-extern int drm_modeset_ctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
- /* AGP/GART support (drm_agpsupport.h) */
-extern struct drm_agp_head *drm_agp_init(struct drm_device *dev);
-extern int drm_agp_acquire(struct drm_device *dev);
-extern int drm_agp_acquire_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_agp_release(struct drm_device *dev);
-extern int drm_agp_release_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode);
-extern int drm_agp_enable_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_agp_info(struct drm_device *dev, struct drm_agp_info *info);
-extern int drm_agp_info_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request);
-extern int drm_agp_alloc_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request);
-extern int drm_agp_free_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request);
-extern int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request);
-extern int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern DRM_AGP_MEM *drm_agp_allocate_memory(struct agp_bridge_data *bridge, size_t pages, u32 type);
-extern int drm_agp_free_memory(DRM_AGP_MEM * handle);
-extern int drm_agp_bind_memory(DRM_AGP_MEM * handle, off_t start);
-extern int drm_agp_unbind_memory(DRM_AGP_MEM * handle);
-extern void drm_agp_chipset_flush(struct drm_device *dev);
- /* Stub support (drm_stub.h) */
-extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
- struct drm_driver *driver);
-extern int drm_put_dev(struct drm_device *dev);
-extern int drm_put_minor(struct drm_device *dev);
-extern unsigned int drm_debug; /* 1 to enable debug output */
-
-extern struct class *drm_class;
-extern struct proc_dir_entry *drm_proc_root;
-
-extern struct idr drm_minors_idr;
-
-extern drm_local_map_t *drm_getsarea(struct drm_device *dev);
-
- /* Proc support (drm_proc.h) */
-int drm_proc_init(struct drm_minor *minor, int minor_id,
- struct proc_dir_entry *root);
-int drm_proc_cleanup(struct drm_minor *minor, struct proc_dir_entry *root);
-
- /* Scatter Gather Support (drm_scatter.h) */
-extern void drm_sg_cleanup(struct drm_sg_mem * entry);
-extern int drm_sg_alloc_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather * request);
-extern int drm_sg_free(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
- /* ATI PCIGART support (ati_pcigart.h) */
-extern int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info);
-extern int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info);
-
-extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size,
- size_t align, dma_addr_t maxaddr);
-extern void __drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah);
-extern void drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah);
-
- /* sysfs support (drm_sysfs.c) */
-struct drm_sysfs_class;
-extern struct class *drm_sysfs_create(struct module *owner, char *name);
-extern void drm_sysfs_destroy(void);
-extern int drm_sysfs_device_add(struct drm_minor *minor);
-extern void drm_sysfs_device_remove(struct drm_minor *minor);
-
-/*
- * Basic memory manager support (drm_mm.c)
- */
-
-extern struct drm_mm_node * drm_mm_get_block(struct drm_mm_node * parent, unsigned long size,
- unsigned alignment);
-extern void drm_mm_put_block(struct drm_mm_node *cur);
-extern struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm, unsigned long size,
- unsigned alignment, int best_match);
-extern int drm_mm_init(struct drm_mm *mm, unsigned long start, unsigned long size);
-extern void drm_mm_takedown(struct drm_mm *mm);
-extern int drm_mm_clean(struct drm_mm *mm);
-extern unsigned long drm_mm_tail_space(struct drm_mm *mm);
-extern int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size);
-extern int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size);
-
-static inline struct drm_mm *drm_get_mm(struct drm_mm_node *block)
-{
- return block->mm;
-}
-
-/* Graphics Execution Manager library functions (drm_gem.c) */
-int
-drm_gem_init (struct drm_device *dev);
-
-void
-drm_gem_object_free (struct kref *kref);
-
-struct drm_gem_object *
-drm_gem_object_alloc(struct drm_device *dev, size_t size);
-
-void
-drm_gem_object_handle_free (struct kref *kref);
-
-static inline void drm_gem_object_reference(struct drm_gem_object *obj)
-{
- kref_get(&obj->refcount);
-}
-
-static inline void drm_gem_object_unreference(struct drm_gem_object *obj)
-{
- if (obj == NULL)
- return;
-
- kref_put (&obj->refcount, drm_gem_object_free);
-}
-
-int
-drm_gem_handle_create(struct drm_file *file_priv,
- struct drm_gem_object *obj,
- int *handlep);
-
-static inline void drm_gem_object_handle_reference (struct drm_gem_object *obj)
-{
- drm_gem_object_reference (obj);
- kref_get(&obj->handlecount);
-}
-
-static inline void drm_gem_object_handle_unreference (struct drm_gem_object *obj)
-{
- if (obj == NULL)
- return;
-
- /*
- * Must bump handle count first as this may be the last
- * ref, in which case the object would disappear before we
- * checked for a name
- */
- kref_put (&obj->handlecount, drm_gem_object_handle_free);
- drm_gem_object_unreference (obj);
-}
-
-struct drm_gem_object *
-drm_gem_object_lookup(struct drm_device *dev, struct drm_file *filp,
- int handle);
-int drm_gem_close_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_gem_flink_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int drm_gem_open_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-void drm_gem_open(struct drm_device *dev, struct drm_file *file_private);
-void drm_gem_release(struct drm_device *dev, struct drm_file *file_private);
-
-extern void drm_core_ioremap(struct drm_map *map, struct drm_device *dev);
-extern void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev);
-extern void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev);
-
-static __inline__ struct drm_map *drm_core_findmap(struct drm_device *dev,
- unsigned int token)
-{
- struct drm_map_list *_entry;
- list_for_each_entry(_entry, &dev->maplist, head)
- if (_entry->user_token == token)
- return _entry->map;
- return NULL;
-}
-
-static __inline__ int drm_device_is_agp(struct drm_device *dev)
-{
- if ( dev->driver->device_is_agp != NULL ) {
- int err = (*dev->driver->device_is_agp)(dev);
-
- if (err != 2) {
- return err;
- }
- }
-
- return pci_find_capability(dev->pdev, PCI_CAP_ID_AGP);
-}
-
-static __inline__ int drm_device_is_pcie(struct drm_device *dev)
-{
- return pci_find_capability(dev->pdev, PCI_CAP_ID_EXP);
-}
-
-static __inline__ void drm_core_dropmap(struct drm_map *map)
-{
-}
-
-#ifndef DEBUG_MEMORY
-/** Wrapper around kmalloc() */
-static __inline__ void *drm_alloc(size_t size, int area)
-{
- return kmalloc(size, GFP_KERNEL);
-}
-
-/** Wrapper around kfree() */
-static __inline__ void drm_free(void *pt, size_t size, int area)
-{
- kfree(pt);
-}
-#else
-extern void *drm_alloc(size_t size, int area);
-extern void drm_free(void *pt, size_t size, int area);
-#endif
-
-/*
- * Accounting variants of standard calls.
- */
-
-static inline void *drm_ctl_alloc(size_t size, int area)
-{
- void *ret;
- if (drm_alloc_memctl(size))
- return NULL;
- ret = drm_alloc(size, area);
- if (!ret)
- drm_free_memctl(size);
- return ret;
-}
-
-static inline void *drm_ctl_calloc(size_t nmemb, size_t size, int area)
-{
- void *ret;
-
- if (drm_alloc_memctl(nmemb*size))
- return NULL;
- ret = drm_calloc(nmemb, size, area);
- if (!ret)
- drm_free_memctl(nmemb*size);
- return ret;
-}
-
-static inline void drm_ctl_free(void *pt, size_t size, int area)
-{
- drm_free(pt, size, area);
- drm_free_memctl(size);
-}
-
-/*@}*/
-
-#endif /* __KERNEL__ */
-#endif
+++ /dev/null
-/**
- * \file drm_agpsupport.c
- * DRM support for AGP/GART backend
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include <linux/module.h>
-
-#if __OS_HAS_AGP
-
-/**
- * Get AGP information.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a (output) drm_agp_info structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device has been initialized and acquired and fills in the
- * drm_agp_info structure with the information in drm_agp_head::agp_info.
- */
-int drm_agp_info(struct drm_device *dev, struct drm_agp_info *info)
-{
- DRM_AGP_KERN *kern;
-
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
-
- kern = &dev->agp->agp_info;
- info->agp_version_major = kern->version.major;
- info->agp_version_minor = kern->version.minor;
- info->mode = kern->mode;
- info->aperture_base = kern->aper_base;
- info->aperture_size = kern->aper_size * 1024 * 1024;
- info->memory_allowed = kern->max_memory << PAGE_SHIFT;
- info->memory_used = kern->current_memory << PAGE_SHIFT;
- info->id_vendor = kern->device->vendor;
- info->id_device = kern->device->device;
-
- return 0;
-}
-EXPORT_SYMBOL(drm_agp_info);
-
-int drm_agp_info_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_info *info = data;
- int err;
-
- err = drm_agp_info(dev, info);
- if (err)
- return err;
-
- return 0;
-}
-
-/**
- * Acquire the AGP device.
- *
- * \param dev DRM device that is to acquire AGP.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device hasn't been acquired before and calls
- * \c agp_backend_acquire.
- */
-int drm_agp_acquire(struct drm_device * dev)
-{
- if (!dev->agp)
- return -ENODEV;
- if (dev->agp->acquired)
- return -EBUSY;
- if (!(dev->agp->bridge = agp_backend_acquire(dev->pdev)))
- return -ENODEV;
-
- dev->agp->acquired = 1;
- return 0;
-}
-EXPORT_SYMBOL(drm_agp_acquire);
-
-/**
- * Acquire the AGP device (ioctl).
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device hasn't been acquired before and calls
- * \c agp_backend_acquire.
- */
-int drm_agp_acquire_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- return drm_agp_acquire((struct drm_device *) file_priv->minor->dev);
-}
-
-/**
- * Release the AGP device.
- *
- * \param dev DRM device that is to release AGP.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device has been acquired and calls \c agp_backend_release.
- */
-int drm_agp_release(struct drm_device *dev)
-{
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
- agp_backend_release(dev->agp->bridge);
- dev->agp->acquired = 0;
- return 0;
-
-}
-EXPORT_SYMBOL(drm_agp_release);
-
-int drm_agp_release_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- return drm_agp_release(dev);
-}
-
-/**
- * Enable the AGP bus.
- *
- * \param dev DRM device that has previously acquired AGP.
- * \param mode Requested AGP mode.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device has been acquired but not enabled, and calls
- * \c agp_enable.
- */
-int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode)
-{
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
-
- dev->agp->mode = mode.mode;
- agp_enable(dev->agp->bridge, mode.mode);
- dev->agp->enabled = 1;
- return 0;
-}
-EXPORT_SYMBOL(drm_agp_enable);
-
-int drm_agp_enable_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_mode *mode = data;
-
- return drm_agp_enable(dev, *mode);
-}
-
-/**
- * Allocate AGP memory.
- *
- * \param inode device inode.
- * \param file_priv file private pointer.
- * \param cmd command.
- * \param arg pointer to a drm_agp_buffer structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device is present and has been acquired, allocates the
- * memory via alloc_agp() and creates a drm_agp_mem entry for it.
- */
-int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request)
-{
- struct drm_agp_mem *entry;
- DRM_AGP_MEM *memory;
- unsigned long pages;
- u32 type;
-
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
- if (!(entry = drm_alloc(sizeof(*entry), DRM_MEM_AGPLISTS)))
- return -ENOMEM;
-
- memset(entry, 0, sizeof(*entry));
-
- pages = (request->size + PAGE_SIZE - 1) / PAGE_SIZE;
- type = (u32) request->type;
- if (!(memory = drm_alloc_agp(dev, pages, type))) {
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- return -ENOMEM;
- }
-
- entry->handle = (unsigned long)memory->key + 1;
- entry->memory = memory;
- entry->bound = 0;
- entry->pages = pages;
- list_add(&entry->head, &dev->agp->memory);
-
- request->handle = entry->handle;
- request->physical = memory->physical;
-
- return 0;
-}
-EXPORT_SYMBOL(drm_agp_alloc);
-
-
-int drm_agp_alloc_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_buffer *request = data;
-
- return drm_agp_alloc(dev, request);
-}
-
-/**
- * Search for the AGP memory entry associated with a handle.
- *
- * \param dev DRM device structure.
- * \param handle AGP memory handle.
- * \return pointer to the drm_agp_mem structure associated with \p handle.
- *
- * Walks through drm_agp_head::memory until finding a matching handle.
- */
-static struct drm_agp_mem *drm_agp_lookup_entry(struct drm_device * dev,
- unsigned long handle)
-{
- struct drm_agp_mem *entry;
-
- list_for_each_entry(entry, &dev->agp->memory, head) {
- if (entry->handle == handle)
- return entry;
- }
- return NULL;
-}
-
-/**
- * Unbind AGP memory from the GATT (ioctl).
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a drm_agp_binding structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device is present and acquired, looks-up the AGP memory
- * entry and passes it to the unbind_agp() function.
- */
-int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request)
-{
- struct drm_agp_mem *entry;
- int ret;
-
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
- if (!(entry = drm_agp_lookup_entry(dev, request->handle)))
- return -EINVAL;
- if (!entry->bound)
- return -EINVAL;
- ret = drm_unbind_agp(entry->memory);
- if (ret == 0)
- entry->bound = 0;
- return ret;
-}
-EXPORT_SYMBOL(drm_agp_unbind);
-
-
-int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_binding *request = data;
-
- return drm_agp_unbind(dev, request);
-}
-
-
-/**
- * Bind AGP memory into the GATT (ioctl)
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a drm_agp_binding structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device is present and has been acquired and that no memory
- * is currently bound into the GATT. Looks-up the AGP memory entry and passes
- * it to bind_agp() function.
- */
-int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request)
-{
- struct drm_agp_mem *entry;
- int retcode;
- int page;
-
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
- if (!(entry = drm_agp_lookup_entry(dev, request->handle)))
- return -EINVAL;
- if (entry->bound)
- return -EINVAL;
- page = (request->offset + PAGE_SIZE - 1) / PAGE_SIZE;
- if ((retcode = drm_bind_agp(entry->memory, page)))
- return retcode;
- entry->bound = dev->agp->base + (page << PAGE_SHIFT);
- DRM_DEBUG("base = 0x%lx entry->bound = 0x%lx\n",
- dev->agp->base, entry->bound);
- return 0;
-}
-EXPORT_SYMBOL(drm_agp_bind);
-
-
-int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_binding *request = data;
-
- return drm_agp_bind(dev, request);
-}
-
-
-/**
- * Free AGP memory (ioctl).
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a drm_agp_buffer structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the AGP device is present and has been acquired and looks up the
- * AGP memory entry. If the memory it's currently bound, unbind it via
- * unbind_agp(). Frees it via free_agp() as well as the entry itself
- * and unlinks from the doubly linked list it's inserted in.
- */
-int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request)
-{
- struct drm_agp_mem *entry;
-
- if (!dev->agp || !dev->agp->acquired)
- return -EINVAL;
- if (!(entry = drm_agp_lookup_entry(dev, request->handle)))
- return -EINVAL;
- if (entry->bound)
- drm_unbind_agp(entry->memory);
-
- list_del(&entry->head);
-
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- return 0;
-}
-EXPORT_SYMBOL(drm_agp_free);
-
-
-
-int drm_agp_free_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_agp_buffer *request = data;
-
- return drm_agp_free(dev, request);
-}
-
-
-/**
- * Initialize the AGP resources.
- *
- * \return pointer to a drm_agp_head structure.
- *
- * Gets the drm_agp_t structure which is made available by the agpgart module
- * via the inter_module_* functions. Creates and initializes a drm_agp_head
- * structure.
- */
-struct drm_agp_head *drm_agp_init(struct drm_device *dev)
-{
- struct drm_agp_head *head = NULL;
-
- if (!(head = drm_alloc(sizeof(*head), DRM_MEM_AGPLISTS)))
- return NULL;
- memset((void *)head, 0, sizeof(*head));
-
- head->bridge = agp_find_bridge(dev->pdev);
- if (!head->bridge) {
- if (!(head->bridge = agp_backend_acquire(dev->pdev))) {
- drm_free(head, sizeof(*head), DRM_MEM_AGPLISTS);
- return NULL;
- }
- agp_copy_info(head->bridge, &head->agp_info);
- agp_backend_release(head->bridge);
- } else {
- agp_copy_info(head->bridge, &head->agp_info);
- }
-
- if (head->agp_info.chipset == NOT_SUPPORTED) {
- drm_free(head, sizeof(*head), DRM_MEM_AGPLISTS);
- return NULL;
- }
- INIT_LIST_HEAD(&head->memory);
- head->cant_use_aperture = head->agp_info.cant_use_aperture;
- head->page_mask = head->agp_info.page_mask;
- head->base = head->agp_info.aper_base;
- return head;
-}
-
-/** Calls agp_allocate_memory() */
-DRM_AGP_MEM *drm_agp_allocate_memory(struct agp_bridge_data *bridge,
- size_t pages, u32 type)
-{
- return agp_allocate_memory(bridge, pages, type);
-}
-
-/** Calls agp_free_memory() */
-int drm_agp_free_memory(DRM_AGP_MEM * handle)
-{
- if (!handle)
- return 0;
- agp_free_memory(handle);
- return 1;
-}
-
-/** Calls agp_bind_memory() */
-int drm_agp_bind_memory(DRM_AGP_MEM * handle, off_t start)
-{
- if (!handle)
- return -EINVAL;
- return agp_bind_memory(handle, start);
-}
-EXPORT_SYMBOL(drm_agp_bind_memory);
-
-/** Calls agp_unbind_memory() */
-int drm_agp_unbind_memory(DRM_AGP_MEM * handle)
-{
- if (!handle)
- return -EINVAL;
- return agp_unbind_memory(handle);
-}
-
-/**
- * Binds a collection of pages into AGP memory at the given offset, returning
- * the AGP memory structure containing them.
- *
- * No reference is held on the pages during this time -- it is up to the
- * caller to handle that.
- */
-DRM_AGP_MEM *
-drm_agp_bind_pages(struct drm_device *dev,
- struct page **pages,
- unsigned long num_pages,
- uint32_t gtt_offset)
-{
- DRM_AGP_MEM *mem;
- int ret, i;
-
- DRM_DEBUG("drm_agp_populate_ttm\n");
- mem = drm_agp_allocate_memory(dev->agp->bridge, num_pages,
- AGP_USER_MEMORY);
- if (mem == NULL) {
- DRM_ERROR("Failed to allocate memory for %ld pages\n",
- num_pages);
- return NULL;
- }
-
- for (i = 0; i < num_pages; i++)
- mem->memory[i] = phys_to_gart(page_to_phys(pages[i]));
- mem->page_count = num_pages;
-
- mem->is_flushed = true;
- ret = drm_agp_bind_memory(mem, gtt_offset / PAGE_SIZE);
- if (ret != 0) {
- DRM_ERROR("Failed to bind AGP memory: %d\n", ret);
- agp_free_memory(mem);
- return NULL;
- }
-
- return mem;
-}
-EXPORT_SYMBOL(drm_agp_bind_pages);
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
-void drm_agp_chipset_flush(struct drm_device *dev)
-{
- agp_flush_chipset(dev->agp->bridge);
-}
-EXPORT_SYMBOL(drm_agp_chipset_flush);
-#endif
-
-#endif /* __OS_HAS_AGP */
+++ /dev/null
-/**
- * \file drm_auth.c
- * IOCTLs for authentication
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-/**
- * Find the file with the given magic number.
- *
- * \param dev DRM device.
- * \param magic magic number.
- *
- * Searches in drm_device::magiclist within all files with the same hash key
- * the one with matching magic number, while holding the drm_device::struct_mutex
- * lock.
- */
-static struct drm_file *drm_find_file(struct drm_device * dev, drm_magic_t magic)
-{
- struct drm_file *retval = NULL;
- struct drm_magic_entry *pt;
- struct drm_hash_item *hash;
-
- mutex_lock(&dev->struct_mutex);
- if (!drm_ht_find_item(&dev->magiclist, (unsigned long)magic, &hash)) {
- pt = drm_hash_entry(hash, struct drm_magic_entry, hash_item);
- retval = pt->priv;
- }
- mutex_unlock(&dev->struct_mutex);
- return retval;
-}
-
-/**
- * Adds a magic number.
- *
- * \param dev DRM device.
- * \param priv file private data.
- * \param magic magic number.
- *
- * Creates a drm_magic_entry structure and appends to the linked list
- * associated the magic number hash key in drm_device::magiclist, while holding
- * the drm_device::struct_mutex lock.
- */
-static int drm_add_magic(struct drm_device * dev, struct drm_file * priv,
- drm_magic_t magic)
-{
- struct drm_magic_entry *entry;
-
- DRM_DEBUG("%d\n", magic);
-
- entry = drm_alloc(sizeof(*entry), DRM_MEM_MAGIC);
- if (!entry)
- return -ENOMEM;
- memset(entry, 0, sizeof(*entry));
- entry->priv = priv;
- entry->hash_item.key = (unsigned long)magic;
- mutex_lock(&dev->struct_mutex);
- drm_ht_insert_item(&dev->magiclist, &entry->hash_item);
- list_add_tail(&entry->head, &dev->magicfree);
- mutex_unlock(&dev->struct_mutex);
-
- return 0;
-}
-
-/**
- * Remove a magic number.
- *
- * \param dev DRM device.
- * \param magic magic number.
- *
- * Searches and unlinks the entry in drm_device::magiclist with the magic
- * number hash key, while holding the drm_device::struct_mutex lock.
- */
-static int drm_remove_magic(struct drm_device * dev, drm_magic_t magic)
-{
- struct drm_magic_entry *pt;
- struct drm_hash_item *hash;
-
- DRM_DEBUG("%d\n", magic);
-
- mutex_lock(&dev->struct_mutex);
- if (drm_ht_find_item(&dev->magiclist, (unsigned long)magic, &hash)) {
- mutex_unlock(&dev->struct_mutex);
- return -EINVAL;
- }
- pt = drm_hash_entry(hash, struct drm_magic_entry, hash_item);
- drm_ht_remove_item(&dev->magiclist, hash);
- list_del(&pt->head);
- mutex_unlock(&dev->struct_mutex);
-
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
-
- return 0;
-}
-
-/**
- * Get a unique magic number (ioctl).
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a resulting drm_auth structure.
- * \return zero on success, or a negative number on failure.
- *
- * If there is a magic number in drm_file::magic then use it, otherwise
- * searches an unique non-zero magic number and add it associating it with \p
- * file_priv.
- */
-int drm_getmagic(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- static drm_magic_t sequence = 0;
- static DEFINE_SPINLOCK(lock);
- struct drm_auth *auth = data;
-
- /* Find unique magic */
- if (file_priv->magic) {
- auth->magic = file_priv->magic;
- } else {
- do {
- spin_lock(&lock);
- if (!sequence)
- ++sequence; /* reserve 0 */
- auth->magic = sequence++;
- spin_unlock(&lock);
- } while (drm_find_file(dev, auth->magic));
- file_priv->magic = auth->magic;
- drm_add_magic(dev, file_priv, auth->magic);
- }
-
- DRM_DEBUG("%u\n", auth->magic);
-
- return 0;
-}
-
-/**
- * Authenticate with a magic.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a drm_auth structure.
- * \return zero if authentication successed, or a negative number otherwise.
- *
- * Checks if \p file_priv is associated with the magic number passed in \arg.
- */
-int drm_authmagic(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_auth *auth = data;
- struct drm_file *file;
-
- DRM_DEBUG("%u\n", auth->magic);
- if ((file = drm_find_file(dev, auth->magic))) {
- file->authenticated = 1;
- drm_remove_magic(dev, auth->magic);
- return 0;
- }
- return -EINVAL;
-}
+++ /dev/null
-/**
- * \file drm_bufs.c
- * Generic buffer template
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/vmalloc.h>
-#include "drmP.h"
-
-unsigned long drm_get_resource_start(struct drm_device *dev, unsigned int resource)
-{
- return pci_resource_start(dev->pdev, resource);
-}
-EXPORT_SYMBOL(drm_get_resource_start);
-
-unsigned long drm_get_resource_len(struct drm_device *dev, unsigned int resource)
-{
- return pci_resource_len(dev->pdev, resource);
-}
-EXPORT_SYMBOL(drm_get_resource_len);
-
-struct drm_map_list *drm_find_matching_map(struct drm_device *dev, drm_local_map_t *map)
-{
- struct drm_map_list *entry;
- list_for_each_entry(entry, &dev->maplist, head) {
- if (entry->map && map->type == entry->map->type &&
- ((entry->map->offset == map->offset) ||
- (map->type == _DRM_SHM && map->flags==_DRM_CONTAINS_LOCK))) {
- return entry;
- }
- }
-
- return NULL;
-}
-EXPORT_SYMBOL(drm_find_matching_map);
-
-static int drm_map_handle(struct drm_device *dev, struct drm_hash_item *hash,
- unsigned long user_token, int hashed_handle)
-{
- int use_hashed_handle;
-
-#if (BITS_PER_LONG == 64)
- use_hashed_handle = ((user_token & 0xFFFFFFFF00000000UL) || hashed_handle);
-#elif (BITS_PER_LONG == 32)
- use_hashed_handle = hashed_handle;
-#else
-#error Unsupported long size. Neither 64 nor 32 bits.
-#endif
-
- if (!use_hashed_handle) {
- int ret;
- hash->key = user_token >> PAGE_SHIFT;
- ret = drm_ht_insert_item(&dev->map_hash, hash);
- if (ret != -EINVAL)
- return ret;
- }
- return drm_ht_just_insert_please(&dev->map_hash, hash,
- user_token, 32 - PAGE_SHIFT - 3,
- 0, DRM_MAP_HASH_OFFSET >> PAGE_SHIFT);
-}
-
-/**
- * Ioctl to specify a range of memory that is available for mapping by a non-root process.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a drm_map structure.
- * \return zero on success or a negative value on error.
- *
- * Adjusts the memory offset to its absolute value according to the mapping
- * type. Adds the map to the map list drm_device::maplist. Adds MTRR's where
- * applicable and if supported by the kernel.
- */
-static int drm_addmap_core(struct drm_device *dev, unsigned int offset,
- unsigned int size, enum drm_map_type type,
- enum drm_map_flags flags,
- struct drm_map_list **maplist)
-{
- struct drm_map *map;
- struct drm_map_list *list;
- drm_dma_handle_t *dmah;
- unsigned long user_token;
- int ret;
-
- map = drm_alloc(sizeof(*map), DRM_MEM_MAPS);
- if (!map)
- return -ENOMEM;
-
- map->offset = offset;
- map->size = size;
- map->flags = flags;
- map->type = type;
-
- /* Only allow shared memory to be removable since we only keep enough
- * book keeping information about shared memory to allow for removal
- * when processes fork.
- */
- if ((map->flags & _DRM_REMOVABLE) && map->type != _DRM_SHM) {
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -EINVAL;
- }
- DRM_DEBUG("offset = 0x%08lx, size = 0x%08lx, type = %d\n",
- map->offset, map->size, map->type);
- if ((map->offset & (~PAGE_MASK)) || (map->size & (~PAGE_MASK))) {
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -EINVAL;
- }
- map->mtrr = -1;
- map->handle = NULL;
-
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
-#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__)
- if (map->offset + (map->size - 1) < map->offset ||
- map->offset < virt_to_phys(high_memory)) {
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -EINVAL;
- }
-#endif
-#ifdef __alpha__
- map->offset += dev->hose->mem_space->start;
-#endif
- /* Some drivers preinitialize some maps, without the X Server
- * needing to be aware of it. Therefore, we just return success
- * when the server tries to create a duplicate map.
- */
- list = drm_find_matching_map(dev, map);
- if (list != NULL) {
- if (list->map->size != map->size) {
- DRM_DEBUG("Matching maps of type %d with "
- "mismatched sizes, (%ld vs %ld)\n",
- map->type, map->size,
- list->map->size);
- list->map->size = map->size;
- }
-
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- *maplist = list;
- return 0;
- }
-
- if (drm_core_has_MTRR(dev)) {
- if (map->type == _DRM_FRAME_BUFFER ||
- (map->flags & _DRM_WRITE_COMBINING)) {
- map->mtrr = mtrr_add(map->offset, map->size,
- MTRR_TYPE_WRCOMB, 1);
- }
- }
- if (map->type == _DRM_REGISTERS) {
- map->handle = ioremap(map->offset, map->size);
- if (!map->handle) {
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -ENOMEM;
- }
- }
- break;
- case _DRM_SHM:
- list = drm_find_matching_map(dev, map);
- if (list != NULL) {
- if(list->map->size != map->size) {
- DRM_DEBUG("Matching maps of type %d with "
- "mismatched sizes, (%ld vs %ld)\n",
- map->type, map->size, list->map->size);
- list->map->size = map->size;
- }
-
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- *maplist = list;
- return 0;
- }
- map->handle = vmalloc_user(map->size);
- DRM_DEBUG("%lu %d %p\n",
- map->size, drm_order(map->size), map->handle);
- if (!map->handle) {
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -ENOMEM;
- }
- map->offset = (unsigned long)map->handle;
- if (map->flags & _DRM_CONTAINS_LOCK) {
- /* Prevent a 2nd X Server from creating a 2nd lock */
- if (dev->lock.hw_lock != NULL) {
- vfree(map->handle);
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -EBUSY;
- }
- dev->sigdata.lock = dev->lock.hw_lock = map->handle; /* Pointer to lock */
- }
- break;
- case _DRM_AGP: {
- struct drm_agp_mem *entry;
- int valid = 0;
-
- if (!drm_core_has_AGP(dev)) {
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -EINVAL;
- }
-#ifdef __alpha__
- map->offset += dev->hose->mem_space->start;
-#endif
- /* In some cases (i810 driver), user space may have already
- * added the AGP base itself, because dev->agp->base previously
- * only got set during AGP enable. So, only add the base
- * address if the map's offset isn't already within the
- * aperture.
- */
- if (map->offset < dev->agp->base ||
- map->offset > dev->agp->base +
- dev->agp->agp_info.aper_size * 1024 * 1024 - 1) {
- map->offset += dev->agp->base;
- }
- map->mtrr = dev->agp->agp_mtrr; /* for getmap */
-
- /* This assumes the DRM is in total control of AGP space.
- * It's not always the case as AGP can be in the control
- * of user space (i.e. i810 driver). So this loop will get
- * skipped and we double check that dev->agp->memory is
- * actually set as well as being invalid before EPERM'ing
- */
- list_for_each_entry(entry, &dev->agp->memory, head) {
- if ((map->offset >= entry->bound) &&
- (map->offset + map->size <= entry->bound + entry->pages * PAGE_SIZE)) {
- valid = 1;
- break;
- }
- }
- if (!list_empty(&dev->agp->memory) && !valid) {
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -EPERM;
- }
- DRM_DEBUG("AGP offset = 0x%08lx, size = 0x%08lx\n", map->offset, map->size);
- break;
- }
- case _DRM_SCATTER_GATHER:
- if (!dev->sg) {
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -EINVAL;
- }
- map->offset += (unsigned long)dev->sg->virtual;
- break;
- case _DRM_CONSISTENT:
- /* dma_addr_t is 64bit on i386 with CONFIG_HIGHMEM64G,
- * As we're limiting the address to 2^32-1 (or less),
- * casting it down to 32 bits is no problem, but we
- * need to point to a 64bit variable first. */
- dmah = drm_pci_alloc(dev, map->size, map->size, 0xffffffffUL);
- if (!dmah) {
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -ENOMEM;
- }
- map->handle = dmah->vaddr;
- map->offset = (unsigned long)dmah->busaddr;
- kfree(dmah);
- break;
- default:
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -EINVAL;
- }
-
- list = drm_alloc(sizeof(*list), DRM_MEM_MAPS);
- if (!list) {
- if (map->type == _DRM_REGISTERS)
- iounmap(map->handle);
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- return -EINVAL;
- }
- memset(list, 0, sizeof(*list));
- list->map = map;
-
- mutex_lock(&dev->struct_mutex);
- list_add(&list->head, &dev->maplist);
-
- /* Assign a 32-bit handle */
-
- user_token = (map->type == _DRM_SHM) ? (unsigned long) map->handle :
- map->offset;
- ret = drm_map_handle(dev, &list->hash, user_token, 0);
-
- if (ret) {
- if (map->type == _DRM_REGISTERS)
- iounmap(map->handle);
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- drm_free(list, sizeof(*list), DRM_MEM_MAPS);
- mutex_unlock(&dev->struct_mutex);
- return ret;
- }
-
- list->user_token = list->hash.key << PAGE_SHIFT;
- mutex_unlock(&dev->struct_mutex);
-
- *maplist = list;
- return 0;
-}
-
-int drm_addmap(struct drm_device *dev, unsigned int offset,
- unsigned int size, enum drm_map_type type,
- enum drm_map_flags flags, drm_local_map_t ** map_ptr)
-{
- struct drm_map_list *list;
- int rc;
-
- rc = drm_addmap_core(dev, offset, size, type, flags, &list);
- if (!rc)
- *map_ptr = list->map;
- return rc;
-}
-
-EXPORT_SYMBOL(drm_addmap);
-
-int drm_addmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_map *map = data;
- struct drm_map_list *maplist;
- int err;
-
- if (!(capable(CAP_SYS_ADMIN) || map->type == _DRM_AGP))
- return -EPERM;
-
- err = drm_addmap_core(dev, map->offset, map->size, map->type,
- map->flags, &maplist);
-
- if (err)
- return err;
-
- /* avoid a warning on 64-bit, this casting isn't very nice, but the API is set so too late */
- map->handle = (void *)(unsigned long)maplist->user_token;
- return 0;
-}
-
-/**
- * Remove a map private from list and deallocate resources if the mapping
- * isn't in use.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a struct drm_map structure.
- * \return zero on success or a negative value on error.
- *
- * Searches the map on drm_device::maplist, removes it from the list, see if
- * its being used, and free any associate resource (such as MTRR's) if it's not
- * being on use.
- *
- * \sa drm_addmap
- */
-int drm_rmmap_locked(struct drm_device *dev, drm_local_map_t *map)
-{
- struct drm_map_list *r_list = NULL, *list_t;
- drm_dma_handle_t dmah;
- int found = 0;
-
- /* Find the list entry for the map and remove it */
- list_for_each_entry_safe(r_list, list_t, &dev->maplist, head) {
- if (r_list->map == map) {
- list_del(&r_list->head);
- drm_ht_remove_key(&dev->map_hash,
- r_list->user_token >> PAGE_SHIFT);
- drm_free(r_list, sizeof(*r_list), DRM_MEM_MAPS);
- found = 1;
- break;
- }
- }
-
- if (!found)
- return -EINVAL;
-
- /* List has wrapped around to the head pointer, or it's empty and we
- * didn't find anything.
- */
-
- switch (map->type) {
- case _DRM_REGISTERS:
- iounmap(map->handle);
- /* FALLTHROUGH */
- case _DRM_FRAME_BUFFER:
- if (drm_core_has_MTRR(dev) && map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr, map->offset, map->size);
- DRM_DEBUG("mtrr_del=%d\n", retcode);
- }
- break;
- case _DRM_SHM:
- vfree(map->handle);
- break;
- case _DRM_AGP:
- case _DRM_SCATTER_GATHER:
- break;
- case _DRM_CONSISTENT:
- dmah.vaddr = map->handle;
- dmah.busaddr = map->offset;
- dmah.size = map->size;
- __drm_pci_free(dev, &dmah);
- break;
- case _DRM_TTM:
- BUG_ON(1);
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
-
- return 0;
-}
-EXPORT_SYMBOL(drm_rmmap_locked);
-
-int drm_rmmap(struct drm_device *dev, drm_local_map_t *map)
-{
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm_rmmap_locked(dev, map);
- mutex_unlock(&dev->struct_mutex);
-
- return ret;
-}
-EXPORT_SYMBOL(drm_rmmap);
-
-/* The rmmap ioctl appears to be unnecessary. All mappings are torn down on
- * the last close of the device, and this is necessary for cleanup when things
- * exit uncleanly. Therefore, having userland manually remove mappings seems
- * like a pointless exercise since they're going away anyway.
- *
- * One use case might be after addmap is allowed for normal users for SHM and
- * gets used by drivers that the server doesn't need to care about. This seems
- * unlikely.
- */
-int drm_rmmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_map *request = data;
- drm_local_map_t *map = NULL;
- struct drm_map_list *r_list;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- list_for_each_entry(r_list, &dev->maplist, head) {
- if (r_list->map &&
- r_list->user_token == (unsigned long)request->handle &&
- r_list->map->flags & _DRM_REMOVABLE) {
- map = r_list->map;
- break;
- }
- }
-
- /* List has wrapped around to the head pointer, or its empty we didn't
- * find anything.
- */
- if (list_empty(&dev->maplist) || !map) {
- mutex_unlock(&dev->struct_mutex);
- return -EINVAL;
- }
-
- /* Register and framebuffer maps are permanent */
- if ((map->type == _DRM_REGISTERS) || (map->type == _DRM_FRAME_BUFFER)) {
- mutex_unlock(&dev->struct_mutex);
- return 0;
- }
-
- ret = drm_rmmap_locked(dev, map);
-
- mutex_unlock(&dev->struct_mutex);
-
- return ret;
-}
-
-/**
- * Cleanup after an error on one of the addbufs() functions.
- *
- * \param dev DRM device.
- * \param entry buffer entry where the error occurred.
- *
- * Frees any pages and buffers associated with the given entry.
- */
-static void drm_cleanup_buf_error(struct drm_device *dev,
- struct drm_buf_entry *entry)
-{
- int i;
-
- if (entry->seg_count) {
- for (i = 0; i < entry->seg_count; i++) {
- if (entry->seglist[i]) {
- drm_pci_free(dev, entry->seglist[i]);
- }
- }
- drm_free(entry->seglist,
- entry->seg_count *
- sizeof(*entry->seglist), DRM_MEM_SEGS);
-
- entry->seg_count = 0;
- }
-
- if (entry->buf_count) {
- for (i = 0; i < entry->buf_count; i++) {
- if (entry->buflist[i].dev_private) {
- drm_free(entry->buflist[i].dev_private,
- entry->buflist[i].dev_priv_size,
- DRM_MEM_BUFS);
- }
- }
- drm_free(entry->buflist,
- entry->buf_count *
- sizeof(*entry->buflist), DRM_MEM_BUFS);
-
- entry->buf_count = 0;
- }
-}
-
-#if __OS_HAS_AGP
-/**
- * Add AGP buffers for DMA transfers.
- *
- * \param dev struct drm_device to which the buffers are to be added.
- * \param request pointer to a struct drm_buf_desc describing the request.
- * \return zero on success or a negative number on failure.
- *
- * After some sanity checks creates a drm_buf structure for each buffer and
- * reallocates the buffer list of the same size order to accommodate the new
- * buffers.
- */
-int drm_addbufs_agp(struct drm_device *dev, struct drm_buf_desc *request)
-{
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf_entry *entry;
- struct drm_agp_mem *agp_entry;
- struct drm_buf *buf;
- unsigned long offset;
- unsigned long agp_offset;
- int count;
- int order;
- int size;
- int alignment;
- int page_order;
- int total;
- int byte_count;
- int i, valid;
- struct drm_buf **temp_buflist;
-
- if (!dma)
- return -EINVAL;
-
- count = request->count;
- order = drm_order(request->size);
- size = 1 << order;
-
- alignment = (request->flags & _DRM_PAGE_ALIGN)
- ? PAGE_ALIGN(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- byte_count = 0;
- agp_offset = dev->agp->base + request->agp_start;
-
- DRM_DEBUG("count: %d\n", count);
- DRM_DEBUG("order: %d\n", order);
- DRM_DEBUG("size: %d\n", size);
- DRM_DEBUG("agp_offset: %lx\n", agp_offset);
- DRM_DEBUG("alignment: %d\n", alignment);
- DRM_DEBUG("page_order: %d\n", page_order);
- DRM_DEBUG("total: %d\n", total);
-
- if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
- return -EINVAL;
- if (dev->queue_count)
- return -EBUSY; /* Not while in use */
-
- /* Make sure buffers are located in AGP memory that we own */
- valid = 0;
- list_for_each_entry(agp_entry, &dev->agp->memory, head) {
- if ((agp_offset >= agp_entry->bound) &&
- (agp_offset + total * count <= agp_entry->bound + agp_entry->pages * PAGE_SIZE)) {
- valid = 1;
- break;
- }
- }
- if (!list_empty(&dev->agp->memory) && !valid) {
- DRM_DEBUG("zone invalid\n");
- return -EINVAL;
- }
- spin_lock(&dev->count_lock);
- if (dev->buf_use) {
- spin_unlock(&dev->count_lock);
- return -EBUSY;
- }
- atomic_inc(&dev->buf_alloc);
- spin_unlock(&dev->count_lock);
-
- mutex_lock(&dev->struct_mutex);
- entry = &dma->bufs[order];
- if (entry->buf_count) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM; /* May only call once for each order */
- }
-
- if (count < 0 || count > 4096) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -EINVAL;
- }
-
- entry->buflist = drm_alloc(count * sizeof(*entry->buflist),
- DRM_MEM_BUFS);
- if (!entry->buflist) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- memset(entry->buflist, 0, count * sizeof(*entry->buflist));
-
- entry->buf_size = size;
- entry->page_order = page_order;
-
- offset = 0;
-
- while (entry->buf_count < count) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
-
- buf->offset = (dma->byte_count + offset);
- buf->bus_address = agp_offset + offset;
- buf->address = (void *)(agp_offset + offset);
- buf->next = NULL;
- buf->waiting = 0;
- buf->pending = 0;
- init_waitqueue_head(&buf->dma_wait);
- buf->file_priv = NULL;
-
- buf->dev_priv_size = dev->driver->dev_priv_size;
- buf->dev_private = drm_alloc(buf->dev_priv_size, DRM_MEM_BUFS);
- if (!buf->dev_private) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- drm_cleanup_buf_error(dev, entry);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- memset(buf->dev_private, 0, buf->dev_priv_size);
-
- DRM_DEBUG("buffer %d @ %p\n", entry->buf_count, buf->address);
-
- offset += alignment;
- entry->buf_count++;
- byte_count += PAGE_SIZE << page_order;
- }
-
- DRM_DEBUG("byte_count: %d\n", byte_count);
-
- temp_buflist = drm_realloc(dma->buflist,
- dma->buf_count * sizeof(*dma->buflist),
- (dma->buf_count + entry->buf_count)
- * sizeof(*dma->buflist), DRM_MEM_BUFS);
- if (!temp_buflist) {
- /* Free the entry because it isn't valid */
- drm_cleanup_buf_error(dev, entry);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for (i = 0; i < entry->buf_count; i++) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- dma->buf_count += entry->buf_count;
- dma->seg_count += entry->seg_count;
- dma->page_count += byte_count >> PAGE_SHIFT;
- dma->byte_count += byte_count;
-
- DRM_DEBUG("dma->buf_count : %d\n", dma->buf_count);
- DRM_DEBUG("entry->buf_count : %d\n", entry->buf_count);
-
- mutex_unlock(&dev->struct_mutex);
-
- request->count = entry->buf_count;
- request->size = size;
-
- dma->flags = _DRM_DMA_USE_AGP;
-
- atomic_dec(&dev->buf_alloc);
- return 0;
-}
-EXPORT_SYMBOL(drm_addbufs_agp);
-#endif /* __OS_HAS_AGP */
-
-int drm_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *request)
-{
- struct drm_device_dma *dma = dev->dma;
- int count;
- int order;
- int size;
- int total;
- int page_order;
- struct drm_buf_entry *entry;
- drm_dma_handle_t *dmah;
- struct drm_buf *buf;
- int alignment;
- unsigned long offset;
- int i;
- int byte_count;
- int page_count;
- unsigned long *temp_pagelist;
- struct drm_buf **temp_buflist;
-
- if (!drm_core_check_feature(dev, DRIVER_PCI_DMA))
- return -EINVAL;
-
- if (!dma)
- return -EINVAL;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- count = request->count;
- order = drm_order(request->size);
- size = 1 << order;
-
- DRM_DEBUG("count=%d, size=%d (%d), order=%d, queue_count=%d\n",
- request->count, request->size, size, order, dev->queue_count);
-
- if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
- return -EINVAL;
- if (dev->queue_count)
- return -EBUSY; /* Not while in use */
-
- alignment = (request->flags & _DRM_PAGE_ALIGN)
- ? PAGE_ALIGN(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- spin_lock(&dev->count_lock);
- if (dev->buf_use) {
- spin_unlock(&dev->count_lock);
- return -EBUSY;
- }
- atomic_inc(&dev->buf_alloc);
- spin_unlock(&dev->count_lock);
-
- mutex_lock(&dev->struct_mutex);
- entry = &dma->bufs[order];
- if (entry->buf_count) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM; /* May only call once for each order */
- }
-
- if (count < 0 || count > 4096) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -EINVAL;
- }
-
- entry->buflist = drm_alloc(count * sizeof(*entry->buflist),
- DRM_MEM_BUFS);
- if (!entry->buflist) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- memset(entry->buflist, 0, count * sizeof(*entry->buflist));
-
- entry->seglist = drm_alloc(count * sizeof(*entry->seglist),
- DRM_MEM_SEGS);
- if (!entry->seglist) {
- drm_free(entry->buflist,
- count * sizeof(*entry->buflist), DRM_MEM_BUFS);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- memset(entry->seglist, 0, count * sizeof(*entry->seglist));
-
- /* Keep the original pagelist until we know all the allocations
- * have succeeded
- */
- temp_pagelist = drm_alloc((dma->page_count + (count << page_order))
- * sizeof(*dma->pagelist), DRM_MEM_PAGES);
- if (!temp_pagelist) {
- drm_free(entry->buflist,
- count * sizeof(*entry->buflist), DRM_MEM_BUFS);
- drm_free(entry->seglist,
- count * sizeof(*entry->seglist), DRM_MEM_SEGS);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- memcpy(temp_pagelist,
- dma->pagelist, dma->page_count * sizeof(*dma->pagelist));
- DRM_DEBUG("pagelist: %d entries\n",
- dma->page_count + (count << page_order));
-
- entry->buf_size = size;
- entry->page_order = page_order;
- byte_count = 0;
- page_count = 0;
-
- while (entry->buf_count < count) {
-
- dmah = drm_pci_alloc(dev, PAGE_SIZE << page_order, 0x1000, 0xfffffffful);
-
- if (!dmah) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- entry->seg_count = count;
- drm_cleanup_buf_error(dev, entry);
- drm_free(temp_pagelist,
- (dma->page_count + (count << page_order))
- * sizeof(*dma->pagelist), DRM_MEM_PAGES);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- entry->seglist[entry->seg_count++] = dmah;
- for (i = 0; i < (1 << page_order); i++) {
- DRM_DEBUG("page %d @ 0x%08lx\n",
- dma->page_count + page_count,
- (unsigned long)dmah->vaddr + PAGE_SIZE * i);
- temp_pagelist[dma->page_count + page_count++]
- = (unsigned long)dmah->vaddr + PAGE_SIZE * i;
- }
- for (offset = 0;
- offset + size <= total && entry->buf_count < count;
- offset += alignment, ++entry->buf_count) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
- buf->offset = (dma->byte_count + byte_count + offset);
- buf->address = (void *)(dmah->vaddr + offset);
- buf->bus_address = dmah->busaddr + offset;
- buf->next = NULL;
- buf->waiting = 0;
- buf->pending = 0;
- init_waitqueue_head(&buf->dma_wait);
- buf->file_priv = NULL;
-
- buf->dev_priv_size = dev->driver->dev_priv_size;
- buf->dev_private = drm_alloc(buf->dev_priv_size,
- DRM_MEM_BUFS);
- if (!buf->dev_private) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- entry->seg_count = count;
- drm_cleanup_buf_error(dev, entry);
- drm_free(temp_pagelist,
- (dma->page_count +
- (count << page_order))
- * sizeof(*dma->pagelist),
- DRM_MEM_PAGES);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- memset(buf->dev_private, 0, buf->dev_priv_size);
-
- DRM_DEBUG("buffer %d @ %p\n",
- entry->buf_count, buf->address);
- }
- byte_count += PAGE_SIZE << page_order;
- }
-
- temp_buflist = drm_realloc(dma->buflist,
- dma->buf_count * sizeof(*dma->buflist),
- (dma->buf_count + entry->buf_count)
- * sizeof(*dma->buflist), DRM_MEM_BUFS);
- if (!temp_buflist) {
- /* Free the entry because it isn't valid */
- drm_cleanup_buf_error(dev, entry);
- drm_free(temp_pagelist,
- (dma->page_count + (count << page_order))
- * sizeof(*dma->pagelist), DRM_MEM_PAGES);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for (i = 0; i < entry->buf_count; i++) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- /* No allocations failed, so now we can replace the orginal pagelist
- * with the new one.
- */
- if (dma->page_count) {
- drm_free(dma->pagelist,
- dma->page_count * sizeof(*dma->pagelist),
- DRM_MEM_PAGES);
- }
- dma->pagelist = temp_pagelist;
-
- dma->buf_count += entry->buf_count;
- dma->seg_count += entry->seg_count;
- dma->page_count += entry->seg_count << page_order;
- dma->byte_count += PAGE_SIZE * (entry->seg_count << page_order);
-
- mutex_unlock(&dev->struct_mutex);
-
- request->count = entry->buf_count;
- request->size = size;
-
- if (request->flags & _DRM_PCI_BUFFER_RO)
- dma->flags = _DRM_DMA_USE_PCI_RO;
-
- atomic_dec(&dev->buf_alloc);
- return 0;
-
-}
-EXPORT_SYMBOL(drm_addbufs_pci);
-
-static int drm_addbufs_sg(struct drm_device *dev, struct drm_buf_desc *request)
-{
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf_entry *entry;
- struct drm_buf *buf;
- unsigned long offset;
- unsigned long agp_offset;
- int count;
- int order;
- int size;
- int alignment;
- int page_order;
- int total;
- int byte_count;
- int i;
- struct drm_buf **temp_buflist;
-
- if (!drm_core_check_feature(dev, DRIVER_SG))
- return -EINVAL;
-
- if (!dma)
- return -EINVAL;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- count = request->count;
- order = drm_order(request->size);
- size = 1 << order;
-
- alignment = (request->flags & _DRM_PAGE_ALIGN)
- ? PAGE_ALIGN(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- byte_count = 0;
- agp_offset = request->agp_start;
-
- DRM_DEBUG("count: %d\n", count);
- DRM_DEBUG("order: %d\n", order);
- DRM_DEBUG("size: %d\n", size);
- DRM_DEBUG("agp_offset: %lu\n", agp_offset);
- DRM_DEBUG("alignment: %d\n", alignment);
- DRM_DEBUG("page_order: %d\n", page_order);
- DRM_DEBUG("total: %d\n", total);
-
- if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
- return -EINVAL;
- if (dev->queue_count)
- return -EBUSY; /* Not while in use */
-
- spin_lock(&dev->count_lock);
- if (dev->buf_use) {
- spin_unlock(&dev->count_lock);
- return -EBUSY;
- }
- atomic_inc(&dev->buf_alloc);
- spin_unlock(&dev->count_lock);
-
- mutex_lock(&dev->struct_mutex);
- entry = &dma->bufs[order];
- if (entry->buf_count) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM; /* May only call once for each order */
- }
-
- if (count < 0 || count > 4096) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -EINVAL;
- }
-
- entry->buflist = drm_alloc(count * sizeof(*entry->buflist),
- DRM_MEM_BUFS);
- if (!entry->buflist) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- memset(entry->buflist, 0, count * sizeof(*entry->buflist));
-
- entry->buf_size = size;
- entry->page_order = page_order;
-
- offset = 0;
-
- while (entry->buf_count < count) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
-
- buf->offset = (dma->byte_count + offset);
- buf->bus_address = agp_offset + offset;
- buf->address = (void *)(agp_offset + offset
- + (unsigned long)dev->sg->virtual);
- buf->next = NULL;
- buf->waiting = 0;
- buf->pending = 0;
- init_waitqueue_head(&buf->dma_wait);
- buf->file_priv = NULL;
-
- buf->dev_priv_size = dev->driver->dev_priv_size;
- buf->dev_private = drm_alloc(buf->dev_priv_size, DRM_MEM_BUFS);
- if (!buf->dev_private) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- drm_cleanup_buf_error(dev, entry);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
-
- memset(buf->dev_private, 0, buf->dev_priv_size);
-
- DRM_DEBUG("buffer %d @ %p\n", entry->buf_count, buf->address);
-
- offset += alignment;
- entry->buf_count++;
- byte_count += PAGE_SIZE << page_order;
- }
-
- DRM_DEBUG("byte_count: %d\n", byte_count);
-
- temp_buflist = drm_realloc(dma->buflist,
- dma->buf_count * sizeof(*dma->buflist),
- (dma->buf_count + entry->buf_count)
- * sizeof(*dma->buflist), DRM_MEM_BUFS);
- if (!temp_buflist) {
- /* Free the entry because it isn't valid */
- drm_cleanup_buf_error(dev, entry);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for (i = 0; i < entry->buf_count; i++) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- dma->buf_count += entry->buf_count;
- dma->seg_count += entry->seg_count;
- dma->page_count += byte_count >> PAGE_SHIFT;
- dma->byte_count += byte_count;
-
- DRM_DEBUG("dma->buf_count : %d\n", dma->buf_count);
- DRM_DEBUG("entry->buf_count : %d\n", entry->buf_count);
-
- mutex_unlock(&dev->struct_mutex);
-
- request->count = entry->buf_count;
- request->size = size;
-
- dma->flags = _DRM_DMA_USE_SG;
-
- atomic_dec(&dev->buf_alloc);
- return 0;
-}
-
-int drm_addbufs_fb(struct drm_device *dev, struct drm_buf_desc *request)
-{
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf_entry *entry;
- struct drm_buf *buf;
- unsigned long offset;
- unsigned long agp_offset;
- int count;
- int order;
- int size;
- int alignment;
- int page_order;
- int total;
- int byte_count;
- int i;
- struct drm_buf **temp_buflist;
-
- if (!drm_core_check_feature(dev, DRIVER_FB_DMA))
- return -EINVAL;
-
- if (!dma)
- return -EINVAL;
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- count = request->count;
- order = drm_order(request->size);
- size = 1 << order;
-
- alignment = (request->flags & _DRM_PAGE_ALIGN)
- ? PAGE_ALIGN(size) : size;
- page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
- total = PAGE_SIZE << page_order;
-
- byte_count = 0;
- agp_offset = request->agp_start;
-
- DRM_DEBUG("count: %d\n", count);
- DRM_DEBUG("order: %d\n", order);
- DRM_DEBUG("size: %d\n", size);
- DRM_DEBUG("agp_offset: %lu\n", agp_offset);
- DRM_DEBUG("alignment: %d\n", alignment);
- DRM_DEBUG("page_order: %d\n", page_order);
- DRM_DEBUG("total: %d\n", total);
-
- if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
- return -EINVAL;
- if (dev->queue_count)
- return -EBUSY; /* Not while in use */
-
- spin_lock(&dev->count_lock);
- if (dev->buf_use) {
- spin_unlock(&dev->count_lock);
- return -EBUSY;
- }
- atomic_inc(&dev->buf_alloc);
- spin_unlock(&dev->count_lock);
-
- mutex_lock(&dev->struct_mutex);
- entry = &dma->bufs[order];
- if (entry->buf_count) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM; /* May only call once for each order */
- }
-
- if (count < 0 || count > 4096) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -EINVAL;
- }
-
- entry->buflist = drm_alloc(count * sizeof(*entry->buflist),
- DRM_MEM_BUFS);
- if (!entry->buflist) {
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- memset(entry->buflist, 0, count * sizeof(*entry->buflist));
-
- entry->buf_size = size;
- entry->page_order = page_order;
-
- offset = 0;
-
- while (entry->buf_count < count) {
- buf = &entry->buflist[entry->buf_count];
- buf->idx = dma->buf_count + entry->buf_count;
- buf->total = alignment;
- buf->order = order;
- buf->used = 0;
-
- buf->offset = (dma->byte_count + offset);
- buf->bus_address = agp_offset + offset;
- buf->address = (void *)(agp_offset + offset);
- buf->next = NULL;
- buf->waiting = 0;
- buf->pending = 0;
- init_waitqueue_head(&buf->dma_wait);
- buf->file_priv = NULL;
-
- buf->dev_priv_size = dev->driver->dev_priv_size;
- buf->dev_private = drm_alloc(buf->dev_priv_size, DRM_MEM_BUFS);
- if (!buf->dev_private) {
- /* Set count correctly so we free the proper amount. */
- entry->buf_count = count;
- drm_cleanup_buf_error(dev, entry);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- memset(buf->dev_private, 0, buf->dev_priv_size);
-
- DRM_DEBUG("buffer %d @ %p\n", entry->buf_count, buf->address);
-
- offset += alignment;
- entry->buf_count++;
- byte_count += PAGE_SIZE << page_order;
- }
-
- DRM_DEBUG("byte_count: %d\n", byte_count);
-
- temp_buflist = drm_realloc(dma->buflist,
- dma->buf_count * sizeof(*dma->buflist),
- (dma->buf_count + entry->buf_count)
- * sizeof(*dma->buflist), DRM_MEM_BUFS);
- if (!temp_buflist) {
- /* Free the entry because it isn't valid */
- drm_cleanup_buf_error(dev, entry);
- mutex_unlock(&dev->struct_mutex);
- atomic_dec(&dev->buf_alloc);
- return -ENOMEM;
- }
- dma->buflist = temp_buflist;
-
- for (i = 0; i < entry->buf_count; i++) {
- dma->buflist[i + dma->buf_count] = &entry->buflist[i];
- }
-
- dma->buf_count += entry->buf_count;
- dma->seg_count += entry->seg_count;
- dma->page_count += byte_count >> PAGE_SHIFT;
- dma->byte_count += byte_count;
-
- DRM_DEBUG("dma->buf_count : %d\n", dma->buf_count);
- DRM_DEBUG("entry->buf_count : %d\n", entry->buf_count);
-
- mutex_unlock(&dev->struct_mutex);
-
- request->count = entry->buf_count;
- request->size = size;
-
- dma->flags = _DRM_DMA_USE_FB;
-
- atomic_dec(&dev->buf_alloc);
- return 0;
-}
-EXPORT_SYMBOL(drm_addbufs_fb);
-
-
-/**
- * Add buffers for DMA transfers (ioctl).
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a struct drm_buf_desc request.
- * \return zero on success or a negative number on failure.
- *
- * According with the memory type specified in drm_buf_desc::flags and the
- * build options, it dispatches the call either to addbufs_agp(),
- * addbufs_sg() or addbufs_pci() for AGP, scatter-gather or consistent
- * PCI memory respectively.
- */
-int drm_addbufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_buf_desc *request = data;
- int ret;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
-#if __OS_HAS_AGP
- if (request->flags & _DRM_AGP_BUFFER)
- ret = drm_addbufs_agp(dev, request);
- else
-#endif
- if (request->flags & _DRM_SG_BUFFER)
- ret = drm_addbufs_sg(dev, request);
- else if (request->flags & _DRM_FB_BUFFER)
- ret = drm_addbufs_fb(dev, request);
- else
- ret = drm_addbufs_pci(dev, request);
-
- return ret;
-}
-
-/**
- * Get information about the buffer mappings.
- *
- * This was originally mean for debugging purposes, or by a sophisticated
- * client library to determine how best to use the available buffers (e.g.,
- * large buffers can be used for image transfer).
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a drm_buf_info structure.
- * \return zero on success or a negative number on failure.
- *
- * Increments drm_device::buf_use while holding the drm_device::count_lock
- * lock, preventing of allocating more buffers after this call. Information
- * about each requested buffer is then copied into user space.
- */
-int drm_infobufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf_info *request = data;
- int i;
- int count;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
- if (!dma)
- return -EINVAL;
-
- spin_lock(&dev->count_lock);
- if (atomic_read(&dev->buf_alloc)) {
- spin_unlock(&dev->count_lock);
- return -EBUSY;
- }
- ++dev->buf_use; /* Can't allocate more after this call */
- spin_unlock(&dev->count_lock);
-
- for (i = 0, count = 0; i < DRM_MAX_ORDER + 1; i++) {
- if (dma->bufs[i].buf_count)
- ++count;
- }
-
- DRM_DEBUG("count = %d\n", count);
-
- if (request->count >= count) {
- for (i = 0, count = 0; i < DRM_MAX_ORDER + 1; i++) {
- if (dma->bufs[i].buf_count) {
- struct drm_buf_desc __user *to =
- &request->list[count];
- struct drm_buf_entry *from = &dma->bufs[i];
- struct drm_freelist *list = &dma->bufs[i].freelist;
- if (copy_to_user(&to->count,
- &from->buf_count,
- sizeof(from->buf_count)) ||
- copy_to_user(&to->size,
- &from->buf_size,
- sizeof(from->buf_size)) ||
- copy_to_user(&to->low_mark,
- &list->low_mark,
- sizeof(list->low_mark)) ||
- copy_to_user(&to->high_mark,
- &list->high_mark,
- sizeof(list->high_mark)))
- return -EFAULT;
-
- DRM_DEBUG("%d %d %d %d %d\n",
- i,
- dma->bufs[i].buf_count,
- dma->bufs[i].buf_size,
- dma->bufs[i].freelist.low_mark,
- dma->bufs[i].freelist.high_mark);
- ++count;
- }
- }
- }
- request->count = count;
-
- return 0;
-}
-
-/**
- * Specifies a low and high water mark for buffer allocation
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg a pointer to a drm_buf_desc structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies that the size order is bounded between the admissible orders and
- * updates the respective drm_device_dma::bufs entry low and high water mark.
- *
- * \note This ioctl is deprecated and mostly never used.
- */
-int drm_markbufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf_desc *request = data;
- int order;
- struct drm_buf_entry *entry;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
- if (!dma)
- return -EINVAL;
-
- DRM_DEBUG("%d, %d, %d\n",
- request->size, request->low_mark, request->high_mark);
- order = drm_order(request->size);
- if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
- return -EINVAL;
- entry = &dma->bufs[order];
-
- if (request->low_mark < 0 || request->low_mark > entry->buf_count)
- return -EINVAL;
- if (request->high_mark < 0 || request->high_mark > entry->buf_count)
- return -EINVAL;
-
- entry->freelist.low_mark = request->low_mark;
- entry->freelist.high_mark = request->high_mark;
-
- return 0;
-}
-
-/**
- * Unreserve the buffers in list, previously reserved using drmDMA.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a drm_buf_free structure.
- * \return zero on success or a negative number on failure.
- *
- * Calls free_buffer() for each used buffer.
- * This function is primarily used for debugging.
- */
-int drm_freebufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf_free *request = data;
- int i;
- int idx;
- struct drm_buf *buf;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
- if (!dma)
- return -EINVAL;
-
- DRM_DEBUG("%d\n", request->count);
- for (i = 0; i < request->count; i++) {
- if (copy_from_user(&idx, &request->list[i], sizeof(idx)))
- return -EFAULT;
- if (idx < 0 || idx >= dma->buf_count) {
- DRM_ERROR("Index %d (of %d max)\n",
- idx, dma->buf_count - 1);
- return -EINVAL;
- }
- buf = dma->buflist[idx];
- if (buf->file_priv != file_priv) {
- DRM_ERROR("Process %d freeing buffer not owned\n",
- current->pid);
- return -EINVAL;
- }
- drm_free_buffer(dev, buf);
- }
-
- return 0;
-}
-
-/**
- * Maps all of the DMA buffers into client-virtual space (ioctl).
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a drm_buf_map structure.
- * \return zero on success or a negative number on failure.
- *
- * Maps the AGP, SG or PCI buffer region with do_mmap(), and copies information
- * about each buffer into user space. For PCI buffers, it calls do_mmap() with
- * offset equal to 0, which drm_mmap() interpretes as PCI buffers and calls
- * drm_mmap_dma().
- */
-int drm_mapbufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- int retcode = 0;
- const int zero = 0;
- unsigned long virtual;
- unsigned long address;
- struct drm_buf_map *request = data;
- int i;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- return -EINVAL;
-
- if (!dma)
- return -EINVAL;
-
- spin_lock(&dev->count_lock);
- if (atomic_read(&dev->buf_alloc)) {
- spin_unlock(&dev->count_lock);
- return -EBUSY;
- }
- dev->buf_use++; /* Can't allocate more after this call */
- spin_unlock(&dev->count_lock);
-
- if (request->count >= dma->buf_count) {
- if ((drm_core_has_AGP(dev) && (dma->flags & _DRM_DMA_USE_AGP))
- || (drm_core_check_feature(dev, DRIVER_SG)
- && (dma->flags & _DRM_DMA_USE_SG))
- || (drm_core_check_feature(dev, DRIVER_FB_DMA)
- && (dma->flags & _DRM_DMA_USE_FB))) {
- struct drm_map *map = dev->agp_buffer_map;
- unsigned long token = dev->agp_buffer_token;
-
- if (!map) {
- retcode = -EINVAL;
- goto done;
- }
- down_write(¤t->mm->mmap_sem);
- virtual = do_mmap(file_priv->filp, 0, map->size,
- PROT_READ | PROT_WRITE,
- MAP_SHARED,
- token);
- up_write(¤t->mm->mmap_sem);
- } else {
- down_write(¤t->mm->mmap_sem);
- virtual = do_mmap(file_priv->filp, 0, dma->byte_count,
- PROT_READ | PROT_WRITE,
- MAP_SHARED, 0);
- up_write(¤t->mm->mmap_sem);
- }
- if (virtual > -1024UL) {
- /* Real error */
- retcode = (signed long)virtual;
- goto done;
- }
- request->virtual = (void __user *)virtual;
-
- for (i = 0; i < dma->buf_count; i++) {
- if (copy_to_user(&request->list[i].idx,
- &dma->buflist[i]->idx,
- sizeof(request->list[0].idx))) {
- retcode = -EFAULT;
- goto done;
- }
- if (copy_to_user(&request->list[i].total,
- &dma->buflist[i]->total,
- sizeof(request->list[0].total))) {
- retcode = -EFAULT;
- goto done;
- }
- if (copy_to_user(&request->list[i].used,
- &zero, sizeof(zero))) {
- retcode = -EFAULT;
- goto done;
- }
- address = virtual + dma->buflist[i]->offset; /* *** */
- if (copy_to_user(&request->list[i].address,
- &address, sizeof(address))) {
- retcode = -EFAULT;
- goto done;
- }
- }
- }
- done:
- request->count = dma->buf_count;
- DRM_DEBUG("%d buffers, retcode = %d\n", request->count, retcode);
-
- return retcode;
-}
-
-/**
- * Compute size order. Returns the exponent of the smaller power of two which
- * is greater or equal to given number.
- *
- * \param size size.
- * \return order.
- *
- * \todo Can be made faster.
- */
-int drm_order(unsigned long size)
-{
- int order;
- unsigned long tmp;
-
- for (order = 0, tmp = size >> 1; tmp; tmp >>= 1, order++) ;
-
- if (size & (size - 1))
- ++order;
-
- return order;
-}
-EXPORT_SYMBOL(drm_order);
+++ /dev/null
-/**************************************************************************
- *
- * This kernel module is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- **************************************************************************/
-/*
- * This code provides access to unexported mm kernel features. It is necessary
- * to use the new DRM memory manager code with kernels that don't support it
- * directly.
- *
- * Authors: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
- * Linux kernel mm subsystem authors.
- * (Most code taken from there).
- */
-
-#include "drmP.h"
-
-#ifdef DRM_IDR_COMPAT_FN
-/* only called when idp->lock is held */
-static void __free_layer(struct idr *idp, struct idr_layer *p)
-{
- p->ary[0] = idp->id_free;
- idp->id_free = p;
- idp->id_free_cnt++;
-}
-
-static void free_layer(struct idr *idp, struct idr_layer *p)
-{
- unsigned long flags;
-
- /*
- * Depends on the return element being zeroed.
- */
- spin_lock_irqsave(&idp->lock, flags);
- __free_layer(idp, p);
- spin_unlock_irqrestore(&idp->lock, flags);
-}
-
-/**
- * idr_for_each - iterate through all stored pointers
- * @idp: idr handle
- * @fn: function to be called for each pointer
- * @data: data passed back to callback function
- *
- * Iterate over the pointers registered with the given idr. The
- * callback function will be called for each pointer currently
- * registered, passing the id, the pointer and the data pointer passed
- * to this function. It is not safe to modify the idr tree while in
- * the callback, so functions such as idr_get_new and idr_remove are
- * not allowed.
- *
- * We check the return of @fn each time. If it returns anything other
- * than 0, we break out and return that value.
- *
-* The caller must serialize idr_find() vs idr_get_new() and idr_remove().
- */
-int idr_for_each(struct idr *idp,
- int (*fn)(int id, void *p, void *data), void *data)
-{
- int n, id, max, error = 0;
- struct idr_layer *p;
- struct idr_layer *pa[MAX_LEVEL];
- struct idr_layer **paa = &pa[0];
-
- n = idp->layers * IDR_BITS;
- p = idp->top;
- max = 1 << n;
-
- id = 0;
- while (id < max) {
- while (n > 0 && p) {
- n -= IDR_BITS;
- *paa++ = p;
- p = p->ary[(id >> n) & IDR_MASK];
- }
-
- if (p) {
- error = fn(id, (void *)p, data);
- if (error)
- break;
- }
-
- id += 1 << n;
- while (n < fls(id)) {
- n += IDR_BITS;
- p = *--paa;
- }
- }
-
- return error;
-}
-EXPORT_SYMBOL(idr_for_each);
-
-/**
- * idr_remove_all - remove all ids from the given idr tree
- * @idp: idr handle
- *
- * idr_destroy() only frees up unused, cached idp_layers, but this
- * function will remove all id mappings and leave all idp_layers
- * unused.
- *
- * A typical clean-up sequence for objects stored in an idr tree, will
- * use idr_for_each() to free all objects, if necessay, then
- * idr_remove_all() to remove all ids, and idr_destroy() to free
- * up the cached idr_layers.
- */
-void idr_remove_all(struct idr *idp)
-{
- int n, id, max, error = 0;
- struct idr_layer *p;
- struct idr_layer *pa[MAX_LEVEL];
- struct idr_layer **paa = &pa[0];
-
- n = idp->layers * IDR_BITS;
- p = idp->top;
- max = 1 << n;
-
- id = 0;
- while (id < max && !error) {
- while (n > IDR_BITS && p) {
- n -= IDR_BITS;
- *paa++ = p;
- p = p->ary[(id >> n) & IDR_MASK];
- }
-
- id += 1 << n;
- while (n < fls(id)) {
- if (p) {
- memset(p, 0, sizeof *p);
- free_layer(idp, p);
- }
- n += IDR_BITS;
- p = *--paa;
- }
- }
- idp->top = NULL;
- idp->layers = 0;
-}
-EXPORT_SYMBOL(idr_remove_all);
-
-#endif /* DRM_IDR_COMPAT_FN */
+++ /dev/null
-/**
- * \file drm_compat.h
- * Backward compatability definitions for Direct Rendering Manager
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef _DRM_COMPAT_H_
-#define _DRM_COMPAT_H_
-
-#ifndef minor
-#define minor(x) MINOR((x))
-#endif
-
-#ifndef MODULE_LICENSE
-#define MODULE_LICENSE(x)
-#endif
-
-#ifndef preempt_disable
-#define preempt_disable()
-#define preempt_enable()
-#endif
-
-#ifndef pte_offset_map
-#define pte_offset_map pte_offset
-#define pte_unmap(pte)
-#endif
-
-#ifndef module_param
-#define module_param(name, type, perm)
-#endif
-
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))
-#define current_euid() (current->euid)
-#else
-#include <linux/cred.h>
-#endif
-
-#ifndef list_for_each_safe
-#define list_for_each_safe(pos, n, head) \
- for (pos = (head)->next, n = pos->next; pos != (head); \
- pos = n, n = pos->next)
-#endif
-
-#ifndef list_for_each_entry
-#define list_for_each_entry(pos, head, member) \
- for (pos = list_entry((head)->next, typeof(*pos), member), \
- prefetch(pos->member.next); \
- &pos->member != (head); \
- pos = list_entry(pos->member.next, typeof(*pos), member), \
- prefetch(pos->member.next))
-#endif
-
-#ifndef list_for_each_entry_safe
-#define list_for_each_entry_safe(pos, n, head, member) \
- for (pos = list_entry((head)->next, typeof(*pos), member), \
- n = list_entry(pos->member.next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.next, typeof(*n), member))
-#endif
-
-#ifndef __user
-#define __user
-#endif
-
-#if !defined(__put_page)
-#define __put_page(p) atomic_dec(&(p)->count)
-#endif
-
-#if !defined(__GFP_COMP)
-#define __GFP_COMP 0
-#endif
-
-#if !defined(IRQF_SHARED)
-#define IRQF_SHARED SA_SHIRQ
-#endif
-
-#ifndef DEFINE_SPINLOCK
-#define DEFINE_SPINLOCK(x) spinlock_t x = SPIN_LOCK_UNLOCKED
-#endif
-
-/* old architectures */
-#ifdef __AMD64__
-#define __x86_64__
-#endif
-
-/* sysfs __ATTR macro */
-#ifndef __ATTR
-#define __ATTR(_name,_mode,_show,_store) { \
- .attr = {.name = __stringify(_name), .mode = _mode, .owner = THIS_MODULE }, \
- .show = _show, \
- .store = _store, \
-}
-#endif
-
-#ifndef list_for_each_entry_safe_reverse
-#define list_for_each_entry_safe_reverse(pos, n, head, member) \
- for (pos = list_entry((head)->prev, typeof(*pos), member), \
- n = list_entry(pos->member.prev, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.prev, typeof(*n), member))
-#endif
-
-#include <linux/mm.h>
-#include <asm/page.h>
-
-/*
- * Flush relevant caches and clear a VMA structure so that page references
- * will cause a page fault. Don't flush tlbs.
- */
-
-extern void drm_clear_vma(struct vm_area_struct *vma,
- unsigned long addr, unsigned long end);
-
-/*
- * Return the PTE protection map entries for the VMA flags given by
- * flags. This is a functional interface to the kernel's protection map.
- */
-
-extern pgprot_t vm_get_page_prot(unsigned long vm_flags);
-
-#ifndef GFP_DMA32
-#define GFP_DMA32 GFP_KERNEL
-#endif
-#ifndef __GFP_DMA32
-#define __GFP_DMA32 GFP_KERNEL
-#endif
-
-/* fixme when functions are upstreamed - upstreamed for 2.6.23 */
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23))
-#define DRM_IDR_COMPAT_FN
-#define DRM_NO_FAULT
-extern unsigned long drm_bo_vm_nopfn(struct vm_area_struct *vma,
- unsigned long address);
-#endif
-#ifdef DRM_IDR_COMPAT_FN
-int idr_for_each(struct idr *idp,
- int (*fn)(int id, void *p, void *data), void *data);
-void idr_remove_all(struct idr *idp);
-#endif
-
-
-#if !defined(flush_agp_mappings)
-#define flush_agp_mappings() do {} while(0)
-#endif
-
-#ifndef DMA_BIT_MASK
-#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : (1ULL<<(n)) - 1)
-#endif
-
-#ifndef VM_CAN_NONLINEAR
-#define DRM_VM_NOPAGE 1
-#endif
-
-#ifdef DRM_VM_NOPAGE
-
-extern struct page *drm_vm_nopage(struct vm_area_struct *vma,
- unsigned long address, int *type);
-
-extern struct page *drm_vm_shm_nopage(struct vm_area_struct *vma,
- unsigned long address, int *type);
-
-extern struct page *drm_vm_dma_nopage(struct vm_area_struct *vma,
- unsigned long address, int *type);
-
-extern struct page *drm_vm_sg_nopage(struct vm_area_struct *vma,
- unsigned long address, int *type);
-#endif
-
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
-#define drm_core_ioremap_wc drm_core_ioremap
-#endif
-
-#ifndef OS_HAS_GEM
-#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
-#define OS_HAS_GEM 1
-#else
-#define OS_HAS_GEM 0
-#endif
-#endif
-
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))
-#define set_page_locked SetPageLocked
-#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
-/*
- * The kernel provides __set_page_locked, which uses the non-atomic
- * __set_bit function. Let's use the atomic set_bit just in case.
- */
-static inline void set_page_locked(struct page *page)
-{
- set_bit(PG_locked, &page->flags);
-}
-#endif
-
-#endif
+++ /dev/null
-/**
- * \file drm_context.c
- * IOCTLs for generic contexts
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Fri Nov 24 18:31:37 2000 by gareth@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * ChangeLog:
- * 2001-11-16 Torsten Duwe <duwe@caldera.de>
- * added context constructor/destructor hooks,
- * needed by SiS driver's memory management.
- */
-
-#include "drmP.h"
-
-/******************************************************************/
-/** \name Context bitmap support */
-/*@{*/
-
-/**
- * Free a handle from the context bitmap.
- *
- * \param dev DRM device.
- * \param ctx_handle context handle.
- *
- * Clears the bit specified by \p ctx_handle in drm_device::ctx_bitmap and the entry
- * in drm_device::ctx_idr, while holding the drm_device::struct_mutex
- * lock.
- */
-void drm_ctxbitmap_free(struct drm_device *dev, int ctx_handle)
-{
- mutex_lock(&dev->struct_mutex);
- idr_remove(&dev->ctx_idr, ctx_handle);
- mutex_unlock(&dev->struct_mutex);
-}
-
-/**
- * Context bitmap allocation.
- *
- * \param dev DRM device.
- * \return (non-negative) context handle on success or a negative number on failure.
- *
- * Allocate a new idr from drm_device::ctx_idr while holding the
- * drm_device::struct_mutex lock.
- */
-static int drm_ctxbitmap_next(struct drm_device *dev)
-{
- int new_id;
- int ret;
-
-again:
- if (idr_pre_get(&dev->ctx_idr, GFP_KERNEL) == 0) {
- DRM_ERROR("Out of memory expanding drawable idr\n");
- return -ENOMEM;
- }
- mutex_lock(&dev->struct_mutex);
- ret = idr_get_new_above(&dev->ctx_idr, NULL,
- DRM_RESERVED_CONTEXTS, &new_id);
- if (ret == -EAGAIN) {
- mutex_unlock(&dev->struct_mutex);
- goto again;
- }
-
- mutex_unlock(&dev->struct_mutex);
- return new_id;
-}
-
-/**
- * Context bitmap initialization.
- *
- * \param dev DRM device.
- *
- * Initialise the drm_device::ctx_idr
- */
-int drm_ctxbitmap_init(struct drm_device *dev)
-{
- idr_init(&dev->ctx_idr);
- return 0;
-}
-
-/**
- * Context bitmap cleanup.
- *
- * \param dev DRM device.
- *
- * Free all idr members using drm_ctx_sarea_free helper function
- * while holding the drm_device::struct_mutex lock.
- */
-void drm_ctxbitmap_cleanup(struct drm_device *dev)
-{
- mutex_lock(&dev->struct_mutex);
- idr_remove_all(&dev->ctx_idr);
- mutex_unlock(&dev->struct_mutex);
-}
-
-/*@}*/
-
-/******************************************************************/
-/** \name Per Context SAREA Support */
-/*@{*/
-
-/**
- * Get per-context SAREA.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx_priv_map structure.
- * \return zero on success or a negative number on failure.
- *
- * Gets the map from drm_device::ctx_idr with the handle specified and
- * returns its handle.
- */
-int drm_getsareactx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx_priv_map *request = data;
- struct drm_map *map;
- struct drm_map_list *_entry;
-
- mutex_lock(&dev->struct_mutex);
-
- map = idr_find(&dev->ctx_idr, request->ctx_id);
- if (!map) {
- mutex_unlock(&dev->struct_mutex);
- return -EINVAL;
- }
-
- mutex_unlock(&dev->struct_mutex);
-
- request->handle = NULL;
- list_for_each_entry(_entry, &dev->maplist, head) {
- if (_entry->map == map) {
- request->handle =
- (void *)(unsigned long)_entry->user_token;
- break;
- }
- }
- if (request->handle == NULL)
- return -EINVAL;
-
- return 0;
-}
-
-/**
- * Set per-context SAREA.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx_priv_map structure.
- * \return zero on success or a negative number on failure.
- *
- * Searches the mapping specified in \p arg and update the entry in
- * drm_device::ctx_idr with it.
- */
-int drm_setsareactx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx_priv_map *request = data;
- struct drm_map *map = NULL;
- struct drm_map_list *r_list = NULL;
-
- mutex_lock(&dev->struct_mutex);
- list_for_each_entry(r_list, &dev->maplist, head) {
- if (r_list->map
- && r_list->user_token == (unsigned long) request->handle)
- goto found;
- }
- bad:
- mutex_unlock(&dev->struct_mutex);
- return -EINVAL;
-
- found:
- map = r_list->map;
- if (!map)
- goto bad;
-
- if (IS_ERR(idr_replace(&dev->ctx_idr, map, request->ctx_id)))
- goto bad;
-
- mutex_unlock(&dev->struct_mutex);
-
- return 0;
-}
-
-/*@}*/
-
-/******************************************************************/
-/** \name The actual DRM context handling routines */
-/*@{*/
-
-/**
- * Switch context.
- *
- * \param dev DRM device.
- * \param old old context handle.
- * \param new new context handle.
- * \return zero on success or a negative number on failure.
- *
- * Attempt to set drm_device::context_flag.
- */
-static int drm_context_switch(struct drm_device *dev, int old, int new)
-{
- if (test_and_set_bit(0, &dev->context_flag)) {
- DRM_ERROR("Reentering -- FIXME\n");
- return -EBUSY;
- }
-
- DRM_DEBUG("Context switch from %d to %d\n", old, new);
-
- if (new == dev->last_context) {
- clear_bit(0, &dev->context_flag);
- return 0;
- }
-
- return 0;
-}
-
-/**
- * Complete context switch.
- *
- * \param dev DRM device.
- * \param new new context handle.
- * \return zero on success or a negative number on failure.
- *
- * Updates drm_device::last_context and drm_device::last_switch. Verifies the
- * hardware lock is held, clears the drm_device::context_flag and wakes up
- * drm_device::context_wait.
- */
-static int drm_context_switch_complete(struct drm_device *dev, int new)
-{
- dev->last_context = new; /* PRE/POST: This is the _only_ writer. */
- dev->last_switch = jiffies;
-
- if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
- DRM_ERROR("Lock isn't held after context switch\n");
- }
-
- /* If a context switch is ever initiated
- when the kernel holds the lock, release
- that lock here. */
- clear_bit(0, &dev->context_flag);
- wake_up(&dev->context_wait);
-
- return 0;
-}
-
-/**
- * Reserve contexts.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx_res structure.
- * \return zero on success or a negative number on failure.
- */
-int drm_resctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx_res *res = data;
- struct drm_ctx ctx;
- int i;
-
- if (res->count >= DRM_RESERVED_CONTEXTS) {
- memset(&ctx, 0, sizeof(ctx));
- for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) {
- ctx.handle = i;
- if (copy_to_user(&res->contexts[i], &ctx, sizeof(ctx)))
- return -EFAULT;
- }
- }
- res->count = DRM_RESERVED_CONTEXTS;
-
- return 0;
-}
-
-/**
- * Add context.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- *
- * Get a new handle for the context and copy to userspace.
- */
-int drm_addctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx_list *ctx_entry;
- struct drm_ctx *ctx = data;
-
- ctx->handle = drm_ctxbitmap_next(dev);
- if (ctx->handle == DRM_KERNEL_CONTEXT) {
- /* Skip kernel's context and get a new one. */
- ctx->handle = drm_ctxbitmap_next(dev);
- }
- DRM_DEBUG("%d\n", ctx->handle);
- if (ctx->handle == -1) {
- DRM_DEBUG("Not enough free contexts.\n");
- /* Should this return -EBUSY instead? */
- return -ENOMEM;
- }
-
- if (ctx->handle != DRM_KERNEL_CONTEXT) {
- if (dev->driver->context_ctor)
- if (!dev->driver->context_ctor(dev, ctx->handle)) {
- DRM_DEBUG("Running out of ctxs or memory.\n");
- return -ENOMEM;
- }
- }
-
- ctx_entry = drm_alloc(sizeof(*ctx_entry), DRM_MEM_CTXLIST);
- if (!ctx_entry) {
- DRM_DEBUG("out of memory\n");
- return -ENOMEM;
- }
-
- INIT_LIST_HEAD(&ctx_entry->head);
- ctx_entry->handle = ctx->handle;
- ctx_entry->tag = file_priv;
-
- mutex_lock(&dev->ctxlist_mutex);
- list_add(&ctx_entry->head, &dev->ctxlist);
- ++dev->ctx_count;
- mutex_unlock(&dev->ctxlist_mutex);
-
- return 0;
-}
-
-int drm_modctx(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- /* This does nothing */
- return 0;
-}
-
-/**
- * Get context.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- */
-int drm_getctx(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_ctx *ctx = data;
-
- /* This is 0, because we don't handle any context flags */
- ctx->flags = 0;
-
- return 0;
-}
-
-/**
- * Switch context.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- *
- * Calls context_switch().
- */
-int drm_switchctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx *ctx = data;
-
- DRM_DEBUG("%d\n", ctx->handle);
- return drm_context_switch(dev, dev->last_context, ctx->handle);
-}
-
-/**
- * New context.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- *
- * Calls context_switch_complete().
- */
-int drm_newctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx *ctx = data;
-
- DRM_DEBUG("%d\n", ctx->handle);
- drm_context_switch_complete(dev, ctx->handle);
-
- return 0;
-}
-
-/**
- * Remove context.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument pointing to a drm_ctx structure.
- * \return zero on success or a negative number on failure.
- *
- * If not the special kernel context, calls ctxbitmap_free() to free the specified context.
- */
-int drm_rmctx(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_ctx *ctx = data;
-
- DRM_DEBUG("%d\n", ctx->handle);
- if (ctx->handle == DRM_KERNEL_CONTEXT + 1) {
- file_priv->remove_auth_on_close = 1;
- }
- if (ctx->handle != DRM_KERNEL_CONTEXT) {
- if (dev->driver->context_dtor)
- dev->driver->context_dtor(dev, ctx->handle);
- drm_ctxbitmap_free(dev, ctx->handle);
- }
-
- mutex_lock(&dev->ctxlist_mutex);
- if (!list_empty(&dev->ctxlist)) {
- struct drm_ctx_list *pos, *n;
-
- list_for_each_entry_safe(pos, n, &dev->ctxlist, head) {
- if (pos->handle == ctx->handle) {
- list_del(&pos->head);
- drm_free(pos, sizeof(*pos), DRM_MEM_CTXLIST);
- --dev->ctx_count;
- }
- }
- }
- mutex_unlock(&dev->ctxlist_mutex);
-
- return 0;
-}
-
-/*@}*/
+++ /dev/null
-/*
- * Copyright 2004 Jon Smirl <jonsmirl@gmail.com>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#define CORE_AUTHOR "Gareth Hughes, Leif Delgass, José Fonseca, Jon Smirl"
-
-#define CORE_NAME "drm"
-#define CORE_DESC "DRM shared core routines"
-#define CORE_DATE "20060810"
-
-#define DRM_IF_MAJOR 1
-#define DRM_IF_MINOR 3
-
-#define CORE_MAJOR 1
-#define CORE_MINOR 1
-#define CORE_PATCHLEVEL 0
+++ /dev/null
-/**
- * \file drm_dma.c
- * DMA IOCTL and function support
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-/**
- * Initialize the DMA data.
- *
- * \param dev DRM device.
- * \return zero on success or a negative value on failure.
- *
- * Allocate and initialize a drm_device_dma structure.
- */
-int drm_dma_setup(struct drm_device *dev)
-{
- int i;
-
- dev->dma = drm_alloc(sizeof(*dev->dma), DRM_MEM_DRIVER);
- if (!dev->dma)
- return -ENOMEM;
-
- memset(dev->dma, 0, sizeof(*dev->dma));
-
- for (i = 0; i <= DRM_MAX_ORDER; i++)
- memset(&dev->dma->bufs[i], 0, sizeof(dev->dma->bufs[0]));
-
- return 0;
-}
-
-/**
- * Cleanup the DMA resources.
- *
- * \param dev DRM device.
- *
- * Free all pages associated with DMA buffers, the buffers and pages lists, and
- * finally the drm_device::dma structure itself.
- */
-void drm_dma_takedown(struct drm_device *dev)
-{
- struct drm_device_dma *dma = dev->dma;
- int i, j;
-
- if (!dma)
- return;
-
- /* Clear dma buffers */
- for (i = 0; i <= DRM_MAX_ORDER; i++) {
- if (dma->bufs[i].seg_count) {
- DRM_DEBUG("order %d: buf_count = %d,"
- " seg_count = %d\n",
- i,
- dma->bufs[i].buf_count,
- dma->bufs[i].seg_count);
- for (j = 0; j < dma->bufs[i].seg_count; j++) {
- if (dma->bufs[i].seglist[j]) {
- drm_pci_free(dev, dma->bufs[i].seglist[j]);
- }
- }
- drm_free(dma->bufs[i].seglist,
- dma->bufs[i].seg_count
- * sizeof(*dma->bufs[0].seglist), DRM_MEM_SEGS);
- }
- if (dma->bufs[i].buf_count) {
- for (j = 0; j < dma->bufs[i].buf_count; j++) {
- if (dma->bufs[i].buflist[j].dev_private) {
- drm_free(dma->bufs[i].buflist[j].
- dev_private,
- dma->bufs[i].buflist[j].
- dev_priv_size, DRM_MEM_BUFS);
- }
- }
- drm_free(dma->bufs[i].buflist,
- dma->bufs[i].buf_count *
- sizeof(*dma->bufs[0].buflist), DRM_MEM_BUFS);
- }
- }
-
- if (dma->buflist) {
- drm_free(dma->buflist,
- dma->buf_count * sizeof(*dma->buflist), DRM_MEM_BUFS);
- }
-
- if (dma->pagelist) {
- drm_free(dma->pagelist,
- dma->page_count * sizeof(*dma->pagelist),
- DRM_MEM_PAGES);
- }
- drm_free(dev->dma, sizeof(*dev->dma), DRM_MEM_DRIVER);
- dev->dma = NULL;
-}
-
-/**
- * Free a buffer.
- *
- * \param dev DRM device.
- * \param buf buffer to free.
- *
- * Resets the fields of \p buf.
- */
-void drm_free_buffer(struct drm_device *dev, struct drm_buf *buf)
-{
- if (!buf)
- return;
-
- buf->waiting = 0;
- buf->pending = 0;
- buf->file_priv = NULL;
- buf->used = 0;
-
- if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE)
- && waitqueue_active(&buf->dma_wait)) {
- wake_up_interruptible(&buf->dma_wait);
- }
-}
-
-/**
- * Reclaim the buffers.
- *
- * \param file_priv DRM file private.
- *
- * Frees each buffer associated with \p file_priv not already on the hardware.
- */
-void drm_core_reclaim_buffers(struct drm_device *dev,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- int i;
-
- if (!dma)
- return;
- for (i = 0; i < dma->buf_count; i++) {
- if (dma->buflist[i]->file_priv == file_priv) {
- switch (dma->buflist[i]->list) {
- case DRM_LIST_NONE:
- drm_free_buffer(dev, dma->buflist[i]);
- break;
- case DRM_LIST_WAIT:
- dma->buflist[i]->list = DRM_LIST_RECLAIM;
- break;
- default:
- /* Buffer already on hardware. */
- break;
- }
- }
- }
-}
-EXPORT_SYMBOL(drm_core_reclaim_buffers);
+++ /dev/null
-/**
- * \file drm_drawable.c
- * IOCTLs for drawables
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- * \author Michel Dänzer <michel@tungstengraphics.com>
- */
-
-/*
- * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, North Dakota.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-/**
- * Allocate drawable ID and memory to store information about it.
- */
-int drm_adddraw(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- unsigned long irqflags;
- struct drm_draw *draw = data;
- int new_id = 0;
- int ret;
-
-again:
- if (idr_pre_get(&dev->drw_idr, GFP_KERNEL) == 0) {
- DRM_ERROR("Out of memory expanding drawable idr\n");
- return -ENOMEM;
- }
-
- spin_lock_irqsave(&dev->drw_lock, irqflags);
- ret = idr_get_new_above(&dev->drw_idr, NULL, 1, &new_id);
- if (ret == -EAGAIN) {
- spin_unlock_irqrestore(&dev->drw_lock, irqflags);
- goto again;
- }
-
- spin_unlock_irqrestore(&dev->drw_lock, irqflags);
-
- draw->handle = new_id;
-
- DRM_DEBUG("%d\n", draw->handle);
-
- return 0;
-}
-
-/**
- * Free drawable ID and memory to store information about it.
- */
-int drm_rmdraw(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_draw *draw = data;
- unsigned long irqflags;
-
- spin_lock_irqsave(&dev->drw_lock, irqflags);
-
- drm_free(drm_get_drawable_info(dev, draw->handle),
- sizeof(struct drm_drawable_info), DRM_MEM_BUFS);
-
- idr_remove(&dev->drw_idr, draw->handle);
-
- spin_unlock_irqrestore(&dev->drw_lock, irqflags);
- DRM_DEBUG("%d\n", draw->handle);
- return 0;
-}
-
-int drm_update_drawable_info(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_update_draw *update = data;
- unsigned long irqflags;
- struct drm_clip_rect *rects;
- struct drm_drawable_info *info;
- int err;
-
- info = idr_find(&dev->drw_idr, update->handle);
- if (!info) {
- info = drm_calloc(1, sizeof(*info), DRM_MEM_BUFS);
- if (!info)
- return -ENOMEM;
- if (IS_ERR(idr_replace(&dev->drw_idr, info, update->handle))) {
- DRM_ERROR("No such drawable %d\n", update->handle);
- drm_free(info, sizeof(*info), DRM_MEM_BUFS);
- return -EINVAL;
- }
- }
-
- switch (update->type) {
- case DRM_DRAWABLE_CLIPRECTS:
- if (update->num != info->num_rects) {
- rects = drm_alloc(update->num * sizeof(struct drm_clip_rect),
- DRM_MEM_BUFS);
- } else
- rects = info->rects;
-
- if (update->num && !rects) {
- DRM_ERROR("Failed to allocate cliprect memory\n");
- err = -ENOMEM;
- goto error;
- }
-
- if (update->num && DRM_COPY_FROM_USER(rects,
- (struct drm_clip_rect __user *)
- (unsigned long)update->data,
- update->num *
- sizeof(*rects))) {
- DRM_ERROR("Failed to copy cliprects from userspace\n");
- err = -EFAULT;
- goto error;
- }
-
- spin_lock_irqsave(&dev->drw_lock, irqflags);
-
- if (rects != info->rects) {
- drm_free(info->rects, info->num_rects *
- sizeof(struct drm_clip_rect), DRM_MEM_BUFS);
- }
-
- info->rects = rects;
- info->num_rects = update->num;
-
- spin_unlock_irqrestore(&dev->drw_lock, irqflags);
-
- DRM_DEBUG("Updated %d cliprects for drawable %d\n",
- info->num_rects, update->handle);
- break;
- default:
- DRM_ERROR("Invalid update type %d\n", update->type);
- return -EINVAL;
- }
-
- return 0;
-
-error:
- if (rects != info->rects)
- drm_free(rects, update->num * sizeof(struct drm_clip_rect),
- DRM_MEM_BUFS);
-
- return err;
-}
-
-/**
- * Caller must hold the drawable spinlock!
- */
-struct drm_drawable_info *drm_get_drawable_info(struct drm_device *dev, drm_drawable_t id)
-{
- return idr_find(&dev->drw_idr, id);
-}
-EXPORT_SYMBOL(drm_get_drawable_info);
-
-static int drm_drawable_free(int idr, void *p, void *data)
-{
- struct drm_drawable_info *info = p;
-
- if (info) {
- drm_free(info->rects, info->num_rects *
- sizeof(struct drm_clip_rect), DRM_MEM_BUFS);
- drm_free(info, sizeof(*info), DRM_MEM_BUFS);
- }
-
- return 0;
-}
-
-void drm_drawable_free_all(struct drm_device *dev)
-{
- idr_for_each(&dev->drw_idr, drm_drawable_free, NULL);
- idr_remove_all(&dev->drw_idr);
-}
+++ /dev/null
-/**
- * \file drm_drv.c
- * Generic driver template
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- *
- * To use this template, you must at least define the following (samples
- * given for the MGA driver):
- *
- * \code
- * #define DRIVER_AUTHOR "VA Linux Systems, Inc."
- *
- * #define DRIVER_NAME "mga"
- * #define DRIVER_DESC "Matrox G200/G400"
- * #define DRIVER_DATE "20001127"
- *
- * #define drm_x mga_##x
- * \endcode
- */
-
-/*
- * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-#include "drmP.h"
-#include "drm_core.h"
-
-static void drm_cleanup(struct drm_device * dev);
-int drm_fb_loaded = 0;
-
-static int drm_version(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-/** Ioctl table */
-static struct drm_ioctl_desc drm_ioctls[] = {
- DRM_IOCTL_DEF(DRM_IOCTL_VERSION, drm_version, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_UNIQUE, drm_getunique, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_MAGIC, drm_getmagic, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_IRQ_BUSID, drm_irq_by_busid, DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_MAP, drm_getmap, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_CLIENT, drm_getclient, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_STATS, drm_getstats, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_SET_VERSION, drm_setversion, DRM_MASTER|DRM_ROOT_ONLY),
-
- DRM_IOCTL_DEF(DRM_IOCTL_SET_UNIQUE, drm_setunique, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_BLOCK, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_UNBLOCK, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AUTH_MAGIC, drm_authmagic, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-
- DRM_IOCTL_DEF(DRM_IOCTL_ADD_MAP, drm_addmap_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_RM_MAP, drm_rmmap_ioctl, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_SET_SAREA_CTX, drm_setsareactx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_SAREA_CTX, drm_getsareactx, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_ADD_CTX, drm_addctx, DRM_AUTH|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_RM_CTX, drm_rmctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_MOD_CTX, drm_modctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_GET_CTX, drm_getctx, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_SWITCH_CTX, drm_switchctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_NEW_CTX, drm_newctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_RES_CTX, drm_resctx, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_ADD_DRAW, drm_adddraw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_RM_DRAW, drm_rmdraw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-
- DRM_IOCTL_DEF(DRM_IOCTL_LOCK, drm_lock, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_UNLOCK, drm_unlock, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_FINISH, drm_noop, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_ADD_BUFS, drm_addbufs, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_MARK_BUFS, drm_markbufs, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_INFO_BUFS, drm_infobufs, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_MAP_BUFS, drm_mapbufs, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_FREE_BUFS, drm_freebufs, DRM_AUTH),
- /* The DRM_IOCTL_DMA ioctl should be defined by the driver. */
- DRM_IOCTL_DEF(DRM_IOCTL_DMA, NULL, DRM_AUTH),
-
- DRM_IOCTL_DEF(DRM_IOCTL_CONTROL, drm_control, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-
-#if __OS_HAS_AGP
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_ACQUIRE, drm_agp_acquire_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_RELEASE, drm_agp_release_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_ENABLE, drm_agp_enable_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_INFO, drm_agp_info_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_ALLOC, drm_agp_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_FREE, drm_agp_free_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_BIND, drm_agp_bind_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_AGP_UNBIND, drm_agp_unbind_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-#endif
-
- DRM_IOCTL_DEF(DRM_IOCTL_SG_ALLOC, drm_sg_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_SG_FREE, drm_sg_free, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank, 0),
-
- DRM_IOCTL_DEF(DRM_IOCTL_MODESET_CTL, drm_modeset_ctl, 0),
-
- DRM_IOCTL_DEF(DRM_IOCTL_UPDATE_DRAW, drm_update_drawable_info, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-
-#if OS_HAS_GEM
- DRM_IOCTL_DEF(DRM_IOCTL_GEM_CLOSE, drm_gem_close_ioctl, 0),
- DRM_IOCTL_DEF(DRM_IOCTL_GEM_FLINK, drm_gem_flink_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_IOCTL_GEM_OPEN, drm_gem_open_ioctl, DRM_AUTH),
-#endif
-};
-
-#define DRM_CORE_IOCTL_COUNT ARRAY_SIZE( drm_ioctls )
-
-
-/**
- * Take down the DRM device.
- *
- * \param dev DRM device structure.
- *
- * Frees every resource in \p dev.
- *
- * \sa drm_device
- */
-int drm_lastclose(struct drm_device * dev)
-{
- struct drm_magic_entry *pt, *next;
- struct drm_map_list *r_list, *list_t;
- struct drm_vma_entry *vma, *vma_temp;
- int i;
-
- DRM_DEBUG("\n");
-
- /*
- * We can't do much about this function failing.
- */
-
- if (dev->driver->lastclose)
- dev->driver->lastclose(dev);
- DRM_DEBUG("driver lastclose completed\n");
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique) + 1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
-
- if (dev->irq_enabled)
- drm_irq_uninstall(dev);
-
- /* Free drawable information memory */
- mutex_lock(&dev->struct_mutex);
-
- drm_drawable_free_all(dev);
- del_timer(&dev->timer);
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique) + 1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
-
- if (dev->magicfree.next) {
- list_for_each_entry_safe(pt, next, &dev->magicfree, head) {
- list_del(&pt->head);
- drm_ht_remove_item(&dev->magiclist, &pt->hash_item);
- drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC);
- }
- drm_ht_remove(&dev->magiclist);
- }
-
-
- /* Clear AGP information */
- if (drm_core_has_AGP(dev) && dev->agp) {
- struct drm_agp_mem *entry, *tempe;
-
- /* Remove AGP resources, but leave dev->agp
- intact until drv_cleanup is called. */
- list_for_each_entry_safe(entry, tempe, &dev->agp->memory, head) {
- if (entry->bound)
- drm_unbind_agp(entry->memory);
- drm_free_agp(entry->memory, entry->pages);
- drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
- }
- INIT_LIST_HEAD(&dev->agp->memory);
-
- if (dev->agp->acquired)
- drm_agp_release(dev);
-
- dev->agp->acquired = 0;
- dev->agp->enabled = 0;
- }
- if (drm_core_check_feature(dev, DRIVER_SG) && dev->sg) {
- drm_sg_cleanup(dev->sg);
- dev->sg = NULL;
- }
-
- /* Clear vma list (only built for debugging) */
- list_for_each_entry_safe(vma, vma_temp, &dev->vmalist, head) {
- list_del(&vma->head);
- drm_ctl_free(vma, sizeof(*vma), DRM_MEM_VMAS);
- }
-
- list_for_each_entry_safe(r_list, list_t, &dev->maplist, head) {
- if (!(r_list->map->flags & _DRM_DRIVER)) {
- drm_rmmap_locked(dev, r_list->map);
- r_list = NULL;
- }
- }
-
- if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE) && dev->queuelist) {
- for (i = 0; i < dev->queue_count; i++) {
-
- if (dev->queuelist[i]) {
- drm_free(dev->queuelist[i],
- sizeof(*dev->queuelist[0]),
- DRM_MEM_QUEUES);
- dev->queuelist[i] = NULL;
- }
- }
- drm_free(dev->queuelist,
- dev->queue_slots * sizeof(*dev->queuelist),
- DRM_MEM_QUEUES);
- dev->queuelist = NULL;
- }
- dev->queue_count = 0;
-
- if (drm_core_check_feature(dev, DRIVER_HAVE_DMA))
- drm_dma_takedown(dev);
-
- if (dev->lock.hw_lock) {
- dev->sigdata.lock = dev->lock.hw_lock = NULL; /* SHM removed */
- dev->lock.file_priv = NULL;
- wake_up_interruptible(&dev->lock.lock_queue);
- }
- mutex_unlock(&dev->struct_mutex);
-
- DRM_DEBUG("lastclose completed\n");
- return 0;
-}
-
-void drm_cleanup_pci(struct pci_dev *pdev)
-{
- struct drm_device *dev = pci_get_drvdata(pdev);
-
- pci_set_drvdata(pdev, NULL);
- pci_release_regions(pdev);
- if (dev)
- drm_cleanup(dev);
-}
-EXPORT_SYMBOL(drm_cleanup_pci);
-
-/**
- * Module initialization. Called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported).
- *
- * \return zero on success or a negative number on failure.
- *
- * Initializes an array of drm_device structures, and attempts to
- * initialize all available devices, using consecutive minors, registering the
- * stubs and initializing the AGP device.
- *
- * Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and
- * after the initialization for driver customization.
- */
-int drm_init(struct drm_driver *driver,
- struct pci_device_id *pciidlist)
-{
- struct pci_dev *pdev;
- struct pci_device_id *pid;
- int rc, i;
-
- DRM_DEBUG("\n");
-
- for (i = 0; (pciidlist[i].vendor != 0) && !drm_fb_loaded; i++) {
- pid = &pciidlist[i];
-
- pdev = NULL;
- /* pass back in pdev to account for multiple identical cards */
- while ((pdev =
- pci_get_subsys(pid->vendor, pid->device, pid->subvendor,
- pid->subdevice, pdev))) {
- /* Are there device class requirements? */
- if ((pid->class != 0)
- && ((pdev->class & pid->class_mask) != pid->class)) {
- continue;
- }
- /* is there already a driver loaded, or (short circuit saves work) */
- /* does something like VesaFB have control of the memory region? */
- if (pci_dev_driver(pdev)
- || pci_request_regions(pdev, "DRM scan")) {
- /* go into stealth mode */
- drm_fb_loaded = 1;
- pci_dev_put(pdev);
- break;
- }
- /* no fbdev or vesadev, put things back and wait for normal probe */
- pci_release_regions(pdev);
- }
- }
-
- if (!drm_fb_loaded)
- return pci_register_driver(&driver->pci_driver);
- else {
- for (i = 0; pciidlist[i].vendor != 0; i++) {
- pid = &pciidlist[i];
-
- pdev = NULL;
- /* pass back in pdev to account for multiple identical cards */
- while ((pdev =
- pci_get_subsys(pid->vendor, pid->device,
- pid->subvendor, pid->subdevice,
- pdev))) {
- /* Are there device class requirements? */
- if ((pid->class != 0)
- && ((pdev->class & pid->class_mask) != pid->class)) {
- continue;
- }
- /* stealth mode requires a manual probe */
- pci_dev_get(pdev);
- if ((rc = drm_get_dev(pdev, &pciidlist[i], driver))) {
- pci_dev_put(pdev);
- return rc;
- }
- }
- }
- DRM_INFO("Used old pci detect: framebuffer loaded\n");
- }
- return 0;
-}
-EXPORT_SYMBOL(drm_init);
-
-/**
- * Called via cleanup_module() at module unload time.
- *
- * Cleans up all DRM device, calling drm_lastclose().
- *
- * \sa drm_init
- */
-static void drm_cleanup(struct drm_device * dev)
-{
-
- DRM_DEBUG("\n");
- if (!dev) {
- DRM_ERROR("cleanup called no dev\n");
- return;
- }
-
- drm_lastclose(dev);
-
- drm_vblank_cleanup(dev);
-
- if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) && dev->agp
- && dev->agp->agp_mtrr >= 0) {
- int retval;
- retval = mtrr_del(dev->agp->agp_mtrr,
- dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size * 1024 * 1024);
- DRM_DEBUG("mtrr_del=%d\n", retval);
- }
-
- if (drm_core_has_AGP(dev) && dev->agp) {
- drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
- dev->agp = NULL;
- }
- if (dev->driver->unload)
- dev->driver->unload(dev);
-
- if (!drm_fb_loaded)
- pci_disable_device(dev->pdev);
-
- drm_ctxbitmap_cleanup(dev);
- drm_ht_remove(&dev->map_hash);
-
- drm_put_minor(dev);
- if (drm_put_dev(dev))
- DRM_ERROR("Cannot unload module\n");
-}
-
-int drm_minors_cleanup(int id, void *ptr, void *data)
-{
- struct drm_minor *minor = ptr;
- struct drm_device *dev;
- struct drm_driver *driver = data;
-
- dev = minor->dev;
- if (minor->dev->driver != driver)
- return 0;
-
- if (minor->type != DRM_MINOR_LEGACY)
- return 0;
-
- if (dev)
- pci_dev_put(dev->pdev);
- drm_cleanup(dev);
- return 1;
-}
-
-void drm_exit(struct drm_driver *driver)
-{
- DRM_DEBUG("\n");
- if (drm_fb_loaded) {
- idr_for_each(&drm_minors_idr, &drm_minors_cleanup, driver);
- } else
- pci_unregister_driver(&driver->pci_driver);
- DRM_INFO("Module unloaded\n");
-}
-EXPORT_SYMBOL(drm_exit);
-
-/** File operations structure */
-static const struct file_operations drm_stub_fops = {
- .owner = THIS_MODULE,
- .open = drm_stub_open
-};
-
-static int __init drm_core_init(void)
-{
- int ret;
- struct sysinfo si;
- unsigned long avail_memctl_mem;
- unsigned long max_memctl_mem;
-
- idr_init(&drm_minors_idr);
- si_meminfo(&si);
-
- /*
- * AGP only allows low / DMA32 memory ATM.
- */
-
- avail_memctl_mem = si.totalram - si.totalhigh;
-
- /*
- * Avoid overflows
- */
-
- max_memctl_mem = 1UL << (32 - PAGE_SHIFT);
- max_memctl_mem = (max_memctl_mem / si.mem_unit) * PAGE_SIZE;
-
- if (avail_memctl_mem >= max_memctl_mem)
- avail_memctl_mem = max_memctl_mem;
-
- drm_init_memctl(avail_memctl_mem/2, avail_memctl_mem*3/4, si.mem_unit);
-
- ret = -ENOMEM;
-
- if (register_chrdev(DRM_MAJOR, "drm", &drm_stub_fops))
- goto err_p1;
-
- drm_class = drm_sysfs_create(THIS_MODULE, "drm");
- if (IS_ERR(drm_class)) {
- printk(KERN_ERR "DRM: Error creating drm class.\n");
- ret = PTR_ERR(drm_class);
- goto err_p2;
- }
-
- drm_proc_root = proc_mkdir("dri", NULL);
- if (!drm_proc_root) {
- DRM_ERROR("Cannot create /proc/dri\n");
- ret = -1;
- goto err_p3;
- }
-
- drm_mem_init();
-
- DRM_INFO("Initialized %s %d.%d.%d %s\n",
- CORE_NAME,
- CORE_MAJOR, CORE_MINOR, CORE_PATCHLEVEL, CORE_DATE);
- return 0;
-err_p3:
- drm_sysfs_destroy();
-err_p2:
- unregister_chrdev(DRM_MAJOR, "drm");
-
- idr_destroy(&drm_minors_idr);
-err_p1:
- return ret;
-}
-
-static void __exit drm_core_exit(void)
-{
- remove_proc_entry("dri", NULL);
- drm_sysfs_destroy();
-
- unregister_chrdev(DRM_MAJOR, "drm");
-
- idr_destroy(&drm_minors_idr);
-}
-
-module_init(drm_core_init);
-module_exit(drm_core_exit);
-
-/**
- * Get version information
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_version structure.
- * \return zero on success or negative number on failure.
- *
- * Fills in the version information in \p arg.
- */
-static int drm_version(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_version *version = data;
- int len;
-
- version->version_major = dev->driver->major;
- version->version_minor = dev->driver->minor;
- version->version_patchlevel = dev->driver->patchlevel;
- DRM_COPY(version->name, dev->driver->name);
- DRM_COPY(version->date, dev->driver->date);
- DRM_COPY(version->desc, dev->driver->desc);
-
- return 0;
-}
-
-/**
- * Called whenever a process performs an ioctl on /dev/drm.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or negative number on failure.
- *
- * Looks up the ioctl function in the ::ioctls table, checking for root
- * previleges if so required, and dispatches to the respective function.
- *
- * Copies data in and out according to the size and direction given in cmd,
- * which must match the ioctl cmd known by the kernel. The kernel uses a 512
- * byte stack buffer to store the ioctl arguments in kernel space. Should we
- * ever need much larger ioctl arguments, we may need to allocate memory.
- */
-int drm_ioctl(struct inode *inode, struct file *filp,
- unsigned int cmd, unsigned long arg)
-{
- return drm_unlocked_ioctl(filp, cmd, arg);
-}
-EXPORT_SYMBOL(drm_ioctl);
-
-long drm_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
-{
- struct drm_file *file_priv = filp->private_data;
- struct drm_device *dev = file_priv->minor->dev;
- struct drm_ioctl_desc *ioctl;
- drm_ioctl_t *func;
- unsigned int nr = DRM_IOCTL_NR(cmd);
- int retcode = -EINVAL;
- char kdata[512];
-
- atomic_inc(&dev->ioctl_count);
- atomic_inc(&dev->counts[_DRM_STAT_IOCTLS]);
- ++file_priv->ioctl_count;
-
- DRM_DEBUG("pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%lx, auth=%d\n",
- current->pid, cmd, nr, (long)old_encode_dev(file_priv->minor->device),
- file_priv->authenticated);
-
- if ((nr >= DRM_CORE_IOCTL_COUNT) &&
- ((nr < DRM_COMMAND_BASE) || (nr >= DRM_COMMAND_END)))
- goto err_i1;
- if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
- && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls))
- ioctl = &dev->driver->ioctls[nr - DRM_COMMAND_BASE];
- else if ((nr >= DRM_COMMAND_END) || (nr < DRM_COMMAND_BASE)) {
- ioctl = &drm_ioctls[nr];
- cmd = ioctl->cmd;
- } else {
- retcode = -EINVAL;
- goto err_i1;
- }
-#if 0
- /*
- * This check is disabled, because driver private ioctl->cmd
- * are not the ioctl commands with size and direction bits but
- * just the indices. The DRM core ioctl->cmd are the proper ioctl
- * commands. The drivers' ioctl tables need to be fixed.
- */
- if (ioctl->cmd != cmd) {
- retcode = -EINVAL;
- goto err_i1;
- }
-#endif
-
- func = ioctl->func;
- /* is there a local override? */
- if ((nr == DRM_IOCTL_NR(DRM_IOCTL_DMA)) && dev->driver->dma_ioctl)
- func = dev->driver->dma_ioctl;
-
- if (cmd & IOC_IN) {
- if (copy_from_user(kdata, (void __user *)arg,
- _IOC_SIZE(cmd)) != 0) {
- retcode = -EACCES;
- goto err_i1;
- }
- }
-
- if (!func) {
- DRM_DEBUG("no function\n");
- retcode = -EINVAL;
- } else if (((ioctl->flags & DRM_ROOT_ONLY) && !capable(CAP_SYS_ADMIN)) ||
- ((ioctl->flags & DRM_AUTH) && !file_priv->authenticated) ||
- ((ioctl->flags & DRM_MASTER) && !file_priv->master)) {
- retcode = -EACCES;
- } else {
- retcode = func(dev, kdata, file_priv);
- }
-
- if (cmd & IOC_OUT) {
- if (copy_to_user((void __user *)arg, kdata,
- _IOC_SIZE(cmd)) != 0)
- retcode = -EACCES;
- }
-
-err_i1:
- atomic_dec(&dev->ioctl_count);
- if (retcode)
- DRM_DEBUG("ret = %d\n", retcode);
- return retcode;
-}
-EXPORT_SYMBOL(drm_unlocked_ioctl);
-
-drm_local_map_t *drm_getsarea(struct drm_device *dev)
-{
- struct drm_map_list *entry;
-
- list_for_each_entry(entry, &dev->maplist, head) {
- if (entry->map && entry->map->type == _DRM_SHM &&
- (entry->map->flags & _DRM_CONTAINS_LOCK)) {
- return entry->map;
- }
- }
- return NULL;
-}
-EXPORT_SYMBOL(drm_getsarea);
+++ /dev/null
-/**
- * \file drm_fops.c
- * File operations for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Daryll Strauss <daryll@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Mon Jan 4 08:58:31 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "drm_sarea.h"
-#include <linux/poll.h>
-
-static int drm_open_helper(struct inode *inode, struct file *filp,
- struct drm_device * dev);
-
-static int drm_setup(struct drm_device * dev)
-{
- drm_local_map_t *map;
- int i;
- int ret;
- int sareapage;
-
- if (dev->driver->firstopen) {
- ret = dev->driver->firstopen(dev);
- if (ret != 0)
- return ret;
- }
-
- dev->magicfree.next = NULL;
-
- /* prebuild the SAREA */
- sareapage = max(SAREA_MAX, PAGE_SIZE);
- i = drm_addmap(dev, 0, sareapage, _DRM_SHM, _DRM_CONTAINS_LOCK, &map);
- if (i != 0)
- return i;
-
- atomic_set(&dev->ioctl_count, 0);
- atomic_set(&dev->vma_count, 0);
- dev->buf_use = 0;
- atomic_set(&dev->buf_alloc, 0);
-
- if (drm_core_check_feature(dev, DRIVER_HAVE_DMA)) {
- i = drm_dma_setup(dev);
- if (i < 0)
- return i;
- }
-
- for (i = 0; i < ARRAY_SIZE(dev->counts); i++)
- atomic_set(&dev->counts[i], 0);
-
- drm_ht_create(&dev->magiclist, DRM_MAGIC_HASH_ORDER);
- INIT_LIST_HEAD(&dev->magicfree);
-
- dev->sigdata.lock = NULL;
- init_waitqueue_head(&dev->lock.lock_queue);
- dev->queue_count = 0;
- dev->queue_reserved = 0;
- dev->queue_slots = 0;
- dev->queuelist = NULL;
- dev->context_flag = 0;
- dev->interrupt_flag = 0;
- dev->dma_flag = 0;
- dev->last_context = 0;
- dev->last_switch = 0;
- dev->last_checked = 0;
- init_waitqueue_head(&dev->context_wait);
- dev->if_version = 0;
-
- dev->ctx_start = 0;
- dev->lck_start = 0;
-
- dev->buf_async = NULL;
- init_waitqueue_head(&dev->buf_readers);
- init_waitqueue_head(&dev->buf_writers);
-
- DRM_DEBUG("\n");
-
- /*
- * The kernel's context could be created here, but is now created
- * in drm_dma_enqueue. This is more resource-efficient for
- * hardware that does not do DMA, but may mean that
- * drm_select_queue fails between the time the interrupt is
- * initialized and the time the queues are initialized.
- */
-
- return 0;
-}
-
-/**
- * Open file.
- *
- * \param inode device inode
- * \param filp file pointer.
- * \return zero on success or a negative number on failure.
- *
- * Searches the DRM device with the same minor number, calls open_helper(), and
- * increments the device open count. If the open count was previous at zero,
- * i.e., it's the first that the device is open, then calls setup().
- */
-int drm_open(struct inode *inode, struct file *filp)
-{
- struct drm_device *dev = NULL;
- int minor_id = iminor(inode);
- struct drm_minor *minor;
- int retcode = 0;
-
- minor = idr_find(&drm_minors_idr, minor_id);
- if (!minor)
- return -ENODEV;
-
- if (!(dev = minor->dev))
- return -ENODEV;
-
- retcode = drm_open_helper(inode, filp, dev);
- if (!retcode) {
- atomic_inc(&dev->counts[_DRM_STAT_OPENS]);
- spin_lock(&dev->count_lock);
- if (!dev->open_count++) {
- spin_unlock(&dev->count_lock);
- retcode = drm_setup(dev);
- goto out;
- }
- spin_unlock(&dev->count_lock);
- }
-
-out:
- return retcode;
-}
-EXPORT_SYMBOL(drm_open);
-
-/**
- * File \c open operation.
- *
- * \param inode device inode.
- * \param filp file pointer.
- *
- * Puts the dev->fops corresponding to the device minor number into
- * \p filp, call the \c open method, and restore the file operations.
- */
-int drm_stub_open(struct inode *inode, struct file *filp)
-{
- struct drm_device *dev = NULL;
- struct drm_minor *minor;
- int minor_id = iminor(inode);
- int err = -ENODEV;
- const struct file_operations *old_fops;
-
- DRM_DEBUG("\n");
-
- minor = idr_find(&drm_minors_idr, minor_id);
- if (!minor)
- return -ENODEV;
-
- if (!(dev = minor->dev))
- return -ENODEV;
-
- old_fops = filp->f_op;
- filp->f_op = fops_get(&dev->driver->fops);
- if (filp->f_op->open && (err = filp->f_op->open(inode, filp))) {
- fops_put(filp->f_op);
- filp->f_op = fops_get(old_fops);
- }
- fops_put(old_fops);
-
- return err;
-}
-
-/**
- * Check whether DRI will run on this CPU.
- *
- * \return non-zero if the DRI will run on this CPU, or zero otherwise.
- */
-static int drm_cpu_valid(void)
-{
-#if defined(__i386__)
- if (boot_cpu_data.x86 == 3)
- return 0; /* No cmpxchg on a 386 */
-#endif
-#if defined(__sparc__) && !defined(__sparc_v9__)
- return 0; /* No cmpxchg before v9 sparc. */
-#endif
- return 1;
-}
-
-/**
- * Called whenever a process opens /dev/drm.
- *
- * \param inode device inode.
- * \param filp file pointer.
- * \param dev device.
- * \return zero on success or a negative number on failure.
- *
- * Creates and initializes a drm_file structure for the file private data in \p
- * filp and add it into the double linked list in \p dev.
- */
-static int drm_open_helper(struct inode *inode, struct file *filp,
- struct drm_device * dev)
-{
- int minor_id = iminor(inode);
- struct drm_file *priv;
- int ret;
- int i, j;
-
- if (filp->f_flags & O_EXCL)
- return -EBUSY; /* No exclusive opens */
- if (!drm_cpu_valid())
- return -EINVAL;
-
- DRM_DEBUG("pid = %d, minor = %d\n", current->pid, minor_id);
-
- priv = drm_alloc(sizeof(*priv), DRM_MEM_FILES);
- if (!priv)
- return -ENOMEM;
-
- memset(priv, 0, sizeof(*priv));
- filp->private_data = priv;
- priv->filp = filp;
- priv->uid = current_euid();
- priv->pid = current->pid;
- priv->minor = idr_find(&drm_minors_idr, minor_id);
- priv->ioctl_count = 0;
- /* for compatibility root is always authenticated */
- priv->authenticated = capable(CAP_SYS_ADMIN);
- priv->lock_count = 0;
-
- INIT_LIST_HEAD(&priv->lhead);
- INIT_LIST_HEAD(&priv->refd_objects);
-
- for (i = 0; i < _DRM_NO_REF_TYPES; ++i) {
- ret = drm_ht_create(&priv->refd_object_hash[i],
- DRM_FILE_HASH_ORDER);
- if (ret)
- break;
- }
-
- if (ret) {
- for (j = 0; j < i; ++j)
- drm_ht_remove(&priv->refd_object_hash[j]);
- goto out_free;
- }
-
- if (dev->driver->driver_features & DRIVER_GEM)
- drm_gem_open(dev, priv);
-
- if (dev->driver->open) {
- ret = dev->driver->open(dev, priv);
- if (ret < 0)
- goto out_free;
- }
-
- mutex_lock(&dev->struct_mutex);
- if (list_empty(&dev->filelist))
- priv->master = 1;
-
- list_add(&priv->lhead, &dev->filelist);
- mutex_unlock(&dev->struct_mutex);
-
-#ifdef __alpha__
- /*
- * Default the hose
- */
- if (!dev->hose) {
- struct pci_dev *pci_dev;
- pci_dev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, NULL);
- if (pci_dev) {
- dev->hose = pci_dev->sysdata;
- pci_dev_put(pci_dev);
- }
- if (!dev->hose) {
- struct pci_bus *b = pci_bus_b(pci_root_buses.next);
- if (b)
- dev->hose = b->sysdata;
- }
- }
-#endif
-
- return 0;
- out_free:
- drm_free(priv, sizeof(*priv), DRM_MEM_FILES);
- filp->private_data = NULL;
- return ret;
-}
-
-/** No-op. */
-int drm_fasync(int fd, struct file *filp, int on)
-{
- struct drm_file *priv = filp->private_data;
- struct drm_device *dev = priv->minor->dev;
- int retcode;
-
- DRM_DEBUG("fd = %d, device = 0x%lx\n", fd,
- (long)old_encode_dev(priv->minor->device));
- retcode = fasync_helper(fd, filp, on, &dev->buf_async);
- if (retcode < 0)
- return retcode;
- return 0;
-}
-EXPORT_SYMBOL(drm_fasync);
-
-/**
- * Release file.
- *
- * \param inode device inode
- * \param file_priv DRM file private.
- * \return zero on success or a negative number on failure.
- *
- * If the hardware lock is held then free it, and take it again for the kernel
- * context since it's necessary to reclaim buffers. Unlink the file private
- * data from its list and free it. Decreases the open count and if it reaches
- * zero calls drm_lastclose().
- */
-int drm_release(struct inode *inode, struct file *filp)
-{
- struct drm_file *file_priv = filp->private_data;
- struct drm_device *dev = file_priv->minor->dev;
- int retcode = 0;
-
- lock_kernel();
-
- DRM_DEBUG("open_count = %d\n", dev->open_count);
-
- if (dev->driver->preclose)
- dev->driver->preclose(dev, file_priv);
-
- /* ========================================================
- * Begin inline drm_release
- */
-
- DRM_DEBUG("pid = %d, device = 0x%lx, open_count = %d\n",
- current->pid, (long)old_encode_dev(file_priv->minor->device),
- dev->open_count);
-
- if (dev->driver->reclaim_buffers_locked && dev->lock.hw_lock) {
- if (drm_i_have_hw_lock(dev, file_priv)) {
- dev->driver->reclaim_buffers_locked(dev, file_priv);
- } else {
- unsigned long _end=jiffies + 3*DRM_HZ;
- int locked = 0;
-
- drm_idlelock_take(&dev->lock);
-
- /*
- * Wait for a while.
- */
-
- do{
- spin_lock_bh(&dev->lock.spinlock);
- locked = dev->lock.idle_has_lock;
- spin_unlock_bh(&dev->lock.spinlock);
- if (locked)
- break;
- schedule();
- } while (!time_after_eq(jiffies, _end));
-
- if (!locked) {
- DRM_ERROR("reclaim_buffers_locked() deadlock. Please rework this\n"
- "\tdriver to use reclaim_buffers_idlelocked() instead.\n"
- "\tI will go on reclaiming the buffers anyway.\n");
- }
-
- dev->driver->reclaim_buffers_locked(dev, file_priv);
- drm_idlelock_release(&dev->lock);
- }
- }
-
- if (dev->driver->reclaim_buffers_idlelocked && dev->lock.hw_lock) {
-
- drm_idlelock_take(&dev->lock);
- dev->driver->reclaim_buffers_idlelocked(dev, file_priv);
- drm_idlelock_release(&dev->lock);
-
- }
-
- if (drm_i_have_hw_lock(dev, file_priv)) {
- DRM_DEBUG("File %p released, freeing lock for context %d\n",
- filp, _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
-
- drm_lock_free(&dev->lock,
- _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
- }
-
-
- if (drm_core_check_feature(dev, DRIVER_HAVE_DMA) &&
- !dev->driver->reclaim_buffers_locked) {
- dev->driver->reclaim_buffers(dev, file_priv);
- }
-
- if (dev->driver->driver_features & DRIVER_GEM)
- drm_gem_release(dev, file_priv);
-
- drm_fasync(-1, filp, 0);
-
- mutex_lock(&dev->ctxlist_mutex);
-
- if (!list_empty(&dev->ctxlist)) {
- struct drm_ctx_list *pos, *n;
-
- list_for_each_entry_safe(pos, n, &dev->ctxlist, head) {
- if (pos->tag == file_priv &&
- pos->handle != DRM_KERNEL_CONTEXT) {
- if (dev->driver->context_dtor)
- dev->driver->context_dtor(dev,
- pos->handle);
-
- drm_ctxbitmap_free(dev, pos->handle);
-
- list_del(&pos->head);
- drm_free(pos, sizeof(*pos), DRM_MEM_CTXLIST);
- --dev->ctx_count;
- }
- }
- }
- mutex_unlock(&dev->ctxlist_mutex);
-
- mutex_lock(&dev->struct_mutex);
- if (file_priv->remove_auth_on_close == 1) {
- struct drm_file *temp;
-
- list_for_each_entry(temp, &dev->filelist, lhead)
- temp->authenticated = 0;
- }
- list_del(&file_priv->lhead);
- mutex_unlock(&dev->struct_mutex);
-
- if (dev->driver->postclose)
- dev->driver->postclose(dev, file_priv);
- drm_free(file_priv, sizeof(*file_priv), DRM_MEM_FILES);
-
- /* ========================================================
- * End inline drm_release
- */
-
- atomic_inc(&dev->counts[_DRM_STAT_CLOSES]);
- spin_lock(&dev->count_lock);
- if (!--dev->open_count) {
- if (atomic_read(&dev->ioctl_count) || dev->blocked) {
- DRM_ERROR("Device busy: %d %d\n",
- atomic_read(&dev->ioctl_count), dev->blocked);
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return -EBUSY;
- }
- spin_unlock(&dev->count_lock);
- unlock_kernel();
- return drm_lastclose(dev);
- }
- spin_unlock(&dev->count_lock);
-
- unlock_kernel();
-
- return retcode;
-}
-EXPORT_SYMBOL(drm_release);
-
-/** No-op. */
-/* This is to deal with older X servers that believe 0 means data is
- * available which is not the correct return for a poll function.
- * This cannot be fixed until the Xserver is fixed. Xserver will need
- * to set a newer interface version to avoid breaking older Xservers.
- * Without fixing the Xserver you get: "WaitForSomething(): select: errno=22"
- * http://freedesktop.org/bugzilla/show_bug.cgi?id=1505 if you try
- * to return the correct response.
- */
-unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait)
-{
- /* return (POLLIN | POLLOUT | POLLRDNORM | POLLWRNORM); */
- return 0;
-}
-EXPORT_SYMBOL(drm_poll);
+++ /dev/null
-/*
- * Copyright © 2008 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <eric@anholt.net>
- *
- */
-
-#include <linux/version.h>
-
-#include "drmP.h"
-
-#if OS_HAS_GEM
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/mm.h>
-#include <linux/uaccess.h>
-#include <linux/fs.h>
-#include <linux/file.h>
-#include <linux/module.h>
-#include <linux/mman.h>
-#include <linux/pagemap.h>
-
-/** @file drm_gem.c
- *
- * This file provides some of the base ioctls and library routines for
- * the graphics memory manager implemented by each device driver.
- *
- * Because various devices have different requirements in terms of
- * synchronization and migration strategies, implementing that is left up to
- * the driver, and all that the general API provides should be generic --
- * allocating objects, reading/writing data with the cpu, freeing objects.
- * Even there, platform-dependent optimizations for reading/writing data with
- * the CPU mean we'll likely hook those out to driver-specific calls. However,
- * the DRI2 implementation wants to have at least allocate/mmap be generic.
- *
- * The goal was to have swap-backed object allocation managed through
- * struct file. However, file descriptors as handles to a struct file have
- * two major failings:
- * - Process limits prevent more than 1024 or so being used at a time by
- * default.
- * - Inability to allocate high fds will aggravate the X Server's select()
- * handling, and likely that of many GL client applications as well.
- *
- * This led to a plan of using our own integer IDs (called handles, following
- * DRM terminology) to mimic fds, and implement the fd syscalls we need as
- * ioctls. The objects themselves will still include the struct file so
- * that we can transition to fds if the required kernel infrastructure shows
- * up at a later date, and as our interface with shmfs for memory allocation.
- */
-
-/**
- * Initialize the GEM device fields
- */
-
-int
-drm_gem_init(struct drm_device *dev)
-{
- spin_lock_init(&dev->object_name_lock);
- idr_init(&dev->object_name_idr);
- atomic_set(&dev->object_count, 0);
- atomic_set(&dev->object_memory, 0);
- atomic_set(&dev->pin_count, 0);
- atomic_set(&dev->pin_memory, 0);
- atomic_set(&dev->gtt_count, 0);
- atomic_set(&dev->gtt_memory, 0);
- return 0;
-}
-
-/**
- * Allocate a GEM object of the specified size with shmfs backing store
- */
-struct drm_gem_object *
-drm_gem_object_alloc(struct drm_device *dev, size_t size)
-{
- struct drm_gem_object *obj;
-
- BUG_ON((size & (PAGE_SIZE - 1)) != 0);
-
- obj = kcalloc(1, sizeof(*obj), GFP_KERNEL);
-
- obj->dev = dev;
- obj->filp = shmem_file_setup("drm mm object", size, 0);
- if (IS_ERR(obj->filp)) {
- kfree(obj);
- return NULL;
- }
-
- kref_init(&obj->refcount);
- kref_init(&obj->handlecount);
- obj->size = size;
- if (dev->driver->gem_init_object != NULL &&
- dev->driver->gem_init_object(obj) != 0) {
- fput(obj->filp);
- kfree(obj);
- return NULL;
- }
- atomic_inc(&dev->object_count);
- atomic_add(obj->size, &dev->object_memory);
- return obj;
-}
-EXPORT_SYMBOL(drm_gem_object_alloc);
-
-/**
- * Removes the mapping from handle to filp for this object.
- */
-static int
-drm_gem_handle_delete(struct drm_file *filp, int handle)
-{
- struct drm_device *dev;
- struct drm_gem_object *obj;
-
- /* This is gross. The idr system doesn't let us try a delete and
- * return an error code. It just spews if you fail at deleting.
- * So, we have to grab a lock around finding the object and then
- * doing the delete on it and dropping the refcount, or the user
- * could race us to double-decrement the refcount and cause a
- * use-after-free later. Given the frequency of our handle lookups,
- * we may want to use ida for number allocation and a hash table
- * for the pointers, anyway.
- */
- spin_lock(&filp->table_lock);
-
- /* Check if we currently have a reference on the object */
- obj = idr_find(&filp->object_idr, handle);
- if (obj == NULL) {
- spin_unlock(&filp->table_lock);
- return -EINVAL;
- }
- dev = obj->dev;
-
- /* Release reference and decrement refcount. */
- idr_remove(&filp->object_idr, handle);
- spin_unlock(&filp->table_lock);
-
- mutex_lock(&dev->struct_mutex);
- drm_gem_object_handle_unreference(obj);
- mutex_unlock(&dev->struct_mutex);
-
- return 0;
-}
-
-/**
- * Create a handle for this object. This adds a handle reference
- * to the object, which includes a regular reference count. Callers
- * will likely want to dereference the object afterwards.
- */
-int
-drm_gem_handle_create(struct drm_file *file_priv,
- struct drm_gem_object *obj,
- int *handlep)
-{
- int ret;
-
- /*
- * Get the user-visible handle using idr.
- */
-again:
- /* ensure there is space available to allocate a handle */
- if (idr_pre_get(&file_priv->object_idr, GFP_KERNEL) == 0)
- return -ENOMEM;
-
- /* do the allocation under our spinlock */
- spin_lock(&file_priv->table_lock);
- ret = idr_get_new_above(&file_priv->object_idr, obj, 1, handlep);
- spin_unlock(&file_priv->table_lock);
- if (ret == -EAGAIN)
- goto again;
-
- if (ret != 0)
- return ret;
-
- drm_gem_object_handle_reference(obj);
- return 0;
-}
-EXPORT_SYMBOL(drm_gem_handle_create);
-
-/** Returns a reference to the object named by the handle. */
-struct drm_gem_object *
-drm_gem_object_lookup(struct drm_device *dev, struct drm_file *filp,
- int handle)
-{
- struct drm_gem_object *obj;
-
- spin_lock(&filp->table_lock);
-
- /* Check if we currently have a reference on the object */
- obj = idr_find(&filp->object_idr, handle);
- if (obj == NULL) {
- spin_unlock(&filp->table_lock);
- return NULL;
- }
-
- drm_gem_object_reference(obj);
-
- spin_unlock(&filp->table_lock);
-
- return obj;
-}
-EXPORT_SYMBOL(drm_gem_object_lookup);
-
-/**
- * Releases the handle to an mm object.
- */
-int
-drm_gem_close_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_gem_close *args = data;
- int ret;
-
- if (!(dev->driver->driver_features & DRIVER_GEM))
- return -ENODEV;
-
- ret = drm_gem_handle_delete(file_priv, args->handle);
-
- return ret;
-}
-
-/**
- * Create a global name for an object, returning the name.
- *
- * Note that the name does not hold a reference; when the object
- * is freed, the name goes away.
- */
-int
-drm_gem_flink_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_gem_flink *args = data;
- struct drm_gem_object *obj;
- int ret;
-
- if (!(dev->driver->driver_features & DRIVER_GEM))
- return -ENODEV;
-
- obj = drm_gem_object_lookup(dev, file_priv, args->handle);
- if (obj == NULL)
- return -EINVAL;
-
-again:
- if (idr_pre_get(&dev->object_name_idr, GFP_KERNEL) == 0)
- return -ENOMEM;
-
- spin_lock(&dev->object_name_lock);
- if (obj->name) {
- spin_unlock(&dev->object_name_lock);
- return -EEXIST;
- }
- ret = idr_get_new_above(&dev->object_name_idr, obj, 1,
- &obj->name);
- spin_unlock(&dev->object_name_lock);
- if (ret == -EAGAIN)
- goto again;
-
- if (ret != 0) {
- mutex_lock(&dev->struct_mutex);
- drm_gem_object_unreference(obj);
- mutex_unlock(&dev->struct_mutex);
- return ret;
- }
-
- /*
- * Leave the reference from the lookup around as the
- * name table now holds one
- */
- args->name = (uint64_t) obj->name;
-
- return 0;
-}
-
-/**
- * Open an object using the global name, returning a handle and the size.
- *
- * This handle (of course) holds a reference to the object, so the object
- * will not go away until the handle is deleted.
- */
-int
-drm_gem_open_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_gem_open *args = data;
- struct drm_gem_object *obj;
- int ret;
- int handle;
-
- if (!(dev->driver->driver_features & DRIVER_GEM))
- return -ENODEV;
-
- spin_lock(&dev->object_name_lock);
- obj = idr_find(&dev->object_name_idr, (int) args->name);
- if (obj)
- drm_gem_object_reference(obj);
- spin_unlock(&dev->object_name_lock);
- if (!obj)
- return -ENOENT;
-
- ret = drm_gem_handle_create(file_priv, obj, &handle);
- mutex_lock(&dev->struct_mutex);
- drm_gem_object_unreference(obj);
- mutex_unlock(&dev->struct_mutex);
- if (ret)
- return ret;
-
- args->handle = handle;
- args->size = obj->size;
-
- return 0;
-}
-
-/**
- * Called at device open time, sets up the structure for handling refcounting
- * of mm objects.
- */
-void
-drm_gem_open(struct drm_device *dev, struct drm_file *file_private)
-{
- idr_init(&file_private->object_idr);
- spin_lock_init(&file_private->table_lock);
-}
-
-/**
- * Called at device close to release the file's
- * handle references on objects.
- */
-static int
-drm_gem_object_release_handle(int id, void *ptr, void *data)
-{
- struct drm_gem_object *obj = ptr;
-
- drm_gem_object_handle_unreference(obj);
-
- return 0;
-}
-
-/**
- * Called at close time when the filp is going away.
- *
- * Releases any remaining references on objects by this filp.
- */
-void
-drm_gem_release(struct drm_device *dev, struct drm_file *file_private)
-{
- mutex_lock(&dev->struct_mutex);
- idr_for_each(&file_private->object_idr,
- &drm_gem_object_release_handle, NULL);
-
- idr_destroy(&file_private->object_idr);
- mutex_unlock(&dev->struct_mutex);
-}
-
-/**
- * Called after the last reference to the object has been lost.
- *
- * Frees the object
- */
-void
-drm_gem_object_free(struct kref *kref)
-{
- struct drm_gem_object *obj = (struct drm_gem_object *) kref;
- struct drm_device *dev = obj->dev;
-
- BUG_ON(!mutex_is_locked(&dev->struct_mutex));
-
- if (dev->driver->gem_free_object != NULL)
- dev->driver->gem_free_object(obj);
-
- fput(obj->filp);
- atomic_dec(&dev->object_count);
- atomic_sub(obj->size, &dev->object_memory);
- kfree(obj);
-}
-EXPORT_SYMBOL(drm_gem_object_free);
-
-/**
- * Called after the last handle to the object has been closed
- *
- * Removes any name for the object. Note that this must be
- * called before drm_gem_object_free or we'll be touching
- * freed memory
- */
-void
-drm_gem_object_handle_free(struct kref *kref)
-{
- struct drm_gem_object *obj = container_of(kref,
- struct drm_gem_object,
- handlecount);
- struct drm_device *dev = obj->dev;
-
- /* Remove any name for this object */
- spin_lock(&dev->object_name_lock);
- if (obj->name) {
- idr_remove(&dev->object_name_idr, obj->name);
- spin_unlock(&dev->object_name_lock);
- /*
- * The object name held a reference to this object, drop
- * that now.
- */
- drm_gem_object_unreference(obj);
- } else
- spin_unlock(&dev->object_name_lock);
-
-}
-EXPORT_SYMBOL(drm_gem_object_handle_free);
-
-#else
-
-int drm_gem_init(struct drm_device *dev)
-{
- return 0;
-}
-
-void drm_gem_open(struct drm_device *dev, struct drm_file *file_private)
-{
-
-}
-
-void
-drm_gem_release(struct drm_device *dev, struct drm_file *file_private)
-{
-
-}
-
-#endif
+++ /dev/null
-/**************************************************************************
- *
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND. USA.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- *
- **************************************************************************/
-/*
- * Simple open hash tab implementation.
- *
- * Authors:
- * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#include "drmP.h"
-#include "drm_hashtab.h"
-#include <linux/hash.h>
-
-int drm_ht_create(struct drm_open_hash *ht, unsigned int order)
-{
- unsigned int i;
-
- ht->size = 1 << order;
- ht->order = order;
- ht->fill = 0;
- ht->table = NULL;
- ht->use_vmalloc = ((ht->size * sizeof(*ht->table)) > PAGE_SIZE);
- if (!ht->use_vmalloc) {
- ht->table = drm_calloc(ht->size, sizeof(*ht->table),
- DRM_MEM_HASHTAB);
- }
- if (!ht->table) {
- ht->use_vmalloc = 1;
- ht->table = vmalloc(ht->size * sizeof(*ht->table));
- }
- if (!ht->table) {
- DRM_ERROR("Out of memory for hash table\n");
- return -ENOMEM;
- }
- for (i = 0; i < ht->size; ++i) {
- INIT_HLIST_HEAD(&ht->table[i]);
- }
- return 0;
-}
-
-void drm_ht_verbose_list(struct drm_open_hash *ht, unsigned long key)
-{
- struct drm_hash_item *entry;
- struct hlist_head *h_list;
- struct hlist_node *list;
- unsigned int hashed_key;
- int count = 0;
-
- hashed_key = hash_long(key, ht->order);
- DRM_DEBUG("Key is 0x%08lx, Hashed key is 0x%08x\n", key, hashed_key);
- h_list = &ht->table[hashed_key];
- hlist_for_each(list, h_list) {
- entry = hlist_entry(list, struct drm_hash_item, head);
- DRM_DEBUG("count %d, key: 0x%08lx\n", count++, entry->key);
- }
-}
-
-static struct hlist_node *drm_ht_find_key(struct drm_open_hash *ht,
- unsigned long key)
-{
- struct drm_hash_item *entry;
- struct hlist_head *h_list;
- struct hlist_node *list;
- unsigned int hashed_key;
-
- hashed_key = hash_long(key, ht->order);
- h_list = &ht->table[hashed_key];
- hlist_for_each(list, h_list) {
- entry = hlist_entry(list, struct drm_hash_item, head);
- if (entry->key == key)
- return list;
- if (entry->key > key)
- break;
- }
- return NULL;
-}
-
-int drm_ht_insert_item(struct drm_open_hash *ht, struct drm_hash_item *item)
-{
- struct drm_hash_item *entry;
- struct hlist_head *h_list;
- struct hlist_node *list, *parent;
- unsigned int hashed_key;
- unsigned long key = item->key;
-
- hashed_key = hash_long(key, ht->order);
- h_list = &ht->table[hashed_key];
- parent = NULL;
- hlist_for_each(list, h_list) {
- entry = hlist_entry(list, struct drm_hash_item, head);
- if (entry->key == key)
- return -EINVAL;
- if (entry->key > key)
- break;
- parent = list;
- }
- if (parent) {
- hlist_add_after(parent, &item->head);
- } else {
- hlist_add_head(&item->head, h_list);
- }
- return 0;
-}
-
-/*
- * Just insert an item and return any "bits" bit key that hasn't been
- * used before.
- */
-int drm_ht_just_insert_please(struct drm_open_hash *ht,
- struct drm_hash_item *item,
- unsigned long seed, int bits, int shift,
- unsigned long add)
-{
- int ret;
- unsigned long mask = (1 << bits) - 1;
- unsigned long first, unshifted_key;
-
- unshifted_key = hash_long(seed, bits);
- first = unshifted_key;
- do {
- item->key = (unshifted_key << shift) + add;
- ret = drm_ht_insert_item(ht, item);
- if (ret)
- unshifted_key = (unshifted_key + 1) & mask;
- } while (ret && (unshifted_key != first));
-
- if (ret) {
- DRM_ERROR("Available key bit space exhausted\n");
- return -EINVAL;
- }
- return 0;
-}
-
-int drm_ht_find_item(struct drm_open_hash *ht, unsigned long key,
- struct drm_hash_item **item)
-{
- struct hlist_node *list;
-
- list = drm_ht_find_key(ht, key);
- if (!list)
- return -EINVAL;
-
- *item = hlist_entry(list, struct drm_hash_item, head);
- return 0;
-}
-
-int drm_ht_remove_key(struct drm_open_hash *ht, unsigned long key)
-{
- struct hlist_node *list;
-
- list = drm_ht_find_key(ht, key);
- if (list) {
- hlist_del_init(list);
- ht->fill--;
- return 0;
- }
- return -EINVAL;
-}
-
-int drm_ht_remove_item(struct drm_open_hash *ht, struct drm_hash_item *item)
-{
- hlist_del_init(&item->head);
- ht->fill--;
- return 0;
-}
-
-void drm_ht_remove(struct drm_open_hash *ht)
-{
- if (ht->table) {
- if (ht->use_vmalloc)
- vfree(ht->table);
- else
- drm_free(ht->table, ht->size * sizeof(*ht->table),
- DRM_MEM_HASHTAB);
- ht->table = NULL;
- }
-}
+++ /dev/null
-/**************************************************************************
- *
- * Copyright 2006 Tungsten Graphics, Inc., Bismack, ND. USA.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- *
- **************************************************************************/
-/*
- * Simple open hash tab implementation.
- *
- * Authors:
- * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#ifndef DRM_HASHTAB_H
-#define DRM_HASHTAB_H
-
-#define drm_hash_entry(_ptr, _type, _member) container_of(_ptr, _type, _member)
-
-struct drm_hash_item {
- struct hlist_node head;
- unsigned long key;
-};
-
-struct drm_open_hash {
- unsigned int size;
- unsigned int order;
- unsigned int fill;
- struct hlist_head *table;
- int use_vmalloc;
-};
-
-
-extern int drm_ht_create(struct drm_open_hash *ht, unsigned int order);
-extern int drm_ht_insert_item(struct drm_open_hash *ht, struct drm_hash_item *item);
-extern int drm_ht_just_insert_please(struct drm_open_hash *ht, struct drm_hash_item *item,
- unsigned long seed, int bits, int shift,
- unsigned long add);
-extern int drm_ht_find_item(struct drm_open_hash *ht, unsigned long key, struct drm_hash_item **item);
-
-extern void drm_ht_verbose_list(struct drm_open_hash *ht, unsigned long key);
-extern int drm_ht_remove_key(struct drm_open_hash *ht, unsigned long key);
-extern int drm_ht_remove_item(struct drm_open_hash *ht, struct drm_hash_item *item);
-extern void drm_ht_remove(struct drm_open_hash *ht);
-
-
-#endif
+++ /dev/null
-../shared-core/drm_internal.h
\ No newline at end of file
+++ /dev/null
-/**
- * \file drm_ioc32.c
- *
- * 32-bit ioctl compatibility routines for the DRM.
- *
- * \author Paul Mackerras <paulus@samba.org>
- *
- * Copyright (C) Paul Mackerras 2005.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-#include <linux/compat.h>
-
-#include "drmP.h"
-#include "drm_core.h"
-
-#define DRM_IOCTL_VERSION32 DRM_IOWR(0x00, drm_version32_t)
-#define DRM_IOCTL_GET_UNIQUE32 DRM_IOWR(0x01, drm_unique32_t)
-#define DRM_IOCTL_GET_MAP32 DRM_IOWR(0x04, drm_map32_t)
-#define DRM_IOCTL_GET_CLIENT32 DRM_IOWR(0x05, drm_client32_t)
-#define DRM_IOCTL_GET_STATS32 DRM_IOR( 0x06, drm_stats32_t)
-
-#define DRM_IOCTL_SET_UNIQUE32 DRM_IOW( 0x10, drm_unique32_t)
-#define DRM_IOCTL_ADD_MAP32 DRM_IOWR(0x15, drm_map32_t)
-#define DRM_IOCTL_ADD_BUFS32 DRM_IOWR(0x16, drm_buf_desc32_t)
-#define DRM_IOCTL_MARK_BUFS32 DRM_IOW( 0x17, drm_buf_desc32_t)
-#define DRM_IOCTL_INFO_BUFS32 DRM_IOWR(0x18, drm_buf_info32_t)
-#define DRM_IOCTL_MAP_BUFS32 DRM_IOWR(0x19, drm_buf_map32_t)
-#define DRM_IOCTL_FREE_BUFS32 DRM_IOW( 0x1a, drm_buf_free32_t)
-
-#define DRM_IOCTL_RM_MAP32 DRM_IOW( 0x1b, drm_map32_t)
-
-#define DRM_IOCTL_SET_SAREA_CTX32 DRM_IOW( 0x1c, drm_ctx_priv_map32_t)
-#define DRM_IOCTL_GET_SAREA_CTX32 DRM_IOWR(0x1d, drm_ctx_priv_map32_t)
-
-#define DRM_IOCTL_RES_CTX32 DRM_IOWR(0x26, drm_ctx_res32_t)
-#define DRM_IOCTL_DMA32 DRM_IOWR(0x29, drm_dma32_t)
-
-#define DRM_IOCTL_AGP_ENABLE32 DRM_IOW( 0x32, drm_agp_mode32_t)
-#define DRM_IOCTL_AGP_INFO32 DRM_IOR( 0x33, drm_agp_info32_t)
-#define DRM_IOCTL_AGP_ALLOC32 DRM_IOWR(0x34, drm_agp_buffer32_t)
-#define DRM_IOCTL_AGP_FREE32 DRM_IOW( 0x35, drm_agp_buffer32_t)
-#define DRM_IOCTL_AGP_BIND32 DRM_IOW( 0x36, drm_agp_binding32_t)
-#define DRM_IOCTL_AGP_UNBIND32 DRM_IOW( 0x37, drm_agp_binding32_t)
-
-#define DRM_IOCTL_SG_ALLOC32 DRM_IOW( 0x38, drm_scatter_gather32_t)
-#define DRM_IOCTL_SG_FREE32 DRM_IOW( 0x39, drm_scatter_gather32_t)
-
-#define DRM_IOCTL_WAIT_VBLANK32 DRM_IOWR(0x3a, drm_wait_vblank32_t)
-
-typedef struct drm_version_32 {
- int version_major; /**< Major version */
- int version_minor; /**< Minor version */
- int version_patchlevel; /**< Patch level */
- u32 name_len; /**< Length of name buffer */
- u32 name; /**< Name of driver */
- u32 date_len; /**< Length of date buffer */
- u32 date; /**< User-space buffer to hold date */
- u32 desc_len; /**< Length of desc buffer */
- u32 desc; /**< User-space buffer to hold desc */
-} drm_version32_t;
-
-static int compat_drm_version(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_version32_t v32;
- struct drm_version __user *version;
- int err;
-
- if (copy_from_user(&v32, (void __user *)arg, sizeof(v32)))
- return -EFAULT;
-
- version = compat_alloc_user_space(sizeof(*version));
- if (!access_ok(VERIFY_WRITE, version, sizeof(*version)))
- return -EFAULT;
- if (__put_user(v32.name_len, &version->name_len)
- || __put_user((void __user *)(unsigned long)v32.name,
- &version->name)
- || __put_user(v32.date_len, &version->date_len)
- || __put_user((void __user *)(unsigned long)v32.date,
- &version->date)
- || __put_user(v32.desc_len, &version->desc_len)
- || __put_user((void __user *)(unsigned long)v32.desc,
- &version->desc))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_VERSION, (unsigned long)version);
- if (err)
- return err;
-
- if (__get_user(v32.version_major, &version->version_major)
- || __get_user(v32.version_minor, &version->version_minor)
- || __get_user(v32.version_patchlevel, &version->version_patchlevel)
- || __get_user(v32.name_len, &version->name_len)
- || __get_user(v32.date_len, &version->date_len)
- || __get_user(v32.desc_len, &version->desc_len))
- return -EFAULT;
-
- if (copy_to_user((void __user *)arg, &v32, sizeof(v32)))
- return -EFAULT;
- return 0;
-}
-
-typedef struct drm_unique32 {
- u32 unique_len; /**< Length of unique */
- u32 unique; /**< Unique name for driver instantiation */
-} drm_unique32_t;
-
-static int compat_drm_getunique(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_unique32_t uq32;
- struct drm_unique __user *u;
- int err;
-
- if (copy_from_user(&uq32, (void __user *)arg, sizeof(uq32)))
- return -EFAULT;
-
- u = compat_alloc_user_space(sizeof(*u));
- if (!access_ok(VERIFY_WRITE, u, sizeof(*u)))
- return -EFAULT;
- if (__put_user(uq32.unique_len, &u->unique_len)
- || __put_user((void __user *)(unsigned long)uq32.unique,
- &u->unique))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_GET_UNIQUE, (unsigned long)u);
- if (err)
- return err;
-
- if (__get_user(uq32.unique_len, &u->unique_len))
- return -EFAULT;
- if (copy_to_user((void __user *)arg, &uq32, sizeof(uq32)))
- return -EFAULT;
- return 0;
-}
-
-static int compat_drm_setunique(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_unique32_t uq32;
- struct drm_unique __user *u;
-
- if (copy_from_user(&uq32, (void __user *)arg, sizeof(uq32)))
- return -EFAULT;
-
- u = compat_alloc_user_space(sizeof(*u));
- if (!access_ok(VERIFY_WRITE, u, sizeof(*u)))
- return -EFAULT;
- if (__put_user(uq32.unique_len, &u->unique_len)
- || __put_user((void __user *)(unsigned long)uq32.unique,
- &u->unique))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_SET_UNIQUE, (unsigned long)u);
-}
-
-typedef struct drm_map32 {
- u32 offset; /**< Requested physical address (0 for SAREA)*/
- u32 size; /**< Requested physical size (bytes) */
- enum drm_map_type type; /**< Type of memory to map */
- enum drm_map_flags flags; /**< Flags */
- u32 handle; /**< User-space: "Handle" to pass to mmap() */
- int mtrr; /**< MTRR slot used */
-} drm_map32_t;
-
-static int compat_drm_getmap(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_map32_t __user *argp = (void __user *)arg;
- drm_map32_t m32;
- struct drm_map __user *map;
- int idx, err;
- void *handle;
-
- if (get_user(idx, &argp->offset))
- return -EFAULT;
-
- map = compat_alloc_user_space(sizeof(*map));
- if (!access_ok(VERIFY_WRITE, map, sizeof(*map)))
- return -EFAULT;
- if (__put_user(idx, &map->offset))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_GET_MAP, (unsigned long)map);
- if (err)
- return err;
-
- if (__get_user(m32.offset, &map->offset)
- || __get_user(m32.size, &map->size)
- || __get_user(m32.type, &map->type)
- || __get_user(m32.flags, &map->flags)
- || __get_user(handle, &map->handle)
- || __get_user(m32.mtrr, &map->mtrr))
- return -EFAULT;
-
- m32.handle = (unsigned long)handle;
- if (copy_to_user(argp, &m32, sizeof(m32)))
- return -EFAULT;
- return 0;
-
-}
-
-static int compat_drm_addmap(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_map32_t __user *argp = (void __user *)arg;
- drm_map32_t m32;
- struct drm_map __user *map;
- int err;
- void *handle;
-
- if (copy_from_user(&m32, argp, sizeof(m32)))
- return -EFAULT;
-
- map = compat_alloc_user_space(sizeof(*map));
- if (!access_ok(VERIFY_WRITE, map, sizeof(*map)))
- return -EFAULT;
- if (__put_user(m32.offset, &map->offset)
- || __put_user(m32.size, &map->size)
- || __put_user(m32.type, &map->type)
- || __put_user(m32.flags, &map->flags))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_ADD_MAP, (unsigned long)map);
- if (err)
- return err;
-
- if (__get_user(m32.offset, &map->offset)
- || __get_user(m32.mtrr, &map->mtrr)
- || __get_user(handle, &map->handle))
- return -EFAULT;
-
- m32.handle = (unsigned long)handle;
- if (m32.handle != (unsigned long)handle && printk_ratelimit())
- printk(KERN_ERR "compat_drm_addmap truncated handle"
- " %p for type %d offset %x\n",
- handle, m32.type, m32.offset);
-
- if (copy_to_user(argp, &m32, sizeof(m32)))
- return -EFAULT;
-
- return 0;
-}
-
-static int compat_drm_rmmap(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_map32_t __user *argp = (void __user *)arg;
- struct drm_map __user *map;
- u32 handle;
-
- if (get_user(handle, &argp->handle))
- return -EFAULT;
-
- map = compat_alloc_user_space(sizeof(*map));
- if (!access_ok(VERIFY_WRITE, map, sizeof(*map)))
- return -EFAULT;
- if (__put_user((void *)(unsigned long)handle, &map->handle))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RM_MAP, (unsigned long)map);
-}
-
-typedef struct drm_client32 {
- int idx; /**< Which client desired? */
- int auth; /**< Is client authenticated? */
- u32 pid; /**< Process ID */
- u32 uid; /**< User ID */
- u32 magic; /**< Magic */
- u32 iocs; /**< Ioctl count */
-} drm_client32_t;
-
-static int compat_drm_getclient(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_client32_t c32;
- drm_client32_t __user *argp = (void __user *)arg;
- struct drm_client __user *client;
- int idx, err;
-
- if (get_user(idx, &argp->idx))
- return -EFAULT;
-
- client = compat_alloc_user_space(sizeof(*client));
- if (!access_ok(VERIFY_WRITE, client, sizeof(*client)))
- return -EFAULT;
- if (__put_user(idx, &client->idx))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_GET_CLIENT, (unsigned long)client);
- if (err)
- return err;
-
- if (__get_user(c32.auth, &client->auth)
- || __get_user(c32.pid, &client->pid)
- || __get_user(c32.uid, &client->uid)
- || __get_user(c32.magic, &client->magic)
- || __get_user(c32.iocs, &client->iocs))
- return -EFAULT;
-
- if (copy_to_user(argp, &c32, sizeof(c32)))
- return -EFAULT;
- return 0;
-}
-
-typedef struct drm_stats32 {
- u32 count;
- struct {
- u32 value;
- enum drm_stat_type type;
- } data[15];
-} drm_stats32_t;
-
-static int compat_drm_getstats(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_stats32_t s32;
- drm_stats32_t __user *argp = (void __user *)arg;
- struct drm_stats __user *stats;
- int i, err;
-
- stats = compat_alloc_user_space(sizeof(*stats));
- if (!access_ok(VERIFY_WRITE, stats, sizeof(*stats)))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_GET_STATS, (unsigned long)stats);
- if (err)
- return err;
-
- if (__get_user(s32.count, &stats->count))
- return -EFAULT;
- for (i = 0; i < 15; ++i)
- if (__get_user(s32.data[i].value, &stats->data[i].value)
- || __get_user(s32.data[i].type, &stats->data[i].type))
- return -EFAULT;
-
- if (copy_to_user(argp, &s32, sizeof(s32)))
- return -EFAULT;
- return 0;
-}
-
-typedef struct drm_buf_desc32 {
- int count; /**< Number of buffers of this size */
- int size; /**< Size in bytes */
- int low_mark; /**< Low water mark */
- int high_mark; /**< High water mark */
- int flags;
- u32 agp_start; /**< Start address in the AGP aperture */
-} drm_buf_desc32_t;
-
-static int compat_drm_addbufs(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_buf_desc32_t __user *argp = (void __user *)arg;
- struct drm_buf_desc __user *buf;
- int err;
- unsigned long agp_start;
-
- buf = compat_alloc_user_space(sizeof(*buf));
- if (!access_ok(VERIFY_WRITE, buf, sizeof(*buf))
- || !access_ok(VERIFY_WRITE, argp, sizeof(*argp)))
- return -EFAULT;
-
- if (__copy_in_user(buf, argp, offsetof(drm_buf_desc32_t, agp_start))
- || __get_user(agp_start, &argp->agp_start)
- || __put_user(agp_start, &buf->agp_start))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_ADD_BUFS, (unsigned long)buf);
- if (err)
- return err;
-
- if (__copy_in_user(argp, buf, offsetof(drm_buf_desc32_t, agp_start))
- || __get_user(agp_start, &buf->agp_start)
- || __put_user(agp_start, &argp->agp_start))
- return -EFAULT;
-
- return 0;
-}
-
-static int compat_drm_markbufs(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_buf_desc32_t b32;
- drm_buf_desc32_t __user *argp = (void __user *)arg;
- struct drm_buf_desc __user *buf;
-
- if (copy_from_user(&b32, argp, sizeof(b32)))
- return -EFAULT;
-
- buf = compat_alloc_user_space(sizeof(*buf));
- if (!access_ok(VERIFY_WRITE, buf, sizeof(*buf)))
- return -EFAULT;
-
- if (__put_user(b32.size, &buf->size)
- || __put_user(b32.low_mark, &buf->low_mark)
- || __put_user(b32.high_mark, &buf->high_mark))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_MARK_BUFS, (unsigned long)buf);
-}
-
-typedef struct drm_buf_info32 {
- int count; /**< Entries in list */
- u32 list;
-} drm_buf_info32_t;
-
-static int compat_drm_infobufs(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_buf_info32_t req32;
- drm_buf_info32_t __user *argp = (void __user *)arg;
- drm_buf_desc32_t __user *to;
- struct drm_buf_info __user *request;
- struct drm_buf_desc __user *list;
- size_t nbytes;
- int i, err;
- int count, actual;
-
- if (copy_from_user(&req32, argp, sizeof(req32)))
- return -EFAULT;
-
- count = req32.count;
- to = (drm_buf_desc32_t __user *)(unsigned long)req32.list;
- if (count < 0)
- count = 0;
- if (count > 0
- && !access_ok(VERIFY_WRITE, to, count * sizeof(drm_buf_desc32_t)))
- return -EFAULT;
-
- nbytes = sizeof(*request) + count * sizeof(struct drm_buf_desc);
- request = compat_alloc_user_space(nbytes);
- if (!access_ok(VERIFY_WRITE, request, nbytes))
- return -EFAULT;
- list = (struct drm_buf_desc *) (request + 1);
-
- if (__put_user(count, &request->count)
- || __put_user(list, &request->list))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_INFO_BUFS, (unsigned long)request);
- if (err)
- return err;
-
- if (__get_user(actual, &request->count))
- return -EFAULT;
- if (count >= actual)
- for (i = 0; i < actual; ++i)
- if (__copy_in_user(&to[i], &list[i],
- offsetof(struct drm_buf_desc, flags)))
- return -EFAULT;
-
- if (__put_user(actual, &argp->count))
- return -EFAULT;
-
- return 0;
-}
-
-typedef struct drm_buf_pub32 {
- int idx; /**< Index into the master buffer list */
- int total; /**< Buffer size */
- int used; /**< Amount of buffer in use (for DMA) */
- u32 address; /**< Address of buffer */
-} drm_buf_pub32_t;
-
-typedef struct drm_buf_map32 {
- int count; /**< Length of the buffer list */
- u32 virtual; /**< Mmap'd area in user-virtual */
- u32 list; /**< Buffer information */
-} drm_buf_map32_t;
-
-static int compat_drm_mapbufs(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_buf_map32_t __user *argp = (void __user *)arg;
- drm_buf_map32_t req32;
- drm_buf_pub32_t __user *list32;
- struct drm_buf_map __user *request;
- struct drm_buf_pub __user *list;
- int i, err;
- int count, actual;
- size_t nbytes;
- void __user *addr;
-
- if (copy_from_user(&req32, argp, sizeof(req32)))
- return -EFAULT;
- count = req32.count;
- list32 = (void __user *)(unsigned long)req32.list;
-
- if (count < 0)
- return -EINVAL;
- nbytes = sizeof(*request) + count * sizeof(struct drm_buf_pub);
- request = compat_alloc_user_space(nbytes);
- if (!access_ok(VERIFY_WRITE, request, nbytes))
- return -EFAULT;
- list = (struct drm_buf_pub *) (request + 1);
-
- if (__put_user(count, &request->count)
- || __put_user(list, &request->list))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_MAP_BUFS, (unsigned long)request);
- if (err)
- return err;
-
- if (__get_user(actual, &request->count))
- return -EFAULT;
- if (count >= actual)
- for (i = 0; i < actual; ++i)
- if (__copy_in_user(&list32[i], &list[i],
- offsetof(struct drm_buf_pub, address))
- || __get_user(addr, &list[i].address)
- || __put_user((unsigned long)addr,
- &list32[i].address))
- return -EFAULT;
-
- if (__put_user(actual, &argp->count)
- || __get_user(addr, &request->virtual)
- || __put_user((unsigned long)addr, &argp->virtual))
- return -EFAULT;
-
- return 0;
-}
-
-typedef struct drm_buf_free32 {
- int count;
- u32 list;
-} drm_buf_free32_t;
-
-static int compat_drm_freebufs(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_buf_free32_t req32;
- struct drm_buf_free __user *request;
- drm_buf_free32_t __user *argp = (void __user *)arg;
-
- if (copy_from_user(&req32, argp, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request)))
- return -EFAULT;
- if (__put_user(req32.count, &request->count)
- || __put_user((int __user *)(unsigned long)req32.list,
- &request->list))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_FREE_BUFS, (unsigned long)request);
-}
-
-typedef struct drm_ctx_priv_map32 {
- unsigned int ctx_id; /**< Context requesting private mapping */
- u32 handle; /**< Handle of map */
-} drm_ctx_priv_map32_t;
-
-static int compat_drm_setsareactx(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_ctx_priv_map32_t req32;
- struct drm_ctx_priv_map __user *request;
- drm_ctx_priv_map32_t __user *argp = (void __user *)arg;
-
- if (copy_from_user(&req32, argp, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request)))
- return -EFAULT;
- if (__put_user(req32.ctx_id, &request->ctx_id)
- || __put_user((void *)(unsigned long)req32.handle,
- &request->handle))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_SET_SAREA_CTX, (unsigned long)request);
-}
-
-static int compat_drm_getsareactx(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- struct drm_ctx_priv_map __user *request;
- drm_ctx_priv_map32_t __user *argp = (void __user *)arg;
- int err;
- unsigned int ctx_id;
- void *handle;
-
- if (!access_ok(VERIFY_WRITE, argp, sizeof(*argp))
- || __get_user(ctx_id, &argp->ctx_id))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request)))
- return -EFAULT;
- if (__put_user(ctx_id, &request->ctx_id))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_GET_SAREA_CTX, (unsigned long)request);
- if (err)
- return err;
-
- if (__get_user(handle, &request->handle)
- || __put_user((unsigned long)handle, &argp->handle))
- return -EFAULT;
-
- return 0;
-}
-
-typedef struct drm_ctx_res32 {
- int count;
- u32 contexts;
-} drm_ctx_res32_t;
-
-static int compat_drm_resctx(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_ctx_res32_t __user *argp = (void __user *)arg;
- drm_ctx_res32_t res32;
- struct drm_ctx_res __user *res;
- int err;
-
- if (copy_from_user(&res32, argp, sizeof(res32)))
- return -EFAULT;
-
- res = compat_alloc_user_space(sizeof(*res));
- if (!access_ok(VERIFY_WRITE, res, sizeof(*res)))
- return -EFAULT;
- if (__put_user(res32.count, &res->count)
- || __put_user((struct drm_ctx __user *) (unsigned long)res32.contexts,
- &res->contexts))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RES_CTX, (unsigned long)res);
- if (err)
- return err;
-
- if (__get_user(res32.count, &res->count)
- || __put_user(res32.count, &argp->count))
- return -EFAULT;
-
- return 0;
-}
-
-typedef struct drm_dma32 {
- int context; /**< Context handle */
- int send_count; /**< Number of buffers to send */
- u32 send_indices; /**< List of handles to buffers */
- u32 send_sizes; /**< Lengths of data to send */
- enum drm_dma_flags flags; /**< Flags */
- int request_count; /**< Number of buffers requested */
- int request_size; /**< Desired size for buffers */
- u32 request_indices; /**< Buffer information */
- u32 request_sizes;
- int granted_count; /**< Number of buffers granted */
-} drm_dma32_t;
-
-static int compat_drm_dma(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_dma32_t d32;
- drm_dma32_t __user *argp = (void __user *)arg;
- struct drm_dma __user *d;
- int err;
-
- if (copy_from_user(&d32, argp, sizeof(d32)))
- return -EFAULT;
-
- d = compat_alloc_user_space(sizeof(*d));
- if (!access_ok(VERIFY_WRITE, d, sizeof(*d)))
- return -EFAULT;
-
- if (__put_user(d32.context, &d->context)
- || __put_user(d32.send_count, &d->send_count)
- || __put_user((int __user *)(unsigned long)d32.send_indices,
- &d->send_indices)
- || __put_user((int __user *)(unsigned long)d32.send_sizes,
- &d->send_sizes)
- || __put_user(d32.flags, &d->flags)
- || __put_user(d32.request_count, &d->request_count)
- || __put_user((int __user *)(unsigned long)d32.request_indices,
- &d->request_indices)
- || __put_user((int __user *)(unsigned long)d32.request_sizes,
- &d->request_sizes))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_DMA, (unsigned long)d);
- if (err)
- return err;
-
- if (__get_user(d32.request_size, &d->request_size)
- || __get_user(d32.granted_count, &d->granted_count)
- || __put_user(d32.request_size, &argp->request_size)
- || __put_user(d32.granted_count, &argp->granted_count))
- return -EFAULT;
-
- return 0;
-}
-
-#if __OS_HAS_AGP
-typedef struct drm_agp_mode32 {
- u32 mode; /**< AGP mode */
-} drm_agp_mode32_t;
-
-static int compat_drm_agp_enable(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_agp_mode32_t __user *argp = (void __user *)arg;
- drm_agp_mode32_t m32;
- struct drm_agp_mode __user *mode;
-
- if (get_user(m32.mode, &argp->mode))
- return -EFAULT;
-
- mode = compat_alloc_user_space(sizeof(*mode));
- if (put_user(m32.mode, &mode->mode))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_AGP_ENABLE, (unsigned long)mode);
-}
-
-typedef struct drm_agp_info32 {
- int agp_version_major;
- int agp_version_minor;
- u32 mode;
- u32 aperture_base; /* physical address */
- u32 aperture_size; /* bytes */
- u32 memory_allowed; /* bytes */
- u32 memory_used;
-
- /* PCI information */
- unsigned short id_vendor;
- unsigned short id_device;
-} drm_agp_info32_t;
-
-static int compat_drm_agp_info(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_agp_info32_t __user *argp = (void __user *)arg;
- drm_agp_info32_t i32;
- struct drm_agp_info __user *info;
- int err;
-
- info = compat_alloc_user_space(sizeof(*info));
- if (!access_ok(VERIFY_WRITE, info, sizeof(*info)))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_AGP_INFO, (unsigned long)info);
- if (err)
- return err;
-
- if (__get_user(i32.agp_version_major, &info->agp_version_major)
- || __get_user(i32.agp_version_minor, &info->agp_version_minor)
- || __get_user(i32.mode, &info->mode)
- || __get_user(i32.aperture_base, &info->aperture_base)
- || __get_user(i32.aperture_size, &info->aperture_size)
- || __get_user(i32.memory_allowed, &info->memory_allowed)
- || __get_user(i32.memory_used, &info->memory_used)
- || __get_user(i32.id_vendor, &info->id_vendor)
- || __get_user(i32.id_device, &info->id_device))
- return -EFAULT;
-
- if (copy_to_user(argp, &i32, sizeof(i32)))
- return -EFAULT;
-
- return 0;
-}
-
-typedef struct drm_agp_buffer32 {
- u32 size; /**< In bytes -- will round to page boundary */
- u32 handle; /**< Used for binding / unbinding */
- u32 type; /**< Type of memory to allocate */
- u32 physical; /**< Physical used by i810 */
-} drm_agp_buffer32_t;
-
-static int compat_drm_agp_alloc(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_agp_buffer32_t __user *argp = (void __user *)arg;
- drm_agp_buffer32_t req32;
- struct drm_agp_buffer __user *request;
- int err;
-
- if (copy_from_user(&req32, argp, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user(req32.size, &request->size)
- || __put_user(req32.type, &request->type))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_AGP_ALLOC, (unsigned long)request);
- if (err)
- return err;
-
- if (__get_user(req32.handle, &request->handle)
- || __get_user(req32.physical, &request->physical)
- || copy_to_user(argp, &req32, sizeof(req32))) {
- drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_AGP_FREE, (unsigned long)request);
- return -EFAULT;
- }
-
- return 0;
-}
-
-static int compat_drm_agp_free(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_agp_buffer32_t __user *argp = (void __user *)arg;
- struct drm_agp_buffer __user *request;
- u32 handle;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || get_user(handle, &argp->handle)
- || __put_user(handle, &request->handle))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_AGP_FREE, (unsigned long)request);
-}
-
-typedef struct drm_agp_binding32 {
- u32 handle; /**< From drm_agp_buffer */
- u32 offset; /**< In bytes -- will round to page boundary */
-} drm_agp_binding32_t;
-
-static int compat_drm_agp_bind(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_agp_binding32_t __user *argp = (void __user *)arg;
- drm_agp_binding32_t req32;
- struct drm_agp_binding __user *request;
-
- if (copy_from_user(&req32, argp, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user(req32.handle, &request->handle)
- || __put_user(req32.offset, &request->offset))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_AGP_BIND, (unsigned long)request);
-}
-
-static int compat_drm_agp_unbind(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_agp_binding32_t __user *argp = (void __user *)arg;
- struct drm_agp_binding __user *request;
- u32 handle;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || get_user(handle, &argp->handle)
- || __put_user(handle, &request->handle))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_AGP_UNBIND, (unsigned long)request);
-}
-#endif /* __OS_HAS_AGP */
-
-typedef struct drm_scatter_gather32 {
- u32 size; /**< In bytes -- will round to page boundary */
- u32 handle; /**< Used for mapping / unmapping */
-} drm_scatter_gather32_t;
-
-static int compat_drm_sg_alloc(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_scatter_gather32_t __user *argp = (void __user *)arg;
- struct drm_scatter_gather __user *request;
- int err;
- unsigned long x;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || !access_ok(VERIFY_WRITE, argp, sizeof(*argp))
- || __get_user(x, &argp->size)
- || __put_user(x, &request->size))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_SG_ALLOC, (unsigned long)request);
- if (err)
- return err;
-
- /* XXX not sure about the handle conversion here... */
- if (__get_user(x, &request->handle)
- || __put_user(x >> PAGE_SHIFT, &argp->handle))
- return -EFAULT;
-
- return 0;
-}
-
-static int compat_drm_sg_free(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_scatter_gather32_t __user *argp = (void __user *)arg;
- struct drm_scatter_gather __user *request;
- unsigned long x;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || !access_ok(VERIFY_WRITE, argp, sizeof(*argp))
- || __get_user(x, &argp->handle)
- || __put_user(x << PAGE_SHIFT, &request->handle))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_SG_FREE, (unsigned long)request);
-}
-
-struct drm_wait_vblank_request32 {
- enum drm_vblank_seq_type type;
- unsigned int sequence;
- u32 signal;
-};
-
-struct drm_wait_vblank_reply32 {
- enum drm_vblank_seq_type type;
- unsigned int sequence;
- s32 tval_sec;
- s32 tval_usec;
-};
-
-typedef union drm_wait_vblank32 {
- struct drm_wait_vblank_request32 request;
- struct drm_wait_vblank_reply32 reply;
-} drm_wait_vblank32_t;
-
-static int compat_drm_wait_vblank(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_wait_vblank32_t __user *argp = (void __user *)arg;
- drm_wait_vblank32_t req32;
- union drm_wait_vblank __user *request;
- int err;
-
- if (copy_from_user(&req32, argp, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user(req32.request.type, &request->request.type)
- || __put_user(req32.request.sequence, &request->request.sequence)
- || __put_user(req32.request.signal, &request->request.signal))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_WAIT_VBLANK, (unsigned long)request);
- if (err)
- return err;
-
- if (__get_user(req32.reply.type, &request->reply.type)
- || __get_user(req32.reply.sequence, &request->reply.sequence)
- || __get_user(req32.reply.tval_sec, &request->reply.tval_sec)
- || __get_user(req32.reply.tval_usec, &request->reply.tval_usec))
- return -EFAULT;
-
- if (copy_to_user(argp, &req32, sizeof(req32)))
- return -EFAULT;
-
- return 0;
-}
-
-drm_ioctl_compat_t *drm_compat_ioctls[] = {
- [DRM_IOCTL_NR(DRM_IOCTL_VERSION32)] = compat_drm_version,
- [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE32)] = compat_drm_getunique,
- [DRM_IOCTL_NR(DRM_IOCTL_GET_MAP32)] = compat_drm_getmap,
- [DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT32)] = compat_drm_getclient,
- [DRM_IOCTL_NR(DRM_IOCTL_GET_STATS32)] = compat_drm_getstats,
- [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE32)] = compat_drm_setunique,
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP32)] = compat_drm_addmap,
- [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS32)] = compat_drm_addbufs,
- [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS32)] = compat_drm_markbufs,
- [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS32)] = compat_drm_infobufs,
- [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS32)] = compat_drm_mapbufs,
- [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS32)] = compat_drm_freebufs,
- [DRM_IOCTL_NR(DRM_IOCTL_RM_MAP32)] = compat_drm_rmmap,
- [DRM_IOCTL_NR(DRM_IOCTL_SET_SAREA_CTX32)] = compat_drm_setsareactx,
- [DRM_IOCTL_NR(DRM_IOCTL_GET_SAREA_CTX32)] = compat_drm_getsareactx,
- [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX32)] = compat_drm_resctx,
- [DRM_IOCTL_NR(DRM_IOCTL_DMA32)] = compat_drm_dma,
-#if __OS_HAS_AGP
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE32)] = compat_drm_agp_enable,
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO32)] = compat_drm_agp_info,
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC32)] = compat_drm_agp_alloc,
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE32)] = compat_drm_agp_free,
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND32)] = compat_drm_agp_bind,
- [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND32)] = compat_drm_agp_unbind,
-#endif
- [DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC32)] = compat_drm_sg_alloc,
- [DRM_IOCTL_NR(DRM_IOCTL_SG_FREE32)] = compat_drm_sg_free,
- [DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK32)] = compat_drm_wait_vblank,
-};
-
-/**
- * Called whenever a 32-bit process running under a 64-bit kernel
- * performs an ioctl on /dev/drm.
- *
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or negative number on failure.
- */
-long drm_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
-{
- unsigned int nr = DRM_IOCTL_NR(cmd);
- drm_ioctl_compat_t *fn;
- int ret;
-
-
- /* Assume that ioctls without an explicit compat routine will "just
- * work". This may not always be a good assumption, but it's better
- * than always failing.
- */
- if (nr >= DRM_ARRAY_SIZE(drm_compat_ioctls))
- return drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
-
- fn = drm_compat_ioctls[nr];
-
- lock_kernel(); /* XXX for now */
- if (fn != NULL)
- ret = (*fn)(filp, cmd, arg);
- else
- ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
- unlock_kernel();
-
- return ret;
-}
-EXPORT_SYMBOL(drm_compat_ioctl);
+++ /dev/null
-/**
- * \file drm_ioctl.c
- * IOCTL processing for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Fri Jan 8 09:01:26 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "drm_core.h"
-
-#include "linux/pci.h"
-
-/**
- * Get the bus id.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_unique structure.
- * \return zero on success or a negative number on failure.
- *
- * Copies the bus id from drm_device::unique into user space.
- */
-int drm_getunique(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_unique *u = data;
-
- if (u->unique_len >= dev->unique_len) {
- if (copy_to_user(u->unique, dev->unique, dev->unique_len))
- return -EFAULT;
- }
- u->unique_len = dev->unique_len;
-
- return 0;
-}
-
-/**
- * Set the bus id.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_unique structure.
- * \return zero on success or a negative number on failure.
- *
- * Copies the bus id from userspace into drm_device::unique, and verifies that
- * it matches the device this DRM is attached to (EINVAL otherwise). Deprecated
- * in interface version 1.1 and will return EBUSY when setversion has requested
- * version 1.1 or greater.
- */
-int drm_setunique(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_unique *u = data;
- int domain, bus, slot, func, ret;
-
- if (dev->unique_len || dev->unique)
- return -EBUSY;
-
- if (!u->unique_len || u->unique_len > 1024)
- return -EINVAL;
-
- dev->unique_len = u->unique_len;
- dev->unique = drm_alloc(u->unique_len + 1, DRM_MEM_DRIVER);
- if (!dev->unique)
- return -ENOMEM;
- if (copy_from_user(dev->unique, u->unique, dev->unique_len))
- return -EFAULT;
-
- dev->unique[dev->unique_len] = '\0';
-
- dev->devname =
- drm_alloc(strlen(dev->driver->pci_driver.name) +
- strlen(dev->unique) + 2, DRM_MEM_DRIVER);
- if (!dev->devname)
- return -ENOMEM;
-
- sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name,
- dev->unique);
-
- /* Return error if the busid submitted doesn't match the device's actual
- * busid.
- */
- ret = sscanf(dev->unique, "PCI:%d:%d:%d", &bus, &slot, &func);
- if (ret != 3)
- return -EINVAL;
- domain = bus >> 8;
- bus &= 0xff;
-
- if ((domain != drm_get_pci_domain(dev)) ||
- (bus != dev->pdev->bus->number) ||
- (slot != PCI_SLOT(dev->pdev->devfn)) ||
- (func != PCI_FUNC(dev->pdev->devfn)))
- return -EINVAL;
-
- return 0;
-}
-
-static int drm_set_busid(struct drm_device * dev)
-{
- int len;
- if (dev->unique != NULL)
- return -EBUSY;
-
- dev->unique_len = 40;
- dev->unique = drm_alloc(dev->unique_len + 1, DRM_MEM_DRIVER);
- if (dev->unique == NULL)
- return -ENOMEM;
-
- len = snprintf(dev->unique, dev->unique_len, "pci:%04x:%02x:%02x.%d",
- drm_get_pci_domain(dev),
- dev->pdev->bus->number,
- PCI_SLOT(dev->pdev->devfn),
- PCI_FUNC(dev->pdev->devfn));
- if (len > dev->unique_len)
- DRM_ERROR("buffer overflow");
-
- dev->devname =
- drm_alloc(strlen(dev->driver->pci_driver.name) + dev->unique_len +
- 2, DRM_MEM_DRIVER);
- if (dev->devname == NULL)
- return -ENOMEM;
-
- sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name,
- dev->unique);
-
- return 0;
-}
-
-/**
- * Get a mapping information.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_map structure.
- *
- * \return zero on success or a negative number on failure.
- *
- * Searches for the mapping with the specified offset and copies its information
- * into userspace
- */
-int drm_getmap(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_map *map = data;
- struct drm_map_list *r_list = NULL;
- struct list_head *list;
- int idx;
- int i;
-
- idx = map->offset;
-
- mutex_lock(&dev->struct_mutex);
- if (idx < 0) {
- mutex_unlock(&dev->struct_mutex);
- return -EINVAL;
- }
-
- i = 0;
- list_for_each(list, &dev->maplist) {
- if (i == idx) {
- r_list = list_entry(list, struct drm_map_list, head);
- break;
- }
- i++;
- }
- if (!r_list || !r_list->map) {
- mutex_unlock(&dev->struct_mutex);
- return -EINVAL;
- }
-
- map->offset = r_list->map->offset;
- map->size = r_list->map->size;
- map->type = r_list->map->type;
- map->flags = r_list->map->flags;
- map->handle = (void *)(unsigned long) r_list->user_token;
- map->mtrr = r_list->map->mtrr;
- mutex_unlock(&dev->struct_mutex);
-
- return 0;
-}
-
-/**
- * Get client information.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_client structure.
- *
- * \return zero on success or a negative number on failure.
- *
- * Searches for the client with the specified index and copies its information
- * into userspace
- */
-int drm_getclient(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_client *client = data;
- struct drm_file *pt;
- int idx;
- int i;
-
- idx = client->idx;
- mutex_lock(&dev->struct_mutex);
-
- i = 0;
- list_for_each_entry(pt, &dev->filelist, lhead) {
- if (i++ >= idx) {
- client->auth = pt->authenticated;
- client->pid = pt->pid;
- client->uid = pt->uid;
- client->magic = pt->magic;
- client->iocs = pt->ioctl_count;
- mutex_unlock(&dev->struct_mutex);
-
- return 0;
- }
- }
- mutex_unlock(&dev->struct_mutex);
-
- return -EINVAL;
-}
-
-/**
- * Get statistics information.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_stats structure.
- *
- * \return zero on success or a negative number on failure.
- */
-int drm_getstats(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_stats *stats = data;
- int i;
-
- memset(stats, 0, sizeof(*stats));
-
- mutex_lock(&dev->struct_mutex);
-
- for (i = 0; i < dev->counters; i++) {
- if (dev->types[i] == _DRM_STAT_LOCK)
- stats->data[i].value =
- (dev->lock.hw_lock ? dev->lock.hw_lock->lock : 0);
- else
- stats->data[i].value = atomic_read(&dev->counts[i]);
- stats->data[i].type = dev->types[i];
- }
-
- stats->count = dev->counters;
-
- mutex_unlock(&dev->struct_mutex);
-
- return 0;
-}
-
-/**
- * Setversion ioctl.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_lock structure.
- * \return zero on success or negative number on failure.
- *
- * Sets the requested interface version
- */
-int drm_setversion(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_set_version *sv = data;
- int if_version, retcode = 0;
-
- if (sv->drm_di_major != -1) {
- if (sv->drm_di_major != DRM_IF_MAJOR ||
- sv->drm_di_minor < 0 || sv->drm_di_minor > DRM_IF_MINOR) {
- retcode = -EINVAL;
- goto done;
- }
- if_version = DRM_IF_VERSION(sv->drm_di_major,
- sv->drm_di_minor);
- dev->if_version = max(if_version, dev->if_version);
- if (sv->drm_di_minor >= 1) {
- /*
- * Version 1.1 includes tying of DRM to specific device
- */
- drm_set_busid(dev);
- }
- }
-
- if (sv->drm_dd_major != -1) {
- if (sv->drm_dd_major != dev->driver->major ||
- sv->drm_dd_minor < 0 || sv->drm_dd_minor >
- dev->driver->minor) {
- retcode = -EINVAL;
- goto done;
- }
-
- if (dev->driver->set_version)
- dev->driver->set_version(dev, sv);
- }
-
-done:
- sv->drm_di_major = DRM_IF_MAJOR;
- sv->drm_di_minor = DRM_IF_MINOR;
- sv->drm_dd_major = dev->driver->major;
- sv->drm_dd_minor = dev->driver->minor;
-
- return retcode;
-}
-
-/** No-op ioctl. */
-int drm_noop(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- DRM_DEBUG("\n");
- return 0;
-}
+++ /dev/null
-/**
- * \file drm_irq.c
- * IRQ support
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-#include <linux/interrupt.h> /* For task queue support */
-
-/**
- * Get interrupt from bus id.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_irq_busid structure.
- * \return zero on success or a negative number on failure.
- *
- * Finds the PCI device with the specified bus id and gets its IRQ number.
- * This IOCTL is deprecated, and will now return EINVAL for any busid not equal
- * to that of the device that this DRM instance attached to.
- */
-int drm_irq_by_busid(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_irq_busid *p = data;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return -EINVAL;
-
- if ((p->busnum >> 8) != drm_get_pci_domain(dev) ||
- (p->busnum & 0xff) != dev->pdev->bus->number ||
- p->devnum != PCI_SLOT(dev->pdev->devfn) || p->funcnum != PCI_FUNC(dev->pdev->devfn))
- return -EINVAL;
-
- p->irq = dev->pdev->irq;
-
- DRM_DEBUG("%d:%d:%d => IRQ %d\n", p->busnum, p->devnum, p->funcnum,
- p->irq);
-
- return 0;
-}
-
-static void vblank_disable_fn(unsigned long arg)
-{
- struct drm_device *dev = (struct drm_device *)arg;
- unsigned long irqflags;
- int i;
-
- if (!dev->vblank_disable_allowed)
- return;
-
- for (i = 0; i < dev->num_crtcs; i++) {
- spin_lock_irqsave(&dev->vbl_lock, irqflags);
- if (atomic_read(&dev->vblank_refcount[i]) == 0 &&
- dev->vblank_enabled[i]) {
- DRM_DEBUG("disabling vblank on crtc %d\n", i);
- dev->last_vblank[i] =
- dev->driver->get_vblank_counter(dev, i);
- dev->driver->disable_vblank(dev, i);
- dev->vblank_enabled[i] = 0;
- }
- spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
- }
-}
-
-void drm_vblank_cleanup(struct drm_device *dev)
-{
- /* Bail if the driver didn't call drm_vblank_init() */
- if (dev->num_crtcs == 0)
- return;
-
- del_timer(&dev->vblank_disable_timer);
-
- vblank_disable_fn((unsigned long)dev);
-
- drm_free(dev->vbl_queue, sizeof(*dev->vbl_queue) * dev->num_crtcs,
- DRM_MEM_DRIVER);
- drm_free(dev->vbl_sigs, sizeof(*dev->vbl_sigs) * dev->num_crtcs,
- DRM_MEM_DRIVER);
- drm_free(dev->_vblank_count, sizeof(*dev->_vblank_count) *
- dev->num_crtcs, DRM_MEM_DRIVER);
- drm_free(dev->vblank_refcount, sizeof(*dev->vblank_refcount) *
- dev->num_crtcs, DRM_MEM_DRIVER);
- drm_free(dev->vblank_enabled, sizeof(*dev->vblank_enabled) *
- dev->num_crtcs, DRM_MEM_DRIVER);
- drm_free(dev->last_vblank, sizeof(*dev->last_vblank) * dev->num_crtcs,
- DRM_MEM_DRIVER);
- drm_free(dev->vblank_inmodeset, sizeof(*dev->vblank_inmodeset) *
- dev->num_crtcs, DRM_MEM_DRIVER);
-
- dev->num_crtcs = 0;
-}
-
-int drm_vblank_init(struct drm_device *dev, int num_crtcs)
-{
- int i, ret = -ENOMEM;
-
- setup_timer(&dev->vblank_disable_timer, vblank_disable_fn,
- (unsigned long)dev);
- init_timer_deferrable(&dev->vblank_disable_timer);
- spin_lock_init(&dev->vbl_lock);
- atomic_set(&dev->vbl_signal_pending, 0);
- dev->num_crtcs = num_crtcs;
-
- dev->vbl_queue = drm_alloc(sizeof(wait_queue_head_t) * num_crtcs,
- DRM_MEM_DRIVER);
- if (!dev->vbl_queue)
- goto err;
-
- dev->vbl_sigs = drm_alloc(sizeof(struct list_head) * num_crtcs,
- DRM_MEM_DRIVER);
- if (!dev->vbl_sigs)
- goto err;
-
- dev->_vblank_count = drm_alloc(sizeof(atomic_t) * num_crtcs,
- DRM_MEM_DRIVER);
- if (!dev->_vblank_count)
- goto err;
-
- dev->vblank_refcount = drm_alloc(sizeof(atomic_t) * num_crtcs,
- DRM_MEM_DRIVER);
- if (!dev->vblank_refcount)
- goto err;
-
- dev->vblank_enabled = drm_calloc(num_crtcs, sizeof(int),
- DRM_MEM_DRIVER);
- if (!dev->vblank_enabled)
- goto err;
-
- dev->last_vblank = drm_calloc(num_crtcs, sizeof(u32), DRM_MEM_DRIVER);
- if (!dev->last_vblank)
- goto err;
-
- dev->vblank_inmodeset = drm_calloc(num_crtcs, sizeof(int),
- DRM_MEM_DRIVER);
- if (!dev->vblank_inmodeset)
- goto err;
-
- /* Zero per-crtc vblank stuff */
- for (i = 0; i < num_crtcs; i++) {
- init_waitqueue_head(&dev->vbl_queue[i]);
- INIT_LIST_HEAD(&dev->vbl_sigs[i]);
- atomic_set(&dev->_vblank_count[i], 0);
- atomic_set(&dev->vblank_refcount[i], 0);
- }
-
- dev->vblank_disable_allowed = 0;
-
- return 0;
-
-err:
- drm_vblank_cleanup(dev);
- return ret;
-}
-EXPORT_SYMBOL(drm_vblank_init);
-
-/**
- * Install IRQ handler.
- *
- * \param dev DRM device.
- *
- * Initializes the IRQ related data. Installs the handler, calling the driver
- * \c drm_driver_irq_preinstall() and \c drm_driver_irq_postinstall() functions
- * before and after the installation.
- */
-int drm_irq_install(struct drm_device * dev)
-{
- int ret = 0;
- unsigned long sh_flags = 0;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return -EINVAL;
-
- if (dev->pdev->irq == 0)
- return -EINVAL;
-
- mutex_lock(&dev->struct_mutex);
-
- /* Driver must have been initialized */
- if (!dev->dev_private) {
- mutex_unlock(&dev->struct_mutex);
- return -EINVAL;
- }
-
- if (dev->irq_enabled) {
- mutex_unlock(&dev->struct_mutex);
- return -EBUSY;
- }
- dev->irq_enabled = 1;
- mutex_unlock(&dev->struct_mutex);
-
- DRM_DEBUG("irq=%d\n", dev->pdev->irq);
-
- /* Before installing handler */
- dev->driver->irq_preinstall(dev);
-
- /* Install handler */
- if (drm_core_check_feature(dev, DRIVER_IRQ_SHARED))
- sh_flags = IRQF_SHARED;
-
- ret = request_irq(dev->pdev->irq, dev->driver->irq_handler,
- sh_flags, dev->devname, dev);
- if (ret < 0) {
- mutex_lock(&dev->struct_mutex);
- dev->irq_enabled = 0;
- mutex_unlock(&dev->struct_mutex);
- return ret;
- }
- /* Expose the device irq to device drivers that want to export it for
- * whatever reason.
- */
- dev->irq = dev->pdev->irq;
-
- /* After installing handler */
- ret = dev->driver->irq_postinstall(dev);
- if (ret < 0) {
- mutex_lock(&dev->struct_mutex);
- dev->irq_enabled = 0;
- mutex_unlock(&dev->struct_mutex);
- }
-
- return ret;
-}
-EXPORT_SYMBOL(drm_irq_install);
-
-/**
- * Uninstall the IRQ handler.
- *
- * \param dev DRM device.
- *
- * Calls the driver's \c drm_driver_irq_uninstall() function, and stops the irq.
- */
-int drm_irq_uninstall(struct drm_device * dev)
-{
- int irq_enabled;
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return -EINVAL;
-
- mutex_lock(&dev->struct_mutex);
- irq_enabled = dev->irq_enabled;
- dev->irq_enabled = 0;
- mutex_unlock(&dev->struct_mutex);
-
- if (!irq_enabled)
- return -EINVAL;
-
- DRM_DEBUG("irq=%d\n", dev->pdev->irq);
-
- dev->driver->irq_uninstall(dev);
-
- free_irq(dev->pdev->irq, dev);
-
- dev->locked_tasklet_func = NULL;
-
- return 0;
-}
-EXPORT_SYMBOL(drm_irq_uninstall);
-
-/**
- * IRQ control ioctl.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_control structure.
- * \return zero on success or a negative number on failure.
- *
- * Calls irq_install() or irq_uninstall() according to \p arg.
- */
-int drm_control(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_control *ctl = data;
-
- /* if we haven't irq we fallback for compatibility reasons - this used to be a separate function in drm_dma.h */
-
-
- switch (ctl->func) {
- case DRM_INST_HANDLER:
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return 0;
- if (dev->if_version < DRM_IF_VERSION(1, 2) &&
- ctl->irq != dev->pdev->irq)
- return -EINVAL;
- return drm_irq_install(dev);
- case DRM_UNINST_HANDLER:
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- return 0;
- return drm_irq_uninstall(dev);
- default:
- return -EINVAL;
- }
-}
-
-/**
- * drm_vblank_count - retrieve "cooked" vblank counter value
- * @dev: DRM device
- * @crtc: which counter to retrieve
- *
- * Fetches the "cooked" vblank count value that represents the number of
- * vblank events since the system was booted, including lost events due to
- * modesetting activity.
- */
-u32 drm_vblank_count(struct drm_device *dev, int crtc)
-{
- return atomic_read(&dev->_vblank_count[crtc]);
-}
-EXPORT_SYMBOL(drm_vblank_count);
-
-/**
- * drm_update_vblank_count - update the master vblank counter
- * @dev: DRM device
- * @crtc: counter to update
- *
- * Call back into the driver to update the appropriate vblank counter
- * (specified by @crtc). Deal with wraparound, if it occurred, and
- * update the last read value so we can deal with wraparound on the next
- * call if necessary.
- *
- * Only necessary when going from off->on, to account for frames we
- * didn't get an interrupt for.
- *
- * Note: caller must hold dev->vbl_lock since this reads & writes
- * device vblank fields.
- */
-static void drm_update_vblank_count(struct drm_device *dev, int crtc)
-{
- u32 cur_vblank, diff;
-
- /*
- * Interrupts were disabled prior to this call, so deal with counter
- * wrap if needed.
- * NOTE! It's possible we lost a full dev->max_vblank_count events
- * here if the register is small or we had vblank interrupts off for
- * a long time.
- */
- cur_vblank = dev->driver->get_vblank_counter(dev, crtc);
- diff = cur_vblank - dev->last_vblank[crtc];
- if (cur_vblank < dev->last_vblank[crtc]) {
- diff += dev->max_vblank_count;
-
- DRM_DEBUG("last_vblank[%d]=0x%x, cur_vblank=0x%x => diff=0x%x\n",
- crtc, dev->last_vblank[crtc], cur_vblank, diff);
- }
-
- DRM_DEBUG("enabling vblank interrupts on crtc %d, missed %d\n",
- crtc, diff);
-
- atomic_add(diff, &dev->_vblank_count[crtc]);
-}
-
-/**
- * drm_vblank_get - get a reference count on vblank events
- * @dev: DRM device
- * @crtc: which CRTC to own
- *
- * Acquire a reference count on vblank events to avoid having them disabled
- * while in use.
- *
- * RETURNS
- * Zero on success, nonzero on failure.
- */
-int drm_vblank_get(struct drm_device *dev, int crtc)
-{
- unsigned long irqflags;
- int ret = 0;
-
- spin_lock_irqsave(&dev->vbl_lock, irqflags);
- /* Going from 0->1 means we have to enable interrupts again */
- if (atomic_add_return(1, &dev->vblank_refcount[crtc]) == 1 &&
- !dev->vblank_enabled[crtc]) {
- ret = dev->driver->enable_vblank(dev, crtc);
- if (ret)
- atomic_dec(&dev->vblank_refcount[crtc]);
- else {
- dev->vblank_enabled[crtc] = 1;
- drm_update_vblank_count(dev, crtc);
- }
- }
- spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
-
- return ret;
-}
-EXPORT_SYMBOL(drm_vblank_get);
-
-/**
- * drm_vblank_put - give up ownership of vblank events
- * @dev: DRM device
- * @crtc: which counter to give up
- *
- * Release ownership of a given vblank counter, turning off interrupts
- * if possible.
- */
-void drm_vblank_put(struct drm_device *dev, int crtc)
-{
- /* Last user schedules interrupt disable */
- if (atomic_dec_and_test(&dev->vblank_refcount[crtc]))
- mod_timer(&dev->vblank_disable_timer, jiffies + 5*DRM_HZ);
-}
-EXPORT_SYMBOL(drm_vblank_put);
-
-/**
- * drm_modeset_ctl - handle vblank event counter changes across mode switch
- * @DRM_IOCTL_ARGS: standard ioctl arguments
- *
- * Applications should call the %_DRM_PRE_MODESET and %_DRM_POST_MODESET
- * ioctls around modesetting so that any lost vblank events are accounted for.
- *
- * Generally the counter will reset across mode sets. If interrupts are
- * enabled around this call, we don't have to do anything since the counter
- * will have already been incremented.
- */
-int drm_modeset_ctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_modeset_ctl *modeset = data;
- unsigned long irqflags;
- int crtc, ret = 0;
-
- /* If drm_vblank_init() hasn't been called yet, just no-op */
- if (!dev->num_crtcs)
- goto out;
-
- crtc = modeset->crtc;
- if (crtc >= dev->num_crtcs) {
- ret = -EINVAL;
- goto out;
- }
-
- /*
- * To avoid all the problems that might happen if interrupts
- * were enabled/disabled around or between these calls, we just
- * have the kernel take a reference on the CRTC (just once though
- * to avoid corrupting the count if multiple, mismatch calls occur),
- * so that interrupts remain enabled in the interim.
- */
- switch (modeset->cmd) {
- case _DRM_PRE_MODESET:
- if (!dev->vblank_inmodeset[crtc]) {
- dev->vblank_inmodeset[crtc] = 1;
- drm_vblank_get(dev, crtc);
- }
- break;
- case _DRM_POST_MODESET:
- if (dev->vblank_inmodeset[crtc]) {
- spin_lock_irqsave(&dev->vbl_lock, irqflags);
- dev->vblank_disable_allowed = 1;
- dev->vblank_inmodeset[crtc] = 0;
- spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
- drm_vblank_put(dev, crtc);
- }
- break;
- default:
- ret = -EINVAL;
- break;
- }
-
-out:
- return ret;
-}
-
-/**
- * Wait for VBLANK.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param data user argument, pointing to a drm_wait_vblank structure.
- * \return zero on success or a negative number on failure.
- *
- * Verifies the IRQ is installed.
- *
- * If a signal is requested checks if this task has already scheduled the same signal
- * for the same vblank sequence number - nothing to be done in
- * that case. If the number of tasks waiting for the interrupt exceeds 100 the
- * function fails. Otherwise adds a new entry to drm_device::vbl_sigs for this
- * task.
- *
- * If a signal is not requested, then calls vblank_wait().
- */
-int drm_wait_vblank(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- union drm_wait_vblank *vblwait = data;
- int ret = 0;
- unsigned int flags, seq, crtc;
-
- if ((!dev->pdev->irq) || (!dev->irq_enabled))
- return -EINVAL;
-
- if (vblwait->request.type &
- ~(_DRM_VBLANK_TYPES_MASK | _DRM_VBLANK_FLAGS_MASK)) {
- DRM_ERROR("Unsupported type value 0x%x, supported mask 0x%x\n",
- vblwait->request.type,
- (_DRM_VBLANK_TYPES_MASK | _DRM_VBLANK_FLAGS_MASK));
- return -EINVAL;
- }
-
- flags = vblwait->request.type & _DRM_VBLANK_FLAGS_MASK;
- crtc = flags & _DRM_VBLANK_SECONDARY ? 1 : 0;
-
- if (crtc >= dev->num_crtcs)
- return -EINVAL;
-
- ret = drm_vblank_get(dev, crtc);
- if (ret)
- return ret;
- seq = drm_vblank_count(dev, crtc);
-
- switch (vblwait->request.type & _DRM_VBLANK_TYPES_MASK) {
- case _DRM_VBLANK_RELATIVE:
- vblwait->request.sequence += seq;
- vblwait->request.type &= ~_DRM_VBLANK_RELATIVE;
- case _DRM_VBLANK_ABSOLUTE:
- break;
- default:
- ret = -EINVAL;
- goto done;
- }
-
- if ((flags & _DRM_VBLANK_NEXTONMISS) &&
- (seq - vblwait->request.sequence) <= (1<<23)) {
- vblwait->request.sequence = seq + 1;
- }
-
- if (flags & _DRM_VBLANK_SIGNAL) {
- unsigned long irqflags;
- struct list_head *vbl_sigs = &dev->vbl_sigs[crtc];
- struct drm_vbl_sig *vbl_sig;
-
- spin_lock_irqsave(&dev->vbl_lock, irqflags);
-
- /* Check if this task has already scheduled the same signal
- * for the same vblank sequence number; nothing to be done in
- * that case
- */
- list_for_each_entry(vbl_sig, vbl_sigs, head) {
- if (vbl_sig->sequence == vblwait->request.sequence
- && vbl_sig->info.si_signo ==
- vblwait->request.signal
- && vbl_sig->task == current) {
- spin_unlock_irqrestore(&dev->vbl_lock,
- irqflags);
- vblwait->reply.sequence = seq;
- goto done;
- }
- }
-
- if (atomic_read(&dev->vbl_signal_pending) >= 100) {
- spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
- ret = -EBUSY;
- goto done;
- }
-
- spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
-
- vbl_sig = drm_calloc(1, sizeof(struct drm_vbl_sig),
- DRM_MEM_DRIVER);
- if (!vbl_sig) {
- ret = -ENOMEM;
- goto done;
- }
-
- ret = drm_vblank_get(dev, crtc);
- if (ret) {
- drm_free(vbl_sig, sizeof(struct drm_vbl_sig),
- DRM_MEM_DRIVER);
- return ret;
- }
-
- atomic_inc(&dev->vbl_signal_pending);
-
- vbl_sig->sequence = vblwait->request.sequence;
- vbl_sig->info.si_signo = vblwait->request.signal;
- vbl_sig->task = current;
-
- spin_lock_irqsave(&dev->vbl_lock, irqflags);
-
- list_add_tail(&vbl_sig->head, vbl_sigs);
-
- spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
-
- vblwait->reply.sequence = seq;
- } else {
- DRM_WAIT_ON(ret, dev->vbl_queue[crtc], 3 * DRM_HZ,
- ((drm_vblank_count(dev, crtc)
- - vblwait->request.sequence) <= (1 << 23)));
-
- if (ret != -EINTR) {
- struct timeval now;
-
- do_gettimeofday(&now);
-
- vblwait->reply.tval_sec = now.tv_sec;
- vblwait->reply.tval_usec = now.tv_usec;
- vblwait->reply.sequence = drm_vblank_count(dev, crtc);
- }
- }
-
-done:
- drm_vblank_put(dev, crtc);
- return ret;
-}
-
-/**
- * Send the VBLANK signals.
- *
- * \param dev DRM device.
- * \param crtc CRTC where the vblank event occurred
- *
- * Sends a signal for each task in drm_device::vbl_sigs and empties the list.
- *
- * If a signal is not requested, then calls vblank_wait().
- */
-static void drm_vbl_send_signals(struct drm_device * dev, int crtc)
-{
- struct drm_vbl_sig *vbl_sig, *tmp;
- struct list_head *vbl_sigs;
- unsigned int vbl_seq;
- unsigned long flags;
-
- spin_lock_irqsave(&dev->vbl_lock, flags);
-
- vbl_sigs = &dev->vbl_sigs[crtc];
- vbl_seq = drm_vblank_count(dev, crtc);
-
- list_for_each_entry_safe(vbl_sig, tmp, vbl_sigs, head) {
- if ((vbl_seq - vbl_sig->sequence) <= (1 << 23)) {
- vbl_sig->info.si_code = vbl_seq;
- send_sig_info(vbl_sig->info.si_signo,
- &vbl_sig->info, vbl_sig->task);
-
- list_del(&vbl_sig->head);
-
- drm_free(vbl_sig, sizeof(*vbl_sig),
- DRM_MEM_DRIVER);
- atomic_dec(&dev->vbl_signal_pending);
- drm_vblank_put(dev, crtc);
- }
- }
-
- spin_unlock_irqrestore(&dev->vbl_lock, flags);
-}
-
-/**
- * drm_handle_vblank - handle a vblank event
- * @dev: DRM device
- * @crtc: where this event occurred
- *
- * Drivers should call this routine in their vblank interrupt handlers to
- * update the vblank counter and send any signals that may be pending.
- */
-void drm_handle_vblank(struct drm_device *dev, int crtc)
-{
- atomic_inc(&dev->_vblank_count[crtc]);
- DRM_WAKEUP(&dev->vbl_queue[crtc]);
- drm_vbl_send_signals(dev, crtc);
-}
-EXPORT_SYMBOL(drm_handle_vblank);
-
-/**
- * Tasklet wrapper function.
- *
- * \param data DRM device in disguise.
- *
- * Attempts to grab the HW lock and calls the driver callback on success. On
- * failure, leave the lock marked as contended so the callback can be called
- * from drm_unlock().
- */
-static void drm_locked_tasklet_func(unsigned long data)
-{
- struct drm_device *dev = (struct drm_device *)data;
- unsigned long irqflags;
- void (*tasklet_func)(struct drm_device *);
-
- spin_lock_irqsave(&dev->tasklet_lock, irqflags);
- tasklet_func = dev->locked_tasklet_func;
- spin_unlock_irqrestore(&dev->tasklet_lock, irqflags);
-
- if (!tasklet_func ||
- !drm_lock_take(&dev->lock,
- DRM_KERNEL_CONTEXT)) {
- return;
- }
-
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->counts[_DRM_STAT_LOCKS]);
-
- spin_lock_irqsave(&dev->tasklet_lock, irqflags);
- tasklet_func = dev->locked_tasklet_func;
- dev->locked_tasklet_func = NULL;
- spin_unlock_irqrestore(&dev->tasklet_lock, irqflags);
-
- if (tasklet_func != NULL)
- tasklet_func(dev);
-
- drm_lock_free(&dev->lock,
- DRM_KERNEL_CONTEXT);
-}
-
-/**
- * Schedule a tasklet to call back a driver hook with the HW lock held.
- *
- * \param dev DRM device.
- * \param func Driver callback.
- *
- * This is intended for triggering actions that require the HW lock from an
- * interrupt handler. The lock will be grabbed ASAP after the interrupt handler
- * completes. Note that the callback may be called from interrupt or process
- * context, it must not make any assumptions about this. Also, the HW lock will
- * be held with the kernel context or any client context.
- */
-void drm_locked_tasklet(struct drm_device *dev, void (*func)(struct drm_device *))
-{
- unsigned long irqflags;
- static DECLARE_TASKLET(drm_tasklet, drm_locked_tasklet_func, 0);
-
- if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ) ||
- test_bit(TASKLET_STATE_SCHED, &drm_tasklet.state))
- return;
-
- spin_lock_irqsave(&dev->tasklet_lock, irqflags);
-
- if (dev->locked_tasklet_func) {
- spin_unlock_irqrestore(&dev->tasklet_lock, irqflags);
- return;
- }
-
- dev->locked_tasklet_func = func;
-
- spin_unlock_irqrestore(&dev->tasklet_lock, irqflags);
-
- drm_tasklet.data = (unsigned long)dev;
-
- tasklet_hi_schedule(&drm_tasklet);
-}
-EXPORT_SYMBOL(drm_locked_tasklet);
+++ /dev/null
-/**
- * \file drm_lock.c
- * IOCTLs for locking
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Tue Feb 2 08:37:54 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-static int drm_notifier(void *priv);
-
-/**
- * Lock ioctl.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_lock structure.
- * \return zero on success or negative number on failure.
- *
- * Add the current task to the lock wait queue, and attempt to take to lock.
- */
-int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- DECLARE_WAITQUEUE(entry, current);
- struct drm_lock *lock = data;
- int ret = 0;
-
- ++file_priv->lock_count;
-
- if (lock->context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock->context);
- return -EINVAL;
- }
-
- DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
- lock->context, current->pid,
- dev->lock.hw_lock->lock, lock->flags);
-
- if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE))
- if (lock->context < 0)
- return -EINVAL;
-
- add_wait_queue(&dev->lock.lock_queue, &entry);
- spin_lock_bh(&dev->lock.spinlock);
- dev->lock.user_waiters++;
- spin_unlock_bh(&dev->lock.spinlock);
- for (;;) {
- __set_current_state(TASK_INTERRUPTIBLE);
- if (!dev->lock.hw_lock) {
- /* Device has been unregistered */
- ret = -EINTR;
- break;
- }
- if (drm_lock_take(&dev->lock, lock->context)) {
- dev->lock.file_priv = file_priv;
- dev->lock.lock_time = jiffies;
- atomic_inc(&dev->counts[_DRM_STAT_LOCKS]);
- break; /* Got lock */
- }
-
- /* Contention */
- schedule();
- if (signal_pending(current)) {
- ret = -ERESTARTSYS;
- break;
- }
- }
- spin_lock_bh(&dev->lock.spinlock);
- dev->lock.user_waiters--;
- spin_unlock_bh(&dev->lock.spinlock);
- __set_current_state(TASK_RUNNING);
- remove_wait_queue(&dev->lock.lock_queue, &entry);
-
- DRM_DEBUG("%d %s\n", lock->context,
- ret ? "interrupted" : "has lock");
- if (ret) return ret;
-
- /* don't set the block all signals on the master process for now
- * really probably not the correct answer but lets us debug xkb
- * xserver for now */
- if (!file_priv->master) {
- sigemptyset(&dev->sigmask);
- sigaddset(&dev->sigmask, SIGSTOP);
- sigaddset(&dev->sigmask, SIGTSTP);
- sigaddset(&dev->sigmask, SIGTTIN);
- sigaddset(&dev->sigmask, SIGTTOU);
- dev->sigdata.context = lock->context;
- dev->sigdata.lock = dev->lock.hw_lock;
- block_all_signals(drm_notifier, &dev->sigdata, &dev->sigmask);
- }
-
- if (dev->driver->dma_ready && (lock->flags & _DRM_LOCK_READY))
- dev->driver->dma_ready(dev);
-
- if (dev->driver->dma_quiescent && (lock->flags & _DRM_LOCK_QUIESCENT))
- {
- if (dev->driver->dma_quiescent(dev)) {
- DRM_DEBUG("%d waiting for DMA quiescent\n",
- lock->context);
- return -EBUSY;
- }
- }
-
- if (dev->driver->kernel_context_switch &&
- dev->last_context != lock->context) {
- dev->driver->kernel_context_switch(dev, dev->last_context,
- lock->context);
- }
-
- return 0;
-}
-
-/**
- * Unlock ioctl.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg user argument, pointing to a drm_lock structure.
- * \return zero on success or negative number on failure.
- *
- * Transfer and free the lock.
- */
-int drm_unlock(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_lock *lock = data;
- unsigned long irqflags;
- void (*tasklet_func)(struct drm_device *);
-
- if (lock->context == DRM_KERNEL_CONTEXT) {
- DRM_ERROR("Process %d using kernel context %d\n",
- current->pid, lock->context);
- return -EINVAL;
- }
-
- spin_lock_irqsave(&dev->tasklet_lock, irqflags);
- tasklet_func = dev->locked_tasklet_func;
- dev->locked_tasklet_func = NULL;
- spin_unlock_irqrestore(&dev->tasklet_lock, irqflags);
- if (tasklet_func != NULL)
- tasklet_func(dev);
-
- atomic_inc(&dev->counts[_DRM_STAT_UNLOCKS]);
-
- /* kernel_context_switch isn't used by any of the x86 drm
- * modules but is required by the Sparc driver.
- */
- if (dev->driver->kernel_context_switch_unlock)
- dev->driver->kernel_context_switch_unlock(dev);
- else {
- if (drm_lock_free(&dev->lock,lock->context)) {
- /* FIXME: Should really bail out here. */
- }
- }
-
- unblock_all_signals();
- return 0;
-}
-
-/**
- * Take the heavyweight lock.
- *
- * \param lock lock pointer.
- * \param context locking context.
- * \return one if the lock is held, or zero otherwise.
- *
- * Attempt to mark the lock as held by the given context, via the \p cmpxchg instruction.
- */
-int drm_lock_take(struct drm_lock_data *lock_data,
- unsigned int context)
-{
- unsigned int old, new, prev;
- volatile unsigned int *lock = &lock_data->hw_lock->lock;
-
- spin_lock_bh(&lock_data->spinlock);
- do {
- old = *lock;
- if (old & _DRM_LOCK_HELD)
- new = old | _DRM_LOCK_CONT;
- else {
- new = context | _DRM_LOCK_HELD |
- ((lock_data->user_waiters + lock_data->kernel_waiters > 1) ?
- _DRM_LOCK_CONT : 0);
- }
- prev = cmpxchg(lock, old, new);
- } while (prev != old);
- spin_unlock_bh(&lock_data->spinlock);
-
- /* Warn on recursive locking of user contexts. */
- if (_DRM_LOCKING_CONTEXT(old) == context && _DRM_LOCK_IS_HELD(old)) {
- if (context != DRM_KERNEL_CONTEXT) {
- DRM_ERROR("%d holds heavyweight lock\n",
- context);
- }
- return 0;
- }
-
- return !_DRM_LOCK_IS_HELD(old);
-}
-
-/**
- * This takes a lock forcibly and hands it to context. Should ONLY be used
- * inside *_unlock to give lock to kernel before calling *_dma_schedule.
- *
- * \param dev DRM device.
- * \param lock lock pointer.
- * \param context locking context.
- * \return always one.
- *
- * Resets the lock file pointer.
- * Marks the lock as held by the given context, via the \p cmpxchg instruction.
- */
-static int drm_lock_transfer(struct drm_lock_data *lock_data,
- unsigned int context)
-{
- unsigned int old, new, prev;
- volatile unsigned int *lock = &lock_data->hw_lock->lock;
-
- lock_data->file_priv = NULL;
- do {
- old = *lock;
- new = context | _DRM_LOCK_HELD;
- prev = cmpxchg(lock, old, new);
- } while (prev != old);
- return 1;
-}
-
-/**
- * Free lock.
- *
- * \param dev DRM device.
- * \param lock lock.
- * \param context context.
- *
- * Resets the lock file pointer.
- * Marks the lock as not held, via the \p cmpxchg instruction. Wakes any task
- * waiting on the lock queue.
- */
-int drm_lock_free(struct drm_lock_data *lock_data, unsigned int context)
-{
- unsigned int old, new, prev;
- volatile unsigned int *lock = &lock_data->hw_lock->lock;
-
- spin_lock_bh(&lock_data->spinlock);
- if (lock_data->kernel_waiters != 0) {
- drm_lock_transfer(lock_data, 0);
- lock_data->idle_has_lock = 1;
- spin_unlock_bh(&lock_data->spinlock);
- return 1;
- }
- spin_unlock_bh(&lock_data->spinlock);
-
- do {
- old = *lock;
- new = _DRM_LOCKING_CONTEXT(old);
- prev = cmpxchg(lock, old, new);
- } while (prev != old);
-
- if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) {
- DRM_ERROR("%d freed heavyweight lock held by %d\n",
- context, _DRM_LOCKING_CONTEXT(old));
- return 1;
- }
- wake_up_interruptible(&lock_data->lock_queue);
- return 0;
-}
-
-/**
- * If we get here, it means that the process has called DRM_IOCTL_LOCK
- * without calling DRM_IOCTL_UNLOCK.
- *
- * If the lock is not held, then let the signal proceed as usual. If the lock
- * is held, then set the contended flag and keep the signal blocked.
- *
- * \param priv pointer to a drm_sigdata structure.
- * \return one if the signal should be delivered normally, or zero if the
- * signal should be blocked.
- */
-static int drm_notifier(void *priv)
-{
- struct drm_sigdata *s = (struct drm_sigdata *) priv;
- unsigned int old, new, prev;
-
- /* Allow signal delivery if lock isn't held */
- if (!s->lock || !_DRM_LOCK_IS_HELD(s->lock->lock)
- || _DRM_LOCKING_CONTEXT(s->lock->lock) != s->context)
- return 1;
-
- /* Otherwise, set flag to force call to
- drmUnlock */
- do {
- old = s->lock->lock;
- new = old | _DRM_LOCK_CONT;
- prev = cmpxchg(&s->lock->lock, old, new);
- } while (prev != old);
- return 0;
-}
-
-/**
- * This function returns immediately and takes the hw lock
- * with the kernel context if it is free, otherwise it gets the highest priority when and if
- * it is eventually released.
- *
- * This guarantees that the kernel will _eventually_ have the lock _unless_ it is held
- * by a blocked process. (In the latter case an explicit wait for the hardware lock would cause
- * a deadlock, which is why the "idlelock" was invented).
- *
- * This should be sufficient to wait for GPU idle without
- * having to worry about starvation.
- */
-
-void drm_idlelock_take(struct drm_lock_data *lock_data)
-{
- int ret = 0;
-
- spin_lock_bh(&lock_data->spinlock);
- lock_data->kernel_waiters++;
- if (!lock_data->idle_has_lock) {
-
- spin_unlock_bh(&lock_data->spinlock);
- ret = drm_lock_take(lock_data, DRM_KERNEL_CONTEXT);
- spin_lock_bh(&lock_data->spinlock);
-
- if (ret == 1)
- lock_data->idle_has_lock = 1;
- }
- spin_unlock_bh(&lock_data->spinlock);
-}
-EXPORT_SYMBOL(drm_idlelock_take);
-
-void drm_idlelock_release(struct drm_lock_data *lock_data)
-{
- unsigned int old, prev;
- volatile unsigned int *lock = &lock_data->hw_lock->lock;
-
- spin_lock_bh(&lock_data->spinlock);
- if (--lock_data->kernel_waiters == 0) {
- if (lock_data->idle_has_lock) {
- do {
- old = *lock;
- prev = cmpxchg(lock, old, DRM_KERNEL_CONTEXT);
- } while (prev != old);
- wake_up_interruptible(&lock_data->lock_queue);
- lock_data->idle_has_lock = 0;
- }
- }
- spin_unlock_bh(&lock_data->spinlock);
-}
-EXPORT_SYMBOL(drm_idlelock_release);
-
-int drm_i_have_hw_lock(struct drm_device *dev, struct drm_file *file_priv)
-{
-
- return (file_priv->lock_count && dev->lock.hw_lock &&
- _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) &&
- dev->lock.file_priv == file_priv);
-}
-
-EXPORT_SYMBOL(drm_i_have_hw_lock);
+++ /dev/null
-/**
- * \file drm_memory.c
- * Memory management wrappers for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Thu Feb 4 14:00:34 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/highmem.h>
-#include "drmP.h"
-
-static struct {
- spinlock_t lock;
- uint64_t cur_used;
- uint64_t emer_used;
- uint64_t low_threshold;
- uint64_t high_threshold;
- uint64_t emer_threshold;
-} drm_memctl = {
- .lock = SPIN_LOCK_UNLOCKED
-};
-
-static inline size_t drm_size_align(size_t size)
-{
- size_t tmpSize = 4;
- if (size > PAGE_SIZE)
- return PAGE_ALIGN(size);
-
- while (tmpSize < size)
- tmpSize <<= 1;
-
- return (size_t) tmpSize;
-}
-
-int drm_alloc_memctl(size_t size)
-{
- int ret = 0;
- unsigned long a_size = drm_size_align(size);
- unsigned long new_used;
-
- spin_lock(&drm_memctl.lock);
- new_used = drm_memctl.cur_used + a_size;
- if (likely(new_used < drm_memctl.high_threshold)) {
- drm_memctl.cur_used = new_used;
- goto out;
- }
-
- /*
- * Allow small allocations from root-only processes to
- * succeed until the emergency threshold is reached.
- */
-
- new_used += drm_memctl.emer_used;
- if (unlikely(!DRM_SUSER(DRM_CURPROC) ||
- (a_size > 16*PAGE_SIZE) ||
- (new_used > drm_memctl.emer_threshold))) {
- ret = -ENOMEM;
- goto out;
- }
-
- drm_memctl.cur_used = drm_memctl.high_threshold;
- drm_memctl.emer_used = new_used - drm_memctl.high_threshold;
-out:
- spin_unlock(&drm_memctl.lock);
- return ret;
-}
-EXPORT_SYMBOL(drm_alloc_memctl);
-
-
-void drm_free_memctl(size_t size)
-{
- unsigned long a_size = drm_size_align(size);
-
- spin_lock(&drm_memctl.lock);
- if (likely(a_size >= drm_memctl.emer_used)) {
- a_size -= drm_memctl.emer_used;
- drm_memctl.emer_used = 0;
- } else {
- drm_memctl.emer_used -= a_size;
- a_size = 0;
- }
- drm_memctl.cur_used -= a_size;
- spin_unlock(&drm_memctl.lock);
-}
-EXPORT_SYMBOL(drm_free_memctl);
-
-void drm_query_memctl(uint64_t *cur_used,
- uint64_t *emer_used,
- uint64_t *low_threshold,
- uint64_t *high_threshold,
- uint64_t *emer_threshold)
-{
- spin_lock(&drm_memctl.lock);
- *cur_used = drm_memctl.cur_used;
- *emer_used = drm_memctl.emer_used;
- *low_threshold = drm_memctl.low_threshold;
- *high_threshold = drm_memctl.high_threshold;
- *emer_threshold = drm_memctl.emer_threshold;
- spin_unlock(&drm_memctl.lock);
-}
-EXPORT_SYMBOL(drm_query_memctl);
-
-void drm_init_memctl(size_t p_low_threshold,
- size_t p_high_threshold,
- size_t unit_size)
-{
- spin_lock(&drm_memctl.lock);
- drm_memctl.emer_used = 0;
- drm_memctl.cur_used = 0;
- drm_memctl.low_threshold = p_low_threshold * unit_size;
- drm_memctl.high_threshold = p_high_threshold * unit_size;
- drm_memctl.emer_threshold = (drm_memctl.high_threshold >> 4) +
- drm_memctl.high_threshold;
- spin_unlock(&drm_memctl.lock);
-}
-
-
-#ifndef DEBUG_MEMORY
-
-/** No-op. */
-void drm_mem_init(void)
-{
-}
-
-/**
- * Called when "/proc/dri/%dev%/mem" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param len requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- *
- * No-op.
- */
-int drm_mem_info(char *buf, char **start, off_t offset,
- int len, int *eof, void *data)
-{
- return 0;
-}
-
-/** Wrapper around kmalloc() */
-void *drm_calloc(size_t nmemb, size_t size, int area)
-{
- return kcalloc(nmemb, size, GFP_KERNEL);
-}
-EXPORT_SYMBOL(drm_calloc);
-
-/** Wrapper around kmalloc() and kfree() */
-void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area)
-{
- void *pt;
-
- if (!(pt = kmalloc(size, GFP_KERNEL)))
- return NULL;
- if (oldpt && oldsize) {
- memcpy(pt, oldpt, DRM_MIN(oldsize,size));
- kfree(oldpt);
- }
- return pt;
-}
-
-/**
- * Allocate pages.
- *
- * \param order size order.
- * \param area memory area. (Not used.)
- * \return page address on success, or zero on failure.
- *
- * Allocate and reserve free pages.
- */
-unsigned long drm_alloc_pages(int order, int area)
-{
- unsigned long address;
- unsigned long bytes = PAGE_SIZE << order;
- unsigned long addr;
- unsigned int sz;
-
- address = __get_free_pages(GFP_KERNEL, order);
- if (!address)
- return 0;
-
- /* Zero */
- memset((void *)address, 0, bytes);
-
- /* Reserve */
- for (addr = address, sz = bytes;
- sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
- SetPageReserved(virt_to_page(addr));
- }
-
- return address;
-}
-
-/**
- * Free pages.
- *
- * \param address address of the pages to free.
- * \param order size order.
- * \param area memory area. (Not used.)
- *
- * Unreserve and free pages allocated by alloc_pages().
- */
-void drm_free_pages(unsigned long address, int order, int area)
-{
- unsigned long bytes = PAGE_SIZE << order;
- unsigned long addr;
- unsigned int sz;
-
- if (!address)
- return;
-
- /* Unreserve */
- for (addr = address, sz = bytes;
- sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
- ClearPageReserved(virt_to_page(addr));
- }
-
- free_pages(address, order);
-}
-
-#if __OS_HAS_AGP
-static void *agp_remap(unsigned long offset, unsigned long size,
- struct drm_device * dev)
-{
- unsigned long *phys_addr_map, i, num_pages =
- PAGE_ALIGN(size) / PAGE_SIZE;
- struct drm_agp_mem *agpmem;
- struct page **page_map;
- void *addr;
-
- size = PAGE_ALIGN(size);
-
-#ifdef __alpha__
- offset -= dev->hose->mem_space->start;
-#endif
-
- list_for_each_entry(agpmem, &dev->agp->memory, head)
- if (agpmem->bound <= offset
- && (agpmem->bound + (agpmem->pages << PAGE_SHIFT)) >=
- (offset + size))
- break;
- if (!agpmem)
- return NULL;
-
- /*
- * OK, we're mapping AGP space on a chipset/platform on which memory accesses by
- * the CPU do not get remapped by the GART. We fix this by using the kernel's
- * page-table instead (that's probably faster anyhow...).
- */
- /* note: use vmalloc() because num_pages could be large... */
- page_map = vmalloc(num_pages * sizeof(struct page *));
- if (!page_map)
- return NULL;
-
- phys_addr_map =
- agpmem->memory->memory + (offset - agpmem->bound) / PAGE_SIZE;
- for (i = 0; i < num_pages; ++i)
- page_map[i] = pfn_to_page(phys_addr_map[i] >> PAGE_SHIFT);
- addr = vmap(page_map, num_pages, VM_IOREMAP, PAGE_AGP);
- vfree(page_map);
-
- return addr;
-}
-
-/** Wrapper around agp_allocate_memory() */
-DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type)
-{
- return drm_agp_allocate_memory(dev->agp->bridge, pages, type);
-}
-
-/** Wrapper around agp_free_memory() */
-int drm_free_agp(DRM_AGP_MEM * handle, int pages)
-{
- return drm_agp_free_memory(handle) ? 0 : -EINVAL;
-}
-EXPORT_SYMBOL(drm_free_agp);
-
-/** Wrapper around agp_bind_memory() */
-int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start)
-{
- return drm_agp_bind_memory(handle, start);
-}
-
-/** Wrapper around agp_unbind_memory() */
-int drm_unbind_agp(DRM_AGP_MEM * handle)
-{
- return drm_agp_unbind_memory(handle);
-}
-EXPORT_SYMBOL(drm_unbind_agp);
-
-#else /* __OS_HAS_AGP*/
-static void *agp_remap(unsigned long offset, unsigned long size,
- struct drm_device * dev)
-{
- return NULL;
-}
-#endif /* agp */
-#else
-static void *agp_remap(unsigned long offset, unsigned long size,
- struct drm_device * dev)
-{
- return NULL;
-}
-#endif /* debug_memory */
-
-void drm_core_ioremap(struct drm_map *map, struct drm_device *dev)
-{
- if (drm_core_has_AGP(dev) &&
- dev->agp && dev->agp->cant_use_aperture && map->type == _DRM_AGP)
- map->handle = agp_remap(map->offset, map->size, dev);
- else
- map->handle = ioremap(map->offset, map->size);
-}
-EXPORT_SYMBOL_GPL(drm_core_ioremap);
-
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
-void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev)
-{
- map->handle = ioremap_wc(map->offset, map->size);
-}
-EXPORT_SYMBOL_GPL(drm_core_ioremap_wc);
-#endif
-
-void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev)
-{
- if (!map->handle || !map->size)
- return;
-
- if (drm_core_has_AGP(dev) &&
- dev->agp && dev->agp->cant_use_aperture && map->type == _DRM_AGP)
- vunmap(map->handle);
- else
- iounmap(map->handle);
-}
-EXPORT_SYMBOL_GPL(drm_core_ioremapfree);
+++ /dev/null
-/**
- * \file drm_memory.h
- * Memory management wrappers for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Thu Feb 4 14:00:34 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/highmem.h>
-#include <linux/vmalloc.h>
-#include "drmP.h"
-
-/**
- * Cut down version of drm_memory_debug.h, which used to be called
- * drm_memory.h.
- */
-
-#if __OS_HAS_AGP
-
-#include <linux/vmalloc.h>
-
-#ifdef HAVE_PAGE_AGP
-#include <asm/agp.h>
-#else
-# ifdef __powerpc__
-# define PAGE_AGP __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
-# else
-# define PAGE_AGP PAGE_KERNEL
-# endif
-#endif
-
-#else /* __OS_HAS_AGP */
-
-#endif
+++ /dev/null
-/**
- * \file drm_memory_debug.c
- * Memory management wrappers for DRM.
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-#ifdef DEBUG_MEMORY
-
-typedef struct drm_mem_stats {
- const char *name;
- int succeed_count;
- int free_count;
- int fail_count;
- unsigned long bytes_allocated;
- unsigned long bytes_freed;
-} drm_mem_stats_t;
-
-static spinlock_t drm_mem_lock = SPIN_LOCK_UNLOCKED;
-static unsigned long drm_ram_available = 0; /* In pages */
-static unsigned long drm_ram_used = 0;
-static drm_mem_stats_t drm_mem_stats[] = {
- [DRM_MEM_DMA] = {"dmabufs"},
- [DRM_MEM_SAREA] = {"sareas"},
- [DRM_MEM_DRIVER] = {"driver"},
- [DRM_MEM_MAGIC] = {"magic"},
- [DRM_MEM_IOCTLS] = {"ioctltab"},
- [DRM_MEM_MAPS] = {"maplist"},
- [DRM_MEM_VMAS] = {"vmalist"},
- [DRM_MEM_BUFS] = {"buflist"},
- [DRM_MEM_SEGS] = {"seglist"},
- [DRM_MEM_PAGES] = {"pagelist"},
- [DRM_MEM_FILES] = {"files"},
- [DRM_MEM_QUEUES] = {"queues"},
- [DRM_MEM_CMDS] = {"commands"},
- [DRM_MEM_MAPPINGS] = {"mappings"},
- [DRM_MEM_BUFLISTS] = {"buflists"},
- [DRM_MEM_AGPLISTS] = {"agplist"},
- [DRM_MEM_SGLISTS] = {"sglist"},
- [DRM_MEM_TOTALAGP] = {"totalagp"},
- [DRM_MEM_BOUNDAGP] = {"boundagp"},
- [DRM_MEM_CTXBITMAP] = {"ctxbitmap"},
- [DRM_MEM_CTXLIST] = {"ctxlist"},
- [DRM_MEM_STUB] = {"stub"},
- {NULL, 0,} /* Last entry must be null */
-};
-
-void drm_mem_init(void)
-{
- drm_mem_stats_t *mem;
- struct sysinfo si;
-
- for (mem = drm_mem_stats; mem->name; ++mem) {
- mem->succeed_count = 0;
- mem->free_count = 0;
- mem->fail_count = 0;
- mem->bytes_allocated = 0;
- mem->bytes_freed = 0;
- }
-
- si_meminfo(&si);
- drm_ram_available = si.totalram;
- drm_ram_used = 0;
-}
-
-/* drm_mem_info is called whenever a process reads /dev/drm/mem. */
-
-static int drm__mem_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data)
-{
- drm_mem_stats_t *pt;
- int len = 0;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *eof = 0;
- *start = &buf[offset];
-
- DRM_PROC_PRINT(" total counts "
- " | outstanding \n");
- DRM_PROC_PRINT("type alloc freed fail bytes freed"
- " | allocs bytes\n\n");
- DRM_PROC_PRINT("%-9.9s %5d %5d %4d %10lu kB |\n",
- "system", 0, 0, 0,
- drm_ram_available << (PAGE_SHIFT - 10));
- DRM_PROC_PRINT("%-9.9s %5d %5d %4d %10lu kB |\n",
- "locked", 0, 0, 0, drm_ram_used >> 10);
- DRM_PROC_PRINT("\n");
- for (pt = drm_mem_stats; pt->name; pt++) {
- DRM_PROC_PRINT("%-9.9s %5d %5d %4d %10lu %10lu | %6d %10ld\n",
- pt->name,
- pt->succeed_count,
- pt->free_count,
- pt->fail_count,
- pt->bytes_allocated,
- pt->bytes_freed,
- pt->succeed_count - pt->free_count,
- (long)pt->bytes_allocated
- - (long)pt->bytes_freed);
- }
-
- if (len > request + offset)
- return request;
- *eof = 1;
- return len - offset;
-}
-
-int drm_mem_info(char *buf, char **start, off_t offset,
- int len, int *eof, void *data)
-{
- int ret;
-
- spin_lock(&drm_mem_lock);
- ret = drm__mem_info(buf, start, offset, len, eof, data);
- spin_unlock(&drm_mem_lock);
- return ret;
-}
-
-void *drm_alloc(size_t size, int area)
-{
- void *pt;
-
- if (!size) {
- DRM_MEM_ERROR(area, "Allocating 0 bytes\n");
- return NULL;
- }
-
- if (!(pt = kmalloc(size, GFP_KERNEL))) {
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].fail_count;
- spin_unlock(&drm_mem_lock);
- return NULL;
- }
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].succeed_count;
- drm_mem_stats[area].bytes_allocated += size;
- spin_unlock(&drm_mem_lock);
- return pt;
-}
-EXPORT_SYMBOL(drm_alloc);
-
-void *drm_calloc(size_t nmemb, size_t size, int area)
-{
- void *addr;
-
- addr = drm_alloc(nmemb * size, area);
- if (addr != NULL)
- memset((void *)addr, 0, size * nmemb);
-
- return addr;
-}
-EXPORT_SYMBOL(drm_calloc);
-
-void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area)
-{
- void *pt;
-
- if (!(pt = drm_alloc(size, area)))
- return NULL;
- if (oldpt && oldsize) {
- memcpy(pt, oldpt, oldsize);
- drm_free(oldpt, oldsize, area);
- }
- return pt;
-}
-EXPORT_SYMBOL(drm_realloc);
-
-void drm_free(void *pt, size_t size, int area)
-{
- int alloc_count;
- int free_count;
-
- if (!pt)
- DRM_MEM_ERROR(area, "Attempt to free NULL pointer\n");
- else
- kfree(pt);
- spin_lock(&drm_mem_lock);
- drm_mem_stats[area].bytes_freed += size;
- free_count = ++drm_mem_stats[area].free_count;
- alloc_count = drm_mem_stats[area].succeed_count;
- spin_unlock(&drm_mem_lock);
- if (free_count > alloc_count) {
- DRM_MEM_ERROR(area, "Excess frees: %d frees, %d allocs\n",
- free_count, alloc_count);
- }
-}
-EXPORT_SYMBOL(drm_free);
-
-unsigned long drm_alloc_pages(int order, int area)
-{
- unsigned long address;
- unsigned long bytes = PAGE_SIZE << order;
- unsigned long addr;
- unsigned int sz;
-
- spin_lock(&drm_mem_lock);
- if ((drm_ram_used >> PAGE_SHIFT)
- > (DRM_RAM_PERCENT * drm_ram_available) / 100) {
- spin_unlock(&drm_mem_lock);
- return 0;
- }
- spin_unlock(&drm_mem_lock);
-
- address = __get_free_pages(GFP_KERNEL, order);
- if (!address) {
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].fail_count;
- spin_unlock(&drm_mem_lock);
- return 0;
- }
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].succeed_count;
- drm_mem_stats[area].bytes_allocated += bytes;
- drm_ram_used += bytes;
- spin_unlock(&drm_mem_lock);
-
- /* Zero outside the lock */
- memset((void *)address, 0, bytes);
-
- /* Reserve */
- for (addr = address, sz = bytes;
- sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
- SetPageReserved(virt_to_page(addr));
- }
-
- return address;
-}
-
-void drm_free_pages(unsigned long address, int order, int area)
-{
- unsigned long bytes = PAGE_SIZE << order;
- int alloc_count;
- int free_count;
- unsigned long addr;
- unsigned int sz;
-
- if (!address) {
- DRM_MEM_ERROR(area, "Attempt to free address 0\n");
- } else {
- /* Unreserve */
- for (addr = address, sz = bytes;
- sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
- ClearPageReserved(virt_to_page(addr));
- }
- free_pages(address, order);
- }
-
- spin_lock(&drm_mem_lock);
- free_count = ++drm_mem_stats[area].free_count;
- alloc_count = drm_mem_stats[area].succeed_count;
- drm_mem_stats[area].bytes_freed += bytes;
- drm_ram_used -= bytes;
- spin_unlock(&drm_mem_lock);
- if (free_count > alloc_count) {
- DRM_MEM_ERROR(area,
- "Excess frees: %d frees, %d allocs\n",
- free_count, alloc_count);
- }
-}
-
-#if __OS_HAS_AGP
-
-DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type)
-{
- DRM_AGP_MEM *handle;
-
- if (!pages) {
- DRM_MEM_ERROR(DRM_MEM_TOTALAGP, "Allocating 0 pages\n");
- return NULL;
- }
-
- if ((handle = drm_agp_allocate_memory(dev->agp->bridge, pages, type))) {
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[DRM_MEM_TOTALAGP].succeed_count;
- drm_mem_stats[DRM_MEM_TOTALAGP].bytes_allocated
- += pages << PAGE_SHIFT;
- spin_unlock(&drm_mem_lock);
- return handle;
- }
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[DRM_MEM_TOTALAGP].fail_count;
- spin_unlock(&drm_mem_lock);
- return NULL;
-}
-
-int drm_free_agp(DRM_AGP_MEM * handle, int pages)
-{
- int alloc_count;
- int free_count;
- int retval = -EINVAL;
-
- if (!handle) {
- DRM_MEM_ERROR(DRM_MEM_TOTALAGP,
- "Attempt to free NULL AGP handle\n");
- return retval;
- }
-
- if (drm_agp_free_memory(handle)) {
- spin_lock(&drm_mem_lock);
- free_count = ++drm_mem_stats[DRM_MEM_TOTALAGP].free_count;
- alloc_count = drm_mem_stats[DRM_MEM_TOTALAGP].succeed_count;
- drm_mem_stats[DRM_MEM_TOTALAGP].bytes_freed
- += pages << PAGE_SHIFT;
- spin_unlock(&drm_mem_lock);
- if (free_count > alloc_count) {
- DRM_MEM_ERROR(DRM_MEM_TOTALAGP,
- "Excess frees: %d frees, %d allocs\n",
- free_count, alloc_count);
- }
- return 0;
- }
- return retval;
-}
-
-int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start)
-{
- int retcode = -EINVAL;
-
- if (!handle) {
- DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
- "Attempt to bind NULL AGP handle\n");
- return retcode;
- }
-
- if (!(retcode = drm_agp_bind_memory(handle, start))) {
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[DRM_MEM_BOUNDAGP].succeed_count;
- drm_mem_stats[DRM_MEM_BOUNDAGP].bytes_allocated
- += handle->page_count << PAGE_SHIFT;
- spin_unlock(&drm_mem_lock);
- return retcode;
- }
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[DRM_MEM_BOUNDAGP].fail_count;
- spin_unlock(&drm_mem_lock);
- return retcode;
-}
-
-int drm_unbind_agp(DRM_AGP_MEM * handle)
-{
- int alloc_count;
- int free_count;
- int retcode = -EINVAL;
-
- if (!handle) {
- DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
- "Attempt to unbind NULL AGP handle\n");
- return retcode;
- }
-
- if ((retcode = drm_agp_unbind_memory(handle)))
- return retcode;
- spin_lock(&drm_mem_lock);
- free_count = ++drm_mem_stats[DRM_MEM_BOUNDAGP].free_count;
- alloc_count = drm_mem_stats[DRM_MEM_BOUNDAGP].succeed_count;
- drm_mem_stats[DRM_MEM_BOUNDAGP].bytes_freed
- += handle->page_count << PAGE_SHIFT;
- spin_unlock(&drm_mem_lock);
- if (free_count > alloc_count) {
- DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
- "Excess frees: %d frees, %d allocs\n",
- free_count, alloc_count);
- }
- return retcode;
-}
-
-#endif
-#endif
+++ /dev/null
-/**
- * \file drm_memory_debug.h
- * Memory management wrappers for DRM.
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-typedef struct drm_mem_stats {
- const char *name;
- int succeed_count;
- int free_count;
- int fail_count;
- unsigned long bytes_allocated;
- unsigned long bytes_freed;
-} drm_mem_stats_t;
-
-static spinlock_t drm_mem_lock = SPIN_LOCK_UNLOCKED;
-static unsigned long drm_ram_available = 0; /* In pages */
-static unsigned long drm_ram_used = 0;
-static drm_mem_stats_t drm_mem_stats[] =
-{
- [DRM_MEM_DMA] = {"dmabufs"},
- [DRM_MEM_SAREA] = {"sareas"},
- [DRM_MEM_DRIVER] = {"driver"},
- [DRM_MEM_MAGIC] = {"magic"},
- [DRM_MEM_IOCTLS] = {"ioctltab"},
- [DRM_MEM_MAPS] = {"maplist"},
- [DRM_MEM_VMAS] = {"vmalist"},
- [DRM_MEM_BUFS] = {"buflist"},
- [DRM_MEM_SEGS] = {"seglist"},
- [DRM_MEM_PAGES] = {"pagelist"},
- [DRM_MEM_FILES] = {"files"},
- [DRM_MEM_QUEUES] = {"queues"},
- [DRM_MEM_CMDS] = {"commands"},
- [DRM_MEM_MAPPINGS] = {"mappings"},
- [DRM_MEM_BUFLISTS] = {"buflists"},
- [DRM_MEM_AGPLISTS] = {"agplist"},
- [DRM_MEM_SGLISTS] = {"sglist"},
- [DRM_MEM_TOTALAGP] = {"totalagp"},
- [DRM_MEM_BOUNDAGP] = {"boundagp"},
- [DRM_MEM_CTXBITMAP] = {"ctxbitmap"},
- [DRM_MEM_CTXLIST] = {"ctxlist"},
- [DRM_MEM_STUB] = {"stub"},
- {NULL, 0,} /* Last entry must be null */
-};
-
-void drm_mem_init (void) {
- drm_mem_stats_t *mem;
- struct sysinfo si;
-
- for (mem = drm_mem_stats; mem->name; ++mem) {
- mem->succeed_count = 0;
- mem->free_count = 0;
- mem->fail_count = 0;
- mem->bytes_allocated = 0;
- mem->bytes_freed = 0;
- }
-
- si_meminfo(&si);
- drm_ram_available = si.totalram;
- drm_ram_used = 0;
-}
-
-/* drm_mem_info is called whenever a process reads /dev/drm/mem. */
-
-static int drm__mem_info (char *buf, char **start, off_t offset,
- int request, int *eof, void *data) {
- drm_mem_stats_t *pt;
- int len = 0;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *eof = 0;
- *start = &buf[offset];
-
- DRM_PROC_PRINT(" total counts "
- " | outstanding \n");
- DRM_PROC_PRINT("type alloc freed fail bytes freed"
- " | allocs bytes\n\n");
- DRM_PROC_PRINT("%-9.9s %5d %5d %4d %10lu kB |\n",
- "system", 0, 0, 0,
- drm_ram_available << (PAGE_SHIFT - 10));
- DRM_PROC_PRINT("%-9.9s %5d %5d %4d %10lu kB |\n",
- "locked", 0, 0, 0, drm_ram_used >> 10);
- DRM_PROC_PRINT("\n");
- for (pt = drm_mem_stats; pt->name; pt++) {
- DRM_PROC_PRINT("%-9.9s %5d %5d %4d %10lu %10lu | %6d %10ld\n",
- pt->name,
- pt->succeed_count,
- pt->free_count,
- pt->fail_count,
- pt->bytes_allocated,
- pt->bytes_freed,
- pt->succeed_count - pt->free_count,
- (long)pt->bytes_allocated
- - (long)pt->bytes_freed);
- }
-
- if (len > request + offset)
- return request;
- *eof = 1;
- return len - offset;
-}
-
-int drm_mem_info (char *buf, char **start, off_t offset,
- int len, int *eof, void *data) {
- int ret;
-
- spin_lock(&drm_mem_lock);
- ret = drm__mem_info (buf, start, offset, len, eof, data);
- spin_unlock(&drm_mem_lock);
- return ret;
-}
-
-void *drm_alloc (size_t size, int area) {
- void *pt;
-
- if (!size) {
- DRM_MEM_ERROR(area, "Allocating 0 bytes\n");
- return NULL;
- }
-
- if (!(pt = kmalloc(size, GFP_KERNEL))) {
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].fail_count;
- spin_unlock(&drm_mem_lock);
- return NULL;
- }
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].succeed_count;
- drm_mem_stats[area].bytes_allocated += size;
- spin_unlock(&drm_mem_lock);
- return pt;
-}
-
-void *drm_calloc (size_t nmemb, size_t size, int area) {
- void *addr;
-
- addr = drm_alloc (nmemb * size, area);
- if (addr != NULL)
- memset((void *)addr, 0, size * nmemb);
-
- return addr;
-}
-
-void *drm_realloc (void *oldpt, size_t oldsize, size_t size, int area) {
- void *pt;
-
- if (!(pt = drm_alloc (size, area)))
- return NULL;
- if (oldpt && oldsize) {
- memcpy(pt, oldpt, oldsize);
- drm_free (oldpt, oldsize, area);
- }
- return pt;
-}
-
-void drm_free (void *pt, size_t size, int area) {
- int alloc_count;
- int free_count;
-
- if (!pt)
- DRM_MEM_ERROR(area, "Attempt to free NULL pointer\n");
- else
- kfree(pt);
- spin_lock(&drm_mem_lock);
- drm_mem_stats[area].bytes_freed += size;
- free_count = ++drm_mem_stats[area].free_count;
- alloc_count = drm_mem_stats[area].succeed_count;
- spin_unlock(&drm_mem_lock);
- if (free_count > alloc_count) {
- DRM_MEM_ERROR(area, "Excess frees: %d frees, %d allocs\n",
- free_count, alloc_count);
- }
-}
-
-unsigned long drm_alloc_pages (int order, int area) {
- unsigned long address;
- unsigned long bytes = PAGE_SIZE << order;
- unsigned long addr;
- unsigned int sz;
-
- spin_lock(&drm_mem_lock);
- if ((drm_ram_used >> PAGE_SHIFT)
- > (DRM_RAM_PERCENT * drm_ram_available) / 100) {
- spin_unlock(&drm_mem_lock);
- return 0;
- }
- spin_unlock(&drm_mem_lock);
-
- address = __get_free_pages(GFP_KERNEL, order);
- if (!address) {
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].fail_count;
- spin_unlock(&drm_mem_lock);
- return 0;
- }
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].succeed_count;
- drm_mem_stats[area].bytes_allocated += bytes;
- drm_ram_used += bytes;
- spin_unlock(&drm_mem_lock);
-
- /* Zero outside the lock */
- memset((void *)address, 0, bytes);
-
- /* Reserve */
- for (addr = address, sz = bytes;
- sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
- SetPageReserved(virt_to_page(addr));
- }
-
- return address;
-}
-
-void drm_free_pages (unsigned long address, int order, int area) {
- unsigned long bytes = PAGE_SIZE << order;
- int alloc_count;
- int free_count;
- unsigned long addr;
- unsigned int sz;
-
- if (!address) {
- DRM_MEM_ERROR(area, "Attempt to free address 0\n");
- } else {
- /* Unreserve */
- for (addr = address, sz = bytes;
- sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
- ClearPageReserved(virt_to_page(addr));
- }
- free_pages(address, order);
- }
-
- spin_lock(&drm_mem_lock);
- free_count = ++drm_mem_stats[area].free_count;
- alloc_count = drm_mem_stats[area].succeed_count;
- drm_mem_stats[area].bytes_freed += bytes;
- drm_ram_used -= bytes;
- spin_unlock(&drm_mem_lock);
- if (free_count > alloc_count) {
- DRM_MEM_ERROR(area,
- "Excess frees: %d frees, %d allocs\n",
- free_count, alloc_count);
- }
-}
-
-#if __OS_HAS_AGP
-
-DRM_AGP_MEM *drm_alloc_agp (struct drm_device *dev, int pages, u32 type) {
- DRM_AGP_MEM *handle;
-
- if (!pages) {
- DRM_MEM_ERROR(DRM_MEM_TOTALAGP, "Allocating 0 pages\n");
- return NULL;
- }
-
- if ((handle = drm_agp_allocate_memory (pages, type))) {
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[DRM_MEM_TOTALAGP].succeed_count;
- drm_mem_stats[DRM_MEM_TOTALAGP].bytes_allocated
- += pages << PAGE_SHIFT;
- spin_unlock(&drm_mem_lock);
- return handle;
- }
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[DRM_MEM_TOTALAGP].fail_count;
- spin_unlock(&drm_mem_lock);
- return NULL;
-}
-
-int drm_free_agp (DRM_AGP_MEM * handle, int pages) {
- int alloc_count;
- int free_count;
- int retval = -EINVAL;
-
- if (!handle) {
- DRM_MEM_ERROR(DRM_MEM_TOTALAGP,
- "Attempt to free NULL AGP handle\n");
- return retval;
- }
-
- if (drm_agp_free_memory (handle)) {
- spin_lock(&drm_mem_lock);
- free_count = ++drm_mem_stats[DRM_MEM_TOTALAGP].free_count;
- alloc_count = drm_mem_stats[DRM_MEM_TOTALAGP].succeed_count;
- drm_mem_stats[DRM_MEM_TOTALAGP].bytes_freed
- += pages << PAGE_SHIFT;
- spin_unlock(&drm_mem_lock);
- if (free_count > alloc_count) {
- DRM_MEM_ERROR(DRM_MEM_TOTALAGP,
- "Excess frees: %d frees, %d allocs\n",
- free_count, alloc_count);
- }
- return 0;
- }
- return retval;
-}
-
-int drm_bind_agp (DRM_AGP_MEM * handle, unsigned int start) {
- int retcode = -EINVAL;
-
- if (!handle) {
- DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
- "Attempt to bind NULL AGP handle\n");
- return retcode;
- }
-
- if (!(retcode = drm_agp_bind_memory (handle, start))) {
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[DRM_MEM_BOUNDAGP].succeed_count;
- drm_mem_stats[DRM_MEM_BOUNDAGP].bytes_allocated
- += handle->page_count << PAGE_SHIFT;
- spin_unlock(&drm_mem_lock);
- return retcode;
- }
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[DRM_MEM_BOUNDAGP].fail_count;
- spin_unlock(&drm_mem_lock);
- return retcode;
-}
-
-int drm_unbind_agp (DRM_AGP_MEM * handle) {
- int alloc_count;
- int free_count;
- int retcode = -EINVAL;
-
- if (!handle) {
- DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
- "Attempt to unbind NULL AGP handle\n");
- return retcode;
- }
-
- if ((retcode = drm_agp_unbind_memory (handle)))
- return retcode;
- spin_lock(&drm_mem_lock);
- free_count = ++drm_mem_stats[DRM_MEM_BOUNDAGP].free_count;
- alloc_count = drm_mem_stats[DRM_MEM_BOUNDAGP].succeed_count;
- drm_mem_stats[DRM_MEM_BOUNDAGP].bytes_freed
- += handle->page_count << PAGE_SHIFT;
- spin_unlock(&drm_mem_lock);
- if (free_count > alloc_count) {
- DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
- "Excess frees: %d frees, %d allocs\n",
- free_count, alloc_count);
- }
- return retcode;
-}
-#endif
+++ /dev/null
-/**************************************************************************
- *
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- *
- **************************************************************************/
-
-/*
- * Generic simple memory manager implementation. Intended to be used as a base
- * class implementation for more advanced memory managers.
- *
- * Note that the algorithm used is quite simple and there might be substantial
- * performance gains if a smarter free list is implemented. Currently it is just an
- * unordered stack of free regions. This could easily be improved if an RB-tree
- * is used instead. At least if we expect heavy fragmentation.
- *
- * Aligned allocations can also see improvement.
- *
- * Authors:
- * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#include "drmP.h"
-#include <linux/slab.h>
-
-unsigned long drm_mm_tail_space(struct drm_mm *mm)
-{
- struct list_head *tail_node;
- struct drm_mm_node *entry;
-
- tail_node = mm->ml_entry.prev;
- entry = list_entry(tail_node, struct drm_mm_node, ml_entry);
- if (!entry->free)
- return 0;
-
- return entry->size;
-}
-
-int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size)
-{
- struct list_head *tail_node;
- struct drm_mm_node *entry;
-
- tail_node = mm->ml_entry.prev;
- entry = list_entry(tail_node, struct drm_mm_node, ml_entry);
- if (!entry->free)
- return -ENOMEM;
-
- if (entry->size <= size)
- return -ENOMEM;
-
- entry->size -= size;
- return 0;
-}
-
-
-static int drm_mm_create_tail_node(struct drm_mm *mm,
- unsigned long start,
- unsigned long size)
-{
- struct drm_mm_node *child;
-
- child = (struct drm_mm_node *)
- drm_ctl_alloc(sizeof(*child), DRM_MEM_MM);
- if (!child)
- return -ENOMEM;
-
- child->free = 1;
- child->size = size;
- child->start = start;
- child->mm = mm;
-
- list_add_tail(&child->ml_entry, &mm->ml_entry);
- list_add_tail(&child->fl_entry, &mm->fl_entry);
-
- return 0;
-}
-
-
-int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size)
-{
- struct list_head *tail_node;
- struct drm_mm_node *entry;
-
- tail_node = mm->ml_entry.prev;
- entry = list_entry(tail_node, struct drm_mm_node, ml_entry);
- if (!entry->free) {
- return drm_mm_create_tail_node(mm, entry->start + entry->size, size);
- }
- entry->size += size;
- return 0;
-}
-
-static struct drm_mm_node *drm_mm_split_at_start(struct drm_mm_node *parent,
- unsigned long size)
-{
- struct drm_mm_node *child;
-
- child = (struct drm_mm_node *)
- drm_ctl_alloc(sizeof(*child), DRM_MEM_MM);
- if (!child)
- return NULL;
-
- INIT_LIST_HEAD(&child->fl_entry);
-
- child->free = 0;
- child->size = size;
- child->start = parent->start;
- child->mm = parent->mm;
-
- list_add_tail(&child->ml_entry, &parent->ml_entry);
- INIT_LIST_HEAD(&child->fl_entry);
-
- parent->size -= size;
- parent->start += size;
- return child;
-}
-
-struct drm_mm_node *drm_mm_get_block(struct drm_mm_node * parent,
- unsigned long size, unsigned alignment)
-{
-
- struct drm_mm_node *align_splitoff = NULL;
- struct drm_mm_node *child;
- unsigned tmp = 0;
-
- if (alignment)
- tmp = parent->start % alignment;
-
- if (tmp) {
- align_splitoff = drm_mm_split_at_start(parent, alignment - tmp);
- if (!align_splitoff)
- return NULL;
- }
-
- if (parent->size == size) {
- list_del_init(&parent->fl_entry);
- parent->free = 0;
- return parent;
- } else {
- child = drm_mm_split_at_start(parent, size);
- }
-
- if (align_splitoff)
- drm_mm_put_block(align_splitoff);
-
- return child;
-}
-EXPORT_SYMBOL(drm_mm_get_block);
-
-/*
- * Put a block. Merge with the previous and / or next block if they are free.
- * Otherwise add to the free stack.
- */
-
-void drm_mm_put_block(struct drm_mm_node * cur)
-{
-
- struct drm_mm *mm = cur->mm;
- struct list_head *cur_head = &cur->ml_entry;
- struct list_head *root_head = &mm->ml_entry;
- struct drm_mm_node *prev_node = NULL;
- struct drm_mm_node *next_node;
-
- int merged = 0;
-
- if (cur_head->prev != root_head) {
- prev_node = list_entry(cur_head->prev, struct drm_mm_node, ml_entry);
- if (prev_node->free) {
- prev_node->size += cur->size;
- merged = 1;
- }
- }
- if (cur_head->next != root_head) {
- next_node = list_entry(cur_head->next, struct drm_mm_node, ml_entry);
- if (next_node->free) {
- if (merged) {
- prev_node->size += next_node->size;
- list_del(&next_node->ml_entry);
- list_del(&next_node->fl_entry);
- drm_ctl_free(next_node, sizeof(*next_node),
- DRM_MEM_MM);
- } else {
- next_node->size += cur->size;
- next_node->start = cur->start;
- merged = 1;
- }
- }
- }
- if (!merged) {
- cur->free = 1;
- list_add(&cur->fl_entry, &mm->fl_entry);
- } else {
- list_del(&cur->ml_entry);
- drm_ctl_free(cur, sizeof(*cur), DRM_MEM_MM);
- }
-}
-EXPORT_SYMBOL(drm_mm_put_block);
-
-struct drm_mm_node *drm_mm_search_free(const struct drm_mm * mm,
- unsigned long size,
- unsigned alignment, int best_match)
-{
- struct list_head *list;
- const struct list_head *free_stack = &mm->fl_entry;
- struct drm_mm_node *entry;
- struct drm_mm_node *best;
- unsigned long best_size;
- unsigned wasted;
-
- best = NULL;
- best_size = ~0UL;
-
- list_for_each(list, free_stack) {
- entry = list_entry(list, struct drm_mm_node, fl_entry);
- wasted = 0;
-
- if (entry->size < size)
- continue;
-
- if (alignment) {
- register unsigned tmp = entry->start % alignment;
- if (tmp)
- wasted += alignment - tmp;
- }
-
-
- if (entry->size >= size + wasted) {
- if (!best_match)
- return entry;
- if (size < best_size) {
- best = entry;
- best_size = entry->size;
- }
- }
- }
-
- return best;
-}
-EXPORT_SYMBOL(drm_mm_search_free);
-
-int drm_mm_clean(struct drm_mm * mm)
-{
- struct list_head *head = &mm->ml_entry;
-
- return (head->next->next == head);
-}
-
-int drm_mm_init(struct drm_mm * mm, unsigned long start, unsigned long size)
-{
- INIT_LIST_HEAD(&mm->ml_entry);
- INIT_LIST_HEAD(&mm->fl_entry);
-
- return drm_mm_create_tail_node(mm, start, size);
-}
-
-EXPORT_SYMBOL(drm_mm_init);
-
-void drm_mm_takedown(struct drm_mm * mm)
-{
- struct list_head *bnode = mm->fl_entry.next;
- struct drm_mm_node *entry;
-
- entry = list_entry(bnode, struct drm_mm_node, fl_entry);
-
- if (entry->ml_entry.next != &mm->ml_entry ||
- entry->fl_entry.next != &mm->fl_entry) {
- DRM_ERROR("Memory manager not clean. Delaying takedown\n");
- return;
- }
-
- list_del(&entry->fl_entry);
- list_del(&entry->ml_entry);
- drm_ctl_free(entry, sizeof(*entry), DRM_MEM_MM);
-}
-
-EXPORT_SYMBOL(drm_mm_takedown);
+++ /dev/null
-../shared-core/drm_mode.h
\ No newline at end of file
+++ /dev/null
-/**
- * \file drm_os_linux.h
- * OS abstraction macros.
- */
-
-#include <linux/interrupt.h> /* For task queue support */
-#include <linux/delay.h>
-
-/** Current process ID */
-#define DRM_CURRENTPID current->pid
-#define DRM_SUSER(p) capable(CAP_SYS_ADMIN)
-#define DRM_UDELAY(d) udelay(d)
-/** Read a byte from a MMIO region */
-#define DRM_READ8(map, offset) readb((map)->handle + (offset))
-/** Read a word from a MMIO region */
-#define DRM_READ16(map, offset) readw((map)->handle + (offset))
-/** Read a dword from a MMIO region */
-#define DRM_READ32(map, offset) readl((map)->handle + (offset))
-/** Write a byte into a MMIO region */
-#define DRM_WRITE8(map, offset, val) writeb(val, (map)->handle + (offset))
-/** Write a word into a MMIO region */
-#define DRM_WRITE16(map, offset, val) writew(val, (map)->handle + (offset))
-/** Write a dword into a MMIO region */
-#define DRM_WRITE32(map, offset, val) writel(val, (map)->handle + (offset))
-/** Read memory barrier */
-#define DRM_READMEMORYBARRIER() rmb()
-/** Write memory barrier */
-#define DRM_WRITEMEMORYBARRIER() wmb()
-/** Read/write memory barrier */
-#define DRM_MEMORYBARRIER() mb()
-
-/** IRQ handler arguments and return type and values */
-#define DRM_IRQ_ARGS int irq, void *arg
-/** backwards compatibility with old irq return values */
-#if !defined(IRQ_HANDLED) && LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
-typedef void irqreturn_t;
-#define IRQ_HANDLED /* nothing */
-#define IRQ_NONE /* nothing */
-#endif
-
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,25)
-#define dev_set_name(dev, name, ...) ({ \
- snprintf((dev)->bus_id, BUS_ID_SIZE, (name), __VA_ARGS__); \
- 0; })
-#endif
-
-/** AGP types */
-#if __OS_HAS_AGP
-#define DRM_AGP_MEM struct agp_memory
-#define DRM_AGP_KERN struct agp_kern_info
-#else
-/* define some dummy types for non AGP supporting kernels */
-struct no_agp_kern {
- unsigned long aper_base;
- unsigned long aper_size;
-};
-#define DRM_AGP_MEM int
-#define DRM_AGP_KERN struct no_agp_kern
-#endif
-
-#if !(__OS_HAS_MTRR)
-static __inline__ int mtrr_add(unsigned long base, unsigned long size,
- unsigned int type, char increment)
-{
- return -ENODEV;
-}
-
-static __inline__ int mtrr_del(int reg, unsigned long base, unsigned long size)
-{
- return -ENODEV;
-}
-
-#define MTRR_TYPE_WRCOMB 1
-#endif
-
-/** Other copying of data to kernel space */
-#define DRM_COPY_FROM_USER(arg1, arg2, arg3) \
- copy_from_user(arg1, arg2, arg3)
-/** Other copying of data from kernel space */
-#define DRM_COPY_TO_USER(arg1, arg2, arg3) \
- copy_to_user(arg1, arg2, arg3)
-/* Macros for copyfrom user, but checking readability only once */
-#define DRM_VERIFYAREA_READ( uaddr, size ) \
- (access_ok( VERIFY_READ, uaddr, size) ? 0 : -EFAULT)
-#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \
- __copy_from_user(arg1, arg2, arg3)
-#define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3) \
- __copy_to_user(arg1, arg2, arg3)
-#define DRM_GET_USER_UNCHECKED(val, uaddr) \
- __get_user(val, uaddr)
-
-#define DRM_HZ HZ
-
-#define DRM_WAIT_ON( ret, queue, timeout, condition ) \
-do { \
- DECLARE_WAITQUEUE(entry, current); \
- unsigned long end = jiffies + (timeout); \
- add_wait_queue(&(queue), &entry); \
- \
- for (;;) { \
- __set_current_state(TASK_INTERRUPTIBLE); \
- if (condition) \
- break; \
- if (time_after_eq(jiffies, end)) { \
- ret = -EBUSY; \
- break; \
- } \
- schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \
- if (signal_pending(current)) { \
- ret = -EINTR; \
- break; \
- } \
- } \
- __set_current_state(TASK_RUNNING); \
- remove_wait_queue(&(queue), &entry); \
-} while (0)
-
-#define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
-#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
-
-/** Type for the OS's non-sleepable mutex lock */
-#define DRM_SPINTYPE spinlock_t
-/**
- * Initialize the lock for use. name is an optional string describing the
- * lock
- */
-#define DRM_SPININIT(l,name) spin_lock_init(l)
-#define DRM_SPINUNINIT(l)
-#define DRM_SPINLOCK(l) spin_lock(l)
-#define DRM_SPINUNLOCK(l) spin_unlock(l)
-#define DRM_SPINLOCK_IRQSAVE(l, _flags) spin_lock_irqsave(l, _flags);
-#define DRM_SPINUNLOCK_IRQRESTORE(l, _flags) spin_unlock_irqrestore(l, _flags);
-#define DRM_SPINLOCK_ASSERT(l) do {} while (0)
-
-#define DRM_PCI_DEV struct pci_dev
-#define drm_pci_get_bsf(b, s, f) pci_get_bus_and_slot(b, PCI_DEVFN(s, f))
-#define drm_pci_read_config_dword pci_read_config_dword
+++ /dev/null
-/* drm_pci.h -- PCI DMA memory management wrappers for DRM -*- linux-c -*- */
-/**
- * \file drm_pci.c
- * \brief Functions and ioctls to manage PCI memory
- *
- * \warning These interfaces aren't stable yet.
- *
- * \todo Implement the remaining ioctl's for the PCI pools.
- * \todo The wrappers here are so thin that they would be better off inlined..
- *
- * \author Jose Fonseca <jrfonseca@tungstengraphics.com>
- * \author Leif Delgass <ldelgass@retinalburn.net>
- */
-
-/*
- * Copyright 2003 Jos�Fonseca.
- * Copyright 2003 Leif Delgass.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/pci.h>
-#include <linux/dma-mapping.h>
-#include "drmP.h"
-
-/**********************************************************************/
-/** \name PCI memory */
-/*@{*/
-
-/**
- * \brief Allocate a PCI consistent memory block, for DMA.
- */
-drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t align,
- dma_addr_t maxaddr)
-{
- drm_dma_handle_t *dmah;
- unsigned long addr;
- size_t sz;
-#ifdef DRM_DEBUG_MEMORY
- int area = DRM_MEM_DMA;
-
- spin_lock(&drm_mem_lock);
- if ((drm_ram_used >> PAGE_SHIFT)
- > (DRM_RAM_PERCENT * drm_ram_available) / 100) {
- spin_unlock(&drm_mem_lock);
- return 0;
- }
- spin_unlock(&drm_mem_lock);
-#endif
-
- /* pci_alloc_consistent only guarantees alignment to the smallest
- * PAGE_SIZE order which is greater than or equal to the requested size.
- * Return NULL here for now to make sure nobody tries for larger alignment
- */
- if (align > size)
- return NULL;
-
- if (pci_set_dma_mask(dev->pdev, maxaddr) != 0) {
- DRM_ERROR("Setting pci dma mask failed\n");
- return NULL;
- }
-
- dmah = kmalloc(sizeof(drm_dma_handle_t), GFP_KERNEL);
- if (!dmah)
- return NULL;
-
- dmah->size = size;
- dmah->vaddr = dma_alloc_coherent(&dev->pdev->dev, size, &dmah->busaddr, GFP_KERNEL | __GFP_COMP);
-
-#ifdef DRM_DEBUG_MEMORY
- if (dmah->vaddr == NULL) {
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].fail_count;
- spin_unlock(&drm_mem_lock);
- kfree(dmah);
- return NULL;
- }
-
- spin_lock(&drm_mem_lock);
- ++drm_mem_stats[area].succeed_count;
- drm_mem_stats[area].bytes_allocated += size;
- drm_ram_used += size;
- spin_unlock(&drm_mem_lock);
-#else
- if (dmah->vaddr == NULL) {
- kfree(dmah);
- return NULL;
- }
-#endif
-
- memset(dmah->vaddr, 0, size);
-
- /* XXX - Is virt_to_page() legal for consistent mem? */
- /* Reserve */
- for (addr = (unsigned long)dmah->vaddr, sz = size;
- sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
- SetPageReserved(virt_to_page(addr));
- }
-
- return dmah;
-}
-EXPORT_SYMBOL(drm_pci_alloc);
-
-/**
- * \brief Free a PCI consistent memory block without freeing its descriptor.
- *
- * This function is for internal use in the Linux-specific DRM core code.
- */
-void __drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah)
-{
- unsigned long addr;
- size_t sz;
-#ifdef DRM_DEBUG_MEMORY
- int area = DRM_MEM_DMA;
- int alloc_count;
- int free_count;
-#endif
-
- if (!dmah->vaddr) {
-#ifdef DRM_DEBUG_MEMORY
- DRM_MEM_ERROR(area, "Attempt to free address 0\n");
-#endif
- } else {
- /* XXX - Is virt_to_page() legal for consistent mem? */
- /* Unreserve */
- for (addr = (unsigned long)dmah->vaddr, sz = dmah->size;
- sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
- ClearPageReserved(virt_to_page(addr));
- }
- dma_free_coherent(&dev->pdev->dev, dmah->size, dmah->vaddr,
- dmah->busaddr);
- }
-
-#ifdef DRM_DEBUG_MEMORY
- spin_lock(&drm_mem_lock);
- free_count = ++drm_mem_stats[area].free_count;
- alloc_count = drm_mem_stats[area].succeed_count;
- drm_mem_stats[area].bytes_freed += size;
- drm_ram_used -= size;
- spin_unlock(&drm_mem_lock);
- if (free_count > alloc_count) {
- DRM_MEM_ERROR(area,
- "Excess frees: %d frees, %d allocs\n",
- free_count, alloc_count);
- }
-#endif
-
-}
-
-/**
- * \brief Free a PCI consistent memory block
- */
-void drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah)
-{
- __drm_pci_free(dev, dmah);
- kfree(dmah);
-}
-EXPORT_SYMBOL(drm_pci_free);
-
-/*@}*/
+++ /dev/null
-/**
- * \file drm_proc.c
- * /proc support for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- *
- * \par Acknowledgements:
- * Matthew J Sottek <matthew.j.sottek@intel.com> sent in a patch to fix
- * the problem with the proc files not outputting all their information.
- */
-
-/*
- * Created: Mon Jan 11 09:48:47 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-static int drm_name_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int drm_vm_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int drm_clients_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int drm_queues_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int drm_bufs_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int drm_gem_name_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-static int drm_gem_object_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-#if DRM_DEBUG_CODE
-static int drm_vma_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data);
-#endif
-
-/**
- * Proc file list.
- */
-static struct drm_proc_list {
- const char *name; /**< file name */
- int (*f) (char *, char **, off_t, int, int *, void *); /**< proc callback*/
-} drm_proc_list[] = {
- {"name", drm_name_info},
- {"mem", drm_mem_info},
- {"vm", drm_vm_info},
- {"clients", drm_clients_info},
- {"queues", drm_queues_info},
- {"bufs", drm_bufs_info},
- {"gem_names", drm_gem_name_info},
- {"gem_objects", drm_gem_object_info},
-#if DRM_DEBUG_CODE
- {"vma", drm_vma_info},
-#endif
-};
-
-#define DRM_PROC_ENTRIES ARRAY_SIZE(drm_proc_list)
-
-/**
- * Initialize the DRI proc filesystem for a device.
- *
- * \param dev DRM device.
- * \param minor device minor number.
- * \param root DRI proc dir entry.
- * \param dev_root resulting DRI device proc dir entry.
- * \return root entry pointer on success, or NULL on failure.
- *
- * Create the DRI proc root entry "/proc/dri", the device proc root entry
- * "/proc/dri/%minor%/", and each entry in proc_list as
- * "/proc/dri/%minor%/%name%".
- */
-int drm_proc_init(struct drm_minor *minor, int minor_id,
- struct proc_dir_entry *root)
-{
- struct proc_dir_entry *ent;
- int i, j;
- char name[64];
-
- sprintf(name, "%d", minor_id);
- minor->dev_root = proc_mkdir(name, root);
- if (!minor->dev_root) {
- DRM_ERROR("Cannot create /proc/dri/%s\n", name);
- return -1;
- }
-
- for (i = 0; i < DRM_PROC_ENTRIES; i++) {
- ent = create_proc_entry(drm_proc_list[i].name,
- S_IFREG | S_IRUGO, minor->dev_root);
- if (!ent) {
- DRM_ERROR("Cannot create /proc/dri/%s/%s\n",
- name, drm_proc_list[i].name);
- for (j = 0; j < i; j++)
- remove_proc_entry(drm_proc_list[i].name,
- minor->dev_root);
- remove_proc_entry(name, root);
- minor->dev_root = NULL;
- return -1;
- }
- ent->read_proc = drm_proc_list[i].f;
- ent->data = minor;
- }
- return 0;
-}
-
-/**
- * Cleanup the proc filesystem resources.
- *
- * \param minor device minor number.
- * \param root DRI proc dir entry.
- * \param dev_root DRI device proc dir entry.
- * \return always zero.
- *
- * Remove all proc entries created by proc_init().
- */
-int drm_proc_cleanup(struct drm_minor *minor, struct proc_dir_entry *root)
-{
- int i;
- char name[64];
-
- if (!root || !minor->dev_root)
- return 0;
-
- for (i = 0; i < DRM_PROC_ENTRIES; i++)
- remove_proc_entry(drm_proc_list[i].name, minor->dev_root);
- sprintf(name, "%d", minor->index);
- remove_proc_entry(name, root);
-
- return 0;
-}
-
-/**
- * Called when "/proc/dri/.../name" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- *
- * Prints the device name together with the bus id if available.
- */
-static int drm_name_info(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int len = 0;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- if (dev->unique) {
- DRM_PROC_PRINT("%s %s %s\n",
- dev->driver->pci_driver.name,
- pci_name(dev->pdev), dev->unique);
- } else {
- DRM_PROC_PRINT("%s %s\n", dev->driver->pci_driver.name,
- pci_name(dev->pdev));
- }
-
- if (len > request + offset)
- return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Called when "/proc/dri/.../vm" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- *
- * Prints information about all mappings in drm_device::maplist.
- */
-static int drm__vm_info(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int len = 0;
- struct drm_map *map;
- struct drm_map_list *r_list;
-
- /* Hardcoded from _DRM_FRAME_BUFFER,
- _DRM_REGISTERS, _DRM_SHM, _DRM_AGP,
- _DRM_SCATTER_GATHER, and _DRM_CONSISTENT. */
- const char *types[] = { "FB", "REG", "SHM", "AGP", "SG", "PCI" };
- const char *type;
- int i;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT("slot offset size type flags "
- "address mtrr\n\n");
- i = 0;
- list_for_each_entry(r_list, &dev->maplist, head) {
- map = r_list->map;
- if (!map)
- continue;
- if (map->type < 0 || map->type > 5)
- type = "??";
- else
- type = types[map->type];
- DRM_PROC_PRINT("%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx ",
- i,
- map->offset,
- map->size, type, map->flags,
- (unsigned long) r_list->user_token);
-
- if (map->mtrr < 0) {
- DRM_PROC_PRINT("none\n");
- } else {
- DRM_PROC_PRINT("%4d\n", map->mtrr);
- }
- i++;
- }
-
- if (len > request + offset)
- return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Simply calls _vm_info() while holding the drm_device::struct_mutex lock.
- */
-static int drm_vm_info(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm__vm_info(buf, start, offset, request, eof, data);
- mutex_unlock(&dev->struct_mutex);
- return ret;
-}
-
-/**
- * Called when "/proc/dri/.../queues" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- */
-static int drm__queues_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int len = 0;
- int i;
- struct drm_queue *q;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT(" ctx/flags use fin"
- " blk/rw/rwf wait flushed queued"
- " locks\n\n");
- for (i = 0; i < dev->queue_count; i++) {
- q = dev->queuelist[i];
- atomic_inc(&q->use_count);
- DRM_PROC_PRINT_RET(atomic_dec(&q->use_count),
- "%5d/0x%03x %5d %5d"
- " %5d/%c%c/%c%c%c %5Zd\n",
- i,
- q->flags,
- atomic_read(&q->use_count),
- atomic_read(&q->finalization),
- atomic_read(&q->block_count),
- atomic_read(&q->block_read) ? 'r' : '-',
- atomic_read(&q->block_write) ? 'w' : '-',
- waitqueue_active(&q->read_queue) ? 'r' : '-',
- waitqueue_active(&q->
- write_queue) ? 'w' : '-',
- waitqueue_active(&q->
- flush_queue) ? 'f' : '-',
- DRM_BUFCOUNT(&q->waitlist));
- atomic_dec(&q->use_count);
- }
-
- if (len > request + offset)
- return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Simply calls _queues_info() while holding the drm_device::struct_mutex lock.
- */
-static int drm_queues_info(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm__queues_info(buf, start, offset, request, eof, data);
- mutex_unlock(&dev->struct_mutex);
- return ret;
-}
-
-/**
- * Called when "/proc/dri/.../bufs" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- */
-static int drm__bufs_info(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int len = 0;
- struct drm_device_dma *dma = dev->dma;
- int i;
-
- if (!dma || offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT(" o size count free segs pages kB\n\n");
- for (i = 0; i <= DRM_MAX_ORDER; i++) {
- if (dma->bufs[i].buf_count)
- DRM_PROC_PRINT("%2d %8d %5d %5d %5d %5d %5ld\n",
- i,
- dma->bufs[i].buf_size,
- dma->bufs[i].buf_count,
- atomic_read(&dma->bufs[i]
- .freelist.count),
- dma->bufs[i].seg_count,
- dma->bufs[i].seg_count
- * (1 << dma->bufs[i].page_order),
- (dma->bufs[i].seg_count
- * (1 << dma->bufs[i].page_order))
- * PAGE_SIZE / 1024);
- }
- DRM_PROC_PRINT("\n");
- for (i = 0; i < dma->buf_count; i++) {
- if (i && !(i % 32))
- DRM_PROC_PRINT("\n");
- DRM_PROC_PRINT(" %d", dma->buflist[i]->list);
- }
- DRM_PROC_PRINT("\n");
-
- if (len > request + offset)
- return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Simply calls _bufs_info() while holding the drm_device::struct_mutex lock.
- */
-static int drm_bufs_info(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm__bufs_info(buf, start, offset, request, eof, data);
- mutex_unlock(&dev->struct_mutex);
- return ret;
-}
-
-/**
- * Called when "/proc/dri/.../clients" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- */
-static int drm__clients_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int len = 0;
- struct drm_file *priv;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT("a dev pid uid magic ioctls\n\n");
- list_for_each_entry(priv, &dev->filelist, lhead) {
- DRM_PROC_PRINT("%c %3d %5d %5d %10u %10lu\n",
- priv->authenticated ? 'y' : 'n',
- priv->minor->index,
- priv->pid,
- priv->uid, priv->magic, priv->ioctl_count);
- }
-
- if (len > request + offset)
- return request;
- *eof = 1;
- return len - offset;
-}
-
-/**
- * Simply calls _clients_info() while holding the drm_device::struct_mutex lock.
- */
-static int drm_clients_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm__clients_info(buf, start, offset, request, eof, data);
- mutex_unlock(&dev->struct_mutex);
- return ret;
-}
-
-struct drm_gem_name_info_data {
- int len;
- char *buf;
- int eof;
-};
-
-static int drm_gem_one_name_info(int id, void *ptr, void *data)
-{
- struct drm_gem_object *obj = ptr;
- struct drm_gem_name_info_data *nid = data;
-
- DRM_INFO("name %d size %zd\n", obj->name, obj->size);
- if (nid->eof)
- return 0;
-
- nid->len += sprintf(&nid->buf[nid->len],
- "%6d%9zd%8d%9d\n",
- obj->name, obj->size,
- atomic_read(&obj->handlecount.refcount),
- atomic_read(&obj->refcount.refcount));
- if (nid->len > DRM_PROC_LIMIT) {
- nid->eof = 1;
- return 0;
- }
- return 0;
-}
-
-static int drm_gem_name_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- struct drm_gem_name_info_data nid;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- nid.len = sprintf(buf, " name size handles refcount\n");
- nid.buf = buf;
- nid.eof = 0;
- idr_for_each(&dev->object_name_idr, drm_gem_one_name_info, &nid);
-
- *start = &buf[offset];
- *eof = 0;
- if (nid.len > request + offset)
- return request;
- *eof = 1;
- return nid.len - offset;
-}
-
-static int drm_gem_object_info(char *buf, char **start, off_t offset,
- int request, int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int len = 0;
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
- DRM_PROC_PRINT("%d objects\n", atomic_read(&dev->object_count));
- DRM_PROC_PRINT("%d object bytes\n", atomic_read(&dev->object_memory));
- DRM_PROC_PRINT("%d pinned\n", atomic_read(&dev->pin_count));
- DRM_PROC_PRINT("%d pin bytes\n", atomic_read(&dev->pin_memory));
- DRM_PROC_PRINT("%d gtt bytes\n", atomic_read(&dev->gtt_memory));
- DRM_PROC_PRINT("%d gtt total\n", dev->gtt_total);
- if (len > request + offset)
- return request;
- *eof = 1;
- return len - offset;
-}
-
-#if DRM_DEBUG_CODE
-
-static int drm__vma_info(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int len = 0;
- struct drm_vma_entry *pt;
- struct vm_area_struct *vma;
-#if defined(__i386__)
- unsigned int pgprot;
-#endif
-
- if (offset > DRM_PROC_LIMIT) {
- *eof = 1;
- return 0;
- }
-
- *start = &buf[offset];
- *eof = 0;
-
- DRM_PROC_PRINT("vma use count: %d, high_memory = %p, 0x%08lx\n",
- atomic_read(&dev->vma_count),
- high_memory, virt_to_phys(high_memory));
- list_for_each_entry(pt, &dev->vmalist, head) {
- if (!(vma = pt->vma))
- continue;
- DRM_PROC_PRINT("\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx000",
- pt->pid,
- vma->vm_start,
- vma->vm_end,
- vma->vm_flags & VM_READ ? 'r' : '-',
- vma->vm_flags & VM_WRITE ? 'w' : '-',
- vma->vm_flags & VM_EXEC ? 'x' : '-',
- vma->vm_flags & VM_MAYSHARE ? 's' : 'p',
- vma->vm_flags & VM_LOCKED ? 'l' : '-',
- vma->vm_flags & VM_IO ? 'i' : '-',
- vma->vm_pgoff);
-
-#if defined(__i386__)
- pgprot = pgprot_val(vma->vm_page_prot);
- DRM_PROC_PRINT(" %c%c%c%c%c%c%c%c%c",
- pgprot & _PAGE_PRESENT ? 'p' : '-',
- pgprot & _PAGE_RW ? 'w' : 'r',
- pgprot & _PAGE_USER ? 'u' : 's',
- pgprot & _PAGE_PWT ? 't' : 'b',
- pgprot & _PAGE_PCD ? 'u' : 'c',
- pgprot & _PAGE_ACCESSED ? 'a' : '-',
- pgprot & _PAGE_DIRTY ? 'd' : '-',
- pgprot & _PAGE_PSE ? 'm' : 'k',
- pgprot & _PAGE_GLOBAL ? 'g' : 'l');
-#endif
- DRM_PROC_PRINT("\n");
- }
-
- if (len > request + offset)
- return request;
- *eof = 1;
- return len - offset;
-}
-
-static int drm_vma_info(char *buf, char **start, off_t offset, int request,
- int *eof, void *data)
-{
- struct drm_minor *minor = (struct drm_minor *) data;
- struct drm_device *dev = minor->dev;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm__vma_info(buf, start, offset, request, eof, data);
- mutex_unlock(&dev->struct_mutex);
- return ret;
-}
-#endif
+++ /dev/null
-/**************************************************************************
- * Copyright (c) 2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **************************************************************************/
-/*
- * An allocate-fence manager implementation intended for sets of base-registers
- * or tiling-registers.
- */
-
-#include "drmP.h"
-
-/*
- * Allocate a compatible register and put it on the unfenced list.
- */
-
-int drm_regs_alloc(struct drm_reg_manager *manager,
- const void *data,
- uint32_t fence_class,
- uint32_t fence_type,
- int interruptible, int no_wait, struct drm_reg **reg)
-{
- struct drm_reg *entry, *next_entry;
- int ret;
-
- *reg = NULL;
-
- /*
- * Search the unfenced list.
- */
-
- list_for_each_entry(entry, &manager->unfenced, head) {
- if (manager->reg_reusable(entry, data)) {
- entry->new_fence_type |= fence_type;
- goto out;
- }
- }
-
- /*
- * Search the lru list.
- */
-
- list_for_each_entry_safe(entry, next_entry, &manager->lru, head) {
- struct drm_fence_object *fence = entry->fence;
- if (fence->fence_class == fence_class &&
- (entry->fence_type & fence_type) == entry->fence_type &&
- manager->reg_reusable(entry, data)) {
- list_del(&entry->head);
- entry->new_fence_type = fence_type;
- list_add_tail(&entry->head, &manager->unfenced);
- goto out;
- }
- }
-
- /*
- * Search the free list.
- */
-
- list_for_each_entry(entry, &manager->free, head) {
- list_del(&entry->head);
- entry->new_fence_type = fence_type;
- list_add_tail(&entry->head, &manager->unfenced);
- goto out;
- }
-
- if (no_wait)
- return -EBUSY;
-
- /*
- * Go back to the lru list and try to expire fences.
- */
-
- list_for_each_entry_safe(entry, next_entry, &manager->lru, head) {
- BUG_ON(!entry->fence);
- ret = drm_fence_object_wait(entry->fence, 0, !interruptible,
- entry->fence_type);
- if (ret)
- return ret;
-
- drm_fence_usage_deref_unlocked(&entry->fence);
- list_del(&entry->head);
- entry->new_fence_type = fence_type;
- list_add_tail(&entry->head, &manager->unfenced);
- goto out;
- }
-
- /*
- * Oops. All registers are used up :(.
- */
-
- return -EBUSY;
-out:
- *reg = entry;
- return 0;
-}
-EXPORT_SYMBOL(drm_regs_alloc);
-
-void drm_regs_fence(struct drm_reg_manager *manager,
- struct drm_fence_object *fence)
-{
- struct drm_reg *entry;
- struct drm_reg *next_entry;
-
- if (!fence) {
-
- /*
- * Old fence (if any) is still valid.
- * Put back on free and lru lists.
- */
-
- list_for_each_entry_safe_reverse(entry, next_entry,
- &manager->unfenced, head) {
- list_del(&entry->head);
- list_add(&entry->head, (entry->fence) ?
- &manager->lru : &manager->free);
- }
- } else {
-
- /*
- * Fence with a new fence and put on lru list.
- */
-
- list_for_each_entry_safe(entry, next_entry, &manager->unfenced,
- head) {
- list_del(&entry->head);
- if (entry->fence)
- drm_fence_usage_deref_unlocked(&entry->fence);
- drm_fence_reference_unlocked(&entry->fence, fence);
-
- entry->fence_type = entry->new_fence_type;
- BUG_ON((entry->fence_type & fence->type) !=
- entry->fence_type);
-
- list_add_tail(&entry->head, &manager->lru);
- }
- }
-}
-EXPORT_SYMBOL(drm_regs_fence);
-
-void drm_regs_free(struct drm_reg_manager *manager)
-{
- struct drm_reg *entry;
- struct drm_reg *next_entry;
-
- drm_regs_fence(manager, NULL);
-
- list_for_each_entry_safe(entry, next_entry, &manager->free, head) {
- list_del(&entry->head);
- manager->reg_destroy(entry);
- }
-
- list_for_each_entry_safe(entry, next_entry, &manager->lru, head) {
-
- (void)drm_fence_object_wait(entry->fence, 1, 1,
- entry->fence_type);
- list_del(&entry->head);
- drm_fence_usage_deref_unlocked(&entry->fence);
- manager->reg_destroy(entry);
- }
-}
-EXPORT_SYMBOL(drm_regs_free);
-
-void drm_regs_add(struct drm_reg_manager *manager, struct drm_reg *reg)
-{
- reg->fence = NULL;
- list_add_tail(®->head, &manager->free);
-}
-EXPORT_SYMBOL(drm_regs_add);
-
-void drm_regs_init(struct drm_reg_manager *manager,
- int (*reg_reusable) (const struct drm_reg *, const void *),
- void (*reg_destroy) (struct drm_reg *))
-{
- INIT_LIST_HEAD(&manager->free);
- INIT_LIST_HEAD(&manager->lru);
- INIT_LIST_HEAD(&manager->unfenced);
- manager->reg_reusable = reg_reusable;
- manager->reg_destroy = reg_destroy;
-}
-EXPORT_SYMBOL(drm_regs_init);
+++ /dev/null
-../shared-core/drm_sarea.h
\ No newline at end of file
+++ /dev/null
-/**
- * \file drm_scatter.c
- * IOCTLs to manage scatter/gather memory
- *
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Mon Dec 18 23:20:54 2000 by gareth@valinux.com
- *
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/vmalloc.h>
-#include "drmP.h"
-
-#define DEBUG_SCATTER 0
-
-static inline void *drm_vmalloc_dma(unsigned long size)
-{
-#if defined(__powerpc__) && defined(CONFIG_NOT_COHERENT_CACHE)
- return __vmalloc(size, GFP_KERNEL, PAGE_KERNEL | _PAGE_NO_CACHE);
-#else
- return vmalloc_32(size);
-#endif
-}
-
-void drm_sg_cleanup(struct drm_sg_mem *entry)
-{
- struct page *page;
- int i;
-
- for (i = 0; i < entry->pages; i++) {
- page = entry->pagelist[i];
- if (page)
- ClearPageReserved(page);
- }
-
- vfree(entry->virtual);
-
- drm_free(entry->busaddr,
- entry->pages * sizeof(*entry->busaddr), DRM_MEM_PAGES);
- drm_free(entry->pagelist,
- entry->pages * sizeof(*entry->pagelist), DRM_MEM_PAGES);
- drm_free(entry, sizeof(*entry), DRM_MEM_SGLISTS);
-}
-EXPORT_SYMBOL(drm_sg_cleanup);
-
-#ifdef _LP64
-# define ScatterHandle(x) (unsigned int)((x >> 32) + (x & ((1L << 32) - 1)))
-#else
-# define ScatterHandle(x) (unsigned int)(x)
-#endif
-
-int drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather * request)
-{
- struct drm_sg_mem *entry;
- unsigned long pages, i, j;
-
- DRM_DEBUG("\n");
-
- if (!drm_core_check_feature(dev, DRIVER_SG))
- return -EINVAL;
-
- if (dev->sg)
- return -EINVAL;
-
- entry = drm_alloc(sizeof(*entry), DRM_MEM_SGLISTS);
- if (!entry)
- return -ENOMEM;
-
- memset(entry, 0, sizeof(*entry));
- pages = (request->size + PAGE_SIZE - 1) / PAGE_SIZE;
- DRM_DEBUG("size=%ld pages=%ld\n", request->size, pages);
-
- entry->pages = pages;
- entry->pagelist = drm_alloc(pages * sizeof(*entry->pagelist),
- DRM_MEM_PAGES);
- if (!entry->pagelist) {
- drm_free(entry, sizeof(*entry), DRM_MEM_SGLISTS);
- return -ENOMEM;
- }
-
- memset(entry->pagelist, 0, pages * sizeof(*entry->pagelist));
-
- entry->busaddr = drm_alloc(pages * sizeof(*entry->busaddr),
- DRM_MEM_PAGES);
- if (!entry->busaddr) {
- drm_free(entry->pagelist,
- entry->pages * sizeof(*entry->pagelist),
- DRM_MEM_PAGES);
- drm_free(entry, sizeof(*entry), DRM_MEM_SGLISTS);
- return -ENOMEM;
- }
- memset((void *)entry->busaddr, 0, pages * sizeof(*entry->busaddr));
-
- entry->virtual = drm_vmalloc_dma(pages << PAGE_SHIFT);
- if (!entry->virtual) {
- drm_free(entry->busaddr,
- entry->pages * sizeof(*entry->busaddr), DRM_MEM_PAGES);
- drm_free(entry->pagelist,
- entry->pages * sizeof(*entry->pagelist),
- DRM_MEM_PAGES);
- drm_free(entry, sizeof(*entry), DRM_MEM_SGLISTS);
- return -ENOMEM;
- }
-
- /* This also forces the mapping of COW pages, so our page list
- * will be valid. Please don't remove it...
- */
- memset(entry->virtual, 0, pages << PAGE_SHIFT);
-
- entry->handle = ScatterHandle((unsigned long)entry->virtual);
-
- DRM_DEBUG("handle = %08lx\n", entry->handle);
- DRM_DEBUG("virtual = %p\n", entry->virtual);
-
- for (i = (unsigned long)entry->virtual, j = 0; j < pages;
- i += PAGE_SIZE, j++) {
- entry->pagelist[j] = vmalloc_to_page((void *)i);
- if (!entry->pagelist[j])
- goto failed;
- SetPageReserved(entry->pagelist[j]);
- }
-
- request->handle = entry->handle;
-
- dev->sg = entry;
-
-#if DEBUG_SCATTER
- /* Verify that each page points to its virtual address, and vice
- * versa.
- */
- {
- int error = 0;
-
- for (i = 0; i < pages; i++) {
- unsigned long *tmp;
-
- tmp = page_address(entry->pagelist[i]);
- for (j = 0;
- j < PAGE_SIZE / sizeof(unsigned long);
- j++, tmp++) {
- *tmp = 0xcafebabe;
- }
- tmp = (unsigned long *)((u8 *) entry->virtual +
- (PAGE_SIZE * i));
- for (j = 0;
- j < PAGE_SIZE / sizeof(unsigned long);
- j++, tmp++) {
- if (*tmp != 0xcafebabe && error == 0) {
- error = 1;
- DRM_ERROR("Scatter allocation error, "
- "pagelist does not match "
- "virtual mapping\n");
- }
- }
- tmp = page_address(entry->pagelist[i]);
- for (j = 0;
- j < PAGE_SIZE / sizeof(unsigned long);
- j++, tmp++) {
- *tmp = 0;
- }
- }
- if (error == 0)
- DRM_ERROR("Scatter allocation matches pagelist\n");
- }
-#endif
-
- return 0;
-
- failed:
- drm_sg_cleanup(entry);
- return -ENOMEM;
-
-}
-EXPORT_SYMBOL(drm_sg_alloc);
-
-int drm_sg_alloc_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_scatter_gather *request = data;
-
- return drm_sg_alloc(dev, request);
-
-}
-
-int drm_sg_free(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_scatter_gather *request = data;
- struct drm_sg_mem *entry;
-
- if (!drm_core_check_feature(dev, DRIVER_SG))
- return -EINVAL;
-
- entry = dev->sg;
- dev->sg = NULL;
-
- if (!entry || entry->handle != request->handle)
- return -EINVAL;
-
- DRM_DEBUG("virtual = %p\n", entry->virtual);
-
- drm_sg_cleanup(entry);
-
- return 0;
-}
+++ /dev/null
-/**************************************************************************
- *
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck., ND., USA.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- *
- **************************************************************************/
-/*
- * Simple memory manager interface that keeps track on allocate regions on a
- * per "owner" basis. All regions associated with an "owner" can be released
- * with a simple call. Typically if the "owner" exists. The owner is any
- * "unsigned long" identifier. Can typically be a pointer to a file private
- * struct or a context identifier.
- *
- * Authors:
- * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#include "drm_sman.h"
-
-struct drm_owner_item {
- struct drm_hash_item owner_hash;
- struct list_head sman_list;
- struct list_head mem_blocks;
-};
-
-void drm_sman_takedown(struct drm_sman * sman)
-{
- drm_ht_remove(&sman->user_hash_tab);
- drm_ht_remove(&sman->owner_hash_tab);
- if (sman->mm)
- drm_free(sman->mm, sman->num_managers * sizeof(*sman->mm),
- DRM_MEM_MM);
-}
-
-EXPORT_SYMBOL(drm_sman_takedown);
-
-int
-drm_sman_init(struct drm_sman * sman, unsigned int num_managers,
- unsigned int user_order, unsigned int owner_order)
-{
- int ret = 0;
-
- sman->mm = (struct drm_sman_mm *) drm_calloc(num_managers, sizeof(*sman->mm),
- DRM_MEM_MM);
- if (!sman->mm) {
- ret = -ENOMEM;
- goto out;
- }
- sman->num_managers = num_managers;
- INIT_LIST_HEAD(&sman->owner_items);
- ret = drm_ht_create(&sman->owner_hash_tab, owner_order);
- if (ret)
- goto out1;
- ret = drm_ht_create(&sman->user_hash_tab, user_order);
- if (!ret)
- goto out;
-
- drm_ht_remove(&sman->owner_hash_tab);
-out1:
- drm_free(sman->mm, num_managers * sizeof(*sman->mm), DRM_MEM_MM);
-out:
- return ret;
-}
-
-EXPORT_SYMBOL(drm_sman_init);
-
-static void *drm_sman_mm_allocate(void *private, unsigned long size,
- unsigned alignment)
-{
- struct drm_mm *mm = (struct drm_mm *) private;
- struct drm_mm_node *tmp;
-
- tmp = drm_mm_search_free(mm, size, alignment, 1);
- if (!tmp) {
- return NULL;
- }
- tmp = drm_mm_get_block(tmp, size, alignment);
- return tmp;
-}
-
-static void drm_sman_mm_free(void *private, void *ref)
-{
- struct drm_mm_node *node = (struct drm_mm_node *) ref;
-
- drm_mm_put_block(node);
-}
-
-static void drm_sman_mm_destroy(void *private)
-{
- struct drm_mm *mm = (struct drm_mm *) private;
- drm_mm_takedown(mm);
- drm_free(mm, sizeof(*mm), DRM_MEM_MM);
-}
-
-static unsigned long drm_sman_mm_offset(void *private, void *ref)
-{
- struct drm_mm_node *node = (struct drm_mm_node *) ref;
- return node->start;
-}
-
-int
-drm_sman_set_range(struct drm_sman * sman, unsigned int manager,
- unsigned long start, unsigned long size)
-{
- struct drm_sman_mm *sman_mm;
- struct drm_mm *mm;
- int ret;
-
- BUG_ON(manager >= sman->num_managers);
-
- sman_mm = &sman->mm[manager];
- mm = drm_calloc(1, sizeof(*mm), DRM_MEM_MM);
- if (!mm) {
- return -ENOMEM;
- }
- sman_mm->private = mm;
- ret = drm_mm_init(mm, start, size);
-
- if (ret) {
- drm_free(mm, sizeof(*mm), DRM_MEM_MM);
- return ret;
- }
-
- sman_mm->allocate = drm_sman_mm_allocate;
- sman_mm->free = drm_sman_mm_free;
- sman_mm->destroy = drm_sman_mm_destroy;
- sman_mm->offset = drm_sman_mm_offset;
-
- return 0;
-}
-
-EXPORT_SYMBOL(drm_sman_set_range);
-
-int
-drm_sman_set_manager(struct drm_sman * sman, unsigned int manager,
- struct drm_sman_mm * allocator)
-{
- BUG_ON(manager >= sman->num_managers);
- sman->mm[manager] = *allocator;
-
- return 0;
-}
-EXPORT_SYMBOL(drm_sman_set_manager);
-
-static struct drm_owner_item *drm_sman_get_owner_item(struct drm_sman * sman,
- unsigned long owner)
-{
- int ret;
- struct drm_hash_item *owner_hash_item;
- struct drm_owner_item *owner_item;
-
- ret = drm_ht_find_item(&sman->owner_hash_tab, owner, &owner_hash_item);
- if (!ret) {
- return drm_hash_entry(owner_hash_item, struct drm_owner_item,
- owner_hash);
- }
-
- owner_item = drm_calloc(1, sizeof(*owner_item), DRM_MEM_MM);
- if (!owner_item)
- goto out;
-
- INIT_LIST_HEAD(&owner_item->mem_blocks);
- owner_item->owner_hash.key = owner;
- if (drm_ht_insert_item(&sman->owner_hash_tab, &owner_item->owner_hash))
- goto out1;
-
- list_add_tail(&owner_item->sman_list, &sman->owner_items);
- return owner_item;
-
-out1:
- drm_free(owner_item, sizeof(*owner_item), DRM_MEM_MM);
-out:
- return NULL;
-}
-
-struct drm_memblock_item *drm_sman_alloc(struct drm_sman *sman, unsigned int manager,
- unsigned long size, unsigned alignment,
- unsigned long owner)
-{
- void *tmp;
- struct drm_sman_mm *sman_mm;
- struct drm_owner_item *owner_item;
- struct drm_memblock_item *memblock;
-
- BUG_ON(manager >= sman->num_managers);
-
- sman_mm = &sman->mm[manager];
- tmp = sman_mm->allocate(sman_mm->private, size, alignment);
-
- if (!tmp) {
- return NULL;
- }
-
- memblock = drm_calloc(1, sizeof(*memblock), DRM_MEM_MM);
-
- if (!memblock)
- goto out;
-
- memblock->mm_info = tmp;
- memblock->mm = sman_mm;
- memblock->sman = sman;
-
- if (drm_ht_just_insert_please
- (&sman->user_hash_tab, &memblock->user_hash,
- (unsigned long)memblock, 32, 0, 0))
- goto out1;
-
- owner_item = drm_sman_get_owner_item(sman, owner);
- if (!owner_item)
- goto out2;
-
- list_add_tail(&memblock->owner_list, &owner_item->mem_blocks);
-
- return memblock;
-
-out2:
- drm_ht_remove_item(&sman->user_hash_tab, &memblock->user_hash);
-out1:
- drm_free(memblock, sizeof(*memblock), DRM_MEM_MM);
-out:
- sman_mm->free(sman_mm->private, tmp);
-
- return NULL;
-}
-
-EXPORT_SYMBOL(drm_sman_alloc);
-
-static void drm_sman_free(struct drm_memblock_item *item)
-{
- struct drm_sman *sman = item->sman;
-
- list_del(&item->owner_list);
- drm_ht_remove_item(&sman->user_hash_tab, &item->user_hash);
- item->mm->free(item->mm->private, item->mm_info);
- drm_free(item, sizeof(*item), DRM_MEM_MM);
-}
-
-int drm_sman_free_key(struct drm_sman *sman, unsigned int key)
-{
- struct drm_hash_item *hash_item;
- struct drm_memblock_item *memblock_item;
-
- if (drm_ht_find_item(&sman->user_hash_tab, key, &hash_item))
- return -EINVAL;
-
- memblock_item = drm_hash_entry(hash_item, struct drm_memblock_item,
- user_hash);
- drm_sman_free(memblock_item);
- return 0;
-}
-
-EXPORT_SYMBOL(drm_sman_free_key);
-
-static void drm_sman_remove_owner(struct drm_sman *sman,
- struct drm_owner_item *owner_item)
-{
- list_del(&owner_item->sman_list);
- drm_ht_remove_item(&sman->owner_hash_tab, &owner_item->owner_hash);
- drm_free(owner_item, sizeof(*owner_item), DRM_MEM_MM);
-}
-
-int drm_sman_owner_clean(struct drm_sman *sman, unsigned long owner)
-{
-
- struct drm_hash_item *hash_item;
- struct drm_owner_item *owner_item;
-
- if (drm_ht_find_item(&sman->owner_hash_tab, owner, &hash_item)) {
- return -1;
- }
-
- owner_item = drm_hash_entry(hash_item, struct drm_owner_item, owner_hash);
- if (owner_item->mem_blocks.next == &owner_item->mem_blocks) {
- drm_sman_remove_owner(sman, owner_item);
- return -1;
- }
-
- return 0;
-}
-
-EXPORT_SYMBOL(drm_sman_owner_clean);
-
-static void drm_sman_do_owner_cleanup(struct drm_sman *sman,
- struct drm_owner_item *owner_item)
-{
- struct drm_memblock_item *entry, *next;
-
- list_for_each_entry_safe(entry, next, &owner_item->mem_blocks,
- owner_list) {
- drm_sman_free(entry);
- }
- drm_sman_remove_owner(sman, owner_item);
-}
-
-void drm_sman_owner_cleanup(struct drm_sman *sman, unsigned long owner)
-{
-
- struct drm_hash_item *hash_item;
- struct drm_owner_item *owner_item;
-
- if (drm_ht_find_item(&sman->owner_hash_tab, owner, &hash_item)) {
-
- return;
- }
-
- owner_item = drm_hash_entry(hash_item, struct drm_owner_item, owner_hash);
- drm_sman_do_owner_cleanup(sman, owner_item);
-}
-
-EXPORT_SYMBOL(drm_sman_owner_cleanup);
-
-void drm_sman_cleanup(struct drm_sman *sman)
-{
- struct drm_owner_item *entry, *next;
- unsigned int i;
- struct drm_sman_mm *sman_mm;
-
- list_for_each_entry_safe(entry, next, &sman->owner_items, sman_list) {
- drm_sman_do_owner_cleanup(sman, entry);
- }
- if (sman->mm) {
- for (i = 0; i < sman->num_managers; ++i) {
- sman_mm = &sman->mm[i];
- if (sman_mm->private) {
- sman_mm->destroy(sman_mm->private);
- sman_mm->private = NULL;
- }
- }
- }
-}
-
-EXPORT_SYMBOL(drm_sman_cleanup);
+++ /dev/null
-/**************************************************************************
- *
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- *
- **************************************************************************/
-/*
- * Simple memory MANager interface that keeps track on allocate regions on a
- * per "owner" basis. All regions associated with an "owner" can be released
- * with a simple call. Typically if the "owner" exists. The owner is any
- * "unsigned long" identifier. Can typically be a pointer to a file private
- * struct or a context identifier.
- *
- * Authors:
- * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#ifndef DRM_SMAN_H
-#define DRM_SMAN_H
-
-#include "drmP.h"
-#include "drm_hashtab.h"
-
-/*
- * A class that is an abstration of a simple memory allocator.
- * The sman implementation provides a default such allocator
- * using the drm_mm.c implementation. But the user can replace it.
- * See the SiS implementation, which may use the SiS FB kernel module
- * for memory management.
- */
-
-struct drm_sman_mm {
- /* private info. If allocated, needs to be destroyed by the destroy
- function */
- void *private;
-
- /* Allocate a memory block with given size and alignment.
- Return an opaque reference to the memory block */
-
- void *(*allocate) (void *private, unsigned long size,
- unsigned alignment);
-
- /* Free a memory block. "ref" is the opaque reference that we got from
- the "alloc" function */
-
- void (*free) (void *private, void *ref);
-
- /* Free all resources associated with this allocator */
-
- void (*destroy) (void *private);
-
- /* Return a memory offset from the opaque reference returned from the
- "alloc" function */
-
- unsigned long (*offset) (void *private, void *ref);
-};
-
-struct drm_memblock_item {
- struct list_head owner_list;
- struct drm_hash_item user_hash;
- void *mm_info;
- struct drm_sman_mm *mm;
- struct drm_sman *sman;
-};
-
-struct drm_sman {
- struct drm_sman_mm *mm;
- int num_managers;
- struct drm_open_hash owner_hash_tab;
- struct drm_open_hash user_hash_tab;
- struct list_head owner_items;
-};
-
-/*
- * Take down a memory manager. This function should only be called after a
- * successful init and after a call to drm_sman_cleanup.
- */
-
-extern void drm_sman_takedown(struct drm_sman * sman);
-
-/*
- * Allocate structures for a manager.
- * num_managers are the number of memory pools to manage. (VRAM, AGP, ....)
- * user_order is the log2 of the number of buckets in the user hash table.
- * set this to approximately log2 of the max number of memory regions
- * that will be allocated for _all_ pools together.
- * owner_order is the log2 of the number of buckets in the owner hash table.
- * set this to approximately log2 of
- * the number of client file connections that will
- * be using the manager.
- *
- */
-
-extern int drm_sman_init(struct drm_sman * sman, unsigned int num_managers,
- unsigned int user_order, unsigned int owner_order);
-
-/*
- * Initialize a drm_mm.c allocator. Should be called only once for each
- * manager unless a customized allogator is used.
- */
-
-extern int drm_sman_set_range(struct drm_sman * sman, unsigned int manager,
- unsigned long start, unsigned long size);
-
-/*
- * Initialize a customized allocator for one of the managers.
- * (See the SiS module). The object pointed to by "allocator" is copied,
- * so it can be destroyed after this call.
- */
-
-extern int drm_sman_set_manager(struct drm_sman * sman, unsigned int mananger,
- struct drm_sman_mm * allocator);
-
-/*
- * Allocate a memory block. Aligment is not implemented yet.
- */
-
-extern struct drm_memblock_item *drm_sman_alloc(struct drm_sman * sman,
- unsigned int manager,
- unsigned long size,
- unsigned alignment,
- unsigned long owner);
-/*
- * Free a memory block identified by its user hash key.
- */
-
-extern int drm_sman_free_key(struct drm_sman * sman, unsigned int key);
-
-/*
- * returns 1 iff there are no stale memory blocks associated with this owner.
- * Typically called to determine if we need to idle the hardware and call
- * drm_sman_owner_cleanup. If there are no stale memory blocks, it removes all
- * resources associated with owner.
- */
-
-extern int drm_sman_owner_clean(struct drm_sman * sman, unsigned long owner);
-
-/*
- * Frees all stale memory blocks associated with this owner. Note that this
- * requires that the hardware is finished with all blocks, so the graphics engine
- * should be idled before this call is made. This function also frees
- * any resources associated with "owner" and should be called when owner
- * is not going to be referenced anymore.
- */
-
-extern void drm_sman_owner_cleanup(struct drm_sman * sman, unsigned long owner);
-
-/*
- * Frees all stale memory blocks associated with the memory manager.
- * See idling above.
- */
-
-extern void drm_sman_cleanup(struct drm_sman * sman);
-
-#endif
+++ /dev/null
-/**
- * \file drm_stub.c
- * Stub support
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- */
-
-/*
- * Created: Fri Jan 19 10:48:35 2001 by faith@acm.org
- *
- * Copyright 2001 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-
-#include "drmP.h"
-#include "drm_core.h"
-
-unsigned int drm_debug = 0; /* 1 to enable debug output */
-EXPORT_SYMBOL(drm_debug);
-
-MODULE_AUTHOR(CORE_AUTHOR);
-MODULE_DESCRIPTION(CORE_DESC);
-MODULE_LICENSE("GPL and additional rights");
-MODULE_PARM_DESC(debug, "Enable debug output");
-
-module_param_named(debug, drm_debug, int, 0600);
-
-struct idr drm_minors_idr;
-
-struct class *drm_class;
-struct proc_dir_entry *drm_proc_root;
-
-static int drm_minor_get_id(struct drm_device *dev, int type)
-{
- int new_id;
- int ret;
- int base = 0, limit = 63;
-
-again:
- if (idr_pre_get(&drm_minors_idr, GFP_KERNEL) == 0) {
- DRM_ERROR("Out of memory expanding drawable idr\n");
- return -ENOMEM;
- }
- mutex_lock(&dev->struct_mutex);
- ret = idr_get_new_above(&drm_minors_idr, NULL,
- base, &new_id);
- mutex_unlock(&dev->struct_mutex);
- if (ret == -EAGAIN) {
- goto again;
- } else if (ret) {
- return ret;
- }
-
- if (new_id >= limit) {
- idr_remove(&drm_minors_idr, new_id);
- return -EINVAL;
- }
- return new_id;
-}
-
-static int drm_fill_in_dev(struct drm_device * dev, struct pci_dev *pdev,
- const struct pci_device_id *ent,
- struct drm_driver *driver)
-{
- int retcode;
-
- INIT_LIST_HEAD(&dev->filelist);
- INIT_LIST_HEAD(&dev->ctxlist);
- INIT_LIST_HEAD(&dev->vmalist);
- INIT_LIST_HEAD(&dev->maplist);
-
- spin_lock_init(&dev->count_lock);
- spin_lock_init(&dev->drw_lock);
- spin_lock_init(&dev->tasklet_lock);
- spin_lock_init(&dev->lock.spinlock);
- init_timer(&dev->timer);
- mutex_init(&dev->struct_mutex);
- mutex_init(&dev->ctxlist_mutex);
-
- idr_init(&dev->drw_idr);
-
- dev->pdev = pdev;
- dev->pci_device = pdev->device;
- dev->pci_vendor = pdev->vendor;
-
-#ifdef __alpha__
- dev->hose = pdev->sysdata;
-#endif
- dev->irq = pdev->irq;
- dev->irq_enabled = 0;
-
- if (drm_ht_create(&dev->map_hash, DRM_MAP_HASH_ORDER)) {
- return -ENOMEM;
- }
-
- /* the DRM has 6 counters */
- dev->counters = 6;
- dev->types[0] = _DRM_STAT_LOCK;
- dev->types[1] = _DRM_STAT_OPENS;
- dev->types[2] = _DRM_STAT_CLOSES;
- dev->types[3] = _DRM_STAT_IOCTLS;
- dev->types[4] = _DRM_STAT_LOCKS;
- dev->types[5] = _DRM_STAT_UNLOCKS;
-
- dev->driver = driver;
-
- if (drm_core_has_AGP(dev)) {
- if (drm_device_is_agp(dev))
- dev->agp = drm_agp_init(dev);
- if (drm_core_check_feature(dev, DRIVER_REQUIRE_AGP)
- && (dev->agp == NULL)) {
- DRM_ERROR("Cannot initialize the agpgart module.\n");
- retcode = -EINVAL;
- goto error_out_unreg;
- }
-
- if (drm_core_has_MTRR(dev)) {
- if (dev->agp)
- dev->agp->agp_mtrr =
- mtrr_add(dev->agp->agp_info.aper_base,
- dev->agp->agp_info.aper_size *
- 1024 * 1024, MTRR_TYPE_WRCOMB, 1);
- }
- }
-
- retcode = drm_ctxbitmap_init(dev);
- if (retcode) {
- DRM_ERROR("Cannot allocate memory for context bitmap.\n");
- goto error_out_unreg;
- }
-
- if (driver->driver_features & DRIVER_GEM) {
- retcode = drm_gem_init (dev);
- if (retcode) {
- DRM_ERROR("Cannot initialize graphics execution manager (GEM)\n");
- goto error_out_unreg;
- }
- }
-
- return 0;
-
-error_out_unreg:
- drm_lastclose(dev);
- return retcode;
-}
-
-/**
- * Get a secondary minor number.
- *
- * \param dev device data structure
- * \param sec-minor structure to hold the assigned minor
- * \return negative number on failure.
- *
- * Search an empty entry and initialize it to the given parameters, and
- * create the proc init entry via proc_init(). This routines assigns
- * minor numbers to secondary heads of multi-headed cards
- */
-static int drm_get_minor(struct drm_device *dev, struct drm_minor **minor, int type)
-{
- struct drm_minor *new_minor;
- int ret;
- int minor_id;
-
- DRM_DEBUG("\n");
-
- minor_id = drm_minor_get_id(dev, type);
- if (minor_id < 0)
- return minor_id;
-
- new_minor = kzalloc(sizeof(struct drm_minor), GFP_KERNEL);
- if (!new_minor) {
- ret = -ENOMEM;
- goto err_idr;
- }
-
- new_minor->type = type;
- new_minor->device = MKDEV(DRM_MAJOR, minor_id);
- new_minor->dev = dev;
- new_minor->index = minor_id;
-
- idr_replace(&drm_minors_idr, new_minor, minor_id);
-
- if (type == DRM_MINOR_LEGACY) {
- ret = drm_proc_init(new_minor, minor_id, drm_proc_root);
- if (ret) {
- DRM_ERROR("DRM: Failed to initialize /proc/dri.\n");
- goto err_mem;
- }
- if (dev->driver->proc_init) {
- ret = dev->driver->proc_init(new_minor);
- if (ret) {
- DRM_ERROR("DRM: Driver failed to initialize /proc/dri.\n");
- goto err_mem;
- }
- }
- } else
- new_minor->dev_root = NULL;
-
- ret = drm_sysfs_device_add(new_minor);
- if (ret) {
- printk(KERN_ERR
- "DRM: Error sysfs_device_add.\n");
- goto err_g2;
- }
- *minor = new_minor;
-
- DRM_DEBUG("new minor assigned %d\n", minor_id);
- return 0;
-
-
-err_g2:
- if (new_minor->type == DRM_MINOR_LEGACY) {
- if (dev->driver->proc_cleanup)
- dev->driver->proc_cleanup(new_minor);
- drm_proc_cleanup(new_minor, drm_proc_root);
- }
-err_mem:
- kfree(new_minor);
-err_idr:
- idr_remove(&drm_minors_idr, minor_id);
- *minor = NULL;
- return ret;
-}
-
-/**
- * Register.
- *
- * \param pdev - PCI device structure
- * \param ent entry from the PCI ID table with device type flags
- * \return zero on success or a negative number on failure.
- *
- * Attempt to gets inter module "drm" information. If we are first
- * then register the character device and inter module information.
- * Try and register, if we fail to register, backout previous work.
- */
-int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
- struct drm_driver *driver)
-{
- struct drm_device *dev;
- int ret;
-
- DRM_DEBUG("\n");
-
- dev = drm_calloc(1, sizeof(*dev), DRM_MEM_STUB);
- if (!dev)
- return -ENOMEM;
-
- if (!drm_fb_loaded) {
- pci_set_drvdata(pdev, dev);
- ret = pci_request_regions(pdev, driver->pci_driver.name);
- if (ret)
- goto err_g1;
- }
-
- ret = pci_enable_device(pdev);
- if (ret)
- goto err_g2;
- pci_set_master(pdev);
-
- if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {
- printk(KERN_ERR "DRM: fill_in_dev failed\n");
- goto err_g3;
- }
-
- /* only add the control node on a modesetting platform */
- if ((ret = drm_get_minor(dev, &dev->primary, DRM_MINOR_LEGACY)))
- goto err_g3;
-
- if (dev->driver->load)
- if ((ret = dev->driver->load(dev, ent->driver_data)))
- goto err_g4;
-
- DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
- driver->name, driver->major, driver->minor, driver->patchlevel,
- driver->date, dev->primary->index);
-
- return 0;
-err_g4:
- drm_put_minor(dev);
-err_g3:
- if (!drm_fb_loaded)
- pci_disable_device(pdev);
-err_g2:
- if (!drm_fb_loaded)
- pci_release_regions(pdev);
-err_g1:
- if (!drm_fb_loaded)
- pci_set_drvdata(pdev, NULL);
-
- drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
- printk(KERN_ERR "DRM: drm_get_dev failed.\n");
- return ret;
-}
-EXPORT_SYMBOL(drm_get_dev);
-
-
-/**
- * Put a device minor number.
- *
- * \param dev device data structure
- * \return always zero
- *
- * Cleans up the proc resources. If it is the last minor then release the foreign
- * "drm" data, otherwise unregisters the "drm" data, frees the dev list and
- * unregisters the character device.
- */
-int drm_put_dev(struct drm_device * dev)
-{
- DRM_DEBUG("release primary %s\n", dev->driver->pci_driver.name);
-
- if (dev->unique) {
- drm_free(dev->unique, strlen(dev->unique) + 1, DRM_MEM_DRIVER);
- dev->unique = NULL;
- dev->unique_len = 0;
- }
- if (dev->devname) {
- drm_free(dev->devname, strlen(dev->devname) + 1,
- DRM_MEM_DRIVER);
- dev->devname = NULL;
- }
- drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
- return 0;
-}
-
-/**
- * Put a secondary minor number.
- *
- * \param sec_minor - structure to be released
- * \return always zero
- *
- * Cleans up the proc resources. Not legal for this to be the
- * last minor released.
- *
- */
-int drm_put_minor(struct drm_device *dev)
-{
- struct drm_minor **minor_p = &dev->primary;
- struct drm_minor *minor = *minor_p;
- DRM_DEBUG("release secondary minor %d\n", minor->index);
-
- if (minor->type == DRM_MINOR_LEGACY) {
- if (dev->driver->proc_cleanup)
- dev->driver->proc_cleanup(minor);
- drm_proc_cleanup(minor, drm_proc_root);
- }
- drm_sysfs_device_remove(minor);
-
- idr_remove(&drm_minors_idr, minor->index);
-
- kfree(minor);
- *minor_p = NULL;
- return 0;
-}
+++ /dev/null
-
-/*
- * drm_sysfs.c - Modifications to drm_sysfs_class.c to support
- * extra sysfs attribute from DRM. Normal drm_sysfs_class
- * does not allow adding attributes.
- *
- * Copyright (c) 2004 Jon Smirl <jonsmirl@gmail.com>
- * Copyright (c) 2003-2004 Greg Kroah-Hartman <greg@kroah.com>
- * Copyright (c) 2003-2004 IBM Corp.
- *
- * This file is released under the GPLv2
- *
- */
-
-#include <linux/device.h>
-#include <linux/kdev_t.h>
-#include <linux/err.h>
-
-#include "drm_core.h"
-#include "drmP.h"
-
-#define to_drm_minor(d) container_of(d, struct drm_minor, kdev)
-
-/**
- * drm_sysfs_suspend - DRM class suspend hook
- * @dev: Linux device to suspend
- * @state: power state to enter
- *
- * Just figures out what the actual struct drm_device associated with
- * @dev is and calls its suspend hook, if present.
- */
-static int drm_sysfs_suspend(struct device *dev, pm_message_t state)
-{
- struct drm_minor *drm_minor = to_drm_minor(dev);
- struct drm_device *drm_dev = drm_minor->dev;
-
- printk(KERN_ERR "%s\n", __FUNCTION__);
-
- if (drm_dev->driver->suspend)
- return drm_dev->driver->suspend(drm_dev, state);
-
- return 0;
-}
-
-/**
- * drm_sysfs_resume - DRM class resume hook
- * @dev: Linux device to resume
- *
- * Just figures out what the actual struct drm_device associated with
- * @dev is and calls its resume hook, if present.
- */
-static int drm_sysfs_resume(struct device *dev)
-{
- struct drm_minor *drm_minor = to_drm_minor(dev);
- struct drm_device *drm_dev = drm_minor->dev;
-
- if (drm_dev->driver->resume)
- return drm_dev->driver->resume(drm_dev);
-
- return 0;
-}
-
-/* Display the version of drm_core. This doesn't work right in current design */
-static ssize_t version_show(struct class *dev, char *buf)
-{
- return sprintf(buf, "%s %d.%d.%d %s\n", CORE_NAME, CORE_MAJOR,
- CORE_MINOR, CORE_PATCHLEVEL, CORE_DATE);
-}
-
-static CLASS_ATTR(version, S_IRUGO, version_show, NULL);
-
-/**
- * drm_sysfs_create - create a struct drm_sysfs_class structure
- * @owner: pointer to the module that is to "own" this struct drm_sysfs_class
- * @name: pointer to a string for the name of this class.
- *
- * This is used to create DRM class pointer that can then be used
- * in calls to drm_sysfs_device_add().
- *
- * Note, the pointer created here is to be destroyed when finished by making a
- * call to drm_sysfs_destroy().
- */
-struct class *drm_sysfs_create(struct module *owner, char *name)
-{
- struct class *class;
- int err;
-
- class = class_create(owner, name);
- if (IS_ERR(class)) {
- err = PTR_ERR(class);
- goto err_out;
- }
-
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
- class->suspend = drm_sysfs_suspend;
- class->resume = drm_sysfs_resume;
-#endif
-
- err = class_create_file(class, &class_attr_version);
- if (err)
- goto err_out_class;
-
- return class;
-
-err_out_class:
- class_destroy(class);
-err_out:
- return ERR_PTR(err);
-}
-
-/**
- * drm_sysfs_destroy - destroys DRM class
- *
- * Destroy the DRM device class.
- */
-void drm_sysfs_destroy(void)
-{
- if ((drm_class == NULL) || (IS_ERR(drm_class)))
- return;
- class_remove_file(drm_class, &class_attr_version);
- class_destroy(drm_class);
-}
-
-static ssize_t show_dri(struct device *device, struct device_attribute *attr,
- char *buf)
-{
- struct drm_minor *drm_minor = to_drm_minor(device);
- struct drm_device *drm_dev = drm_minor->dev;
- if (drm_dev->driver->dri_library_name)
- return drm_dev->driver->dri_library_name(drm_dev, buf);
- return snprintf(buf, PAGE_SIZE, "%s\n", drm_dev->driver->pci_driver.name);
-}
-
-static struct device_attribute device_attrs[] = {
- __ATTR(dri_library_name, S_IRUGO, show_dri, NULL),
-};
-
-/**
- * drm_sysfs_device_release - do nothing
- * @dev: Linux device
- *
- * Normally, this would free the DRM device associated with @dev, along
- * with cleaning up any other stuff. But we do that in the DRM core, so
- * this function can just return and hope that the core does its job.
- */
-static void drm_sysfs_device_release(struct device *dev)
-{
- return;
-}
-
-/**
- * drm_sysfs_device_add - adds a class device to sysfs for a character driver
- * @dev: DRM device to be added
- * @head: DRM head in question
- *
- * Add a DRM device to the DRM's device model class. We use @dev's PCI device
- * as the parent for the Linux device, and make sure it has a file containing
- * the driver we're using (for userspace compatibility).
- */
-int drm_sysfs_device_add(struct drm_minor *minor)
-{
- int err;
- int i, j;
- char *minor_str;
-
- minor->kdev.parent = &minor->dev->pdev->dev;
- minor->kdev.class = drm_class;
- minor->kdev.release = drm_sysfs_device_release;
- minor->kdev.devt = minor->device;
- minor_str = "card%d";
-
- err = dev_set_name(&minor->kdev, minor_str, minor->index);
- if (err) {
- DRM_ERROR("device set name failed: %d\n", err);
- goto err_out;
- }
-
- err = device_register(&minor->kdev);
- if (err) {
- DRM_ERROR("device add failed: %d\n", err);
- goto err_out;
- }
-
- for (i = 0; i < ARRAY_SIZE(device_attrs); i++) {
- err = device_create_file(&minor->kdev, &device_attrs[i]);
- if (err)
- goto err_out_files;
- }
-
- return 0;
-
-err_out_files:
- if (i > 0)
- for (j = 0; j < i; j++)
- device_remove_file(&minor->kdev, &device_attrs[j]);
- device_unregister(&minor->kdev);
-err_out:
-
- return err;
-}
-
-/**
- * drm_sysfs_device_remove - remove DRM device
- * @dev: DRM device to remove
- *
- * This call unregisters and cleans up a class device that was created with a
- * call to drm_sysfs_device_add()
- */
-void drm_sysfs_device_remove(struct drm_minor *minor)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(device_attrs); i++)
- device_remove_file(&minor->kdev, &device_attrs[i]);
- device_unregister(&minor->kdev);
-}
+++ /dev/null
-/**
- * \file drm_vm.c
- * Memory mapping for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Mon Jan 4 08:58:31 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-#if defined(__ia64__)
-#include <linux/efi.h>
-#endif
-
-static void drm_vm_open(struct vm_area_struct *vma);
-static void drm_vm_close(struct vm_area_struct *vma);
-
-pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma)
-{
- pgprot_t tmp = vm_get_page_prot(vma->vm_flags);
-
-#if defined(__i386__) || defined(__x86_64__)
- if (boot_cpu_data.x86 > 3 && map_type != _DRM_AGP) {
- pgprot_val(tmp) |= _PAGE_PCD;
- pgprot_val(tmp) &= ~_PAGE_PWT;
- }
-#elif defined(__powerpc__)
- pgprot_val(tmp) |= _PAGE_NO_CACHE;
- if (map_type == _DRM_REGISTERS)
- pgprot_val(tmp) |= _PAGE_GUARDED;
-#elif defined(__ia64__)
- if (efi_range_is_wc(vma->vm_start, vma->vm_end -
- vma->vm_start))
- tmp = pgprot_writecombine(tmp);
- else
- tmp = pgprot_noncached(tmp);
-#elif defined(__sparc__)
- tmp = pgprot_noncached(tmp);
-#endif
- return tmp;
-}
-
-static pgprot_t drm_dma_prot(uint32_t map_type, struct vm_area_struct *vma)
-{
- pgprot_t tmp = vm_get_page_prot(vma->vm_flags);
-
-#if defined(__powerpc__) && defined(CONFIG_NOT_COHERENT_CACHE)
- tmp |= _PAGE_NO_CACHE;
-#endif
- return tmp;
-}
-
-#ifndef DRM_VM_NOPAGE
-/**
- * \c fault method for AGP virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Find the right map and if it's AGP memory find the real physical page to
- * map, get the page, increment the use count and return it.
- */
-#if __OS_HAS_AGP
-static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
-{
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_map *map = NULL;
- struct drm_map_list *r_list;
- struct drm_hash_item *hash;
-
- /*
- * Find the right map
- */
- if (!drm_core_has_AGP(dev))
- goto vm_fault_error;
-
- if (!dev->agp || !dev->agp->cant_use_aperture)
- goto vm_fault_error;
-
- if (drm_ht_find_item(&dev->map_hash, vma->vm_pgoff, &hash))
- goto vm_fault_error;
-
- r_list = drm_hash_entry(hash, struct drm_map_list, hash);
- map = r_list->map;
-
- if (map && map->type == _DRM_AGP) {
- /*
- * Using vm_pgoff as a selector forces us to use this unusual
- * addressing scheme.
- */
- unsigned long offset = (unsigned long)vmf->virtual_address -
- vma->vm_start;
- unsigned long baddr = map->offset + offset;
- struct drm_agp_mem *agpmem;
- struct page *page;
-
-#ifdef __alpha__
- /*
- * Adjust to a bus-relative address
- */
- baddr -= dev->hose->mem_space->start;
-#endif
-
- /*
- * It's AGP memory - find the real physical page to map
- */
- list_for_each_entry(agpmem, &dev->agp->memory, head) {
- if (agpmem->bound <= baddr &&
- agpmem->bound + agpmem->pages * PAGE_SIZE > baddr)
- break;
- }
-
- if (!agpmem)
- goto vm_fault_error;
-
- /*
- * Get the page, inc the use count, and return it
- */
- offset = (baddr - agpmem->bound) >> PAGE_SHIFT;
- page = virt_to_page(__va(agpmem->memory->memory[offset]));
- get_page(page);
- vmf->page = page;
-
- DRM_DEBUG
- ("baddr = 0x%lx page = 0x%p, offset = 0x%lx, count=%d\n",
- baddr, __va(agpmem->memory->memory[offset]), offset,
- page_count(page));
- return 0;
- }
-vm_fault_error:
- return VM_FAULT_SIGBUS; /* Disallow mremap */
-}
-#else /* __OS_HAS_AGP */
-static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
-{
- return VM_FAULT_SIGBUS;
-}
-#endif /* __OS_HAS_AGP */
-
-/**
- * \c nopage method for shared virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Get the mapping, find the real physical page to map, get the page, and
- * return it.
- */
-static int drm_do_vm_shm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
-{
- struct drm_map *map = (struct drm_map *) vma->vm_private_data;
- unsigned long offset;
- unsigned long i;
- struct page *page;
-
- if (!map)
- return VM_FAULT_SIGBUS; /* Nothing allocated */
-
- offset = (unsigned long)vmf->virtual_address - vma->vm_start;
- i = (unsigned long)map->handle + offset;
- page = vmalloc_to_page((void *)i);
- if (!page)
- return VM_FAULT_SIGBUS;
- get_page(page);
- vmf->page = page;
-
- DRM_DEBUG("shm_fault 0x%lx\n", offset);
- return 0;
-}
-#endif
-
-/**
- * \c close method for shared virtual memory.
- *
- * \param vma virtual memory area.
- *
- * Deletes map information if we are the last
- * person to close a mapping and it's not in the global maplist.
- */
-static void drm_vm_shm_close(struct vm_area_struct *vma)
-{
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_vma_entry *pt, *temp;
- struct drm_map *map;
- struct drm_map_list *r_list;
- int found_maps = 0;
-
- DRM_DEBUG("0x%08lx,0x%08lx\n",
- vma->vm_start, vma->vm_end - vma->vm_start);
- atomic_dec(&dev->vma_count);
-
- map = vma->vm_private_data;
-
- mutex_lock(&dev->struct_mutex);
- list_for_each_entry_safe(pt, temp, &dev->vmalist, head) {
- if (pt->vma->vm_private_data == map)
- found_maps++;
- if (pt->vma == vma) {
- list_del(&pt->head);
- drm_ctl_free(pt, sizeof(*pt), DRM_MEM_VMAS);
- }
- }
- /* We were the only map that was found */
- if (found_maps == 1 && map->flags & _DRM_REMOVABLE) {
- /* Check to see if we are in the maplist, if we are not, then
- * we delete this mappings information.
- */
- found_maps = 0;
- list_for_each_entry(r_list, &dev->maplist, head) {
- if (r_list->map == map)
- found_maps++;
- }
-
- if (!found_maps) {
- drm_dma_handle_t dmah;
-
- switch (map->type) {
- case _DRM_REGISTERS:
- case _DRM_FRAME_BUFFER:
- if (drm_core_has_MTRR(dev) && map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr,
- map->offset,
- map->size);
- DRM_DEBUG("mtrr_del = %d\n", retcode);
- }
- iounmap(map->handle);
- break;
- case _DRM_SHM:
- vfree(map->handle);
- break;
- case _DRM_AGP:
- case _DRM_SCATTER_GATHER:
- break;
- case _DRM_CONSISTENT:
- dmah.vaddr = map->handle;
- dmah.busaddr = map->offset;
- dmah.size = map->size;
- __drm_pci_free(dev, &dmah);
- break;
- case _DRM_TTM:
- BUG_ON(1);
- break;
- }
- drm_free(map, sizeof(*map), DRM_MEM_MAPS);
- }
- }
- mutex_unlock(&dev->struct_mutex);
-}
-
-#ifndef DRM_VM_NOPAGE
-/**
- * \c fault method for DMA virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Determine the page number from the page offset and get it from drm_device_dma::pagelist.
- */
-static int drm_do_vm_dma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
-{
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_device_dma *dma = dev->dma;
- unsigned long offset;
- unsigned long page_nr;
- struct page *page;
-
- if (!dma)
- return VM_FAULT_SIGBUS; /* Error */
- if (!dma->pagelist)
- return VM_FAULT_SIGBUS; /* Nothing allocated */
-
- offset = (unsigned long)vmf->virtual_address - vma->vm_start; /* vm_[pg]off[set] should be 0 */
- page_nr = offset >> PAGE_SHIFT; /* page_nr could just be vmf->pgoff */
- page = virt_to_page((dma->pagelist[page_nr] + (offset & (~PAGE_MASK))));
-
- get_page(page);
- vmf->page = page;
-
- DRM_DEBUG("dma_fault 0x%lx (page %lu)\n", offset, page_nr);
- return 0;
-}
-
-/**
- * \c fault method for scatter-gather virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Determine the map offset from the page offset and get it from drm_sg_mem::pagelist.
- */
-static int drm_do_vm_sg_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
-{
- struct drm_map *map = (struct drm_map *) vma->vm_private_data;
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_sg_mem *entry = dev->sg;
- unsigned long offset;
- unsigned long map_offset;
- unsigned long page_offset;
- struct page *page;
-
- if (!entry)
- return VM_FAULT_SIGBUS; /* Error */
- if (!entry->pagelist)
- return VM_FAULT_SIGBUS; /* Nothing allocated */
-
- offset = (unsigned long)vmf->virtual_address - vma->vm_start;
- map_offset = map->offset - (unsigned long)dev->sg->virtual;
- page_offset = (offset >> PAGE_SHIFT) + (map_offset >> PAGE_SHIFT);
- page = entry->pagelist[page_offset];
- get_page(page);
- vmf->page = page;
-
- return 0;
-}
-#endif
-
-/** AGP virtual memory operations */
-static struct vm_operations_struct drm_vm_ops = {
-#ifdef DRM_VM_NOPAGE
- .nopage = drm_vm_nopage,
-#else
- .fault = drm_do_vm_fault,
-#endif
- .open = drm_vm_open,
- .close = drm_vm_close,
-};
-
-/** Shared virtual memory operations */
-static struct vm_operations_struct drm_vm_shm_ops = {
-#ifdef DRM_VM_NOPAGE
- .nopage = drm_vm_shm_nopage,
-#else
- .fault = drm_do_vm_shm_fault,
-#endif
- .open = drm_vm_open,
- .close = drm_vm_shm_close,
-};
-
-/** DMA virtual memory operations */
-static struct vm_operations_struct drm_vm_dma_ops = {
-#ifdef DRM_VM_NOPAGE
- .nopage = drm_vm_dma_nopage,
-#else
- .fault = drm_do_vm_dma_fault,
-#endif
- .open = drm_vm_open,
- .close = drm_vm_close,
-};
-
-/** Scatter-gather virtual memory operations */
-static struct vm_operations_struct drm_vm_sg_ops = {
-#ifdef DRM_VM_NOPAGE
- .nopage = drm_vm_sg_nopage,
-#else
- .fault = drm_do_vm_sg_fault,
-#endif
- .open = drm_vm_open,
- .close = drm_vm_close,
-};
-
-/**
- * \c open method for shared virtual memory.
- *
- * \param vma virtual memory area.
- *
- * Create a new drm_vma_entry structure as the \p vma private data entry and
- * add it to drm_device::vmalist.
- */
-static void drm_vm_open_locked(struct vm_area_struct *vma)
-{
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_vma_entry *vma_entry;
-
- DRM_DEBUG("0x%08lx,0x%08lx\n",
- vma->vm_start, vma->vm_end - vma->vm_start);
- atomic_inc(&dev->vma_count);
-
- vma_entry = drm_ctl_alloc(sizeof(*vma_entry), DRM_MEM_VMAS);
- if (vma_entry) {
- vma_entry->vma = vma;
- vma_entry->pid = current->pid;
- list_add(&vma_entry->head, &dev->vmalist);
- }
-}
-
-static void drm_vm_open(struct vm_area_struct *vma)
-{
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
-
- mutex_lock(&dev->struct_mutex);
- drm_vm_open_locked(vma);
- mutex_unlock(&dev->struct_mutex);
-}
-
-/**
- * \c close method for all virtual memory types.
- *
- * \param vma virtual memory area.
- *
- * Search the \p vma private data entry in drm_device::vmalist, unlink it, and
- * free it.
- */
-static void drm_vm_close(struct vm_area_struct *vma)
-{
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_vma_entry *pt, *temp;
-
- DRM_DEBUG("0x%08lx,0x%08lx\n",
- vma->vm_start, vma->vm_end - vma->vm_start);
- atomic_dec(&dev->vma_count);
-
- mutex_lock(&dev->struct_mutex);
- list_for_each_entry_safe(pt, temp, &dev->vmalist, head) {
- if (pt->vma == vma) {
- list_del(&pt->head);
- drm_ctl_free(pt, sizeof(*pt), DRM_MEM_VMAS);
- break;
- }
- }
- mutex_unlock(&dev->struct_mutex);
-}
-
-
-/**
- * mmap DMA memory.
- *
- * \param file_priv DRM file private.
- * \param vma virtual memory area.
- * \return zero on success or a negative number on failure.
- *
- * Sets the virtual memory area operations structure to vm_dma_ops, the file
- * pointer, and calls vm_open().
- */
-static int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma)
-{
- struct drm_file *priv = filp->private_data;
- struct drm_device *dev;
- struct drm_device_dma *dma;
- unsigned long length = vma->vm_end - vma->vm_start;
-
- dev = priv->minor->dev;
- dma = dev->dma;
- DRM_DEBUG("start = 0x%lx, end = 0x%lx, page offset = 0x%lx\n",
- vma->vm_start, vma->vm_end, vma->vm_pgoff);
-
- /* Length must match exact page count */
- if (!dma || (length >> PAGE_SHIFT) != dma->page_count) {
- return -EINVAL;
- }
-
- if (!capable(CAP_SYS_ADMIN) && (dma->flags & _DRM_DMA_USE_PCI_RO)) {
- vma->vm_flags &= ~(VM_WRITE | VM_MAYWRITE);
-#if defined(__i386__) || defined(__x86_64__)
- pgprot_val(vma->vm_page_prot) &= ~_PAGE_RW;
-#else
- /* Ye gads this is ugly. With more thought
- we could move this up higher and use
- `protection_map' instead. */
- vma->vm_page_prot =
- __pgprot(pte_val
- (pte_wrprotect
- (__pte(pgprot_val(vma->vm_page_prot)))));
-#endif
- }
-
- vma->vm_ops = &drm_vm_dma_ops;
- vma->vm_flags |= VM_RESERVED; /* Don't swap */
-
- vma->vm_file = filp; /* Needed for drm_vm_open() */
- drm_vm_open_locked(vma);
- return 0;
-}
-
-unsigned long drm_core_get_map_ofs(struct drm_map * map)
-{
- return map->offset;
-}
-EXPORT_SYMBOL(drm_core_get_map_ofs);
-
-unsigned long drm_core_get_reg_ofs(struct drm_device *dev)
-{
-#ifdef __alpha__
- return dev->hose->dense_mem_base - dev->hose->mem_space->start;
-#else
- return 0;
-#endif
-}
-EXPORT_SYMBOL(drm_core_get_reg_ofs);
-
-/**
- * mmap DMA memory.
- *
- * \param file_priv DRM file private.
- * \param vma virtual memory area.
- * \return zero on success or a negative number on failure.
- *
- * If the virtual memory area has no offset associated with it then it's a DMA
- * area, so calls mmap_dma(). Otherwise searches the map in drm_device::maplist,
- * checks that the restricted flag is not set, sets the virtual memory operations
- * according to the mapping type and remaps the pages. Finally sets the file
- * pointer and calls vm_open().
- */
-static int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
-{
- struct drm_file *priv = filp->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_map *map = NULL;
- unsigned long offset = 0;
- struct drm_hash_item *hash;
-
- DRM_DEBUG("start = 0x%lx, end = 0x%lx, page offset = 0x%lx\n",
- vma->vm_start, vma->vm_end, vma->vm_pgoff);
-
- if (!priv->authenticated)
- return -EACCES;
-
- /* We check for "dma". On Apple's UniNorth, it's valid to have
- * the AGP mapped at physical address 0
- * --BenH.
- */
-
- if (!vma->vm_pgoff
-#if __OS_HAS_AGP
- && (!dev->agp
- || dev->agp->agp_info.device->vendor != PCI_VENDOR_ID_APPLE)
-#endif
- )
- return drm_mmap_dma(filp, vma);
-
- if (drm_ht_find_item(&dev->map_hash, vma->vm_pgoff, &hash)) {
- DRM_ERROR("Could not find map\n");
- return -EINVAL;
- }
-
- map = drm_hash_entry(hash, struct drm_map_list, hash)->map;
- if (!map || ((map->flags & _DRM_RESTRICTED) && !capable(CAP_SYS_ADMIN)))
- return -EPERM;
-
- /* Check for valid size. */
- if (map->size < vma->vm_end - vma->vm_start)
- return -EINVAL;
-
- if (!capable(CAP_SYS_ADMIN) && (map->flags & _DRM_READ_ONLY)) {
- vma->vm_flags &= ~(VM_WRITE | VM_MAYWRITE);
-#if defined(__i386__) || defined(__x86_64__)
- pgprot_val(vma->vm_page_prot) &= ~_PAGE_RW;
-#else
- /* Ye gads this is ugly. With more thought
- we could move this up higher and use
- `protection_map' instead. */
- vma->vm_page_prot =
- __pgprot(pte_val
- (pte_wrprotect
- (__pte(pgprot_val(vma->vm_page_prot)))));
-#endif
- }
-
- switch (map->type) {
- case _DRM_AGP:
- if (drm_core_has_AGP(dev) && dev->agp->cant_use_aperture) {
- /*
- * On some platforms we can't talk to bus dma address from the CPU, so for
- * memory of type DRM_AGP, we'll deal with sorting out the real physical
- * pages and mappings in nopage()
- */
-#if defined(__powerpc__)
- pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
-#endif
- vma->vm_ops = &drm_vm_ops;
- break;
- }
- /* fall through to _DRM_FRAME_BUFFER... */
- case _DRM_FRAME_BUFFER:
- case _DRM_REGISTERS:
- offset = dev->driver->get_reg_ofs(dev);
- vma->vm_flags |= VM_IO; /* not in core dump */
- vma->vm_page_prot = drm_io_prot(map->type, vma);
- if (io_remap_pfn_range(vma, vma->vm_start,
- (map->offset + offset) >> PAGE_SHIFT,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot))
- return -EAGAIN;
- DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx,"
- " offset = 0x%lx\n",
- map->type,
- vma->vm_start, vma->vm_end, map->offset + offset);
- vma->vm_ops = &drm_vm_ops;
- break;
- case _DRM_CONSISTENT:
- /* Consistent memory is really like shared memory. But
- * it's allocated in a different way, so avoid nopage */
- if (remap_pfn_range(vma, vma->vm_start,
- page_to_pfn(virt_to_page(map->handle)),
- vma->vm_end - vma->vm_start, vma->vm_page_prot))
- return -EAGAIN;
- vma->vm_page_prot = drm_dma_prot(map->type, vma);
- /* fall through to _DRM_SHM */
- case _DRM_SHM:
- vma->vm_ops = &drm_vm_shm_ops;
- vma->vm_private_data = (void *)map;
- /* Don't let this area swap. Change when
- DRM_KERNEL advisory is supported. */
- vma->vm_flags |= VM_RESERVED;
- break;
- case _DRM_SCATTER_GATHER:
- vma->vm_ops = &drm_vm_sg_ops;
- vma->vm_private_data = (void *)map;
- vma->vm_flags |= VM_RESERVED;
- vma->vm_page_prot = drm_dma_prot(map->type, vma);
- break;
- default:
- return -EINVAL; /* This should never happen. */
- }
- vma->vm_flags |= VM_RESERVED; /* Don't swap */
-
- vma->vm_file = filp; /* Needed for drm_vm_open() */
- drm_vm_open_locked(vma);
- return 0;
-}
-
-int drm_mmap(struct file *filp, struct vm_area_struct *vma)
-{
- struct drm_file *priv = filp->private_data;
- struct drm_device *dev = priv->minor->dev;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm_mmap_locked(filp, vma);
- mutex_unlock(&dev->struct_mutex);
-
- return ret;
-}
-EXPORT_SYMBOL(drm_mmap);
+++ /dev/null
-/**
- * \file drm_vm.c
- * Memory mapping for DRM
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Created: Mon Jan 4 08:58:31 1999 by faith@valinux.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-#ifdef DRM_VM_NOPAGE
-/**
- * \c nopage method for AGP virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Find the right map and if it's AGP memory find the real physical page to
- * map, get the page, increment the use count and return it.
- */
-#if __OS_HAS_AGP
-static __inline__ struct page *drm_do_vm_nopage(struct vm_area_struct *vma,
- unsigned long address)
-{
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_map *map = NULL;
- struct drm_map_list *r_list;
- struct drm_hash_item *hash;
-
- /*
- * Find the right map
- */
- if (!drm_core_has_AGP(dev))
- goto vm_nopage_error;
-
- if (!dev->agp || !dev->agp->cant_use_aperture)
- goto vm_nopage_error;
-
- if (drm_ht_find_item(&dev->map_hash, vma->vm_pgoff, &hash))
- goto vm_nopage_error;
-
- r_list = drm_hash_entry(hash, struct drm_map_list, hash);
- map = r_list->map;
-
- if (map && map->type == _DRM_AGP) {
- unsigned long offset = address - vma->vm_start;
- unsigned long baddr = map->offset + offset;
- struct drm_agp_mem *agpmem;
- struct page *page;
-
-#ifdef __alpha__
- /*
- * Adjust to a bus-relative address
- */
- baddr -= dev->hose->mem_space->start;
-#endif
-
- /*
- * It's AGP memory - find the real physical page to map
- */
- list_for_each_entry(agpmem, &dev->agp->memory, head) {
- if (agpmem->bound <= baddr &&
- agpmem->bound + agpmem->pages * PAGE_SIZE > baddr)
- break;
- }
-
- if (!agpmem)
- goto vm_nopage_error;
-
- /*
- * Get the page, inc the use count, and return it
- */
- offset = (baddr - agpmem->bound) >> PAGE_SHIFT;
- page = virt_to_page(__va(agpmem->memory->memory[offset]));
- get_page(page);
-
-#if 0
- /* page_count() not defined everywhere */
- DRM_DEBUG
- ("baddr = 0x%lx page = 0x%p, offset = 0x%lx, count=%d\n",
- baddr, __va(agpmem->memory->memory[offset]), offset,
- page_count(page));
-#endif
-
- return page;
- }
- vm_nopage_error:
- return NOPAGE_SIGBUS; /* Disallow mremap */
-}
-#else /* __OS_HAS_AGP */
-static __inline__ struct page *drm_do_vm_nopage(struct vm_area_struct *vma,
- unsigned long address)
-{
- return NOPAGE_SIGBUS;
-}
-#endif /* __OS_HAS_AGP */
-
-/**
- * \c nopage method for shared virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Get the mapping, find the real physical page to map, get the page, and
- * return it.
- */
-static __inline__ struct page *drm_do_vm_shm_nopage(struct vm_area_struct *vma,
- unsigned long address)
-{
- struct drm_map *map = (struct drm_map *) vma->vm_private_data;
- unsigned long offset;
- unsigned long i;
- struct page *page;
-
- if (address > vma->vm_end)
- return NOPAGE_SIGBUS; /* Disallow mremap */
- if (!map)
- return NOPAGE_SIGBUS; /* Nothing allocated */
-
- offset = address - vma->vm_start;
- i = (unsigned long)map->handle + offset;
- page = vmalloc_to_page((void *)i);
- if (!page)
- return NOPAGE_SIGBUS;
- get_page(page);
-
- DRM_DEBUG("0x%lx\n", address);
- return page;
-}
-
-/**
- * \c nopage method for DMA virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Determine the page number from the page offset and get it from drm_device_dma::pagelist.
- */
-static __inline__ struct page *drm_do_vm_dma_nopage(struct vm_area_struct *vma,
- unsigned long address)
-{
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_device_dma *dma = dev->dma;
- unsigned long offset;
- unsigned long page_nr;
- struct page *page;
-
- if (!dma)
- return NOPAGE_SIGBUS; /* Error */
- if (address > vma->vm_end)
- return NOPAGE_SIGBUS; /* Disallow mremap */
- if (!dma->pagelist)
- return NOPAGE_SIGBUS; /* Nothing allocated */
-
- offset = address - vma->vm_start; /* vm_[pg]off[set] should be 0 */
- page_nr = offset >> PAGE_SHIFT;
- page = virt_to_page((dma->pagelist[page_nr] + (offset & (~PAGE_MASK))));
-
- get_page(page);
-
- DRM_DEBUG("0x%lx (page %lu)\n", address, page_nr);
- return page;
-}
-
-/**
- * \c nopage method for scatter-gather virtual memory.
- *
- * \param vma virtual memory area.
- * \param address access address.
- * \return pointer to the page structure.
- *
- * Determine the map offset from the page offset and get it from drm_sg_mem::pagelist.
- */
-static __inline__ struct page *drm_do_vm_sg_nopage(struct vm_area_struct *vma,
- unsigned long address)
-{
- struct drm_map *map = (struct drm_map *) vma->vm_private_data;
- struct drm_file *priv = vma->vm_file->private_data;
- struct drm_device *dev = priv->minor->dev;
- struct drm_sg_mem *entry = dev->sg;
- unsigned long offset;
- unsigned long map_offset;
- unsigned long page_offset;
- struct page *page;
-
- DRM_DEBUG("\n");
- if (!entry)
- return NOPAGE_SIGBUS; /* Error */
- if (address > vma->vm_end)
- return NOPAGE_SIGBUS; /* Disallow mremap */
- if (!entry->pagelist)
- return NOPAGE_SIGBUS; /* Nothing allocated */
-
- offset = address - vma->vm_start;
- map_offset = map->offset - (unsigned long)dev->sg->virtual;
- page_offset = (offset >> PAGE_SHIFT) + (map_offset >> PAGE_SHIFT);
- page = entry->pagelist[page_offset];
- get_page(page);
-
- return page;
-}
-
-
-struct page *drm_vm_nopage(struct vm_area_struct *vma,
- unsigned long address, int *type)
-{
- if (type)
- *type = VM_FAULT_MINOR;
- return drm_do_vm_nopage(vma, address);
-}
-
-struct page *drm_vm_shm_nopage(struct vm_area_struct *vma,
- unsigned long address, int *type)
-{
- if (type)
- *type = VM_FAULT_MINOR;
- return drm_do_vm_shm_nopage(vma, address);
-}
-
-struct page *drm_vm_dma_nopage(struct vm_area_struct *vma,
- unsigned long address, int *type)
-{
- if (type)
- *type = VM_FAULT_MINOR;
- return drm_do_vm_dma_nopage(vma, address);
-}
-
-struct page *drm_vm_sg_nopage(struct vm_area_struct *vma,
- unsigned long address, int *type)
-{
- if (type)
- *type = VM_FAULT_MINOR;
- return drm_do_vm_sg_nopage(vma, address);
-}
-#endif
+++ /dev/null
-/* $Id$
- * ffb_context.c: Creator/Creator3D DRI/DRM context switching.
- *
- * Copyright (C) 2000 David S. Miller (davem@redhat.com)
- *
- * Almost entirely stolen from tdfx_context.c, see there
- * for authors.
- */
-
-#include <linux/sched.h>
-#include <asm/upa.h>
-
-#include "drmP.h"
-#include "ffb_drv.h"
-
-static int ffb_alloc_queue(struct drm_device * dev, int is_2d_only) {
- ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private;
- int i;
-
- for (i = 0; i < FFB_MAX_CTXS; i++) {
- if (fpriv->hw_state[i] == NULL)
- break;
- }
- if (i == FFB_MAX_CTXS)
- return -1;
-
- fpriv->hw_state[i] = kmalloc(sizeof(struct ffb_hw_context), GFP_KERNEL);
- if (fpriv->hw_state[i] == NULL)
- return -1;
-
- fpriv->hw_state[i]->is_2d_only = is_2d_only;
-
- /* Plus one because 0 is the special DRM_KERNEL_CONTEXT. */
- return i + 1;
-}
-
-static void ffb_save_context(ffb_dev_priv_t * fpriv, int idx)
-{
- ffb_fbcPtr ffb = fpriv->regs;
- struct ffb_hw_context *ctx;
- int i;
-
- ctx = fpriv->hw_state[idx - 1];
- if (idx == 0 || ctx == NULL)
- return;
-
- if (ctx->is_2d_only) {
- /* 2D applications only care about certain pieces
- * of state.
- */
- ctx->drawop = upa_readl(&ffb->drawop);
- ctx->ppc = upa_readl(&ffb->ppc);
- ctx->wid = upa_readl(&ffb->wid);
- ctx->fg = upa_readl(&ffb->fg);
- ctx->bg = upa_readl(&ffb->bg);
- ctx->xclip = upa_readl(&ffb->xclip);
- ctx->fbc = upa_readl(&ffb->fbc);
- ctx->rop = upa_readl(&ffb->rop);
- ctx->cmp = upa_readl(&ffb->cmp);
- ctx->matchab = upa_readl(&ffb->matchab);
- ctx->magnab = upa_readl(&ffb->magnab);
- ctx->pmask = upa_readl(&ffb->pmask);
- ctx->xpmask = upa_readl(&ffb->xpmask);
- ctx->lpat = upa_readl(&ffb->lpat);
- ctx->fontxy = upa_readl(&ffb->fontxy);
- ctx->fontw = upa_readl(&ffb->fontw);
- ctx->fontinc = upa_readl(&ffb->fontinc);
-
- /* stencil/stencilctl only exists on FFB2+ and later
- * due to the introduction of 3DRAM-III.
- */
- if (fpriv->ffb_type == ffb2_vertical_plus ||
- fpriv->ffb_type == ffb2_horizontal_plus) {
- ctx->stencil = upa_readl(&ffb->stencil);
- ctx->stencilctl = upa_readl(&ffb->stencilctl);
- }
-
- for (i = 0; i < 32; i++)
- ctx->area_pattern[i] = upa_readl(&ffb->pattern[i]);
- ctx->ucsr = upa_readl(&ffb->ucsr);
- return;
- }
-
- /* Fetch drawop. */
- ctx->drawop = upa_readl(&ffb->drawop);
-
- /* If we were saving the vertex registers, this is where
- * we would do it. We would save 32 32-bit words starting
- * at ffb->suvtx.
- */
-
- /* Capture rendering attributes. */
-
- ctx->ppc = upa_readl(&ffb->ppc); /* Pixel Processor Control */
- ctx->wid = upa_readl(&ffb->wid); /* Current WID */
- ctx->fg = upa_readl(&ffb->fg); /* Constant FG color */
- ctx->bg = upa_readl(&ffb->bg); /* Constant BG color */
- ctx->consty = upa_readl(&ffb->consty); /* Constant Y */
- ctx->constz = upa_readl(&ffb->constz); /* Constant Z */
- ctx->xclip = upa_readl(&ffb->xclip); /* X plane clip */
- ctx->dcss = upa_readl(&ffb->dcss); /* Depth Cue Scale Slope */
- ctx->vclipmin = upa_readl(&ffb->vclipmin); /* Primary XY clip, minimum */
- ctx->vclipmax = upa_readl(&ffb->vclipmax); /* Primary XY clip, maximum */
- ctx->vclipzmin = upa_readl(&ffb->vclipzmin); /* Primary Z clip, minimum */
- ctx->vclipzmax = upa_readl(&ffb->vclipzmax); /* Primary Z clip, maximum */
- ctx->dcsf = upa_readl(&ffb->dcsf); /* Depth Cue Scale Front Bound */
- ctx->dcsb = upa_readl(&ffb->dcsb); /* Depth Cue Scale Back Bound */
- ctx->dczf = upa_readl(&ffb->dczf); /* Depth Cue Scale Z Front */
- ctx->dczb = upa_readl(&ffb->dczb); /* Depth Cue Scale Z Back */
- ctx->blendc = upa_readl(&ffb->blendc); /* Alpha Blend Control */
- ctx->blendc1 = upa_readl(&ffb->blendc1); /* Alpha Blend Color 1 */
- ctx->blendc2 = upa_readl(&ffb->blendc2); /* Alpha Blend Color 2 */
- ctx->fbc = upa_readl(&ffb->fbc); /* Frame Buffer Control */
- ctx->rop = upa_readl(&ffb->rop); /* Raster Operation */
- ctx->cmp = upa_readl(&ffb->cmp); /* Compare Controls */
- ctx->matchab = upa_readl(&ffb->matchab); /* Buffer A/B Match Ops */
- ctx->matchc = upa_readl(&ffb->matchc); /* Buffer C Match Ops */
- ctx->magnab = upa_readl(&ffb->magnab); /* Buffer A/B Magnitude Ops */
- ctx->magnc = upa_readl(&ffb->magnc); /* Buffer C Magnitude Ops */
- ctx->pmask = upa_readl(&ffb->pmask); /* RGB Plane Mask */
- ctx->xpmask = upa_readl(&ffb->xpmask); /* X Plane Mask */
- ctx->ypmask = upa_readl(&ffb->ypmask); /* Y Plane Mask */
- ctx->zpmask = upa_readl(&ffb->zpmask); /* Z Plane Mask */
-
- /* Auxiliary Clips. */
- ctx->auxclip0min = upa_readl(&ffb->auxclip[0].min);
- ctx->auxclip0max = upa_readl(&ffb->auxclip[0].max);
- ctx->auxclip1min = upa_readl(&ffb->auxclip[1].min);
- ctx->auxclip1max = upa_readl(&ffb->auxclip[1].max);
- ctx->auxclip2min = upa_readl(&ffb->auxclip[2].min);
- ctx->auxclip2max = upa_readl(&ffb->auxclip[2].max);
- ctx->auxclip3min = upa_readl(&ffb->auxclip[3].min);
- ctx->auxclip3max = upa_readl(&ffb->auxclip[3].max);
-
- ctx->lpat = upa_readl(&ffb->lpat); /* Line Pattern */
- ctx->fontxy = upa_readl(&ffb->fontxy); /* XY Font Coordinate */
- ctx->fontw = upa_readl(&ffb->fontw); /* Font Width */
- ctx->fontinc = upa_readl(&ffb->fontinc); /* Font X/Y Increment */
-
- /* These registers/features only exist on FFB2 and later chips. */
- if (fpriv->ffb_type >= ffb2_prototype) {
- ctx->dcss1 = upa_readl(&ffb->dcss1); /* Depth Cue Scale Slope 1 */
- ctx->dcss2 = upa_readl(&ffb->dcss2); /* Depth Cue Scale Slope 2 */
- ctx->dcss2 = upa_readl(&ffb->dcss3); /* Depth Cue Scale Slope 3 */
- ctx->dcs2 = upa_readl(&ffb->dcs2); /* Depth Cue Scale 2 */
- ctx->dcs3 = upa_readl(&ffb->dcs3); /* Depth Cue Scale 3 */
- ctx->dcs4 = upa_readl(&ffb->dcs4); /* Depth Cue Scale 4 */
- ctx->dcd2 = upa_readl(&ffb->dcd2); /* Depth Cue Depth 2 */
- ctx->dcd3 = upa_readl(&ffb->dcd3); /* Depth Cue Depth 3 */
- ctx->dcd4 = upa_readl(&ffb->dcd4); /* Depth Cue Depth 4 */
-
- /* And stencil/stencilctl only exists on FFB2+ and later
- * due to the introduction of 3DRAM-III.
- */
- if (fpriv->ffb_type == ffb2_vertical_plus ||
- fpriv->ffb_type == ffb2_horizontal_plus) {
- ctx->stencil = upa_readl(&ffb->stencil);
- ctx->stencilctl = upa_readl(&ffb->stencilctl);
- }
- }
-
- /* Save the 32x32 area pattern. */
- for (i = 0; i < 32; i++)
- ctx->area_pattern[i] = upa_readl(&ffb->pattern[i]);
-
- /* Finally, stash away the User Constol/Status Register. */
- ctx->ucsr = upa_readl(&ffb->ucsr);
-}
-
-static void ffb_restore_context(ffb_dev_priv_t * fpriv, int old, int idx)
-{
- ffb_fbcPtr ffb = fpriv->regs;
- struct ffb_hw_context *ctx;
- int i;
-
- ctx = fpriv->hw_state[idx - 1];
- if (idx == 0 || ctx == NULL)
- return;
-
- if (ctx->is_2d_only) {
- /* 2D applications only care about certain pieces
- * of state.
- */
- upa_writel(ctx->drawop, &ffb->drawop);
-
- /* If we were restoring the vertex registers, this is where
- * we would do it. We would restore 32 32-bit words starting
- * at ffb->suvtx.
- */
-
- upa_writel(ctx->ppc, &ffb->ppc);
- upa_writel(ctx->wid, &ffb->wid);
- upa_writel(ctx->fg, &ffb->fg);
- upa_writel(ctx->bg, &ffb->bg);
- upa_writel(ctx->xclip, &ffb->xclip);
- upa_writel(ctx->fbc, &ffb->fbc);
- upa_writel(ctx->rop, &ffb->rop);
- upa_writel(ctx->cmp, &ffb->cmp);
- upa_writel(ctx->matchab, &ffb->matchab);
- upa_writel(ctx->magnab, &ffb->magnab);
- upa_writel(ctx->pmask, &ffb->pmask);
- upa_writel(ctx->xpmask, &ffb->xpmask);
- upa_writel(ctx->lpat, &ffb->lpat);
- upa_writel(ctx->fontxy, &ffb->fontxy);
- upa_writel(ctx->fontw, &ffb->fontw);
- upa_writel(ctx->fontinc, &ffb->fontinc);
-
- /* stencil/stencilctl only exists on FFB2+ and later
- * due to the introduction of 3DRAM-III.
- */
- if (fpriv->ffb_type == ffb2_vertical_plus ||
- fpriv->ffb_type == ffb2_horizontal_plus) {
- upa_writel(ctx->stencil, &ffb->stencil);
- upa_writel(ctx->stencilctl, &ffb->stencilctl);
- upa_writel(0x80000000, &ffb->fbc);
- upa_writel((ctx->stencilctl | 0x80000),
- &ffb->rawstencilctl);
- upa_writel(ctx->fbc, &ffb->fbc);
- }
-
- for (i = 0; i < 32; i++)
- upa_writel(ctx->area_pattern[i], &ffb->pattern[i]);
- upa_writel((ctx->ucsr & 0xf0000), &ffb->ucsr);
- return;
- }
-
- /* Restore drawop. */
- upa_writel(ctx->drawop, &ffb->drawop);
-
- /* If we were restoring the vertex registers, this is where
- * we would do it. We would restore 32 32-bit words starting
- * at ffb->suvtx.
- */
-
- /* Restore rendering attributes. */
-
- upa_writel(ctx->ppc, &ffb->ppc); /* Pixel Processor Control */
- upa_writel(ctx->wid, &ffb->wid); /* Current WID */
- upa_writel(ctx->fg, &ffb->fg); /* Constant FG color */
- upa_writel(ctx->bg, &ffb->bg); /* Constant BG color */
- upa_writel(ctx->consty, &ffb->consty); /* Constant Y */
- upa_writel(ctx->constz, &ffb->constz); /* Constant Z */
- upa_writel(ctx->xclip, &ffb->xclip); /* X plane clip */
- upa_writel(ctx->dcss, &ffb->dcss); /* Depth Cue Scale Slope */
- upa_writel(ctx->vclipmin, &ffb->vclipmin); /* Primary XY clip, minimum */
- upa_writel(ctx->vclipmax, &ffb->vclipmax); /* Primary XY clip, maximum */
- upa_writel(ctx->vclipzmin, &ffb->vclipzmin); /* Primary Z clip, minimum */
- upa_writel(ctx->vclipzmax, &ffb->vclipzmax); /* Primary Z clip, maximum */
- upa_writel(ctx->dcsf, &ffb->dcsf); /* Depth Cue Scale Front Bound */
- upa_writel(ctx->dcsb, &ffb->dcsb); /* Depth Cue Scale Back Bound */
- upa_writel(ctx->dczf, &ffb->dczf); /* Depth Cue Scale Z Front */
- upa_writel(ctx->dczb, &ffb->dczb); /* Depth Cue Scale Z Back */
- upa_writel(ctx->blendc, &ffb->blendc); /* Alpha Blend Control */
- upa_writel(ctx->blendc1, &ffb->blendc1); /* Alpha Blend Color 1 */
- upa_writel(ctx->blendc2, &ffb->blendc2); /* Alpha Blend Color 2 */
- upa_writel(ctx->fbc, &ffb->fbc); /* Frame Buffer Control */
- upa_writel(ctx->rop, &ffb->rop); /* Raster Operation */
- upa_writel(ctx->cmp, &ffb->cmp); /* Compare Controls */
- upa_writel(ctx->matchab, &ffb->matchab); /* Buffer A/B Match Ops */
- upa_writel(ctx->matchc, &ffb->matchc); /* Buffer C Match Ops */
- upa_writel(ctx->magnab, &ffb->magnab); /* Buffer A/B Magnitude Ops */
- upa_writel(ctx->magnc, &ffb->magnc); /* Buffer C Magnitude Ops */
- upa_writel(ctx->pmask, &ffb->pmask); /* RGB Plane Mask */
- upa_writel(ctx->xpmask, &ffb->xpmask); /* X Plane Mask */
- upa_writel(ctx->ypmask, &ffb->ypmask); /* Y Plane Mask */
- upa_writel(ctx->zpmask, &ffb->zpmask); /* Z Plane Mask */
-
- /* Auxiliary Clips. */
- upa_writel(ctx->auxclip0min, &ffb->auxclip[0].min);
- upa_writel(ctx->auxclip0max, &ffb->auxclip[0].max);
- upa_writel(ctx->auxclip1min, &ffb->auxclip[1].min);
- upa_writel(ctx->auxclip1max, &ffb->auxclip[1].max);
- upa_writel(ctx->auxclip2min, &ffb->auxclip[2].min);
- upa_writel(ctx->auxclip2max, &ffb->auxclip[2].max);
- upa_writel(ctx->auxclip3min, &ffb->auxclip[3].min);
- upa_writel(ctx->auxclip3max, &ffb->auxclip[3].max);
-
- upa_writel(ctx->lpat, &ffb->lpat); /* Line Pattern */
- upa_writel(ctx->fontxy, &ffb->fontxy); /* XY Font Coordinate */
- upa_writel(ctx->fontw, &ffb->fontw); /* Font Width */
- upa_writel(ctx->fontinc, &ffb->fontinc); /* Font X/Y Increment */
-
- /* These registers/features only exist on FFB2 and later chips. */
- if (fpriv->ffb_type >= ffb2_prototype) {
- upa_writel(ctx->dcss1, &ffb->dcss1); /* Depth Cue Scale Slope 1 */
- upa_writel(ctx->dcss2, &ffb->dcss2); /* Depth Cue Scale Slope 2 */
- upa_writel(ctx->dcss3, &ffb->dcss2); /* Depth Cue Scale Slope 3 */
- upa_writel(ctx->dcs2, &ffb->dcs2); /* Depth Cue Scale 2 */
- upa_writel(ctx->dcs3, &ffb->dcs3); /* Depth Cue Scale 3 */
- upa_writel(ctx->dcs4, &ffb->dcs4); /* Depth Cue Scale 4 */
- upa_writel(ctx->dcd2, &ffb->dcd2); /* Depth Cue Depth 2 */
- upa_writel(ctx->dcd3, &ffb->dcd3); /* Depth Cue Depth 3 */
- upa_writel(ctx->dcd4, &ffb->dcd4); /* Depth Cue Depth 4 */
-
- /* And stencil/stencilctl only exists on FFB2+ and later
- * due to the introduction of 3DRAM-III.
- */
- if (fpriv->ffb_type == ffb2_vertical_plus ||
- fpriv->ffb_type == ffb2_horizontal_plus) {
- /* Unfortunately, there is a hardware bug on
- * the FFB2+ chips which prevents a normal write
- * to the stencil control register from working
- * as it should.
- *
- * The state controlled by the FFB stencilctl register
- * really gets transferred to the per-buffer instances
- * of the stencilctl register in the 3DRAM chips.
- *
- * The bug is that FFB does not update buffer C correctly,
- * so we have to do it by hand for them.
- */
-
- /* This will update buffers A and B. */
- upa_writel(ctx->stencil, &ffb->stencil);
- upa_writel(ctx->stencilctl, &ffb->stencilctl);
-
- /* Force FFB to use buffer C 3dram regs. */
- upa_writel(0x80000000, &ffb->fbc);
- upa_writel((ctx->stencilctl | 0x80000),
- &ffb->rawstencilctl);
-
- /* Now restore the correct FBC controls. */
- upa_writel(ctx->fbc, &ffb->fbc);
- }
- }
-
- /* Restore the 32x32 area pattern. */
- for (i = 0; i < 32; i++)
- upa_writel(ctx->area_pattern[i], &ffb->pattern[i]);
-
- /* Finally, stash away the User Constol/Status Register.
- * The only state we really preserve here is the picking
- * control.
- */
- upa_writel((ctx->ucsr & 0xf0000), &ffb->ucsr);
-}
-
-#define FFB_UCSR_FB_BUSY 0x01000000
-#define FFB_UCSR_RP_BUSY 0x02000000
-#define FFB_UCSR_ALL_BUSY (FFB_UCSR_RP_BUSY|FFB_UCSR_FB_BUSY)
-
-static void FFBWait(ffb_fbcPtr ffb)
-{
- int limit = 100000;
-
- do {
- u32 regval = upa_readl(&ffb->ucsr);
-
- if ((regval & FFB_UCSR_ALL_BUSY) == 0)
- break;
- } while (--limit);
-}
-
-int ffb_context_switch(struct drm_device * dev, int old, int new) {
- ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private;
-
-#if DRM_DMA_HISTOGRAM
- dev->ctx_start = get_cycles();
-#endif
-
- DRM_DEBUG("Context switch from %d to %d\n", old, new);
-
- if (new == dev->last_context || dev->last_context == 0) {
- dev->last_context = new;
- return 0;
- }
-
- FFBWait(fpriv->regs);
- ffb_save_context(fpriv, old);
- ffb_restore_context(fpriv, old, new);
- FFBWait(fpriv->regs);
-
- dev->last_context = new;
-
- return 0;
-}
-
-int ffb_resctx(struct inode * inode, struct file * filp, unsigned int cmd,
- unsigned long arg) {
- drm_ctx_res_t res;
- drm_ctx_t ctx;
- int i;
-
- DRM_DEBUG("%d\n", DRM_RESERVED_CONTEXTS);
- if (copy_from_user(&res, (drm_ctx_res_t __user *) arg, sizeof(res)))
- return -EFAULT;
- if (res.count >= DRM_RESERVED_CONTEXTS) {
- memset(&ctx, 0, sizeof(ctx));
- for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) {
- ctx.handle = i;
- if (copy_to_user(&res.contexts[i], &i, sizeof(i)))
- return -EFAULT;
- }
- }
- res.count = DRM_RESERVED_CONTEXTS;
- if (copy_to_user((drm_ctx_res_t __user *) arg, &res, sizeof(res)))
- return -EFAULT;
- return 0;
-}
-
-int ffb_addctx(struct inode * inode, struct file * filp, unsigned int cmd,
- unsigned long arg) {
- drm_file_t *priv = filp->private_data;
- struct drm_device *dev = priv->dev;
- drm_ctx_t ctx;
- int idx;
-
- if (copy_from_user(&ctx, (drm_ctx_t __user *) arg, sizeof(ctx)))
- return -EFAULT;
- idx = ffb_alloc_queue(dev, (ctx.flags & _DRM_CONTEXT_2DONLY));
- if (idx < 0)
- return -ENFILE;
-
- DRM_DEBUG("%d\n", ctx.handle);
- ctx.handle = idx;
- if (copy_to_user((drm_ctx_t __user *) arg, &ctx, sizeof(ctx)))
- return -EFAULT;
- return 0;
-}
-
-int ffb_modctx(struct inode * inode, struct file * filp, unsigned int cmd,
- unsigned long arg) {
- drm_file_t *priv = filp->private_data;
- struct drm_device *dev = priv->dev;
- ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private;
- struct ffb_hw_context *hwctx;
- drm_ctx_t ctx;
- int idx;
-
- if (copy_from_user(&ctx, (drm_ctx_t __user *) arg, sizeof(ctx)))
- return -EFAULT;
-
- idx = ctx.handle;
- if (idx <= 0 || idx >= FFB_MAX_CTXS)
- return -EINVAL;
-
- hwctx = fpriv->hw_state[idx - 1];
- if (hwctx == NULL)
- return -EINVAL;
-
- if ((ctx.flags & _DRM_CONTEXT_2DONLY) == 0)
- hwctx->is_2d_only = 0;
- else
- hwctx->is_2d_only = 1;
-
- return 0;
-}
-
-int ffb_getctx(struct inode * inode, struct file * filp, unsigned int cmd,
- unsigned long arg) {
- drm_file_t *priv = filp->private_data;
- struct drm_device *dev = priv->dev;
- ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private;
- struct ffb_hw_context *hwctx;
- drm_ctx_t ctx;
- int idx;
-
- if (copy_from_user(&ctx, (drm_ctx_t __user *) arg, sizeof(ctx)))
- return -EFAULT;
-
- idx = ctx.handle;
- if (idx <= 0 || idx >= FFB_MAX_CTXS)
- return -EINVAL;
-
- hwctx = fpriv->hw_state[idx - 1];
- if (hwctx == NULL)
- return -EINVAL;
-
- if (hwctx->is_2d_only != 0)
- ctx.flags = _DRM_CONTEXT_2DONLY;
- else
- ctx.flags = 0;
-
- if (copy_to_user((drm_ctx_t __user *) arg, &ctx, sizeof(ctx)))
- return -EFAULT;
-
- return 0;
-}
-
-int ffb_switchctx(struct inode * inode, struct file * filp, unsigned int cmd,
- unsigned long arg) {
- drm_file_t *priv = filp->private_data;
- struct drm_device *dev = priv->dev;
- drm_ctx_t ctx;
-
- if (copy_from_user(&ctx, (drm_ctx_t __user *) arg, sizeof(ctx)))
- return -EFAULT;
- DRM_DEBUG("%d\n", ctx.handle);
- return ffb_context_switch(dev, dev->last_context, ctx.handle);
-}
-
-int ffb_newctx(struct inode * inode, struct file * filp, unsigned int cmd,
- unsigned long arg) {
- drm_ctx_t ctx;
-
- if (copy_from_user(&ctx, (drm_ctx_t __user *) arg, sizeof(ctx)))
- return -EFAULT;
- DRM_DEBUG("%d\n", ctx.handle);
-
- return 0;
-}
-
-int ffb_rmctx(struct inode * inode, struct file * filp, unsigned int cmd,
- unsigned long arg) {
- drm_ctx_t ctx;
- drm_file_t *priv = filp->private_data;
- struct drm_device *dev = priv->dev;
- ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private;
- int idx;
-
- if (copy_from_user(&ctx, (drm_ctx_t __user *) arg, sizeof(ctx)))
- return -EFAULT;
- DRM_DEBUG("%d\n", ctx.handle);
-
- idx = ctx.handle - 1;
- if (idx < 0 || idx >= FFB_MAX_CTXS)
- return -EINVAL;
-
- if (fpriv->hw_state[idx] != NULL) {
- kfree(fpriv->hw_state[idx]);
- fpriv->hw_state[idx] = NULL;
- }
- return 0;
-}
-
-static void ffb_driver_reclaim_buffers_locked(struct drm_device * dev)
-{
- ffb_dev_priv_t *fpriv = (ffb_dev_priv_t *) dev->dev_private;
- int context = _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock);
- int idx;
-
- idx = context - 1;
- if (fpriv &&
- context != DRM_KERNEL_CONTEXT && fpriv->hw_state[idx] != NULL) {
- kfree(fpriv->hw_state[idx]);
- fpriv->hw_state[idx] = NULL;
- }
-}
-
-static void ffb_driver_lastclose(struct drm_device * dev)
-{
- if (dev->dev_private)
- kfree(dev->dev_private);
-}
-
-static void ffb_driver_unload(struct drm_device * dev)
-{
- if (ffb_position != NULL)
- kfree(ffb_position);
-}
-
-static int ffb_driver_kernel_context_switch_unlock(struct drm_device *dev)
-{
- dev->lock.filp = 0;
- {
- __volatile__ unsigned int *plock = &dev->lock.hw_lock->lock;
- unsigned int old, new, prev, ctx;
-
- ctx = lock.context;
- do {
- old = *plock;
- new = ctx;
- prev = cmpxchg(plock, old, new);
- } while (prev != old);
- }
- wake_up_interruptible(&dev->lock.lock_queue);
-}
-
-unsigned long ffb_driver_get_map_ofs(drm_map_t * map)
-{
- return (map->offset & 0xffffffff);
-}
-
-unsigned long ffb_driver_get_reg_ofs(struct drm_device * dev)
-{
- ffb_dev_priv_t *ffb_priv = (ffb_dev_priv_t *) dev->dev_private;
-
- if (ffb_priv)
- return ffb_priv->card_phys_base;
-
- return 0;
-}
+++ /dev/null
-/* $Id$
- * ffb_drv.c: Creator/Creator3D direct rendering driver.
- *
- * Copyright (C) 2000 David S. Miller (davem@redhat.com)
- */
-
-#include <linux/sched.h>
-#include <linux/smp_lock.h>
-#include <asm/shmparam.h>
-#include <asm/oplib.h>
-#include <asm/upa.h>
-
-#include "drmP.h"
-#include "ffb_drv.h"
-
-#define DRIVER_AUTHOR "David S. Miller"
-
-#define DRIVER_NAME "ffb"
-#define DRIVER_DESC "Creator/Creator3D"
-#define DRIVER_DATE "20000517"
-
-#define DRIVER_MAJOR 0
-#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 1
-
-typedef struct _ffb_position_t {
- int node;
- int root;
-} ffb_position_t;
-
-static ffb_position_t *ffb_position;
-
-static void get_ffb_type(ffb_dev_priv_t *ffb_priv, int instance)
-{
- volatile unsigned char *strap_bits;
- unsigned char val;
-
- strap_bits = (volatile unsigned char *)
- (ffb_priv->card_phys_base + 0x00200000UL);
-
- /* Don't ask, you have to read the value twice for whatever
- * reason to get correct contents.
- */
- val = upa_readb(strap_bits);
- val = upa_readb(strap_bits);
- switch (val & 0x78) {
- case (0x0 << 5) | (0x0 << 3):
- ffb_priv->ffb_type = ffb1_prototype;
- printk("ffb%d: Detected FFB1 pre-FCS prototype\n", instance);
- break;
- case (0x0 << 5) | (0x1 << 3):
- ffb_priv->ffb_type = ffb1_standard;
- printk("ffb%d: Detected FFB1\n", instance);
- break;
- case (0x0 << 5) | (0x3 << 3):
- ffb_priv->ffb_type = ffb1_speedsort;
- printk("ffb%d: Detected FFB1-SpeedSort\n", instance);
- break;
- case (0x1 << 5) | (0x0 << 3):
- ffb_priv->ffb_type = ffb2_prototype;
- printk("ffb%d: Detected FFB2/vertical pre-FCS prototype\n", instance);
- break;
- case (0x1 << 5) | (0x1 << 3):
- ffb_priv->ffb_type = ffb2_vertical;
- printk("ffb%d: Detected FFB2/vertical\n", instance);
- break;
- case (0x1 << 5) | (0x2 << 3):
- ffb_priv->ffb_type = ffb2_vertical_plus;
- printk("ffb%d: Detected FFB2+/vertical\n", instance);
- break;
- case (0x2 << 5) | (0x0 << 3):
- ffb_priv->ffb_type = ffb2_horizontal;
- printk("ffb%d: Detected FFB2/horizontal\n", instance);
- break;
- case (0x2 << 5) | (0x2 << 3):
- ffb_priv->ffb_type = ffb2_horizontal;
- printk("ffb%d: Detected FFB2+/horizontal\n", instance);
- break;
- default:
- ffb_priv->ffb_type = ffb2_vertical;
- printk("ffb%d: Unknown boardID[%08x], assuming FFB2\n", instance, val);
- break;
- };
-}
-
-static void ffb_apply_upa_parent_ranges(int parent,
- struct linux_prom64_registers *regs)
-{
- struct linux_prom64_ranges ranges[PROMREG_MAX];
- char name[128];
- int len, i;
-
- prom_getproperty(parent, "name", name, sizeof(name));
- if (strcmp(name, "upa") != 0)
- return;
-
- len = prom_getproperty(parent, "ranges", (void *) ranges, sizeof(ranges));
- if (len <= 0)
- return;
-
- len /= sizeof(struct linux_prom64_ranges);
- for (i = 0; i < len; i++) {
- struct linux_prom64_ranges *rng = &ranges[i];
- u64 phys_addr = regs->phys_addr;
-
- if (phys_addr >= rng->ot_child_base &&
- phys_addr < (rng->ot_child_base + rng->or_size)) {
- regs->phys_addr -= rng->ot_child_base;
- regs->phys_addr += rng->ot_parent_base;
- return;
- }
- }
-
- return;
-}
-
-static int ffb_init_one(struct drm_device *dev, int prom_node, int parent_node,
- int instance)
-{
- struct linux_prom64_registers regs[2*PROMREG_MAX];
- ffb_dev_priv_t *ffb_priv = (ffb_dev_priv_t *)dev->dev_private;
- int i;
-
- ffb_priv->prom_node = prom_node;
- if (prom_getproperty(ffb_priv->prom_node, "reg",
- (void *)regs, sizeof(regs)) <= 0) {
- return -EINVAL;
- }
- ffb_apply_upa_parent_ranges(parent_node, ®s[0]);
- ffb_priv->card_phys_base = regs[0].phys_addr;
- ffb_priv->regs = (ffb_fbcPtr)
- (regs[0].phys_addr + 0x00600000UL);
- get_ffb_type(ffb_priv, instance);
- for (i = 0; i < FFB_MAX_CTXS; i++)
- ffb_priv->hw_state[i] = NULL;
-
- return 0;
-}
-
-static int __init ffb_count_siblings(int root)
-{
- int node, child, count = 0;
-
- child = prom_getchild(root);
- for (node = prom_searchsiblings(child, "SUNW,ffb"); node;
- node = prom_searchsiblings(prom_getsibling(node), "SUNW,ffb"))
- count++;
-
- return count;
-}
-
-static int __init ffb_scan_siblings(int root, int instance)
-{
- int node, child;
-
- child = prom_getchild(root);
- for (node = prom_searchsiblings(child, "SUNW,ffb"); node;
- node = prom_searchsiblings(prom_getsibling(node), "SUNW,ffb")) {
- ffb_position[instance].node = node;
- ffb_position[instance].root = root;
- instance++;
- }
-
- return instance;
-}
-
-static drm_map_t *ffb_find_map(struct file *filp, unsigned long off)
-{
- drm_file_t *priv = filp->private_data;
- struct drm_device *dev;
- drm_map_list_t *r_list;
- struct list_head *list;
- drm_map_t *map;
-
- if (!priv || (dev = priv->dev) == NULL)
- return NULL;
-
- list_for_each(list, &dev->maplist->head) {
- unsigned long uoff;
-
- r_list = (drm_map_list_t *)list;
- map = r_list->map;
- if (!map)
- continue;
- uoff = (map->offset & 0xffffffff);
- if (uoff == off)
- return map;
- }
-
- return NULL;
-}
-
-unsigned long ffb_get_unmapped_area(struct file *filp,
- unsigned long hint,
- unsigned long len,
- unsigned long pgoff,
- unsigned long flags)
-{
- drm_map_t *map = ffb_find_map(filp, pgoff << PAGE_SHIFT);
- unsigned long addr = -ENOMEM;
-
- if (!map)
- return get_unmapped_area(NULL, hint, len, pgoff, flags);
-
- if (map->type == _DRM_FRAME_BUFFER ||
- map->type == _DRM_REGISTERS) {
-#ifdef HAVE_ARCH_FB_UNMAPPED_AREA
- addr = get_fb_unmapped_area(filp, hint, len, pgoff, flags);
-#else
- addr = get_unmapped_area(NULL, hint, len, pgoff, flags);
-#endif
- } else if (map->type == _DRM_SHM && SHMLBA > PAGE_SIZE) {
- unsigned long slack = SHMLBA - PAGE_SIZE;
-
- addr = get_unmapped_area(NULL, hint, len + slack, pgoff, flags);
- if (!(addr & ~PAGE_MASK)) {
- unsigned long kvirt = (unsigned long) map->handle;
-
- if ((kvirt & (SHMLBA - 1)) != (addr & (SHMLBA - 1))) {
- unsigned long koff, aoff;
-
- koff = kvirt & (SHMLBA - 1);
- aoff = addr & (SHMLBA - 1);
- if (koff < aoff)
- koff += SHMLBA;
-
- addr += (koff - aoff);
- }
- }
- } else {
- addr = get_unmapped_area(NULL, hint, len, pgoff, flags);
- }
-
- return addr;
-}
-
-/* This functions must be here since it references drm_numdevs)
- * which drm_drv.h declares.
- */
-static int ffb_driver_firstopen(struct drm_device *dev)
-{
- ffb_dev_priv_t *ffb_priv;
- struct drm_device *temp_dev;
- int ret = 0;
- int i;
-
- /* Check for the case where no device was found. */
- if (ffb_position == NULL)
- return -ENODEV;
-
- /* Find our instance number by finding our device in dev structure */
- for (i = 0; i < drm_numdevs; i++) {
- temp_dev = &(drm_device[i]);
- if(temp_dev == dev)
- break;
- }
-
- if (i == drm_numdevs)
- return -ENODEV;
-
- ffb_priv = kmalloc(sizeof(ffb_dev_priv_t), GFP_KERNEL);
- if (!ffb_priv)
- return -ENOMEM;
- memset(ffb_priv, 0, sizeof(*ffb_priv));
- dev->dev_private = ffb_priv;
-
- ret = ffb_init_one(dev,
- ffb_position[i].node,
- ffb_position[i].root,
- i);
- return ret;
-}
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- ffb_PCI_IDS
-};
-
-static struct drm_driver ffb_driver = {
- .release = ffb_driver_reclaim_buffers_locked,
- .firstopen = ffb_driver_firstopen,
- .lastclose = ffb_driver_lastclose,
- .unload = ffb_driver_unload,
- .kernel_context_switch = ffb_context_switch,
- .kernel_context_switch_unlock = ffb_driver_kernel_context_switch_unlock,
- .get_map_ofs = ffb_driver_get_map_ofs,
- .get_reg_ofs = ffb_driver_get_reg_ofs,
- .reclaim_buffers = drm_core_reclaim_buffers,
- fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .fasync = drm_fasync,
- .poll = drm_poll,
- .get_unmapped_area = ffb_get_unmapped_area,
- },
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_probe(pdev, ent, &driver);
-}
-
-static struct pci_driver pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
-};
-
-static int __init ffb_init(void)
-{
- return drm_init(&pci_driver, pciidlist, &driver);
-}
-
-static void __exit ffb_exit(void)
-{
- drm_exit(&pci_driver);
-}
-
-module_init(ffb_init);
-module_exit(ffb_exit));
-
-MODULE_AUTHOR( DRIVER_AUTHOR );
-MODULE_DESCRIPTION( DRIVER_DESC );
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-/* $Id$
- * ffb_drv.h: Creator/Creator3D direct rendering driver.
- *
- * Copyright (C) 2000 David S. Miller (davem@redhat.com)
- */
-
-/* Auxilliary clips. */
-typedef struct {
- volatile unsigned int min;
- volatile unsigned int max;
-} ffb_auxclip, *ffb_auxclipPtr;
-
-/* FFB register set. */
-typedef struct _ffb_fbc {
- /* Next vertex registers, on the right we list which drawops
- * use said register and the logical name the register has in
- * that context.
- */ /* DESCRIPTION DRAWOP(NAME) */
-/*0x00*/unsigned int pad1[3]; /* Reserved */
-/*0x0c*/volatile unsigned int alpha; /* ALPHA Transparency */
-/*0x10*/volatile unsigned int red; /* RED */
-/*0x14*/volatile unsigned int green; /* GREEN */
-/*0x18*/volatile unsigned int blue; /* BLUE */
-/*0x1c*/volatile unsigned int z; /* DEPTH */
-/*0x20*/volatile unsigned int y; /* Y triangle(DOYF) */
- /* aadot(DYF) */
- /* ddline(DYF) */
- /* aaline(DYF) */
-/*0x24*/volatile unsigned int x; /* X triangle(DOXF) */
- /* aadot(DXF) */
- /* ddline(DXF) */
- /* aaline(DXF) */
-/*0x28*/unsigned int pad2[2]; /* Reserved */
-/*0x30*/volatile unsigned int ryf; /* Y (alias to DOYF) ddline(RYF) */
- /* aaline(RYF) */
- /* triangle(RYF) */
-/*0x34*/volatile unsigned int rxf; /* X ddline(RXF) */
- /* aaline(RXF) */
- /* triangle(RXF) */
-/*0x38*/unsigned int pad3[2]; /* Reserved */
-/*0x40*/volatile unsigned int dmyf; /* Y (alias to DOYF) triangle(DMYF) */
-/*0x44*/volatile unsigned int dmxf; /* X triangle(DMXF) */
-/*0x48*/unsigned int pad4[2]; /* Reserved */
-/*0x50*/volatile unsigned int ebyi; /* Y (alias to RYI) polygon(EBYI) */
-/*0x54*/volatile unsigned int ebxi; /* X polygon(EBXI) */
-/*0x58*/unsigned int pad5[2]; /* Reserved */
-/*0x60*/volatile unsigned int by; /* Y brline(RYI) */
- /* fastfill(OP) */
- /* polygon(YI) */
- /* rectangle(YI) */
- /* bcopy(SRCY) */
- /* vscroll(SRCY) */
-/*0x64*/volatile unsigned int bx; /* X brline(RXI) */
- /* polygon(XI) */
- /* rectangle(XI) */
- /* bcopy(SRCX) */
- /* vscroll(SRCX) */
- /* fastfill(GO) */
-/*0x68*/volatile unsigned int dy; /* destination Y fastfill(DSTY) */
- /* bcopy(DSRY) */
- /* vscroll(DSRY) */
-/*0x6c*/volatile unsigned int dx; /* destination X fastfill(DSTX) */
- /* bcopy(DSTX) */
- /* vscroll(DSTX) */
-/*0x70*/volatile unsigned int bh; /* Y (alias to RYI) brline(DYI) */
- /* dot(DYI) */
- /* polygon(ETYI) */
- /* Height fastfill(H) */
- /* bcopy(H) */
- /* vscroll(H) */
- /* Y count fastfill(NY) */
-/*0x74*/volatile unsigned int bw; /* X dot(DXI) */
- /* brline(DXI) */
- /* polygon(ETXI) */
- /* fastfill(W) */
- /* bcopy(W) */
- /* vscroll(W) */
- /* fastfill(NX) */
-/*0x78*/unsigned int pad6[2]; /* Reserved */
-/*0x80*/unsigned int pad7[32]; /* Reserved */
-
- /* Setup Unit's vertex state register */
-/*100*/ volatile unsigned int suvtx;
-/*104*/ unsigned int pad8[63]; /* Reserved */
-
- /* Frame Buffer Control Registers */
-/*200*/ volatile unsigned int ppc; /* Pixel Processor Control */
-/*204*/ volatile unsigned int wid; /* Current WID */
-/*208*/ volatile unsigned int fg; /* FG data */
-/*20c*/ volatile unsigned int bg; /* BG data */
-/*210*/ volatile unsigned int consty; /* Constant Y */
-/*214*/ volatile unsigned int constz; /* Constant Z */
-/*218*/ volatile unsigned int xclip; /* X Clip */
-/*21c*/ volatile unsigned int dcss; /* Depth Cue Scale Slope */
-/*220*/ volatile unsigned int vclipmin; /* Viewclip XY Min Bounds */
-/*224*/ volatile unsigned int vclipmax; /* Viewclip XY Max Bounds */
-/*228*/ volatile unsigned int vclipzmin; /* Viewclip Z Min Bounds */
-/*22c*/ volatile unsigned int vclipzmax; /* Viewclip Z Max Bounds */
-/*230*/ volatile unsigned int dcsf; /* Depth Cue Scale Front Bound */
-/*234*/ volatile unsigned int dcsb; /* Depth Cue Scale Back Bound */
-/*238*/ volatile unsigned int dczf; /* Depth Cue Z Front */
-/*23c*/ volatile unsigned int dczb; /* Depth Cue Z Back */
-/*240*/ unsigned int pad9; /* Reserved */
-/*244*/ volatile unsigned int blendc; /* Alpha Blend Control */
-/*248*/ volatile unsigned int blendc1; /* Alpha Blend Color 1 */
-/*24c*/ volatile unsigned int blendc2; /* Alpha Blend Color 2 */
-/*250*/ volatile unsigned int fbramitc; /* FB RAM Interleave Test Control */
-/*254*/ volatile unsigned int fbc; /* Frame Buffer Control */
-/*258*/ volatile unsigned int rop; /* Raster OPeration */
-/*25c*/ volatile unsigned int cmp; /* Frame Buffer Compare */
-/*260*/ volatile unsigned int matchab; /* Buffer AB Match Mask */
-/*264*/ volatile unsigned int matchc; /* Buffer C(YZ) Match Mask */
-/*268*/ volatile unsigned int magnab; /* Buffer AB Magnitude Mask */
-/*26c*/ volatile unsigned int magnc; /* Buffer C(YZ) Magnitude Mask */
-/*270*/ volatile unsigned int fbcfg0; /* Frame Buffer Config 0 */
-/*274*/ volatile unsigned int fbcfg1; /* Frame Buffer Config 1 */
-/*278*/ volatile unsigned int fbcfg2; /* Frame Buffer Config 2 */
-/*27c*/ volatile unsigned int fbcfg3; /* Frame Buffer Config 3 */
-/*280*/ volatile unsigned int ppcfg; /* Pixel Processor Config */
-/*284*/ volatile unsigned int pick; /* Picking Control */
-/*288*/ volatile unsigned int fillmode; /* FillMode */
-/*28c*/ volatile unsigned int fbramwac; /* FB RAM Write Address Control */
-/*290*/ volatile unsigned int pmask; /* RGB PlaneMask */
-/*294*/ volatile unsigned int xpmask; /* X PlaneMask */
-/*298*/ volatile unsigned int ypmask; /* Y PlaneMask */
-/*29c*/ volatile unsigned int zpmask; /* Z PlaneMask */
-/*2a0*/ ffb_auxclip auxclip[4]; /* Auxilliary Viewport Clip */
-
- /* New 3dRAM III support regs */
-/*2c0*/ volatile unsigned int rawblend2;
-/*2c4*/ volatile unsigned int rawpreblend;
-/*2c8*/ volatile unsigned int rawstencil;
-/*2cc*/ volatile unsigned int rawstencilctl;
-/*2d0*/ volatile unsigned int threedram1;
-/*2d4*/ volatile unsigned int threedram2;
-/*2d8*/ volatile unsigned int passin;
-/*2dc*/ volatile unsigned int rawclrdepth;
-/*2e0*/ volatile unsigned int rawpmask;
-/*2e4*/ volatile unsigned int rawcsrc;
-/*2e8*/ volatile unsigned int rawmatch;
-/*2ec*/ volatile unsigned int rawmagn;
-/*2f0*/ volatile unsigned int rawropblend;
-/*2f4*/ volatile unsigned int rawcmp;
-/*2f8*/ volatile unsigned int rawwac;
-/*2fc*/ volatile unsigned int fbramid;
-
-/*300*/ volatile unsigned int drawop; /* Draw OPeration */
-/*304*/ unsigned int pad10[2]; /* Reserved */
-/*30c*/ volatile unsigned int lpat; /* Line Pattern control */
-/*310*/ unsigned int pad11; /* Reserved */
-/*314*/ volatile unsigned int fontxy; /* XY Font coordinate */
-/*318*/ volatile unsigned int fontw; /* Font Width */
-/*31c*/ volatile unsigned int fontinc; /* Font Increment */
-/*320*/ volatile unsigned int font; /* Font bits */
-/*324*/ unsigned int pad12[3]; /* Reserved */
-/*330*/ volatile unsigned int blend2;
-/*334*/ volatile unsigned int preblend;
-/*338*/ volatile unsigned int stencil;
-/*33c*/ volatile unsigned int stencilctl;
-
-/*340*/ unsigned int pad13[4]; /* Reserved */
-/*350*/ volatile unsigned int dcss1; /* Depth Cue Scale Slope 1 */
-/*354*/ volatile unsigned int dcss2; /* Depth Cue Scale Slope 2 */
-/*358*/ volatile unsigned int dcss3; /* Depth Cue Scale Slope 3 */
-/*35c*/ volatile unsigned int widpmask;
-/*360*/ volatile unsigned int dcs2;
-/*364*/ volatile unsigned int dcs3;
-/*368*/ volatile unsigned int dcs4;
-/*36c*/ unsigned int pad14; /* Reserved */
-/*370*/ volatile unsigned int dcd2;
-/*374*/ volatile unsigned int dcd3;
-/*378*/ volatile unsigned int dcd4;
-/*37c*/ unsigned int pad15; /* Reserved */
-/*380*/ volatile unsigned int pattern[32]; /* area Pattern */
-/*400*/ unsigned int pad16[8]; /* Reserved */
-/*420*/ volatile unsigned int reset; /* chip RESET */
-/*424*/ unsigned int pad17[247]; /* Reserved */
-/*800*/ volatile unsigned int devid; /* Device ID */
-/*804*/ unsigned int pad18[63]; /* Reserved */
-/*900*/ volatile unsigned int ucsr; /* User Control & Status Register */
-/*904*/ unsigned int pad19[31]; /* Reserved */
-/*980*/ volatile unsigned int mer; /* Mode Enable Register */
-/*984*/ unsigned int pad20[1439]; /* Reserved */
-} ffb_fbc, *ffb_fbcPtr;
-
-struct ffb_hw_context {
- int is_2d_only;
-
- unsigned int ppc;
- unsigned int wid;
- unsigned int fg;
- unsigned int bg;
- unsigned int consty;
- unsigned int constz;
- unsigned int xclip;
- unsigned int dcss;
- unsigned int vclipmin;
- unsigned int vclipmax;
- unsigned int vclipzmin;
- unsigned int vclipzmax;
- unsigned int dcsf;
- unsigned int dcsb;
- unsigned int dczf;
- unsigned int dczb;
- unsigned int blendc;
- unsigned int blendc1;
- unsigned int blendc2;
- unsigned int fbc;
- unsigned int rop;
- unsigned int cmp;
- unsigned int matchab;
- unsigned int matchc;
- unsigned int magnab;
- unsigned int magnc;
- unsigned int pmask;
- unsigned int xpmask;
- unsigned int ypmask;
- unsigned int zpmask;
- unsigned int auxclip0min;
- unsigned int auxclip0max;
- unsigned int auxclip1min;
- unsigned int auxclip1max;
- unsigned int auxclip2min;
- unsigned int auxclip2max;
- unsigned int auxclip3min;
- unsigned int auxclip3max;
- unsigned int drawop;
- unsigned int lpat;
- unsigned int fontxy;
- unsigned int fontw;
- unsigned int fontinc;
- unsigned int area_pattern[32];
- unsigned int ucsr;
- unsigned int stencil;
- unsigned int stencilctl;
- unsigned int dcss1;
- unsigned int dcss2;
- unsigned int dcss3;
- unsigned int dcs2;
- unsigned int dcs3;
- unsigned int dcs4;
- unsigned int dcd2;
- unsigned int dcd3;
- unsigned int dcd4;
- unsigned int mer;
-};
-
-#define FFB_MAX_CTXS 32
-
-enum ffb_chip_type {
- ffb1_prototype = 0, /* Early pre-FCS FFB */
- ffb1_standard, /* First FCS FFB, 100Mhz UPA, 66MHz gclk */
- ffb1_speedsort, /* Second FCS FFB, 100Mhz UPA, 75MHz gclk */
- ffb2_prototype, /* Early pre-FCS vertical FFB2 */
- ffb2_vertical, /* First FCS FFB2/vertical, 100Mhz UPA, 100MHZ gclk,
- 75(SingleBuffer)/83(DoubleBuffer) MHz fclk */
- ffb2_vertical_plus, /* Second FCS FFB2/vertical, same timings */
- ffb2_horizontal, /* First FCS FFB2/horizontal, same timings as FFB2/vert */
- ffb2_horizontal_plus, /* Second FCS FFB2/horizontal, same timings */
- afb_m3, /* FCS Elite3D, 3 float chips */
- afb_m6 /* FCS Elite3D, 6 float chips */
-};
-
-typedef struct ffb_dev_priv {
- /* Misc software state. */
- int prom_node;
- enum ffb_chip_type ffb_type;
- u64 card_phys_base;
- struct miscdevice miscdev;
-
- /* Controller registers. */
- ffb_fbcPtr regs;
-
- /* Context table. */
- struct ffb_hw_context *hw_state[FFB_MAX_CTXS];
-} ffb_dev_priv_t;
-
-extern unsigned long ffb_get_unmapped_area(struct file *filp,
- unsigned long hint,
- unsigned long len,
- unsigned long pgoff,
- unsigned long flags);
-extern unsigned long ffb_driver_get_map_ofs(drm_map_t *map)
-extern unsigned long ffb_driver_get_reg_ofs(struct drm_device *dev)
+++ /dev/null
-/* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
- * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- * Jeff Hartmann <jhartmann@valinux.com>
- * Keith Whitwell <keith@tungstengraphics.com>
- *
- */
-
-#include <linux/interrupt.h> /* For task queue support */
-#include <linux/delay.h>
-#include <linux/pagemap.h>
-
-#include "drmP.h"
-#include "drm.h"
-#include "i810_drm.h"
-#include "i810_drv.h"
-
-#define I810_BUF_FREE 2
-#define I810_BUF_CLIENT 1
-#define I810_BUF_HARDWARE 0
-
-#define I810_BUF_UNMAPPED 0
-#define I810_BUF_MAPPED 1
-
-static inline void i810_print_status_page(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_i810_private_t *dev_priv = dev->dev_private;
- u32 *temp = dev_priv->hw_status_page;
- int i;
-
- DRM_DEBUG("hw_status: Interrupt Status : %x\n", temp[0]);
- DRM_DEBUG("hw_status: LpRing Head ptr : %x\n", temp[1]);
- DRM_DEBUG("hw_status: IRing Head ptr : %x\n", temp[2]);
- DRM_DEBUG("hw_status: Reserved : %x\n", temp[3]);
- DRM_DEBUG("hw_status: Last Render: %x\n", temp[4]);
- DRM_DEBUG("hw_status: Driver Counter : %d\n", temp[5]);
- for (i = 6; i < dma->buf_count + 6; i++) {
- DRM_DEBUG("buffer status idx : %d used: %d\n", i - 6, temp[i]);
- }
-}
-
-static struct drm_buf *i810_freelist_get(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
- int i;
- int used;
-
- /* Linear search might not be the best solution */
-
- for (i = 0; i < dma->buf_count; i++) {
- struct drm_buf *buf = dma->buflist[i];
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
- /* In use is already a pointer */
- used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
- I810_BUF_CLIENT);
- if (used == I810_BUF_FREE) {
- return buf;
- }
- }
- return NULL;
-}
-
-/* This should only be called if the buffer is not sent to the hardware
- * yet, the hardware updates in use for us once its on the ring buffer.
- */
-
-static int i810_freelist_put(struct drm_device * dev, struct drm_buf * buf)
-{
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
- int used;
-
- /* In use is already a pointer */
- used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
- if (used != I810_BUF_CLIENT) {
- DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
-{
- struct drm_file *priv = filp->private_data;
- struct drm_device *dev;
- drm_i810_private_t *dev_priv;
- struct drm_buf *buf;
- drm_i810_buf_priv_t *buf_priv;
-
- lock_kernel();
- dev = priv->minor->dev;
- dev_priv = dev->dev_private;
- buf = dev_priv->mmap_buffer;
- buf_priv = buf->dev_private;
-
- vma->vm_flags |= (VM_IO | VM_DONTCOPY);
- vma->vm_file = filp;
-
- buf_priv->currently_mapped = I810_BUF_MAPPED;
- unlock_kernel();
-
- if (io_remap_pfn_range(vma, vma->vm_start,
- vma->vm_pgoff,
- vma->vm_end - vma->vm_start, vma->vm_page_prot))
- return -EAGAIN;
- return 0;
-}
-
-static const struct file_operations i810_buffer_fops = {
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = i810_mmap_buffers,
- .fasync = drm_fasync,
-};
-
-static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
-{
- struct drm_device *dev = file_priv->minor->dev;
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
- drm_i810_private_t *dev_priv = dev->dev_private;
- const struct file_operations *old_fops;
- int retcode = 0;
-
- if (buf_priv->currently_mapped == I810_BUF_MAPPED)
- return -EINVAL;
-
- down_write(¤t->mm->mmap_sem);
- old_fops = file_priv->filp->f_op;
- file_priv->filp->f_op = &i810_buffer_fops;
- dev_priv->mmap_buffer = buf;
- buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
- PROT_READ | PROT_WRITE,
- MAP_SHARED, buf->bus_address);
- dev_priv->mmap_buffer = NULL;
- file_priv->filp->f_op = old_fops;
- if (IS_ERR(buf_priv->virtual)) {
- /* Real error */
- DRM_ERROR("mmap error\n");
- retcode = PTR_ERR(buf_priv->virtual);
- buf_priv->virtual = NULL;
- }
- up_write(¤t->mm->mmap_sem);
-
- return retcode;
-}
-
-static int i810_unmap_buffer(struct drm_buf * buf)
-{
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
- int retcode = 0;
-
- if (buf_priv->currently_mapped != I810_BUF_MAPPED)
- return -EINVAL;
-
- down_write(¤t->mm->mmap_sem);
- retcode = do_munmap(current->mm,
- (unsigned long)buf_priv->virtual,
- (size_t) buf->total);
- up_write(¤t->mm->mmap_sem);
-
- buf_priv->currently_mapped = I810_BUF_UNMAPPED;
- buf_priv->virtual = NULL;
-
- return retcode;
-}
-
-static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d,
- struct drm_file *file_priv)
-{
- struct drm_buf *buf;
- drm_i810_buf_priv_t *buf_priv;
- int retcode = 0;
-
- buf = i810_freelist_get(dev);
- if (!buf) {
- retcode = -ENOMEM;
- DRM_DEBUG("retcode=%d\n", retcode);
- return retcode;
- }
-
- retcode = i810_map_buffer(buf, file_priv);
- if (retcode) {
- i810_freelist_put(dev, buf);
- DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
- return retcode;
- }
- buf->file_priv = file_priv;
- buf_priv = buf->dev_private;
- d->granted = 1;
- d->request_idx = buf->idx;
- d->request_size = buf->total;
- d->virtual = buf_priv->virtual;
-
- return retcode;
-}
-
-static int i810_dma_cleanup(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
-
- /* Make sure interrupts are disabled here because the uninstall ioctl
- * may not have been called from userspace and after dev_private
- * is freed, it's too late.
- */
- if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
- drm_irq_uninstall(dev);
-
- if (dev->dev_private) {
- int i;
- drm_i810_private_t *dev_priv =
- (drm_i810_private_t *) dev->dev_private;
-
- if (dev_priv->ring.virtual_start) {
- drm_core_ioremapfree(&dev_priv->ring.map, dev);
- }
- if (dev_priv->hw_status_page) {
- pci_free_consistent(dev->pdev, PAGE_SIZE,
- dev_priv->hw_status_page,
- dev_priv->dma_status_page);
- /* Need to rewrite hardware status page */
- I810_WRITE(0x02080, 0x1ffff000);
- }
- drm_free(dev->dev_private, sizeof(drm_i810_private_t),
- DRM_MEM_DRIVER);
- dev->dev_private = NULL;
-
- for (i = 0; i < dma->buf_count; i++) {
- struct drm_buf *buf = dma->buflist[i];
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
- if (buf_priv->kernel_virtual && buf->total)
- drm_core_ioremapfree(&buf_priv->map, dev);
- }
- }
- return 0;
-}
-
-static int i810_wait_ring(struct drm_device * dev, int n)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
- int iters = 0;
- unsigned long end;
- unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
-
- end = jiffies + (HZ * 3);
- while (ring->space < n) {
- ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
- ring->space = ring->head - (ring->tail + 8);
- if (ring->space < 0)
- ring->space += ring->Size;
-
- if (ring->head != last_head) {
- end = jiffies + (HZ * 3);
- last_head = ring->head;
- }
-
- iters++;
- if (time_before(end, jiffies)) {
- DRM_ERROR("space: %d wanted %d\n", ring->space, n);
- DRM_ERROR("lockup\n");
- goto out_wait_ring;
- }
- udelay(1);
- }
-
- out_wait_ring:
- return iters;
-}
-
-static void i810_kernel_lost_context(struct drm_device * dev)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
-
- ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
- ring->tail = I810_READ(LP_RING + RING_TAIL);
- ring->space = ring->head - (ring->tail + 8);
- if (ring->space < 0)
- ring->space += ring->Size;
-}
-
-static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- int my_idx = 24;
- u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
- int i;
-
- if (dma->buf_count > 1019) {
- /* Not enough space in the status page for the freelist */
- return -EINVAL;
- }
-
- for (i = 0; i < dma->buf_count; i++) {
- struct drm_buf *buf = dma->buflist[i];
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
- buf_priv->in_use = hw_status++;
- buf_priv->my_use_idx = my_idx;
- my_idx += 4;
-
- *buf_priv->in_use = I810_BUF_FREE;
-
- buf_priv->map.offset = buf->bus_address;
- buf_priv->map.size = buf->total;
- buf_priv->map.type = _DRM_AGP;
- buf_priv->map.flags = 0;
- buf_priv->map.mtrr = 0;
-
- drm_core_ioremap(&buf_priv->map, dev);
- buf_priv->kernel_virtual = buf_priv->map.handle;
-
- }
- return 0;
-}
-
-static int i810_dma_initialize(struct drm_device * dev,
- drm_i810_private_t * dev_priv,
- drm_i810_init_t * init)
-{
- struct drm_map_list *r_list;
- memset(dev_priv, 0, sizeof(drm_i810_private_t));
-
- list_for_each_entry(r_list, &dev->maplist, head) {
- if (r_list->map &&
- r_list->map->type == _DRM_SHM &&
- r_list->map->flags & _DRM_CONTAINS_LOCK) {
- dev_priv->sarea_map = r_list->map;
- break;
- }
- }
- if (!dev_priv->sarea_map) {
- dev->dev_private = (void *)dev_priv;
- i810_dma_cleanup(dev);
- DRM_ERROR("can not find sarea!\n");
- return -EINVAL;
- }
- dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
- if (!dev_priv->mmio_map) {
- dev->dev_private = (void *)dev_priv;
- i810_dma_cleanup(dev);
- DRM_ERROR("can not find mmio map!\n");
- return -EINVAL;
- }
- dev->agp_buffer_token = init->buffers_offset;
- dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
- if (!dev->agp_buffer_map) {
- dev->dev_private = (void *)dev_priv;
- i810_dma_cleanup(dev);
- DRM_ERROR("can not find dma buffer map!\n");
- return -EINVAL;
- }
-
- dev_priv->sarea_priv = (drm_i810_sarea_t *)
- ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
-
- dev_priv->ring.Start = init->ring_start;
- dev_priv->ring.End = init->ring_end;
- dev_priv->ring.Size = init->ring_size;
-
- dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
- dev_priv->ring.map.size = init->ring_size;
- dev_priv->ring.map.type = _DRM_AGP;
- dev_priv->ring.map.flags = 0;
- dev_priv->ring.map.mtrr = 0;
-
- drm_core_ioremap(&dev_priv->ring.map, dev);
-
- if (dev_priv->ring.map.handle == NULL) {
- dev->dev_private = (void *)dev_priv;
- i810_dma_cleanup(dev);
- DRM_ERROR("can not ioremap virtual address for"
- " ring buffer\n");
- return -ENOMEM;
- }
-
- dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
-
- dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
-
- dev_priv->w = init->w;
- dev_priv->h = init->h;
- dev_priv->pitch = init->pitch;
- dev_priv->back_offset = init->back_offset;
- dev_priv->depth_offset = init->depth_offset;
- dev_priv->front_offset = init->front_offset;
-
- dev_priv->overlay_offset = init->overlay_offset;
- dev_priv->overlay_physical = init->overlay_physical;
-
- dev_priv->front_di1 = init->front_offset | init->pitch_bits;
- dev_priv->back_di1 = init->back_offset | init->pitch_bits;
- dev_priv->zi1 = init->depth_offset | init->pitch_bits;
-
- /* Program Hardware Status Page */
- dev_priv->hw_status_page =
- pci_alloc_consistent(dev->pdev, PAGE_SIZE,
- &dev_priv->dma_status_page);
- if (!dev_priv->hw_status_page) {
- dev->dev_private = (void *)dev_priv;
- i810_dma_cleanup(dev);
- DRM_ERROR("Can not allocate hardware status page\n");
- return -ENOMEM;
- }
- memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
- DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
-
- I810_WRITE(0x02080, dev_priv->dma_status_page);
- DRM_DEBUG("Enabled hardware status page\n");
-
- /* Now we need to init our freelist */
- if (i810_freelist_init(dev, dev_priv) != 0) {
- dev->dev_private = (void *)dev_priv;
- i810_dma_cleanup(dev);
- DRM_ERROR("Not enough space in the status page for"
- " the freelist\n");
- return -ENOMEM;
- }
- dev->dev_private = (void *)dev_priv;
-
- return 0;
-}
-
-static int i810_dma_init(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i810_private_t *dev_priv;
- drm_i810_init_t *init = data;
- int retcode = 0;
-
- switch (init->func) {
- case I810_INIT_DMA_1_4:
- DRM_INFO("Using v1.4 init.\n");
- dev_priv = drm_alloc(sizeof(drm_i810_private_t),
- DRM_MEM_DRIVER);
- if (dev_priv == NULL)
- return -ENOMEM;
- retcode = i810_dma_initialize(dev, dev_priv, init);
- break;
-
- case I810_CLEANUP_DMA:
- DRM_INFO("DMA Cleanup\n");
- retcode = i810_dma_cleanup(dev);
- break;
- default:
- return -EINVAL;
- }
-
- return retcode;
-}
-
-/* Most efficient way to verify state for the i810 is as it is
- * emitted. Non-conformant state is silently dropped.
- *
- * Use 'volatile' & local var tmp to force the emitted values to be
- * identical to the verified ones.
- */
-static void i810EmitContextVerified(struct drm_device * dev,
- volatile unsigned int *code)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- int i, j = 0;
- unsigned int tmp;
- RING_LOCALS;
-
- BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
-
- OUT_RING(GFX_OP_COLOR_FACTOR);
- OUT_RING(code[I810_CTXREG_CF1]);
-
- OUT_RING(GFX_OP_STIPPLE);
- OUT_RING(code[I810_CTXREG_ST1]);
-
- for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
- tmp = code[i];
-
- if ((tmp & (7 << 29)) == (3 << 29) &&
- (tmp & (0x1f << 24)) < (0x1d << 24)) {
- OUT_RING(tmp);
- j++;
- } else
- printk("constext state dropped!!!\n");
- }
-
- if (j & 1)
- OUT_RING(0);
-
- ADVANCE_LP_RING();
-}
-
-static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *code)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- int i, j = 0;
- unsigned int tmp;
- RING_LOCALS;
-
- BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
-
- OUT_RING(GFX_OP_MAP_INFO);
- OUT_RING(code[I810_TEXREG_MI1]);
- OUT_RING(code[I810_TEXREG_MI2]);
- OUT_RING(code[I810_TEXREG_MI3]);
-
- for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
- tmp = code[i];
-
- if ((tmp & (7 << 29)) == (3 << 29) &&
- (tmp & (0x1f << 24)) < (0x1d << 24)) {
- OUT_RING(tmp);
- j++;
- } else
- printk("texture state dropped!!!\n");
- }
-
- if (j & 1)
- OUT_RING(0);
-
- ADVANCE_LP_RING();
-}
-
-/* Need to do some additional checking when setting the dest buffer.
- */
-static void i810EmitDestVerified(struct drm_device * dev,
- volatile unsigned int *code)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- unsigned int tmp;
- RING_LOCALS;
-
- BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
-
- tmp = code[I810_DESTREG_DI1];
- if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
- OUT_RING(CMD_OP_DESTBUFFER_INFO);
- OUT_RING(tmp);
- } else
- DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
- tmp, dev_priv->front_di1, dev_priv->back_di1);
-
- /* invarient:
- */
- OUT_RING(CMD_OP_Z_BUFFER_INFO);
- OUT_RING(dev_priv->zi1);
-
- OUT_RING(GFX_OP_DESTBUFFER_VARS);
- OUT_RING(code[I810_DESTREG_DV1]);
-
- OUT_RING(GFX_OP_DRAWRECT_INFO);
- OUT_RING(code[I810_DESTREG_DR1]);
- OUT_RING(code[I810_DESTREG_DR2]);
- OUT_RING(code[I810_DESTREG_DR3]);
- OUT_RING(code[I810_DESTREG_DR4]);
- OUT_RING(0);
-
- ADVANCE_LP_RING();
-}
-
-static void i810EmitState(struct drm_device * dev)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int dirty = sarea_priv->dirty;
-
- DRM_DEBUG("%x\n", dirty);
-
- if (dirty & I810_UPLOAD_BUFFERS) {
- i810EmitDestVerified(dev, sarea_priv->BufferState);
- sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
- }
-
- if (dirty & I810_UPLOAD_CTX) {
- i810EmitContextVerified(dev, sarea_priv->ContextState);
- sarea_priv->dirty &= ~I810_UPLOAD_CTX;
- }
-
- if (dirty & I810_UPLOAD_TEX0) {
- i810EmitTexVerified(dev, sarea_priv->TexState[0]);
- sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
- }
-
- if (dirty & I810_UPLOAD_TEX1) {
- i810EmitTexVerified(dev, sarea_priv->TexState[1]);
- sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
- }
-}
-
-/* need to verify
- */
-static void i810_dma_dispatch_clear(struct drm_device * dev, int flags,
- unsigned int clear_color,
- unsigned int clear_zval)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int nbox = sarea_priv->nbox;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- int pitch = dev_priv->pitch;
- int cpp = 2;
- int i;
- RING_LOCALS;
-
- if (dev_priv->current_page == 1) {
- unsigned int tmp = flags;
-
- flags &= ~(I810_FRONT | I810_BACK);
- if (tmp & I810_FRONT)
- flags |= I810_BACK;
- if (tmp & I810_BACK)
- flags |= I810_FRONT;
- }
-
- i810_kernel_lost_context(dev);
-
- if (nbox > I810_NR_SAREA_CLIPRECTS)
- nbox = I810_NR_SAREA_CLIPRECTS;
-
- for (i = 0; i < nbox; i++, pbox++) {
- unsigned int x = pbox->x1;
- unsigned int y = pbox->y1;
- unsigned int width = (pbox->x2 - x) * cpp;
- unsigned int height = pbox->y2 - y;
- unsigned int start = y * pitch + x * cpp;
-
- if (pbox->x1 > pbox->x2 ||
- pbox->y1 > pbox->y2 ||
- pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
- continue;
-
- if (flags & I810_FRONT) {
- BEGIN_LP_RING(6);
- OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
- OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
- OUT_RING((height << 16) | width);
- OUT_RING(start);
- OUT_RING(clear_color);
- OUT_RING(0);
- ADVANCE_LP_RING();
- }
-
- if (flags & I810_BACK) {
- BEGIN_LP_RING(6);
- OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
- OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
- OUT_RING((height << 16) | width);
- OUT_RING(dev_priv->back_offset + start);
- OUT_RING(clear_color);
- OUT_RING(0);
- ADVANCE_LP_RING();
- }
-
- if (flags & I810_DEPTH) {
- BEGIN_LP_RING(6);
- OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
- OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
- OUT_RING((height << 16) | width);
- OUT_RING(dev_priv->depth_offset + start);
- OUT_RING(clear_zval);
- OUT_RING(0);
- ADVANCE_LP_RING();
- }
- }
-}
-
-static void i810_dma_dispatch_swap(struct drm_device * dev)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int nbox = sarea_priv->nbox;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- int pitch = dev_priv->pitch;
- int cpp = 2;
- int i;
- RING_LOCALS;
-
- DRM_DEBUG("swapbuffers\n");
-
- i810_kernel_lost_context(dev);
-
- if (nbox > I810_NR_SAREA_CLIPRECTS)
- nbox = I810_NR_SAREA_CLIPRECTS;
-
- for (i = 0; i < nbox; i++, pbox++) {
- unsigned int w = pbox->x2 - pbox->x1;
- unsigned int h = pbox->y2 - pbox->y1;
- unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
- unsigned int start = dst;
-
- if (pbox->x1 > pbox->x2 ||
- pbox->y1 > pbox->y2 ||
- pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
- continue;
-
- BEGIN_LP_RING(6);
- OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
- OUT_RING(pitch | (0xCC << 16));
- OUT_RING((h << 16) | (w * cpp));
- if (dev_priv->current_page == 0)
- OUT_RING(dev_priv->front_offset + start);
- else
- OUT_RING(dev_priv->back_offset + start);
- OUT_RING(pitch);
- if (dev_priv->current_page == 0)
- OUT_RING(dev_priv->back_offset + start);
- else
- OUT_RING(dev_priv->front_offset + start);
- ADVANCE_LP_RING();
- }
-}
-
-static void i810_dma_dispatch_vertex(struct drm_device * dev,
- struct drm_buf * buf, int discard, int used)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
- drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
- struct drm_clip_rect *box = sarea_priv->boxes;
- int nbox = sarea_priv->nbox;
- unsigned long address = (unsigned long)buf->bus_address;
- unsigned long start = address - dev->agp->base;
- int i = 0;
- RING_LOCALS;
-
- i810_kernel_lost_context(dev);
-
- if (nbox > I810_NR_SAREA_CLIPRECTS)
- nbox = I810_NR_SAREA_CLIPRECTS;
-
- if (used > 4 * 1024)
- used = 0;
-
- if (sarea_priv->dirty)
- i810EmitState(dev);
-
- if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
- unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
-
- *(u32 *) buf_priv->kernel_virtual =
- ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
-
- if (used & 4) {
- *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
- used += 4;
- }
-
- i810_unmap_buffer(buf);
- }
-
- if (used) {
- do {
- if (i < nbox) {
- BEGIN_LP_RING(4);
- OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
- SC_ENABLE);
- OUT_RING(GFX_OP_SCISSOR_INFO);
- OUT_RING(box[i].x1 | (box[i].y1 << 16));
- OUT_RING((box[i].x2 -
- 1) | ((box[i].y2 - 1) << 16));
- ADVANCE_LP_RING();
- }
-
- BEGIN_LP_RING(4);
- OUT_RING(CMD_OP_BATCH_BUFFER);
- OUT_RING(start | BB1_PROTECTED);
- OUT_RING(start + used - 4);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- } while (++i < nbox);
- }
-
- if (discard) {
- dev_priv->counter++;
-
- (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
- I810_BUF_HARDWARE);
-
- BEGIN_LP_RING(8);
- OUT_RING(CMD_STORE_DWORD_IDX);
- OUT_RING(20);
- OUT_RING(dev_priv->counter);
- OUT_RING(CMD_STORE_DWORD_IDX);
- OUT_RING(buf_priv->my_use_idx);
- OUT_RING(I810_BUF_FREE);
- OUT_RING(CMD_REPORT_HEAD);
- OUT_RING(0);
- ADVANCE_LP_RING();
- }
-}
-
-static void i810_dma_dispatch_flip(struct drm_device * dev)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- int pitch = dev_priv->pitch;
- RING_LOCALS;
-
- DRM_DEBUG("page=%d pfCurrentPage=%d\n",
- dev_priv->current_page,
- dev_priv->sarea_priv->pf_current_page);
-
- i810_kernel_lost_context(dev);
-
- BEGIN_LP_RING(2);
- OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
- /* On i815 at least ASYNC is buggy */
- /* pitch<<5 is from 11.2.8 p158,
- its the pitch / 8 then left shifted 8,
- so (pitch >> 3) << 8 */
- OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
- if (dev_priv->current_page == 0) {
- OUT_RING(dev_priv->back_offset);
- dev_priv->current_page = 1;
- } else {
- OUT_RING(dev_priv->front_offset);
- dev_priv->current_page = 0;
- }
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- BEGIN_LP_RING(2);
- OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- /* Increment the frame counter. The client-side 3D driver must
- * throttle the framerate by waiting for this value before
- * performing the swapbuffer ioctl.
- */
- dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
-
-}
-
-static void i810_dma_quiescent(struct drm_device * dev)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- RING_LOCALS;
-
- i810_kernel_lost_context(dev);
-
- BEGIN_LP_RING(4);
- OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
- OUT_RING(CMD_REPORT_HEAD);
- OUT_RING(0);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- i810_wait_ring(dev, dev_priv->ring.Size - 8);
-}
-
-static int i810_flush_queue(struct drm_device * dev)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- int i, ret = 0;
- RING_LOCALS;
-
- i810_kernel_lost_context(dev);
-
- BEGIN_LP_RING(2);
- OUT_RING(CMD_REPORT_HEAD);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- i810_wait_ring(dev, dev_priv->ring.Size - 8);
-
- for (i = 0; i < dma->buf_count; i++) {
- struct drm_buf *buf = dma->buflist[i];
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
- int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
- I810_BUF_FREE);
-
- if (used == I810_BUF_HARDWARE)
- DRM_DEBUG("reclaimed from HARDWARE\n");
- if (used == I810_BUF_CLIENT)
- DRM_DEBUG("still on client\n");
- }
-
- return ret;
-}
-
-/* Must be called with the lock held */
-static void i810_reclaim_buffers(struct drm_device *dev,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- int i;
-
- if (!dma)
- return;
- if (!dev->dev_private)
- return;
- if (!dma->buflist)
- return;
-
- i810_flush_queue(dev);
-
- for (i = 0; i < dma->buf_count; i++) {
- struct drm_buf *buf = dma->buflist[i];
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
-
- if (buf->file_priv == file_priv && buf_priv) {
- int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
- I810_BUF_FREE);
-
- if (used == I810_BUF_CLIENT)
- DRM_DEBUG("reclaimed from client\n");
- if (buf_priv->currently_mapped == I810_BUF_MAPPED)
- buf_priv->currently_mapped = I810_BUF_UNMAPPED;
- }
- }
-}
-
-static int i810_flush_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- i810_flush_queue(dev);
- return 0;
-}
-
-static int i810_dma_vertex(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
- u32 *hw_status = dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
- drm_i810_vertex_t *vertex = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- DRM_DEBUG("idx %d used %d discard %d\n",
- vertex->idx, vertex->used, vertex->discard);
-
- if (vertex->idx < 0 || vertex->idx > dma->buf_count)
- return -EINVAL;
-
- i810_dma_dispatch_vertex(dev,
- dma->buflist[vertex->idx],
- vertex->discard, vertex->used);
-
- atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
- atomic_inc(&dev->counts[_DRM_STAT_DMA]);
- sarea_priv->last_enqueue = dev_priv->counter - 1;
- sarea_priv->last_dispatch = (int)hw_status[5];
-
- return 0;
-}
-
-static int i810_clear_bufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i810_clear_t *clear = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- /* GH: Someone's doing nasty things... */
- if (!dev->dev_private) {
- return -EINVAL;
- }
-
- i810_dma_dispatch_clear(dev, clear->flags,
- clear->clear_color, clear->clear_depth);
- return 0;
-}
-
-static int i810_swap_bufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- i810_dma_dispatch_swap(dev);
- return 0;
-}
-
-static int i810_getage(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
- u32 *hw_status = dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
-
- sarea_priv->last_dispatch = (int)hw_status[5];
- return 0;
-}
-
-static int i810_getbuf(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- int retcode = 0;
- drm_i810_dma_t *d = data;
- drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
- u32 *hw_status = dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- d->granted = 0;
-
- retcode = i810_dma_get_buffer(dev, d, file_priv);
-
- DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
- current->pid, retcode, d->granted);
-
- sarea_priv->last_dispatch = (int)hw_status[5];
-
- return retcode;
-}
-
-static int i810_copybuf(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- /* Never copy - 2.4.x doesn't need it */
- return 0;
-}
-
-static int i810_docopy(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- /* Never copy - 2.4.x doesn't need it */
- return 0;
-}
-
-static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf, int used,
- unsigned int last_render)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
- drm_i810_buf_priv_t *buf_priv = buf->dev_private;
- drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned long address = (unsigned long)buf->bus_address;
- unsigned long start = address - dev->agp->base;
- int u;
- RING_LOCALS;
-
- i810_kernel_lost_context(dev);
-
- u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
- if (u != I810_BUF_CLIENT) {
- DRM_DEBUG("MC found buffer that isn't mine!\n");
- }
-
- if (used > 4 * 1024)
- used = 0;
-
- sarea_priv->dirty = 0x7f;
-
- DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
-
- dev_priv->counter++;
- DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
- DRM_DEBUG("start : %lx\n", start);
- DRM_DEBUG("used : %d\n", used);
- DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
-
- if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
- if (used & 4) {
- *(u32 *) ((char *) buf_priv->virtual + used) = 0;
- used += 4;
- }
-
- i810_unmap_buffer(buf);
- }
- BEGIN_LP_RING(4);
- OUT_RING(CMD_OP_BATCH_BUFFER);
- OUT_RING(start | BB1_PROTECTED);
- OUT_RING(start + used - 4);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- BEGIN_LP_RING(8);
- OUT_RING(CMD_STORE_DWORD_IDX);
- OUT_RING(buf_priv->my_use_idx);
- OUT_RING(I810_BUF_FREE);
- OUT_RING(0);
-
- OUT_RING(CMD_STORE_DWORD_IDX);
- OUT_RING(16);
- OUT_RING(last_render);
- OUT_RING(0);
- ADVANCE_LP_RING();
-}
-
-static int i810_dma_mc(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
- u32 *hw_status = dev_priv->hw_status_page;
- drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
- dev_priv->sarea_priv;
- drm_i810_mc_t *mc = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (mc->idx >= dma->buf_count || mc->idx < 0)
- return -EINVAL;
-
- i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
- mc->last_render);
-
- atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
- atomic_inc(&dev->counts[_DRM_STAT_DMA]);
- sarea_priv->last_enqueue = dev_priv->counter - 1;
- sarea_priv->last_dispatch = (int)hw_status[5];
-
- return 0;
-}
-
-static int i810_rstatus(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
-
- return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
-}
-
-static int i810_ov0_info(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
- drm_i810_overlay_t *ov = data;
-
- ov->offset = dev_priv->overlay_offset;
- ov->physical = dev_priv->overlay_physical;
-
- return 0;
-}
-
-static int i810_fstatus(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
- return I810_READ(0x30008);
-}
-
-static int i810_ov0_flip(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
- //Tell the overlay to update
- I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
-
- return 0;
-}
-
-/* Not sure why this isn't set all the time:
- */
-static void i810_do_init_pageflip(struct drm_device * dev)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
- dev_priv->page_flipping = 1;
- dev_priv->current_page = 0;
- dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
-}
-
-static int i810_do_cleanup_pageflip(struct drm_device * dev)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
- if (dev_priv->current_page != 0)
- i810_dma_dispatch_flip(dev);
-
- dev_priv->page_flipping = 0;
- return 0;
-}
-
-static int i810_flip_bufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i810_private_t *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv->page_flipping)
- i810_do_init_pageflip(dev);
-
- i810_dma_dispatch_flip(dev);
- return 0;
-}
-
-int i810_driver_load(struct drm_device *dev, unsigned long flags)
-{
- /* i810 has 4 more counters */
- dev->counters += 4;
- dev->types[6] = _DRM_STAT_IRQ;
- dev->types[7] = _DRM_STAT_PRIMARY;
- dev->types[8] = _DRM_STAT_SECONDARY;
- dev->types[9] = _DRM_STAT_DMA;
-
- return 0;
-}
-
-void i810_driver_lastclose(struct drm_device * dev)
-{
- i810_dma_cleanup(dev);
-}
-
-void i810_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
-{
- if (dev->dev_private) {
- drm_i810_private_t *dev_priv = dev->dev_private;
- if (dev_priv->page_flipping) {
- i810_do_cleanup_pageflip(dev);
- }
- }
-}
-
-void i810_driver_reclaim_buffers_locked(struct drm_device * dev,
- struct drm_file *file_priv)
-{
- i810_reclaim_buffers(dev, file_priv);
-}
-
-int i810_driver_dma_quiescent(struct drm_device * dev)
-{
- i810_dma_quiescent(dev);
- return 0;
-}
-
-struct drm_ioctl_desc i810_ioctls[] = {
- DRM_IOCTL_DEF(DRM_I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I810_VERTEX, i810_dma_vertex, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_CLEAR, i810_clear_bufs, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_FLUSH, i810_flush_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_GETAGE, i810_getage, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_GETBUF, i810_getbuf, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_SWAP, i810_swap_bufs, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_COPY, i810_copybuf, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_DOCOPY, i810_docopy, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_OV0INFO, i810_ov0_info, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_FSTATUS, i810_fstatus, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_OV0FLIP, i810_ov0_flip, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I810_RSTATUS, i810_rstatus, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I810_FLIP, i810_flip_bufs, DRM_AUTH)
-};
-
-int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
-
-/**
- * Determine if the device really is AGP or not.
- *
- * All Intel graphics chipsets are treated as AGP, even if they are really
- * PCI-e.
- *
- * \param dev The device to be tested.
- *
- * \returns
- * A value of 1 is always retured to indictate every i810 is AGP.
- */
-int i810_driver_device_is_agp(struct drm_device * dev)
-{
- return 1;
-}
+++ /dev/null
-#ifndef _I810_DRM_H_
-#define _I810_DRM_H_
-
-/* WARNING: These defines must be the same as what the Xserver uses.
- * if you change them, you must change the defines in the Xserver.
- */
-
-#ifndef _I810_DEFINES_
-#define _I810_DEFINES_
-
-#define I810_DMA_BUF_ORDER 12
-#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER)
-#define I810_DMA_BUF_NR 256
-#define I810_NR_SAREA_CLIPRECTS 8
-
-/* Each region is a minimum of 64k, and there are at most 64 of them.
- */
-#define I810_NR_TEX_REGIONS 64
-#define I810_LOG_MIN_TEX_REGION_SIZE 16
-#endif
-
-#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
-#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
-#define I810_UPLOAD_CTX 0x4
-#define I810_UPLOAD_BUFFERS 0x8
-#define I810_UPLOAD_TEX0 0x10
-#define I810_UPLOAD_TEX1 0x20
-#define I810_UPLOAD_CLIPRECTS 0x40
-
-/* Indices into buf.Setup where various bits of state are mirrored per
- * context and per buffer. These can be fired at the card as a unit,
- * or in a piecewise fashion as required.
- */
-
-/* Destbuffer state
- * - backbuffer linear offset and pitch -- invarient in the current dri
- * - zbuffer linear offset and pitch -- also invarient
- * - drawing origin in back and depth buffers.
- *
- * Keep the depth/back buffer state here to accommodate private buffers
- * in the future.
- */
-#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */
-#define I810_DESTREG_DI1 1
-#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */
-#define I810_DESTREG_DV1 3
-#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */
-#define I810_DESTREG_DR1 5
-#define I810_DESTREG_DR2 6
-#define I810_DESTREG_DR3 7
-#define I810_DESTREG_DR4 8
-#define I810_DEST_SETUP_SIZE 10
-
-/* Context state
- */
-#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */
-#define I810_CTXREG_CF1 1
-#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */
-#define I810_CTXREG_ST1 3
-#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */
-#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */
-#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */
-#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
-#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */
-#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
-#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
-#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
-#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */
-#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */
-#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */
-#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */
-#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
-#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */
-#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */
-#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */
-#define I810_CTX_SETUP_SIZE 20
-
-/* Texture state (per tex unit)
- */
-#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */
-#define I810_TEXREG_MI1 1
-#define I810_TEXREG_MI2 2
-#define I810_TEXREG_MI3 3
-#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */
-#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */
-#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */
-#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */
-#define I810_TEX_SETUP_SIZE 8
-
-/* Flags for clear ioctl
- */
-#define I810_FRONT 0x1
-#define I810_BACK 0x2
-#define I810_DEPTH 0x4
-
-typedef enum _drm_i810_init_func {
- I810_INIT_DMA = 0x01,
- I810_CLEANUP_DMA = 0x02,
- I810_INIT_DMA_1_4 = 0x03
-} drm_i810_init_func_t;
-
-/* This is the init structure after v1.2 */
-typedef struct _drm_i810_init {
- drm_i810_init_func_t func;
- unsigned int mmio_offset;
- unsigned int buffers_offset;
- int sarea_priv_offset;
- unsigned int ring_start;
- unsigned int ring_end;
- unsigned int ring_size;
- unsigned int front_offset;
- unsigned int back_offset;
- unsigned int depth_offset;
- unsigned int overlay_offset;
- unsigned int overlay_physical;
- unsigned int w;
- unsigned int h;
- unsigned int pitch;
- unsigned int pitch_bits;
-} drm_i810_init_t;
-
-/* Warning: If you change the SAREA structure you must change the Xserver
- * structure as well */
-
-typedef struct _drm_i810_tex_region {
- unsigned char next, prev; /* indices to form a circular LRU */
- unsigned char in_use; /* owned by a client, or free? */
- int age; /* tracked by clients to update local LRU's */
-} drm_i810_tex_region_t;
-
-typedef struct _drm_i810_sarea {
- unsigned int ContextState[I810_CTX_SETUP_SIZE];
- unsigned int BufferState[I810_DEST_SETUP_SIZE];
- unsigned int TexState[2][I810_TEX_SETUP_SIZE];
- unsigned int dirty;
-
- unsigned int nbox;
- struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
-
- /* Maintain an LRU of contiguous regions of texture space. If
- * you think you own a region of texture memory, and it has an
- * age different to the one you set, then you are mistaken and
- * it has been stolen by another client. If global texAge
- * hasn't changed, there is no need to walk the list.
- *
- * These regions can be used as a proxy for the fine-grained
- * texture information of other clients - by maintaining them
- * in the same lru which is used to age their own textures,
- * clients have an approximate lru for the whole of global
- * texture space, and can make informed decisions as to which
- * areas to kick out. There is no need to choose whether to
- * kick out your own texture or someone else's - simply eject
- * them all in LRU order.
- */
-
- drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
- /* Last elt is sentinal */
- int texAge; /* last time texture was uploaded */
- int last_enqueue; /* last time a buffer was enqueued */
- int last_dispatch; /* age of the most recently dispatched buffer */
- int last_quiescent; /* */
- int ctxOwner; /* last context to upload state */
-
- int vertex_prim;
-
- int pf_enabled; /* is pageflipping allowed? */
- int pf_active;
- int pf_current_page; /* which buffer is being displayed? */
-} drm_i810_sarea_t;
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (xf86drmMga.h)
- */
-
-/* i810 specific ioctls
- * The device specific ioctl range is 0x40 to 0x79.
- */
-#define DRM_I810_INIT 0x00
-#define DRM_I810_VERTEX 0x01
-#define DRM_I810_CLEAR 0x02
-#define DRM_I810_FLUSH 0x03
-#define DRM_I810_GETAGE 0x04
-#define DRM_I810_GETBUF 0x05
-#define DRM_I810_SWAP 0x06
-#define DRM_I810_COPY 0x07
-#define DRM_I810_DOCOPY 0x08
-#define DRM_I810_OV0INFO 0x09
-#define DRM_I810_FSTATUS 0x0a
-#define DRM_I810_OV0FLIP 0x0b
-#define DRM_I810_MC 0x0c
-#define DRM_I810_RSTATUS 0x0d
-#define DRM_I810_FLIP 0x0e
-
-#define DRM_IOCTL_I810_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t)
-#define DRM_IOCTL_I810_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t)
-#define DRM_IOCTL_I810_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t)
-#define DRM_IOCTL_I810_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_I810_FLUSH)
-#define DRM_IOCTL_I810_GETAGE DRM_IO( DRM_COMMAND_BASE + DRM_I810_GETAGE)
-#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t)
-#define DRM_IOCTL_I810_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_I810_SWAP)
-#define DRM_IOCTL_I810_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t)
-#define DRM_IOCTL_I810_DOCOPY DRM_IO( DRM_COMMAND_BASE + DRM_I810_DOCOPY)
-#define DRM_IOCTL_I810_OV0INFO DRM_IOR( DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t)
-#define DRM_IOCTL_I810_FSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FSTATUS)
-#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
-#define DRM_IOCTL_I810_MC DRM_IOW( DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t)
-#define DRM_IOCTL_I810_RSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_RSTATUS)
-#define DRM_IOCTL_I810_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FLIP)
-
-typedef struct _drm_i810_clear {
- int clear_color;
- int clear_depth;
- int flags;
-} drm_i810_clear_t;
-
-/* These may be placeholders if we have more cliprects than
- * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to
- * false, indicating that the buffer will be dispatched again with a
- * new set of cliprects.
- */
-typedef struct _drm_i810_vertex {
- int idx; /* buffer index */
- int used; /* nr bytes in use */
- int discard; /* client is finished with the buffer? */
-} drm_i810_vertex_t;
-
-typedef struct _drm_i810_copy_t {
- int idx; /* buffer index */
- int used; /* nr bytes in use */
- void *address; /* Address to copy from */
-} drm_i810_copy_t;
-
-#define PR_TRIANGLES (0x0<<18)
-#define PR_TRISTRIP_0 (0x1<<18)
-#define PR_TRISTRIP_1 (0x2<<18)
-#define PR_TRIFAN (0x3<<18)
-#define PR_POLYGON (0x4<<18)
-#define PR_LINES (0x5<<18)
-#define PR_LINESTRIP (0x6<<18)
-#define PR_RECTS (0x7<<18)
-#define PR_MASK (0x7<<18)
-
-typedef struct drm_i810_dma {
- void *virtual;
- int request_idx;
- int request_size;
- int granted;
-} drm_i810_dma_t;
-
-typedef struct _drm_i810_overlay_t {
- unsigned int offset; /* Address of the Overlay Regs */
- unsigned int physical;
-} drm_i810_overlay_t;
-
-typedef struct _drm_i810_mc {
- int idx; /* buffer index */
- int used; /* nr bytes in use */
- int num_blocks; /* number of GFXBlocks */
- int *length; /* List of lengths for GFXBlocks (FUTURE) */
- unsigned int last_render; /* Last Render Request */
-} drm_i810_mc_t;
-
-#endif /* _I810_DRM_H_ */
+++ /dev/null
-/* i810_drv.c -- I810 driver -*- linux-c -*-
- * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Jeff Hartmann <jhartmann@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "i810_drm.h"
-#include "i810_drv.h"
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- i810_PCI_IDS
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features =
- DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR | */
- DRIVER_HAVE_DMA | DRIVER_DMA_QUEUE,
- .dev_priv_size = sizeof(drm_i810_buf_priv_t),
- .load = i810_driver_load,
- .lastclose = i810_driver_lastclose,
- .preclose = i810_driver_preclose,
- .device_is_agp = i810_driver_device_is_agp,
- .reclaim_buffers_locked = i810_driver_reclaim_buffers_locked,
- .dma_quiescent = i810_driver_dma_quiescent,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = i810_ioctls,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-static int __init i810_init(void)
-{
- driver.num_ioctls = i810_max_ioctl;
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit i810_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(i810_init);
-module_exit(i810_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-/* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
- * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- * Jeff Hartmann <jhartmann@valinux.com>
- *
- */
-
-#ifndef _I810_DRV_H_
-#define _I810_DRV_H_
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "VA Linux Systems Inc."
-
-#define DRIVER_NAME "i810"
-#define DRIVER_DESC "Intel i810"
-#define DRIVER_DATE "20030605"
-
-/* Interface history
- *
- * 1.1 - XFree86 4.1
- * 1.2 - XvMC interfaces
- * - XFree86 4.2
- * 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility)
- * - Remove requirement for interrupt (leave stubs again)
- * 1.3 - Add page flipping.
- * 1.4 - fix DRM interface
- */
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 4
-#define DRIVER_PATCHLEVEL 0
-
-typedef struct drm_i810_buf_priv {
- u32 *in_use;
- int my_use_idx;
- int currently_mapped;
- void *virtual;
- void *kernel_virtual;
- drm_local_map_t map;
-} drm_i810_buf_priv_t;
-
-typedef struct _drm_i810_ring_buffer {
- int tail_mask;
- unsigned long Start;
- unsigned long End;
- unsigned long Size;
- u8 *virtual_start;
- int head;
- int tail;
- int space;
- drm_local_map_t map;
-} drm_i810_ring_buffer_t;
-
-typedef struct drm_i810_private {
- struct drm_map *sarea_map;
- struct drm_map *mmio_map;
-
- drm_i810_sarea_t *sarea_priv;
- drm_i810_ring_buffer_t ring;
-
- void *hw_status_page;
- unsigned long counter;
-
- dma_addr_t dma_status_page;
-
- struct drm_buf *mmap_buffer;
-
- u32 front_di1, back_di1, zi1;
-
- int back_offset;
- int depth_offset;
- int overlay_offset;
- int overlay_physical;
- int w, h;
- int pitch;
- int back_pitch;
- int depth_pitch;
-
- int do_boxes;
- int dma_used;
-
- int current_page;
- int page_flipping;
-
- wait_queue_head_t irq_queue;
- atomic_t irq_received;
- atomic_t irq_emitted;
-
- int front_offset;
-} drm_i810_private_t;
-
- /* i810_dma.c */
-extern int i810_driver_dma_quiescent(struct drm_device * dev);
-extern void i810_driver_reclaim_buffers_locked(struct drm_device * dev,
- struct drm_file *file_priv);
-extern int i810_driver_load(struct drm_device *, unsigned long flags);
-extern void i810_driver_lastclose(struct drm_device * dev);
-extern void i810_driver_preclose(struct drm_device * dev,
- struct drm_file *file_priv);
-extern void i810_driver_reclaim_buffers_locked(struct drm_device * dev,
- struct drm_file *file_priv);
-extern int i810_driver_device_is_agp(struct drm_device * dev);
-
-extern struct drm_ioctl_desc i810_ioctls[];
-extern int i810_max_ioctl;
-
-#define I810_BASE(reg) ((unsigned long) \
- dev_priv->mmio_map->handle)
-#define I810_ADDR(reg) (I810_BASE(reg) + reg)
-#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg)
-#define I810_READ(reg) I810_DEREF(reg)
-#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0)
-#define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg)
-#define I810_READ16(reg) I810_DEREF16(reg)
-#define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0)
-
-#define I810_VERBOSE 0
-#define RING_LOCALS unsigned int outring, ringmask; \
- volatile char *virt;
-
-#define BEGIN_LP_RING(n) do { \
- if (I810_VERBOSE) \
- DRM_DEBUG("BEGIN_LP_RING(%d)\n", n); \
- if (dev_priv->ring.space < n*4) \
- i810_wait_ring(dev, n*4); \
- dev_priv->ring.space -= n*4; \
- outring = dev_priv->ring.tail; \
- ringmask = dev_priv->ring.tail_mask; \
- virt = dev_priv->ring.virtual_start; \
-} while (0)
-
-#define ADVANCE_LP_RING() do { \
- if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \
- dev_priv->ring.tail = outring; \
- I810_WRITE(LP_RING + RING_TAIL, outring); \
-} while(0)
-
-#define OUT_RING(n) do { \
- if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
- *(volatile unsigned int *)(virt + outring) = n; \
- outring += 4; \
- outring &= ringmask; \
-} while (0)
-
-#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
-#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
-#define CMD_REPORT_HEAD (7<<23)
-#define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1)
-#define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1)
-
-#define INST_PARSER_CLIENT 0x00000000
-#define INST_OP_FLUSH 0x02000000
-#define INST_FLUSH_MAP_CACHE 0x00000001
-
-#define BB1_START_ADDR_MASK (~0x7)
-#define BB1_PROTECTED (1<<0)
-#define BB1_UNPROTECTED (0<<0)
-#define BB2_END_ADDR_MASK (~0x7)
-
-#define I810REG_HWSTAM 0x02098
-#define I810REG_INT_IDENTITY_R 0x020a4
-#define I810REG_INT_MASK_R 0x020a8
-#define I810REG_INT_ENABLE_R 0x020a0
-
-#define LP_RING 0x2030
-#define HP_RING 0x2040
-#define RING_TAIL 0x00
-#define TAIL_ADDR 0x000FFFF8
-#define RING_HEAD 0x04
-#define HEAD_WRAP_COUNT 0xFFE00000
-#define HEAD_WRAP_ONE 0x00200000
-#define HEAD_ADDR 0x001FFFFC
-#define RING_START 0x08
-#define START_ADDR 0x00FFFFF8
-#define RING_LEN 0x0C
-#define RING_NR_PAGES 0x000FF000
-#define RING_REPORT_MASK 0x00000006
-#define RING_REPORT_64K 0x00000002
-#define RING_REPORT_128K 0x00000004
-#define RING_NO_REPORT 0x00000000
-#define RING_VALID_MASK 0x00000001
-#define RING_VALID 0x00000001
-#define RING_INVALID 0x00000000
-
-#define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19))
-#define SC_UPDATE_SCISSOR (0x1<<1)
-#define SC_ENABLE_MASK (0x1<<0)
-#define SC_ENABLE (0x1<<0)
-
-#define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
-#define SCI_YMIN_MASK (0xffff<<16)
-#define SCI_XMIN_MASK (0xffff<<0)
-#define SCI_YMAX_MASK (0xffff<<16)
-#define SCI_XMAX_MASK (0xffff<<0)
-
-#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
-#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
-#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2)
-#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
-#define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
-#define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24))
-
-#define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23))
-#define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23))
-#define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)|(0x14<<23))
-#define CMD_OP_WAIT_FOR_EVENT ((0x0<<29)|(0x03<<23))
-
-#define BR00_BITBLT_CLIENT 0x40000000
-#define BR00_OP_COLOR_BLT 0x10000000
-#define BR00_OP_SRC_COPY_BLT 0x10C00000
-#define BR13_SOLID_PATTERN 0x80000000
-
-#define WAIT_FOR_PLANE_A_SCANLINES (1<<1)
-#define WAIT_FOR_PLANE_A_FLIP (1<<2)
-#define WAIT_FOR_VBLANK (1<<3)
-
-#endif
+++ /dev/null
-/*
- * Copyright 2005 Adam Jackson.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/* derived from tdfx_drv.c */
-
-#include "drmP.h"
-#include "imagine_drv.h"
-
-#include "drm_pciids.h"
-
-static struct drm_driver driver;
-
-static struct pci_device_id pciidlist[] = {
- imagine_PCI_IDS
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-static struct drm_driver driver = {
- .driver_features = DRIVER_USE_MTRR,
- .reclaim_buffers = drm_core_reclaim_buffers,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int __init imagine_init(void)
-{
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit imagine_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(imagine_init);
-module_exit(imagine_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-.
\ No newline at end of file
+++ /dev/null
-../shared-core/mach64_dma.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mach64_drm.h
\ No newline at end of file
+++ /dev/null
-/* mach64_drv.c -- mach64 (Rage Pro) driver -*- linux-c -*-
- * Created: Fri Nov 24 18:34:32 2000 by gareth@valinux.com
- *
- * Copyright 2000 Gareth Hughes
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- * Leif Delgass <ldelgass@retinalburn.net>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "mach64_drm.h"
-#include "mach64_drv.h"
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- mach64_PCI_IDS
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_HAVE_DMA
- | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED,
- .lastclose = mach64_driver_lastclose,
- .get_vblank_counter = mach64_get_vblank_counter,
- .enable_vblank = mach64_enable_vblank,
- .disable_vblank = mach64_disable_vblank,
- .irq_preinstall = mach64_driver_irq_preinstall,
- .irq_postinstall = mach64_driver_irq_postinstall,
- .irq_uninstall = mach64_driver_irq_uninstall,
- .irq_handler = mach64_driver_irq_handler,
- .reclaim_buffers = drm_core_reclaim_buffers,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = mach64_ioctls,
- .dma_ioctl = mach64_dma_buffers,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-
-static int __init mach64_init(void)
-{
- driver.num_ioctls = mach64_max_ioctl;
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit mach64_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(mach64_init);
-module_exit(mach64_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-../shared-core/mach64_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/mach64_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mach64_state.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_dma.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_drm.h
\ No newline at end of file
+++ /dev/null
-/* mga_drv.c -- Matrox G200/G400 driver -*- linux-c -*-
- * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "mga_drm.h"
-#include "mga_drv.h"
-
-#include "drm_pciids.h"
-
-static int mga_driver_device_is_agp(struct drm_device * dev);
-
-static struct pci_device_id pciidlist[] = {
- mga_PCI_IDS
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
- DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED,
- .dev_priv_size = sizeof (drm_mga_buf_priv_t),
- .load = mga_driver_load,
- .unload = mga_driver_unload,
- .lastclose = mga_driver_lastclose,
- .dma_quiescent = mga_driver_dma_quiescent,
- .device_is_agp = mga_driver_device_is_agp,
- .get_vblank_counter = mga_get_vblank_counter,
- .enable_vblank = mga_enable_vblank,
- .disable_vblank = mga_disable_vblank,
- .irq_preinstall = mga_driver_irq_preinstall,
- .irq_postinstall = mga_driver_irq_postinstall,
- .irq_uninstall = mga_driver_irq_uninstall,
- .irq_handler = mga_driver_irq_handler,
- .reclaim_buffers = drm_core_reclaim_buffers,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = mga_ioctls,
- .dma_ioctl = mga_dma_buffers,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
-#if defined(CONFIG_COMPAT)
- .compat_ioctl = mga_compat_ioctl,
-#endif
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-
-static int __init mga_init(void)
-{
- driver.num_ioctls = mga_max_ioctl;
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit mga_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(mga_init);
-module_exit(mga_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
-
-/**
- * Determine if the device really is AGP or not.
- *
- * In addition to the usual tests performed by \c drm_device_is_agp, this
- * function detects PCI G450 cards that appear to the system exactly like
- * AGP G450 cards.
- *
- * \param dev The device to be tested.
- *
- * \returns
- * If the device is a PCI G450, zero is returned. Otherwise 2 is returned.
- */
-static int mga_driver_device_is_agp(struct drm_device * dev)
-{
- const struct pci_dev * const pdev = dev->pdev;
-
-
- /* There are PCI versions of the G450. These cards have the
- * same PCI ID as the AGP G450, but have an additional PCI-to-PCI
- * bridge chip. We detect these cards, which are not currently
- * supported by this driver, by looking at the device ID of the
- * bus the "card" is on. If vendor is 0x3388 (Hint Corp) and the
- * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the
- * device.
- */
-
- if ((pdev->device == 0x0525) && pdev->bus->self
- && (pdev->bus->self->vendor == 0x3388)
- && (pdev->bus->self->device == 0x0021)) {
- return 0;
- }
-
- return 2;
-}
+++ /dev/null
-../shared-core/mga_drv.h
\ No newline at end of file
+++ /dev/null
-
-/**
- * \file mga_ioc32.c
- *
- * 32-bit ioctl compatibility routines for the MGA DRM.
- *
- * \author Dave Airlie <airlied@linux.ie> with code from patches by Egbert Eich
- *
- *
- * Copyright (C) Paul Mackerras 2005
- * Copyright (C) Egbert Eich 2003,2004
- * Copyright (C) Dave Airlie 2005
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-#include <linux/compat.h>
-
-#include "drmP.h"
-#include "drm.h"
-#include "mga_drm.h"
-
-typedef struct drm32_mga_init {
- int func;
- u32 sarea_priv_offset;
- int chipset;
- int sgram;
- unsigned int maccess;
- unsigned int fb_cpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
- unsigned int depth_cpp;
- unsigned int depth_offset, depth_pitch;
- unsigned int texture_offset[MGA_NR_TEX_HEAPS];
- unsigned int texture_size[MGA_NR_TEX_HEAPS];
- u32 fb_offset;
- u32 mmio_offset;
- u32 status_offset;
- u32 warp_offset;
- u32 primary_offset;
- u32 buffers_offset;
-} drm_mga_init32_t;
-
-static int compat_mga_init(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_mga_init32_t init32;
- drm_mga_init_t __user *init;
- int err = 0, i;
-
- if (copy_from_user(&init32, (void __user *)arg, sizeof(init32)))
- return -EFAULT;
-
- init = compat_alloc_user_space(sizeof(*init));
- if (!access_ok(VERIFY_WRITE, init, sizeof(*init))
- || __put_user(init32.func, &init->func)
- || __put_user(init32.sarea_priv_offset, &init->sarea_priv_offset)
- || __put_user(init32.chipset, &init->chipset)
- || __put_user(init32.sgram, &init->sgram)
- || __put_user(init32.maccess, &init->maccess)
- || __put_user(init32.fb_cpp, &init->fb_cpp)
- || __put_user(init32.front_offset, &init->front_offset)
- || __put_user(init32.front_pitch, &init->front_pitch)
- || __put_user(init32.back_offset, &init->back_offset)
- || __put_user(init32.back_pitch, &init->back_pitch)
- || __put_user(init32.depth_cpp, &init->depth_cpp)
- || __put_user(init32.depth_offset, &init->depth_offset)
- || __put_user(init32.depth_pitch, &init->depth_pitch)
- || __put_user(init32.fb_offset, &init->fb_offset)
- || __put_user(init32.mmio_offset, &init->mmio_offset)
- || __put_user(init32.status_offset, &init->status_offset)
- || __put_user(init32.warp_offset, &init->warp_offset)
- || __put_user(init32.primary_offset, &init->primary_offset)
- || __put_user(init32.buffers_offset, &init->buffers_offset))
- return -EFAULT;
-
- for (i=0; i<MGA_NR_TEX_HEAPS; i++)
- {
- err |= __put_user(init32.texture_offset[i], &init->texture_offset[i]);
- err |= __put_user(init32.texture_size[i], &init->texture_size[i]);
- }
- if (err)
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_MGA_INIT, (unsigned long) init);
-}
-
-
-typedef struct drm_mga_getparam32 {
- int param;
- u32 value;
-} drm_mga_getparam32_t;
-
-
-static int compat_mga_getparam(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_mga_getparam32_t getparam32;
- drm_mga_getparam_t __user *getparam;
-
- if (copy_from_user(&getparam32, (void __user *)arg, sizeof(getparam32)))
- return -EFAULT;
-
- getparam = compat_alloc_user_space(sizeof(*getparam));
- if (!access_ok(VERIFY_WRITE, getparam, sizeof(*getparam))
- || __put_user(getparam32.param, &getparam->param)
- || __put_user((void __user *)(unsigned long)getparam32.value, &getparam->value))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_MGA_GETPARAM, (unsigned long)getparam);
-}
-
-typedef struct drm_mga_drm_bootstrap32 {
- u32 texture_handle;
- u32 texture_size;
- u32 primary_size;
- u32 secondary_bin_count;
- u32 secondary_bin_size;
- u32 agp_mode;
- u8 agp_size;
-} drm_mga_dma_bootstrap32_t;
-
-static int compat_mga_dma_bootstrap(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_mga_dma_bootstrap32_t dma_bootstrap32;
- drm_mga_dma_bootstrap_t __user *dma_bootstrap;
- int err;
-
- if (copy_from_user(&dma_bootstrap32, (void __user *)arg,
- sizeof(dma_bootstrap32)))
- return -EFAULT;
-
- dma_bootstrap = compat_alloc_user_space(sizeof(*dma_bootstrap));
- if (!access_ok(VERIFY_WRITE, dma_bootstrap, sizeof(*dma_bootstrap))
- || __put_user(dma_bootstrap32.texture_handle,
- &dma_bootstrap->texture_handle)
- || __put_user(dma_bootstrap32.texture_size,
- &dma_bootstrap->texture_size)
- || __put_user(dma_bootstrap32.primary_size,
- &dma_bootstrap->primary_size)
- || __put_user(dma_bootstrap32.secondary_bin_count,
- &dma_bootstrap->secondary_bin_count)
- || __put_user(dma_bootstrap32.secondary_bin_size,
- &dma_bootstrap->secondary_bin_size)
- || __put_user(dma_bootstrap32.agp_mode, &dma_bootstrap->agp_mode)
- || __put_user(dma_bootstrap32.agp_size, &dma_bootstrap->agp_size))
- return -EFAULT;
-
- err = drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_MGA_DMA_BOOTSTRAP,
- (unsigned long)dma_bootstrap);
- if (err)
- return err;
-
- if (__get_user(dma_bootstrap32.texture_handle,
- &dma_bootstrap->texture_handle)
- || __get_user(dma_bootstrap32.texture_size,
- &dma_bootstrap->texture_size)
- || __get_user(dma_bootstrap32.primary_size,
- &dma_bootstrap->primary_size)
- || __get_user(dma_bootstrap32.secondary_bin_count,
- &dma_bootstrap->secondary_bin_count)
- || __get_user(dma_bootstrap32.secondary_bin_size,
- &dma_bootstrap->secondary_bin_size)
- || __get_user(dma_bootstrap32.agp_mode,
- &dma_bootstrap->agp_mode)
- || __get_user(dma_bootstrap32.agp_size,
- &dma_bootstrap->agp_size))
- return -EFAULT;
-
- if (copy_to_user((void __user *)arg, &dma_bootstrap32,
- sizeof(dma_bootstrap32)))
- return -EFAULT;
-
- return 0;
-}
-
-drm_ioctl_compat_t *mga_compat_ioctls[] = {
- [DRM_MGA_INIT] = compat_mga_init,
- [DRM_MGA_GETPARAM] = compat_mga_getparam,
- [DRM_MGA_DMA_BOOTSTRAP] = compat_mga_dma_bootstrap,
-};
-
-/**
- * Called whenever a 32-bit process running under a 64-bit kernel
- * performs an ioctl on /dev/dri/card<n>.
- *
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or negative number on failure.
- */
-long mga_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- unsigned int nr = DRM_IOCTL_NR(cmd);
- drm_ioctl_compat_t *fn = NULL;
- int ret;
-
- if (nr < DRM_COMMAND_BASE)
- return drm_compat_ioctl(filp, cmd, arg);
-
- if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls))
- fn = mga_compat_ioctls[nr - DRM_COMMAND_BASE];
-
- lock_kernel(); /* XXX for now */
- if (fn != NULL)
- ret = (*fn)(filp, cmd, arg);
- else
- ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
- unlock_kernel();
-
- return ret;
-}
+++ /dev/null
-../shared-core/mga_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_state.c
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_ucode.h
\ No newline at end of file
+++ /dev/null
-../shared-core/mga_warp.c
\ No newline at end of file
+++ /dev/null
-/*
- * Copyright (C) 2009 Red Hat <mjg@redhat.com>
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/*
- * Authors:
- * Matthew Garrett <mjg@redhat.com>
- *
- * PowerPC specific stuff:
- * Danny Tholen <moondrake@gmail.com>
- * (mainly based on info from nvidiafb)
- *
- * Register locations derived from NVClock by Roderick Colenbrander
- */
-
-#include <linux/backlight.h>
-
-#include "drmP.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-#include "nouveau_reg.h"
-#ifdef CONFIG_PMAC_BACKLIGHT
-#include <asm/backlight.h>
-#endif
-
-#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23))
-
-#ifdef CONFIG_PMAC_BACKLIGHT
-static int ppc_get_intensity(struct backlight_device *bd)
-{
- struct drm_device *dev = bl_get_data(bd);
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int raw_val = (NV_READ(NV_PBUS_DEBUG_DUALHEAD_CTL) & 0x7fff0000) >> 16;
- int min_brightness = bd->props.max_brightness / 3;
- int intensity = raw_val - min_brightness;
-
- return (intensity < 0 ? 0 : intensity);
-}
-
-static int ppc_set_intensity(struct backlight_device *bd)
-{
- struct drm_device *dev = bl_get_data(bd);
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int val = bd->props.brightness;
- int min_brightness = bd->props.max_brightness / 3;
- int dh_ctl = NV_READ(NV_PBUS_DEBUG_DUALHEAD_CTL) & 0x0000ffff;
- int gpio_ext = NV_READ(NV_PCRTC_GPIO_EXT) & ~0x3;
-
- if (val > 0) {
- dh_ctl |= (1 << 31); /* backlight bit on */
- dh_ctl |= (val + min_brightness) << 16;
- gpio_ext |= 0x1;
- }
-
- NV_WRITE(NV_PBUS_DEBUG_DUALHEAD_CTL, dh_ctl);
- NV_WRITE(NV_PCRTC_GPIO_EXT, gpio_ext);
-
- return 0;
-}
-
-static struct backlight_ops ppc_bl_ops = {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
- .options = BL_CORE_SUSPENDRESUME,
-#endif
- .get_brightness = ppc_get_intensity,
- .update_status = ppc_set_intensity,
-};
-#endif /* CONFIG_PMAC_BACKLIGHT */
-
-static int nv40_get_intensity(struct backlight_device *bd)
-{
- struct drm_device *dev = bl_get_data(bd);
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int val = (NV_READ(NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK) >> 16;
-
- return val;
-}
-
-static int nv40_set_intensity(struct backlight_device *bd)
-{
- struct drm_device *dev = bl_get_data(bd);
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int val = bd->props.brightness;
- int reg = NV_READ(NV40_PMC_BACKLIGHT);
-
- NV_WRITE(NV40_PMC_BACKLIGHT,
- (val << 16) | (reg & ~NV40_PMC_BACKLIGHT_MASK));
-
- return 0;
-}
-
-static struct backlight_ops nv40_bl_ops = {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
- .options = BL_CORE_SUSPENDRESUME,
-#endif
- .get_brightness = nv40_get_intensity,
- .update_status = nv40_set_intensity,
-};
-
-static int nv50_get_intensity(struct backlight_device *bd)
-{
- struct drm_device *dev = bl_get_data(bd);
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- return NV_READ(NV50_PDISPLAY_BACKLIGHT);
-}
-
-static int nv50_set_intensity(struct backlight_device *bd)
-{
- struct drm_device *dev = bl_get_data(bd);
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int val = bd->props.brightness;
-
- NV_WRITE(NV50_PDISPLAY_BACKLIGHT, val | NV50_PDISPLAY_BACKLIGHT_ENABLE);
-
- return 0;
-}
-
-static struct backlight_ops nv50_bl_ops = {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
- .options = BL_CORE_SUSPENDRESUME,
-#endif
- .get_brightness = nv50_get_intensity,
- .update_status = nv50_set_intensity,
-};
-
-#ifdef CONFIG_PMAC_BACKLIGHT
-static int nouveau_ppc_backlight_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct backlight_device *bd;
- int max_brightness;
-
- if (!machine_is(powermac) ||
- !pmac_has_backlight_type("mnca"))
- return -ENODEV;
-
- /* "nv_bl0", some old powerpc userland tools rely on this */
- bd = backlight_device_register("nv_bl0", &dev->pdev->dev, dev,
- &ppc_bl_ops);
- if (IS_ERR(bd))
- return PTR_ERR(bd);
-
- dev_priv->backlight = bd;
-
- /* the least significant 15 bits of NV_PBUS_DEBUG_DUALHEAD_CTL
- * set the maximum backlight level, OF sets it to 0x535 on my
- * powerbook. however, posting the card sets this to 0x7FFF.
- * Below 25% the blacklight turns off.
- *
- * NOTE: pbbuttonsd limits brightness values < 255, and thus
- * will not work well with this.
- */
-
- /* FIXME: do we want to fix this reg to 0x535 for consistency? */
- max_brightness = NV_READ(NV_PBUS_DEBUG_DUALHEAD_CTL) & 0x0000ffff;
- /* lose (bottom) 25% of range */
- bd->props.max_brightness = (max_brightness * 3) / 4;
- bd->props.brightness = ppc_get_intensity(bd);
- backlight_update_status(bd);
-
- return 0;
-}
-#endif
-
-static int nouveau_nv40_backlight_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct backlight_device *bd;
-
- if (!(NV_READ(NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK))
- return 0;
-
- bd = backlight_device_register("nv_backlight", &dev->pdev->dev, dev,
- &nv40_bl_ops);
- if (IS_ERR(bd))
- return PTR_ERR(bd);
-
- dev_priv->backlight = bd;
- bd->props.max_brightness = 31;
- bd->props.brightness = nv40_get_intensity(bd);
- backlight_update_status(bd);
-
- return 0;
-}
-
-static int nouveau_nv50_backlight_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct backlight_device *bd;
-
- if (!NV_READ(NV50_PDISPLAY_BACKLIGHT))
- return 0;
-
- bd = backlight_device_register("nv_backlight", &dev->pdev->dev, dev,
- &nv50_bl_ops);
- if (IS_ERR(bd))
- return PTR_ERR(bd);
-
- dev_priv->backlight = bd;
- bd->props.max_brightness = 1025;
- bd->props.brightness = nv50_get_intensity(bd);
- backlight_update_status(bd);
- return 0;
-}
-
-int nouveau_backlight_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- switch (dev_priv->card_type) {
-#ifdef CONFIG_PMAC_BACKLIGHT
- case NV_17:
- case NV_30:
- return nouveau_ppc_backlight_init(dev);
-#endif
- case NV_40:
- case NV_44:
- return nouveau_nv40_backlight_init(dev);
- break;
- case NV_50:
- return nouveau_nv50_backlight_init(dev);
- break;
- }
- return 0;
-}
-
-void nouveau_backlight_exit(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- if (dev_priv->backlight)
- backlight_device_unregister(dev_priv->backlight);
-}
-
-#else /* CONFIG_BACKLIGHT_CLASS_DEVICE not set */
-int nouveau_backlight_init(struct drm_device *dev)
-{
- (void)dev;
- return 0;
-}
-
-void nouveau_backlight_exit(struct drm_device *dev)
-{
- (void)dev;
-}
-#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE not set */
+++ /dev/null
-/*
- * Copyright 2007 Dave Airlied
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-/*
- * Authors: Dave Airlied <airlied@linux.ie>
- * Ben Skeggs <darktama@iinet.net.au>
- * Jeremy Kolb <jkolb@brandeis.edu>
- */
-
-#include "drmP.h"
-#include "nouveau_drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_dma.h"
-
-static struct drm_ttm_backend *
-nouveau_bo_create_ttm_backend_entry(struct drm_device * dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- switch (dev_priv->gart_info.type) {
- case NOUVEAU_GART_AGP:
- return drm_agp_init_ttm(dev);
- case NOUVEAU_GART_SGDMA:
- return nouveau_sgdma_init_ttm(dev);
- default:
- DRM_ERROR("Unknown GART type %d\n", dev_priv->gart_info.type);
- break;
- }
-
- return NULL;
-}
-
-static int
-nouveau_bo_fence_type(struct drm_buffer_object *bo,
- uint32_t *fclass, uint32_t *type)
-{
- /* When we get called, *fclass is set to the requested fence class */
-
- if (bo->mem.proposed_flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
- *type = 3;
- else
- *type = 1;
- return 0;
-
-}
-
-static int
-nouveau_bo_invalidate_caches(struct drm_device *dev, uint64_t buffer_flags)
-{
- /* We'll do this from user space. */
- return 0;
-}
-
-static int
-nouveau_bo_init_mem_type(struct drm_device *dev, uint32_t type,
- struct drm_mem_type_manager *man)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- switch (type) {
- case DRM_BO_MEM_LOCAL:
- man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
- _DRM_FLAG_MEMTYPE_CACHED;
- man->drm_bus_maptype = 0;
- break;
- case DRM_BO_MEM_VRAM:
- man->flags = _DRM_FLAG_MEMTYPE_FIXED |
- _DRM_FLAG_MEMTYPE_MAPPABLE |
- _DRM_FLAG_NEEDS_IOREMAP;
- man->io_addr = NULL;
- man->drm_bus_maptype = _DRM_FRAME_BUFFER;
- man->io_offset = drm_get_resource_start(dev, 1);
- man->io_size = drm_get_resource_len(dev, 1);
- if (man->io_size > nouveau_mem_fb_amount(dev))
- man->io_size = nouveau_mem_fb_amount(dev);
- break;
- case DRM_BO_MEM_PRIV0:
- /* Unmappable VRAM */
- man->flags = _DRM_FLAG_MEMTYPE_CMA;
- man->drm_bus_maptype = 0;
- break;
- case DRM_BO_MEM_TT:
- switch (dev_priv->gart_info.type) {
- case NOUVEAU_GART_AGP:
- man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
- _DRM_FLAG_MEMTYPE_CSELECT |
- _DRM_FLAG_NEEDS_IOREMAP;
- man->drm_bus_maptype = _DRM_AGP;
- break;
- case NOUVEAU_GART_SGDMA:
- man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
- _DRM_FLAG_MEMTYPE_CSELECT |
- _DRM_FLAG_MEMTYPE_CMA;
- man->drm_bus_maptype = _DRM_SCATTER_GATHER;
- break;
- default:
- DRM_ERROR("Unknown GART type: %d\n",
- dev_priv->gart_info.type);
- return -EINVAL;
- }
-
- man->io_offset = dev_priv->gart_info.aper_base;
- man->io_size = dev_priv->gart_info.aper_size;
- man->io_addr = NULL;
- break;
- default:
- DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
- return -EINVAL;
- }
- return 0;
-}
-
-static uint64_t
-nouveau_bo_evict_flags(struct drm_buffer_object *bo)
-{
- switch (bo->mem.mem_type) {
- case DRM_BO_MEM_LOCAL:
- case DRM_BO_MEM_TT:
- return DRM_BO_FLAG_MEM_LOCAL;
- default:
- return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED;
- }
- return 0;
-}
-
-
-/* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
- * DRM_BO_MEM_{VRAM,PRIV0,TT} directly.
- */
-static int
-nouveau_bo_move_m2mf(struct drm_buffer_object *bo, int evict, int no_wait,
- struct drm_bo_mem_reg *new_mem)
-{
- struct drm_device *dev = bo->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_drm_channel *dchan = &dev_priv->channel;
- struct drm_bo_mem_reg *old_mem = &bo->mem;
- uint32_t srch, dsth, page_count;
-
- /* Can happen during init/takedown */
- if (!dchan->chan)
- return -EINVAL;
-
- srch = old_mem->mem_type == DRM_BO_MEM_TT ? NvDmaTT : NvDmaFB;
- dsth = new_mem->mem_type == DRM_BO_MEM_TT ? NvDmaTT : NvDmaFB;
- if (srch != dchan->m2mf_dma_source || dsth != dchan->m2mf_dma_destin) {
- dchan->m2mf_dma_source = srch;
- dchan->m2mf_dma_destin = dsth;
-
- BEGIN_RING(NvSubM2MF,
- NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_SOURCE, 2);
- OUT_RING (dchan->m2mf_dma_source);
- OUT_RING (dchan->m2mf_dma_destin);
- }
-
- page_count = new_mem->num_pages;
- while (page_count) {
- int line_count = (page_count > 2047) ? 2047 : page_count;
-
- BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
- OUT_RING (old_mem->mm_node->start << PAGE_SHIFT);
- OUT_RING (new_mem->mm_node->start << PAGE_SHIFT);
- OUT_RING (PAGE_SIZE); /* src_pitch */
- OUT_RING (PAGE_SIZE); /* dst_pitch */
- OUT_RING (PAGE_SIZE); /* line_length */
- OUT_RING (line_count);
- OUT_RING ((1<<8)|(1<<0));
- OUT_RING (0);
- BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
- OUT_RING (0);
-
- page_count -= line_count;
- }
-
- return drm_bo_move_accel_cleanup(bo, evict, no_wait, dchan->chan->id,
- DRM_FENCE_TYPE_EXE, 0, new_mem);
-}
-
-/* Flip pages into the GART and move if we can. */
-static int
-nouveau_bo_move_flipd(struct drm_buffer_object *bo, int evict, int no_wait,
- struct drm_bo_mem_reg *new_mem)
-{
- struct drm_device *dev = bo->dev;
- struct drm_bo_mem_reg tmp_mem;
- int ret;
-
- tmp_mem = *new_mem;
- tmp_mem.mm_node = NULL;
- tmp_mem.proposed_flags = (DRM_BO_FLAG_MEM_TT |
- DRM_BO_FLAG_CACHED |
- DRM_BO_FLAG_FORCE_CACHING);
-
- ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
- if (ret)
- return ret;
-
- ret = drm_ttm_bind(bo->ttm, &tmp_mem);
- if (ret)
- goto out_cleanup;
-
- ret = nouveau_bo_move_m2mf(bo, 1, no_wait, &tmp_mem);
- if (ret)
- goto out_cleanup;
-
- ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
-
-out_cleanup:
- if (tmp_mem.mm_node) {
- mutex_lock(&dev->struct_mutex);
- if (tmp_mem.mm_node != bo->pinned_node)
- drm_mm_put_block(tmp_mem.mm_node);
- tmp_mem.mm_node = NULL;
- mutex_unlock(&dev->struct_mutex);
- }
-
- return ret;
-}
-
-static int
-nouveau_bo_move(struct drm_buffer_object *bo, int evict, int no_wait,
- struct drm_bo_mem_reg *new_mem)
-{
- struct drm_bo_mem_reg *old_mem = &bo->mem;
-
- if (new_mem->mem_type == DRM_BO_MEM_LOCAL) {
- if (old_mem->mem_type == DRM_BO_MEM_LOCAL)
- return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
- if (nouveau_bo_move_flipd(bo, evict, no_wait, new_mem))
- return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
- }
- else
- if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
- if (1 /*nouveau_bo_move_flips(bo, evict, no_wait, new_mem)*/)
- return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
- }
- else {
- if (nouveau_bo_move_m2mf(bo, evict, no_wait, new_mem))
- return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
- }
-
- return 0;
-}
-
-static void
-nouveau_bo_flush_ttm(struct drm_ttm *ttm)
-{
-}
-
-static uint32_t nouveau_mem_prios[] = {
- DRM_BO_MEM_PRIV0,
- DRM_BO_MEM_VRAM,
- DRM_BO_MEM_TT,
- DRM_BO_MEM_LOCAL
-};
-static uint32_t nouveau_busy_prios[] = {
- DRM_BO_MEM_TT,
- DRM_BO_MEM_PRIV0,
- DRM_BO_MEM_VRAM,
- DRM_BO_MEM_LOCAL
-};
-
-struct drm_bo_driver nouveau_bo_driver = {
- .mem_type_prio = nouveau_mem_prios,
- .mem_busy_prio = nouveau_busy_prios,
- .num_mem_type_prio = sizeof(nouveau_mem_prios)/sizeof(uint32_t),
- .num_mem_busy_prio = sizeof(nouveau_busy_prios)/sizeof(uint32_t),
- .create_ttm_backend_entry = nouveau_bo_create_ttm_backend_entry,
- .fence_type = nouveau_bo_fence_type,
- .invalidate_caches = nouveau_bo_invalidate_caches,
- .init_mem_type = nouveau_bo_init_mem_type,
- .evict_flags = nouveau_bo_evict_flags,
- .move = nouveau_bo_move,
- .ttm_cache_flush= nouveau_bo_flush_ttm,
- .command_stream_barrier = NULL
-};
+++ /dev/null
-../shared-core/nouveau_dma.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_dma.h
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_drm.h
\ No newline at end of file
+++ /dev/null
-/*
- * Copyright 2005 Stephane Marchesin.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- {
- PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
- .class = PCI_BASE_CLASS_DISPLAY << 16,
- .class_mask = 0xff << 16,
- },
- {
- PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
- .class = PCI_BASE_CLASS_DISPLAY << 16,
- .class_mask = 0xff << 16,
- }
-};
-
-extern struct drm_ioctl_desc nouveau_ioctls[];
-extern int nouveau_max_ioctl;
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features =
- DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
- DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED,
- .load = nouveau_load,
- .firstopen = nouveau_firstopen,
- .lastclose = nouveau_lastclose,
- .unload = nouveau_unload,
- .preclose = nouveau_preclose,
- .irq_preinstall = nouveau_irq_preinstall,
- .irq_postinstall = nouveau_irq_postinstall,
- .irq_uninstall = nouveau_irq_uninstall,
- .irq_handler = nouveau_irq_handler,
- .reclaim_buffers = drm_core_reclaim_buffers,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = nouveau_ioctls,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
-#if defined(CONFIG_COMPAT)
- .compat_ioctl = nouveau_compat_ioctl,
-#endif
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .bo_driver = &nouveau_bo_driver,
- .fence_driver = &nouveau_fence_driver,
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
-#ifdef GIT_REVISION
- .date = GIT_REVISION,
-#else
- .date = DRIVER_DATE,
-#endif
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-static int __init nouveau_init(void)
-{
- driver.num_ioctls = nouveau_max_ioctl;
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit nouveau_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(nouveau_init);
-module_exit(nouveau_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-../shared-core/nouveau_drv.h
\ No newline at end of file
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_dma.h"
-
-static int
-nouveau_fence_has_irq(struct drm_device *dev, uint32_t class, uint32_t flags)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("class=%d, flags=0x%08x\n", class, flags);
-
- /* DRM's channel always uses IRQs to signal fences */
- if (class == dev_priv->channel.chan->id)
- return 1;
-
- /* Other channels don't use IRQs at all yet */
- return 0;
-}
-
-static int
-nouveau_fence_emit(struct drm_device *dev, uint32_t class, uint32_t flags,
- uint32_t *breadcrumb, uint32_t *native_type)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_channel *chan = dev_priv->fifos[class];
- struct nouveau_drm_channel *dchan = &dev_priv->channel;
-
- DRM_DEBUG("class=%d, flags=0x%08x\n", class, flags);
-
- /* We can't emit fences on client channels, update sequence number
- * and userspace will emit the fence
- */
- *breadcrumb = ++chan->next_sequence;
- *native_type = DRM_FENCE_TYPE_EXE;
- if (chan != dchan->chan) {
- DRM_DEBUG("user fence 0x%08x\n", *breadcrumb);
- return 0;
- }
-
- DRM_DEBUG("emit 0x%08x\n", *breadcrumb);
- BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_SET_REF, 1);
- OUT_RING (*breadcrumb);
- BEGIN_RING(NvSubM2MF, 0x0150, 1);
- OUT_RING (0);
- FIRE_RING ();
-
- return 0;
-}
-
-static void
-nouveau_fence_poll(struct drm_device *dev, uint32_t class, uint32_t waiting_types)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_fence_class_manager *fc = &dev->fm.fence_class[class];
- struct nouveau_channel *chan = dev_priv->fifos[class];
-
- DRM_DEBUG("class=%d\n", class);
- DRM_DEBUG("pending: 0x%08x 0x%08x\n", waiting_types, fc->waiting_types);
-
- if (waiting_types & DRM_FENCE_TYPE_EXE) {
- uint32_t sequence = NV_READ(chan->ref_cnt);
-
- DRM_DEBUG("got 0x%08x\n", sequence);
- drm_fence_handler(dev, class, sequence, waiting_types, 0);
- }
-}
-
-void
-nouveau_fence_handler(struct drm_device *dev, int channel)
-{
- struct drm_fence_manager *fm = &dev->fm;
- struct drm_fence_class_manager *fc = &fm->fence_class[channel];
-
- DRM_DEBUG("class=%d\n", channel);
-
- write_lock(&fm->lock);
- nouveau_fence_poll(dev, channel, fc->waiting_types);
- write_unlock(&fm->lock);
-}
-
-struct drm_fence_driver nouveau_fence_driver = {
- .num_classes = 8,
- .wrap_diff = (1 << 30),
- .flush_diff = (1 << 29),
- .sequence_mask = 0xffffffffU,
- .has_irq = nouveau_fence_has_irq,
- .emit = nouveau_fence_emit,
- .flush = NULL,
- .poll = nouveau_fence_poll,
- .needed_flush = NULL,
- .wait = NULL
-};
+++ /dev/null
-../shared-core/nouveau_fifo.c
\ No newline at end of file
+++ /dev/null
-/**
- * \file mga_ioc32.c
- *
- * 32-bit ioctl compatibility routines for the MGA DRM.
- *
- * \author Dave Airlie <airlied@linux.ie> with code from patches by Egbert Eich
- *
- *
- * Copyright (C) Paul Mackerras 2005
- * Copyright (C) Egbert Eich 2003,2004
- * Copyright (C) Dave Airlie 2005
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-#include <linux/compat.h>
-
-#include "drmP.h"
-#include "drm.h"
-
-#include "nouveau_drm.h"
-
-/**
- * Called whenever a 32-bit process running under a 64-bit kernel
- * performs an ioctl on /dev/dri/card<n>.
- *
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or negative number on failure.
- */
-long nouveau_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- unsigned int nr = DRM_IOCTL_NR(cmd);
- drm_ioctl_compat_t *fn = NULL;
- int ret;
-
- if (nr < DRM_COMMAND_BASE)
- return drm_compat_ioctl(filp, cmd, arg);
-
-#if 0
- if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls))
- fn = nouveau_compat_ioctls[nr - DRM_COMMAND_BASE];
-#endif
- lock_kernel(); /* XXX for now */
- if (fn != NULL)
- ret = (*fn)(filp, cmd, arg);
- else
- ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
- unlock_kernel();
-
- return ret;
-}
+++ /dev/null
-../shared-core/nouveau_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_mem.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_notifier.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_object.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_reg.h
\ No newline at end of file
+++ /dev/null
-#include "drmP.h"
-#include "nouveau_drv.h"
-
-#define NV_CTXDMA_PAGE_SHIFT 12
-#define NV_CTXDMA_PAGE_SIZE (1 << NV_CTXDMA_PAGE_SHIFT)
-#define NV_CTXDMA_PAGE_MASK (NV_CTXDMA_PAGE_SIZE - 1)
-
-struct nouveau_sgdma_be {
- struct drm_ttm_backend backend;
- struct drm_device *dev;
-
- int pages;
- int pages_populated;
- dma_addr_t *pagelist;
- int is_bound;
-
- unsigned int pte_start;
-};
-
-static int
-nouveau_sgdma_needs_ub_cache_adjust(struct drm_ttm_backend *be)
-{
- return ((be->flags & DRM_BE_FLAG_BOUND_CACHED) ? 0 : 1);
-}
-
-static int
-nouveau_sgdma_populate(struct drm_ttm_backend *be, unsigned long num_pages,
- struct page **pages, struct page *dummy_read_page)
-{
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
- int p, d, o;
-
- DRM_DEBUG("num_pages = %ld\n", num_pages);
-
- if (nvbe->pagelist)
- return -EINVAL;
- nvbe->pages = (num_pages << PAGE_SHIFT) >> NV_CTXDMA_PAGE_SHIFT;
- nvbe->pagelist = drm_alloc(nvbe->pages*sizeof(dma_addr_t),
- DRM_MEM_PAGES);
-
- nvbe->pages_populated = d = 0;
- for (p = 0; p < num_pages; p++) {
- for (o = 0; o < PAGE_SIZE; o += NV_CTXDMA_PAGE_SIZE) {
- struct page *page = pages[p];
- if (!page)
- page = dummy_read_page;
- nvbe->pagelist[d] = pci_map_page(nvbe->dev->pdev,
- page, o,
- NV_CTXDMA_PAGE_SIZE,
- PCI_DMA_BIDIRECTIONAL);
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))
- if (pci_dma_mapping_error(nvbe->dev->pdev, nvbe->pagelist[d])) {
-#else
- if (pci_dma_mapping_error(nvbe->pagelist[d])) {
-#endif
- be->func->clear(be);
- DRM_ERROR("pci_map_page failed\n");
- return -EINVAL;
- }
- nvbe->pages_populated = ++d;
- }
- }
-
- return 0;
-}
-
-static void
-nouveau_sgdma_clear(struct drm_ttm_backend *be)
-{
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
- int d;
-
- DRM_DEBUG("\n");
-
- if (nvbe && nvbe->pagelist) {
- if (nvbe->is_bound)
- be->func->unbind(be);
-
- for (d = 0; d < nvbe->pages_populated; d++) {
- pci_unmap_page(nvbe->dev->pdev, nvbe->pagelist[d],
- NV_CTXDMA_PAGE_SIZE,
- PCI_DMA_BIDIRECTIONAL);
- }
- drm_free(nvbe->pagelist, nvbe->pages*sizeof(dma_addr_t),
- DRM_MEM_PAGES);
- }
-}
-
-static int
-nouveau_sgdma_bind(struct drm_ttm_backend *be, struct drm_bo_mem_reg *mem)
-{
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
- struct drm_nouveau_private *dev_priv = nvbe->dev->dev_private;
- struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
- uint64_t offset = (mem->mm_node->start << PAGE_SHIFT);
- uint32_t i;
-
- DRM_DEBUG("pg=0x%lx (0x%llx), cached=%d\n", mem->mm_node->start,
- offset, (mem->flags & DRM_BO_FLAG_CACHED) == 1);
-
- if (offset & NV_CTXDMA_PAGE_MASK)
- return -EINVAL;
- nvbe->pte_start = (offset >> NV_CTXDMA_PAGE_SHIFT);
- if (dev_priv->card_type < NV_50)
- nvbe->pte_start += 2; /* skip ctxdma header */
-
- for (i = nvbe->pte_start; i < nvbe->pte_start + nvbe->pages; i++) {
- uint64_t pteval = nvbe->pagelist[i - nvbe->pte_start];
-
- if (pteval & NV_CTXDMA_PAGE_MASK) {
- DRM_ERROR("Bad pteval 0x%llx\n", pteval);
- return -EINVAL;
- }
-
- if (dev_priv->card_type < NV_50) {
- INSTANCE_WR(gpuobj, i, pteval | 3);
- } else {
- INSTANCE_WR(gpuobj, (i<<1)+0, pteval | 0x21);
- INSTANCE_WR(gpuobj, (i<<1)+1, 0x00000000);
- }
- }
-
- nvbe->is_bound = 1;
- return 0;
-}
-
-static int
-nouveau_sgdma_unbind(struct drm_ttm_backend *be)
-{
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
- struct drm_nouveau_private *dev_priv = nvbe->dev->dev_private;
-
- DRM_DEBUG("\n");
-
- if (nvbe->is_bound) {
- struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
- unsigned int pte;
-
- pte = nvbe->pte_start;
- while (pte < (nvbe->pte_start + nvbe->pages)) {
- uint64_t pteval = dev_priv->gart_info.sg_dummy_bus;
-
- if (dev_priv->card_type < NV_50) {
- INSTANCE_WR(gpuobj, pte, pteval | 3);
- } else {
- INSTANCE_WR(gpuobj, (pte<<1)+0, pteval | 0x21);
- INSTANCE_WR(gpuobj, (pte<<1)+1, 0x00000000);
- }
-
- pte++;
- }
-
- nvbe->is_bound = 0;
- }
-
- return 0;
-}
-
-static void
-nouveau_sgdma_destroy(struct drm_ttm_backend *be)
-{
- DRM_DEBUG("\n");
- if (be) {
- struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
- if (nvbe) {
- if (nvbe->pagelist)
- be->func->clear(be);
- drm_ctl_free(nvbe, sizeof(*nvbe), DRM_MEM_TTM);
- }
- }
-}
-
-static struct drm_ttm_backend_func nouveau_sgdma_backend = {
- .needs_ub_cache_adjust = nouveau_sgdma_needs_ub_cache_adjust,
- .populate = nouveau_sgdma_populate,
- .clear = nouveau_sgdma_clear,
- .bind = nouveau_sgdma_bind,
- .unbind = nouveau_sgdma_unbind,
- .destroy = nouveau_sgdma_destroy
-};
-
-struct drm_ttm_backend *
-nouveau_sgdma_init_ttm(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_sgdma_be *nvbe;
-
- if (!dev_priv->gart_info.sg_ctxdma)
- return NULL;
-
- nvbe = drm_ctl_calloc(1, sizeof(*nvbe), DRM_MEM_TTM);
- if (!nvbe)
- return NULL;
-
- nvbe->dev = dev;
-
- nvbe->backend.func = &nouveau_sgdma_backend;
-
- return &nvbe->backend;
-}
-
-int
-nouveau_sgdma_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *gpuobj = NULL;
- uint32_t aper_size, obj_size;
- int i, ret;
-
- if (dev_priv->card_type < NV_50) {
- aper_size = (64 * 1024 * 1024);
- obj_size = (aper_size >> NV_CTXDMA_PAGE_SHIFT) * 4;
- obj_size += 8; /* ctxdma header */
- } else {
- /* 1 entire VM page table */
- aper_size = (512 * 1024 * 1024);
- obj_size = (aper_size >> NV_CTXDMA_PAGE_SHIFT) * 8;
- }
-
- if ((ret = nouveau_gpuobj_new(dev, NULL, obj_size, 16,
- NVOBJ_FLAG_ALLOW_NO_REFS |
- NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ZERO_FREE, &gpuobj))) {
- DRM_ERROR("Error creating sgdma object: %d\n", ret);
- return ret;
- }
-
- dev_priv->gart_info.sg_dummy_page =
- alloc_page(GFP_KERNEL|__GFP_DMA32);
- set_page_locked(dev_priv->gart_info.sg_dummy_page);
- dev_priv->gart_info.sg_dummy_bus =
- pci_map_page(dev->pdev, dev_priv->gart_info.sg_dummy_page, 0,
- PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
-
- if (dev_priv->card_type < NV_50) {
- /* Maybe use NV_DMA_TARGET_AGP for PCIE? NVIDIA do this, and
- * confirmed to work on c51. Perhaps means NV_DMA_TARGET_PCIE
- * on those cards? */
- INSTANCE_WR(gpuobj, 0, NV_CLASS_DMA_IN_MEMORY |
- (1 << 12) /* PT present */ |
- (0 << 13) /* PT *not* linear */ |
- (NV_DMA_ACCESS_RW << 14) |
- (NV_DMA_TARGET_PCI << 16));
- INSTANCE_WR(gpuobj, 1, aper_size - 1);
- for (i=2; i<2+(aper_size>>12); i++) {
- INSTANCE_WR(gpuobj, i,
- dev_priv->gart_info.sg_dummy_bus | 3);
- }
- } else {
- for (i=0; i<obj_size; i+=8) {
- INSTANCE_WR(gpuobj, (i+0)/4,
- dev_priv->gart_info.sg_dummy_bus | 0x21);
- INSTANCE_WR(gpuobj, (i+4)/4, 0);
- }
- }
-
- dev_priv->gart_info.type = NOUVEAU_GART_SGDMA;
- dev_priv->gart_info.aper_base = 0;
- dev_priv->gart_info.aper_size = aper_size;
- dev_priv->gart_info.sg_ctxdma = gpuobj;
- return 0;
-}
-
-void
-nouveau_sgdma_takedown(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- if (dev_priv->gart_info.sg_dummy_page) {
- pci_unmap_page(dev->pdev, dev_priv->gart_info.sg_dummy_bus,
- NV_CTXDMA_PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
- unlock_page(dev_priv->gart_info.sg_dummy_page);
- __free_page(dev_priv->gart_info.sg_dummy_page);
- dev_priv->gart_info.sg_dummy_page = NULL;
- dev_priv->gart_info.sg_dummy_bus = 0;
- }
-
- nouveau_gpuobj_del(dev, &dev_priv->gart_info.sg_ctxdma);
-}
-
-int
-nouveau_sgdma_nottm_hack_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_ttm_backend *be;
- struct drm_scatter_gather sgreq;
- struct drm_mm_node mm_node;
- struct drm_bo_mem_reg mem;
- int ret;
-
- dev_priv->gart_info.sg_be = nouveau_sgdma_init_ttm(dev);
- if (!dev_priv->gart_info.sg_be)
- return -ENOMEM;
- be = dev_priv->gart_info.sg_be;
-
- /* Hack the aperture size down to the amount of system memory
- * we're going to bind into it.
- */
- if (dev_priv->gart_info.aper_size > 32*1024*1024)
- dev_priv->gart_info.aper_size = 32*1024*1024;
-
- sgreq.size = dev_priv->gart_info.aper_size;
- if ((ret = drm_sg_alloc(dev, &sgreq))) {
- DRM_ERROR("drm_sg_alloc failed: %d\n", ret);
- return ret;
- }
- dev_priv->gart_info.sg_handle = sgreq.handle;
-
- if ((ret = be->func->populate(be, dev->sg->pages, dev->sg->pagelist, dev->bm.dummy_read_page))) {
- DRM_ERROR("failed populate: %d\n", ret);
- return ret;
- }
-
- mm_node.start = 0;
- mem.mm_node = &mm_node;
-
- if ((ret = be->func->bind(be, &mem))) {
- DRM_ERROR("failed bind: %d\n", ret);
- return ret;
- }
-
- return 0;
-}
-
-void
-nouveau_sgdma_nottm_hack_takedown(struct drm_device *dev)
-{
-}
-
-int
-nouveau_sgdma_get_page(struct drm_device *dev, uint32_t offset, uint32_t *page)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
- int pte;
-
- pte = (offset >> NV_CTXDMA_PAGE_SHIFT);
- if (dev_priv->card_type < NV_50) {
- *page = INSTANCE_RD(gpuobj, (pte + 2)) & ~NV_CTXDMA_PAGE_MASK;
- return 0;
- }
-
- DRM_ERROR("Unimplemented on NV50\n");
- return -EINVAL;
-}
+++ /dev/null
-../shared-core/nouveau_state.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_swmthd.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nouveau_swmthd.h
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_fb.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_fifo.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_instmem.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_mc.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv04_timer.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv10_fb.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv10_fifo.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv10_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv20_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv40_fb.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv40_fifo.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv40_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv40_mc.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_fifo.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_graph.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_grctx.h
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_instmem.c
\ No newline at end of file
+++ /dev/null
-../shared-core/nv50_mc.c
\ No newline at end of file
+++ /dev/null
-../shared-core/r128_cce.c
\ No newline at end of file
+++ /dev/null
-../shared-core/r128_drm.h
\ No newline at end of file
+++ /dev/null
-/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*-
- * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "r128_drm.h"
-#include "r128_drv.h"
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- r128_PCI_IDS
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
- DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED,
- .dev_priv_size = sizeof(drm_r128_buf_priv_t),
- .preclose = r128_driver_preclose,
- .lastclose = r128_driver_lastclose,
- .get_vblank_counter = r128_get_vblank_counter,
- .enable_vblank = r128_enable_vblank,
- .disable_vblank = r128_disable_vblank,
- .irq_preinstall = r128_driver_irq_preinstall,
- .irq_postinstall = r128_driver_irq_postinstall,
- .irq_uninstall = r128_driver_irq_uninstall,
- .irq_handler = r128_driver_irq_handler,
- .reclaim_buffers = drm_core_reclaim_buffers,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = r128_ioctls,
- .dma_ioctl = r128_cce_buffers,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
-#if defined(CONFIG_COMPAT)
- .compat_ioctl = r128_compat_ioctl,
-#endif
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-
-static int __init r128_init(void)
-{
- driver.num_ioctls = r128_max_ioctl;
-
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit r128_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(r128_init);
-module_exit(r128_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-../shared-core/r128_drv.h
\ No newline at end of file
+++ /dev/null
-/**
- * \file r128_ioc32.c
- *
- * 32-bit ioctl compatibility routines for the R128 DRM.
- *
- * \author Dave Airlie <airlied@linux.ie> with code from patches by Egbert Eich
- *
- * Copyright (C) Paul Mackerras 2005
- * Copyright (C) Egbert Eich 2003,2004
- * Copyright (C) Dave Airlie 2005
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-#include <linux/compat.h>
-
-#include "drmP.h"
-#include "drm.h"
-#include "r128_drm.h"
-
-typedef struct drm_r128_init32 {
- int func;
- unsigned int sarea_priv_offset;
- int is_pci;
- int cce_mode;
- int cce_secure;
- int ring_size;
- int usec_timeout;
-
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
- unsigned int span_offset;
-
- unsigned int fb_offset;
- unsigned int mmio_offset;
- unsigned int ring_offset;
- unsigned int ring_rptr_offset;
- unsigned int buffers_offset;
- unsigned int agp_textures_offset;
-} drm_r128_init32_t;
-
-static int compat_r128_init(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_r128_init32_t init32;
- drm_r128_init_t __user *init;
-
- if (copy_from_user(&init32, (void __user *)arg, sizeof(init32)))
- return -EFAULT;
-
- init = compat_alloc_user_space(sizeof(*init));
- if (!access_ok(VERIFY_WRITE, init, sizeof(*init))
- || __put_user(init32.func, &init->func)
- || __put_user(init32.sarea_priv_offset, &init->sarea_priv_offset)
- || __put_user(init32.is_pci, &init->is_pci)
- || __put_user(init32.cce_mode, &init->cce_mode)
- || __put_user(init32.cce_secure, &init->cce_secure)
- || __put_user(init32.ring_size, &init->ring_size)
- || __put_user(init32.usec_timeout, &init->usec_timeout)
- || __put_user(init32.fb_bpp, &init->fb_bpp)
- || __put_user(init32.front_offset, &init->front_offset)
- || __put_user(init32.front_pitch, &init->front_pitch)
- || __put_user(init32.back_offset, &init->back_offset)
- || __put_user(init32.back_pitch, &init->back_pitch)
- || __put_user(init32.depth_bpp, &init->depth_bpp)
- || __put_user(init32.depth_offset, &init->depth_offset)
- || __put_user(init32.depth_pitch, &init->depth_pitch)
- || __put_user(init32.span_offset, &init->span_offset)
- || __put_user(init32.fb_offset, &init->fb_offset)
- || __put_user(init32.mmio_offset, &init->mmio_offset)
- || __put_user(init32.ring_offset, &init->ring_offset)
- || __put_user(init32.ring_rptr_offset, &init->ring_rptr_offset)
- || __put_user(init32.buffers_offset, &init->buffers_offset)
- || __put_user(init32.agp_textures_offset,
- &init->agp_textures_offset))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_R128_INIT, (unsigned long)init);
-}
-
-
-typedef struct drm_r128_depth32 {
- int func;
- int n;
- u32 x;
- u32 y;
- u32 buffer;
- u32 mask;
-} drm_r128_depth32_t;
-
-static int compat_r128_depth(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_r128_depth32_t depth32;
- drm_r128_depth_t __user *depth;
-
- if (copy_from_user(&depth32, (void __user *)arg, sizeof(depth32)))
- return -EFAULT;
-
- depth = compat_alloc_user_space(sizeof(*depth));
- if (!access_ok(VERIFY_WRITE, depth, sizeof(*depth))
- || __put_user(depth32.func, &depth->func)
- || __put_user(depth32.n, &depth->n)
- || __put_user((int __user *)(unsigned long)depth32.x, &depth->x)
- || __put_user((int __user *)(unsigned long)depth32.y, &depth->y)
- || __put_user((unsigned int __user *)(unsigned long)depth32.buffer,
- &depth->buffer)
- || __put_user((unsigned char __user *)(unsigned long)depth32.mask,
- &depth->mask))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_R128_DEPTH, (unsigned long)depth);
-
-}
-
-typedef struct drm_r128_stipple32 {
- u32 mask;
-} drm_r128_stipple32_t;
-
-static int compat_r128_stipple(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_r128_stipple32_t stipple32;
- drm_r128_stipple_t __user *stipple;
-
- if (copy_from_user(&stipple32, (void __user *)arg, sizeof(stipple32)))
- return -EFAULT;
-
- stipple = compat_alloc_user_space(sizeof(*stipple));
- if (!access_ok(VERIFY_WRITE, stipple, sizeof(*stipple))
- || __put_user((unsigned int __user *)(unsigned long)stipple32.mask,
- &stipple->mask))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_R128_STIPPLE, (unsigned long)stipple);
-}
-
-typedef struct drm_r128_getparam32 {
- int param;
- u32 value;
-} drm_r128_getparam32_t;
-
-static int compat_r128_getparam(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_r128_getparam32_t getparam32;
- drm_r128_getparam_t __user *getparam;
-
- if (copy_from_user(&getparam32, (void __user *)arg, sizeof(getparam32)))
- return -EFAULT;
-
- getparam = compat_alloc_user_space(sizeof(*getparam));
- if (!access_ok(VERIFY_WRITE, getparam, sizeof(*getparam))
- || __put_user(getparam32.param, &getparam->param)
- || __put_user((void __user *)(unsigned long)getparam32.value,
- &getparam->value))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_R128_GETPARAM, (unsigned long)getparam);
-}
-
-drm_ioctl_compat_t *r128_compat_ioctls[] = {
- [DRM_R128_INIT] = compat_r128_init,
- [DRM_R128_DEPTH] = compat_r128_depth,
- [DRM_R128_STIPPLE] = compat_r128_stipple,
- [DRM_R128_GETPARAM] = compat_r128_getparam,
-};
-
-/**
- * Called whenever a 32-bit process running under a 64-bit kernel
- * performs an ioctl on /dev/dri/card<n>.
- *
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or negative number on failure.
- */
-long r128_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
-{
- unsigned int nr = DRM_IOCTL_NR(cmd);
- drm_ioctl_compat_t *fn = NULL;
- int ret;
-
- if (nr < DRM_COMMAND_BASE)
- return drm_compat_ioctl(filp, cmd, arg);
-
- if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(r128_compat_ioctls))
- fn = r128_compat_ioctls[nr - DRM_COMMAND_BASE];
-
- lock_kernel(); /* XXX for now */
- if (fn != NULL)
- ret = (*fn)(filp, cmd, arg);
- else
- ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
- unlock_kernel();
-
- return ret;
-}
+++ /dev/null
-../shared-core/r128_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/r128_state.c
\ No newline at end of file
+++ /dev/null
-../shared-core/r300_cmdbuf.c
\ No newline at end of file
+++ /dev/null
-../shared-core/r300_reg.h
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_cp.c
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_drm.h
\ No newline at end of file
+++ /dev/null
-/**
- * \file radeon_drv.c
- * ATI Radeon driver
- *
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "radeon_drm.h"
-#include "radeon_drv.h"
-
-#include "drm_pciids.h"
-
-int radeon_no_wb;
-
-MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers\n");
-module_param_named(no_wb, radeon_no_wb, int, 0444);
-
-static int dri_library_name(struct drm_device * dev, char * buf)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- int family = dev_priv->flags & RADEON_FAMILY_MASK;
-
- return snprintf(buf, PAGE_SIZE, "%s\n",
- (family < CHIP_R200) ? "radeon" :
- ((family < CHIP_R300) ? "r200" :
- "r300"));
-}
-
-static int radeon_suspend(struct drm_device *dev, pm_message_t state)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- /* Disable *all* interrupts */
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
- RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
- RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
- return 0;
-}
-
-static int radeon_resume(struct drm_device *dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- /* Restore interrupt registers */
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
- RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
- RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
- return 0;
-}
-
-static struct pci_device_id pciidlist[] = {
- radeon_PCI_IDS
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
- DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
- .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
- .load = radeon_driver_load,
- .firstopen = radeon_driver_firstopen,
- .open = radeon_driver_open,
- .preclose = radeon_driver_preclose,
- .postclose = radeon_driver_postclose,
- .lastclose = radeon_driver_lastclose,
- .unload = radeon_driver_unload,
- .suspend = radeon_suspend,
- .resume = radeon_resume,
- .get_vblank_counter = radeon_get_vblank_counter,
- .enable_vblank = radeon_enable_vblank,
- .disable_vblank = radeon_disable_vblank,
- .dri_library_name = dri_library_name,
- .irq_preinstall = radeon_driver_irq_preinstall,
- .irq_postinstall = radeon_driver_irq_postinstall,
- .irq_uninstall = radeon_driver_irq_uninstall,
- .irq_handler = radeon_driver_irq_handler,
- .reclaim_buffers = drm_core_reclaim_buffers,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = radeon_ioctls,
- .dma_ioctl = radeon_cp_buffers,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
-#if defined(CONFIG_COMPAT)
- .compat_ioctl = radeon_compat_ioctl,
-#endif
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-static int __init radeon_init(void)
-{
- driver.num_ioctls = radeon_max_ioctl;
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit radeon_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(radeon_init);
-module_exit(radeon_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-../shared-core/radeon_drv.h
\ No newline at end of file
+++ /dev/null
-/**
- * \file radeon_ioc32.c
- *
- * 32-bit ioctl compatibility routines for the Radeon DRM.
- *
- * \author Paul Mackerras <paulus@samba.org>
- *
- * Copyright (C) Paul Mackerras 2005
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-#include <linux/compat.h>
-
-#include "drmP.h"
-#include "drm.h"
-#include "radeon_drm.h"
-#include "radeon_drv.h"
-
-typedef struct drm_radeon_init32 {
- int func;
- u32 sarea_priv_offset;
- int is_pci;
- int cp_mode;
- int gart_size;
- int ring_size;
- int usec_timeout;
-
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
-
- u32 fb_offset;
- u32 mmio_offset;
- u32 ring_offset;
- u32 ring_rptr_offset;
- u32 buffers_offset;
- u32 gart_textures_offset;
-} drm_radeon_init32_t;
-
-static int compat_radeon_cp_init(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_init32_t init32;
- drm_radeon_init_t __user *init;
-
- if (copy_from_user(&init32, (void __user *)arg, sizeof(init32)))
- return -EFAULT;
-
- init = compat_alloc_user_space(sizeof(*init));
- if (!access_ok(VERIFY_WRITE, init, sizeof(*init))
- || __put_user(init32.func, &init->func)
- || __put_user(init32.sarea_priv_offset, &init->sarea_priv_offset)
- || __put_user(init32.is_pci, &init->is_pci)
- || __put_user(init32.cp_mode, &init->cp_mode)
- || __put_user(init32.gart_size, &init->gart_size)
- || __put_user(init32.ring_size, &init->ring_size)
- || __put_user(init32.usec_timeout, &init->usec_timeout)
- || __put_user(init32.fb_bpp, &init->fb_bpp)
- || __put_user(init32.front_offset, &init->front_offset)
- || __put_user(init32.front_pitch, &init->front_pitch)
- || __put_user(init32.back_offset, &init->back_offset)
- || __put_user(init32.back_pitch, &init->back_pitch)
- || __put_user(init32.depth_bpp, &init->depth_bpp)
- || __put_user(init32.depth_offset, &init->depth_offset)
- || __put_user(init32.depth_pitch, &init->depth_pitch)
- || __put_user(init32.fb_offset, &init->fb_offset)
- || __put_user(init32.mmio_offset, &init->mmio_offset)
- || __put_user(init32.ring_offset, &init->ring_offset)
- || __put_user(init32.ring_rptr_offset, &init->ring_rptr_offset)
- || __put_user(init32.buffers_offset, &init->buffers_offset)
- || __put_user(init32.gart_textures_offset,
- &init->gart_textures_offset))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_CP_INIT, (unsigned long) init);
-}
-
-typedef struct drm_radeon_clear32 {
- unsigned int flags;
- unsigned int clear_color;
- unsigned int clear_depth;
- unsigned int color_mask;
- unsigned int depth_mask; /* misnamed field: should be stencil */
- u32 depth_boxes;
-} drm_radeon_clear32_t;
-
-static int compat_radeon_cp_clear(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_clear32_t clr32;
- drm_radeon_clear_t __user *clr;
-
- if (copy_from_user(&clr32, (void __user *)arg, sizeof(clr32)))
- return -EFAULT;
-
- clr = compat_alloc_user_space(sizeof(*clr));
- if (!access_ok(VERIFY_WRITE, clr, sizeof(*clr))
- || __put_user(clr32.flags, &clr->flags)
- || __put_user(clr32.clear_color, &clr->clear_color)
- || __put_user(clr32.clear_depth, &clr->clear_depth)
- || __put_user(clr32.color_mask, &clr->color_mask)
- || __put_user(clr32.depth_mask, &clr->depth_mask)
- || __put_user((void __user *)(unsigned long)clr32.depth_boxes,
- &clr->depth_boxes))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_CLEAR, (unsigned long) clr);
-}
-
-typedef struct drm_radeon_stipple32 {
- u32 mask;
-} drm_radeon_stipple32_t;
-
-static int compat_radeon_cp_stipple(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_stipple32_t __user *argp = (void __user *)arg;
- drm_radeon_stipple_t __user *request;
- u32 mask;
-
- if (get_user(mask, &argp->mask))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user((unsigned int __user *)(unsigned long) mask,
- &request->mask))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_STIPPLE, (unsigned long) request);
-}
-
-typedef struct drm_radeon_tex_image32 {
- unsigned int x, y; /* Blit coordinates */
- unsigned int width, height;
- u32 data;
-} drm_radeon_tex_image32_t;
-
-typedef struct drm_radeon_texture32 {
- unsigned int offset;
- int pitch;
- int format;
- int width; /* Texture image coordinates */
- int height;
- u32 image;
-} drm_radeon_texture32_t;
-
-static int compat_radeon_cp_texture(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_texture32_t req32;
- drm_radeon_texture_t __user *request;
- drm_radeon_tex_image32_t img32;
- drm_radeon_tex_image_t __user *image;
-
- if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
- return -EFAULT;
- if (req32.image == 0)
- return -EINVAL;
- if (copy_from_user(&img32, (void __user *)(unsigned long)req32.image,
- sizeof(img32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request) + sizeof(*image));
- if (!access_ok(VERIFY_WRITE, request,
- sizeof(*request) + sizeof(*image)))
- return -EFAULT;
- image = (drm_radeon_tex_image_t __user *) (request + 1);
-
- if (__put_user(req32.offset, &request->offset)
- || __put_user(req32.pitch, &request->pitch)
- || __put_user(req32.format, &request->format)
- || __put_user(req32.width, &request->width)
- || __put_user(req32.height, &request->height)
- || __put_user(image, &request->image)
- || __put_user(img32.x, &image->x)
- || __put_user(img32.y, &image->y)
- || __put_user(img32.width, &image->width)
- || __put_user(img32.height, &image->height)
- || __put_user((const void __user *)(unsigned long)img32.data,
- &image->data))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_TEXTURE, (unsigned long) request);
-}
-
-typedef struct drm_radeon_vertex2_32 {
- int idx; /* Index of vertex buffer */
- int discard; /* Client finished with buffer? */
- int nr_states;
- u32 state;
- int nr_prims;
- u32 prim;
-} drm_radeon_vertex2_32_t;
-
-static int compat_radeon_cp_vertex2(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_vertex2_32_t req32;
- drm_radeon_vertex2_t __user *request;
-
- if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user(req32.idx, &request->idx)
- || __put_user(req32.discard, &request->discard)
- || __put_user(req32.nr_states, &request->nr_states)
- || __put_user((void __user *)(unsigned long)req32.state,
- &request->state)
- || __put_user(req32.nr_prims, &request->nr_prims)
- || __put_user((void __user *)(unsigned long)req32.prim,
- &request->prim))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_VERTEX2, (unsigned long) request);
-}
-
-typedef struct drm_radeon_cmd_buffer32 {
- int bufsz;
- u32 buf;
- int nbox;
- u32 boxes;
-} drm_radeon_cmd_buffer32_t;
-
-static int compat_radeon_cp_cmdbuf(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_cmd_buffer32_t req32;
- drm_radeon_cmd_buffer_t __user *request;
-
- if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user(req32.bufsz, &request->bufsz)
- || __put_user((void __user *)(unsigned long)req32.buf,
- &request->buf)
- || __put_user(req32.nbox, &request->nbox)
- || __put_user((void __user *)(unsigned long)req32.boxes,
- &request->boxes))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_CMDBUF, (unsigned long) request);
-}
-
-typedef struct drm_radeon_getparam32 {
- int param;
- u32 value;
-} drm_radeon_getparam32_t;
-
-static int compat_radeon_cp_getparam(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_getparam32_t req32;
- drm_radeon_getparam_t __user *request;
-
- if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user(req32.param, &request->param)
- || __put_user((void __user *)(unsigned long)req32.value,
- &request->value))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_GETPARAM, (unsigned long) request);
-}
-
-typedef struct drm_radeon_mem_alloc32 {
- int region;
- int alignment;
- int size;
- u32 region_offset; /* offset from start of fb or GART */
-} drm_radeon_mem_alloc32_t;
-
-static int compat_radeon_mem_alloc(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_mem_alloc32_t req32;
- drm_radeon_mem_alloc_t __user *request;
-
- if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user(req32.region, &request->region)
- || __put_user(req32.alignment, &request->alignment)
- || __put_user(req32.size, &request->size)
- || __put_user((int __user *)(unsigned long)req32.region_offset,
- &request->region_offset))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_ALLOC, (unsigned long) request);
-}
-
-typedef struct drm_radeon_irq_emit32 {
- u32 irq_seq;
-} drm_radeon_irq_emit32_t;
-
-static int compat_radeon_irq_emit(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_irq_emit32_t req32;
- drm_radeon_irq_emit_t __user *request;
-
- if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user((int __user *)(unsigned long)req32.irq_seq,
- &request->irq_seq))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_IRQ_EMIT, (unsigned long) request);
-}
-
-/* The two 64-bit arches where alignof(u64)==4 in 32-bit code */
-#if defined (CONFIG_X86_64) || defined(CONFIG_IA64)
-typedef struct drm_radeon_setparam32 {
- int param;
- u64 value;
-} __attribute__((packed)) drm_radeon_setparam32_t;
-
-static int compat_radeon_cp_setparam(struct file *file, unsigned int cmd,
- unsigned long arg)
-{
- drm_radeon_setparam32_t req32;
- drm_radeon_setparam_t __user *request;
-
- if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
- return -EFAULT;
-
- request = compat_alloc_user_space(sizeof(*request));
- if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
- || __put_user(req32.param, &request->param)
- || __put_user((void __user *)(unsigned long)req32.value,
- &request->value))
- return -EFAULT;
-
- return drm_ioctl(file->f_dentry->d_inode, file,
- DRM_IOCTL_RADEON_SETPARAM, (unsigned long) request);
-}
-#else
-#define compat_radeon_cp_setparam NULL
-#endif /* X86_64 || IA64 */
-
-drm_ioctl_compat_t *radeon_compat_ioctls[] = {
- [DRM_RADEON_CP_INIT] = compat_radeon_cp_init,
- [DRM_RADEON_CLEAR] = compat_radeon_cp_clear,
- [DRM_RADEON_STIPPLE] = compat_radeon_cp_stipple,
- [DRM_RADEON_TEXTURE] = compat_radeon_cp_texture,
- [DRM_RADEON_VERTEX2] = compat_radeon_cp_vertex2,
- [DRM_RADEON_CMDBUF] = compat_radeon_cp_cmdbuf,
- [DRM_RADEON_GETPARAM] = compat_radeon_cp_getparam,
- [DRM_RADEON_SETPARAM] = compat_radeon_cp_setparam,
- [DRM_RADEON_ALLOC] = compat_radeon_mem_alloc,
- [DRM_RADEON_IRQ_EMIT] = compat_radeon_irq_emit,
-};
-
-/**
- * Called whenever a 32-bit process running under a 64-bit kernel
- * performs an ioctl on /dev/dri/card<n>.
- *
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or negative number on failure.
- */
-long radeon_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
-{
- unsigned int nr = DRM_IOCTL_NR(cmd);
- drm_ioctl_compat_t *fn = NULL;
- int ret;
-
- if (nr < DRM_COMMAND_BASE)
- return drm_compat_ioctl(filp, cmd, arg);
-
- if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(radeon_compat_ioctls))
- fn = radeon_compat_ioctls[nr - DRM_COMMAND_BASE];
-
- lock_kernel(); /* XXX for now */
- if (fn != NULL)
- ret = (*fn)(filp, cmd, arg);
- else
- ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
- unlock_kernel();
-
- return ret;
-}
+++ /dev/null
-../shared-core/radeon_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_mem.c
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_microcode.h
\ No newline at end of file
+++ /dev/null
-../shared-core/radeon_state.c
\ No newline at end of file
+++ /dev/null
-../shared-core/savage_bci.c
\ No newline at end of file
+++ /dev/null
-../shared-core/savage_drm.h
\ No newline at end of file
+++ /dev/null
-/* savage_drv.c -- Savage driver for Linux
- *
- * Copyright 2004 Felix Kuehling
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
- * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "savage_drm.h"
-#include "savage_drv.h"
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- savage_PCI_IDS
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR |
- DRIVER_HAVE_DMA | DRIVER_PCI_DMA,
- .dev_priv_size = sizeof(drm_savage_buf_priv_t),
- .load = savage_driver_load,
- .firstopen = savage_driver_firstopen,
- .lastclose = savage_driver_lastclose,
- .unload = savage_driver_unload,
- .reclaim_buffers = savage_reclaim_buffers,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = savage_ioctls,
- .dma_ioctl = savage_bci_buffers,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-static int __init savage_init(void)
-{
- driver.num_ioctls = savage_max_ioctl;
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit savage_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(savage_init);
-module_exit(savage_exit);
-
-MODULE_AUTHOR( DRIVER_AUTHOR );
-MODULE_DESCRIPTION( DRIVER_DESC );
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-../shared-core/savage_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/savage_state.c
\ No newline at end of file
+++ /dev/null
-../shared-core/sis_drm.h
\ No newline at end of file
+++ /dev/null
-/* sis.c -- sis driver -*- linux-c -*-
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "sis_drm.h"
-#include "sis_drv.h"
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- sis_PCI_IDS
-};
-
-
-static int sis_driver_load(struct drm_device *dev, unsigned long chipset)
-{
- drm_sis_private_t *dev_priv;
- int ret;
-
- dev_priv = drm_calloc(1, sizeof(drm_sis_private_t), DRM_MEM_DRIVER);
- if (dev_priv == NULL)
- return -ENOMEM;
-
- dev->dev_private = (void *)dev_priv;
- dev_priv->chipset = chipset;
- ret = drm_sman_init(&dev_priv->sman, 2, 12, 8);
- if (ret) {
- drm_free(dev_priv, sizeof(dev_priv), DRM_MEM_DRIVER);
- }
-
- return ret;
-}
-
-static int sis_driver_unload(struct drm_device *dev)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
-
- drm_sman_takedown(&dev_priv->sman);
- drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);
-
- return 0;
-}
-
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR,
- .load = sis_driver_load,
- .unload = sis_driver_unload,
- .context_dtor = NULL,
- .dma_quiescent = sis_idle,
- .reclaim_buffers = NULL,
- .reclaim_buffers_idlelocked = sis_reclaim_buffers_locked,
- .lastclose = sis_lastclose,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = sis_ioctls,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-static int __init sis_init(void)
-{
- driver.num_ioctls = sis_max_ioctl;
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit sis_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(sis_init);
-module_exit(sis_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-../shared-core/sis_drv.h
\ No newline at end of file
+++ /dev/null
-/**************************************************************************
- *
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- *
- **************************************************************************/
-
-/*
- * Authors:
- * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#include "drmP.h"
-#include "sis_drm.h"
-#include "sis_drv.h"
-
-#if defined(__linux__)
-#include <video/sisfb.h>
-#endif
-
-#define VIDEO_TYPE 0
-#define AGP_TYPE 1
-
-#define SIS_MM_ALIGN_SHIFT 4
-#define SIS_MM_ALIGN_MASK ( (1 << SIS_MM_ALIGN_SHIFT) - 1)
-
-#if defined(__linux__) && defined(CONFIG_FB_SIS)
-/* fb management via fb device */
-
-#define SIS_MM_ALIGN_SHIFT 0
-#define SIS_MM_ALIGN_MASK 0
-
-static void *sis_sman_mm_allocate(void *private, unsigned long size,
- unsigned alignment)
-{
- struct sis_memreq req;
-
- req.size = size;
- sis_malloc(&req);
- if (req.size == 0)
- return NULL;
- else
- return (void *)~req.offset;
-}
-
-static void sis_sman_mm_free(void *private, void *ref)
-{
- sis_free(~((unsigned long)ref));
-}
-
-static void sis_sman_mm_destroy(void *private)
-{
- ;
-}
-
-static unsigned long sis_sman_mm_offset(void *private, void *ref)
-{
- return ~((unsigned long)ref);
-}
-
-#endif
-
-static int sis_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_fb_t *fb = data;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
-#if defined(__linux__) && defined(CONFIG_FB_SIS)
- {
- struct drm_sman_mm sman_mm;
- sman_mm.private = (void *)0xFFFFFFFF;
- sman_mm.allocate = sis_sman_mm_allocate;
- sman_mm.free = sis_sman_mm_free;
- sman_mm.destroy = sis_sman_mm_destroy;
- sman_mm.offset = sis_sman_mm_offset;
- ret =
- drm_sman_set_manager(&dev_priv->sman, VIDEO_TYPE, &sman_mm);
- }
-#else
- ret = drm_sman_set_range(&dev_priv->sman, VIDEO_TYPE, 0,
- fb->size >> SIS_MM_ALIGN_SHIFT);
-#endif
-
- if (ret) {
- DRM_ERROR("VRAM memory manager initialisation error\n");
- mutex_unlock(&dev->struct_mutex);
- return ret;
- }
-
- dev_priv->vram_initialized = 1;
- dev_priv->vram_offset = fb->offset;
-
- mutex_unlock(&dev->struct_mutex);
- DRM_DEBUG("offset = %u, size = %u\n", fb->offset, fb->size);
-
- return 0;
-}
-
-static int sis_drm_alloc(struct drm_device *dev, struct drm_file *file_priv,
- void *data, int pool)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_mem_t *mem = data;
- int retval = 0;
- struct drm_memblock_item *item;
-
- mutex_lock(&dev->struct_mutex);
-
- if (0 == ((pool == 0) ? dev_priv->vram_initialized :
- dev_priv->agp_initialized)) {
- DRM_ERROR
- ("Attempt to allocate from uninitialized memory manager.\n");
- mutex_unlock(&dev->struct_mutex);
- return -EINVAL;
- }
-
- mem->size = (mem->size + SIS_MM_ALIGN_MASK) >> SIS_MM_ALIGN_SHIFT;
- item = drm_sman_alloc(&dev_priv->sman, pool, mem->size, 0,
- (unsigned long)file_priv);
-
- mutex_unlock(&dev->struct_mutex);
- if (item) {
- mem->offset = ((pool == 0) ?
- dev_priv->vram_offset : dev_priv->agp_offset) +
- (item->mm->
- offset(item->mm, item->mm_info) << SIS_MM_ALIGN_SHIFT);
- mem->free = item->user_hash.key;
- mem->size = mem->size << SIS_MM_ALIGN_SHIFT;
- } else {
- mem->offset = 0;
- mem->size = 0;
- mem->free = 0;
- retval = -ENOMEM;
- }
-
- DRM_DEBUG("alloc %d, size = %d, offset = %d\n", pool, mem->size,
- mem->offset);
-
- return retval;
-}
-
-static int sis_drm_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_mem_t *mem = data;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm_sman_free_key(&dev_priv->sman, mem->free);
- mutex_unlock(&dev->struct_mutex);
- DRM_DEBUG("free = 0x%lx\n", mem->free);
-
- return ret;
-}
-
-static int sis_fb_alloc(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- return sis_drm_alloc(dev, file_priv, data, VIDEO_TYPE);
-}
-
-static int sis_ioctl_agp_init(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_agp_t *agp = data;
- int ret;
- dev_priv = dev->dev_private;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm_sman_set_range(&dev_priv->sman, AGP_TYPE, 0,
- agp->size >> SIS_MM_ALIGN_SHIFT);
-
- if (ret) {
- DRM_ERROR("AGP memory manager initialisation error\n");
- mutex_unlock(&dev->struct_mutex);
- return ret;
- }
-
- dev_priv->agp_initialized = 1;
- dev_priv->agp_offset = agp->offset;
- mutex_unlock(&dev->struct_mutex);
-
- DRM_DEBUG("offset = %u, size = %u\n", agp->offset, agp->size);
- return 0;
-}
-
-static int sis_ioctl_agp_alloc(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
-
- return sis_drm_alloc(dev, file_priv, data, AGP_TYPE);
-}
-
-static drm_local_map_t *sis_reg_init(struct drm_device *dev)
-{
- struct drm_map_list *entry;
- drm_local_map_t *map;
-
- list_for_each_entry(entry, &dev->maplist, head) {
- map = entry->map;
- if (!map)
- continue;
- if (map->type == _DRM_REGISTERS) {
- return map;
- }
- }
- return NULL;
-}
-
-int sis_idle(struct drm_device *dev)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- uint32_t idle_reg;
- unsigned long end;
- int i;
-
- if (dev_priv->idle_fault)
- return 0;
-
- if (dev_priv->mmio == NULL) {
- dev_priv->mmio = sis_reg_init(dev);
- if (dev_priv->mmio == NULL) {
- DRM_ERROR("Could not find register map.\n");
- return 0;
- }
- }
-
- /*
- * Implement a device switch here if needed
- */
-
- if (dev_priv->chipset != SIS_CHIP_315)
- return 0;
-
- /*
- * Timeout after 3 seconds. We cannot use DRM_WAIT_ON here
- * because its polling frequency is too low.
- */
-
- end = jiffies + (DRM_HZ * 3);
-
- for (i=0; i<4; ++i) {
- do {
- idle_reg = SIS_READ(0x85cc);
- } while ( !time_after_eq(jiffies, end) &&
- ((idle_reg & 0x80000000) != 0x80000000));
- }
-
- if (time_after_eq(jiffies, end)) {
- DRM_ERROR("Graphics engine idle timeout. "
- "Disabling idle check\n");
- dev_priv->idle_fault = 1;
- }
-
- /*
- * The caller never sees an error code. It gets trapped
- * in libdrm.
- */
-
- return 0;
-}
-
-
-void sis_lastclose(struct drm_device *dev)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
-
- if (!dev_priv)
- return;
-
- mutex_lock(&dev->struct_mutex);
- drm_sman_cleanup(&dev_priv->sman);
- dev_priv->vram_initialized = 0;
- dev_priv->agp_initialized = 0;
- dev_priv->mmio = NULL;
- mutex_unlock(&dev->struct_mutex);
-}
-
-void sis_reclaim_buffers_locked(struct drm_device * dev,
- struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
-
- mutex_lock(&dev->struct_mutex);
- if (drm_sman_owner_clean(&dev_priv->sman, (unsigned long)file_priv)) {
- mutex_unlock(&dev->struct_mutex);
- return;
- }
-
- if (dev->driver->dma_quiescent) {
- dev->driver->dma_quiescent(dev);
- }
-
- drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv);
- mutex_unlock(&dev->struct_mutex);
- return;
-}
-
-struct drm_ioctl_desc sis_ioctls[] = {
- DRM_IOCTL_DEF(DRM_SIS_FB_ALLOC, sis_fb_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SIS_FB_FREE, sis_drm_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SIS_AGP_INIT, sis_ioctl_agp_init, DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_SIS_AGP_ALLOC, sis_ioctl_agp_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SIS_AGP_FREE, sis_drm_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SIS_FB_INIT, sis_fb_init, DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
-};
-
-int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls);
+++ /dev/null
-/* tdfx_drv.c -- tdfx driver -*- linux-c -*-
- * Created: Thu Oct 7 10:38:32 1999 by faith@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Daryll Strauss <daryll@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "tdfx_drv.h"
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- tdfx_PCI_IDS
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features = DRIVER_USE_MTRR,
- .reclaim_buffers = drm_core_reclaim_buffers,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-
-static int __init tdfx_init(void)
-{
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit tdfx_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(tdfx_init);
-module_exit(tdfx_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-../shared-core/tdfx_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_3d_reg.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_dma.c
\ No newline at end of file
+++ /dev/null
-/* via_dmablit.c -- PCI DMA BitBlt support for the VIA Unichrome/Pro
- *
- * Copyright (C) 2005 Thomas Hellstrom, All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Thomas Hellstrom.
- * Partially based on code obtained from Digeo Inc.
- */
-
-
-/*
- * Unmaps the DMA mappings.
- * FIXME: Is this a NoOp on x86? Also
- * FIXME: What happens if this one is called and a pending blit has previously done
- * the same DMA mappings?
- */
-
-#include "drmP.h"
-#include "via_drm.h"
-#include "via_drv.h"
-#include "via_dmablit.h"
-
-#include <linux/pagemap.h>
-
-#define VIA_PGDN(x) (((unsigned long)(x)) & PAGE_MASK)
-#define VIA_PGOFF(x) (((unsigned long)(x)) & ~PAGE_MASK)
-#define VIA_PFN(x) ((unsigned long)(x) >> PAGE_SHIFT)
-
-typedef struct _drm_via_descriptor {
- uint32_t mem_addr;
- uint32_t dev_addr;
- uint32_t size;
- uint32_t next;
-} drm_via_descriptor_t;
-
-
-/*
- * Unmap a DMA mapping.
- */
-
-
-
-static void
-via_unmap_blit_from_device(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
-{
- int num_desc = vsg->num_desc;
- unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page;
- unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page;
- drm_via_descriptor_t *desc_ptr = vsg->desc_pages[cur_descriptor_page] +
- descriptor_this_page;
- dma_addr_t next = vsg->chain_start;
-
- while(num_desc--) {
- if (descriptor_this_page-- == 0) {
- cur_descriptor_page--;
- descriptor_this_page = vsg->descriptors_per_page - 1;
- desc_ptr = vsg->desc_pages[cur_descriptor_page] +
- descriptor_this_page;
- }
- dma_unmap_single(&pdev->dev, next, sizeof(*desc_ptr), DMA_TO_DEVICE);
- dma_unmap_page(&pdev->dev, desc_ptr->mem_addr, desc_ptr->size, vsg->direction);
- next = (dma_addr_t) desc_ptr->next;
- desc_ptr--;
- }
-}
-
-/*
- * If mode = 0, count how many descriptors are needed.
- * If mode = 1, Map the DMA pages for the device, put together and map also the descriptors.
- * Descriptors are run in reverse order by the hardware because we are not allowed to update the
- * 'next' field without syncing calls when the descriptor is already mapped.
- */
-
-static void
-via_map_blit_for_device(struct pci_dev *pdev,
- const drm_via_dmablit_t *xfer,
- drm_via_sg_info_t *vsg,
- int mode)
-{
- unsigned cur_descriptor_page = 0;
- unsigned num_descriptors_this_page = 0;
- unsigned char *mem_addr = xfer->mem_addr;
- unsigned char *cur_mem;
- unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr);
- uint32_t fb_addr = xfer->fb_addr;
- uint32_t cur_fb;
- unsigned long line_len;
- unsigned remaining_len;
- int num_desc = 0;
- int cur_line;
- dma_addr_t next = 0 | VIA_DMA_DPR_EC;
- drm_via_descriptor_t *desc_ptr = NULL;
-
- if (mode == 1)
- desc_ptr = vsg->desc_pages[cur_descriptor_page];
-
- for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) {
-
- line_len = xfer->line_length;
- cur_fb = fb_addr;
- cur_mem = mem_addr;
-
- while (line_len > 0) {
-
- remaining_len = min(PAGE_SIZE-VIA_PGOFF(cur_mem), line_len);
- line_len -= remaining_len;
-
- if (mode == 1) {
- desc_ptr->mem_addr = dma_map_page(&pdev->dev,
- vsg->pages[VIA_PFN(cur_mem) -
- VIA_PFN(first_addr)],
- VIA_PGOFF(cur_mem), remaining_len,
- vsg->direction);
- desc_ptr->dev_addr = cur_fb;
-
- desc_ptr->size = remaining_len;
- desc_ptr->next = (uint32_t) next;
- next = dma_map_single(&pdev->dev, desc_ptr, sizeof(*desc_ptr),
- DMA_TO_DEVICE);
- desc_ptr++;
- if (++num_descriptors_this_page >= vsg->descriptors_per_page) {
- num_descriptors_this_page = 0;
- desc_ptr = vsg->desc_pages[++cur_descriptor_page];
- }
- }
-
- num_desc++;
- cur_mem += remaining_len;
- cur_fb += remaining_len;
- }
-
- mem_addr += xfer->mem_stride;
- fb_addr += xfer->fb_stride;
- }
-
- if (mode == 1) {
- vsg->chain_start = next;
- vsg->state = dr_via_device_mapped;
- }
- vsg->num_desc = num_desc;
-}
-
-/*
- * Function that frees up all resources for a blit. It is usable even if the
- * blit info has only been partially built as long as the status enum is consistent
- * with the actual status of the used resources.
- */
-
-
-static void
-via_free_sg_info(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
-{
- struct page *page;
- int i;
-
- switch(vsg->state) {
- case dr_via_device_mapped:
- via_unmap_blit_from_device(pdev, vsg);
- case dr_via_desc_pages_alloc:
- for (i=0; i<vsg->num_desc_pages; ++i) {
- if (vsg->desc_pages[i] != NULL)
- free_page((unsigned long)vsg->desc_pages[i]);
- }
- kfree(vsg->desc_pages);
- case dr_via_pages_locked:
- for (i=0; i<vsg->num_pages; ++i) {
- if ( NULL != (page = vsg->pages[i])) {
- if (! PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction))
- SetPageDirty(page);
- page_cache_release(page);
- }
- }
- case dr_via_pages_alloc:
- vfree(vsg->pages);
- default:
- vsg->state = dr_via_sg_init;
- }
- if (vsg->bounce_buffer) {
- vfree(vsg->bounce_buffer);
- vsg->bounce_buffer = NULL;
- }
- vsg->free_on_sequence = 0;
-}
-
-/*
- * Fire a blit engine.
- */
-
-static void
-via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
-
- VIA_WRITE(VIA_PCI_DMA_MAR0 + engine*0x10, 0);
- VIA_WRITE(VIA_PCI_DMA_DAR0 + engine*0x10, 0);
- VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD |
- VIA_DMA_CSR_DE);
- VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
- VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0);
- VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
- DRM_WRITEMEMORYBARRIER();
- VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
- VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04);
-}
-
-/*
- * Obtain a page pointer array and lock all pages into system memory. A segmentation violation will
- * occur here if the calling user does not have access to the submitted address.
- */
-
-static int
-via_lock_all_dma_pages(drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
-{
- int ret;
- unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
- vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride -1)) -
- first_pfn + 1;
-
- if (NULL == (vsg->pages = vmalloc(sizeof(struct page *) * vsg->num_pages)))
- return -ENOMEM;
- memset(vsg->pages, 0, sizeof(struct page *) * vsg->num_pages);
- down_read(¤t->mm->mmap_sem);
- ret = get_user_pages(current, current->mm,
- (unsigned long)xfer->mem_addr,
- vsg->num_pages,
- (vsg->direction == DMA_FROM_DEVICE),
- 0, vsg->pages, NULL);
-
- up_read(¤t->mm->mmap_sem);
- if (ret != vsg->num_pages) {
- if (ret < 0)
- return ret;
- vsg->state = dr_via_pages_locked;
- return -EINVAL;
- }
- vsg->state = dr_via_pages_locked;
- DRM_DEBUG("DMA pages locked\n");
- return 0;
-}
-
-/*
- * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the
- * pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be
- * quite large for some blits, and pages don't need to be contingous.
- */
-
-static int
-via_alloc_desc_pages(drm_via_sg_info_t *vsg)
-{
- int i;
-
- vsg->descriptors_per_page = PAGE_SIZE / sizeof( drm_via_descriptor_t);
- vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
- vsg->descriptors_per_page;
-
- if (NULL == (vsg->desc_pages = kmalloc(sizeof(void *) * vsg->num_desc_pages, GFP_KERNEL)))
- return -ENOMEM;
-
- memset(vsg->desc_pages, 0, sizeof(void *) * vsg->num_desc_pages);
- vsg->state = dr_via_desc_pages_alloc;
- for (i=0; i<vsg->num_desc_pages; ++i) {
- if (NULL == (vsg->desc_pages[i] =
- (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL)))
- return -ENOMEM;
- }
- DRM_DEBUG("Allocated %d pages for %d descriptors.\n", vsg->num_desc_pages,
- vsg->num_desc);
- return 0;
-}
-
-static void
-via_abort_dmablit(struct drm_device *dev, int engine)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
-
- VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA);
-}
-
-static void
-via_dmablit_engine_off(struct drm_device *dev, int engine)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
-
- VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD);
-}
-
-
-
-/*
- * The dmablit part of the IRQ handler. Trying to do only reasonably fast things here.
- * The rest, like unmapping and freeing memory for done blits is done in a separate workqueue
- * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while
- * the workqueue task takes care of processing associated with the old blit.
- */
-
-void
-via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
- drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
- int cur;
- int done_transfer;
- unsigned long irqsave=0;
- uint32_t status = 0;
-
- DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
- engine, from_irq, (unsigned long) blitq);
-
- if (from_irq) {
- spin_lock(&blitq->blit_lock);
- } else {
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- }
-
- done_transfer = blitq->is_active &&
- (( status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
- done_transfer = done_transfer || ( blitq->aborting && !(status & VIA_DMA_CSR_DE));
-
- cur = blitq->cur;
- if (done_transfer) {
-
- blitq->blits[cur]->aborted = blitq->aborting;
- blitq->done_blit_handle++;
- DRM_WAKEUP(blitq->blit_queue + cur);
-
- cur++;
- if (cur >= VIA_NUM_BLIT_SLOTS)
- cur = 0;
- blitq->cur = cur;
-
- /*
- * Clear transfer done flag.
- */
-
- VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD);
-
- blitq->is_active = 0;
- blitq->aborting = 0;
- schedule_work(&blitq->wq);
-
- } else if (blitq->is_active && time_after_eq(jiffies, blitq->end)) {
-
- /*
- * Abort transfer after one second.
- */
-
- via_abort_dmablit(dev, engine);
- blitq->aborting = 1;
- blitq->end = jiffies + DRM_HZ;
- }
-
- if (!blitq->is_active) {
- if (blitq->num_outstanding) {
- via_fire_dmablit(dev, blitq->blits[cur], engine);
- blitq->is_active = 1;
- blitq->cur = cur;
- blitq->num_outstanding--;
- blitq->end = jiffies + DRM_HZ;
- if (!timer_pending(&blitq->poll_timer)) {
- blitq->poll_timer.expires = jiffies+1;
- add_timer(&blitq->poll_timer);
- }
- } else {
- if (timer_pending(&blitq->poll_timer)) {
- del_timer(&blitq->poll_timer);
- }
- via_dmablit_engine_off(dev, engine);
- }
- }
-
- if (from_irq) {
- spin_unlock(&blitq->blit_lock);
- } else {
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
- }
-}
-
-
-
-/*
- * Check whether this blit is still active, performing necessary locking.
- */
-
-static int
-via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue)
-{
- unsigned long irqsave;
- uint32_t slot;
- int active;
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
-
- /*
- * Allow for handle wraparounds.
- */
-
- active = ((blitq->done_blit_handle - handle) > (1 << 23)) &&
- ((blitq->cur_blit_handle - handle) <= (1 << 23));
-
- if (queue && active) {
- slot = handle - blitq->done_blit_handle + blitq->cur -1;
- if (slot >= VIA_NUM_BLIT_SLOTS) {
- slot -= VIA_NUM_BLIT_SLOTS;
- }
- *queue = blitq->blit_queue + slot;
- }
-
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-
- return active;
-}
-
-/*
- * Sync. Wait for at least three seconds for the blit to be performed.
- */
-
-static int
-via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
-{
-
- drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
- drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
- wait_queue_head_t *queue;
- int ret = 0;
-
- if (via_dmablit_active(blitq, engine, handle, &queue)) {
- DRM_WAIT_ON(ret, *queue, 3 * DRM_HZ,
- !via_dmablit_active(blitq, engine, handle, NULL));
- }
- DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
- handle, engine, ret);
-
- return ret;
-}
-
-
-/*
- * A timer that regularly polls the blit engine in cases where we don't have interrupts:
- * a) Broken hardware (typically those that don't have any video capture facility).
- * b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted.
- * The timer and hardware IRQ's can and do work in parallel. If the hardware has
- * irqs, it will shorten the latency somewhat.
- */
-
-
-
-static void
-via_dmablit_timer(unsigned long data)
-{
- drm_via_blitq_t *blitq = (drm_via_blitq_t *) data;
- struct drm_device *dev = blitq->dev;
- int engine = (int)
- (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues);
-
- DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine,
- (unsigned long) jiffies);
-
- via_dmablit_handler(dev, engine, 0);
-
- if (!timer_pending(&blitq->poll_timer)) {
- blitq->poll_timer.expires = jiffies+1;
- add_timer(&blitq->poll_timer);
-
- /*
- * Rerun handler to delete timer if engines are off, and
- * to shorten abort latency. This is a little nasty.
- */
-
- via_dmablit_handler(dev, engine, 0);
- }
-}
-
-
-
-
-/*
- * Workqueue task that frees data and mappings associated with a blit.
- * Also wakes up waiting processes. Each of these tasks handles one
- * blit engine only and may not be called on each interrupt.
- */
-
-
-static void
-via_dmablit_workqueue(struct work_struct *work)
-{
- drm_via_blitq_t *blitq = container_of(work, drm_via_blitq_t, wq);
- struct drm_device *dev = blitq->dev;
- unsigned long irqsave;
- drm_via_sg_info_t *cur_sg;
- int cur_released;
-
-
- DRM_DEBUG("Workqueue task called for blit engine %ld\n",(unsigned long)
- (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
-
- while(blitq->serviced != blitq->cur) {
-
- cur_released = blitq->serviced++;
-
- DRM_DEBUG("Releasing blit slot %d\n", cur_released);
-
- if (blitq->serviced >= VIA_NUM_BLIT_SLOTS)
- blitq->serviced = 0;
-
- cur_sg = blitq->blits[cur_released];
- blitq->num_free++;
-
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-
- DRM_WAKEUP(&blitq->busy_queue);
-
- via_free_sg_info(dev->pdev, cur_sg);
- kfree(cur_sg);
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- }
-
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-}
-
-
-/*
- * Init all blit engines. Currently we use two, but some hardware have 4.
- */
-
-
-void
-via_init_dmablit(struct drm_device *dev)
-{
- int i,j;
- drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
- drm_via_blitq_t *blitq;
-
- pci_set_master(dev->pdev);
-
- for (i=0; i< VIA_NUM_BLIT_ENGINES; ++i) {
- blitq = dev_priv->blit_queues + i;
- blitq->dev = dev;
- blitq->cur_blit_handle = 0;
- blitq->done_blit_handle = 0;
- blitq->head = 0;
- blitq->cur = 0;
- blitq->serviced = 0;
- blitq->num_free = VIA_NUM_BLIT_SLOTS - 1;
- blitq->num_outstanding = 0;
- blitq->is_active = 0;
- blitq->aborting = 0;
- spin_lock_init(&blitq->blit_lock);
- for (j=0; j<VIA_NUM_BLIT_SLOTS; ++j) {
- DRM_INIT_WAITQUEUE(blitq->blit_queue + j);
- }
- DRM_INIT_WAITQUEUE(&blitq->busy_queue);
- INIT_WORK(&blitq->wq, via_dmablit_workqueue);
- init_timer(&blitq->poll_timer);
- blitq->poll_timer.function = &via_dmablit_timer;
- blitq->poll_timer.data = (unsigned long) blitq;
- }
-}
-
-/*
- * Build all info and do all mappings required for a blit.
- */
-
-
-static int
-via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
-{
- int draw = xfer->to_fb;
- int ret = 0;
-
- vsg->direction = (draw) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
- vsg->bounce_buffer = NULL;
-
- vsg->state = dr_via_sg_init;
-
- if (xfer->num_lines <= 0 || xfer->line_length <= 0) {
- DRM_ERROR("Zero size bitblt.\n");
- return -EINVAL;
- }
-
- /*
- * Below check is a driver limitation, not a hardware one. We
- * don't want to lock unused pages, and don't want to incoporate the
- * extra logic of avoiding them. Make sure there are no.
- * (Not a big limitation anyway.)
- */
-
- if ((xfer->mem_stride - xfer->line_length) > 2*PAGE_SIZE) {
- DRM_ERROR("Too large system memory stride. Stride: %d, "
- "Length: %d\n", xfer->mem_stride, xfer->line_length);
- return -EINVAL;
- }
-
- if ((xfer->mem_stride == xfer->line_length) &&
- (xfer->fb_stride == xfer->line_length)) {
- xfer->mem_stride *= xfer->num_lines;
- xfer->line_length = xfer->mem_stride;
- xfer->fb_stride = xfer->mem_stride;
- xfer->num_lines = 1;
- }
-
- /*
- * Don't lock an arbitrary large number of pages, since that causes a
- * DOS security hole.
- */
-
- if (xfer->num_lines > 2048 || (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) {
- DRM_ERROR("Too large PCI DMA bitblt.\n");
- return -EINVAL;
- }
-
- /*
- * we allow a negative fb stride to allow flipping of images in
- * transfer.
- */
-
- if (xfer->mem_stride < xfer->line_length ||
- abs(xfer->fb_stride) < xfer->line_length) {
- DRM_ERROR("Invalid frame-buffer / memory stride.\n");
- return -EINVAL;
- }
-
- /*
- * A hardware bug seems to be worked around if system memory addresses start on
- * 16 byte boundaries. This seems a bit restrictive however. VIA is contacted
- * about this. Meanwhile, impose the following restrictions:
- */
-
-#ifdef VIA_BUGFREE
- if ((((unsigned long)xfer->mem_addr & 3) != ((unsigned long)xfer->fb_addr & 3)) ||
- ((xfer->num_lines > 1) && ((xfer->mem_stride & 3) != (xfer->fb_stride & 3)))) {
- DRM_ERROR("Invalid DRM bitblt alignment.\n");
- return -EINVAL;
- }
-#else
- if ((((unsigned long)xfer->mem_addr & 15) || ((unsigned long)xfer->fb_addr & 3)) ||
- ((xfer->num_lines > 1) && ((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) {
- DRM_ERROR("Invalid DRM bitblt alignment.\n");
- return -EINVAL;
- }
-#endif
-
- if (0 != (ret = via_lock_all_dma_pages(vsg, xfer))) {
- DRM_ERROR("Could not lock DMA pages.\n");
- via_free_sg_info(dev->pdev, vsg);
- return ret;
- }
-
- via_map_blit_for_device(dev->pdev, xfer, vsg, 0);
- if (0 != (ret = via_alloc_desc_pages(vsg))) {
- DRM_ERROR("Could not allocate DMA descriptor pages.\n");
- via_free_sg_info(dev->pdev, vsg);
- return ret;
- }
- via_map_blit_for_device(dev->pdev, xfer, vsg, 1);
-
- return 0;
-}
-
-
-/*
- * Reserve one free slot in the blit queue. Will wait for one second for one
- * to become available. Otherwise -EBUSY is returned.
- */
-
-static int
-via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
-{
- int ret=0;
- unsigned long irqsave;
-
- DRM_DEBUG("Num free is %d\n", blitq->num_free);
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- while(blitq->num_free == 0) {
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-
- DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0);
- if (ret) {
- return (-EINTR == ret) ? -EAGAIN : ret;
- }
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- }
-
- blitq->num_free--;
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-
- return 0;
-}
-
-/*
- * Hand back a free slot if we changed our mind.
- */
-
-static void
-via_dmablit_release_slot(drm_via_blitq_t *blitq)
-{
- unsigned long irqsave;
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- blitq->num_free++;
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
- DRM_WAKEUP( &blitq->busy_queue );
-}
-
-/*
- * Grab a free slot. Build blit info and queue a blit.
- */
-
-
-static int
-via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
- drm_via_sg_info_t *vsg;
- drm_via_blitq_t *blitq;
- int ret;
- int engine;
- unsigned long irqsave;
-
- if (dev_priv == NULL) {
- DRM_ERROR("Called without initialization.\n");
- return -EINVAL;
- }
-
- engine = (xfer->to_fb) ? 0 : 1;
- blitq = dev_priv->blit_queues + engine;
- if (0 != (ret = via_dmablit_grab_slot(blitq, engine))) {
- return ret;
- }
- if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
- via_dmablit_release_slot(blitq);
- return -ENOMEM;
- }
- if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) {
- via_dmablit_release_slot(blitq);
- kfree(vsg);
- return ret;
- }
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
-
- blitq->blits[blitq->head++] = vsg;
- if (blitq->head >= VIA_NUM_BLIT_SLOTS)
- blitq->head = 0;
- blitq->num_outstanding++;
- xfer->sync.sync_handle = ++blitq->cur_blit_handle;
-
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
- xfer->sync.engine = engine;
-
- via_dmablit_handler(dev, engine, 0);
-
- return 0;
-}
-
-/*
- * Sync on a previously submitted blit. Note that the X server use signals extensively, and
- * that there is a very big probability that this IOCTL will be interrupted by a signal. In that
- * case it returns with -EAGAIN for the signal to be delivered.
- * The caller should then reissue the IOCTL. This is similar to what is being done for drmGetLock().
- */
-
-int
-via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv )
-{
- drm_via_blitsync_t *sync = data;
- int err;
-
- if (sync->engine >= VIA_NUM_BLIT_ENGINES)
- return -EINVAL;
-
- err = via_dmablit_sync(dev, sync->sync_handle, sync->engine);
-
- if (-EINTR == err)
- err = -EAGAIN;
-
- return err;
-}
-
-
-/*
- * Queue a blit and hand back a handle to be used for sync. This IOCTL may be interrupted by a signal
- * while waiting for a free slot in the blit queue. In that case it returns with -EAGAIN and should
- * be reissued. See the above IOCTL code.
- */
-
-int
-via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv )
-{
- drm_via_dmablit_t *xfer = data;
- int err;
-
- err = via_dmablit(dev, xfer);
-
- return err;
-}
+++ /dev/null
-/* via_dmablit.h -- PCI DMA BitBlt support for the VIA Unichrome/Pro
- *
- * Copyright 2005 Thomas Hellstrom.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Thomas Hellstrom.
- * Register info from Digeo Inc.
- */
-
-#ifndef _VIA_DMABLIT_H
-#define _VIA_DMABLIT_H
-
-#include <linux/dma-mapping.h>
-
-#define VIA_NUM_BLIT_ENGINES 2
-#define VIA_NUM_BLIT_SLOTS 8
-
-struct _drm_via_descriptor;
-
-typedef struct _drm_via_sg_info {
- struct page **pages;
- unsigned long num_pages;
- struct _drm_via_descriptor **desc_pages;
- int num_desc_pages;
- int num_desc;
- enum dma_data_direction direction;
- unsigned char *bounce_buffer;
- dma_addr_t chain_start;
- uint32_t free_on_sequence;
- unsigned int descriptors_per_page;
- int aborted;
- enum {
- dr_via_device_mapped,
- dr_via_desc_pages_alloc,
- dr_via_pages_locked,
- dr_via_pages_alloc,
- dr_via_sg_init
- } state;
-} drm_via_sg_info_t;
-
-typedef struct _drm_via_blitq {
- struct drm_device *dev;
- uint32_t cur_blit_handle;
- uint32_t done_blit_handle;
- unsigned serviced;
- unsigned head;
- unsigned cur;
- unsigned num_free;
- unsigned num_outstanding;
- unsigned long end;
- int aborting;
- int is_active;
- drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS];
- spinlock_t blit_lock;
- wait_queue_head_t blit_queue[VIA_NUM_BLIT_SLOTS];
- wait_queue_head_t busy_queue;
- struct work_struct wq;
- struct timer_list poll_timer;
-} drm_via_blitq_t;
-
-
-/*
- * PCI DMA Registers
- * Channels 2 & 3 don't seem to be implemented in hardware.
- */
-
-#define VIA_PCI_DMA_MAR0 0xE40 /* Memory Address Register of Channel 0 */
-#define VIA_PCI_DMA_DAR0 0xE44 /* Device Address Register of Channel 0 */
-#define VIA_PCI_DMA_BCR0 0xE48 /* Byte Count Register of Channel 0 */
-#define VIA_PCI_DMA_DPR0 0xE4C /* Descriptor Pointer Register of Channel 0 */
-
-#define VIA_PCI_DMA_MAR1 0xE50 /* Memory Address Register of Channel 1 */
-#define VIA_PCI_DMA_DAR1 0xE54 /* Device Address Register of Channel 1 */
-#define VIA_PCI_DMA_BCR1 0xE58 /* Byte Count Register of Channel 1 */
-#define VIA_PCI_DMA_DPR1 0xE5C /* Descriptor Pointer Register of Channel 1 */
-
-#define VIA_PCI_DMA_MAR2 0xE60 /* Memory Address Register of Channel 2 */
-#define VIA_PCI_DMA_DAR2 0xE64 /* Device Address Register of Channel 2 */
-#define VIA_PCI_DMA_BCR2 0xE68 /* Byte Count Register of Channel 2 */
-#define VIA_PCI_DMA_DPR2 0xE6C /* Descriptor Pointer Register of Channel 2 */
-
-#define VIA_PCI_DMA_MAR3 0xE70 /* Memory Address Register of Channel 3 */
-#define VIA_PCI_DMA_DAR3 0xE74 /* Device Address Register of Channel 3 */
-#define VIA_PCI_DMA_BCR3 0xE78 /* Byte Count Register of Channel 3 */
-#define VIA_PCI_DMA_DPR3 0xE7C /* Descriptor Pointer Register of Channel 3 */
-
-#define VIA_PCI_DMA_MR0 0xE80 /* Mode Register of Channel 0 */
-#define VIA_PCI_DMA_MR1 0xE84 /* Mode Register of Channel 1 */
-#define VIA_PCI_DMA_MR2 0xE88 /* Mode Register of Channel 2 */
-#define VIA_PCI_DMA_MR3 0xE8C /* Mode Register of Channel 3 */
-
-#define VIA_PCI_DMA_CSR0 0xE90 /* Command/Status Register of Channel 0 */
-#define VIA_PCI_DMA_CSR1 0xE94 /* Command/Status Register of Channel 1 */
-#define VIA_PCI_DMA_CSR2 0xE98 /* Command/Status Register of Channel 2 */
-#define VIA_PCI_DMA_CSR3 0xE9C /* Command/Status Register of Channel 3 */
-
-#define VIA_PCI_DMA_PTR 0xEA0 /* Priority Type Register */
-
-/* Define for DMA engine */
-/* DPR */
-#define VIA_DMA_DPR_EC (1<<1) /* end of chain */
-#define VIA_DMA_DPR_DDIE (1<<2) /* descriptor done interrupt enable */
-#define VIA_DMA_DPR_DT (1<<3) /* direction of transfer (RO) */
-
-/* MR */
-#define VIA_DMA_MR_CM (1<<0) /* chaining mode */
-#define VIA_DMA_MR_TDIE (1<<1) /* transfer done interrupt enable */
-#define VIA_DMA_MR_HENDMACMD (1<<7) /* ? */
-
-/* CSR */
-#define VIA_DMA_CSR_DE (1<<0) /* DMA enable */
-#define VIA_DMA_CSR_TS (1<<1) /* transfer start */
-#define VIA_DMA_CSR_TA (1<<2) /* transfer abort */
-#define VIA_DMA_CSR_TD (1<<3) /* transfer done */
-#define VIA_DMA_CSR_DD (1<<4) /* descriptor done */
-#define VIA_DMA_DPR_EC (1<<1) /* end of chain */
-
-
-
-#endif
+++ /dev/null
-../shared-core/via_drm.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_drv.c
\ No newline at end of file
+++ /dev/null
-../shared-core/via_drv.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_irq.c
\ No newline at end of file
+++ /dev/null
-../shared-core/via_map.c
\ No newline at end of file
+++ /dev/null
-/*
- * Copyright 2006 Tungsten Graphics Inc., Bismarck, ND., USA.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-/*
- * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#include "drmP.h"
-#include "via_drm.h"
-#include "via_drv.h"
-#include "drm_sman.h"
-
-#define VIA_MM_ALIGN_SHIFT 4
-#define VIA_MM_ALIGN_MASK ( (1 << VIA_MM_ALIGN_SHIFT) - 1)
-
-int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_agp_t *agp = data;
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm_sman_set_range(&dev_priv->sman, VIA_MEM_AGP, 0,
- agp->size >> VIA_MM_ALIGN_SHIFT);
-
- if (ret) {
- DRM_ERROR("AGP memory manager initialisation error\n");
- mutex_unlock(&dev->struct_mutex);
- return ret;
- }
-
- dev_priv->agp_initialized = 1;
- dev_priv->agp_offset = agp->offset;
- mutex_unlock(&dev->struct_mutex);
-
- DRM_DEBUG("offset = %u, size = %u\n", agp->offset, agp->size);
- return 0;
-}
-
-int via_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_fb_t *fb = data;
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm_sman_set_range(&dev_priv->sman, VIA_MEM_VIDEO, 0,
- fb->size >> VIA_MM_ALIGN_SHIFT);
-
- if (ret) {
- DRM_ERROR("VRAM memory manager initialisation error\n");
- mutex_unlock(&dev->struct_mutex);
- return ret;
- }
-
- dev_priv->vram_initialized = 1;
- dev_priv->vram_offset = fb->offset;
-
- mutex_unlock(&dev->struct_mutex);
- DRM_DEBUG("offset = %u, size = %u\n", fb->offset, fb->size);
-
- return 0;
-
-}
-
-int via_final_context(struct drm_device *dev, int context)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
-
- via_release_futex(dev_priv, context);
-
-#if defined(__linux__)
- /* Linux specific until context tracking code gets ported to BSD */
- /* Last context, perform cleanup */
- if (dev->ctx_count == 1 && dev->dev_private) {
- DRM_DEBUG("Last Context\n");
- if (dev->irq)
- drm_irq_uninstall(dev);
- via_cleanup_futex(dev_priv);
- via_do_cleanup_map(dev);
- }
-#endif
- return 1;
-}
-
-void via_lastclose(struct drm_device *dev)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
-
- if (!dev_priv)
- return;
-
- mutex_lock(&dev->struct_mutex);
- drm_sman_cleanup(&dev_priv->sman);
- dev_priv->vram_initialized = 0;
- dev_priv->agp_initialized = 0;
- mutex_unlock(&dev->struct_mutex);
-}
-
-int via_mem_alloc(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_via_mem_t *mem = data;
- int retval = 0;
- struct drm_memblock_item *item;
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- unsigned long tmpSize;
-
- if (mem->type > VIA_MEM_AGP) {
- DRM_ERROR("Unknown memory type allocation\n");
- return -EINVAL;
- }
- mutex_lock(&dev->struct_mutex);
- if (0 == ((mem->type == VIA_MEM_VIDEO) ? dev_priv->vram_initialized :
- dev_priv->agp_initialized)) {
- DRM_ERROR
- ("Attempt to allocate from uninitialized memory manager.\n");
- mutex_unlock(&dev->struct_mutex);
- return -EINVAL;
- }
-
- tmpSize = (mem->size + VIA_MM_ALIGN_MASK) >> VIA_MM_ALIGN_SHIFT;
- item = drm_sman_alloc(&dev_priv->sman, mem->type, tmpSize, 0,
- (unsigned long)file_priv);
- mutex_unlock(&dev->struct_mutex);
- if (item) {
- mem->offset = ((mem->type == VIA_MEM_VIDEO) ?
- dev_priv->vram_offset : dev_priv->agp_offset) +
- (item->mm->
- offset(item->mm, item->mm_info) << VIA_MM_ALIGN_SHIFT);
- mem->index = item->user_hash.key;
- } else {
- mem->offset = 0;
- mem->size = 0;
- mem->index = 0;
- DRM_DEBUG("Video memory allocation failed\n");
- retval = -ENOMEM;
- }
-
- return retval;
-}
-
-int via_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_private_t *dev_priv = dev->dev_private;
- drm_via_mem_t *mem = data;
- int ret;
-
- mutex_lock(&dev->struct_mutex);
- ret = drm_sman_free_key(&dev_priv->sman, mem->index);
- mutex_unlock(&dev->struct_mutex);
- DRM_DEBUG("free = 0x%lx\n", mem->index);
-
- return ret;
-}
-
-
-void via_reclaim_buffers_locked(struct drm_device * dev,
- struct drm_file *file_priv)
-{
- drm_via_private_t *dev_priv = dev->dev_private;
-
- mutex_lock(&dev->struct_mutex);
- if (drm_sman_owner_clean(&dev_priv->sman, (unsigned long)file_priv)) {
- mutex_unlock(&dev->struct_mutex);
- return;
- }
-
- if (dev->driver->dma_quiescent) {
- dev->driver->dma_quiescent(dev);
- }
-
- drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv);
- mutex_unlock(&dev->struct_mutex);
- return;
-}
+++ /dev/null
-../shared-core/via_verifier.c
\ No newline at end of file
+++ /dev/null
-../shared-core/via_verifier.h
\ No newline at end of file
+++ /dev/null
-../shared-core/via_video.c
\ No newline at end of file
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#include "xgi_drv.h"
-#include "xgi_regs.h"
-#include "xgi_misc.h"
-#include "xgi_cmdlist.h"
-
-static void xgi_emit_flush(struct xgi_info * info, bool stop);
-static void xgi_emit_nop(struct xgi_info * info);
-static unsigned int get_batch_command(enum xgi_batch_type type);
-static void triggerHWCommandList(struct xgi_info * info);
-static void xgi_cmdlist_reset(struct xgi_info * info);
-
-
-/**
- * Graphic engine register (2d/3d) acessing interface
- */
-static inline void dwWriteReg(struct drm_map * map, u32 addr, u32 data)
-{
-#ifdef XGI_MMIO_DEBUG
- DRM_INFO("mmio_map->handle = 0x%p, addr = 0x%x, data = 0x%x\n",
- map->handle, addr, data);
-#endif
- DRM_WRITE32(map, addr, data);
-}
-
-
-int xgi_cmdlist_initialize(struct xgi_info * info, size_t size,
- struct drm_file * filp)
-{
- struct xgi_mem_alloc mem_alloc = {
- .location = XGI_MEMLOC_NON_LOCAL,
- .size = size,
- };
- int err;
-
- err = xgi_alloc(info, &mem_alloc, filp);
- if (err) {
- return err;
- }
-
- info->cmdring.ptr = xgi_find_pcie_virt(info, mem_alloc.hw_addr);
- info->cmdring.size = mem_alloc.size;
- info->cmdring.ring_hw_base = mem_alloc.hw_addr;
- info->cmdring.last_ptr = NULL;
- info->cmdring.ring_offset = 0;
-
- return 0;
-}
-
-
-/**
- * get_batch_command - Get the command ID for the current begin type.
- * @type: Type of the current batch
- *
- * See section 3.2.2 "Begin" (page 15) of the 3D SPG.
- *
- * This function assumes that @type is on the range [0,3].
- */
-unsigned int get_batch_command(enum xgi_batch_type type)
-{
- static const unsigned int ports[4] = {
- 0x30 >> 2, 0x40 >> 2, 0x50 >> 2, 0x20 >> 2
- };
-
- return ports[type];
-}
-
-
-int xgi_submit_cmdlist(struct drm_device * dev, void * data,
- struct drm_file * filp)
-{
- struct xgi_info *const info = dev->dev_private;
- const struct xgi_cmd_info *const pCmdInfo =
- (struct xgi_cmd_info *) data;
- const unsigned int cmd = get_batch_command(pCmdInfo->type);
- u32 begin[4];
-
-
- begin[0] = (cmd << 24) | BEGIN_VALID_MASK
- | (BEGIN_BEGIN_IDENTIFICATION_MASK & info->next_sequence);
- begin[1] = BEGIN_LINK_ENABLE_MASK | pCmdInfo->size;
- begin[2] = pCmdInfo->hw_addr >> 4;
- begin[3] = 0;
-
- if (info->cmdring.last_ptr == NULL) {
- const unsigned int portOffset = BASE_3D_ENG + (cmd << 2);
-
-
- /* Enable PCI Trigger Mode
- */
- dwWriteReg(info->mmio_map,
- BASE_3D_ENG + M2REG_AUTO_LINK_SETTING_ADDRESS,
- (M2REG_AUTO_LINK_SETTING_ADDRESS << 22) |
- M2REG_CLEAR_COUNTERS_MASK | 0x08 |
- M2REG_PCI_TRIGGER_MODE_MASK);
-
- dwWriteReg(info->mmio_map,
- BASE_3D_ENG + M2REG_AUTO_LINK_SETTING_ADDRESS,
- (M2REG_AUTO_LINK_SETTING_ADDRESS << 22) | 0x08 |
- M2REG_PCI_TRIGGER_MODE_MASK);
-
-
- /* Send PCI begin command
- */
- dwWriteReg(info->mmio_map, portOffset, begin[0]);
- dwWriteReg(info->mmio_map, portOffset + 4, begin[1]);
- dwWriteReg(info->mmio_map, portOffset + 8, begin[2]);
- dwWriteReg(info->mmio_map, portOffset + 12, begin[3]);
- } else {
- DRM_DEBUG("info->cmdring.last_ptr != NULL\n");
-
- if (pCmdInfo->type == BTYPE_3D) {
- xgi_emit_flush(info, false);
- }
-
- info->cmdring.last_ptr[1] = cpu_to_le32(begin[1]);
- info->cmdring.last_ptr[2] = cpu_to_le32(begin[2]);
- info->cmdring.last_ptr[3] = cpu_to_le32(begin[3]);
- DRM_WRITEMEMORYBARRIER();
- info->cmdring.last_ptr[0] = cpu_to_le32(begin[0]);
-
- triggerHWCommandList(info);
- }
-
- info->cmdring.last_ptr = xgi_find_pcie_virt(info, pCmdInfo->hw_addr);
- return 0;
-}
-
-
-/*
- state: 0 - console
- 1 - graphic
- 2 - fb
- 3 - logout
-*/
-int xgi_state_change(struct xgi_info * info, unsigned int to,
- unsigned int from)
-{
-#define STATE_CONSOLE 0
-#define STATE_GRAPHIC 1
-#define STATE_FBTERM 2
-#define STATE_LOGOUT 3
-#define STATE_REBOOT 4
-#define STATE_SHUTDOWN 5
-
- if ((from == STATE_GRAPHIC) && (to == STATE_CONSOLE)) {
- DRM_INFO("Leaving graphical mode (probably VT switch)\n");
- } else if ((from == STATE_CONSOLE) && (to == STATE_GRAPHIC)) {
- DRM_INFO("Entering graphical mode (probably VT switch)\n");
- xgi_cmdlist_reset(info);
- } else if ((from == STATE_GRAPHIC)
- && ((to == STATE_LOGOUT)
- || (to == STATE_REBOOT)
- || (to == STATE_SHUTDOWN))) {
- DRM_INFO("Leaving graphical mode (probably X shutting down)\n");
- } else {
- DRM_ERROR("Invalid state change.\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-
-int xgi_state_change_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp)
-{
- struct xgi_state_info *const state =
- (struct xgi_state_info *) data;
- struct xgi_info *info = dev->dev_private;
-
-
- return xgi_state_change(info, state->_toState, state->_fromState);
-}
-
-
-void xgi_cmdlist_reset(struct xgi_info * info)
-{
- info->cmdring.last_ptr = NULL;
- info->cmdring.ring_offset = 0;
-}
-
-
-void xgi_cmdlist_cleanup(struct xgi_info * info)
-{
- if (info->cmdring.ring_hw_base != 0) {
- /* If command lists have been issued, terminate the command
- * list chain with a flush command.
- */
- if (info->cmdring.last_ptr != NULL) {
- xgi_emit_flush(info, false);
- xgi_emit_nop(info);
- }
-
- xgi_waitfor_pci_idle(info);
-
- (void) memset(&info->cmdring, 0, sizeof(info->cmdring));
- }
-}
-
-static void triggerHWCommandList(struct xgi_info * info)
-{
- static unsigned int s_triggerID = 1;
-
- dwWriteReg(info->mmio_map,
- BASE_3D_ENG + M2REG_PCI_TRIGGER_REGISTER_ADDRESS,
- 0x05000000 + (0x0ffff & s_triggerID++));
-}
-
-
-/**
- * Emit a flush to the CRTL command stream.
- * @info XGI info structure
- *
- * This function assumes info->cmdring.ptr is non-NULL.
- */
-void xgi_emit_flush(struct xgi_info * info, bool stop)
-{
- const u32 flush_command[8] = {
- ((0x10 << 24)
- | (BEGIN_BEGIN_IDENTIFICATION_MASK & info->next_sequence)),
- BEGIN_LINK_ENABLE_MASK | (0x00004),
- 0x00000000, 0x00000000,
-
- /* Flush the 2D engine with the default 32 clock delay.
- */
- M2REG_FLUSH_ENGINE_COMMAND | M2REG_FLUSH_2D_ENGINE_MASK,
- M2REG_FLUSH_ENGINE_COMMAND | M2REG_FLUSH_2D_ENGINE_MASK,
- M2REG_FLUSH_ENGINE_COMMAND | M2REG_FLUSH_2D_ENGINE_MASK,
- M2REG_FLUSH_ENGINE_COMMAND | M2REG_FLUSH_2D_ENGINE_MASK,
- };
- const unsigned int flush_size = sizeof(flush_command);
- u32 *batch_addr;
- u32 hw_addr;
- unsigned int i;
-
-
- /* check buf is large enough to contain a new flush batch */
- if ((info->cmdring.ring_offset + flush_size) >= info->cmdring.size) {
- info->cmdring.ring_offset = 0;
- }
-
- hw_addr = info->cmdring.ring_hw_base
- + info->cmdring.ring_offset;
- batch_addr = info->cmdring.ptr
- + (info->cmdring.ring_offset / 4);
-
- for (i = 0; i < (flush_size / 4); i++) {
- batch_addr[i] = cpu_to_le32(flush_command[i]);
- }
-
- if (stop) {
- *batch_addr |= cpu_to_le32(BEGIN_STOP_STORE_CURRENT_POINTER_MASK);
- }
-
- info->cmdring.last_ptr[1] = cpu_to_le32(BEGIN_LINK_ENABLE_MASK | (flush_size / 4));
- info->cmdring.last_ptr[2] = cpu_to_le32(hw_addr >> 4);
- info->cmdring.last_ptr[3] = 0;
- DRM_WRITEMEMORYBARRIER();
- info->cmdring.last_ptr[0] = cpu_to_le32((get_batch_command(BTYPE_CTRL) << 24)
- | (BEGIN_VALID_MASK));
-
- triggerHWCommandList(info);
-
- info->cmdring.ring_offset += flush_size;
- info->cmdring.last_ptr = batch_addr;
-}
-
-
-/**
- * Emit an empty command to the CRTL command stream.
- * @info XGI info structure
- *
- * This function assumes info->cmdring.ptr is non-NULL. In addition, since
- * this function emits a command that does not have linkage information,
- * it sets info->cmdring.ptr to NULL.
- */
-void xgi_emit_nop(struct xgi_info * info)
-{
- info->cmdring.last_ptr[1] = cpu_to_le32(BEGIN_LINK_ENABLE_MASK
- | (BEGIN_BEGIN_IDENTIFICATION_MASK & info->next_sequence));
- info->cmdring.last_ptr[2] = 0;
- info->cmdring.last_ptr[3] = 0;
- DRM_WRITEMEMORYBARRIER();
- info->cmdring.last_ptr[0] = cpu_to_le32((get_batch_command(BTYPE_CTRL) << 24)
- | (BEGIN_VALID_MASK));
-
- triggerHWCommandList(info);
-
- info->cmdring.last_ptr = NULL;
-}
-
-
-void xgi_emit_irq(struct xgi_info * info)
-{
- if (info->cmdring.last_ptr == NULL)
- return;
-
- xgi_emit_flush(info, true);
-}
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#ifndef _XGI_CMDLIST_H_
-#define _XGI_CMDLIST_H_
-
-struct xgi_cmdring_info {
- /**
- * Kernel space pointer to the base of the command ring.
- */
- u32 * ptr;
-
- /**
- * Size, in bytes, of the command ring.
- */
- unsigned int size;
-
- /**
- * Base address of the command ring from the hardware's PoV.
- */
- unsigned int ring_hw_base;
-
- u32 * last_ptr;
-
- /**
- * Offset, in bytes, from the start of the ring to the next available
- * location to store a command.
- */
- unsigned int ring_offset;
-};
-
-struct xgi_info;
-extern int xgi_cmdlist_initialize(struct xgi_info * info, size_t size,
- struct drm_file * filp);
-
-extern int xgi_state_change(struct xgi_info * info, unsigned int to,
- unsigned int from);
-
-extern void xgi_cmdlist_cleanup(struct xgi_info * info);
-
-extern void xgi_emit_irq(struct xgi_info * info);
-
-#endif /* _XGI_CMDLIST_H_ */
+++ /dev/null
-../shared-core/xgi_drm.h
\ No newline at end of file
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#include "drmP.h"
-#include "drm.h"
-#include "xgi_drv.h"
-#include "xgi_regs.h"
-#include "xgi_misc.h"
-#include "xgi_cmdlist.h"
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- xgi_PCI_IDS
-};
-
-int xgi_bootstrap(struct drm_device *, void *, struct drm_file *);
-
-static struct drm_ioctl_desc xgi_ioctls[] = {
- DRM_IOCTL_DEF(DRM_XGI_BOOTSTRAP, xgi_bootstrap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_XGI_ALLOC, xgi_alloc_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_XGI_FREE, xgi_free_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_XGI_SUBMIT_CMDLIST, xgi_submit_cmdlist, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_XGI_STATE_CHANGE, xgi_state_change_ioctl, DRM_AUTH|DRM_MASTER),
- DRM_IOCTL_DEF(DRM_XGI_SET_FENCE, xgi_set_fence_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_XGI_WAIT_FENCE, xgi_wait_fence_ioctl, DRM_AUTH),
-};
-
-static const int xgi_max_ioctl = DRM_ARRAY_SIZE(xgi_ioctls);
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static int xgi_driver_load(struct drm_device *dev, unsigned long flags);
-static int xgi_driver_unload(struct drm_device *dev);
-static void xgi_driver_lastclose(struct drm_device * dev);
-static void xgi_reclaim_buffers_locked(struct drm_device * dev,
- struct drm_file * filp);
-static irqreturn_t xgi_kern_isr(DRM_IRQ_ARGS);
-static int xgi_kern_isr_postinstall(struct drm_device * dev);
-
-
-static struct drm_driver driver = {
- .driver_features =
- DRIVER_PCI_DMA | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ |
- DRIVER_IRQ_SHARED | DRIVER_SG,
- .dev_priv_size = sizeof(struct xgi_info),
- .load = xgi_driver_load,
- .unload = xgi_driver_unload,
- .lastclose = xgi_driver_lastclose,
- .dma_quiescent = NULL,
- .irq_preinstall = NULL,
- .irq_postinstall = xgi_kern_isr_postinstall,
- .irq_uninstall = NULL,
- .irq_handler = xgi_kern_isr,
- .reclaim_buffers = drm_core_reclaim_buffers,
- .reclaim_buffers_idlelocked = xgi_reclaim_buffers_locked,
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = xgi_ioctls,
- .dma_ioctl = NULL,
-
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
-#if defined(CONFIG_COMPAT)
- .compat_ioctl = xgi_compat_ioctl,
-#endif
- },
-
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
-
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = DRIVER_DATE,
- .major = DRIVER_MAJOR,
- .minor = DRIVER_MINOR,
- .patchlevel = DRIVER_PATCHLEVEL,
-
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-
-static int __init xgi_init(void)
-{
- driver.num_ioctls = xgi_max_ioctl;
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit xgi_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(xgi_init);
-module_exit(xgi_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
-
-
-void xgi_engine_init(struct xgi_info * info)
-{
- u8 temp;
-
-
- OUT3C5B(info->mmio_map, 0x11, 0x92);
-
- /* -------> copy from OT2D
- * PCI Retry Control Register.
- * disable PCI read retry & enable write retry in mem. (10xx xxxx)b
- */
- temp = IN3X5B(info->mmio_map, 0x55);
- OUT3X5B(info->mmio_map, 0x55, (temp & 0xbf) | 0x80);
-
- xgi_enable_ge(info);
-
- /* Enable linear addressing of the card. */
- temp = IN3X5B(info->mmio_map, 0x21);
- OUT3X5B(info->mmio_map, 0x21, temp | 0x20);
-
- /* Enable 32-bit internal data path */
- temp = IN3X5B(info->mmio_map, 0x2A);
- OUT3X5B(info->mmio_map, 0x2A, temp | 0x40);
-
- /* Enable PCI burst write ,disable burst read and enable MMIO. */
- /*
- * 0x3D4.39 Enable PCI burst write, disable burst read and enable MMIO.
- * 7 ---- Pixel Data Format 1: big endian 0: little endian
- * 6 5 4 3---- Memory Data with Big Endian Format, BE[3:0]# with Big Endian Format
- * 2 ---- PCI Burst Write Enable
- * 1 ---- PCI Burst Read Enable
- * 0 ---- MMIO Control
- */
- temp = IN3X5B(info->mmio_map, 0x39);
- OUT3X5B(info->mmio_map, 0x39, (temp | 0x05) & 0xfd);
-
- /* enable GEIO decode */
- /* temp = IN3X5B(info->mmio_map, 0x29);
- * OUT3X5B(info->mmio_map, 0x29, temp | 0x08);
- */
-
- /* Enable graphic engine I/O PCI retry function*/
- /* temp = IN3X5B(info->mmio_map, 0x62);
- * OUT3X5B(info->mmio_map, 0x62, temp | 0x50);
- */
-
- /* protect all register except which protected by 3c5.0e.7 */
- /* OUT3C5B(info->mmio_map, 0x11, 0x87); */
-}
-
-
-int xgi_bootstrap(struct drm_device * dev, void * data,
- struct drm_file * filp)
-{
- struct xgi_info *info = dev->dev_private;
- struct xgi_bootstrap * bs = (struct xgi_bootstrap *) data;
- struct drm_map_list *maplist;
- int err;
-
-
- DRM_SPININIT(&info->fence_lock, "fence lock");
- info->next_sequence = 0;
- info->complete_sequence = 0;
-
- if (info->mmio_map == NULL) {
- err = drm_addmap(dev, info->mmio.base, info->mmio.size,
- _DRM_REGISTERS, _DRM_KERNEL,
- &info->mmio_map);
- if (err) {
- DRM_ERROR("Unable to map MMIO region: %d\n", err);
- return err;
- }
-
- xgi_enable_mmio(info);
- xgi_engine_init(info);
- }
-
-
- info->fb.size = IN3CFB(info->mmio_map, 0x54) * 8 * 1024 * 1024;
-
- DRM_INFO("fb base: 0x%lx, size: 0x%x (probed)\n",
- (unsigned long) info->fb.base, info->fb.size);
-
-
- if ((info->fb.base == 0) || (info->fb.size == 0)) {
- DRM_ERROR("framebuffer appears to be wrong: 0x%lx 0x%x\n",
- (unsigned long) info->fb.base, info->fb.size);
- return -EINVAL;
- }
-
-
- /* Init the resource manager */
- if (!info->fb_heap_initialized) {
- err = xgi_fb_heap_init(info);
- if (err) {
- DRM_ERROR("Unable to initialize FB heap.\n");
- return err;
- }
- }
-
-
- info->pcie.size = bs->gart.size;
-
- /* Init the resource manager */
- if (!info->pcie_heap_initialized) {
- err = xgi_pcie_heap_init(info);
- if (err) {
- DRM_ERROR("Unable to initialize GART heap.\n");
- return err;
- }
-
- /* Alloc 1M bytes for cmdbuffer which is flush2D batch array */
- err = xgi_cmdlist_initialize(info, 0x100000, filp);
- if (err) {
- DRM_ERROR("xgi_cmdlist_initialize() failed\n");
- return err;
- }
- }
-
-
- if (info->pcie_map == NULL) {
- err = drm_addmap(info->dev, 0, info->pcie.size,
- _DRM_SCATTER_GATHER, _DRM_LOCKED,
- & info->pcie_map);
- if (err) {
- DRM_ERROR("Could not add map for GART backing "
- "store.\n");
- return err;
- }
- }
-
-
- maplist = drm_find_matching_map(dev, info->pcie_map);
- if (maplist == NULL) {
- DRM_ERROR("Could not find GART backing store map.\n");
- return -EINVAL;
- }
-
- bs->gart = *info->pcie_map;
- bs->gart.handle = (void *)(unsigned long) maplist->user_token;
- return 0;
-}
-
-
-void xgi_driver_lastclose(struct drm_device * dev)
-{
- struct xgi_info * info = dev->dev_private;
-
- if (info != NULL) {
- if (info->mmio_map != NULL) {
- xgi_cmdlist_cleanup(info);
- xgi_disable_ge(info);
- xgi_disable_mmio(info);
- }
-
- /* The core DRM lastclose routine will destroy all of our
- * mappings for us. NULL out the pointers here so that
- * xgi_bootstrap can do the right thing.
- */
- info->pcie_map = NULL;
- info->mmio_map = NULL;
- info->fb_map = NULL;
-
- if (info->pcie_heap_initialized) {
- drm_ati_pcigart_cleanup(dev, &info->gart_info);
- }
-
- if (info->fb_heap_initialized
- || info->pcie_heap_initialized) {
- drm_sman_cleanup(&info->sman);
-
- info->fb_heap_initialized = false;
- info->pcie_heap_initialized = false;
- }
- }
-}
-
-
-void xgi_reclaim_buffers_locked(struct drm_device * dev,
- struct drm_file * filp)
-{
- struct xgi_info * info = dev->dev_private;
-
- mutex_lock(&info->dev->struct_mutex);
- if (drm_sman_owner_clean(&info->sman, (unsigned long) filp)) {
- mutex_unlock(&info->dev->struct_mutex);
- return;
- }
-
- if (dev->driver->dma_quiescent) {
- dev->driver->dma_quiescent(dev);
- }
-
- drm_sman_owner_cleanup(&info->sman, (unsigned long) filp);
- mutex_unlock(&info->dev->struct_mutex);
- return;
-}
-
-
-/*
- * driver receives an interrupt if someone waiting, then hand it off.
- */
-irqreturn_t xgi_kern_isr(DRM_IRQ_ARGS)
-{
- struct drm_device *dev = (struct drm_device *) arg;
- struct xgi_info *info = dev->dev_private;
- const u32 irq_bits = le32_to_cpu(DRM_READ32(info->mmio_map,
- (0x2800
- + M2REG_AUTO_LINK_STATUS_ADDRESS)))
- & (M2REG_ACTIVE_TIMER_INTERRUPT_MASK
- | M2REG_ACTIVE_INTERRUPT_0_MASK
- | M2REG_ACTIVE_INTERRUPT_2_MASK
- | M2REG_ACTIVE_INTERRUPT_3_MASK);
-
-
- if (irq_bits != 0) {
- DRM_WRITE32(info->mmio_map,
- 0x2800 + M2REG_AUTO_LINK_SETTING_ADDRESS,
- cpu_to_le32(M2REG_AUTO_LINK_SETTING_COMMAND | irq_bits));
- DRM_WAKEUP(&info->fence_queue);
- return IRQ_HANDLED;
- } else {
- return IRQ_NONE;
- }
-}
-
-
-int xgi_kern_isr_postinstall(struct drm_device * dev)
-{
- struct xgi_info *info = dev->dev_private;
-
- DRM_INIT_WAITQUEUE(&info->fence_queue);
- return 0;
-}
-
-
-int xgi_driver_load(struct drm_device *dev, unsigned long flags)
-{
- struct xgi_info *info = drm_alloc(sizeof(*info), DRM_MEM_DRIVER);
- int err;
-
- if (!info)
- return -ENOMEM;
-
- (void) memset(info, 0, sizeof(*info));
- dev->dev_private = info;
- info->dev = dev;
-
- info->mmio.base = drm_get_resource_start(dev, 1);
- info->mmio.size = drm_get_resource_len(dev, 1);
-
- DRM_INFO("mmio base: 0x%lx, size: 0x%x\n",
- (unsigned long) info->mmio.base, info->mmio.size);
-
-
- if ((info->mmio.base == 0) || (info->mmio.size == 0)) {
- DRM_ERROR("mmio appears to be wrong: 0x%lx 0x%x\n",
- (unsigned long) info->mmio.base, info->mmio.size);
- err = -EINVAL;
- goto fail;
- }
-
-
- info->fb.base = drm_get_resource_start(dev, 0);
- info->fb.size = drm_get_resource_len(dev, 0);
-
- DRM_INFO("fb base: 0x%lx, size: 0x%x\n",
- (unsigned long) info->fb.base, info->fb.size);
-
-
- err = drm_sman_init(&info->sman, 2, 12, 8);
- if (err) {
- goto fail;
- }
-
-
- return 0;
-
-fail:
- drm_free(info, sizeof(*info), DRM_MEM_DRIVER);
- return err;
-}
-
-int xgi_driver_unload(struct drm_device *dev)
-{
- struct xgi_info * info = dev->dev_private;
-
- drm_sman_takedown(&info->sman);
- drm_free(info, sizeof(*info), DRM_MEM_DRIVER);
- dev->dev_private = NULL;
-
- return 0;
-}
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#ifndef _XGI_DRV_H_
-#define _XGI_DRV_H_
-
-#include "drmP.h"
-#include "drm.h"
-#include "drm_sman.h"
-
-#define DRIVER_AUTHOR "Andrea Zhang <andrea_zhang@macrosynergy.com>"
-
-#define DRIVER_NAME "xgi"
-#define DRIVER_DESC "XGI XP5 / XP10 / XG47"
-#define DRIVER_DATE "20080612"
-
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 2
-#define DRIVER_PATCHLEVEL 0
-
-#include "xgi_cmdlist.h"
-#include "xgi_drm.h"
-
-struct xgi_aperture {
- dma_addr_t base;
- unsigned int size;
-};
-
-struct xgi_info {
- struct drm_device *dev;
-
- bool bootstrap_done;
-
- /* physical characteristics */
- struct xgi_aperture mmio;
- struct xgi_aperture fb;
- struct xgi_aperture pcie;
-
- struct drm_map *mmio_map;
- struct drm_map *pcie_map;
- struct drm_map *fb_map;
-
- /* look up table parameters */
- struct drm_ati_pcigart_info gart_info;
- unsigned int lutPageSize;
-
- struct drm_sman sman;
- bool fb_heap_initialized;
- bool pcie_heap_initialized;
-
- struct xgi_cmdring_info cmdring;
-
- DRM_SPINTYPE fence_lock;
- wait_queue_head_t fence_queue;
- unsigned complete_sequence;
- unsigned next_sequence;
-};
-
-extern long xgi_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg);
-
-extern int xgi_fb_heap_init(struct xgi_info * info);
-
-extern int xgi_alloc(struct xgi_info * info, struct xgi_mem_alloc * alloc,
- struct drm_file * filp);
-
-extern int xgi_free(struct xgi_info * info, unsigned int index,
- struct drm_file * filp);
-
-extern int xgi_pcie_heap_init(struct xgi_info * info);
-
-extern void *xgi_find_pcie_virt(struct xgi_info * info, u32 address);
-
-extern void xgi_enable_mmio(struct xgi_info * info);
-extern void xgi_disable_mmio(struct xgi_info * info);
-extern void xgi_enable_ge(struct xgi_info * info);
-extern void xgi_disable_ge(struct xgi_info * info);
-
-/* Non-TTM-style fences.
- */
-extern int xgi_set_fence_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp);
-extern int xgi_wait_fence_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp);
-
-extern int xgi_alloc_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp);
-extern int xgi_free_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp);
-extern int xgi_submit_cmdlist(struct drm_device * dev, void * data,
- struct drm_file * filp);
-extern int xgi_state_change_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp);
-
-#endif
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#include "xgi_drv.h"
-
-#define XGI_FB_HEAP_START 0x1000000
-
-int xgi_alloc(struct xgi_info * info, struct xgi_mem_alloc * alloc,
- struct drm_file * filp)
-{
- struct drm_memblock_item *block;
- const char *const mem_name = (alloc->location == XGI_MEMLOC_LOCAL)
- ? "on-card" : "GART";
-
-
- if ((alloc->location != XGI_MEMLOC_LOCAL)
- && (alloc->location != XGI_MEMLOC_NON_LOCAL)) {
- DRM_ERROR("Invalid memory pool (0x%08x) specified.\n",
- alloc->location);
- return -EINVAL;
- }
-
- if ((alloc->location == XGI_MEMLOC_LOCAL)
- ? !info->fb_heap_initialized : !info->pcie_heap_initialized) {
- DRM_ERROR("Attempt to allocate from uninitialized memory "
- "pool (0x%08x).\n", alloc->location);
- return -EINVAL;
- }
-
- mutex_lock(&info->dev->struct_mutex);
- block = drm_sman_alloc(&info->sman, alloc->location, alloc->size,
- 0, (unsigned long) filp);
- mutex_unlock(&info->dev->struct_mutex);
-
- if (block == NULL) {
- alloc->size = 0;
- DRM_ERROR("%s memory allocation failed\n", mem_name);
- return -ENOMEM;
- } else {
- alloc->offset = (*block->mm->offset)(block->mm,
- block->mm_info);
- alloc->hw_addr = alloc->offset;
- alloc->index = block->user_hash.key;
-
- if (block->user_hash.key != (unsigned long) alloc->index) {
- DRM_ERROR("%s truncated handle %lx for pool %d "
- "offset %x\n",
- __func__, block->user_hash.key,
- alloc->location, alloc->offset);
- }
-
- if (alloc->location == XGI_MEMLOC_NON_LOCAL) {
- alloc->hw_addr += info->pcie.base;
- }
-
- DRM_DEBUG("%s memory allocation succeeded: 0x%x\n",
- mem_name, alloc->offset);
- }
-
- return 0;
-}
-
-
-int xgi_alloc_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp)
-{
- struct xgi_info *info = dev->dev_private;
-
- return xgi_alloc(info, (struct xgi_mem_alloc *) data, filp);
-}
-
-
-int xgi_free(struct xgi_info * info, unsigned int index,
- struct drm_file * filp)
-{
- int err;
-
- mutex_lock(&info->dev->struct_mutex);
- err = drm_sman_free_key(&info->sman, index);
- mutex_unlock(&info->dev->struct_mutex);
-
- return err;
-}
-
-
-int xgi_free_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp)
-{
- struct xgi_info *info = dev->dev_private;
-
- return xgi_free(info, *(unsigned int *) data, filp);
-}
-
-
-int xgi_fb_heap_init(struct xgi_info * info)
-{
- int err;
-
- mutex_lock(&info->dev->struct_mutex);
- err = drm_sman_set_range(&info->sman, XGI_MEMLOC_LOCAL,
- XGI_FB_HEAP_START,
- info->fb.size - XGI_FB_HEAP_START);
- mutex_unlock(&info->dev->struct_mutex);
-
- info->fb_heap_initialized = (err == 0);
- return err;
-}
+++ /dev/null
-/*
- * (C) Copyright IBM Corporation 2007
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Ian Romanick <idr@us.ibm.com>
- */
-
-#include "xgi_drv.h"
-#include "xgi_regs.h"
-#include "xgi_misc.h"
-#include "xgi_cmdlist.h"
-
-static int xgi_low_level_fence_emit(struct drm_device *dev, u32 *sequence)
-{
- struct xgi_info *const info = dev->dev_private;
-
- if (info == NULL) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_SPINLOCK(&info->fence_lock);
- info->next_sequence++;
- if (info->next_sequence > BEGIN_BEGIN_IDENTIFICATION_MASK) {
- info->next_sequence = 1;
- }
-
- *sequence = (u32) info->next_sequence;
- DRM_SPINUNLOCK(&info->fence_lock);
-
-
- xgi_emit_irq(info);
- return 0;
-}
-
-#define GET_BEGIN_ID(i) (le32_to_cpu(DRM_READ32((i)->mmio_map, 0x2820)) \
- & BEGIN_BEGIN_IDENTIFICATION_MASK)
-
-static int xgi_low_level_fence_wait(struct drm_device *dev, unsigned *sequence)
-{
- struct xgi_info *const info = dev->dev_private;
- unsigned int cur_fence;
- int ret = 0;
-
- if (info == NULL) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- /* Assume that the user has missed the current sequence number
- * by about a day rather than she wants to wait for years
- * using fences.
- */
- DRM_WAIT_ON(ret, info->fence_queue, 3 * DRM_HZ,
- ((((cur_fence = GET_BEGIN_ID(info))
- - *sequence) & BEGIN_BEGIN_IDENTIFICATION_MASK)
- <= (1 << 18)));
-
- info->complete_sequence = cur_fence;
- *sequence = cur_fence;
-
- return ret;
-}
-
-
-int xgi_set_fence_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp)
-{
- (void) filp;
- return xgi_low_level_fence_emit(dev, (u32 *) data);
-}
-
-
-int xgi_wait_fence_ioctl(struct drm_device * dev, void * data,
- struct drm_file * filp)
-{
- (void) filp;
- return xgi_low_level_fence_wait(dev, (u32 *) data);
-}
+++ /dev/null
-/*
- * (C) Copyright IBM Corporation 2007
- * Copyright (C) Paul Mackerras 2005.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Ian Romanick <idr@us.ibm.com>
- */
-
-#include <linux/compat.h>
-
-#include "drmP.h"
-#include "drm.h"
-
-#include "xgi_drm.h"
-
-/* This is copied from drm_ioc32.c.
- */
-struct drm_map32 {
- u32 offset; /**< Requested physical address (0 for SAREA)*/
- u32 size; /**< Requested physical size (bytes) */
- enum drm_map_type type; /**< Type of memory to map */
- enum drm_map_flags flags; /**< Flags */
- u32 handle; /**< User-space: "Handle" to pass to mmap() */
- int mtrr; /**< MTRR slot used */
-};
-
-struct drm32_xgi_bootstrap {
- struct drm_map32 gart;
-};
-
-
-extern int xgi_bootstrap(struct drm_device *, void *, struct drm_file *);
-
-static int compat_xgi_bootstrap(struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- struct drm32_xgi_bootstrap __user *const argp = (void __user *)arg;
- struct drm32_xgi_bootstrap bs32;
- struct xgi_bootstrap __user *bs;
- int err;
- void *handle;
-
-
- if (copy_from_user(&bs32, argp, sizeof(bs32))) {
- return -EFAULT;
- }
-
- bs = compat_alloc_user_space(sizeof(*bs));
- if (!access_ok(VERIFY_WRITE, bs, sizeof(*bs))) {
- return -EFAULT;
- }
-
- if (__put_user(bs32.gart.offset, &bs->gart.offset)
- || __put_user(bs32.gart.size, &bs->gart.size)
- || __put_user(bs32.gart.type, &bs->gart.type)
- || __put_user(bs32.gart.flags, &bs->gart.flags)) {
- return -EFAULT;
- }
-
- err = drm_ioctl(filp->f_dentry->d_inode, filp, XGI_IOCTL_BOOTSTRAP,
- (unsigned long)bs);
- if (err) {
- return err;
- }
-
- if (__get_user(bs32.gart.offset, &bs->gart.offset)
- || __get_user(bs32.gart.mtrr, &bs->gart.mtrr)
- || __get_user(handle, &bs->gart.handle)) {
- return -EFAULT;
- }
-
- bs32.gart.handle = (unsigned long)handle;
- if (bs32.gart.handle != (unsigned long)handle && printk_ratelimit()) {
- printk(KERN_ERR "%s truncated handle %p for type %d "
- "offset %x\n",
- __func__, handle, bs32.gart.type, bs32.gart.offset);
- }
-
- if (copy_to_user(argp, &bs32, sizeof(bs32))) {
- return -EFAULT;
- }
-
- return 0;
-}
-
-
-drm_ioctl_compat_t *xgi_compat_ioctls[] = {
- [DRM_XGI_BOOTSTRAP] = compat_xgi_bootstrap,
-};
-
-/**
- * Called whenever a 32-bit process running under a 64-bit kernel
- * performs an ioctl on /dev/dri/card<n>.
- *
- * \param filp file pointer.
- * \param cmd command.
- * \param arg user argument.
- * \return zero on success or negative number on failure.
- */
-long xgi_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg)
-{
- const unsigned int nr = DRM_IOCTL_NR(cmd);
- drm_ioctl_compat_t *fn = NULL;
- int ret;
-
- if (nr < DRM_COMMAND_BASE)
- return drm_compat_ioctl(filp, cmd, arg);
-
- if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(xgi_compat_ioctls))
- fn = xgi_compat_ioctls[nr - DRM_COMMAND_BASE];
-
- lock_kernel();
- ret = (fn != NULL)
- ? (*fn)(filp, cmd, arg)
- : drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
- unlock_kernel();
-
- return ret;
-}
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#include "xgi_drv.h"
-#include "xgi_regs.h"
-
-#include <linux/delay.h>
-
-/*
- * irq functions
- */
-#define STALL_INTERRUPT_RESET_THRESHOLD 0xffff
-
-static unsigned int s_invalid_begin = 0;
-
-static bool xgi_validate_signal(struct drm_map * map)
-{
- if (le32_to_cpu(DRM_READ32(map, 0x2800) & 0x001c0000)) {
- u16 check;
-
- /* Check Read back status */
- DRM_WRITE8(map, 0x235c, 0x80);
- check = le16_to_cpu(DRM_READ16(map, 0x2360));
-
- if ((check & 0x3f) != ((check & 0x3f00) >> 8)) {
- return false;
- }
-
- /* Check RO channel */
- DRM_WRITE8(map, 0x235c, 0x83);
- check = le16_to_cpu(DRM_READ16(map, 0x2360));
- if ((check & 0x0f) != ((check & 0xf0) >> 4)) {
- return false;
- }
-
- /* Check RW channel */
- DRM_WRITE8(map, 0x235c, 0x88);
- check = le16_to_cpu(DRM_READ16(map, 0x2360));
- if ((check & 0x0f) != ((check & 0xf0) >> 4)) {
- return false;
- }
-
- /* Check RO channel outstanding */
- DRM_WRITE8(map, 0x235c, 0x8f);
- check = le16_to_cpu(DRM_READ16(map, 0x2360));
- if (0 != (check & 0x3ff)) {
- return false;
- }
-
- /* Check RW channel outstanding */
- DRM_WRITE8(map, 0x235c, 0x90);
- check = le16_to_cpu(DRM_READ16(map, 0x2360));
- if (0 != (check & 0x3ff)) {
- return false;
- }
-
- /* No pending PCIE request. GE stall. */
- }
-
- return true;
-}
-
-
-static void xgi_ge_hang_reset(struct drm_map * map)
-{
- int time_out = 0xffff;
-
- DRM_WRITE8(map, 0xb057, 8);
- while (0 != le32_to_cpu(DRM_READ32(map, 0x2800) & 0xf0000000)) {
- while (0 != ((--time_out) & 0xfff))
- /* empty */ ;
-
- if (0 == time_out) {
- u8 old_3ce;
- u8 old_3cf;
- u8 old_index;
- u8 old_36;
-
- DRM_INFO("Can not reset back 0x%x!\n",
- le32_to_cpu(DRM_READ32(map, 0x2800)));
-
- DRM_WRITE8(map, 0xb057, 0);
-
- /* Have to use 3x5.36 to reset. */
- /* Save and close dynamic gating */
-
- old_3ce = DRM_READ8(map, 0x3ce);
- DRM_WRITE8(map, 0x3ce, 0x2a);
- old_3cf = DRM_READ8(map, 0x3cf);
- DRM_WRITE8(map, 0x3cf, old_3cf & 0xfe);
-
- /* Reset GE */
- old_index = DRM_READ8(map, 0x3d4);
- DRM_WRITE8(map, 0x3d4, 0x36);
- old_36 = DRM_READ8(map, 0x3d5);
- DRM_WRITE8(map, 0x3d5, old_36 | 0x10);
-
- while (0 != ((--time_out) & 0xfff))
- /* empty */ ;
-
- DRM_WRITE8(map, 0x3d5, old_36);
- DRM_WRITE8(map, 0x3d4, old_index);
-
- /* Restore dynamic gating */
- DRM_WRITE8(map, 0x3cf, old_3cf);
- DRM_WRITE8(map, 0x3ce, old_3ce);
- break;
- }
- }
-
- DRM_WRITE8(map, 0xb057, 0);
-}
-
-
-bool xgi_ge_irq_handler(struct xgi_info * info)
-{
- const u32 int_status = le32_to_cpu(DRM_READ32(info->mmio_map, 0x2810));
- bool is_support_auto_reset = false;
-
- /* Check GE on/off */
- if (0 == (0xffffc0f0 & int_status)) {
- if (0 != (0x1000 & int_status)) {
- /* We got GE stall interrupt.
- */
- DRM_WRITE32(info->mmio_map, 0x2810,
- cpu_to_le32(int_status | 0x04000000));
-
- if (is_support_auto_reset) {
- static cycles_t last_tick;
- static unsigned continue_int_count = 0;
-
- /* OE II is busy. */
-
- if (!xgi_validate_signal(info->mmio_map)) {
- /* Nothing but skip. */
- } else if (0 == continue_int_count++) {
- last_tick = get_cycles();
- } else {
- const cycles_t new_tick = get_cycles();
- if ((new_tick - last_tick) >
- STALL_INTERRUPT_RESET_THRESHOLD) {
- continue_int_count = 0;
- } else if (continue_int_count >= 3) {
- continue_int_count = 0;
-
- /* GE Hung up, need reset. */
- DRM_INFO("Reset GE!\n");
-
- xgi_ge_hang_reset(info->mmio_map);
- }
- }
- }
- } else if (0 != (0x1 & int_status)) {
- s_invalid_begin++;
- DRM_WRITE32(info->mmio_map, 0x2810,
- cpu_to_le32((int_status & ~0x01) | 0x04000000));
- }
-
- return true;
- }
-
- return false;
-}
-
-bool xgi_crt_irq_handler(struct xgi_info * info)
-{
- bool ret = false;
- u8 save_3ce = DRM_READ8(info->mmio_map, 0x3ce);
-
- /* CRT1 interrupt just happened
- */
- if (IN3CFB(info->mmio_map, 0x37) & 0x01) {
- u8 op3cf_3d;
- u8 op3cf_37;
-
- /* What happened?
- */
- op3cf_37 = IN3CFB(info->mmio_map, 0x37);
-
- /* Clear CRT interrupt
- */
- op3cf_3d = IN3CFB(info->mmio_map, 0x3d);
- OUT3CFB(info->mmio_map, 0x3d, (op3cf_3d | 0x04));
- OUT3CFB(info->mmio_map, 0x3d, (op3cf_3d & ~0x04));
- ret = true;
- }
- DRM_WRITE8(info->mmio_map, 0x3ce, save_3ce);
-
- return (ret);
-}
-
-bool xgi_dvi_irq_handler(struct xgi_info * info)
-{
- bool ret = false;
- const u8 save_3ce = DRM_READ8(info->mmio_map, 0x3ce);
-
- /* DVI interrupt just happened
- */
- if (IN3CFB(info->mmio_map, 0x38) & 0x20) {
- const u8 save_3x4 = DRM_READ8(info->mmio_map, 0x3d4);
- u8 op3cf_39;
- u8 op3cf_37;
- u8 op3x5_5a;
-
- /* What happened?
- */
- op3cf_37 = IN3CFB(info->mmio_map, 0x37);
-
- /* Notify BIOS that DVI plug/unplug happened
- */
- op3x5_5a = IN3X5B(info->mmio_map, 0x5a);
- OUT3X5B(info->mmio_map, 0x5a, op3x5_5a & 0xf7);
-
- DRM_WRITE8(info->mmio_map, 0x3d4, save_3x4);
-
- /* Clear DVI interrupt
- */
- op3cf_39 = IN3CFB(info->mmio_map, 0x39);
- OUT3C5B(info->mmio_map, 0x39, (op3cf_39 & ~0x01));
- OUT3C5B(info->mmio_map, 0x39, (op3cf_39 | 0x01));
-
- ret = true;
- }
- DRM_WRITE8(info->mmio_map, 0x3ce, save_3ce);
-
- return (ret);
-}
-
-
-static void dump_reg_header(unsigned regbase)
-{
- printk("\n=====xgi_dump_register========0x%x===============\n",
- regbase);
- printk(" 0 1 2 3 4 5 6 7 8 9 a b c d e f\n");
-}
-
-
-static void dump_indexed_reg(struct xgi_info * info, unsigned regbase)
-{
- unsigned i, j;
- u8 temp;
-
-
- dump_reg_header(regbase);
- for (i = 0; i < 0x10; i++) {
- printk("%1x ", i);
-
- for (j = 0; j < 0x10; j++) {
- DRM_WRITE8(info->mmio_map, regbase - 1,
- (i * 0x10) + j);
- temp = DRM_READ8(info->mmio_map, regbase);
- printk("%3x", temp);
- }
- printk("\n");
- }
-}
-
-
-static void dump_reg(struct xgi_info * info, unsigned regbase, unsigned range)
-{
- unsigned i, j;
-
-
- dump_reg_header(regbase);
- for (i = 0; i < range; i++) {
- printk("%1x ", i);
-
- for (j = 0; j < 0x10; j++) {
- u8 temp = DRM_READ8(info->mmio_map,
- regbase + (i * 0x10) + j);
- printk("%3x", temp);
- }
- printk("\n");
- }
-}
-
-
-void xgi_dump_register(struct xgi_info * info)
-{
- dump_indexed_reg(info, 0x3c5);
- dump_indexed_reg(info, 0x3d5);
- dump_indexed_reg(info, 0x3cf);
-
- dump_reg(info, 0xB000, 0x05);
- dump_reg(info, 0x2200, 0x0B);
- dump_reg(info, 0x2300, 0x07);
- dump_reg(info, 0x2400, 0x10);
- dump_reg(info, 0x2800, 0x10);
-}
-
-
-#define WHOLD_GE_STATUS 0x2800
-
-/* Test everything except the "whole GE busy" bit, the "master engine busy"
- * bit, and the reserved bits [26:21].
- */
-#define IDLE_MASK ~((1U<<31) | (1U<<28) | (0x3f<<21))
-
-void xgi_waitfor_pci_idle(struct xgi_info * info)
-{
- unsigned int idleCount = 0;
- u32 old_status = 0;
- unsigned int same_count = 0;
-
- while (idleCount < 5) {
- const u32 status = DRM_READ32(info->mmio_map, WHOLD_GE_STATUS)
- & IDLE_MASK;
-
- if (status == old_status) {
- same_count++;
-
- if ((same_count % 100) == 0) {
- DRM_ERROR("GE status stuck at 0x%08x for %u iterations!\n",
- old_status, same_count);
- }
- } else {
- old_status = status;
- same_count = 0;
- }
-
- if (status != 0) {
- msleep(1);
- idleCount = 0;
- } else {
- idleCount++;
- }
- }
-}
-
-
-void xgi_enable_mmio(struct xgi_info * info)
-{
- u8 protect = 0;
- u8 temp;
-
- /* Unprotect registers */
- DRM_WRITE8(info->mmio_map, 0x3C4, 0x11);
- protect = DRM_READ8(info->mmio_map, 0x3C5);
- DRM_WRITE8(info->mmio_map, 0x3C5, 0x92);
-
- DRM_WRITE8(info->mmio_map, 0x3D4, 0x3A);
- temp = DRM_READ8(info->mmio_map, 0x3D5);
- DRM_WRITE8(info->mmio_map, 0x3D5, temp | 0x20);
-
- /* Enable MMIO */
- DRM_WRITE8(info->mmio_map, 0x3D4, 0x39);
- temp = DRM_READ8(info->mmio_map, 0x3D5);
- DRM_WRITE8(info->mmio_map, 0x3D5, temp | 0x01);
-
- /* Protect registers */
- OUT3C5B(info->mmio_map, 0x11, protect);
-}
-
-
-void xgi_disable_mmio(struct xgi_info * info)
-{
- u8 protect = 0;
- u8 temp;
-
- /* Unprotect registers */
- DRM_WRITE8(info->mmio_map, 0x3C4, 0x11);
- protect = DRM_READ8(info->mmio_map, 0x3C5);
- DRM_WRITE8(info->mmio_map, 0x3C5, 0x92);
-
- /* Disable MMIO access */
- DRM_WRITE8(info->mmio_map, 0x3D4, 0x39);
- temp = DRM_READ8(info->mmio_map, 0x3D5);
- DRM_WRITE8(info->mmio_map, 0x3D5, temp & 0xFE);
-
- /* Protect registers */
- OUT3C5B(info->mmio_map, 0x11, protect);
-}
-
-
-void xgi_enable_ge(struct xgi_info * info)
-{
- u8 bOld3cf2a;
- int wait = 0;
-
- OUT3C5B(info->mmio_map, 0x11, 0x92);
-
- /* Save and close dynamic gating
- */
- bOld3cf2a = IN3CFB(info->mmio_map, XGI_MISC_CTRL);
- OUT3CFB(info->mmio_map, XGI_MISC_CTRL, bOld3cf2a & ~EN_GEPWM);
-
- /* Enable 2D and 3D GE
- */
- OUT3X5B(info->mmio_map, XGI_GE_CNTL, (GE_ENABLE | GE_ENABLE_3D));
- wait = 10;
- while (wait--) {
- DRM_READ8(info->mmio_map, 0x36);
- }
-
- /* Reset both 3D and 2D engine
- */
- OUT3X5B(info->mmio_map, XGI_GE_CNTL,
- (GE_ENABLE | GE_RESET | GE_ENABLE_3D));
- wait = 10;
- while (wait--) {
- DRM_READ8(info->mmio_map, 0x36);
- }
-
- OUT3X5B(info->mmio_map, XGI_GE_CNTL, (GE_ENABLE | GE_ENABLE_3D));
- wait = 10;
- while (wait--) {
- DRM_READ8(info->mmio_map, 0x36);
- }
-
- /* Enable 2D engine only
- */
- OUT3X5B(info->mmio_map, XGI_GE_CNTL, GE_ENABLE);
-
- /* Enable 2D+3D engine
- */
- OUT3X5B(info->mmio_map, XGI_GE_CNTL, (GE_ENABLE | GE_ENABLE_3D));
-
- /* Restore dynamic gating
- */
- OUT3CFB(info->mmio_map, XGI_MISC_CTRL, bOld3cf2a);
-}
-
-
-void xgi_disable_ge(struct xgi_info * info)
-{
- int wait = 0;
-
- OUT3X5B(info->mmio_map, XGI_GE_CNTL, (GE_ENABLE | GE_ENABLE_3D));
-
- wait = 10;
- while (wait--) {
- DRM_READ8(info->mmio_map, 0x36);
- }
-
- /* Reset both 3D and 2D engine
- */
- OUT3X5B(info->mmio_map, XGI_GE_CNTL,
- (GE_ENABLE | GE_RESET | GE_ENABLE_3D));
-
- wait = 10;
- while (wait--) {
- DRM_READ8(info->mmio_map, 0x36);
- }
- OUT3X5B(info->mmio_map, XGI_GE_CNTL, (GE_ENABLE | GE_ENABLE_3D));
-
- wait = 10;
- while (wait--) {
- DRM_READ8(info->mmio_map, 0x36);
- }
-
- /* Disable 2D engine and 3D engine.
- */
- OUT3X5B(info->mmio_map, XGI_GE_CNTL, 0);
-}
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#ifndef _XGI_MISC_H_
-#define _XGI_MISC_H_
-
-extern void xgi_dump_register(struct xgi_info * info);
-
-extern bool xgi_ge_irq_handler(struct xgi_info * info);
-extern bool xgi_crt_irq_handler(struct xgi_info * info);
-extern bool xgi_dvi_irq_handler(struct xgi_info * info);
-extern void xgi_waitfor_pci_idle(struct xgi_info * info);
-
-#endif
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#include "xgi_drv.h"
-#include "xgi_regs.h"
-#include "xgi_misc.h"
-
-void xgi_gart_flush(struct drm_device *dev)
-{
- struct xgi_info *const info = dev->dev_private;
- u8 temp;
-
- DRM_MEMORYBARRIER();
-
- /* Set GART in SFB */
- temp = DRM_READ8(info->mmio_map, 0xB00C);
- DRM_WRITE8(info->mmio_map, 0xB00C, temp & ~0x02);
-
- /* Set GART base address to HW */
- DRM_WRITE32(info->mmio_map, 0xB034, info->gart_info.bus_addr);
-
- /* Flush GART table. */
- DRM_WRITE8(info->mmio_map, 0xB03F, 0x40);
- DRM_WRITE8(info->mmio_map, 0xB03F, 0x00);
-}
-
-
-int xgi_pcie_heap_init(struct xgi_info * info)
-{
- u8 temp = 0;
- int err;
- struct drm_scatter_gather request;
-
- /* Get current FB aperture size */
- temp = IN3X5B(info->mmio_map, 0x27);
- DRM_INFO("In3x5(0x27): 0x%x \n", temp);
-
- if (temp & 0x01) { /* 256MB; Jong 06/05/2006; 0x10000000 */
- info->pcie.base = 256 * 1024 * 1024;
- } else { /* 128MB; Jong 06/05/2006; 0x08000000 */
- info->pcie.base = 128 * 1024 * 1024;
- }
-
-
- DRM_INFO("info->pcie.base: 0x%lx\n", (unsigned long) info->pcie.base);
-
- /* Get current lookup table page size */
- temp = DRM_READ8(info->mmio_map, 0xB00C);
- if (temp & 0x04) { /* 8KB */
- info->lutPageSize = 8 * 1024;
- } else { /* 4KB */
- info->lutPageSize = 4 * 1024;
- }
-
- DRM_INFO("info->lutPageSize: 0x%x \n", info->lutPageSize);
-
-
- request.size = info->pcie.size;
- err = drm_sg_alloc(info->dev, & request);
- if (err) {
- DRM_ERROR("cannot allocate PCIE GART backing store! "
- "size = %d\n", info->pcie.size);
- return err;
- }
-
- info->gart_info.table_mask = DMA_BIT_MASK(32);
- info->gart_info.gart_table_location = DRM_ATI_GART_MAIN;
- info->gart_info.gart_reg_if = DRM_ATI_GART_PCI;
- info->gart_info.table_size = info->dev->sg->pages * sizeof(u32);
-
- if (!drm_ati_pcigart_init(info->dev, &info->gart_info)) {
- DRM_ERROR("failed to init PCI GART!\n");
- return -ENOMEM;
- }
-
-
- xgi_gart_flush(info->dev);
-
- mutex_lock(&info->dev->struct_mutex);
- err = drm_sman_set_range(&info->sman, XGI_MEMLOC_NON_LOCAL,
- 0, info->pcie.size);
- mutex_unlock(&info->dev->struct_mutex);
- if (err) {
- drm_ati_pcigart_cleanup(info->dev, &info->gart_info);
- }
-
- info->pcie_heap_initialized = (err == 0);
- return err;
-}
-
-
-/**
- * xgi_find_pcie_virt
- * @address: GE HW address
- *
- * Returns CPU virtual address. Assumes the CPU VAddr is continuous in not
- * the same block
- */
-void *xgi_find_pcie_virt(struct xgi_info * info, u32 address)
-{
- const unsigned long offset = address - info->pcie.base;
-
- return ((u8 *) info->dev->sg->virtual) + offset;
-}
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#ifndef _XGI_REGS_H_
-#define _XGI_REGS_H_
-
-#include "drmP.h"
-#include "drm.h"
-
-#define MAKE_MASK(bits) ((1U << (bits)) - 1)
-
-#define ONE_BIT_MASK MAKE_MASK(1)
-#define TWENTY_BIT_MASK MAKE_MASK(20)
-#define TWENTYONE_BIT_MASK MAKE_MASK(21)
-#define TWENTYTWO_BIT_MASK MAKE_MASK(22)
-
-
-/* Port 0x3d4/0x3d5, index 0x2a */
-#define XGI_INTERFACE_SEL 0x2a
-#define DUAL_64BIT (1U<<7)
-#define INTERNAL_32BIT (1U<<6)
-#define EN_SEP_WR (1U<<5)
-#define POWER_DOWN_SEL (1U<<4)
-/*#define RESERVED_3 (1U<<3) */
-#define SUBS_MCLK_PCICLK (1U<<2)
-#define MEM_SIZE_MASK (3<<0)
-#define MEM_SIZE_32MB (0<<0)
-#define MEM_SIZE_64MB (1<<0)
-#define MEM_SIZE_128MB (2<<0)
-#define MEM_SIZE_256MB (3<<0)
-
-/* Port 0x3d4/0x3d5, index 0x36 */
-#define XGI_GE_CNTL 0x36
-#define GE_ENABLE (1U<<7)
-/*#define RESERVED_6 (1U<<6) */
-/*#define RESERVED_5 (1U<<5) */
-#define GE_RESET (1U<<4)
-/*#define RESERVED_3 (1U<<3) */
-#define GE_ENABLE_3D (1U<<2)
-/*#define RESERVED_1 (1U<<1) */
-/*#define RESERVED_0 (1U<<0) */
-
-/* Port 0x3ce/0x3cf, index 0x2a */
-#define XGI_MISC_CTRL 0x2a
-#define MOTION_VID_SUSPEND (1U<<7)
-#define DVI_CRTC_TIMING_SEL (1U<<6)
-#define LCD_SEL_CTL_NEW (1U<<5)
-#define LCD_SEL_EXT_DELYCTRL (1U<<4)
-#define REG_LCDDPARST (1U<<3)
-#define LCD2DPAOFF (1U<<2)
-/*#define RESERVED_1 (1U<<1) */
-#define EN_GEPWM (1U<<0) /* Enable GE power management */
-
-
-#define BASE_3D_ENG 0x2800
-
-#define M2REG_FLUSH_ENGINE_ADDRESS 0x000
-#define M2REG_FLUSH_ENGINE_COMMAND 0x00
-#define M2REG_FLUSH_FLIP_ENGINE_MASK (ONE_BIT_MASK<<21)
-#define M2REG_FLUSH_2D_ENGINE_MASK (ONE_BIT_MASK<<20)
-#define M2REG_FLUSH_3D_ENGINE_MASK TWENTY_BIT_MASK
-
-#define M2REG_RESET_ADDRESS 0x004
-#define M2REG_RESET_COMMAND 0x01
-#define M2REG_RESET_STATUS2_MASK (ONE_BIT_MASK<<10)
-#define M2REG_RESET_STATUS1_MASK (ONE_BIT_MASK<<9)
-#define M2REG_RESET_STATUS0_MASK (ONE_BIT_MASK<<8)
-#define M2REG_RESET_3DENG_MASK (ONE_BIT_MASK<<4)
-#define M2REG_RESET_2DENG_MASK (ONE_BIT_MASK<<2)
-
-/* Write register */
-#define M2REG_AUTO_LINK_SETTING_ADDRESS 0x010
-#define M2REG_AUTO_LINK_SETTING_COMMAND 0x04
-#define M2REG_CLEAR_TIMER_INTERRUPT_MASK (ONE_BIT_MASK<<11)
-#define M2REG_CLEAR_INTERRUPT_3_MASK (ONE_BIT_MASK<<10)
-#define M2REG_CLEAR_INTERRUPT_2_MASK (ONE_BIT_MASK<<9)
-#define M2REG_CLEAR_INTERRUPT_0_MASK (ONE_BIT_MASK<<8)
-#define M2REG_CLEAR_COUNTERS_MASK (ONE_BIT_MASK<<4)
-#define M2REG_PCI_TRIGGER_MODE_MASK (ONE_BIT_MASK<<1)
-#define M2REG_INVALID_LIST_AUTO_INTERRUPT_MASK (ONE_BIT_MASK<<0)
-
-/* Read register */
-#define M2REG_AUTO_LINK_STATUS_ADDRESS 0x010
-#define M2REG_AUTO_LINK_STATUS_COMMAND 0x04
-#define M2REG_ACTIVE_TIMER_INTERRUPT_MASK (ONE_BIT_MASK<<11)
-#define M2REG_ACTIVE_INTERRUPT_3_MASK (ONE_BIT_MASK<<10)
-#define M2REG_ACTIVE_INTERRUPT_2_MASK (ONE_BIT_MASK<<9)
-#define M2REG_ACTIVE_INTERRUPT_0_MASK (ONE_BIT_MASK<<8)
-#define M2REG_INVALID_LIST_AUTO_INTERRUPTED_MODE_MASK (ONE_BIT_MASK<<0)
-
-#define M2REG_PCI_TRIGGER_REGISTER_ADDRESS 0x014
-#define M2REG_PCI_TRIGGER_REGISTER_COMMAND 0x05
-
-
-/**
- * Begin instruction, double-word 0
- */
-#define BEGIN_STOP_STORE_CURRENT_POINTER_MASK (ONE_BIT_MASK<<22)
-#define BEGIN_VALID_MASK (ONE_BIT_MASK<<20)
-#define BEGIN_BEGIN_IDENTIFICATION_MASK TWENTY_BIT_MASK
-
-/**
- * Begin instruction, double-word 1
- */
-#define BEGIN_LINK_ENABLE_MASK (ONE_BIT_MASK<<31)
-#define BEGIN_COMMAND_LIST_LENGTH_MASK TWENTYTWO_BIT_MASK
-
-
-/* Hardware access functions */
-static inline void OUT3C5B(struct drm_map * map, u8 index, u8 data)
-{
- DRM_WRITE8(map, 0x3C4, index);
- DRM_WRITE8(map, 0x3C5, data);
-}
-
-static inline void OUT3X5B(struct drm_map * map, u8 index, u8 data)
-{
- DRM_WRITE8(map, 0x3D4, index);
- DRM_WRITE8(map, 0x3D5, data);
-}
-
-static inline void OUT3CFB(struct drm_map * map, u8 index, u8 data)
-{
- DRM_WRITE8(map, 0x3CE, index);
- DRM_WRITE8(map, 0x3CF, data);
-}
-
-static inline u8 IN3C5B(struct drm_map * map, u8 index)
-{
- DRM_WRITE8(map, 0x3C4, index);
- return DRM_READ8(map, 0x3C5);
-}
-
-static inline u8 IN3X5B(struct drm_map * map, u8 index)
-{
- DRM_WRITE8(map, 0x3D4, index);
- return DRM_READ8(map, 0x3D5);
-}
-
-static inline u8 IN3CFB(struct drm_map * map, u8 index)
-{
- DRM_WRITE8(map, 0x3CE, index);
- return DRM_READ8(map, 0x3CF);
-}
-
-#endif
+++ /dev/null
-#!/bin/sh
-#
-# Script to output BSD compatible pci ids file
-# - Copyright Dave Airlie 2004 (airlied@linux.ie)
-#
-OUTFILE=drm_pciids.h
-
-finished=0
-
-cat > $OUTFILE <<EOF
-/*
- This file is auto-generated from the drm_pciids.txt in the DRM CVS
- Please contact dri-devel@lists.sf.net to add new cards to this list
-*/
-EOF
-
-while read pcivend pcidev attribs pciname
-do
- if [ "x$pcivend" = "x" ]; then
- if [ "$finished" = "0" ]; then
- finished=1
- echo " {0, 0, 0, NULL}" >> $OUTFILE
- echo >> $OUTFILE
- fi
- else
-
- cardtype=`echo "$pcivend" | cut -s -f2 -d'[' | cut -s -f1 -d']'`
- if [ "x$cardtype" = "x" ];
- then
- echo " {$pcivend, $pcidev, $attribs, $pciname}, \\" >> $OUTFILE
- else
- echo "#define "$cardtype"_PCI_IDS \\" >> $OUTFILE
- finished=0
- fi
- fi
-done
-
-if [ "$finished" = "0" ]; then
- echo " {0, 0, 0, NULL}" >> $OUTFILE
-fi
+++ /dev/null
-#! /bin/bash
-#
-# Script to output Linux compatible pci ids file
-# - Copyright Dave Airlie 2004 (airlied@linux.ie)
-#
-OUTFILE=drm_pciids.h
-
-finished=0
-
-cat > $OUTFILE <<EOF
-/*
- This file is auto-generated from the drm_pciids.txt in the DRM CVS
- Please contact dri-devel@lists.sf.net to add new cards to this list
-*/
-EOF
-
-while read pcivend pcidev attribs pciname
-do
- if [ "x$pcivend" = "x" ]; then
- if [ "$finished" = "0" ]; then
- finished=1
- echo " {0, 0, 0}" >> $OUTFILE
- echo >> $OUTFILE
- fi
- else
-
- cardtype=`echo "$pcivend" | cut -s -f2 -d'[' | cut -s -f1 -d']'`
- if [ "x$cardtype" = "x" ];
- then
- echo " {$pcivend, $pcidev, PCI_ANY_ID, PCI_ANY_ID, 0, 0, $attribs}, \\" >> $OUTFILE
- else
- echo "#define "$cardtype"_PCI_IDS \\" >> $OUTFILE
- finished=0
- fi
- fi
-done
-
-if [ "$finished" = "0" ]; then
- echo " {0, 0, 0}" >> $OUTFILE
-fi
+++ /dev/null
-#! /bin/bash
-# script to create a Linux Kernel tree from the DRM tree for diffing etc..
-#
-# Original author - Dave Airlie (C) 2004 - airlied@linux.ie
-# kernel_version to remove below (e.g. 2.6.24)
-
-if [ $# -lt 2 ] ;then
- echo usage: $0 output_dir kernel_version
- exit 1
-fi
-
-if [ ! -d shared-core -o ! -d linux-core ] ;then
- echo not in DRM toplevel
- exit 1
-fi
-
-OUTDIR=$1/drivers/char/drm/
-KERNEL_VERS=$2
-echo "Copying kernel independent files"
-mkdir -p $OUTDIR/.tmp
-
-( cd linux-core/ ; make drm_pciids.h )
-cp shared-core/*.[ch] $OUTDIR/.tmp
-cp linux-core/*.[ch] $OUTDIR/.tmp
-cp linux-core/Makefile.kernel $OUTDIR/.tmp/Makefile
-
-echo "Copying 2.6 Kernel files"
-cp linux-core/Kconfig $OUTDIR/.tmp
-
-./scripts/drm-scripts-gentree.pl $KERNEL_VERS $OUTDIR/.tmp $OUTDIR
-cd $OUTDIR
-
-rm -rf .tmp
-rm via_ds.[ch]
-rm sis_ds.[ch]
-
-cd -
+++ /dev/null
-#! /bin/bash
-# script to create a Linux Kernel tree from the DRM tree for diffing etc..
-#
-# Original author - Dave Airlie (C) 2004 - airlied@linux.ie
-# kernel_version to remove below (e.g. 2.6.24)
-
-if [ $# -lt 2 ] ;then
- echo usage: $0 output_dir kernel_version
- exit 1
-fi
-
-if [ ! -d shared-core -o ! -d linux-core ] ;then
- echo not in DRM toplevel
- exit 1
-fi
-
-DRMDIR=$1/drivers/gpu/drm/
-HDRDIR=$1/include/drm/
-KERNEL_VERS=$2
-echo "Copying kernel independent files"
-mkdir -p $DRMDIR/.tmp
-mkdir -p $HDRDIR/.tmp
-
-( cd linux-core/ ; make drm_pciids.h )
-cp shared-core/*.[ch] $DRMDIR/.tmp
-cp linux-core/*.[ch] $DRMDIR/.tmp
-cp linux-core/Makefile.kernel $DRMDIR/.tmp/Makefile
-
-echo "Copying 2.6 Kernel files"
-cp linux-core/Kconfig $DRMDIR/.tmp
-
-./scripts/drm-scripts-gentree.pl $KERNEL_VERS $DRMDIR/.tmp $DRMDIR
-mv $DRMDIR/drm*.h $HDRDIR
-mv $DRMDIR/*_drm.h $HDRDIR
-
-cd $DRMDIR
-rm -rf .tmp
-rm via_ds.[ch]
-rm sis_ds.[ch]
-rm amd*.[ch]
-rm radeon_ms*.[ch]
-
-for i in radeon mach64 r128 mga i915 i810 via savage sis xgi nouveau tdfx ffb imagine
-do
-mkdir ./$i
-mv $i*.[ch] $i/
-done
-
-mv r300*.[ch] radeon/
-mv r600*.[ch] radeon/
-mv ObjectID.h radeon/
-mv atom*.[ch] radeon/
-
-mv nv*.[ch] nouveau/
-mv intel*.[ch] i915/
-mv dvo*.[ch] i915/
-
-cd -
+++ /dev/null
-#!/usr/bin/perl
-#
-# Original version were part of Gerd Knorr's v4l scripts.
-#
-# Several improvements by (c) 2005-2007 Mauro Carvalho Chehab
-#
-# Largely re-written (C) 2007 Trent Piepho <xyzzy@speakeasy.org>
-# Stolen for DRM usage by airlied
-#
-# Theory of Operation
-#
-# This acts as a sort of mini version of cpp, which will process
-# #if/#elif/#ifdef/etc directives to strip out code used to support
-# multiple kernel versions or otherwise not wanted to be sent upstream to
-# git.
-#
-# Conditional compilation directives fall into two catagories,
-# "processed" and "other". The "other" directives are ignored and simply
-# output as they come in without changes (see 'keep' exception). The
-# "processed" variaty are evaluated and only the lines in the 'true' part
-# are kept, like cpp would do.
-#
-# If gentree knows the result of an expression, that directive will be
-# "processed", otherwise it will be an "other". gentree knows the value
-# of LINUX_VERSION_CODE, BTTV_VERSION_CODE, the KERNEL_VERSION(x,y,z)
-# macro, numeric constants like 0 and 1, and a few defines like MM_KERNEL
-# and STV0297_CS2.
-#
-# An exception is if the comment "/*KEEP*/" appears after the expression,
-# in which case that directive will be considered an "other" and not
-# processed, other than to remove the keep comment.
-#
-# Known bugs:
-# don't specify the root directory e.g. '/' or even '////'
-# directives continued with a back-slash will always be ignored
-# you can't modify a source tree in-place, i.e. source dir == dest dir
-
-use strict;
-use File::Find;
-use Fcntl ':mode';
-
-my $VERSION = shift;
-my $SRC = shift;
-my $DESTDIR = shift;
-
-if (!defined($DESTDIR)) {
- print "Usage:\ngentree.pl\t<version> <source dir> <dest dir>\n\n";
- exit;
-}
-
-my $BTTVCODE = KERNEL_VERSION(0,9,17);
-my ($LINUXCODE, $extra) = kernel_version($VERSION);
-my $DEBUG = 0;
-
-my %defs = (
- 'LINUX_VERSION_CODE' => $LINUXCODE,
- 'MM_KERNEL' => ($extra =~ /-mm/)?1:0,
- 'DRM_ODD_MM_COMPAT' => 0,
- 'I915_HAVE_FENCE' => 1,
- 'I915_HAVE_BUFFER' => 1,
- 'VIA_HAVE_DMABLIT' => 1,
- 'VIA_HAVE_CORE_MM' => 1,
- 'VIA_HAVE_FENCE' => 1,
- 'VIA_HAVE_BUFFER' => 1,
- 'SIS_HAVE_CORE_MM' => 1,
- 'DRM_FULL_MM_COMPAT' => 1,
- '__linux__' => 1,
-);
-
-#################################################################
-# helpers
-
-sub kernel_version($) {
- $_[0] =~ m/(\d+)\.(\d+)\.(\d+)(.*)/;
- return ($1*65536 + $2*256 + $3, $4);
-}
-
-# used in eval()
-sub KERNEL_VERSION($$$) { return $_[0]*65536 + $_[1]*256 + $_[2]; }
-
-sub evalexp($) {
- local $_ = shift;
- s|/\*.*?\*/||go; # delete /* */ comments
- s|//.*$||o; # delete // comments
- s/\bdefined\s*\(/(/go; # defined(foo) to (foo)
- while (/\b([_A-Za-z]\w*)\b/go) {
- if (exists $defs{$1}) {
- my $id = $1; my $pos = $-[0];
- s/$id/$defs{$id}/;
- pos = $-[0];
- } elsif ($1 ne 'KERNEL_VERSION') {
- return(undef);
- }
- }
- return(eval($_) ? 1 : 0);
-}
-
-#################################################################
-# filter out version-specific code
-
-sub filter_source ($$) {
- my ($in,$out) = @_;
- my $line;
- my $level=0;
- my %if = ();
- my %state = ();
-
- my @dbgargs = \($level, %state, %if, $line);
- sub dbgline($\@) {
- my $level = ${$_[1][0]};
- printf STDERR ("/* BP %4d $_[0] state=$_[1][1]->{$level} if=$_[1][2]->{$level} level=$level (${$_[1][3]}) */\n", $.) if $DEBUG;
- }
-
- open IN, '<', $in or die "Error opening $in: $!\n";
- open OUT, '>', $out or die "Error opening $out: $!\n";
-
- print STDERR "File: $in, for kernel $VERSION($LINUXCODE)/\n" if $DEBUG;
-
- while ($line = <IN>) {
- chomp $line;
- next if ($line =~ m/^#include \"compat.h\"/o);
-# next if ($line =~ m/[\$]Id:/);
-
- # For "#if 0 /*KEEP*/;" the ; should be dropped too
- if ($line =~ m@^\s*#\s*if(n?def)?\s.*?(\s*/\*\s*(?i)keep\s*\*/;?)@) {
- $state{$level} = "ifother";
- $if{$level} = 1;
- dbgline "#if$1 (keep)", @dbgargs;
- $line =~ s/\Q$2\E//;
- $level++;
- }
- # handle all ifdef/ifndef lines
- elsif ($line =~ /^\s*#\s*if(n?)def\s*(\w+)/o) {
- if (exists $defs{$2}) {
- $state{$level} = 'if';
- $if{$level} = ($1 eq 'n') ? !$defs{$2} : $defs{$2};
- dbgline "#if$1def $2", @dbgargs;
- $level++;
- next;
- }
- $state{$level} = "ifother";
- $if{$level} = 1;
- dbgline "#if$1def (other)", @dbgargs;
- $level++;
- }
- # handle all ifs
- elsif ($line =~ /^\s*#\s*if\s+(.*)$/o) {
- my $res = evalexp($1);
- if (defined $res) {
- $state{$level} = 'if';
- $if{$level} = $res;
- dbgline '#if '.($res?'(yes)':'(no)'), @dbgargs;
- $level++;
- next;
- } else {
- $state{$level} = 'ifother';
- $if{$level} = 1;
- dbgline '#if (other)', @dbgargs;
- $level++;
- }
- }
- # handle all elifs
- elsif ($line =~ /^\s*#\s*elif\s+(.*)$/o) {
- my $exp = $1;
- $level--;
- $level < 0 and die "more elifs than ifs";
- $state{$level} =~ /if/ or die "unmatched elif";
-
- if ($state{$level} eq 'if' && !$if{$level}) {
- my $res = evalexp($exp);
- defined $res or die 'moving from if to ifother';
- $state{$level} = 'if';
- $if{$level} = $res;
- dbgline '#elif1 '.($res?'(yes)':'(no)'), @dbgargs;
- $level++;
- next;
- } elsif ($state{$level} ne 'ifother') {
- $if{$level} = 0;
- $state{$level} = 'elif';
- dbgline '#elif0', @dbgargs;
- $level++;
- next;
- }
- $level++;
- }
- elsif ($line =~ /^\s*#\s*else/o) {
- $level--;
- $level < 0 and die "more elses than ifs";
- $state{$level} =~ /if/ or die "unmatched else";
- $if{$level} = !$if{$level} if ($state{$level} eq 'if');
- $state{$level} =~ s/^if/else/o; # if -> else, ifother -> elseother, elif -> elif
- dbgline '#else', @dbgargs;
- $level++;
- next if $state{$level-1} !~ /other$/o;
- }
- elsif ($line =~ /^\s*#\s*endif/o) {
- $level--;
- $level < 0 and die "more endifs than ifs";
- dbgline '#endif', @dbgargs;
- next if $state{$level} !~ /other$/o;
- }
-
- my $print = 1;
- for (my $i=0;$i<$level;$i++) {
- next if $state{$i} =~ /other$/o; # keep code in ifother/elseother blocks
- if (!$if{$i}) {
- $print = 0;
- dbgline 'DEL', @{[\$i, \%state, \%if, \$line]};
- last;
- }
- }
- print OUT "$line\n" if $print;
- }
- close IN;
- close OUT;
-}
-
-#################################################################
-
-sub parse_dir {
- my $file = $File::Find::name;
-
- return if ($file =~ /CVS/);
- return if ($file =~ /~$/);
-
- my $f2 = $file;
- $f2 =~ s/^\Q$SRC\E/$DESTDIR/;
-
- my $mode = (stat($file))[2];
- if ($mode & S_IFDIR) {
- print("mkdir -p '$f2'\n");
- system("mkdir -p '$f2'"); # should check for error
- return;
- }
- print "from $file to $f2\n";
-
- if ($file =~ m/.*\.[ch]$/) {
- filter_source($file, $f2);
- } else {
- system("cp $file $f2");
- }
-}
-
-
-# main
-
-printf "kernel is %s (0x%x)\n",$VERSION,$LINUXCODE;
-
-# remove any trailing slashes from dir names. don't pass in just '/'
-$SRC =~ s|/*$||; $DESTDIR =~ s|/*$||;
-
-print "finding files at $SRC\n";
-
-find({wanted => \&parse_dir, no_chdir => 1}, $SRC);
+++ /dev/null
-# Copyright 2005 Adam Jackson.
-#
-# Permission is hereby granted, free of charge, to any person obtaining a
-# copy of this software and associated documentation files (the "Software"),
-# to deal in the Software without restriction, including without limitation
-# on the rights to use, copy, modify, merge, publish, distribute, sub
-# license, and/or sell copies of the Software, and to permit persons to whom
-# the Software is furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice (including the next
-# paragraph) shall be included in all copies or substantial portions of the
-# Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-# XXX airlied says, nothing besides *_drm.h and drm*.h should be necessary.
-# however, r300 and via need their reg headers installed in order to build.
-# better solutions are welcome.
-
-klibdrmincludedir = ${includedir}/drm
-klibdrminclude_HEADERS = \
- drm.h \
- drm_mode.h \
- drm_sarea.h \
- i915_drm.h \
- mach64_drm.h \
- mga_drm.h \
- nouveau_drm.h \
- r128_drm.h \
- radeon_drm.h \
- savage_drm.h \
- sis_drm.h \
- via_drm.h \
- r300_reg.h \
- via_3d_reg.h \
- xgi_drm.h
+++ /dev/null
-/**
- * \file drm.h
- * Header for the Direct Rendering Manager
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- *
- * \par Acknowledgments:
- * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
- */
-
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/**
- * \mainpage
- *
- * The Direct Rendering Manager (DRM) is a device-independent kernel-level
- * device driver that provides support for the XFree86 Direct Rendering
- * Infrastructure (DRI).
- *
- * The DRM supports the Direct Rendering Infrastructure (DRI) in four major
- * ways:
- * -# The DRM provides synchronized access to the graphics hardware via
- * the use of an optimized two-tiered lock.
- * -# The DRM enforces the DRI security policy for access to the graphics
- * hardware by only allowing authenticated X11 clients access to
- * restricted regions of memory.
- * -# The DRM provides a generic DMA engine, complete with multiple
- * queues and the ability to detect the need for an OpenGL context
- * switch.
- * -# The DRM is extensible via the use of small device-specific modules
- * that rely extensively on the API exported by the DRM module.
- *
- */
-
-#ifndef _DRM_H_
-#define _DRM_H_
-
-#ifndef __user
-#define __user
-#endif
-#ifndef __iomem
-#define __iomem
-#endif
-
-#ifdef __GNUC__
-# define DEPRECATED __attribute__ ((deprecated))
-#else
-# define DEPRECATED
-# ifndef __FUNCTION__
-# define __FUNCTION__ __func__ /* C99 */
-# endif
-# ifndef __volatile__
-# define __volatile__ volatile
-# endif
-#endif
-
-#if defined(__linux__)
-#include <asm/ioctl.h> /* For _IO* macros */
-#define DRM_IOCTL_NR(n) _IOC_NR(n)
-#define DRM_IOC_VOID _IOC_NONE
-#define DRM_IOC_READ _IOC_READ
-#define DRM_IOC_WRITE _IOC_WRITE
-#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
-#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
-#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__)
-#include <sys/ioccom.h>
-#define DRM_IOCTL_NR(n) ((n) & 0xff)
-#define DRM_IOC_VOID IOC_VOID
-#define DRM_IOC_READ IOC_OUT
-#define DRM_IOC_WRITE IOC_IN
-#define DRM_IOC_READWRITE IOC_INOUT
-#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
-#endif
-
-#ifdef __OpenBSD__
-#define DRM_MAJOR 81
-#endif
-#if defined(__linux__) || defined(__NetBSD__)
-#define DRM_MAJOR 226
-#endif
-#define DRM_MAX_MINOR 15
-
-#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
-#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
-#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
-#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
-
-#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
-#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
-#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
-#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
-#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
-
-#if defined(__linux__)
-typedef unsigned int drm_handle_t;
-#else
-#include <sys/types.h>
-typedef unsigned long drm_handle_t; /**< To mapped regions */
-#endif
-typedef unsigned int drm_context_t; /**< GLXContext handle */
-typedef unsigned int drm_drawable_t;
-typedef unsigned int drm_magic_t; /**< Magic for authentication */
-
-/**
- * Cliprect.
- *
- * \warning If you change this structure, make sure you change
- * XF86DRIClipRectRec in the server as well
- *
- * \note KW: Actually it's illegal to change either for
- * backwards-compatibility reasons.
- */
-struct drm_clip_rect {
- unsigned short x1;
- unsigned short y1;
- unsigned short x2;
- unsigned short y2;
-};
-
-/**
- * Texture region,
- */
-struct drm_tex_region {
- unsigned char next;
- unsigned char prev;
- unsigned char in_use;
- unsigned char padding;
- unsigned int age;
-};
-
-/**
- * Hardware lock.
- *
- * The lock structure is a simple cache-line aligned integer. To avoid
- * processor bus contention on a multiprocessor system, there should not be any
- * other data stored in the same cache line.
- */
-struct drm_hw_lock {
- __volatile__ unsigned int lock; /**< lock variable */
- char padding[60]; /**< Pad to cache line */
-};
-
-/* This is beyond ugly, and only works on GCC. However, it allows me to use
- * drm.h in places (i.e., in the X-server) where I can't use size_t. The real
- * fix is to use uint32_t instead of size_t, but that fix will break existing
- * LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems. That *will*
- * eventually happen, though. I chose 'unsigned long' to be the fallback type
- * because that works on all the platforms I know about. Hopefully, the
- * real fix will happen before that bites us.
- */
-
-#ifdef __SIZE_TYPE__
-# define DRM_SIZE_T __SIZE_TYPE__
-#else
-# warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!"
-# define DRM_SIZE_T unsigned long
-#endif
-
-/**
- * DRM_IOCTL_VERSION ioctl argument type.
- *
- * \sa drmGetVersion().
- */
-struct drm_version {
- int version_major; /**< Major version */
- int version_minor; /**< Minor version */
- int version_patchlevel; /**< Patch level */
- DRM_SIZE_T name_len; /**< Length of name buffer */
- char __user *name; /**< Name of driver */
- DRM_SIZE_T date_len; /**< Length of date buffer */
- char __user *date; /**< User-space buffer to hold date */
- DRM_SIZE_T desc_len; /**< Length of desc buffer */
- char __user *desc; /**< User-space buffer to hold desc */
-};
-
-/**
- * DRM_IOCTL_GET_UNIQUE ioctl argument type.
- *
- * \sa drmGetBusid() and drmSetBusId().
- */
-struct drm_unique {
- DRM_SIZE_T unique_len; /**< Length of unique */
- char __user *unique; /**< Unique name for driver instantiation */
-};
-
-#undef DRM_SIZE_T
-
-struct drm_list {
- int count; /**< Length of user-space structures */
- struct drm_version __user *version;
-};
-
-struct drm_block {
- int unused;
-};
-
-/**
- * DRM_IOCTL_CONTROL ioctl argument type.
- *
- * \sa drmCtlInstHandler() and drmCtlUninstHandler().
- */
-struct drm_control {
- enum {
- DRM_ADD_COMMAND,
- DRM_RM_COMMAND,
- DRM_INST_HANDLER,
- DRM_UNINST_HANDLER
- } func;
- int irq;
-};
-
-/**
- * Type of memory to map.
- */
-enum drm_map_type {
- _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
- _DRM_REGISTERS = 1, /**< no caching, no core dump */
- _DRM_SHM = 2, /**< shared, cached */
- _DRM_AGP = 3, /**< AGP/GART */
- _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
- _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
- _DRM_GEM = 6,
- _DRM_TTM = 7,
-};
-
-/**
- * Memory mapping flags.
- */
-enum drm_map_flags {
- _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
- _DRM_READ_ONLY = 0x02,
- _DRM_LOCKED = 0x04, /**< shared, cached, locked */
- _DRM_KERNEL = 0x08, /**< kernel requires access */
- _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
- _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
- _DRM_REMOVABLE = 0x40, /**< Removable mapping */
- _DRM_DRIVER = 0x80 /**< Managed by driver */
-};
-
-struct drm_ctx_priv_map {
- unsigned int ctx_id; /**< Context requesting private mapping */
- void *handle; /**< Handle of map */
-};
-
-/**
- * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
- * argument type.
- *
- * \sa drmAddMap().
- */
-struct drm_map {
- unsigned long offset; /**< Requested physical address (0 for SAREA)*/
- unsigned long size; /**< Requested physical size (bytes) */
- enum drm_map_type type; /**< Type of memory to map */
- enum drm_map_flags flags; /**< Flags */
- void *handle; /**< User-space: "Handle" to pass to mmap() */
- /**< Kernel-space: kernel-virtual address */
- int mtrr; /**< MTRR slot used */
- /* Private data */
-};
-
-/**
- * DRM_IOCTL_GET_CLIENT ioctl argument type.
- */
-struct drm_client {
- int idx; /**< Which client desired? */
- int auth; /**< Is client authenticated? */
- unsigned long pid; /**< Process ID */
- unsigned long uid; /**< User ID */
- unsigned long magic; /**< Magic */
- unsigned long iocs; /**< Ioctl count */
-};
-
-enum drm_stat_type {
- _DRM_STAT_LOCK,
- _DRM_STAT_OPENS,
- _DRM_STAT_CLOSES,
- _DRM_STAT_IOCTLS,
- _DRM_STAT_LOCKS,
- _DRM_STAT_UNLOCKS,
- _DRM_STAT_VALUE, /**< Generic value */
- _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
- _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
-
- _DRM_STAT_IRQ, /**< IRQ */
- _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
- _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
- _DRM_STAT_DMA, /**< DMA */
- _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
- _DRM_STAT_MISSED /**< Missed DMA opportunity */
- /* Add to the *END* of the list */
-};
-
-/**
- * DRM_IOCTL_GET_STATS ioctl argument type.
- */
-struct drm_stats {
- unsigned long count;
- struct {
- unsigned long value;
- enum drm_stat_type type;
- } data[15];
-};
-
-/**
- * Hardware locking flags.
- */
-enum drm_lock_flags {
- _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
- _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
- _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
- _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
- /* These *HALT* flags aren't supported yet
- -- they will be used to support the
- full-screen DGA-like mode. */
- _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
- _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
-};
-
-/**
- * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
- *
- * \sa drmGetLock() and drmUnlock().
- */
-struct drm_lock {
- int context;
- enum drm_lock_flags flags;
-};
-
-/**
- * DMA flags
- *
- * \warning
- * These values \e must match xf86drm.h.
- *
- * \sa drm_dma.
- */
-enum drm_dma_flags {
- /* Flags for DMA buffer dispatch */
- _DRM_DMA_BLOCK = 0x01, /**<
- * Block until buffer dispatched.
- *
- * \note The buffer may not yet have
- * been processed by the hardware --
- * getting a hardware lock with the
- * hardware quiescent will ensure
- * that the buffer has been
- * processed.
- */
- _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
- _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
-
- /* Flags for DMA buffer request */
- _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
- _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
- _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
-};
-
-/**
- * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
- *
- * \sa drmAddBufs().
- */
-struct drm_buf_desc {
- int count; /**< Number of buffers of this size */
- int size; /**< Size in bytes */
- int low_mark; /**< Low water mark */
- int high_mark; /**< High water mark */
- enum {
- _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
- _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
- _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
- _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
- _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
- } flags;
- unsigned long agp_start; /**<
- * Start address of where the AGP buffers are
- * in the AGP aperture
- */
-};
-
-/**
- * DRM_IOCTL_INFO_BUFS ioctl argument type.
- */
-struct drm_buf_info {
- int count; /**< Number of buffers described in list */
- struct drm_buf_desc __user *list; /**< List of buffer descriptions */
-};
-
-/**
- * DRM_IOCTL_FREE_BUFS ioctl argument type.
- */
-struct drm_buf_free {
- int count;
- int __user *list;
-};
-
-/**
- * Buffer information
- *
- * \sa drm_buf_map.
- */
-struct drm_buf_pub {
- int idx; /**< Index into the master buffer list */
- int total; /**< Buffer size */
- int used; /**< Amount of buffer in use (for DMA) */
- void __user *address; /**< Address of buffer */
-};
-
-/**
- * DRM_IOCTL_MAP_BUFS ioctl argument type.
- */
-struct drm_buf_map {
- int count; /**< Length of the buffer list */
-#if defined(__cplusplus)
- void __user *c_virtual;
-#else
- void __user *virtual; /**< Mmap'd area in user-virtual */
-#endif
- struct drm_buf_pub __user *list; /**< Buffer information */
-};
-
-/**
- * DRM_IOCTL_DMA ioctl argument type.
- *
- * Indices here refer to the offset into the buffer list in drm_buf_get.
- *
- * \sa drmDMA().
- */
-struct drm_dma {
- int context; /**< Context handle */
- int send_count; /**< Number of buffers to send */
- int __user *send_indices; /**< List of handles to buffers */
- int __user *send_sizes; /**< Lengths of data to send */
- enum drm_dma_flags flags; /**< Flags */
- int request_count; /**< Number of buffers requested */
- int request_size; /**< Desired size for buffers */
- int __user *request_indices; /**< Buffer information */
- int __user *request_sizes;
- int granted_count; /**< Number of buffers granted */
-};
-
-enum drm_ctx_flags {
- _DRM_CONTEXT_PRESERVED = 0x01,
- _DRM_CONTEXT_2DONLY = 0x02
-};
-
-/**
- * DRM_IOCTL_ADD_CTX ioctl argument type.
- *
- * \sa drmCreateContext() and drmDestroyContext().
- */
-struct drm_ctx {
- drm_context_t handle;
- enum drm_ctx_flags flags;
-};
-
-/**
- * DRM_IOCTL_RES_CTX ioctl argument type.
- */
-struct drm_ctx_res {
- int count;
- struct drm_ctx __user *contexts;
-};
-
-/**
- * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
- */
-struct drm_draw {
- drm_drawable_t handle;
-};
-
-/**
- * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
- */
-typedef enum {
- DRM_DRAWABLE_CLIPRECTS,
-} drm_drawable_info_type_t;
-
-struct drm_update_draw {
- drm_drawable_t handle;
- unsigned int type;
- unsigned int num;
- unsigned long long data;
-};
-
-/**
- * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
- */
-struct drm_auth {
- drm_magic_t magic;
-};
-
-/**
- * DRM_IOCTL_IRQ_BUSID ioctl argument type.
- *
- * \sa drmGetInterruptFromBusID().
- */
-struct drm_irq_busid {
- int irq; /**< IRQ number */
- int busnum; /**< bus number */
- int devnum; /**< device number */
- int funcnum; /**< function number */
-};
-
-enum drm_vblank_seq_type {
- _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
- _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
- _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
- _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
- _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
- _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
-};
-
-#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
-#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \
- _DRM_VBLANK_NEXTONMISS)
-
-struct drm_wait_vblank_request {
- enum drm_vblank_seq_type type;
- unsigned int sequence;
- unsigned long signal;
-};
-
-struct drm_wait_vblank_reply {
- enum drm_vblank_seq_type type;
- unsigned int sequence;
- long tval_sec;
- long tval_usec;
-};
-
-/**
- * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
- *
- * \sa drmWaitVBlank().
- */
-union drm_wait_vblank {
- struct drm_wait_vblank_request request;
- struct drm_wait_vblank_reply reply;
-};
-
-
-#define _DRM_PRE_MODESET 1
-#define _DRM_POST_MODESET 2
-
-/**
- * DRM_IOCTL_MODESET_CTL ioctl argument type
- *
- * \sa drmModesetCtl().
- */
-struct drm_modeset_ctl {
- uint32_t crtc;
- uint32_t cmd;
-};
-
-/**
- * DRM_IOCTL_AGP_ENABLE ioctl argument type.
- *
- * \sa drmAgpEnable().
- */
-struct drm_agp_mode {
- unsigned long mode; /**< AGP mode */
-};
-
-/**
- * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
- *
- * \sa drmAgpAlloc() and drmAgpFree().
- */
-struct drm_agp_buffer {
- unsigned long size; /**< In bytes -- will round to page boundary */
- unsigned long handle; /**< Used for binding / unbinding */
- unsigned long type; /**< Type of memory to allocate */
- unsigned long physical; /**< Physical used by i810 */
-};
-
-/**
- * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
- *
- * \sa drmAgpBind() and drmAgpUnbind().
- */
-struct drm_agp_binding {
- unsigned long handle; /**< From drm_agp_buffer */
- unsigned long offset; /**< In bytes -- will round to page boundary */
-};
-
-/**
- * DRM_IOCTL_AGP_INFO ioctl argument type.
- *
- * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
- * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
- * drmAgpVendorId() and drmAgpDeviceId().
- */
-struct drm_agp_info {
- int agp_version_major;
- int agp_version_minor;
- unsigned long mode;
- unsigned long aperture_base; /**< physical address */
- unsigned long aperture_size; /**< bytes */
- unsigned long memory_allowed; /**< bytes */
- unsigned long memory_used;
-
- /** \name PCI information */
- /*@{ */
- unsigned short id_vendor;
- unsigned short id_device;
- /*@} */
-};
-
-/**
- * DRM_IOCTL_SG_ALLOC ioctl argument type.
- */
-struct drm_scatter_gather {
- unsigned long size; /**< In bytes -- will round to page boundary */
- unsigned long handle; /**< Used for mapping / unmapping */
-};
-
-/**
- * DRM_IOCTL_SET_VERSION ioctl argument type.
- */
-struct drm_set_version {
- int drm_di_major;
- int drm_di_minor;
- int drm_dd_major;
- int drm_dd_minor;
-};
-
-struct drm_gem_close {
- /** Handle of the object to be closed. */
- uint32_t handle;
- uint32_t pad;
-};
-
-struct drm_gem_flink {
- /** Handle for the object being named */
- uint32_t handle;
-
- /** Returned global name */
- uint32_t name;
-};
-
-struct drm_gem_open {
- /** Name of object being opened */
- uint32_t name;
-
- /** Returned handle for the object */
- uint32_t handle;
-
- /** Returned size of the object */
- uint64_t size;
-};
-
-#include "drm_mode.h"
-
-/**
- * \name Ioctls Definitions
- */
-/*@{*/
-
-#define DRM_IOCTL_BASE 'd'
-#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
-#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
-#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
-#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
-
-#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
-#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
-#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
-#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
-#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
-#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
-#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
-#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
-#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
-
-#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
-#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
-#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
-
-#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
-#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
-#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
-#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
-#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
-#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
-#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
-#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
-#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
-#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
-#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
-
-#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
-
-#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
-#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
-
-#define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)
-#define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)
-
-#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
-#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
-#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
-#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
-#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
-#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
-#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
-#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
-#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
-#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
-#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
-#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
-#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
-
-#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
-#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
-#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
-#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
-#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
-#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
-#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
-#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
-
-#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
-#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
-
-#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
-
-#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
-
-#define DRM_IOCTL_MM_INIT DRM_IOWR(0xc0, struct drm_mm_init_arg)
-#define DRM_IOCTL_MM_TAKEDOWN DRM_IOWR(0xc1, struct drm_mm_type_arg)
-#define DRM_IOCTL_MM_LOCK DRM_IOWR(0xc2, struct drm_mm_type_arg)
-#define DRM_IOCTL_MM_UNLOCK DRM_IOWR(0xc3, struct drm_mm_type_arg)
-
-#define DRM_IOCTL_FENCE_CREATE DRM_IOWR(0xc4, struct drm_fence_arg)
-#define DRM_IOCTL_FENCE_REFERENCE DRM_IOWR(0xc6, struct drm_fence_arg)
-#define DRM_IOCTL_FENCE_UNREFERENCE DRM_IOWR(0xc7, struct drm_fence_arg)
-#define DRM_IOCTL_FENCE_SIGNALED DRM_IOWR(0xc8, struct drm_fence_arg)
-#define DRM_IOCTL_FENCE_FLUSH DRM_IOWR(0xc9, struct drm_fence_arg)
-#define DRM_IOCTL_FENCE_WAIT DRM_IOWR(0xca, struct drm_fence_arg)
-#define DRM_IOCTL_FENCE_EMIT DRM_IOWR(0xcb, struct drm_fence_arg)
-#define DRM_IOCTL_FENCE_BUFFERS DRM_IOWR(0xcc, struct drm_fence_arg)
-
-#define DRM_IOCTL_BO_CREATE DRM_IOWR(0xcd, struct drm_bo_create_arg)
-#define DRM_IOCTL_BO_MAP DRM_IOWR(0xcf, struct drm_bo_map_wait_idle_arg)
-#define DRM_IOCTL_BO_UNMAP DRM_IOWR(0xd0, struct drm_bo_handle_arg)
-#define DRM_IOCTL_BO_REFERENCE DRM_IOWR(0xd1, struct drm_bo_reference_info_arg)
-#define DRM_IOCTL_BO_UNREFERENCE DRM_IOWR(0xd2, struct drm_bo_handle_arg)
-#define DRM_IOCTL_BO_SETSTATUS DRM_IOWR(0xd3, struct drm_bo_map_wait_idle_arg)
-#define DRM_IOCTL_BO_INFO DRM_IOWR(0xd4, struct drm_bo_reference_info_arg)
-#define DRM_IOCTL_BO_WAIT_IDLE DRM_IOWR(0xd5, struct drm_bo_map_wait_idle_arg)
-#define DRM_IOCTL_BO_VERSION DRM_IOR(0xd6, struct drm_bo_version_arg)
-#define DRM_IOCTL_MM_INFO DRM_IOWR(0xd7, struct drm_mm_info_arg)
-
-#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
-
-#define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc)
-#define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc)
-#define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor)
-#define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
-#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
-
-#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
-
-#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
-#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd)
-#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd)
-#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
-#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
-#define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob)
-
-#define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
-#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
-#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, uint32_t)
-
-/*@}*/
-
-/**
- * Device specific ioctls should only be in their respective headers
- * The device specific ioctl range is from 0x40 to 0x99.
- * Generic IOCTLS restart at 0xA0.
- *
- * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
- * drmCommandReadWrite().
- */
-#define DRM_COMMAND_BASE 0x40
-#define DRM_COMMAND_END 0xA0
-
-/**
- * Header for events written back to userspace on the drm fd. The
- * type defines the type of event, the length specifies the total
- * length of the event (including the header), and user_data is
- * typically a 64 bit value passed with the ioctl that triggered the
- * event. A read on the drm fd will always only return complete
- * events, that is, if for example the read buffer is 100 bytes, and
- * there are two 64 byte events pending, only one will be returned.
- *
- * Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and
- * up are chipset specific.
- */
-struct drm_event {
- uint32_t type;
- uint32_t length;
-};
-
-#define DRM_EVENT_VBLANK 0x01
-
-struct drm_event_vblank {
- struct drm_event base;
- uint64_t user_data;
- uint32_t tv_sec;
- uint32_t tv_usec;
- uint32_t sequence;
- uint32_t reserved;
-};
-
-/* typedef area */
-#ifndef __KERNEL__
-typedef struct drm_clip_rect drm_clip_rect_t;
-typedef struct drm_tex_region drm_tex_region_t;
-typedef struct drm_hw_lock drm_hw_lock_t;
-typedef struct drm_version drm_version_t;
-typedef struct drm_unique drm_unique_t;
-typedef struct drm_list drm_list_t;
-typedef struct drm_block drm_block_t;
-typedef struct drm_control drm_control_t;
-typedef enum drm_map_type drm_map_type_t;
-typedef enum drm_map_flags drm_map_flags_t;
-typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
-typedef struct drm_map drm_map_t;
-typedef struct drm_client drm_client_t;
-typedef enum drm_stat_type drm_stat_type_t;
-typedef struct drm_stats drm_stats_t;
-typedef enum drm_lock_flags drm_lock_flags_t;
-typedef struct drm_lock drm_lock_t;
-typedef enum drm_dma_flags drm_dma_flags_t;
-typedef struct drm_buf_desc drm_buf_desc_t;
-typedef struct drm_buf_info drm_buf_info_t;
-typedef struct drm_buf_free drm_buf_free_t;
-typedef struct drm_buf_pub drm_buf_pub_t;
-typedef struct drm_buf_map drm_buf_map_t;
-typedef struct drm_dma drm_dma_t;
-typedef union drm_wait_vblank drm_wait_vblank_t;
-typedef struct drm_agp_mode drm_agp_mode_t;
-typedef enum drm_ctx_flags drm_ctx_flags_t;
-typedef struct drm_ctx drm_ctx_t;
-typedef struct drm_ctx_res drm_ctx_res_t;
-typedef struct drm_draw drm_draw_t;
-typedef struct drm_update_draw drm_update_draw_t;
-typedef struct drm_auth drm_auth_t;
-typedef struct drm_irq_busid drm_irq_busid_t;
-typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
-typedef struct drm_agp_buffer drm_agp_buffer_t;
-typedef struct drm_agp_binding drm_agp_binding_t;
-typedef struct drm_agp_info drm_agp_info_t;
-typedef struct drm_scatter_gather drm_scatter_gather_t;
-typedef struct drm_set_version drm_set_version_t;
-
-typedef struct drm_fence_arg drm_fence_arg_t;
-typedef struct drm_mm_type_arg drm_mm_type_arg_t;
-typedef struct drm_mm_init_arg drm_mm_init_arg_t;
-#endif
-
-#endif
+++ /dev/null
-/*
- * Copyright 2007 Red Hat, Inc
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/* This header file holds function prototypes and data types that are
- * internal to the drm (not exported to user space) but shared across
- * drivers and platforms */
-
-#ifndef __DRM_INTERNAL_H__
-#define __DRM_INTERNAL_H__
-
-/**
- * Drawable information.
- */
-struct drm_drawable_info {
- unsigned int num_rects;
- struct drm_clip_rect *rects;
-};
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
- * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
- * Copyright (c) 2008 Red Hat Inc.
- * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
- * Copyright (c) 2007-2008 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-#ifndef _DRM_MODE_H
-#define _DRM_MODE_H
-
-#ifdef __linux__
-#if !defined(__KERNEL__) && !defined(_KERNEL)
-#include <stdint.h>
-#else
-#include <linux/kernel.h>
-#endif
-#endif
-
-#define DRM_DISPLAY_INFO_LEN 32
-#define DRM_CONNECTOR_NAME_LEN 32
-#define DRM_DISPLAY_MODE_LEN 32
-#define DRM_PROP_NAME_LEN 32
-
-#define DRM_MODE_TYPE_BUILTIN (1<<0)
-#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
-#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
-#define DRM_MODE_TYPE_PREFERRED (1<<3)
-#define DRM_MODE_TYPE_DEFAULT (1<<4)
-#define DRM_MODE_TYPE_USERDEF (1<<5)
-#define DRM_MODE_TYPE_DRIVER (1<<6)
-
-/* Video mode flags */
-/* bit compatible with the xorg definitions. */
-#define DRM_MODE_FLAG_PHSYNC (1<<0)
-#define DRM_MODE_FLAG_NHSYNC (1<<1)
-#define DRM_MODE_FLAG_PVSYNC (1<<2)
-#define DRM_MODE_FLAG_NVSYNC (1<<3)
-#define DRM_MODE_FLAG_INTERLACE (1<<4)
-#define DRM_MODE_FLAG_DBLSCAN (1<<5)
-#define DRM_MODE_FLAG_CSYNC (1<<6)
-#define DRM_MODE_FLAG_PCSYNC (1<<7)
-#define DRM_MODE_FLAG_NCSYNC (1<<8)
-#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
-#define DRM_MODE_FLAG_BCAST (1<<10)
-#define DRM_MODE_FLAG_PIXMUX (1<<11)
-#define DRM_MODE_FLAG_DBLCLK (1<<12)
-#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
-
-/* DPMS flags */
-/* bit compatible with the xorg definitions. */
-#define DRM_MODE_DPMS_ON 0
-#define DRM_MODE_DPMS_STANDBY 1
-#define DRM_MODE_DPMS_SUSPEND 2
-#define DRM_MODE_DPMS_OFF 3
-
-/* Scaling mode options */
-#define DRM_MODE_SCALE_NON_GPU 0
-#define DRM_MODE_SCALE_FULLSCREEN 1
-#define DRM_MODE_SCALE_NO_SCALE 2
-#define DRM_MODE_SCALE_ASPECT 3
-
-/* Dithering mode options */
-#define DRM_MODE_DITHERING_OFF 0
-#define DRM_MODE_DITHERING_ON 1
-
-struct drm_mode_modeinfo {
- uint32_t clock;
- uint16_t hdisplay, hsync_start, hsync_end, htotal, hskew;
- uint16_t vdisplay, vsync_start, vsync_end, vtotal, vscan;
-
- uint32_t vrefresh; /* vertical refresh * 1000 */
-
- uint32_t flags;
- uint32_t type;
- char name[DRM_DISPLAY_MODE_LEN];
-};
-
-struct drm_mode_card_res {
- uint64_t fb_id_ptr;
- uint64_t crtc_id_ptr;
- uint64_t connector_id_ptr;
- uint64_t encoder_id_ptr;
- uint32_t count_fbs;
- uint32_t count_crtcs;
- uint32_t count_connectors;
- uint32_t count_encoders;
- uint32_t min_width, max_width;
- uint32_t min_height, max_height;
-};
-
-struct drm_mode_crtc {
- uint64_t set_connectors_ptr;
- uint32_t count_connectors;
-
- uint32_t crtc_id; /**< Id */
- uint32_t fb_id; /**< Id of framebuffer */
-
- uint32_t x, y; /**< Position on the frameuffer */
-
- uint32_t gamma_size;
- uint32_t mode_valid;
- struct drm_mode_modeinfo mode;
-};
-
-#define DRM_MODE_ENCODER_NONE 0
-#define DRM_MODE_ENCODER_DAC 1
-#define DRM_MODE_ENCODER_TMDS 2
-#define DRM_MODE_ENCODER_LVDS 3
-#define DRM_MODE_ENCODER_TVDAC 4
-
-struct drm_mode_get_encoder {
- uint32_t encoder_id;
- uint32_t encoder_type;
-
- uint32_t crtc_id; /**< Id of crtc */
-
- uint32_t possible_crtcs;
- uint32_t possible_clones;
-};
-
-/* This is for connectors with multiple signal types. */
-/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
-#define DRM_MODE_SUBCONNECTOR_Automatic 0
-#define DRM_MODE_SUBCONNECTOR_Unknown 0
-#define DRM_MODE_SUBCONNECTOR_DVID 3
-#define DRM_MODE_SUBCONNECTOR_DVIA 4
-#define DRM_MODE_SUBCONNECTOR_Composite 5
-#define DRM_MODE_SUBCONNECTOR_SVIDEO 6
-#define DRM_MODE_SUBCONNECTOR_Component 8
-
-#define DRM_MODE_CONNECTOR_Unknown 0
-#define DRM_MODE_CONNECTOR_VGA 1
-#define DRM_MODE_CONNECTOR_DVII 2
-#define DRM_MODE_CONNECTOR_DVID 3
-#define DRM_MODE_CONNECTOR_DVIA 4
-#define DRM_MODE_CONNECTOR_Composite 5
-#define DRM_MODE_CONNECTOR_SVIDEO 6
-#define DRM_MODE_CONNECTOR_LVDS 7
-#define DRM_MODE_CONNECTOR_Component 8
-#define DRM_MODE_CONNECTOR_9PinDIN 9
-#define DRM_MODE_CONNECTOR_DisplayPort 10
-#define DRM_MODE_CONNECTOR_HDMIA 11
-#define DRM_MODE_CONNECTOR_HDMIB 12
-
-struct drm_mode_get_connector {
-
- uint64_t encoders_ptr;
- uint64_t modes_ptr;
- uint64_t props_ptr;
- uint64_t prop_values_ptr;
-
- uint32_t count_modes;
- uint32_t count_props;
- uint32_t count_encoders;
-
- uint32_t encoder_id; /**< Current Encoder */
- uint32_t connector_id; /**< Id */
- uint32_t connector_type;
- uint32_t connector_type_id;
-
- uint32_t connection;
- uint32_t mm_width, mm_height; /**< HxW in millimeters */
- uint32_t subpixel;
-};
-
-#define DRM_MODE_PROP_PENDING (1<<0)
-#define DRM_MODE_PROP_RANGE (1<<1)
-#define DRM_MODE_PROP_IMMUTABLE (1<<2)
-#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
-#define DRM_MODE_PROP_BLOB (1<<4)
-
-struct drm_mode_property_enum {
- uint64_t value;
- char name[DRM_PROP_NAME_LEN];
-};
-
-struct drm_mode_get_property {
- uint64_t values_ptr; /* values and blob lengths */
- uint64_t enum_blob_ptr; /* enum and blob id ptrs */
-
- uint32_t prop_id;
- uint32_t flags;
- char name[DRM_PROP_NAME_LEN];
-
- uint32_t count_values;
- uint32_t count_enum_blobs;
-};
-
-struct drm_mode_connector_set_property {
- uint64_t value;
- uint32_t prop_id;
- uint32_t connector_id;
-};
-
-struct drm_mode_get_blob {
- uint32_t blob_id;
- uint32_t length;
- uint64_t data;
-};
-
-struct drm_mode_fb_cmd {
- uint32_t fb_id;
- uint32_t width, height;
- uint32_t pitch;
- uint32_t bpp;
- uint32_t depth;
- /* driver specific handle */
- uint32_t handle;
-};
-
-struct drm_mode_mode_cmd {
- uint32_t connector_id;
- struct drm_mode_modeinfo mode;
-};
-
-#define DRM_MODE_CURSOR_BO (1<<0)
-#define DRM_MODE_CURSOR_MOVE (1<<1)
-
-/*
- * depending on the value in flags diffrent members are used.
- *
- * CURSOR_BO uses
- * crtc
- * width
- * height
- * handle - if 0 turns the cursor of
- *
- * CURSOR_MOVE uses
- * crtc
- * x
- * y
- */
-struct drm_mode_cursor {
- uint32_t flags;
- uint32_t crtc_id;
- int32_t x;
- int32_t y;
- uint32_t width;
- uint32_t height;
- /* driver specific handle */
- uint32_t handle;
-};
-
-struct drm_mode_crtc_lut {
- uint32_t crtc_id;
- uint32_t gamma_size;
-
- /* pointers to arrays */
- uint64_t red;
- uint64_t green;
- uint64_t blue;
-};
-
-#endif
+++ /dev/null
-[radeon]
-0x1002 0x3150 CHIP_RV380|RADEON_IS_MOBILITY "ATI Radeon Mobility X600 M24"
-0x1002 0x3152 CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Radeon Mobility X300 M24"
-0x1002 0x3154 CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI FireGL M24 GL"
-0x1002 0x3E50 CHIP_RV380|RADEON_NEW_MEMMAP "ATI Radeon RV380 X600"
-0x1002 0x3E54 CHIP_RV380|RADEON_NEW_MEMMAP "ATI FireGL V3200 RV380"
-0x1002 0x4136 CHIP_RS100|RADEON_IS_IGP "ATI Radeon RS100 IGP 320"
-0x1002 0x4137 CHIP_RS200|RADEON_IS_IGP "ATI Radeon RS200 IGP 340"
-0x1002 0x4144 CHIP_R300 "ATI Radeon AD 9500"
-0x1002 0x4145 CHIP_R300 "ATI Radeon AE 9700 Pro"
-0x1002 0x4146 CHIP_R300 "ATI Radeon AF R300 9600TX"
-0x1002 0x4147 CHIP_R300 "ATI FireGL AG Z1"
-0x1002 0x4148 CHIP_R350 "ATI Radeon AH 9800 SE"
-0x1002 0x4149 CHIP_R350 "ATI Radeon AI 9800"
-0x1002 0x414A CHIP_R350 "ATI Radeon AJ 9800"
-0x1002 0x414B CHIP_R350 "ATI FireGL AK X2"
-0x1002 0x4150 CHIP_RV350 "ATI Radeon AP 9600"
-0x1002 0x4151 CHIP_RV350 "ATI Radeon AQ 9600 SE"
-0x1002 0x4152 CHIP_RV350 "ATI Radeon AR 9600 XT"
-0x1002 0x4153 CHIP_RV350 "ATI Radeon AS 9550"
-0x1002 0x4154 CHIP_RV350 "ATI FireGL AT T2"
-0x1002 0x4155 CHIP_RV350 "ATI Radeon 9650"
-0x1002 0x4156 CHIP_RV350 "ATI FireGL AV RV360 T2"
-0x1002 0x4237 CHIP_RS200|RADEON_IS_IGP "ATI Radeon RS250 IGP"
-0x1002 0x4242 CHIP_R200 "ATI Radeon BB R200 AIW 8500DV"
-0x1002 0x4243 CHIP_R200 "ATI Radeon BC R200"
-0x1002 0x4336 CHIP_RS100|RADEON_IS_IGP|RADEON_IS_MOBILITY "ATI Radeon RS100 Mobility U1"
-0x1002 0x4337 CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY "ATI Radeon RS200 Mobility IGP 340M"
-0x1002 0x4437 CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY "ATI Radeon RS250 Mobility IGP"
-0x1002 0x4966 CHIP_RV250 "ATI Radeon If RV250 9000"
-0x1002 0x4967 CHIP_RV250 "ATI Radeon Ig RV250 9000"
-0x1002 0x4A48 CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon JH R420 X800"
-0x1002 0x4A49 CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon JI R420 X800 Pro"
-0x1002 0x4A4A CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon JJ R420 X800 SE"
-0x1002 0x4A4B CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon JK R420 X800 XT"
-0x1002 0x4A4C CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon JL R420 X800"
-0x1002 0x4A4D CHIP_R420|RADEON_NEW_MEMMAP "ATI FireGL JM X3-256"
-0x1002 0x4A4E CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Radeon JN R420 Mobility M18"
-0x1002 0x4A4F CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon JO R420 X800 SE"
-0x1002 0x4A50 CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon JP R420 X800 XT PE"
-0x1002 0x4A54 CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon JT R420 AIW X800 VE"
-0x1002 0x4B49 CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon R481 X850 XT"
-0x1002 0x4B4A CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon R481 X850 SE"
-0x1002 0x4B4B CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon R481 X850 Pro"
-0x1002 0x4B4C CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon R481 X850 XT PE"
-0x1002 0x4C57 CHIP_RV200|RADEON_IS_MOBILITY "ATI Radeon LW RV200 Mobility 7500 M7"
-0x1002 0x4C58 CHIP_RV200|RADEON_IS_MOBILITY "ATI Radeon LX RV200 Mobility FireGL 7800 M7"
-0x1002 0x4C59 CHIP_RV100|RADEON_IS_MOBILITY "ATI Radeon LY RV100 Mobility M6"
-0x1002 0x4C5A CHIP_RV100|RADEON_IS_MOBILITY "ATI Radeon LZ RV100 Mobility M6"
-0x1002 0x4C64 CHIP_RV250|RADEON_IS_MOBILITY "ATI Radeon Ld RV250 Mobility 9000 M9"
-0x1002 0x4C66 CHIP_RV250 "ATI Radeon Lf RV250 Mobility 9000 M9 / FireMV 2400 PCI"
-0x1002 0x4C67 CHIP_RV250|RADEON_IS_MOBILITY "ATI Radeon Lg RV250 Mobility 9000 M9"
-0x1002 0x4E44 CHIP_R300 "ATI Radeon ND R300 9700 Pro"
-0x1002 0x4E45 CHIP_R300 "ATI Radeon NE R300 9500 Pro / 9700"
-0x1002 0x4E46 CHIP_R300 "ATI Radeon NF R300 9600TX"
-0x1002 0x4E47 CHIP_R300 "ATI Radeon NG R300 FireGL X1"
-0x1002 0x4E48 CHIP_R350 "ATI Radeon NH R350 9800 Pro"
-0x1002 0x4E49 CHIP_R350 "ATI Radeon NI R350 9800"
-0x1002 0x4E4A CHIP_R350 "ATI Radeon NJ R360 9800 XT"
-0x1002 0x4E4B CHIP_R350 "ATI FireGL NK X2"
-0x1002 0x4E50 CHIP_RV350|RADEON_IS_MOBILITY "ATI Radeon RV350 Mobility 9600 M10 NP"
-0x1002 0x4E51 CHIP_RV350|RADEON_IS_MOBILITY "ATI Radeon RV350 Mobility 9600 M10 NQ"
-0x1002 0x4E52 CHIP_RV350|RADEON_IS_MOBILITY "ATI Radeon RV350 Mobility 9600 M11 NR"
-0x1002 0x4E53 CHIP_RV350|RADEON_IS_MOBILITY "ATI Radeon RV350 Mobility 9600 M10 NS"
-0x1002 0x4E54 CHIP_RV350|RADEON_IS_MOBILITY "ATI FireGL T2/T2e"
-0x1002 0x4E56 CHIP_RV350|RADEON_IS_MOBILITY "ATI Radeon Mobility 9550"
-0x1002 0x5144 CHIP_R100|RADEON_SINGLE_CRTC "ATI Radeon QD R100"
-0x1002 0x5145 CHIP_R100|RADEON_SINGLE_CRTC "ATI Radeon QE R100"
-0x1002 0x5146 CHIP_R100|RADEON_SINGLE_CRTC "ATI Radeon QF R100"
-0x1002 0x5147 CHIP_R100|RADEON_SINGLE_CRTC "ATI Radeon QG R100"
-0x1002 0x5148 CHIP_R200 "ATI Radeon QH R200 8500"
-0x1002 0x514C CHIP_R200 "ATI Radeon QL R200 8500 LE"
-0x1002 0x514D CHIP_R200 "ATI Radeon QM R200 9100"
-0x1002 0x5157 CHIP_RV200 "ATI Radeon QW RV200 7500"
-0x1002 0x5158 CHIP_RV200 "ATI Radeon QX RV200 7500"
-0x1002 0x5159 CHIP_RV100 "ATI Radeon QY RV100 7000/VE"
-0x1002 0x515A CHIP_RV100 "ATI Radeon QZ RV100 7000/VE"
-0x1002 0x515E CHIP_RV100 "ATI ES1000 RN50"
-0x1002 0x5460 CHIP_RV380|RADEON_IS_MOBILITY "ATI Radeon Mobility X300 M22"
-0x1002 0x5462 CHIP_RV380|RADEON_IS_MOBILITY "ATI Radeon Mobility X600 SE M24C"
-0x1002 0x5464 CHIP_RV380|RADEON_IS_MOBILITY "ATI FireGL M22 GL 5464"
-0x1002 0x5548 CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R423 X800"
-0x1002 0x5549 CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R423 X800 Pro"
-0x1002 0x554A CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R423 X800 XT PE"
-0x1002 0x554B CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R423 X800 SE"
-0x1002 0x554C CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R430 X800 XTP"
-0x1002 0x554D CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R430 X800 XL"
-0x1002 0x554E CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R430 X800 SE"
-0x1002 0x554F CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R430 X800"
-0x1002 0x5550 CHIP_R423|RADEON_NEW_MEMMAP "ATI FireGL V7100 R423"
-0x1002 0x5551 CHIP_R423|RADEON_NEW_MEMMAP "ATI FireGL V5100 R423 UQ"
-0x1002 0x5552 CHIP_R423|RADEON_NEW_MEMMAP "ATI FireGL unknown R423 UR"
-0x1002 0x5554 CHIP_R423|RADEON_NEW_MEMMAP "ATI FireGL unknown R423 UT"
-0x1002 0x564A CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V5000 M26"
-0x1002 0x564B CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V5000 M26"
-0x1002 0x564F CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Radeon Mobility X700 XL M26"
-0x1002 0x5652 CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Radeon Mobility X700 M26"
-0x1002 0x5653 CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Radeon Mobility X700 M26"
-0x1002 0x5657 CHIP_RV410|RADEON_NEW_MEMMAP "ATI Radeon X550XTX"
-0x1002 0x5834 CHIP_RS300|RADEON_IS_IGP "ATI Radeon RS300 9100 IGP"
-0x1002 0x5835 CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY "ATI Radeon RS300 Mobility IGP"
-0x1002 0x5954 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_IGPGART "ATI RS480 XPRESS 200G"
-0x1002 0x5955 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon XPRESS 200M 5955"
-0x1002 0x5974 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RS482 XPRESS 200"
-0x1002 0x5975 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RS485 XPRESS 1100 IGP"
-0x1002 0x5960 CHIP_RV280 "ATI Radeon RV280 9250"
-0x1002 0x5961 CHIP_RV280 "ATI Radeon RV280 9200"
-0x1002 0x5962 CHIP_RV280 "ATI Radeon RV280 9200"
-0x1002 0x5964 CHIP_RV280 "ATI Radeon RV280 9200 SE"
-0x1002 0x5965 CHIP_RV280 "ATI FireMV 2200 PCI"
-0x1002 0x5969 CHIP_RV100 "ATI ES1000 RN50"
-0x1002 0x5a41 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART "ATI Radeon XPRESS 200 5A41 (PCIE)"
-0x1002 0x5a42 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon XPRESS 200M 5A42 (PCIE)"
-0x1002 0x5a61 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART "ATI Radeon RC410 XPRESS 200"
-0x1002 0x5a62 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RC410 XPRESS 200M"
-0x1002 0x5b60 CHIP_RV380|RADEON_NEW_MEMMAP "ATI Radeon RV370 X300 SE"
-0x1002 0x5b62 CHIP_RV380|RADEON_NEW_MEMMAP "ATI Radeon RV370 X600 Pro"
-0x1002 0x5b63 CHIP_RV380|RADEON_NEW_MEMMAP "ATI Radeon RV370 X550"
-0x1002 0x5b64 CHIP_RV380|RADEON_NEW_MEMMAP "ATI FireGL V3100 (RV370) 5B64"
-0x1002 0x5b65 CHIP_RV380|RADEON_NEW_MEMMAP "ATI FireMV 2200 PCIE (RV370) 5B65"
-0x1002 0x5c61 CHIP_RV280|RADEON_IS_MOBILITY "ATI Radeon RV280 Mobility"
-0x1002 0x5c63 CHIP_RV280|RADEON_IS_MOBILITY "ATI Radeon RV280 Mobility"
-0x1002 0x5d48 CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X800 XT M28"
-0x1002 0x5d49 CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V5100 M28"
-0x1002 0x5d4a CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X800 M28"
-0x1002 0x5d4c CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R480 X850"
-0x1002 0x5d4d CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R480 X850 XT PE"
-0x1002 0x5d4e CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R480 X850 SE"
-0x1002 0x5d4f CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R480 X850 Pro"
-0x1002 0x5d50 CHIP_R423|RADEON_NEW_MEMMAP "ATI unknown Radeon / FireGL R480"
-0x1002 0x5d52 CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R480 X850 XT"
-0x1002 0x5d57 CHIP_R423|RADEON_NEW_MEMMAP "ATI Radeon R423 X800 XT"
-0x1002 0x5e48 CHIP_RV410|RADEON_NEW_MEMMAP "ATI FireGL V5000 RV410"
-0x1002 0x5e4a CHIP_RV410|RADEON_NEW_MEMMAP "ATI Radeon RV410 X700 XT"
-0x1002 0x5e4b CHIP_RV410|RADEON_NEW_MEMMAP "ATI Radeon RV410 X700 Pro"
-0x1002 0x5e4c CHIP_RV410|RADEON_NEW_MEMMAP "ATI Radeon RV410 X700 SE"
-0x1002 0x5e4d CHIP_RV410|RADEON_NEW_MEMMAP "ATI Radeon RV410 X700"
-0x1002 0x5e4f CHIP_RV410|RADEON_NEW_MEMMAP "ATI Radeon RV410 X700 SE"
-0x1002 0x7100 CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800"
-0x1002 0x7101 CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1800 XT"
-0x1002 0x7102 CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1800"
-0x1002 0x7103 CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V7200"
-0x1002 0x7104 CHIP_R520|RADEON_NEW_MEMMAP "ATI FireGL V7200"
-0x1002 0x7105 CHIP_R520|RADEON_NEW_MEMMAP "ATI FireGL V5300"
-0x1002 0x7106 CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V7100"
-0x1002 0x7108 CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800"
-0x1002 0x7109 CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800"
-0x1002 0x710A CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800"
-0x1002 0x710B CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800"
-0x1002 0x710C CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800"
-0x1002 0x710E CHIP_R520|RADEON_NEW_MEMMAP "ATI FireGL V7300"
-0x1002 0x710F CHIP_R520|RADEON_NEW_MEMMAP "ATI FireGL V7350"
-0x1002 0x7140 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1600"
-0x1002 0x7141 CHIP_RV515|RADEON_NEW_MEMMAP "ATI RV505"
-0x1002 0x7142 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550"
-0x1002 0x7143 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550"
-0x1002 0x7144 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI M54-GL"
-0x1002 0x7145 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1400"
-0x1002 0x7146 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550"
-0x1002 0x7147 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550 64-bit"
-0x1002 0x7149 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1300"
-0x1002 0x714A CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1300"
-0x1002 0x714B CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1300"
-0x1002 0x714C CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1300"
-0x1002 0x714D CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300"
-0x1002 0x714E CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300"
-0x1002 0x714F CHIP_RV515|RADEON_NEW_MEMMAP "ATI RV505"
-0x1002 0x7151 CHIP_RV515|RADEON_NEW_MEMMAP "ATI RV505"
-0x1002 0x7152 CHIP_RV515|RADEON_NEW_MEMMAP "ATI FireGL V3300"
-0x1002 0x7153 CHIP_RV515|RADEON_NEW_MEMMAP "ATI FireGL V3350"
-0x1002 0x715E CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300"
-0x1002 0x715F CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550 64-bit"
-0x1002 0x7180 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550"
-0x1002 0x7181 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1600"
-0x1002 0x7183 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550"
-0x1002 0x7186 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1450"
-0x1002 0x7187 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550"
-0x1002 0x7188 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X2300"
-0x1002 0x718A CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X2300"
-0x1002 0x718B CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1350"
-0x1002 0x718C CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1350"
-0x1002 0x718D CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1450"
-0x1002 0x718F CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300"
-0x1002 0x7193 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550"
-0x1002 0x7196 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1350"
-0x1002 0x719B CHIP_RV515|RADEON_NEW_MEMMAP "ATI FireMV 2250"
-0x1002 0x719F CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550 64-bit"
-0x1002 0x71C0 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1600"
-0x1002 0x71C1 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1650"
-0x1002 0x71C2 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1600"
-0x1002 0x71C3 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1600"
-0x1002 0x71C4 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V5200"
-0x1002 0x71C5 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1600"
-0x1002 0x71C6 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1650"
-0x1002 0x71C7 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1650"
-0x1002 0x71CD CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1600"
-0x1002 0x71CE CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1300 XT/X1600 Pro"
-0x1002 0x71D2 CHIP_RV530|RADEON_NEW_MEMMAP "ATI FireGL V3400"
-0x1002 0x71D4 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V5250"
-0x1002 0x71D5 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1700"
-0x1002 0x71D6 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1700 XT"
-0x1002 0x71DA CHIP_RV530|RADEON_NEW_MEMMAP "ATI FireGL V5200"
-0x1002 0x71DE CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1700"
-0x1002 0x7200 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X2300HD"
-0x1002 0x7210 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 2300"
-0x1002 0x7211 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 2300"
-0x1002 0x7240 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1950"
-0x1002 0x7243 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x7244 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1950"
-0x1002 0x7245 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x7246 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x7247 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x7248 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x7249 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x724A CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x724B CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x724C CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x724D CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x724E CHIP_R580|RADEON_NEW_MEMMAP "ATI AMD Stream Processor"
-0x1002 0x724F CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900"
-0x1002 0x7280 CHIP_RV570|RADEON_NEW_MEMMAP "ATI Radeon X1950"
-0x1002 0x7281 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560"
-0x1002 0x7283 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560"
-0x1002 0x7284 CHIP_R580|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1900"
-0x1002 0x7287 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560"
-0x1002 0x7288 CHIP_RV570|RADEON_NEW_MEMMAP "ATI Radeon X1950 GT"
-0x1002 0x7289 CHIP_RV570|RADEON_NEW_MEMMAP "ATI RV570"
-0x1002 0x728B CHIP_RV570|RADEON_NEW_MEMMAP "ATI RV570"
-0x1002 0x728C CHIP_RV570|RADEON_NEW_MEMMAP "ATI ATI FireGL V7400"
-0x1002 0x7290 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560"
-0x1002 0x7291 CHIP_RV560|RADEON_NEW_MEMMAP "ATI Radeon X1650"
-0x1002 0x7293 CHIP_RV560|RADEON_NEW_MEMMAP "ATI Radeon X1650"
-0x1002 0x7297 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560"
-0x1002 0x7834 CHIP_RS300|RADEON_IS_IGP|RADEON_NEW_MEMMAP "ATI Radeon RS350 9000/9100 IGP"
-0x1002 0x7835 CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Radeon RS350 Mobility IGP"
-0x1002 0x791e CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS690 X1250 IGP"
-0x1002 0x791f CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS690 X1270 IGP"
-0x1002 0x796c CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS740 HD2100 IGP"
-0x1002 0x796d CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS740 HD2100 IGP"
-0x1002 0x796e CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS740 HD2100 IGP"
-0x1002 0x796f CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS740 HD2100 IGP"
-
-[r128]
-0x1002 0x4c45 0 "ATI Rage 128 Mobility LE (PCI)"
-0x1002 0x4c46 0 "ATI Rage 128 Mobility LF (AGP)"
-0x1002 0x4d46 0 "ATI Rage 128 Mobility MF (AGP)"
-0x1002 0x4d4c 0 "ATI Rage 128 Mobility ML (AGP)"
-0x1002 0x5041 0 "ATI Rage 128 Pro PA (PCI)"
-0x1002 0x5042 0 "ATI Rage 128 Pro PB (AGP)"
-0x1002 0x5043 0 "ATI Rage 128 Pro PC (AGP)"
-0x1002 0x5044 0 "ATI Rage 128 Pro PD (PCI)"
-0x1002 0x5045 0 "ATI Rage 128 Pro PE (AGP)"
-0x1002 0x5046 0 "ATI Rage 128 Pro PF (AGP)"
-0x1002 0x5047 0 "ATI Rage 128 Pro PG (PCI)"
-0x1002 0x5048 0 "ATI Rage 128 Pro PH (AGP)"
-0x1002 0x5049 0 "ATI Rage 128 Pro PI (AGP)"
-0x1002 0x504A 0 "ATI Rage 128 Pro PJ (PCI)"
-0x1002 0x504B 0 "ATI Rage 128 Pro PK (AGP)"
-0x1002 0x504C 0 "ATI Rage 128 Pro PL (AGP)"
-0x1002 0x504D 0 "ATI Rage 128 Pro PM (PCI)"
-0x1002 0x504E 0 "ATI Rage 128 Pro PN (AGP)"
-0x1002 0x504F 0 "ATI Rage 128 Pro PO (AGP)"
-0x1002 0x5050 0 "ATI Rage 128 Pro PP (PCI)"
-0x1002 0x5051 0 "ATI Rage 128 Pro PQ (AGP)"
-0x1002 0x5052 0 "ATI Rage 128 Pro PR (PCI)"
-0x1002 0x5053 0 "ATI Rage 128 Pro PS (PCI)"
-0x1002 0x5054 0 "ATI Rage 128 Pro PT (AGP)"
-0x1002 0x5055 0 "ATI Rage 128 Pro PU (AGP)"
-0x1002 0x5056 0 "ATI Rage 128 Pro PV (PCI)"
-0x1002 0x5057 0 "ATI Rage 128 Pro PW (AGP)"
-0x1002 0x5058 0 "ATI Rage 128 Pro PX (AGP)"
-0x1002 0x5245 0 "ATI Rage 128 RE (PCI)"
-0x1002 0x5246 0 "ATI Rage 128 RF (AGP)"
-0x1002 0x5247 0 "ATI Rage 128 RG (AGP)"
-0x1002 0x524b 0 "ATI Rage 128 RK (PCI)"
-0x1002 0x524c 0 "ATI Rage 128 RL (AGP)"
-0x1002 0x534d 0 "ATI Rage 128 SM (AGP)"
-0x1002 0x5446 0 "ATI Rage 128 Pro Ultra TF (AGP)"
-0x1002 0x544C 0 "ATI Rage 128 Pro Ultra TL (AGP)"
-0x1002 0x5452 0 "ATI Rage 128 Pro Ultra TR (AGP)"
-
-[mga]
-0x102b 0x0520 MGA_CARD_TYPE_G200 "Matrox G200 (PCI)"
-0x102b 0x0521 MGA_CARD_TYPE_G200 "Matrox G200 (AGP)"
-0x102b 0x0525 MGA_CARD_TYPE_G400 "Matrox G400/G450 (AGP)"
-0x102b 0x2527 MGA_CARD_TYPE_G550 "Matrox G550 (AGP)"
-
-[mach64]
-0x1002 0x4749 0 "3D Rage Pro"
-0x1002 0x4750 0 "3D Rage Pro 215GP"
-0x1002 0x4751 0 "3D Rage Pro 215GQ"
-0x1002 0x4742 0 "3D Rage Pro AGP 1X/2X"
-0x1002 0x4744 0 "3D Rage Pro AGP 1X"
-0x1002 0x4c49 0 "3D Rage LT Pro"
-0x1002 0x4c50 0 "3D Rage LT Pro"
-0x1002 0x4c51 0 "3D Rage LT Pro"
-0x1002 0x4c42 0 "3D Rage LT Pro AGP-133"
-0x1002 0x4c44 0 "3D Rage LT Pro AGP-66"
-0x1002 0x474c 0 "Rage XC"
-0x1002 0x474f 0 "Rage XL"
-0x1002 0x4752 0 "Rage XL"
-0x1002 0x4753 0 "Rage XC"
-0x1002 0x474d 0 "Rage XL AGP 2X"
-0x1002 0x474e 0 "Rage XC AGP"
-0x1002 0x4c52 0 "Rage Mobility P/M"
-0x1002 0x4c53 0 "Rage Mobility L"
-0x1002 0x4c4d 0 "Rage Mobility P/M AGP 2X"
-0x1002 0x4c4e 0 "Rage Mobility L AGP 2X"
-
-[sis]
-0x1039 0x0300 0 "SiS 300/305"
-0x1039 0x5300 0 "SiS 540"
-0x1039 0x6300 0 "SiS 630"
-0x1039 0x6330 SIS_CHIP_315 "SiS 661"
-0x1039 0x7300 0 "SiS 730"
-0x18CA 0x0040 SIS_CHIP_315 "Volari V3XT/V5/V8"
-0x18CA 0x0042 SIS_CHIP_315 "Volari Unknown"
-
-[tdfx]
-0x121a 0x0003 0 "3dfx Voodoo Banshee"
-0x121a 0x0004 0 "3dfx Voodoo3 2000"
-0x121a 0x0005 0 "3dfx Voodoo3 3000"
-0x121a 0x0007 0 "3dfx Voodoo4 4500"
-0x121a 0x0009 0 "3dfx Voodoo5 5500"
-0x121a 0x000b 0 "3dfx Voodoo4 4200"
-
-[viadrv]
-0x1106 0x3022 0 "VIA CLE266 3022"
-0x1106 0x3118 VIA_PRO_GROUP_A "VIA CN400 / PM8X0"
-0x1106 0x3122 0 "VIA CLE266"
-0x1106 0x7205 0 "VIA KM400"
-0x1106 0x3108 0 "VIA K8M800"
-0x1106 0x3344 0 "VIA CN700 / VM800 / P4M800Pro"
-0x1106 0x3343 0 "VIA P4M890"
-0x1106 0x3230 VIA_DX9_0 "VIA K8M890"
-0x1106 0x3157 VIA_PRO_GROUP_A "VIA CX700"
-0x1106 0x3371 VIA_DX9_0 "VIA P4M900 / VN896"
-
-[i810]
-0x8086 0x7121 0 "Intel i810 GMCH"
-0x8086 0x7123 0 "Intel i810-DC100 GMCH"
-0x8086 0x7125 0 "Intel i810E GMCH"
-0x8086 0x1132 0 "Intel i815 GMCH"
-
-[i830]
-0x8086 0x3577 0 "Intel i830M GMCH"
-0x8086 0x2562 0 "Intel i845G GMCH"
-0x8086 0x3582 0 "Intel i852GM/i855GM GMCH"
-0x8086 0x2572 0 "Intel i865G GMCH"
-
-[gamma]
-0x3d3d 0x0008 0 "3DLabs GLINT Gamma G1"
-
-[savage]
-0x5333 0x8a20 S3_SAVAGE3D "Savage 3D"
-0x5333 0x8a21 S3_SAVAGE3D "Savage 3D/MV"
-0x5333 0x8a22 S3_SAVAGE4 "Savage4"
-0x5333 0x8a23 S3_SAVAGE4 "Savage4"
-0x5333 0x8c10 S3_SAVAGE_MX "Savage/MX-MV"
-0x5333 0x8c11 S3_SAVAGE_MX "Savage/MX"
-0x5333 0x8c12 S3_SAVAGE_MX "Savage/IX-MV"
-0x5333 0x8c13 S3_SAVAGE_MX "Savage/IX"
-0x5333 0x8c22 S3_SUPERSAVAGE "SuperSavage MX/128"
-0x5333 0x8c24 S3_SUPERSAVAGE "SuperSavage MX/64"
-0x5333 0x8c26 S3_SUPERSAVAGE "SuperSavage MX/64C"
-0x5333 0x8c2a S3_SUPERSAVAGE "SuperSavage IX/128 SDR"
-0x5333 0x8c2b S3_SUPERSAVAGE "SuperSavage IX/128 DDR"
-0x5333 0x8c2c S3_SUPERSAVAGE "SuperSavage IX/64 SDR"
-0x5333 0x8c2d S3_SUPERSAVAGE "SuperSavage IX/64 DDR"
-0x5333 0x8c2e S3_SUPERSAVAGE "SuperSavage IX/C SDR"
-0x5333 0x8c2f S3_SUPERSAVAGE "SuperSavage IX/C DDR"
-0x5333 0x8a25 S3_PROSAVAGE "ProSavage PM133"
-0x5333 0x8a26 S3_PROSAVAGE "ProSavage KM133"
-0x5333 0x8d01 S3_TWISTER "ProSavage Twister PN133"
-0x5333 0x8d02 S3_TWISTER "ProSavage Twister KN133"
-0x5333 0x8d03 S3_PROSAVAGEDDR "ProSavage DDR"
-0x5333 0x8d04 S3_PROSAVAGEDDR "ProSavage DDR-K"
-
-[ffb]
-
-[i915]
-0x8086 0x3577 CHIP_I8XX "Intel i830M GMCH"
-0x8086 0x2562 CHIP_I8XX "Intel i845G GMCH"
-0x8086 0x3582 CHIP_I8XX "Intel i852GM/i855GM GMCH"
-0x8086 0x2572 CHIP_I8XX "Intel i865G GMCH"
-0x8086 0x2582 CHIP_I9XX|CHIP_I915 "Intel i915G"
-0x8086 0x258a CHIP_I9XX|CHIP_I915 "Intel E7221 (i915)"
-0x8086 0x2592 CHIP_I9XX|CHIP_I915 "Intel i915GM"
-0x8086 0x2772 CHIP_I9XX|CHIP_I915 "Intel i945G"
-0x8086 0x27A2 CHIP_I9XX|CHIP_I915 "Intel i945GM"
-0x8086 0x27AE CHIP_I9XX|CHIP_I915 "Intel i945GME"
-0x8086 0x2972 CHIP_I9XX|CHIP_I965 "Intel i946GZ"
-0x8086 0x2982 CHIP_I9XX|CHIP_I965 "Intel i965G"
-0x8086 0x2992 CHIP_I9XX|CHIP_I965 "Intel i965Q"
-0x8086 0x29A2 CHIP_I9XX|CHIP_I965 "Intel i965G"
-0x8086 0x2A02 CHIP_I9XX|CHIP_I965 "Intel i965GM"
-0x8086 0x2A12 CHIP_I9XX|CHIP_I965 "Intel i965GME/GLE"
-0x8086 0x29C2 CHIP_I9XX|CHIP_I915 "Intel G33"
-0x8086 0x29B2 CHIP_I9XX|CHIP_I915 "Intel Q35"
-0x8086 0x29D2 CHIP_I9XX|CHIP_I915 "Intel Q33"
-0x8086 0x2A42 CHIP_I9XX|CHIP_I965 "Mobile Intel® GM45 Express Chipset"
-0x8086 0x2E02 CHIP_I9XX|CHIP_I965 "Intel Integrated Graphics Device"
-0x8086 0x2E12 CHIP_I9XX|CHIP_I965 "Intel Q45/Q43"
-0x8086 0x2E22 CHIP_I9XX|CHIP_I965 "Intel G45/G43"
-
-[imagine]
-0x105d 0x2309 IMAGINE_128 "Imagine 128"
-0x105d 0x2339 IMAGINE_128_2 "Imagine 128-II"
-0x105d 0x493d IMAGINE_T2R "Ticket to Ride"
-0x105d 0x5348 IMAGINE_REV4 "Revolution IV"
-
-[nv]
-0x10DE 0x0020 NV04 "NVidia RIVA TNT"
-0x10DE 0x0028 NV04 "NVidia RIVA TNT2"
-0x10DE 0x002A NV04 "NVidia Unknown TNT2"
-0x10DE 0x002C NV04 "NVidia Vanta"
-0x10DE 0x0029 NV04 "NVidia RIVA TNT2 Ultra"
-0x10DE 0x002D NV04 "NVidia RIVA TNT2 Model 64"
-0x10DE 0x00A0 NV04 "NVidia Aladdin TNT2"
-0x10DE 0x0100 NV10 "NVidia GeForce 256"
-0x10DE 0x0101 NV10 "NVidia GeForce DDR"
-0x10DE 0x0103 NV10 "NVidia Quadro"
-0x10DE 0x0110 NV10 "NVidia GeForce2 MX/MX 400"
-0x10DE 0x0111 NV10 "NVidia GeForce2 MX 100/200"
-0x10DE 0x0112 NV10 "NVidia GeForce2 Go"
-0x10DE 0x0113 NV10 "NVidia Quadro2 MXR/EX/Go"
-0x10DE 0x0150 NV10 "NVidia GeForce2 GTS"
-0x10DE 0x0151 NV10 "NVidia GeForce2 Ti"
-0x10DE 0x0152 NV10 "NVidia GeForce2 Ultra"
-0x10DE 0x0153 NV10 "NVidia Quadro2 Pro"
-0x10DE 0x0170 NV10 "NVidia GeForce4 MX 460"
-0x10DE 0x0171 NV10 "NVidia GeForce4 MX 440"
-0x10DE 0x0172 NV10 "NVidia GeForce4 MX 420"
-0x10DE 0x0173 NV10 "NVidia GeForce4 MX 440-SE"
-0x10DE 0x0174 NV10 "NVidia GeForce4 440 Go"
-0x10DE 0x0175 NV10 "NVidia GeForce4 420 Go"
-0x10DE 0x0176 NV10 "NVidia GeForce4 420 Go 32M"
-0x10DE 0x0177 NV10 "NVidia GeForce4 460 Go"
-0x10DE 0x0178 NV10 "NVidia Quadro4 550 XGL"
-0x10DE 0x0179 NV10 "NVidia GeForce4"
-0x10DE 0x017A NV10 "NVidia Quadro4 NVS"
-0x10DE 0x017C NV10 "NVidia Quadro4 500 GoGL"
-0x10DE 0x017D NV10 "NVidia GeForce4 410 Go 16M"
-0x10DE 0x0181 NV10 "NVidia GeForce4 MX 440 with AGP8X"
-0x10DE 0x0182 NV10 "NVidia GeForce4 MX 440SE with AGP8X"
-0x10DE 0x0183 NV10 "NVidia GeForce4 MX 420 with AGP8X"
-0x10DE 0x0185 NV10 "NVidia GeForce4 MX 4000"
-0x10DE 0x0186 NV10 "NVidia GeForce4 448 Go"
-0x10DE 0x0187 NV10 "NVidia GeForce4 488 Go"
-0x10DE 0x0188 NV10 "NVidia Quadro4 580 XGL"
-0x10DE 0x0189 NV10 "NVidia GeForce4 MX with AGP8X (Mac)"
-0x10DE 0x018A NV10 "NVidia Quadro4 280 NVS"
-0x10DE 0x018B NV10 "NVidia Quadro4 380 XGL"
-0x10DE 0x018C NV10 "NVidia Quadro NVS 50 PCI"
-0x10DE 0x018D NV10 "NVidia GeForce4 448 Go"
-0x10DE 0x01A0 NV10 "NVidia GeForce2 Integrated GPU"
-0x10DE 0x01F0 NV10 "NVidia GeForce4 MX Integrated GPU"
-0x10DE 0x0200 NV20 "NVidia GeForce3"
-0x10DE 0x0201 NV20 "NVidia GeForce3 Ti 200"
-0x10DE 0x0202 NV20 "NVidia GeForce3 Ti 500"
-0x10DE 0x0203 NV20 "NVidia Quadro DCC"
-0x10DE 0x0250 NV20 "NVidia GeForce4 Ti 4600"
-0x10DE 0x0251 NV20 "NVidia GeForce4 Ti 4400"
-0x10DE 0x0252 NV20 "NVidia 0x0252"
-0x10DE 0x0253 NV20 "NVidia GeForce4 Ti 4200"
-0x10DE 0x0258 NV20 "NVidia Quadro4 900 XGL"
-0x10DE 0x0259 NV20 "NVidia Quadro4 750 XGL"
-0x10DE 0x025B NV20 "NVidia Quadro4 700 XGL"
-0x10DE 0x0280 NV20 "NVidia GeForce4 Ti 4800"
-0x10DE 0x0281 NV20 "NVidia GeForce4 Ti 4200 with AGP8X"
-0x10DE 0x0282 NV20 "NVidia GeForce4 Ti 4800 SE"
-0x10DE 0x0286 NV20 "NVidia GeForce4 4200 Go"
-0x10DE 0x028C NV20 "NVidia Quadro4 700 GoGL"
-0x10DE 0x0288 NV20 "NVidia Quadro4 980 XGL"
-0x10DE 0x0289 NV20 "NVidia Quadro4 780 XGL"
-0x10DE 0x0301 NV30 "NVidia GeForce FX 5800 Ultra"
-0x10DE 0x0302 NV30 "NVidia GeForce FX 5800"
-0x10DE 0x0308 NV30 "NVidia Quadro FX 2000"
-0x10DE 0x0309 NV30 "NVidia Quadro FX 1000"
-0x10DE 0x0311 NV30 "NVidia GeForce FX 5600 Ultra"
-0x10DE 0x0312 NV30 "NVidia GeForce FX 5600"
-0x10DE 0x0313 NV30 "NVidia 0x0313"
-0x10DE 0x0314 NV30 "NVidia GeForce FX 5600SE"
-0x10DE 0x0316 NV30 "NVidia 0x0316"
-0x10DE 0x0317 NV30 "NVidia 0x0317"
-0x10DE 0x031A NV30 "NVidia GeForce FX Go5600"
-0x10DE 0x031B NV30 "NVidia GeForce FX Go5650"
-0x10DE 0x031C NV30 "NVidia Quadro FX Go700"
-0x10DE 0x031D NV30 "NVidia 0x031D"
-0x10DE 0x031E NV30 "NVidia 0x031E"
-0x10DE 0x031F NV30 "NVidia 0x031F"
-0x10DE 0x0320 NV30 "NVidia GeForce FX 5200"
-0x10DE 0x0321 NV30 "NVidia GeForce FX 5200 Ultra"
-0x10DE 0x0322 NV30 "NVidia GeForce FX 5200"
-0x10DE 0x0323 NV30 "NVidia GeForce FX 5200SE"
-0x10DE 0x0324 NV30 "NVidia GeForce FX Go5200"
-0x10DE 0x0325 NV30 "NVidia GeForce FX Go5250"
-0x10DE 0x0326 NV30 "NVidia GeForce FX 5500"
-0x10DE 0x0327 NV30 "NVidia GeForce FX 5100"
-0x10DE 0x0328 NV30 "NVidia GeForce FX Go5200 32M/64M"
-0x10DE 0x0329 NV30 "NVidia GeForce FX 5200 (Mac)"
-0x10DE 0x032A NV30 "NVidia Quadro NVS 280 PCI"
-0x10DE 0x032B NV30 "NVidia Quadro FX 500/600 PCI"
-0x10DE 0x032C NV30 "NVidia GeForce FX Go53xx Series"
-0x10DE 0x032D NV30 "NVidia GeForce FX Go5100"
-0x10DE 0x032F NV30 "NVidia 0x032F"
-0x10DE 0x0330 NV30 "NVidia GeForce FX 5900 Ultra"
-0x10DE 0x0331 NV30 "NVidia GeForce FX 5900"
-0x10DE 0x0332 NV30 "NVidia GeForce FX 5900XT"
-0x10DE 0x0333 NV30 "NVidia GeForce FX 5950 Ultra"
-0x10DE 0x033F NV30 "NVidia Quadro FX 700"
-0x10DE 0x0334 NV30 "NVidia GeForce FX 5900ZT"
-0x10DE 0x0338 NV30 "NVidia Quadro FX 3000"
-0x10DE 0x0341 NV30 "NVidia GeForce FX 5700 Ultra"
-0x10DE 0x0342 NV30 "NVidia GeForce FX 5700"
-0x10DE 0x0343 NV30 "NVidia GeForce FX 5700LE"
-0x10DE 0x0344 NV30 "NVidia GeForce FX 5700VE"
-0x10DE 0x0345 NV30 "NVidia 0x0345"
-0x10DE 0x0347 NV30 "NVidia GeForce FX Go5700"
-0x10DE 0x0348 NV30 "NVidia GeForce FX Go5700"
-0x10DE 0x0349 NV30 "NVidia 0x0349"
-0x10DE 0x034B NV30 "NVidia 0x034B"
-0x10DE 0x034C NV30 "NVidia Quadro FX Go1000"
-0x10DE 0x034E NV30 "NVidia Quadro FX 1100"
-0x10DE 0x034F NV30 "NVidia 0x034F"
-0x10DE 0x0040 NV40 "NVidia GeForce 6800 Ultra"
-0x10DE 0x0041 NV40 "NVidia GeForce 6800"
-0x10DE 0x0042 NV40 "NVidia GeForce 6800 LE"
-0x10DE 0x0043 NV40 "NVidia 0x0043"
-0x10DE 0x0045 NV40 "NVidia GeForce 6800 GT"
-0x10DE 0x0046 NV40 "NVidia GeForce 6800 GT"
-0x10DE 0x0049 NV40 "NVidia 0x0049"
-0x10DE 0x004E NV40 "NVidia Quadro FX 4000"
-0x10DE 0x00C0 NV40 "NVidia 0x00C0"
-0x10DE 0x00C1 NV40 "NVidia GeForce 6800"
-0x10DE 0x00C2 NV40 "NVidia GeForce 6800 LE"
-0x10DE 0x00C8 NV40 "NVidia GeForce Go 6800"
-0x10DE 0x00C9 NV40 "NVidia GeForce Go 6800 Ultra"
-0x10DE 0x00CC NV40 "NVidia Quadro FX Go1400"
-0x10DE 0x00CD NV40 "NVidia Quadro FX 3450/4000 SDI"
-0x10DE 0x00CE NV40 "NVidia Quadro FX 1400"
-0x10de 0x00f0 NV40 "Nvidia GeForce 6600 GT"
-0x10de 0x00f1 NV40 "Nvidia GeForce 6600 GT"
-0x10DE 0x0140 NV40 "NVidia GeForce 6600 GT"
-0x10DE 0x0141 NV40 "NVidia GeForce 6600"
-0x10DE 0x0142 NV40 "NVidia GeForce 6600 LE"
-0x10DE 0x0143 NV40 "NVidia 0x0143"
-0x10DE 0x0144 NV40 "NVidia GeForce Go 6600"
-0x10DE 0x0145 NV40 "NVidia GeForce 6610 XL"
-0x10DE 0x0146 NV40 "NVidia GeForce Go 6600 TE/6200 TE"
-0x10DE 0x0147 NV40 "NVidia GeForce 6700 XL"
-0x10DE 0x0148 NV40 "NVidia GeForce Go 6600"
-0x10DE 0x0149 NV40 "NVidia GeForce Go 6600 GT"
-0x10DE 0x014B NV40 "NVidia 0x014B"
-0x10DE 0x014C NV40 "NVidia 0x014C"
-0x10DE 0x014D NV40 "NVidia 0x014D"
-0x10DE 0x014E NV40 "NVidia Quadro FX 540"
-0x10DE 0x014F NV40 "NVidia GeForce 6200"
-0x10DE 0x0160 NV40 "NVidia 0x0160"
-0x10DE 0x0161 NV40 "NVidia GeForce 6200 TurboCache(TM)"
-0x10DE 0x0162 NV40 "NVidia GeForce 6200SE TurboCache(TM)"
-0x10DE 0x0163 NV40 "NVidia 0x0163"
-0x10DE 0x0164 NV40 "NVidia GeForce Go 6200"
-0x10DE 0x0165 NV40 "NVidia Quadro NVS 285"
-0x10DE 0x0166 NV40 "NVidia GeForce Go 6400"
-0x10DE 0x0167 NV40 "NVidia GeForce Go 6200"
-0x10DE 0x0168 NV40 "NVidia GeForce Go 6400"
-0x10DE 0x0169 NV40 "NVidia 0x0169"
-0x10DE 0x016B NV40 "NVidia 0x016B"
-0x10DE 0x016C NV40 "NVidia 0x016C"
-0x10DE 0x016D NV40 "NVidia 0x016D"
-0x10DE 0x016E NV40 "NVidia 0x016E"
-0x10DE 0x0210 NV40 "NVidia 0x0210"
-0x10DE 0x0211 NV40 "NVidia GeForce 6800"
-0x10DE 0x0212 NV40 "NVidia GeForce 6800 LE"
-0x10DE 0x0215 NV40 "NVidia GeForce 6800 GT"
-0x10DE 0x0220 NV40 "NVidia 0x0220"
-0x10DE 0x0221 NV40 "NVidia GeForce 6200"
-0x10DE 0x0222 NV40 "NVidia 0x0222"
-0x10DE 0x0228 NV40 "NVidia 0x0228"
-0x10DE 0x0090 NV40 "NVidia 0x0090"
-0x10DE 0x0091 NV40 "NVidia GeForce 7800 GTX"
-0x10DE 0x0092 NV40 "NVidia 0x0092"
-0x10DE 0x0093 NV40 "NVidia 0x0093"
-0x10DE 0x0094 NV40 "NVidia 0x0094"
-0x10DE 0x0098 NV40 "NVidia 0x0098"
-0x10DE 0x0099 NV40 "NVidia GeForce Go 7800 GTX"
-0x10DE 0x009C NV40 "NVidia 0x009C"
-0x10DE 0x009D NV40 "NVidia Quadro FX 4500"
-0x10DE 0x009E NV40 "NVidia 0x009E"
-
-[xgi]
-0x18ca 0x2200 0 "XP5"
-0x18ca 0x0047 0 "XP10 / XG47"
+++ /dev/null
-/**
- * \file drm_sarea.h
- * \brief SAREA definitions
- *
- * \author Michel D�zer <michel@daenzer.net>
- */
-
-/*
- * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef _DRM_SAREA_H_
-#define _DRM_SAREA_H_
-
-#include "drm.h"
-
-/* SAREA area needs to be at least a page */
-#if defined(__alpha__)
-#define SAREA_MAX 0x2000
-#elif defined(__ia64__)
-#define SAREA_MAX 0x10000 /* 64kB */
-#else
-/* Intel 830M driver needs at least 8k SAREA */
-#define SAREA_MAX 0x2000UL
-#endif
-
-/** Maximum number of drawables in the SAREA */
-#define SAREA_MAX_DRAWABLES 256
-
-#define SAREA_DRAWABLE_CLAIMED_ENTRY 0x80000000
-
-/** SAREA drawable */
-struct drm_sarea_drawable {
- unsigned int stamp;
- unsigned int flags;
-};
-
-/** SAREA frame */
-struct drm_sarea_frame {
- unsigned int x;
- unsigned int y;
- unsigned int width;
- unsigned int height;
- unsigned int fullscreen;
-};
-
-/** SAREA */
-struct drm_sarea {
- /** first thing is always the DRM locking structure */
- struct drm_hw_lock lock;
- /** \todo Use readers/writer lock for drm_sarea::drawable_lock */
- struct drm_hw_lock drawable_lock;
- struct drm_sarea_drawable drawableTable[SAREA_MAX_DRAWABLES]; /**< drawables */
- struct drm_sarea_frame frame; /**< frame */
- drm_context_t dummy_context;
-};
-
-#ifndef __KERNEL__
-typedef struct drm_sarea_drawable drm_sarea_drawable_t;
-typedef struct drm_sarea_frame drm_sarea_frame_t;
-typedef struct drm_sarea drm_sarea_t;
-#endif
-
-#endif /* _DRM_SAREA_H_ */
+++ /dev/null
-/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
- */
-/*
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "i915_drm.h"
-#include "i915_drv.h"
-
-/* Really want an OS-independent resettable timer. Would like to have
- * this loop run for (eg) 3 sec, but have the timer reset every time
- * the head pointer changes, so that EBUSY only happens if the ring
- * actually stalls for (eg) 3 seconds.
- */
-int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
- u32 last_head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
- u32 acthd_reg = IS_I965G(dev) ? ACTHD_I965 : ACTHD;
- u32 last_acthd = I915_READ(acthd_reg);
- u32 acthd;
- int i;
-
- for (i = 0; i < 100000; i++) {
- ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
- acthd = I915_READ(acthd_reg);
- ring->space = ring->head - (ring->tail + 8);
- if (ring->space < 0)
- ring->space += ring->Size;
- if (ring->space >= n)
- return 0;
-
- if (dev_priv->sarea_priv)
- dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
-
- if (ring->head != last_head)
- i = 0;
-
- if (acthd != last_acthd)
- i = 0;
-
- last_head = ring->head;
- last_acthd = acthd;
- DRM_UDELAY(10 * 1000);
- }
-
- return -EBUSY;
-}
-
-/**
- * Sets up the hardware status page for devices that need a physical address
- * in the register.
- */
-static int i915_init_phys_hws(struct drm_device *dev)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
-
- /* Program Hardware Status Page */
- DRM_UNLOCK();
- dev_priv->status_page_dmah =
- drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
- DRM_LOCK();
- if (!dev_priv->status_page_dmah) {
- DRM_ERROR("Can not allocate hardware status page\n");
- return -ENOMEM;
- }
- dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
- dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
-
- memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
-
- I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
- DRM_DEBUG("Enabled hardware status page\n");
- return 0;
-}
-
-/**
- * Frees the hardware status page, whether it's a physical address or a virtual
- * address set up by the X Server.
- */
-static void i915_free_hws(struct drm_device *dev)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- if (dev_priv->status_page_dmah) {
- drm_pci_free(dev, dev_priv->status_page_dmah);
- dev_priv->status_page_dmah = NULL;
- }
-
- if (dev_priv->status_gfx_addr) {
- dev_priv->status_gfx_addr = 0;
- drm_core_ioremapfree(&dev_priv->hws_map, dev);
- }
-
- /* Need to rewrite hardware status page */
- I915_WRITE(HWS_PGA, 0x1ffff000);
-}
-
-void i915_kernel_lost_context(struct drm_device * dev)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
-
- ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
- ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
- ring->space = ring->head - (ring->tail + 8);
- if (ring->space < 0)
- ring->space += ring->Size;
-
- if (ring->head == ring->tail && dev_priv->sarea_priv)
- dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
-}
-
-static int i915_dma_cleanup(struct drm_device * dev)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- /* Make sure interrupts are disabled here because the uninstall ioctl
- * may not have been called from userspace and after dev_private
- * is freed, it's too late.
- */
- if (dev->irq_enabled)
- drm_irq_uninstall(dev);
-
- if (dev_priv->ring.virtual_start) {
- drm_core_ioremapfree(&dev_priv->ring.map, dev);
- dev_priv->ring.virtual_start = NULL;
- dev_priv->ring.map.handle = NULL;
- dev_priv->ring.map.size = 0;
- }
-
- /* Clear the HWS virtual address at teardown */
- if (I915_NEED_GFX_HWS(dev))
- i915_free_hws(dev);
-
- return 0;
-}
-
-static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
-
- dev_priv->sarea = drm_getsarea(dev);
- if (!dev_priv->sarea) {
- DRM_ERROR("can not find sarea!\n");
- i915_dma_cleanup(dev);
- return -EINVAL;
- }
-
- dev_priv->sarea_priv = (drm_i915_sarea_t *)
- ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
-
- if (init->ring_size != 0) {
- if (dev_priv->ring.ring_obj != NULL) {
- i915_dma_cleanup(dev);
- DRM_ERROR("Client tried to initialize ringbuffer in "
- "GEM mode\n");
- return -EINVAL;
- }
-
- dev_priv->ring.Size = init->ring_size;
- dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
-
- dev_priv->ring.map.offset = init->ring_start;
- dev_priv->ring.map.size = init->ring_size;
- dev_priv->ring.map.type = 0;
- dev_priv->ring.map.flags = 0;
- dev_priv->ring.map.mtrr = 0;
-
- drm_core_ioremap(&dev_priv->ring.map, dev);
-
- if (dev_priv->ring.map.handle == NULL) {
- i915_dma_cleanup(dev);
- DRM_ERROR("can not ioremap virtual address for"
- " ring buffer\n");
- return -ENOMEM;
- }
- }
-
- dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
-
- dev_priv->cpp = init->cpp;
- dev_priv->back_offset = init->back_offset;
- dev_priv->front_offset = init->front_offset;
- dev_priv->current_page = 0;
- dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
-
- /* Allow hardware batchbuffers unless told otherwise.
- */
- dev_priv->allow_batchbuffer = 1;
-
- return 0;
-}
-
-static int i915_dma_resume(struct drm_device * dev)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-
- DRM_DEBUG("\n");
-
- if (!dev_priv->sarea) {
- DRM_ERROR("can not find sarea!\n");
- return -EINVAL;
- }
-
- if (dev_priv->ring.map.handle == NULL) {
- DRM_ERROR("can not ioremap virtual address for"
- " ring buffer\n");
- return -ENOMEM;
- }
-
- /* Program Hardware Status Page */
- if (!dev_priv->hw_status_page) {
- DRM_ERROR("Can not find hardware status page\n");
- return -EINVAL;
- }
- DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
-
- if (dev_priv->status_gfx_addr != 0)
- I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
- else
- I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
- DRM_DEBUG("Enabled hardware status page\n");
-
- return 0;
-}
-
-static int i915_dma_init(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_init_t *init = data;
- int retcode = 0;
-
- switch (init->func) {
- case I915_INIT_DMA:
- retcode = i915_initialize(dev, init);
- break;
- case I915_CLEANUP_DMA:
- retcode = i915_dma_cleanup(dev);
- break;
- case I915_RESUME_DMA:
- retcode = i915_dma_resume(dev);
- break;
- default:
- retcode = -EINVAL;
- break;
- }
-
- return retcode;
-}
-
-/* Implement basically the same security restrictions as hardware does
- * for MI_BATCH_NON_SECURE. These can be made stricter at any time.
- *
- * Most of the calculations below involve calculating the size of a
- * particular instruction. It's important to get the size right as
- * that tells us where the next instruction to check is. Any illegal
- * instruction detected will be given a size of zero, which is a
- * signal to abort the rest of the buffer.
- */
-static int do_validate_cmd(int cmd)
-{
- switch (((cmd >> 29) & 0x7)) {
- case 0x0:
- switch ((cmd >> 23) & 0x3f) {
- case 0x0:
- return 1; /* MI_NOOP */
- case 0x4:
- return 1; /* MI_FLUSH */
- default:
- return 0; /* disallow everything else */
- }
- break;
- case 0x1:
- return 0; /* reserved */
- case 0x2:
- return (cmd & 0xff) + 2; /* 2d commands */
- case 0x3:
- if (((cmd >> 24) & 0x1f) <= 0x18)
- return 1;
-
- switch ((cmd >> 24) & 0x1f) {
- case 0x1c:
- return 1;
- case 0x1d:
- switch ((cmd >> 16) & 0xff) {
- case 0x3:
- return (cmd & 0x1f) + 2;
- case 0x4:
- return (cmd & 0xf) + 2;
- default:
- return (cmd & 0xffff) + 2;
- }
- case 0x1e:
- if (cmd & (1 << 23))
- return (cmd & 0xffff) + 1;
- else
- return 1;
- case 0x1f:
- if ((cmd & (1 << 23)) == 0) /* inline vertices */
- return (cmd & 0x1ffff) + 2;
- else if (cmd & (1 << 17)) /* indirect random */
- if ((cmd & 0xffff) == 0)
- return 0; /* unknown length, too hard */
- else
- return (((cmd & 0xffff) + 1) / 2) + 1;
- else
- return 2; /* indirect sequential */
- default:
- return 0;
- }
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int validate_cmd(int cmd)
-{
- int ret = do_validate_cmd(cmd);
-
-/* printk("validate_cmd( %x ): %d\n", cmd, ret); */
-
- return ret;
-}
-
-static int i915_emit_cmds(struct drm_device *dev, int __user *buffer,
- int dwords)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- int i;
- RING_LOCALS;
-
- if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
- return -EINVAL;
-
- BEGIN_LP_RING((dwords+1)&~1);
-
- for (i = 0; i < dwords;) {
- int cmd, sz;
-
- if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
- return -EINVAL;
-
- if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
- return -EINVAL;
-
- OUT_RING(cmd);
-
- while (++i, --sz) {
- if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
- sizeof(cmd))) {
- return -EINVAL;
- }
- OUT_RING(cmd);
- }
- }
-
- if (dwords & 1)
- OUT_RING(0);
-
- ADVANCE_LP_RING();
-
- return 0;
-}
-
-int i915_emit_box(struct drm_device * dev,
- struct drm_clip_rect __user * boxes,
- int i, int DR1, int DR4)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- struct drm_clip_rect box;
- RING_LOCALS;
-
- if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
- return -EFAULT;
- }
-
- if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
- DRM_ERROR("Bad box %d,%d..%d,%d\n",
- box.x1, box.y1, box.x2, box.y2);
- return -EINVAL;
- }
-
- if (IS_I965G(dev)) {
- BEGIN_LP_RING(4);
- OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
- OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
- OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
- OUT_RING(DR4);
- ADVANCE_LP_RING();
- } else {
- BEGIN_LP_RING(6);
- OUT_RING(GFX_OP_DRAWRECT_INFO);
- OUT_RING(DR1);
- OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
- OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
- OUT_RING(DR4);
- OUT_RING(0);
- ADVANCE_LP_RING();
- }
-
- return 0;
-}
-
-/* XXX: Emitting the counter should really be moved to part of the IRQ
- * emit. For now, do it in both places:
- */
-
-static void i915_emit_breadcrumb(struct drm_device *dev)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- RING_LOCALS;
-
- dev_priv->counter++;
- if (dev_priv->counter > 0x7FFFFFFFUL)
- dev_priv->counter = 0;
- if (dev_priv->sarea_priv)
- dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
-
- BEGIN_LP_RING(4);
- OUT_RING(MI_STORE_DWORD_INDEX);
- OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
- OUT_RING(dev_priv->counter);
- OUT_RING(0);
- ADVANCE_LP_RING();
-}
-
-static int i915_dispatch_cmdbuffer(struct drm_device * dev,
- drm_i915_cmdbuffer_t * cmd)
-{
- int nbox = cmd->num_cliprects;
- int i = 0, count, ret;
-
- if (cmd->sz & 0x3) {
- DRM_ERROR("alignment\n");
- return -EINVAL;
- }
-
- i915_kernel_lost_context(dev);
-
- count = nbox ? nbox : 1;
-
- for (i = 0; i < count; i++) {
- if (i < nbox) {
- ret = i915_emit_box(dev, cmd->cliprects, i,
- cmd->DR1, cmd->DR4);
- if (ret)
- return ret;
- }
-
- ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
- if (ret)
- return ret;
- }
-
- i915_emit_breadcrumb(dev);
- return 0;
-}
-
-static int i915_dispatch_batchbuffer(struct drm_device * dev,
- drm_i915_batchbuffer_t * batch)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- struct drm_clip_rect __user *boxes = batch->cliprects;
- int nbox = batch->num_cliprects;
- int i = 0, count;
- RING_LOCALS;
-
- if ((batch->start | batch->used) & 0x7) {
- DRM_ERROR("alignment\n");
- return -EINVAL;
- }
-
- i915_kernel_lost_context(dev);
-
- count = nbox ? nbox : 1;
-
- for (i = 0; i < count; i++) {
- if (i < nbox) {
- int ret = i915_emit_box(dev, boxes, i,
- batch->DR1, batch->DR4);
- if (ret)
- return ret;
- }
-
- if (!IS_I830(dev) && !IS_845G(dev)) {
- BEGIN_LP_RING(2);
- if (IS_I965G(dev)) {
- OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
- OUT_RING(batch->start);
- } else {
- OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
- OUT_RING(batch->start | MI_BATCH_NON_SECURE);
- }
- ADVANCE_LP_RING();
- } else {
- BEGIN_LP_RING(4);
- OUT_RING(MI_BATCH_BUFFER);
- OUT_RING(batch->start | MI_BATCH_NON_SECURE);
- OUT_RING(batch->start + batch->used - 4);
- OUT_RING(0);
- ADVANCE_LP_RING();
- }
- }
-
- i915_emit_breadcrumb(dev);
-
- return 0;
-}
-
-static int i915_dispatch_flip(struct drm_device * dev)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- RING_LOCALS;
-
- if (!dev_priv->sarea_priv)
- return -EINVAL;
-
- DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
- __func__,
- dev_priv->current_page,
- dev_priv->sarea_priv->pf_current_page);
-
- i915_kernel_lost_context(dev);
-
- BEGIN_LP_RING(2);
- OUT_RING(MI_FLUSH | MI_READ_FLUSH);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- BEGIN_LP_RING(6);
- OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
- OUT_RING(0);
- if (dev_priv->current_page == 0) {
- OUT_RING(dev_priv->back_offset);
- dev_priv->current_page = 1;
- } else {
- OUT_RING(dev_priv->front_offset);
- dev_priv->current_page = 0;
- }
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- BEGIN_LP_RING(2);
- OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
-
- BEGIN_LP_RING(4);
- OUT_RING(MI_STORE_DWORD_INDEX);
- OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
- OUT_RING(dev_priv->counter);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
- return 0;
-}
-
-static int i915_quiescent(struct drm_device * dev)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
-
- i915_kernel_lost_context(dev);
- return i915_wait_ring(dev, dev_priv->ring.Size - 8, __func__);
-}
-
-static int i915_flush_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- int ret;
-
- RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- ret = i915_quiescent(dev);
-
- return ret;
-}
-
-static int i915_batchbuffer(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
- dev_priv->sarea_priv;
- drm_i915_batchbuffer_t *batch = data;
- size_t cliplen;
- int ret;
-
- if (!dev_priv->allow_batchbuffer) {
- DRM_ERROR("Batchbuffer ioctl disabled\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
- batch->start, batch->used, batch->num_cliprects);
-
- RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- DRM_UNLOCK();
- cliplen = batch->num_cliprects * sizeof(struct drm_clip_rect);
- if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
- cliplen)) {
- DRM_LOCK();
- return -EFAULT;
- }
- if (batch->num_cliprects) {
- ret = vslock(batch->cliprects, cliplen);
- if (ret) {
- DRM_ERROR("Fault wiring cliprects\n");
- DRM_LOCK();
- return -EFAULT;
- }
- }
- DRM_LOCK();
-
- ret = i915_dispatch_batchbuffer(dev, batch);
-
- if (sarea_priv)
- sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
-
- DRM_UNLOCK();
- if (batch->num_cliprects)
- vsunlock(batch->cliprects, cliplen);
- DRM_LOCK();
-
- return ret;
-}
-
-static int i915_cmdbuffer(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
- dev_priv->sarea_priv;
- drm_i915_cmdbuffer_t *cmdbuf = data;
- size_t cliplen;
- int ret;
-
- DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
- cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
-
- RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- DRM_UNLOCK();
- cliplen = cmdbuf->num_cliprects * sizeof(struct drm_clip_rect);
- if (cmdbuf->num_cliprects && DRM_VERIFYAREA_READ(cmdbuf->cliprects,
- cliplen)) {
- DRM_ERROR("Fault accessing cliprects\n");
- DRM_LOCK();
- return -EFAULT;
- }
- if (cmdbuf->num_cliprects) {
- ret = vslock(cmdbuf->cliprects, cliplen);
- if (ret) {
- DRM_ERROR("Fault wiring cliprects\n");
- DRM_LOCK();
- return -EFAULT;
- }
- ret = vslock(cmdbuf->buf, cmdbuf->sz);
- if (ret) {
- vsunlock(cmdbuf->cliprects, cliplen);
- DRM_ERROR("Fault wiring cmds\n");
- DRM_LOCK();
- return -EFAULT;
- }
- }
- DRM_LOCK();
-
- ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
- DRM_UNLOCK();
- if (cmdbuf->num_cliprects) {
- vsunlock(cmdbuf->buf, cmdbuf->sz);
- vsunlock(cmdbuf->cliprects, cliplen);
- }
- DRM_LOCK();
- if (ret) {
- DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
- return ret;
- }
-
- if (sarea_priv)
- sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
- return 0;
-}
-
-static int i915_flip_bufs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- int ret;
-
- DRM_DEBUG("%s\n", __func__);
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- ret = i915_dispatch_flip(dev);
-
- return ret;
-}
-
-static int i915_getparam(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_getparam_t *param = data;
- int value;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- switch (param->param) {
- case I915_PARAM_IRQ_ACTIVE:
- value = dev->irq_enabled ? 1 : 0;
- break;
- case I915_PARAM_ALLOW_BATCHBUFFER:
- value = dev_priv->allow_batchbuffer ? 1 : 0;
- break;
- case I915_PARAM_LAST_DISPATCH:
- value = READ_BREADCRUMB(dev_priv);
- break;
- case I915_PARAM_CHIPSET_ID:
- value = dev->pci_device;
- break;
- case I915_PARAM_HAS_GEM:
- value = 0;
- break;
- default:
- DRM_ERROR("Unknown parameter %d\n", param->param);
- return -EINVAL;
- }
-
- if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
- DRM_ERROR("DRM_COPY_TO_USER failed\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-static int i915_setparam(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_setparam_t *param = data;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- switch (param->param) {
- case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
- break;
- case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
- dev_priv->tex_lru_log_granularity = param->value;
- break;
- case I915_SETPARAM_ALLOW_BATCHBUFFER:
- dev_priv->allow_batchbuffer = param->value;
- break;
- default:
- DRM_ERROR("unknown parameter %d\n", param->param);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int i915_set_status_page(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_hws_addr_t *hws = data;
-
- if (!I915_NEED_GFX_HWS(dev))
- return -EINVAL;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
-
- dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
-
- dev_priv->hws_map.offset = dev->agp->base + hws->addr;
- dev_priv->hws_map.size = 4*1024;
- dev_priv->hws_map.type = 0;
- dev_priv->hws_map.flags = 0;
- dev_priv->hws_map.mtrr = 0;
-
- drm_core_ioremap(&dev_priv->hws_map, dev);
- if (dev_priv->hws_map.handle == NULL) {
- i915_dma_cleanup(dev);
- dev_priv->status_gfx_addr = 0;
- DRM_ERROR("can not ioremap virtual address for"
- " G33 hw status page\n");
- return -ENOMEM;
- }
- dev_priv->hw_status_page = dev_priv->hws_map.handle;
-
- memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
- I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
- DRM_DEBUG("load hws HWS_PGA with gfx mem 0x%x\n",
- dev_priv->status_gfx_addr);
- DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
- return 0;
-}
-
-int i915_driver_load(struct drm_device *dev, unsigned long flags)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- unsigned long base, size;
- int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
-
- /* i915 has 4 more counters */
- dev->counters += 4;
- dev->types[6] = _DRM_STAT_IRQ;
- dev->types[7] = _DRM_STAT_PRIMARY;
- dev->types[8] = _DRM_STAT_SECONDARY;
- dev->types[9] = _DRM_STAT_DMA;
-
- dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER);
- if (dev_priv == NULL)
- return -ENOMEM;
-
- memset(dev_priv, 0, sizeof(drm_i915_private_t));
-
- dev->dev_private = (void *)dev_priv;
- dev_priv->dev = dev;
-
- /* Add register map (needed for suspend/resume) */
- base = drm_get_resource_start(dev, mmio_bar);
- size = drm_get_resource_len(dev, mmio_bar);
-
- ret = drm_addmap(dev, base, size, _DRM_REGISTERS,
- _DRM_KERNEL | _DRM_DRIVER, &dev_priv->mmio_map);
-
- if (IS_GM45(dev))
- dev->driver->get_vblank_counter = gm45_get_vblank_counter;
- else
- dev->driver->get_vblank_counter = i915_get_vblank_counter;
-
-#ifdef I915_HAVE_GEM
- i915_gem_load(dev);
-#endif
- /* Init HWS */
- if (!I915_NEED_GFX_HWS(dev)) {
- ret = i915_init_phys_hws(dev);
- if (ret != 0)
- return ret;
- }
-#ifdef __linux__
- /* On the 945G/GM, the chipset reports the MSI capability on the
- * integrated graphics even though the support isn't actually there
- * according to the published specs. It doesn't appear to function
- * correctly in testing on 945G.
- * This may be a side effect of MSI having been made available for PEG
- * and the registers being closely associated.
- *
- * According to chipset errata, on the 965GM, MSI interrupts may
- * be lost or delayed
- */
- if (!IS_I945G(dev) && !IS_I945GM(dev) && !IS_I965GM(dev))
- if (pci_enable_msi(dev->pdev))
- DRM_ERROR("failed to enable MSI\n");
-
- intel_opregion_init(dev);
-#endif
- DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
-
- ret = drm_vblank_init(dev, I915_NUM_PIPE);
-
- if (ret) {
- (void) i915_driver_unload(dev);
- return ret;
- }
-
- return ret;
-}
-
-int i915_driver_unload(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- i915_free_hws(dev);
-
- drm_rmmap(dev, dev_priv->mmio_map);
-#ifdef __linux__
- intel_opregion_free(dev);
-#endif
- DRM_SPINUNINIT(&dev_priv->user_irq_lock);
-
- drm_free(dev->dev_private, sizeof(drm_i915_private_t),
- DRM_MEM_DRIVER);
-
- return 0;
-}
-
-int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv)
-{
- struct drm_i915_file_private *i915_file_priv;
-
- DRM_DEBUG("\n");
- i915_file_priv = (struct drm_i915_file_private *)
- drm_alloc(sizeof(*i915_file_priv), DRM_MEM_FILES);
-
- if (!i915_file_priv)
- return -ENOMEM;
-
- file_priv->driver_priv = i915_file_priv;
-
- i915_file_priv->mm.last_gem_seqno = 0;
- i915_file_priv->mm.last_gem_throttle_seqno = 0;
-
- return 0;
-}
-
-void i915_driver_lastclose(struct drm_device * dev)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
-
- if (!dev_priv)
- return;
-#ifdef I915_HAVE_GEM
- i915_gem_lastclose(dev);
-#endif
- if (dev_priv->agp_heap)
- i915_mem_takedown(&(dev_priv->agp_heap));
-
- i915_dma_cleanup(dev);
-}
-
-void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- i915_mem_release(dev, file_priv, dev_priv->agp_heap);
-}
-
-void i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv)
-{
- struct drm_i915_file_private *i915_file_priv = file_priv->driver_priv;
-
- drm_free(i915_file_priv, sizeof(*i915_file_priv), DRM_MEM_FILES);
-}
-
-struct drm_ioctl_desc i915_ioctls[] = {
- DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP, i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
- DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE, i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
- DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH ),
- DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-#ifdef I915_HAVE_GEM
- DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_GEM_CREATE, i915_gem_create_ioctl, 0),
- DRM_IOCTL_DEF(DRM_I915_GEM_PREAD, i915_gem_pread_ioctl, 0),
- DRM_IOCTL_DEF(DRM_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, 0),
- DRM_IOCTL_DEF(DRM_I915_GEM_MMAP, i915_gem_mmap_ioctl, 0),
- DRM_IOCTL_DEF(DRM_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, 0),
- DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0),
- DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0),
- DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
-#endif
-};
-
-int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
-
-/**
- * Determine if the device really is AGP or not.
- *
- * All Intel graphics chipsets are treated as AGP, even if they are really
- * PCI-e.
- *
- * \param dev The device to be tested.
- *
- * \returns
- * A value of 1 is always retured to indictate every i9x5 is AGP.
- */
-int i915_driver_device_is_agp(struct drm_device * dev)
-{
- return 1;
-}
+++ /dev/null
-/*
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef _I915_DRM_H_
-#define _I915_DRM_H_
-
-/* Please note that modifications to all structs defined here are
- * subject to backwards-compatibility constraints.
- */
-
-#include "drm.h"
-
-/* Each region is a minimum of 16k, and there are at most 255 of them.
- */
-#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use
- * of chars for next/prev indices */
-#define I915_LOG_MIN_TEX_REGION_SIZE 14
-
-typedef struct _drm_i915_init {
- enum {
- I915_INIT_DMA = 0x01,
- I915_CLEANUP_DMA = 0x02,
- I915_RESUME_DMA = 0x03,
-
- /* Since this struct isn't versioned, just used a new
- * 'func' code to indicate the presence of dri2 sarea
- * info. */
- I915_INIT_DMA2 = 0x04
- } func;
- unsigned int mmio_offset;
- int sarea_priv_offset;
- unsigned int ring_start;
- unsigned int ring_end;
- unsigned int ring_size;
- unsigned int front_offset;
- unsigned int back_offset;
- unsigned int depth_offset;
- unsigned int w;
- unsigned int h;
- unsigned int pitch;
- unsigned int pitch_bits;
- unsigned int back_pitch;
- unsigned int depth_pitch;
- unsigned int cpp;
- unsigned int chipset;
- unsigned int sarea_handle;
-} drm_i915_init_t;
-
-typedef struct drm_i915_sarea {
- struct drm_tex_region texList[I915_NR_TEX_REGIONS + 1];
- int last_upload; /* last time texture was uploaded */
- int last_enqueue; /* last time a buffer was enqueued */
- int last_dispatch; /* age of the most recently dispatched buffer */
- int ctxOwner; /* last context to upload state */
- int texAge;
- int pf_enabled; /* is pageflipping allowed? */
- int pf_active;
- int pf_current_page; /* which buffer is being displayed? */
- int perf_boxes; /* performance boxes to be displayed */
- int width, height; /* screen size in pixels */
-
- drm_handle_t front_handle;
- int front_offset;
- int front_size;
-
- drm_handle_t back_handle;
- int back_offset;
- int back_size;
-
- drm_handle_t depth_handle;
- int depth_offset;
- int depth_size;
-
- drm_handle_t tex_handle;
- int tex_offset;
- int tex_size;
- int log_tex_granularity;
- int pitch;
- int rotation; /* 0, 90, 180 or 270 */
- int rotated_offset;
- int rotated_size;
- int rotated_pitch;
- int virtualX, virtualY;
-
- unsigned int front_tiled;
- unsigned int back_tiled;
- unsigned int depth_tiled;
- unsigned int rotated_tiled;
- unsigned int rotated2_tiled;
-
- /* compat defines for the period of time when pipeA_* got renamed
- * to planeA_*. They mean pipe, really.
- */
-#define planeA_x pipeA_x
-#define planeA_y pipeA_y
-#define planeA_w pipeA_w
-#define planeA_h pipeA_h
-#define planeB_x pipeB_x
-#define planeB_y pipeB_y
-#define planeB_w pipeB_w
-#define planeB_h pipeB_h
- int pipeA_x;
- int pipeA_y;
- int pipeA_w;
- int pipeA_h;
- int pipeB_x;
- int pipeB_y;
- int pipeB_w;
- int pipeB_h;
-
- /* Triple buffering */
- drm_handle_t third_handle;
- int third_offset;
- int third_size;
- unsigned int third_tiled;
-
- /* buffer object handles for the static buffers. May change
- * over the lifetime of the client, though it doesn't in our current
- * implementation.
- */
- unsigned int front_bo_handle;
- unsigned int back_bo_handle;
- unsigned int third_bo_handle;
- unsigned int depth_bo_handle;
-} drm_i915_sarea_t;
-
-/* Driver specific fence types and classes.
- */
-
-/* The only fence class we support */
-#define DRM_I915_FENCE_CLASS_ACCEL 0
-/* Fence type that guarantees read-write flush */
-#define DRM_I915_FENCE_TYPE_RW 2
-/* MI_FLUSH programmed just before the fence */
-#define DRM_I915_FENCE_FLAG_FLUSHED 0x01000000
-
-/* Flags for perf_boxes
- */
-#define I915_BOX_RING_EMPTY 0x1
-#define I915_BOX_FLIP 0x2
-#define I915_BOX_WAIT 0x4
-#define I915_BOX_TEXTURE_LOAD 0x8
-#define I915_BOX_LOST_CONTEXT 0x10
-
-/* I915 specific ioctls
- * The device specific ioctl range is 0x40 to 0x79.
- */
-#define DRM_I915_INIT 0x00
-#define DRM_I915_FLUSH 0x01
-#define DRM_I915_FLIP 0x02
-#define DRM_I915_BATCHBUFFER 0x03
-#define DRM_I915_IRQ_EMIT 0x04
-#define DRM_I915_IRQ_WAIT 0x05
-#define DRM_I915_GETPARAM 0x06
-#define DRM_I915_SETPARAM 0x07
-#define DRM_I915_ALLOC 0x08
-#define DRM_I915_FREE 0x09
-#define DRM_I915_INIT_HEAP 0x0a
-#define DRM_I915_CMDBUFFER 0x0b
-#define DRM_I915_DESTROY_HEAP 0x0c
-#define DRM_I915_SET_VBLANK_PIPE 0x0d
-#define DRM_I915_GET_VBLANK_PIPE 0x0e
-#define DRM_I915_VBLANK_SWAP 0x0f
-#define DRM_I915_MMIO 0x10
-#define DRM_I915_HWS_ADDR 0x11
-#define DRM_I915_EXECBUFFER 0x12
-#define DRM_I915_GEM_INIT 0x13
-#define DRM_I915_GEM_EXECBUFFER 0x14
-#define DRM_I915_GEM_PIN 0x15
-#define DRM_I915_GEM_UNPIN 0x16
-#define DRM_I915_GEM_BUSY 0x17
-#define DRM_I915_GEM_THROTTLE 0x18
-#define DRM_I915_GEM_ENTERVT 0x19
-#define DRM_I915_GEM_LEAVEVT 0x1a
-#define DRM_I915_GEM_CREATE 0x1b
-#define DRM_I915_GEM_PREAD 0x1c
-#define DRM_I915_GEM_PWRITE 0x1d
-#define DRM_I915_GEM_MMAP 0x1e
-#define DRM_I915_GEM_SET_DOMAIN 0x1f
-#define DRM_I915_GEM_SW_FINISH 0x20
-#define DRM_I915_GEM_SET_TILING 0x21
-#define DRM_I915_GEM_GET_TILING 0x22
-#define DRM_I915_GEM_GET_APERTURE 0x23
-#define DRM_I915_GEM_MMAP_GTT 0x24
-#define DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25
-#define DRM_I915_GEM_MADVISE 0x26
-#define DRM_I915_OVERLAY_PUT_IMAGE 0x27
-#define DRM_I915_OVERLAY_ATTRS 0x28
-
-#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
-#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
-#define DRM_IOCTL_I915_FLIP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FLIP, drm_i915_flip_t)
-#define DRM_IOCTL_I915_BATCHBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_BATCHBUFFER, drm_i915_batchbuffer_t)
-#define DRM_IOCTL_I915_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_IRQ_EMIT, drm_i915_irq_emit_t)
-#define DRM_IOCTL_I915_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_IRQ_WAIT, drm_i915_irq_wait_t)
-#define DRM_IOCTL_I915_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GETPARAM, drm_i915_getparam_t)
-#define DRM_IOCTL_I915_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SETPARAM, drm_i915_setparam_t)
-#define DRM_IOCTL_I915_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_ALLOC, drm_i915_mem_alloc_t)
-#define DRM_IOCTL_I915_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FREE, drm_i915_mem_free_t)
-#define DRM_IOCTL_I915_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT_HEAP, drm_i915_mem_init_heap_t)
-#define DRM_IOCTL_I915_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_CMDBUFFER, drm_i915_cmdbuffer_t)
-#define DRM_IOCTL_I915_DESTROY_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_DESTROY_HEAP, drm_i915_mem_destroy_heap_t)
-#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
-#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
-#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
-#define DRM_IOCTL_I915_MMIO DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_MMIO, drm_i915_mmio)
-#define DRM_IOCTL_I915_EXECBUFFER DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_EXECBUFFER, struct drm_i915_execbuffer)
-#define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init)
-#define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer)
-#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
-#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
-#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
-#define DRM_IOCTL_I915_GEM_THROTTLE DRM_IO ( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
-#define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
-#define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
-#define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create)
-#define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread)
-#define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite)
-#define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap)
-#define DRM_IOCTL_I915_GEM_MMAP_GTT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP_GTT, struct drm_i915_gem_mmap_gtt)
-#define DRM_IOCTL_I915_GEM_SET_DOMAIN DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SET_DOMAIN, struct drm_i915_gem_set_domain)
-#define DRM_IOCTL_I915_GEM_SW_FINISH DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SW_FINISH, struct drm_i915_gem_sw_finish)
-#define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling)
-#define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling)
-#define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture)
-#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_i915_get_pipe_from_crtc_id)
-#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise)
-#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_IOCTL_I915_OVERLAY_ATTRS, struct drm_intel_overlay_put_image)
-#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs)
-
-/* Asynchronous page flipping:
- */
-typedef struct drm_i915_flip {
- /*
- * This is really talking about planes, and we could rename it
- * except for the fact that some of the duplicated i915_drm.h files
- * out there check for HAVE_I915_FLIP and so might pick up this
- * version.
- */
- int pipes;
-} drm_i915_flip_t;
-
-/* Allow drivers to submit batchbuffers directly to hardware, relying
- * on the security mechanisms provided by hardware.
- */
-typedef struct drm_i915_batchbuffer {
- int start; /* agp offset */
- int used; /* nr bytes in use */
- int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */
- int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */
- int num_cliprects; /* mulitpass with multiple cliprects? */
- struct drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
-} drm_i915_batchbuffer_t;
-
-/* As above, but pass a pointer to userspace buffer which can be
- * validated by the kernel prior to sending to hardware.
- */
-typedef struct _drm_i915_cmdbuffer {
- char __user *buf; /* pointer to userspace command buffer */
- int sz; /* nr bytes in buf */
- int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */
- int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */
- int num_cliprects; /* mulitpass with multiple cliprects? */
- struct drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
-} drm_i915_cmdbuffer_t;
-
-/* Userspace can request & wait on irq's:
- */
-typedef struct drm_i915_irq_emit {
- int __user *irq_seq;
-} drm_i915_irq_emit_t;
-
-typedef struct drm_i915_irq_wait {
- int irq_seq;
-} drm_i915_irq_wait_t;
-
-/* Ioctl to query kernel params:
- */
-#define I915_PARAM_IRQ_ACTIVE 1
-#define I915_PARAM_ALLOW_BATCHBUFFER 2
-#define I915_PARAM_LAST_DISPATCH 3
-#define I915_PARAM_CHIPSET_ID 4
-#define I915_PARAM_HAS_GEM 5
-#define I915_PARAM_NUM_FENCES_AVAIL 6
-#define I915_PARAM_HAS_OVERLAY 7
-
-typedef struct drm_i915_getparam {
- int param;
- int __user *value;
-} drm_i915_getparam_t;
-
-/* Ioctl to set kernel params:
- */
-#define I915_SETPARAM_USE_MI_BATCHBUFFER_START 1
-#define I915_SETPARAM_TEX_LRU_LOG_GRANULARITY 2
-#define I915_SETPARAM_ALLOW_BATCHBUFFER 3
-#define I915_SETPARAM_NUM_USED_FENCES 4
-
-typedef struct drm_i915_setparam {
- int param;
- int value;
-} drm_i915_setparam_t;
-
-/* A memory manager for regions of shared memory:
- */
-#define I915_MEM_REGION_AGP 1
-
-typedef struct drm_i915_mem_alloc {
- int region;
- int alignment;
- int size;
- int __user *region_offset; /* offset from start of fb or agp */
-} drm_i915_mem_alloc_t;
-
-typedef struct drm_i915_mem_free {
- int region;
- int region_offset;
-} drm_i915_mem_free_t;
-
-typedef struct drm_i915_mem_init_heap {
- int region;
- int size;
- int start;
-} drm_i915_mem_init_heap_t;
-
-/* Allow memory manager to be torn down and re-initialized (eg on
- * rotate):
- */
-typedef struct drm_i915_mem_destroy_heap {
- int region;
-} drm_i915_mem_destroy_heap_t;
-
-/* Allow X server to configure which pipes to monitor for vblank signals
- */
-#define DRM_I915_VBLANK_PIPE_A 1
-#define DRM_I915_VBLANK_PIPE_B 2
-
-typedef struct drm_i915_vblank_pipe {
- int pipe;
-} drm_i915_vblank_pipe_t;
-
-/* Schedule buffer swap at given vertical blank:
- */
-typedef struct drm_i915_vblank_swap {
- drm_drawable_t drawable;
- enum drm_vblank_seq_type seqtype;
- unsigned int sequence;
-} drm_i915_vblank_swap_t;
-
-#define I915_MMIO_READ 0
-#define I915_MMIO_WRITE 1
-
-#define I915_MMIO_MAY_READ 0x1
-#define I915_MMIO_MAY_WRITE 0x2
-
-#define MMIO_REGS_IA_PRIMATIVES_COUNT 0
-#define MMIO_REGS_IA_VERTICES_COUNT 1
-#define MMIO_REGS_VS_INVOCATION_COUNT 2
-#define MMIO_REGS_GS_PRIMITIVES_COUNT 3
-#define MMIO_REGS_GS_INVOCATION_COUNT 4
-#define MMIO_REGS_CL_PRIMITIVES_COUNT 5
-#define MMIO_REGS_CL_INVOCATION_COUNT 6
-#define MMIO_REGS_PS_INVOCATION_COUNT 7
-#define MMIO_REGS_PS_DEPTH_COUNT 8
-
-typedef struct drm_i915_mmio_entry {
- unsigned int flag;
- unsigned int offset;
- unsigned int size;
-} drm_i915_mmio_entry_t;
-
-typedef struct drm_i915_mmio {
- unsigned int read_write:1;
- unsigned int reg:31;
- void __user *data;
-} drm_i915_mmio_t;
-
-typedef struct drm_i915_hws_addr {
- uint64_t addr;
-} drm_i915_hws_addr_t;
-
-struct drm_i915_gem_init {
- /**
- * Beginning offset in the GTT to be managed by the DRM memory
- * manager.
- */
- uint64_t gtt_start;
- /**
- * Ending offset in the GTT to be managed by the DRM memory
- * manager.
- */
- uint64_t gtt_end;
-};
-
-struct drm_i915_gem_create {
- /**
- * Requested size for the object.
- *
- * The (page-aligned) allocated size for the object will be returned.
- */
- uint64_t size;
- /**
- * Returned handle for the object.
- *
- * Object handles are nonzero.
- */
- uint32_t handle;
- uint32_t pad;
-};
-
-struct drm_i915_gem_pread {
- /** Handle for the object being read. */
- uint32_t handle;
- uint32_t pad;
- /** Offset into the object to read from */
- uint64_t offset;
- /** Length of data to read */
- uint64_t size;
- /**
- * Pointer to write the data into.
- *
- * This is a fixed-size type for 32/64 compatibility.
- */
- uint64_t data_ptr;
-};
-
-struct drm_i915_gem_pwrite {
- /** Handle for the object being written to. */
- uint32_t handle;
- uint32_t pad;
- /** Offset into the object to write to */
- uint64_t offset;
- /** Length of data to write */
- uint64_t size;
- /**
- * Pointer to read the data from.
- *
- * This is a fixed-size type for 32/64 compatibility.
- */
- uint64_t data_ptr;
-};
-
-struct drm_i915_gem_mmap {
- /** Handle for the object being mapped. */
- uint32_t handle;
- uint32_t pad;
- /** Offset in the object to map. */
- uint64_t offset;
- /**
- * Length of data to map.
- *
- * The value will be page-aligned.
- */
- uint64_t size;
- /**
- * Returned pointer the data was mapped at.
- *
- * This is a fixed-size type for 32/64 compatibility.
- */
- uint64_t addr_ptr;
-};
-
-struct drm_i915_gem_mmap_gtt {
- /** Handle for the object being mapped. */
- uint32_t handle;
- uint32_t pad;
- /**
- * Fake offset to use for subsequent mmap call
- *
- * This is a fixed-size type for 32/64 compatibility.
- */
- uint64_t offset;
-};
-
-struct drm_i915_gem_set_domain {
- /** Handle for the object */
- uint32_t handle;
-
- /** New read domains */
- uint32_t read_domains;
-
- /** New write domain */
- uint32_t write_domain;
-};
-
-struct drm_i915_gem_sw_finish {
- /** Handle for the object */
- uint32_t handle;
-};
-
-struct drm_i915_gem_relocation_entry {
- /**
- * Handle of the buffer being pointed to by this relocation entry.
- *
- * It's appealing to make this be an index into the mm_validate_entry
- * list to refer to the buffer, but this allows the driver to create
- * a relocation list for state buffers and not re-write it per
- * exec using the buffer.
- */
- uint32_t target_handle;
-
- /**
- * Value to be added to the offset of the target buffer to make up
- * the relocation entry.
- */
- uint32_t delta;
-
- /** Offset in the buffer the relocation entry will be written into */
- uint64_t offset;
-
- /**
- * Offset value of the target buffer that the relocation entry was last
- * written as.
- *
- * If the buffer has the same offset as last time, we can skip syncing
- * and writing the relocation. This value is written back out by
- * the execbuffer ioctl when the relocation is written.
- */
- uint64_t presumed_offset;
-
- /**
- * Target memory domains read by this operation.
- */
- uint32_t read_domains;
-
- /**
- * Target memory domains written by this operation.
- *
- * Note that only one domain may be written by the whole
- * execbuffer operation, so that where there are conflicts,
- * the application will get -EINVAL back.
- */
- uint32_t write_domain;
-};
-
-/** @{
- * Intel memory domains
- *
- * Most of these just align with the various caches in
- * the system and are used to flush and invalidate as
- * objects end up cached in different domains.
- */
-/** CPU cache */
-#define I915_GEM_DOMAIN_CPU 0x00000001
-/** Render cache, used by 2D and 3D drawing */
-#define I915_GEM_DOMAIN_RENDER 0x00000002
-/** Sampler cache, used by texture engine */
-#define I915_GEM_DOMAIN_SAMPLER 0x00000004
-/** Command queue, used to load batch buffers */
-#define I915_GEM_DOMAIN_COMMAND 0x00000008
-/** Instruction cache, used by shader programs */
-#define I915_GEM_DOMAIN_INSTRUCTION 0x00000010
-/** Vertex address cache */
-#define I915_GEM_DOMAIN_VERTEX 0x00000020
-/** GTT domain - aperture and scanout */
-#define I915_GEM_DOMAIN_GTT 0x00000040
-/** @} */
-
-struct drm_i915_gem_exec_object {
- /**
- * User's handle for a buffer to be bound into the GTT for this
- * operation.
- */
- uint32_t handle;
-
- /** Number of relocations to be performed on this buffer */
- uint32_t relocation_count;
- /**
- * Pointer to array of struct drm_i915_gem_relocation_entry containing
- * the relocations to be performed in this buffer.
- */
- uint64_t relocs_ptr;
-
- /** Required alignment in graphics aperture */
- uint64_t alignment;
-
- /**
- * Returned value of the updated offset of the object, for future
- * presumed_offset writes.
- */
- uint64_t offset;
-};
-
-struct drm_i915_gem_execbuffer {
- /**
- * List of buffers to be validated with their relocations to be
- * performend on them.
- *
- * This is a pointer to an array of struct drm_i915_gem_validate_entry.
- *
- * These buffers must be listed in an order such that all relocations
- * a buffer is performing refer to buffers that have already appeared
- * in the validate list.
- */
- uint64_t buffers_ptr;
- uint32_t buffer_count;
-
- /** Offset in the batchbuffer to start execution from. */
- uint32_t batch_start_offset;
- /** Bytes used in batchbuffer from batch_start_offset */
- uint32_t batch_len;
- uint32_t DR1;
- uint32_t DR4;
- uint32_t num_cliprects;
- /** This is a struct drm_clip_rect *cliprects */
- uint64_t cliprects_ptr;
-};
-
-struct drm_i915_gem_pin {
- /** Handle of the buffer to be pinned. */
- uint32_t handle;
- uint32_t pad;
-
- /** alignment required within the aperture */
- uint64_t alignment;
-
- /** Returned GTT offset of the buffer. */
- uint64_t offset;
-};
-
-struct drm_i915_gem_unpin {
- /** Handle of the buffer to be unpinned. */
- uint32_t handle;
- uint32_t pad;
-};
-
-struct drm_i915_gem_busy {
- /** Handle of the buffer to check for busy */
- uint32_t handle;
-
- /** Return busy status (1 if busy, 0 if idle) */
- uint32_t busy;
-};
-
-#define I915_TILING_NONE 0
-#define I915_TILING_X 1
-#define I915_TILING_Y 2
-
-#define I915_BIT_6_SWIZZLE_NONE 0
-#define I915_BIT_6_SWIZZLE_9 1
-#define I915_BIT_6_SWIZZLE_9_10 2
-#define I915_BIT_6_SWIZZLE_9_11 3
-#define I915_BIT_6_SWIZZLE_9_10_11 4
-/* Not seen by userland */
-#define I915_BIT_6_SWIZZLE_UNKNOWN 5
-
-struct drm_i915_gem_set_tiling {
- /** Handle of the buffer to have its tiling state updated */
- uint32_t handle;
-
- /**
- * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
- * I915_TILING_Y).
- *
- * This value is to be set on request, and will be updated by the
- * kernel on successful return with the actual chosen tiling layout.
- *
- * The tiling mode may be demoted to I915_TILING_NONE when the system
- * has bit 6 swizzling that can't be managed correctly by GEM.
- *
- * Buffer contents become undefined when changing tiling_mode.
- */
- uint32_t tiling_mode;
-
- /**
- * Stride in bytes for the object when in I915_TILING_X or
- * I915_TILING_Y.
- */
- uint32_t stride;
-
- /**
- * Returned address bit 6 swizzling required for CPU access through
- * mmap mapping.
- */
- uint32_t swizzle_mode;
-};
-
-struct drm_i915_gem_get_tiling {
- /** Handle of the buffer to get tiling state for. */
- uint32_t handle;
-
- /**
- * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
- * I915_TILING_Y).
- */
- uint32_t tiling_mode;
-
- /**
- * Returned address bit 6 swizzling required for CPU access through
- * mmap mapping.
- */
- uint32_t swizzle_mode;
-};
-
-struct drm_i915_gem_get_aperture {
- /** Total size of the aperture used by i915_gem_execbuffer, in bytes */
- uint64_t aper_size;
-
- /**
- * Available space in the aperture used by i915_gem_execbuffer, in
- * bytes
- */
- uint64_t aper_available_size;
-};
-
-struct drm_i915_get_pipe_from_crtc_id {
- /** ID of CRTC being requested **/
- uint32_t crtc_id;
-
- /** pipe of requested CRTC **/
- uint32_t pipe;
-};
-
-#define I915_MADV_WILLNEED 0
-#define I915_MADV_DONTNEED 1
-
-struct drm_i915_gem_madvise {
- /** Handle of the buffer to change the backing store advice. */
- uint32_t handle;
-
- /** Advice. */
- uint32_t madv;
-
- /** Whether or not the backing store still exists */
- uint32_t retained;
-};
-
-/* flags */
-#define I915_OVERLAY_TYPE_MASK 0xff
-#define I915_OVERLAY_YUV_PLANAR 0x01
-#define I915_OVERLAY_YUV_PACKED 0x02
-#define I915_OVERLAY_RGB 0x03
-
-#define I915_OVERLAY_DEPTH_MASK 0xff00
-#define I915_OVERLAY_RGB24 0x1000
-#define I915_OVERLAY_RGB16 0x2000
-#define I915_OVERLAY_RGB15 0x3000
-#define I915_OVERLAY_YUV422 0x0100
-#define I915_OVERLAY_YUV411 0x0200
-#define I915_OVERLAY_YUV420 0x0300
-#define I915_OVERLAY_YUV410 0x0400
-
-#define I915_OVERLAY_SWAP_MASK 0xff0000
-#define I915_OVERLAY_NO_SWAP 0x000000
-#define I915_OVERLAY_UV_SWAP 0x010000
-#define I915_OVERLAY_Y_SWAP 0x020000
-#define I915_OVERLAY_Y_AND_UV_SWAP 0x030000
-
-#define I915_OVERLAY_FLAGS_MASK 0xff000000
-#define I915_OVERLAY_ENABLE 0x01000000
-
-struct drm_intel_overlay_put_image {
- /* various flags and src format description */
- uint32_t flags;
- /* source picture description */
- uint32_t bo_handle;
- /* stride values and offsets are in bytes, buffer relative */
- uint16_t stride_Y; /* stride for packed formats */
- uint16_t stride_UV;
- uint32_t offset_Y; /* offset for packet formats */
- uint32_t offset_U;
- uint32_t offset_V;
- /* in pixels */
- uint16_t src_width;
- uint16_t src_height;
- /* to compensate the scaling factors for partially covered surfaces */
- uint16_t src_scan_width;
- uint16_t src_scan_height;
- /* output crtc description */
- uint32_t crtc_id;
- uint16_t dst_x;
- uint16_t dst_y;
- uint16_t dst_width;
- uint16_t dst_height;
-};
-
-/* flags */
-#define I915_OVERLAY_UPDATE_ATTRS (1<<0)
-#define I915_OVERLAY_UPDATE_GAMMA (1<<1)
-struct drm_intel_overlay_attrs {
- uint32_t flags;
- uint32_t color_key;
- int32_t brightness;
- uint32_t contrast;
- uint32_t saturation;
- uint32_t gamma0;
- uint32_t gamma1;
- uint32_t gamma2;
- uint32_t gamma3;
- uint32_t gamma4;
- uint32_t gamma5;
-};
-
-#endif /* _I915_DRM_H_ */
+++ /dev/null
-/* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
- */
-/*
- *
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef _I915_DRV_H_
-#define _I915_DRV_H_
-
-#include "i915_reg.h"
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "Tungsten Graphics, Inc."
-
-#define DRIVER_NAME "i915"
-#define DRIVER_DESC "Intel Graphics"
-#define DRIVER_DATE "20080730"
-
-enum pipe {
- PIPE_A = 0,
- PIPE_B,
-};
-
-#define I915_NUM_PIPE 2
-
-/* Interface history:
- *
- * 1.1: Original.
- * 1.2: Add Power Management
- * 1.3: Add vblank support
- * 1.4: Fix cmdbuffer path, add heap destroy
- * 1.5: Add vblank pipe configuration
- * 1.6: - New ioctl for scheduling buffer swaps on vertical blank
- * - Support vertical blank on secondary display pipe
- */
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 6
-#define DRIVER_PATCHLEVEL 0
-
-#define WATCH_COHERENCY 0
-#define WATCH_BUF 0
-#define WATCH_EXEC 0
-#define WATCH_LRU 0
-#define WATCH_RELOC 0
-#define WATCH_INACTIVE 0
-#define WATCH_PWRITE 0
-
-typedef struct _drm_i915_ring_buffer {
- int tail_mask;
- unsigned long Size;
- u8 *virtual_start;
- int head;
- int tail;
- int space;
- drm_local_map_t map;
- struct drm_gem_object *ring_obj;
-} drm_i915_ring_buffer_t;
-
-struct mem_block {
- struct mem_block *next;
- struct mem_block *prev;
- int start;
- int size;
- struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
-};
-
-struct opregion_header;
-struct opregion_acpi;
-struct opregion_swsci;
-struct opregion_asle;
-
-struct intel_opregion {
- struct opregion_header *header;
- struct opregion_acpi *acpi;
- struct opregion_swsci *swsci;
- struct opregion_asle *asle;
- int enabled;
-};
-
-typedef struct drm_i915_private {
- struct drm_device *dev;
-
- drm_local_map_t *sarea;
- drm_local_map_t *mmio_map;
-
- drm_i915_sarea_t *sarea_priv;
- drm_i915_ring_buffer_t ring;
-
- drm_dma_handle_t *status_page_dmah;
- void *hw_status_page;
- dma_addr_t dma_status_page;
- uint32_t counter;
- unsigned int status_gfx_addr;
- drm_local_map_t hws_map;
- struct drm_gem_object *hws_obj;
-
- unsigned int cpp;
- int back_offset;
- int front_offset;
- int current_page;
- int page_flipping;
-
- wait_queue_head_t irq_queue;
- atomic_t irq_received;
- /** Protects user_irq_refcount and irq_mask_reg */
- DRM_SPINTYPE user_irq_lock;
- /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
- int user_irq_refcount;
- /** Cached value of IER to avoid reads in updating the bitfield */
- u32 irq_mask_reg;
- u32 pipestat[2];
-
- int tex_lru_log_granularity;
- int allow_batchbuffer;
- struct mem_block *agp_heap;
- unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
- int vblank_pipe;
-
- struct intel_opregion opregion;
-
- /* Register state */
- u8 saveLBB;
- u32 saveDSPACNTR;
- u32 saveDSPBCNTR;
- u32 saveDSPARB;
- u32 savePIPEACONF;
- u32 savePIPEBCONF;
- u32 savePIPEASRC;
- u32 savePIPEBSRC;
- u32 saveFPA0;
- u32 saveFPA1;
- u32 saveDPLL_A;
- u32 saveDPLL_A_MD;
- u32 saveHTOTAL_A;
- u32 saveHBLANK_A;
- u32 saveHSYNC_A;
- u32 saveVTOTAL_A;
- u32 saveVBLANK_A;
- u32 saveVSYNC_A;
- u32 saveBCLRPAT_A;
- u32 savePIPEASTAT;
- u32 saveDSPASTRIDE;
- u32 saveDSPASIZE;
- u32 saveDSPAPOS;
- u32 saveDSPAADDR;
- u32 saveDSPASURF;
- u32 saveDSPATILEOFF;
- u32 savePFIT_PGM_RATIOS;
- u32 saveBLC_PWM_CTL;
- u32 saveBLC_PWM_CTL2;
- u32 saveFPB0;
- u32 saveFPB1;
- u32 saveDPLL_B;
- u32 saveDPLL_B_MD;
- u32 saveHTOTAL_B;
- u32 saveHBLANK_B;
- u32 saveHSYNC_B;
- u32 saveVTOTAL_B;
- u32 saveVBLANK_B;
- u32 saveVSYNC_B;
- u32 saveBCLRPAT_B;
- u32 savePIPEBSTAT;
- u32 saveDSPBSTRIDE;
- u32 saveDSPBSIZE;
- u32 saveDSPBPOS;
- u32 saveDSPBADDR;
- u32 saveDSPBSURF;
- u32 saveDSPBTILEOFF;
- u32 saveVGA0;
- u32 saveVGA1;
- u32 saveVGA_PD;
- u32 saveVGACNTRL;
- u32 saveADPA;
- u32 saveLVDS;
- u32 savePP_ON_DELAYS;
- u32 savePP_OFF_DELAYS;
- u32 saveDVOA;
- u32 saveDVOB;
- u32 saveDVOC;
- u32 savePP_ON;
- u32 savePP_OFF;
- u32 savePP_CONTROL;
- u32 savePP_DIVISOR;
- u32 savePFIT_CONTROL;
- u32 save_palette_a[256];
- u32 save_palette_b[256];
- u32 saveFBC_CFB_BASE;
- u32 saveFBC_LL_BASE;
- u32 saveFBC_CONTROL;
- u32 saveFBC_CONTROL2;
- u32 saveIER;
- u32 saveIIR;
- u32 saveIMR;
- u32 saveCACHE_MODE_0;
- u32 saveD_STATE;
- u32 saveCG_2D_DIS;
- u32 saveMI_ARB_STATE;
- u32 saveSWF0[16];
- u32 saveSWF1[16];
- u32 saveSWF2[3];
- u8 saveMSR;
- u8 saveSR[8];
- u8 saveGR[25];
- u8 saveAR_INDEX;
- u8 saveAR[21];
- u8 saveDACMASK;
- u8 saveDACDATA[256*3]; /* 256 3-byte colors */
- u8 saveCR[37];
- struct {
-#ifdef __linux__
- struct drm_mm gtt_space;
-#endif
- /**
- * List of objects currently involved in rendering from the
- * ringbuffer.
- *
- * A reference is held on the buffer while on this list.
- */
- struct list_head active_list;
-
- /**
- * List of objects which are not in the ringbuffer but which
- * still have a write_domain which needs to be flushed before
- * unbinding.
- *
- * A reference is held on the buffer while on this list.
- */
- struct list_head flushing_list;
-
- /**
- * LRU list of objects which are not in the ringbuffer and
- * are ready to unbind, but are still in the GTT.
- *
- * A reference is not held on the buffer while on this list,
- * as merely being GTT-bound shouldn't prevent its being
- * freed, and we'll pull it off the list in the free path.
- */
- struct list_head inactive_list;
-
- /**
- * List of breadcrumbs associated with GPU requests currently
- * outstanding.
- */
- struct list_head request_list;
-#ifdef __linux__
- /**
- * We leave the user IRQ off as much as possible,
- * but this means that requests will finish and never
- * be retired once the system goes idle. Set a timer to
- * fire periodically while the ring is running. When it
- * fires, go retire requests.
- */
- struct delayed_work retire_work;
-#endif
- uint32_t next_gem_seqno;
-
- /**
- * Waiting sequence number, if any
- */
- uint32_t waiting_gem_seqno;
-
- /**
- * Last seq seen at irq time
- */
- uint32_t irq_gem_seqno;
-
- /**
- * Flag if the X Server, and thus DRM, is not currently in
- * control of the device.
- *
- * This is set between LeaveVT and EnterVT. It needs to be
- * replaced with a semaphore. It also needs to be
- * transitioned away from for kernel modesetting.
- */
- int suspended;
-
- /**
- * Flag if the hardware appears to be wedged.
- *
- * This is set when attempts to idle the device timeout.
- * It prevents command submission from occuring and makes
- * every pending request fail
- */
- int wedged;
-
- /** Bit 6 swizzling required for X tiling */
- uint32_t bit_6_swizzle_x;
- /** Bit 6 swizzling required for Y tiling */
- uint32_t bit_6_swizzle_y;
- } mm;
-} drm_i915_private_t;
-
-enum intel_chip_family {
- CHIP_I8XX = 0x01,
- CHIP_I9XX = 0x02,
- CHIP_I915 = 0x04,
- CHIP_I965 = 0x08,
-};
-
-/** driver private structure attached to each drm_gem_object */
-struct drm_i915_gem_object {
- struct drm_gem_object *obj;
-
- /** Current space allocated to this object in the GTT, if any. */
- struct drm_mm_node *gtt_space;
-
- /** This object's place on the active/flushing/inactive lists */
- struct list_head list;
-
- /**
- * This is set if the object is on the active or flushing lists
- * (has pending rendering), and is not set if it's on inactive (ready
- * to be unbound).
- */
- int active;
-
- /**
- * This is set if the object has been written to since last bound
- * to the GTT
- */
- int dirty;
-
- /** AGP memory structure for our GTT binding. */
- DRM_AGP_MEM *agp_mem;
-
- struct page **page_list;
-
- /**
- * Current offset of the object in GTT space.
- *
- * This is the same as gtt_space->start
- */
- uint32_t gtt_offset;
-
- /** Boolean whether this object has a valid gtt offset. */
- int gtt_bound;
-
- /** How many users have pinned this object in GTT space */
- int pin_count;
-
- /** Breadcrumb of last rendering to the buffer. */
- uint32_t last_rendering_seqno;
-
- /** Current tiling mode for the object. */
- uint32_t tiling_mode;
-
- /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */
- uint32_t agp_type;
-
- /**
- * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when
- * GEM_DOMAIN_CPU is not in the object's read domain.
- */
- uint8_t *page_cpu_valid;
-};
-
-/**
- * Request queue structure.
- *
- * The request queue allows us to note sequence numbers that have been emitted
- * and may be associated with active buffers to be retired.
- *
- * By keeping this list, we can avoid having to do questionable
- * sequence-number comparisons on buffer last_rendering_seqnos, and associate
- * an emission time with seqnos for tracking how far ahead of the GPU we are.
- */
-struct drm_i915_gem_request {
- /** GEM sequence number associated with this request. */
- uint32_t seqno;
-
- /** Time at which this request was emitted, in jiffies. */
- unsigned long emitted_jiffies;
-
- /** Cache domains that were flushed at the start of the request. */
- uint32_t flush_domains;
-
- struct list_head list;
-};
-
-struct drm_i915_file_private {
- struct {
- uint32_t last_gem_seqno;
- uint32_t last_gem_throttle_seqno;
- } mm;
-};
-
-extern struct drm_ioctl_desc i915_ioctls[];
-extern int i915_max_ioctl;
-
- /* i915_dma.c */
-extern void i915_kernel_lost_context(struct drm_device * dev);
-extern int i915_driver_load(struct drm_device *, unsigned long flags);
-extern int i915_driver_unload(struct drm_device *);
-extern int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv);
-extern void i915_driver_lastclose(struct drm_device * dev);
-extern void i915_driver_preclose(struct drm_device *dev,
- struct drm_file *file_priv);
-extern void i915_driver_postclose(struct drm_device *dev,
- struct drm_file *file_priv);
-extern int i915_driver_device_is_agp(struct drm_device * dev);
-extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg);
-extern int i915_emit_box(struct drm_device *dev,
- struct drm_clip_rect __user *boxes,
- int i, int DR1, int DR4);
-
-/* i915_irq.c */
-extern int i915_irq_emit(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int i915_irq_wait(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-void i915_user_irq_get(struct drm_device *dev);
-void i915_user_irq_put(struct drm_device *dev);
-
-extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
-extern void i915_driver_irq_preinstall(struct drm_device * dev);
-extern int i915_driver_irq_postinstall(struct drm_device *dev);
-extern void i915_driver_irq_uninstall(struct drm_device * dev);
-extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int i915_enable_vblank(struct drm_device *dev, int crtc);
-extern void i915_disable_vblank(struct drm_device *dev, int crtc);
-extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
-extern u32 gm45_get_vblank_counter(struct drm_device *dev, int crtc);
-extern int i915_vblank_swap(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-void
-i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
-
-void
-i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
-
-
-/* i915_mem.c */
-extern int i915_mem_alloc(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int i915_mem_free(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int i915_mem_init_heap(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int i915_mem_destroy_heap(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern void i915_mem_takedown(struct mem_block **heap);
-extern void i915_mem_release(struct drm_device * dev,
- struct drm_file *file_priv, struct mem_block *heap);
-#ifdef I915_HAVE_GEM
-/* i915_gem.c */
-int i915_gem_init_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_create_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_pread_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_execbuffer(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_pin_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_busy_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_throttle_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_set_tiling(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int i915_gem_get_tiling(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-void i915_gem_load(struct drm_device *dev);
-int i915_gem_proc_init(struct drm_minor *minor);
-void i915_gem_proc_cleanup(struct drm_minor *minor);
-int i915_gem_init_object(struct drm_gem_object *obj);
-void i915_gem_free_object(struct drm_gem_object *obj);
-int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
-void i915_gem_object_unpin(struct drm_gem_object *obj);
-void i915_gem_lastclose(struct drm_device *dev);
-uint32_t i915_get_gem_seqno(struct drm_device *dev);
-void i915_gem_retire_requests(struct drm_device *dev);
-void i915_gem_retire_work_handler(struct work_struct *work);
-void i915_gem_clflush_object(struct drm_gem_object *obj);
-
-/* i915_gem_tiling.c */
-void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
-
-/* i915_gem_debug.c */
-void i915_gem_dump_object(struct drm_gem_object *obj, int len,
- const char *where, uint32_t mark);
-#if WATCH_INACTIVE
-void i915_verify_inactive(struct drm_device *dev, char *file, int line);
-#else
-#define i915_verify_inactive(dev, file, line)
-#endif
-void i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle);
-void i915_gem_dump_object(struct drm_gem_object *obj, int len,
- const char *where, uint32_t mark);
-void i915_dump_lru(struct drm_device *dev, const char *where);
-#endif /* I915_HAVE_GEM */
-
-/* i915_suspend.c */
-extern int i915_save_state(struct drm_device *dev);
-extern int i915_restore_state(struct drm_device *dev);
-
-/* i915_opregion.c */
-extern int intel_opregion_init(struct drm_device *dev);
-extern void intel_opregion_free(struct drm_device *dev);
-extern void opregion_asle_intr(struct drm_device *dev);
-extern void opregion_enable_asle(struct drm_device *dev);
-
-/**
- * Lock test for when it's just for synchronization of ring access.
- *
- * In that case, we don't need to do it when GEM is initialized as nobody else
- * has access to the ring.
- */
-#define RING_LOCK_TEST_WITH_RETURN(dev, file_priv) do { \
- if (((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == NULL) \
- LOCK_TEST_WITH_RETURN(dev, file_priv); \
-} while (0)
-
-#if defined(__FreeBSD__)
-typedef boolean_t bool;
-#endif
-
-#define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg))
-#define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val))
-#define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg))
-#define I915_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, (reg), (val))
-#define I915_READ8(reg) DRM_READ8(dev_priv->mmio_map, (reg))
-#define I915_WRITE8(reg,val) DRM_WRITE8(dev_priv->mmio_map, (reg), (val))
-
-#define I915_VERBOSE 0
-
-#define RING_LOCALS unsigned int outring, ringmask, outcount; \
- volatile char *virt;
-
-#define BEGIN_LP_RING(n) do { \
- if (I915_VERBOSE) \
- DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n)); \
- if (dev_priv->ring.space < (n)*4) \
- i915_wait_ring(dev, (n)*4, __func__); \
- outcount = 0; \
- outring = dev_priv->ring.tail; \
- ringmask = dev_priv->ring.tail_mask; \
- virt = dev_priv->ring.virtual_start; \
-} while (0)
-
-#define OUT_RING(n) do { \
- if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
- *(volatile unsigned int *)(virt + outring) = (n); \
- outcount++; \
- outring += 4; \
- outring &= ringmask; \
-} while (0)
-
-#define ADVANCE_LP_RING() do { \
- if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \
- dev_priv->ring.tail = outring; \
- dev_priv->ring.space -= outcount * 4; \
- I915_WRITE(PRB0_TAIL, outring); \
-} while(0)
-
-/**
- * Reads a dword out of the status page, which is written to from the command
- * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
- * MI_STORE_DATA_IMM.
- *
- * The following dwords have a reserved meaning:
- * 0x00: ISR copy, updated when an ISR bit not set in the HWSTAM changes.
- * 0x04: ring 0 head pointer
- * 0x05: ring 1 head pointer (915-class)
- * 0x06: ring 2 head pointer (915-class)
- * 0x10-0x1b: Context status DWords (GM45)
- * 0x1f: Last written status offset. (GM45)
- *
- * The area from dword 0x20 to 0x3ff is available for driver usage.
- */
-#define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
-#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)
-#define I915_GEM_HWS_INDEX 0x20
-#define I915_BREADCRUMB_INDEX 0x21
-
-extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
-
-#define IS_I830(dev) ((dev)->pci_device == 0x3577)
-#define IS_845G(dev) ((dev)->pci_device == 0x2562)
-#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
-#define IS_I855(dev) ((dev)->pci_device == 0x3582)
-#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
-
-#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
-#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
-#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
-#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
- (dev)->pci_device == 0x27AE)
-#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
- (dev)->pci_device == 0x2982 || \
- (dev)->pci_device == 0x2992 || \
- (dev)->pci_device == 0x29A2 || \
- (dev)->pci_device == 0x2A02 || \
- (dev)->pci_device == 0x2A12 || \
- (dev)->pci_device == 0x2A42 || \
- (dev)->pci_device == 0x2E02 || \
- (dev)->pci_device == 0x2E12 || \
- (dev)->pci_device == 0x2E22)
-
-#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
-
-#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
-
-#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
- (dev)->pci_device == 0x2E12 || \
- (dev)->pci_device == 0x2E22)
-
-#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
- (dev)->pci_device == 0x29B2 || \
- (dev)->pci_device == 0x29D2)
-
-#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
- IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
-
-#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
- IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
-
-#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
-
-#define PRIMARY_RINGBUFFER_SIZE (128*1024)
-
-#endif
+++ /dev/null
-/* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
- */
-/*
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "i915_drm.h"
-#include "i915_drv.h"
-
-#define MAX_NOPID ((u32)~0)
-
-/**
- * Interrupts that are always left unmasked.
- *
- * Since pipe events are edge-triggered from the PIPESTAT register to IIR,
- * we leave them always unmasked in IMR and then control enabling them through
- * PIPESTAT alone.
- */
-#define I915_INTERRUPT_ENABLE_FIX (I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
-
-/** Interrupts that we mask and unmask at runtime. */
-#define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT)
-
-/** These are all of the interrupts used by the driver */
-#define I915_INTERRUPT_ENABLE_MASK (I915_INTERRUPT_ENABLE_FIX | \
- I915_INTERRUPT_ENABLE_VAR)
-
-static inline void
-i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask)
-{
- DRM_DEBUG("irq_enable_reg = 0x%08x, mask = 0x%08x\n",
- dev_priv->irq_mask_reg, mask);
- mask &= I915_INTERRUPT_ENABLE_VAR;
- if ((dev_priv->irq_mask_reg & mask) != 0) {
- dev_priv->irq_mask_reg &= ~mask;
- I915_WRITE(IMR, dev_priv->irq_mask_reg);
- (void) I915_READ(IMR);
- }
-}
-
-static inline void
-i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask)
-{
- mask &= I915_INTERRUPT_ENABLE_VAR;
- if ((dev_priv->irq_mask_reg & mask) != mask) {
- dev_priv->irq_mask_reg |= mask;
- I915_WRITE(IMR, dev_priv->irq_mask_reg);
- (void) I915_READ(IMR);
- }
-}
-
-static inline u32
-i915_pipestat(int pipe)
-{
- if (pipe == 0)
- return PIPEASTAT;
- if (pipe == 1)
- return PIPEBSTAT;
- return -EINVAL;
-}
-
-void
-i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
-{
- if ((dev_priv->pipestat[pipe] & mask) != mask) {
- u32 reg = i915_pipestat(pipe);
-
- dev_priv->pipestat[pipe] |= mask;
- /* Enable the interrupt, clear any pending status */
- I915_WRITE(reg, dev_priv->pipestat[pipe] | (mask >> 16));
- (void) I915_READ(reg);
- }
-}
-
-void
-i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
-{
- if ((dev_priv->pipestat[pipe] & mask) != 0) {
- u32 reg = i915_pipestat(pipe);
-
- dev_priv->pipestat[pipe] &= ~mask;
- I915_WRITE(reg, dev_priv->pipestat[pipe]);
- (void) I915_READ(reg);
- }
-}
-
-/**
- * i915_pipe_enabled - check if a pipe is enabled
- * @dev: DRM device
- * @pipe: pipe to check
- *
- * Reading certain registers when the pipe is disabled can hang the chip.
- * Use this routine to make sure the PLL is running and the pipe is active
- * before reading such registers if unsure.
- */
-static int
-i915_pipe_enabled(struct drm_device *dev, int pipe)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
-
- if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
- return 1;
-
- return 0;
-}
-
-/* Called from drm generic code, passed a 'crtc', which
- * we use as a pipe index
- */
-u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- unsigned long high_frame;
- unsigned long low_frame;
- u32 high1, high2, low, count;
-
- high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
- low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
-
- if (!i915_pipe_enabled(dev, pipe)) {
- DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
- return 0;
- }
-
- /*
- * High & low register fields aren't synchronized, so make sure
- * we get a low value that's stable across two reads of the high
- * register.
- */
- do {
- high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
- PIPE_FRAME_HIGH_SHIFT);
- low = ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
- PIPE_FRAME_LOW_SHIFT);
- high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
- PIPE_FRAME_HIGH_SHIFT);
- } while (high1 != high2);
-
- count = (high1 << 8) | low;
-
- return count;
-}
-
-u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
-
- if (!i915_pipe_enabled(dev, pipe)) {
- DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
- return 0;
- }
-
- return I915_READ(reg);
-}
-
-irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
-{
- struct drm_device *dev = (struct drm_device *) arg;
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- u32 iir, new_iir;
- u32 pipea_stats, pipeb_stats;
-
- atomic_inc(&dev_priv->irq_received);
-
- for (iir = I915_READ(IIR) ; iir != 0 ; iir = new_iir) {
-
- pipea_stats = pipeb_stats = 0;
-
- /*
- * Clear the PIPE(A|B)STAT regs before the IIR
- */
- if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) {
- DRM_SPINLOCK(&dev_priv->user_irq_lock);
- pipea_stats = I915_READ(PIPEASTAT);
- I915_WRITE(PIPEASTAT, pipea_stats);
- DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
- }
-
- if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) {
- DRM_SPINLOCK(&dev_priv->user_irq_lock);
- pipeb_stats = I915_READ(PIPEBSTAT);
- I915_WRITE(PIPEBSTAT, pipeb_stats);
- DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
- }
-
- I915_WRITE(IIR, iir);
- new_iir = I915_READ(IIR);
-
- DRM_DEBUG("iir = 0x%08x, pipestats a = 0x%08x, b = 0x%08x\n",
- iir, pipea_stats, pipeb_stats);
-
- if (dev_priv->sarea_priv)
- dev_priv->sarea_priv->last_dispatch =
- READ_BREADCRUMB(dev_priv);
-
- if (iir & I915_USER_INTERRUPT) {
-#ifdef I915_HAVE_GEM
- dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev);
-#endif
- DRM_WAKEUP(&dev_priv->irq_queue);
- }
-
- if (pipea_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS |
- PIPE_VBLANK_INTERRUPT_STATUS))
- drm_handle_vblank(dev, 0);
-
- if (pipeb_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS |
- PIPE_VBLANK_INTERRUPT_STATUS))
- drm_handle_vblank(dev, 1);
-#ifdef __linux__
- if ((pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS) ||
- (iir & I915_ASLE_INTERRUPT))
- opregion_asle_intr(dev);
-#endif
- }
-}
-
-static int i915_emit_irq(struct drm_device * dev)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- RING_LOCALS;
-
- i915_kernel_lost_context(dev);
-
- DRM_DEBUG("\n");
-
- dev_priv->counter++;
- if (dev_priv->counter > 0x7FFFFFFFUL)
- dev_priv->counter = 1;
- if (dev_priv->sarea_priv)
- dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
-
- BEGIN_LP_RING(4);
- OUT_RING(MI_STORE_DWORD_INDEX);
- OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
- OUT_RING(dev_priv->counter);
- OUT_RING(MI_USER_INTERRUPT);
- ADVANCE_LP_RING();
-
- return dev_priv->counter;
-}
-
-void i915_user_irq_get(struct drm_device *dev)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- unsigned long irqflags;
-
- DRM_DEBUG("\n");
- DRM_SPINLOCK_IRQSAVE(&dev_priv->user_irq_lock, irqflags);
- if (dev->irq_enabled && (++dev_priv->user_irq_refcount == 1))
- i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
- DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->user_irq_lock, irqflags);
-}
-
-void i915_user_irq_put(struct drm_device *dev)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- unsigned long irqflags;
-
- DRM_SPINLOCK_IRQSAVE(&dev_priv->user_irq_lock, irqflags);
-#ifdef __linux__
- BUG_ON(dev->irq_enabled && dev_priv->user_irq_refcount <= 0);
-#endif
- if (dev->irq_enabled && (--dev_priv->user_irq_refcount == 0))
- i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
- DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->user_irq_lock, irqflags);
-}
-
-static int i915_wait_irq(struct drm_device * dev, int irq_nr)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- int ret = 0;
-
- DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
- READ_BREADCRUMB(dev_priv));
-
- if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
- if (dev_priv->sarea_priv) {
- dev_priv->sarea_priv->last_dispatch =
- READ_BREADCRUMB(dev_priv);
- }
- return 0;
- }
-
- if (dev_priv->sarea_priv)
- dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
-
- i915_user_irq_get(dev);
- DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
- READ_BREADCRUMB(dev_priv) >= irq_nr);
- i915_user_irq_put(dev);
-
- if (ret == -EBUSY) {
- DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
- READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
- }
-
- if (dev_priv->sarea_priv)
- dev_priv->sarea_priv->last_dispatch =
- READ_BREADCRUMB(dev_priv);
-
- return ret;
-}
-
-/* Needs the lock as it touches the ring.
- */
-int i915_irq_emit(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_irq_emit_t *emit = data;
- int result;
-
- RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- result = i915_emit_irq(dev);
-
- if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
- DRM_ERROR("copy_to_user\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-/* Doesn't need the hardware lock.
- */
-int i915_irq_wait(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_irq_wait_t *irqwait = data;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- return i915_wait_irq(dev, irqwait->irq_seq);
-}
-
-/* Called from drm generic code, passed 'crtc' which
- * we use as a pipe index
- */
-int i915_enable_vblank(struct drm_device *dev, int pipe)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- unsigned long irqflags;
- u32 pipestat;
-
- /*
- * Older chips didn't have the start vblank interrupt,
- * but
- */
- if (IS_I965G (dev))
- pipestat = PIPE_START_VBLANK_INTERRUPT_ENABLE;
- else
- pipestat = PIPE_VBLANK_INTERRUPT_ENABLE;
-
- DRM_SPINLOCK_IRQSAVE(&dev_priv->user_irq_lock, irqflags);
- i915_enable_pipestat(dev_priv, pipe, pipestat);
- DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->user_irq_lock, irqflags);
- return 0;
-}
-
-/* Called from drm generic code, passed 'crtc' which
- * we use as a pipe index
- */
-void i915_disable_vblank(struct drm_device *dev, int pipe)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- unsigned long irqflags;
-
- DRM_SPINLOCK_IRQSAVE(&dev_priv->user_irq_lock, irqflags);
- i915_disable_pipestat(dev_priv, pipe,
- PIPE_START_VBLANK_INTERRUPT_ENABLE | PIPE_VBLANK_INTERRUPT_ENABLE);
- DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->user_irq_lock, irqflags);
-}
-
-/* Set the vblank monitor pipe
- */
-int i915_vblank_pipe_set(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-int i915_vblank_pipe_get(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_vblank_pipe_t *pipe = data;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
-
- return 0;
-}
-
-/**
- * Schedule buffer swap at given vertical blank.
- */
-int i915_vblank_swap(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- /* The delayed swap mechanism was fundamentally racy, and has been
- * removed. The model was that the client requested a delayed flip/swap
- * from the kernel, then waited for vblank before continuing to perform
- * rendering. The problem was that the kernel might wake the client
- * up before it dispatched the vblank swap (since the lock has to be
- * held while touching the ringbuffer), in which case the client would
- * clear and start the next frame before the swap occurred, and
- * flicker would occur in addition to likely missing the vblank.
- *
- * In the absence of this ioctl, userland falls back to a correct path
- * of waiting for a vblank, then dispatching the swap on its own.
- * Context switching to userland and back is plenty fast enough for
- * meeting the requirements of vblank swapping.
- */
-
- return -EINVAL;
-}
-
-/* drm_dma.h hooks
-*/
-void i915_driver_irq_preinstall(struct drm_device * dev)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-
- I915_WRITE(HWSTAM, 0xeffe);
- I915_WRITE(PIPEASTAT, 0);
- I915_WRITE(PIPEBSTAT, 0);
- I915_WRITE(IMR, 0xffffffff);
- I915_WRITE(IER, 0x0);
- (void) I915_READ(IER);
-}
-
-int i915_driver_irq_postinstall(struct drm_device *dev)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-
- dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
-
- dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
-
- /* Unmask the interrupts that we always want on. */
- dev_priv->irq_mask_reg = ~I915_INTERRUPT_ENABLE_FIX;
-
- dev_priv->pipestat[0] = 0;
- dev_priv->pipestat[1] = 0;
-
- /* Disable pipe interrupt enables, clear pending pipe status */
- I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff);
- I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff);
-
- /* Clear pending interrupt status */
- I915_WRITE(IIR, I915_READ(IIR));
-
- I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK);
- I915_WRITE(IMR, dev_priv->irq_mask_reg);
- (void) I915_READ(IER);
-#ifdef __linux__
- opregion_enable_asle(dev);
-#endif
- DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
-
- i915_enable_vblank(dev, 0);
- i915_enable_vblank(dev, 1);
-
- return 0;
-}
-
-void i915_driver_irq_uninstall(struct drm_device * dev)
-{
- drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-
- if (!dev_priv)
- return;
-
- dev_priv->vblank_pipe = 0;
-
- I915_WRITE(HWSTAM, 0xffffffff);
- I915_WRITE(PIPEASTAT, 0);
- I915_WRITE(PIPEBSTAT, 0);
- I915_WRITE(IMR, 0xffffffff);
- I915_WRITE(IER, 0x0);
-
- I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff);
- I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff);
- I915_WRITE(IIR, I915_READ(IIR));
-}
+++ /dev/null
-/* i915_mem.c -- Simple agp/fb memory manager for i915 -*- linux-c -*-
- */
-/*
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "i915_drm.h"
-#include "i915_drv.h"
-
-/* This memory manager is integrated into the global/local lru
- * mechanisms used by the clients. Specifically, it operates by
- * setting the 'in_use' fields of the global LRU to indicate whether
- * this region is privately allocated to a client.
- *
- * This does require the client to actually respect that field.
- *
- * Currently no effort is made to allocate 'private' memory in any
- * clever way - the LRU information isn't used to determine which
- * block to allocate, and the ring is drained prior to allocations --
- * in other words allocation is expensive.
- */
-static void mark_block(struct drm_device * dev, struct mem_block *p, int in_use)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
- struct drm_tex_region *list;
- unsigned shift, nr;
- unsigned start;
- unsigned end;
- unsigned i;
- int age;
-
- shift = dev_priv->tex_lru_log_granularity;
- nr = I915_NR_TEX_REGIONS;
-
- start = p->start >> shift;
- end = (p->start + p->size - 1) >> shift;
-
- age = ++sarea_priv->texAge;
- list = sarea_priv->texList;
-
- /* Mark the regions with the new flag and update their age. Move
- * them to head of list to preserve LRU semantics.
- */
- for (i = start; i <= end; i++) {
- list[i].in_use = in_use;
- list[i].age = age;
-
- /* remove_from_list(i)
- */
- list[(unsigned)list[i].next].prev = list[i].prev;
- list[(unsigned)list[i].prev].next = list[i].next;
-
- /* insert_at_head(list, i)
- */
- list[i].prev = nr;
- list[i].next = list[nr].next;
- list[(unsigned)list[nr].next].prev = i;
- list[nr].next = i;
- }
-}
-
-/* Very simple allocator for agp memory, working on a static range
- * already mapped into each client's address space.
- */
-
-static struct mem_block *split_block(struct mem_block *p, int start, int size,
- struct drm_file *file_priv)
-{
- /* Maybe cut off the start of an existing block */
- if (start > p->start) {
- struct mem_block *newblock =
- drm_alloc(sizeof(*newblock), DRM_MEM_BUFLISTS);
- if (!newblock)
- goto out;
- newblock->start = start;
- newblock->size = p->size - (start - p->start);
- newblock->file_priv = NULL;
- newblock->next = p->next;
- newblock->prev = p;
- p->next->prev = newblock;
- p->next = newblock;
- p->size -= newblock->size;
- p = newblock;
- }
-
- /* Maybe cut off the end of an existing block */
- if (size < p->size) {
- struct mem_block *newblock =
- drm_alloc(sizeof(*newblock), DRM_MEM_BUFLISTS);
- if (!newblock)
- goto out;
- newblock->start = start + size;
- newblock->size = p->size - size;
- newblock->file_priv = NULL;
- newblock->next = p->next;
- newblock->prev = p;
- p->next->prev = newblock;
- p->next = newblock;
- p->size = size;
- }
-
- out:
- /* Our block is in the middle */
- p->file_priv = file_priv;
- return p;
-}
-
-static struct mem_block *alloc_block(struct mem_block *heap, int size,
- int align2, struct drm_file *file_priv)
-{
- struct mem_block *p;
- int mask = (1 << align2) - 1;
-
- for (p = heap->next; p != heap; p = p->next) {
- int start = (p->start + mask) & ~mask;
- if (p->file_priv == NULL && start + size <= p->start + p->size)
- return split_block(p, start, size, file_priv);
- }
-
- return NULL;
-}
-
-static struct mem_block *find_block(struct mem_block *heap, int start)
-{
- struct mem_block *p;
-
- for (p = heap->next; p != heap; p = p->next)
- if (p->start == start)
- return p;
-
- return NULL;
-}
-
-static void free_block(struct mem_block *p)
-{
- p->file_priv = NULL;
-
- /* Assumes a single contiguous range. Needs a special file_priv in
- * 'heap' to stop it being subsumed.
- */
- if (p->next->file_priv == NULL) {
- struct mem_block *q = p->next;
- p->size += q->size;
- p->next = q->next;
- p->next->prev = p;
- drm_free(q, sizeof(*q), DRM_MEM_BUFLISTS);
- }
-
- if (p->prev->file_priv == NULL) {
- struct mem_block *q = p->prev;
- q->size += p->size;
- q->next = p->next;
- q->next->prev = q;
- drm_free(p, sizeof(*q), DRM_MEM_BUFLISTS);
- }
-}
-
-/* Initialize. How to check for an uninitialized heap?
- */
-static int init_heap(struct mem_block **heap, int start, int size)
-{
- struct mem_block *blocks = drm_alloc(sizeof(*blocks), DRM_MEM_BUFLISTS);
-
- if (!blocks)
- return -ENOMEM;
-
- *heap = drm_alloc(sizeof(**heap), DRM_MEM_BUFLISTS);
- if (!*heap) {
- drm_free(blocks, sizeof(*blocks), DRM_MEM_BUFLISTS);
- return -ENOMEM;
- }
-
- blocks->start = start;
- blocks->size = size;
- blocks->file_priv = NULL;
- blocks->next = blocks->prev = *heap;
-
- memset(*heap, 0, sizeof(**heap));
- (*heap)->file_priv = (struct drm_file *) - 1;
- (*heap)->next = (*heap)->prev = blocks;
- return 0;
-}
-
-/* Free all blocks associated with the releasing file.
- */
-void i915_mem_release(struct drm_device * dev, struct drm_file *file_priv,
- struct mem_block *heap)
-{
- struct mem_block *p;
-
- if (!heap || !heap->next)
- return;
-
- for (p = heap->next; p != heap; p = p->next) {
- if (p->file_priv == file_priv) {
- p->file_priv = NULL;
- mark_block(dev, p, 0);
- }
- }
-
- /* Assumes a single contiguous range. Needs a special file_priv in
- * 'heap' to stop it being subsumed.
- */
- for (p = heap->next; p != heap; p = p->next) {
- while (p->file_priv == NULL && p->next->file_priv == NULL) {
- struct mem_block *q = p->next;
- p->size += q->size;
- p->next = q->next;
- p->next->prev = p;
- drm_free(q, sizeof(*q), DRM_MEM_BUFLISTS);
- }
- }
-}
-
-/* Shutdown.
- */
-void i915_mem_takedown(struct mem_block **heap)
-{
- struct mem_block *p;
-
- if (!*heap)
- return;
-
- for (p = (*heap)->next; p != *heap;) {
- struct mem_block *q = p;
- p = p->next;
- drm_free(q, sizeof(*q), DRM_MEM_BUFLISTS);
- }
-
- drm_free(*heap, sizeof(**heap), DRM_MEM_BUFLISTS);
- *heap = NULL;
-}
-
-static struct mem_block **get_heap(drm_i915_private_t * dev_priv, int region)
-{
- switch (region) {
- case I915_MEM_REGION_AGP:
- return &dev_priv->agp_heap;
- default:
- return NULL;
- }
-}
-
-/* IOCTL HANDLERS */
-
-int i915_mem_alloc(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_mem_alloc_t *alloc = data;
- struct mem_block *block, **heap;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- heap = get_heap(dev_priv, alloc->region);
- if (!heap || !*heap)
- return -EFAULT;
-
- /* Make things easier on ourselves: all allocations at least
- * 4k aligned.
- */
- if (alloc->alignment < 12)
- alloc->alignment = 12;
-
- block = alloc_block(*heap, alloc->size, alloc->alignment, file_priv);
-
- if (!block)
- return -ENOMEM;
-
- mark_block(dev, block, 1);
-
- if (DRM_COPY_TO_USER(alloc->region_offset, &block->start,
- sizeof(int))) {
- DRM_ERROR("copy_to_user\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-int i915_mem_free(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_mem_free_t *memfree = data;
- struct mem_block *block, **heap;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- heap = get_heap(dev_priv, memfree->region);
- if (!heap || !*heap)
- return -EFAULT;
-
- block = find_block(*heap, memfree->region_offset);
- if (!block)
- return -EFAULT;
-
- if (block->file_priv != file_priv)
- return -EPERM;
-
- mark_block(dev, block, 0);
- free_block(block);
- return 0;
-}
-
-int i915_mem_init_heap(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_mem_init_heap_t *initheap = data;
- struct mem_block **heap;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- heap = get_heap(dev_priv, initheap->region);
- if (!heap)
- return -EFAULT;
-
- if (*heap) {
- DRM_ERROR("heap already initialized?");
- return -EFAULT;
- }
-
- return init_heap(heap, initheap->start, initheap->size);
-}
-
-int i915_mem_destroy_heap( struct drm_device *dev, void *data,
- struct drm_file *file_priv )
-{
- drm_i915_private_t *dev_priv = dev->dev_private;
- drm_i915_mem_destroy_heap_t *destroyheap = data;
- struct mem_block **heap;
-
- if ( !dev_priv ) {
- DRM_ERROR( "called with no initialization\n" );
- return -EINVAL;
- }
-
- heap = get_heap( dev_priv, destroyheap->region );
- if (!heap) {
- DRM_ERROR("get_heap failed");
- return -EFAULT;
- }
-
- if (!*heap) {
- DRM_ERROR("heap not initialized?");
- return -EFAULT;
- }
-
- i915_mem_takedown( heap );
- return 0;
-}
+++ /dev/null
-/* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef _I915_REG_H_
-#define _I915_REG_H_
-
-/*
- * The Bridge device's PCI config space has information about the
- * fb aperture size and the amount of pre-reserved memory.
- */
-#define INTEL_GMCH_CTRL 0x52
-#define INTEL_GMCH_ENABLED 0x4
-#define INTEL_GMCH_MEM_MASK 0x1
-#define INTEL_GMCH_MEM_64M 0x1
-#define INTEL_GMCH_MEM_128M 0
-
-#define INTEL_855_GMCH_GMS_MASK (0x7 << 4)
-#define INTEL_855_GMCH_GMS_DISABLED (0x0 << 4)
-#define INTEL_855_GMCH_GMS_STOLEN_1M (0x1 << 4)
-#define INTEL_855_GMCH_GMS_STOLEN_4M (0x2 << 4)
-#define INTEL_855_GMCH_GMS_STOLEN_8M (0x3 << 4)
-#define INTEL_855_GMCH_GMS_STOLEN_16M (0x4 << 4)
-#define INTEL_855_GMCH_GMS_STOLEN_32M (0x5 << 4)
-
-#define INTEL_915G_GMCH_GMS_STOLEN_48M (0x6 << 4)
-#define INTEL_915G_GMCH_GMS_STOLEN_64M (0x7 << 4)
-
-/* PCI config space */
-
-#define HPLLCC 0xc0 /* 855 only */
-#define GC_CLOCK_CONTROL_MASK (3 << 0)
-#define GC_CLOCK_133_200 (0 << 0)
-#define GC_CLOCK_100_200 (1 << 0)
-#define GC_CLOCK_100_133 (2 << 0)
-#define GC_CLOCK_166_250 (3 << 0)
-#define GCFGC 0xf0 /* 915+ only */
-#define GC_LOW_FREQUENCY_ENABLE (1 << 7)
-#define GC_DISPLAY_CLOCK_190_200_MHZ (0 << 4)
-#define GC_DISPLAY_CLOCK_333_MHZ (4 << 4)
-#define GC_DISPLAY_CLOCK_MASK (7 << 4)
-#define LBB 0xf4
-
-/* VGA stuff */
-
-#define VGA_ST01_MDA 0x3ba
-#define VGA_ST01_CGA 0x3da
-
-#define VGA_MSR_WRITE 0x3c2
-#define VGA_MSR_READ 0x3cc
-#define VGA_MSR_MEM_EN (1<<1)
-#define VGA_MSR_CGA_MODE (1<<0)
-
-#define VGA_SR_INDEX 0x3c4
-#define VGA_SR_DATA 0x3c5
-
-#define VGA_AR_INDEX 0x3c0
-#define VGA_AR_VID_EN (1<<5)
-#define VGA_AR_DATA_WRITE 0x3c0
-#define VGA_AR_DATA_READ 0x3c1
-
-#define VGA_GR_INDEX 0x3ce
-#define VGA_GR_DATA 0x3cf
-/* GR05 */
-#define VGA_GR_MEM_READ_MODE_SHIFT 3
-#define VGA_GR_MEM_READ_MODE_PLANE 1
-/* GR06 */
-#define VGA_GR_MEM_MODE_MASK 0xc
-#define VGA_GR_MEM_MODE_SHIFT 2
-#define VGA_GR_MEM_A0000_AFFFF 0
-#define VGA_GR_MEM_A0000_BFFFF 1
-#define VGA_GR_MEM_B0000_B7FFF 2
-#define VGA_GR_MEM_B0000_BFFFF 3
-
-#define VGA_DACMASK 0x3c6
-#define VGA_DACRX 0x3c7
-#define VGA_DACWX 0x3c8
-#define VGA_DACDATA 0x3c9
-
-#define VGA_CR_INDEX_MDA 0x3b4
-#define VGA_CR_DATA_MDA 0x3b5
-#define VGA_CR_INDEX_CGA 0x3d4
-#define VGA_CR_DATA_CGA 0x3d5
-
-/*
- * Memory interface instructions used by the kernel
- */
-#define MI_INSTR(opcode, flags) (((opcode) << 23) | (flags))
-
-#define MI_NOOP MI_INSTR(0, 0)
-#define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
-#define MI_WAIT_FOR_EVENT MI_INSTR(0x03, 0)
-#define MI_WAIT_FOR_PLANE_B_FLIP (1<<6)
-#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2)
-#define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1)
-#define MI_FLUSH MI_INSTR(0x04, 0)
-#define MI_READ_FLUSH (1 << 0)
-#define MI_EXE_FLUSH (1 << 1)
-#define MI_NO_WRITE_FLUSH (1 << 2)
-#define MI_SCENE_COUNT (1 << 3) /* just increment scene count */
-#define MI_END_SCENE (1 << 4) /* flush binner and incr scene count */
-#define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0)
-#define MI_REPORT_HEAD MI_INSTR(0x07, 0)
-#define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0)
-#define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1)
-#define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */
-#define MI_STORE_DWORD_INDEX MI_INSTR(0x21, 1)
-#define MI_STORE_DWORD_INDEX_SHIFT 2
-#define MI_LOAD_REGISTER_IMM MI_INSTR(0x22, 1)
-#define MI_BATCH_BUFFER MI_INSTR(0x30, 1)
-#define MI_BATCH_NON_SECURE (1)
-#define MI_BATCH_NON_SECURE_I965 (1<<8)
-#define MI_BATCH_BUFFER_START MI_INSTR(0x31, 0)
-
-/*
- * 3D instructions used by the kernel
- */
-#define GFX_INSTR(opcode, flags) ((0x3 << 29) | ((opcode) << 24) | (flags))
-
-#define GFX_OP_RASTER_RULES ((0x3<<29)|(0x7<<24))
-#define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19))
-#define SC_UPDATE_SCISSOR (0x1<<1)
-#define SC_ENABLE_MASK (0x1<<0)
-#define SC_ENABLE (0x1<<0)
-#define GFX_OP_LOAD_INDIRECT ((0x3<<29)|(0x1d<<24)|(0x7<<16))
-#define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
-#define SCI_YMIN_MASK (0xffff<<16)
-#define SCI_XMIN_MASK (0xffff<<0)
-#define SCI_YMAX_MASK (0xffff<<16)
-#define SCI_XMAX_MASK (0xffff<<0)
-#define GFX_OP_SCISSOR_ENABLE ((0x3<<29)|(0x1c<<24)|(0x10<<19))
-#define GFX_OP_SCISSOR_RECT ((0x3<<29)|(0x1d<<24)|(0x81<<16)|1)
-#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
-#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
-#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x4)
-#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
-#define GFX_OP_DESTBUFFER_INFO ((0x3<<29)|(0x1d<<24)|(0x8e<<16)|1)
-#define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
-#define GFX_OP_DRAWRECT_INFO_I965 ((0x7900<<16)|0x2)
-#define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)|4)
-#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6)
-#define XY_MONO_SRC_COPY_IMM_BLT ((2<<29)|(0x71<<22)|5)
-#define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21)
-#define XY_SRC_COPY_BLT_WRITE_RGB (1<<20)
-#define BLT_DEPTH_8 (0<<24)
-#define BLT_DEPTH_16_565 (1<<24)
-#define BLT_DEPTH_16_1555 (2<<24)
-#define BLT_DEPTH_32 (3<<24)
-#define BLT_ROP_GXCOPY (0xcc<<16)
-#define XY_SRC_COPY_BLT_SRC_TILED (1<<15) /* 965+ only */
-#define XY_SRC_COPY_BLT_DST_TILED (1<<11) /* 965+ only */
-#define CMD_OP_DISPLAYBUFFER_INFO ((0x0<<29)|(0x14<<23)|2)
-#define ASYNC_FLIP (1<<22)
-#define DISPLAY_PLANE_A (0<<20)
-#define DISPLAY_PLANE_B (1<<20)
-
-/*
- * Instruction and interrupt control regs
- */
-
-#define PRB0_TAIL 0x02030
-#define PRB0_HEAD 0x02034
-#define PRB0_START 0x02038
-#define PRB0_CTL 0x0203c
-#define TAIL_ADDR 0x001FFFF8
-#define HEAD_WRAP_COUNT 0xFFE00000
-#define HEAD_WRAP_ONE 0x00200000
-#define HEAD_ADDR 0x001FFFFC
-#define RING_NR_PAGES 0x001FF000
-#define RING_REPORT_MASK 0x00000006
-#define RING_REPORT_64K 0x00000002
-#define RING_REPORT_128K 0x00000004
-#define RING_NO_REPORT 0x00000000
-#define RING_VALID_MASK 0x00000001
-#define RING_VALID 0x00000001
-#define RING_INVALID 0x00000000
-#define PRB1_TAIL 0x02040 /* 915+ only */
-#define PRB1_HEAD 0x02044 /* 915+ only */
-#define PRB1_START 0x02048 /* 915+ only */
-#define PRB1_CTL 0x0204c /* 915+ only */
-#define ACTHD_I965 0x02074
-#define HWS_PGA 0x02080
-#define HWS_ADDRESS_MASK 0xfffff000
-#define HWS_START_ADDRESS_SHIFT 4
-#define IPEIR 0x02088
-#define NOPID 0x02094
-#define HWSTAM 0x02098
-#define SCPD0 0x0209c /* 915+ only */
-#define IER 0x020a0
-#define IIR 0x020a4
-#define IMR 0x020a8
-#define ISR 0x020ac
-#define I915_PIPE_CONTROL_NOTIFY_INTERRUPT (1<<18)
-#define I915_DISPLAY_PORT_INTERRUPT (1<<17)
-#define I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT (1<<15)
-#define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT (1<<14)
-#define I915_HWB_OOM_INTERRUPT (1<<13)
-#define I915_SYNC_STATUS_INTERRUPT (1<<12)
-#define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT (1<<11)
-#define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT (1<<10)
-#define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT (1<<9)
-#define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT (1<<8)
-#define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT (1<<7)
-#define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT (1<<6)
-#define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT (1<<5)
-#define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT (1<<4)
-#define I915_DEBUG_INTERRUPT (1<<2)
-#define I915_USER_INTERRUPT (1<<1)
-#define I915_ASLE_INTERRUPT (1<<0)
-#define EIR 0x020b0
-#define EMR 0x020b4
-#define ESR 0x020b8
-#define INSTPM 0x020c0
-#define ACTHD 0x020c8
-#define FW_BLC 0x020d8
-#define FW_BLC_SELF 0x020e0 /* 915+ only */
-#define MI_ARB_STATE 0x020e4 /* 915+ only */
-#define CACHE_MODE_0 0x02120 /* 915+ only */
-#define CM0_MASK_SHIFT 16
-#define CM0_IZ_OPT_DISABLE (1<<6)
-#define CM0_ZR_OPT_DISABLE (1<<5)
-#define CM0_DEPTH_EVICT_DISABLE (1<<4)
-#define CM0_COLOR_EVICT_DISABLE (1<<3)
-#define CM0_DEPTH_WRITE_DISABLE (1<<1)
-#define CM0_RC_OP_FLUSH_DISABLE (1<<0)
-#define GFX_FLSH_CNTL 0x02170 /* 915+ only */
-
-/*
- * Framebuffer compression (915+ only)
- */
-
-#define FBC_CFB_BASE 0x03200 /* 4k page aligned */
-#define FBC_LL_BASE 0x03204 /* 4k page aligned */
-#define FBC_CONTROL 0x03208
-#define FBC_CTL_EN (1<<31)
-#define FBC_CTL_PERIODIC (1<<30)
-#define FBC_CTL_INTERVAL_SHIFT (16)
-#define FBC_CTL_UNCOMPRESSIBLE (1<<14)
-#define FBC_CTL_STRIDE_SHIFT (5)
-#define FBC_CTL_FENCENO (1<<0)
-#define FBC_COMMAND 0x0320c
-#define FBC_CMD_COMPRESS (1<<0)
-#define FBC_STATUS 0x03210
-#define FBC_STAT_COMPRESSING (1<<31)
-#define FBC_STAT_COMPRESSED (1<<30)
-#define FBC_STAT_MODIFIED (1<<29)
-#define FBC_STAT_CURRENT_LINE (1<<0)
-#define FBC_CONTROL2 0x03214
-#define FBC_CTL_FENCE_DBL (0<<4)
-#define FBC_CTL_IDLE_IMM (0<<2)
-#define FBC_CTL_IDLE_FULL (1<<2)
-#define FBC_CTL_IDLE_LINE (2<<2)
-#define FBC_CTL_IDLE_DEBUG (3<<2)
-#define FBC_CTL_CPU_FENCE (1<<1)
-#define FBC_CTL_PLANEA (0<<0)
-#define FBC_CTL_PLANEB (1<<0)
-#define FBC_FENCE_OFF 0x0321b
-
-#define FBC_LL_SIZE (1536)
-
-/*
- * GPIO regs
- */
-#define GPIOA 0x5010
-#define GPIOB 0x5014
-#define GPIOC 0x5018
-#define GPIOD 0x501c
-#define GPIOE 0x5020
-#define GPIOF 0x5024
-#define GPIOG 0x5028
-#define GPIOH 0x502c
-# define GPIO_CLOCK_DIR_MASK (1 << 0)
-# define GPIO_CLOCK_DIR_IN (0 << 1)
-# define GPIO_CLOCK_DIR_OUT (1 << 1)
-# define GPIO_CLOCK_VAL_MASK (1 << 2)
-# define GPIO_CLOCK_VAL_OUT (1 << 3)
-# define GPIO_CLOCK_VAL_IN (1 << 4)
-# define GPIO_CLOCK_PULLUP_DISABLE (1 << 5)
-# define GPIO_DATA_DIR_MASK (1 << 8)
-# define GPIO_DATA_DIR_IN (0 << 9)
-# define GPIO_DATA_DIR_OUT (1 << 9)
-# define GPIO_DATA_VAL_MASK (1 << 10)
-# define GPIO_DATA_VAL_OUT (1 << 11)
-# define GPIO_DATA_VAL_IN (1 << 12)
-# define GPIO_DATA_PULLUP_DISABLE (1 << 13)
-
-/*
- * Clock control & power management
- */
-
-#define VGA0 0x6000
-#define VGA1 0x6004
-#define VGA_PD 0x6010
-#define VGA0_PD_P2_DIV_4 (1 << 7)
-#define VGA0_PD_P1_DIV_2 (1 << 5)
-#define VGA0_PD_P1_SHIFT 0
-#define VGA0_PD_P1_MASK (0x1f << 0)
-#define VGA1_PD_P2_DIV_4 (1 << 15)
-#define VGA1_PD_P1_DIV_2 (1 << 13)
-#define VGA1_PD_P1_SHIFT 8
-#define VGA1_PD_P1_MASK (0x1f << 8)
-#define DPLL_A 0x06014
-#define DPLL_B 0x06018
-#define DPLL_VCO_ENABLE (1 << 31)
-#define DPLL_DVO_HIGH_SPEED (1 << 30)
-#define DPLL_SYNCLOCK_ENABLE (1 << 29)
-#define DPLL_VGA_MODE_DIS (1 << 28)
-#define DPLLB_MODE_DAC_SERIAL (1 << 26) /* i915 */
-#define DPLLB_MODE_LVDS (2 << 26) /* i915 */
-#define DPLL_MODE_MASK (3 << 26)
-#define DPLL_DAC_SERIAL_P2_CLOCK_DIV_10 (0 << 24) /* i915 */
-#define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */
-#define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */
-#define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */
-#define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */
-#define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */
-
-#define I915_FIFO_UNDERRUN_STATUS (1UL<<31)
-#define I915_CRC_ERROR_ENABLE (1UL<<29)
-#define I915_CRC_DONE_ENABLE (1UL<<28)
-#define I915_GMBUS_EVENT_ENABLE (1UL<<27)
-#define I915_VSYNC_INTERRUPT_ENABLE (1UL<<25)
-#define I915_DISPLAY_LINE_COMPARE_ENABLE (1UL<<24)
-#define I915_DPST_EVENT_ENABLE (1UL<<23)
-#define I915_LEGACY_BLC_EVENT_ENABLE (1UL<<22)
-#define I915_ODD_FIELD_INTERRUPT_ENABLE (1UL<<21)
-#define I915_EVEN_FIELD_INTERRUPT_ENABLE (1UL<<20)
-#define I915_START_VBLANK_INTERRUPT_ENABLE (1UL<<18) /* 965 or later */
-#define I915_VBLANK_INTERRUPT_ENABLE (1UL<<17)
-#define I915_OVERLAY_UPDATED_ENABLE (1UL<<16)
-#define I915_CRC_ERROR_INTERRUPT_STATUS (1UL<<13)
-#define I915_CRC_DONE_INTERRUPT_STATUS (1UL<<12)
-#define I915_GMBUS_INTERRUPT_STATUS (1UL<<11)
-#define I915_VSYNC_INTERRUPT_STATUS (1UL<<9)
-#define I915_DISPLAY_LINE_COMPARE_STATUS (1UL<<8)
-#define I915_DPST_EVENT_STATUS (1UL<<7)
-#define I915_LEGACY_BLC_EVENT_STATUS (1UL<<6)
-#define I915_ODD_FIELD_INTERRUPT_STATUS (1UL<<5)
-#define I915_EVEN_FIELD_INTERRUPT_STATUS (1UL<<4)
-#define I915_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */
-#define I915_VBLANK_INTERRUPT_STATUS (1UL<<1)
-#define I915_OVERLAY_UPDATED_STATUS (1UL<<0)
-
-#define SRX_INDEX 0x3c4
-#define SRX_DATA 0x3c5
-#define SR01 1
-#define SR01_SCREEN_OFF (1<<5)
-
-#define PPCR 0x61204
-#define PPCR_ON (1<<0)
-
-#define DVOB 0x61140
-#define DVOB_ON (1<<31)
-#define DVOC 0x61160
-#define DVOC_ON (1<<31)
-#define LVDS 0x61180
-#define LVDS_ON (1<<31)
-
-#define ADPA 0x61100
-#define ADPA_DPMS_MASK (~(3<<10))
-#define ADPA_DPMS_ON (0<<10)
-#define ADPA_DPMS_SUSPEND (1<<10)
-#define ADPA_DPMS_STANDBY (2<<10)
-#define ADPA_DPMS_OFF (3<<10)
-
-#define RING_TAIL 0x00
-#define TAIL_ADDR 0x001FFFF8
-#define RING_HEAD 0x04
-#define HEAD_WRAP_COUNT 0xFFE00000
-#define HEAD_WRAP_ONE 0x00200000
-#define HEAD_ADDR 0x001FFFFC
-#define RING_START 0x08
-#define START_ADDR 0xFFFFF000
-#define RING_LEN 0x0C
-#define RING_NR_PAGES 0x001FF000
-#define RING_REPORT_MASK 0x00000006
-#define RING_REPORT_64K 0x00000002
-#define RING_REPORT_128K 0x00000004
-#define RING_NO_REPORT 0x00000000
-#define RING_VALID_MASK 0x00000001
-#define RING_VALID 0x00000001
-#define RING_INVALID 0x00000000
-
-/* Scratch pad debug 0 reg:
- */
-#define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000
-/*
- * The i830 generation, in LVDS mode, defines P1 as the bit number set within
- * this field (only one bit may be set).
- */
-#define DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS 0x003f0000
-#define DPLL_FPA01_P1_POST_DIV_SHIFT 16
-/* i830, required in DVO non-gang */
-#define PLL_P2_DIVIDE_BY_4 (1 << 23)
-#define PLL_P1_DIVIDE_BY_TWO (1 << 21) /* i830 */
-#define PLL_REF_INPUT_DREFCLK (0 << 13)
-#define PLL_REF_INPUT_TVCLKINA (1 << 13) /* i830 */
-#define PLL_REF_INPUT_TVCLKINBC (2 << 13) /* SDVO TVCLKIN */
-#define PLLB_REF_INPUT_SPREADSPECTRUMIN (3 << 13)
-#define PLL_REF_INPUT_MASK (3 << 13)
-#define PLL_LOAD_PULSE_PHASE_SHIFT 9
-/*
- * Parallel to Serial Load Pulse phase selection.
- * Selects the phase for the 10X DPLL clock for the PCIe
- * digital display port. The range is 4 to 13; 10 or more
- * is just a flip delay. The default is 6
- */
-#define PLL_LOAD_PULSE_PHASE_MASK (0xf << PLL_LOAD_PULSE_PHASE_SHIFT)
-#define DISPLAY_RATE_SELECT_FPA1 (1 << 8)
-/*
- * SDVO multiplier for 945G/GM. Not used on 965.
- */
-#define SDVO_MULTIPLIER_MASK 0x000000ff
-#define SDVO_MULTIPLIER_SHIFT_HIRES 4
-#define SDVO_MULTIPLIER_SHIFT_VGA 0
-#define DPLL_A_MD 0x0601c /* 965+ only */
-/*
- * UDI pixel divider, controlling how many pixels are stuffed into a packet.
- *
- * Value is pixels minus 1. Must be set to 1 pixel for SDVO.
- */
-#define DPLL_MD_UDI_DIVIDER_MASK 0x3f000000
-#define DPLL_MD_UDI_DIVIDER_SHIFT 24
-/* UDI pixel divider for VGA, same as DPLL_MD_UDI_DIVIDER_MASK. */
-#define DPLL_MD_VGA_UDI_DIVIDER_MASK 0x003f0000
-#define DPLL_MD_VGA_UDI_DIVIDER_SHIFT 16
-/*
- * SDVO/UDI pixel multiplier.
- *
- * SDVO requires that the bus clock rate be between 1 and 2 Ghz, and the bus
- * clock rate is 10 times the DPLL clock. At low resolution/refresh rate
- * modes, the bus rate would be below the limits, so SDVO allows for stuffing
- * dummy bytes in the datastream at an increased clock rate, with both sides of
- * the link knowing how many bytes are fill.
- *
- * So, for a mode with a dotclock of 65Mhz, we would want to double the clock
- * rate to 130Mhz to get a bus rate of 1.30Ghz. The DPLL clock rate would be
- * set to 130Mhz, and the SDVO multiplier set to 2x in this register and
- * through an SDVO command.
- *
- * This register field has values of multiplication factor minus 1, with
- * a maximum multiplier of 5 for SDVO.
- */
-#define DPLL_MD_UDI_MULTIPLIER_MASK 0x00003f00
-#define DPLL_MD_UDI_MULTIPLIER_SHIFT 8
-/*
- * SDVO/UDI pixel multiplier for VGA, same as DPLL_MD_UDI_MULTIPLIER_MASK.
- * This best be set to the default value (3) or the CRT won't work. No,
- * I don't entirely understand what this does...
- */
-#define DPLL_MD_VGA_UDI_MULTIPLIER_MASK 0x0000003f
-#define DPLL_MD_VGA_UDI_MULTIPLIER_SHIFT 0
-#define DPLL_B_MD 0x06020 /* 965+ only */
-#define FPA0 0x06040
-#define FPA1 0x06044
-#define FPB0 0x06048
-#define FPB1 0x0604c
-#define FP_N_DIV_MASK 0x003f0000
-#define FP_N_DIV_SHIFT 16
-#define FP_M1_DIV_MASK 0x00003f00
-#define FP_M1_DIV_SHIFT 8
-#define FP_M2_DIV_MASK 0x0000003f
-#define FP_M2_DIV_SHIFT 0
-#define DPLL_TEST 0x606c
-#define DPLLB_TEST_SDVO_DIV_1 (0 << 22)
-#define DPLLB_TEST_SDVO_DIV_2 (1 << 22)
-#define DPLLB_TEST_SDVO_DIV_4 (2 << 22)
-#define DPLLB_TEST_SDVO_DIV_MASK (3 << 22)
-#define DPLLB_TEST_N_BYPASS (1 << 19)
-#define DPLLB_TEST_M_BYPASS (1 << 18)
-#define DPLLB_INPUT_BUFFER_ENABLE (1 << 16)
-#define DPLLA_TEST_N_BYPASS (1 << 3)
-#define DPLLA_TEST_M_BYPASS (1 << 2)
-#define DPLLA_INPUT_BUFFER_ENABLE (1 << 0)
-#define D_STATE 0x6104
-#define CG_2D_DIS 0x6200
-#define CG_3D_DIS 0x6204
-
-/*
- * Palette regs
- */
-
-#define PALETTE_A 0x0a000
-#define PALETTE_B 0x0a800
-
-/* MCH MMIO space */
-
-/*
- * MCHBAR mirror.
- *
- * This mirrors the MCHBAR MMIO space whose location is determined by
- * device 0 function 0's pci config register 0x44 or 0x48 and matches it in
- * every way. It is not accessible from the CP register read instructions.
- *
- */
-#define MCHBAR_MIRROR_BASE 0x10000
-
-/** 915-945 and GM965 MCH register controlling DRAM channel access */
-#define DCC 0x10200
-#define DCC_ADDRESSING_MODE_SINGLE_CHANNEL (0 << 0)
-#define DCC_ADDRESSING_MODE_DUAL_CHANNEL_ASYMMETRIC (1 << 0)
-#define DCC_ADDRESSING_MODE_DUAL_CHANNEL_INTERLEAVED (2 << 0)
-#define DCC_ADDRESSING_MODE_MASK (3 << 0)
-#define DCC_CHANNEL_XOR_DISABLE (1 << 10)
-
-/** 965 MCH register controlling DRAM channel configuration */
-#define C0DRB3 0x10206
-#define C1DRB3 0x10606
-
-/*
- * Overlay regs
- */
-
-#define OVADD 0x30000
-#define DOVSTA 0x30008
-#define OC_BUF (0x3<<20)
-#define OGAMC5 0x30010
-#define OGAMC4 0x30014
-#define OGAMC3 0x30018
-#define OGAMC2 0x3001c
-#define OGAMC1 0x30020
-#define OGAMC0 0x30024
-
-/*
- * Display engine regs
- */
-
-/* Pipe A timing regs */
-#define HTOTAL_A 0x60000
-#define HBLANK_A 0x60004
-#define HSYNC_A 0x60008
-#define VTOTAL_A 0x6000c
-#define VBLANK_A 0x60010
-#define VSYNC_A 0x60014
-#define PIPEASRC 0x6001c
-#define BCLRPAT_A 0x60020
-
-/* Pipe B timing regs */
-#define HTOTAL_B 0x61000
-#define HBLANK_B 0x61004
-#define HSYNC_B 0x61008
-#define VTOTAL_B 0x6100c
-#define VBLANK_B 0x61010
-#define VSYNC_B 0x61014
-#define PIPEBSRC 0x6101c
-#define BCLRPAT_B 0x61020
-
-/* VGA port control */
-#define ADPA 0x61100
-#define ADPA_DAC_ENABLE (1<<31)
-#define ADPA_DAC_DISABLE 0
-#define ADPA_PIPE_SELECT_MASK (1<<30)
-#define ADPA_PIPE_A_SELECT 0
-#define ADPA_PIPE_B_SELECT (1<<30)
-#define ADPA_USE_VGA_HVPOLARITY (1<<15)
-#define ADPA_SETS_HVPOLARITY 0
-#define ADPA_VSYNC_CNTL_DISABLE (1<<11)
-#define ADPA_VSYNC_CNTL_ENABLE 0
-#define ADPA_HSYNC_CNTL_DISABLE (1<<10)
-#define ADPA_HSYNC_CNTL_ENABLE 0
-#define ADPA_VSYNC_ACTIVE_HIGH (1<<4)
-#define ADPA_VSYNC_ACTIVE_LOW 0
-#define ADPA_HSYNC_ACTIVE_HIGH (1<<3)
-#define ADPA_HSYNC_ACTIVE_LOW 0
-#define ADPA_DPMS_MASK (~(3<<10))
-#define ADPA_DPMS_ON (0<<10)
-#define ADPA_DPMS_SUSPEND (1<<10)
-#define ADPA_DPMS_STANDBY (2<<10)
-#define ADPA_DPMS_OFF (3<<10)
-
-/* Hotplug control (945+ only) */
-#define PORT_HOTPLUG_EN 0x61110
-#define SDVOB_HOTPLUG_INT_EN (1 << 26)
-#define SDVOC_HOTPLUG_INT_EN (1 << 25)
-#define TV_HOTPLUG_INT_EN (1 << 18)
-#define CRT_HOTPLUG_INT_EN (1 << 9)
-#define CRT_HOTPLUG_FORCE_DETECT (1 << 3)
-
-#define PORT_HOTPLUG_STAT 0x61114
-#define CRT_HOTPLUG_INT_STATUS (1 << 11)
-#define TV_HOTPLUG_INT_STATUS (1 << 10)
-#define CRT_HOTPLUG_MONITOR_MASK (3 << 8)
-#define CRT_HOTPLUG_MONITOR_COLOR (3 << 8)
-#define CRT_HOTPLUG_MONITOR_MONO (2 << 8)
-#define CRT_HOTPLUG_MONITOR_NONE (0 << 8)
-#define SDVOC_HOTPLUG_INT_STATUS (1 << 7)
-#define SDVOB_HOTPLUG_INT_STATUS (1 << 6)
-
-/* SDVO port control */
-#define SDVOB 0x61140
-#define SDVOC 0x61160
-#define SDVO_ENABLE (1 << 31)
-#define SDVO_PIPE_B_SELECT (1 << 30)
-#define SDVO_STALL_SELECT (1 << 29)
-#define SDVO_INTERRUPT_ENABLE (1 << 26)
-/**
- * 915G/GM SDVO pixel multiplier.
- *
- * Programmed value is multiplier - 1, up to 5x.
- *
- * \sa DPLL_MD_UDI_MULTIPLIER_MASK
- */
-#define SDVO_PORT_MULTIPLY_MASK (7 << 23)
-#define SDVO_PORT_MULTIPLY_SHIFT 23
-#define SDVO_PHASE_SELECT_MASK (15 << 19)
-#define SDVO_PHASE_SELECT_DEFAULT (6 << 19)
-#define SDVO_CLOCK_OUTPUT_INVERT (1 << 18)
-#define SDVOC_GANG_MODE (1 << 16)
-#define SDVO_BORDER_ENABLE (1 << 7)
-#define SDVOB_PCIE_CONCURRENCY (1 << 3)
-#define SDVO_DETECTED (1 << 2)
-/* Bits to be preserved when writing */
-#define SDVOB_PRESERVE_MASK ((1 << 17) | (1 << 16) | (1 << 14) | (1 << 26))
-#define SDVOC_PRESERVE_MASK ((1 << 17) | (1 << 26))
-
-/* DVO port control */
-#define DVOA 0x61120
-#define DVOB 0x61140
-#define DVOC 0x61160
-#define DVO_ENABLE (1 << 31)
-#define DVO_PIPE_B_SELECT (1 << 30)
-#define DVO_PIPE_STALL_UNUSED (0 << 28)
-#define DVO_PIPE_STALL (1 << 28)
-#define DVO_PIPE_STALL_TV (2 << 28)
-#define DVO_PIPE_STALL_MASK (3 << 28)
-#define DVO_USE_VGA_SYNC (1 << 15)
-#define DVO_DATA_ORDER_I740 (0 << 14)
-#define DVO_DATA_ORDER_FP (1 << 14)
-#define DVO_VSYNC_DISABLE (1 << 11)
-#define DVO_HSYNC_DISABLE (1 << 10)
-#define DVO_VSYNC_TRISTATE (1 << 9)
-#define DVO_HSYNC_TRISTATE (1 << 8)
-#define DVO_BORDER_ENABLE (1 << 7)
-#define DVO_DATA_ORDER_GBRG (1 << 6)
-#define DVO_DATA_ORDER_RGGB (0 << 6)
-#define DVO_DATA_ORDER_GBRG_ERRATA (0 << 6)
-#define DVO_DATA_ORDER_RGGB_ERRATA (1 << 6)
-#define DVO_VSYNC_ACTIVE_HIGH (1 << 4)
-#define DVO_HSYNC_ACTIVE_HIGH (1 << 3)
-#define DVO_BLANK_ACTIVE_HIGH (1 << 2)
-#define DVO_OUTPUT_CSTATE_PIXELS (1 << 1) /* SDG only */
-#define DVO_OUTPUT_SOURCE_SIZE_PIXELS (1 << 0) /* SDG only */
-#define DVO_PRESERVE_MASK (0x7<<24)
-#define DVOA_SRCDIM 0x61124
-#define DVOB_SRCDIM 0x61144
-#define DVOC_SRCDIM 0x61164
-#define DVO_SRCDIM_HORIZONTAL_SHIFT 12
-#define DVO_SRCDIM_VERTICAL_SHIFT 0
-
-/* LVDS port control */
-#define LVDS 0x61180
-/*
- * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
- * the DPLL semantics change when the LVDS is assigned to that pipe.
- */
-#define LVDS_PORT_EN (1 << 31)
-/* Selects pipe B for LVDS data. Must be set on pre-965. */
-#define LVDS_PIPEB_SELECT (1 << 30)
-/*
- * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
- * pixel.
- */
-#define LVDS_A0A2_CLKA_POWER_MASK (3 << 8)
-#define LVDS_A0A2_CLKA_POWER_DOWN (0 << 8)
-#define LVDS_A0A2_CLKA_POWER_UP (3 << 8)
-/*
- * Controls the A3 data pair, which contains the additional LSBs for 24 bit
- * mode. Only enabled if LVDS_A0A2_CLKA_POWER_UP also indicates it should be
- * on.
- */
-#define LVDS_A3_POWER_MASK (3 << 6)
-#define LVDS_A3_POWER_DOWN (0 << 6)
-#define LVDS_A3_POWER_UP (3 << 6)
-/*
- * Controls the CLKB pair. This should only be set when LVDS_B0B3_POWER_UP
- * is set.
- */
-#define LVDS_CLKB_POWER_MASK (3 << 4)
-#define LVDS_CLKB_POWER_DOWN (0 << 4)
-#define LVDS_CLKB_POWER_UP (3 << 4)
-/*
- * Controls the B0-B3 data pairs. This must be set to match the DPLL p2
- * setting for whether we are in dual-channel mode. The B3 pair will
- * additionally only be powered up when LVDS_A3_POWER_UP is set.
- */
-#define LVDS_B0B3_POWER_MASK (3 << 2)
-#define LVDS_B0B3_POWER_DOWN (0 << 2)
-#define LVDS_B0B3_POWER_UP (3 << 2)
-
-/* Panel power sequencing */
-#define PP_STATUS 0x61200
-#define PP_ON (1 << 31)
-/*
- * Indicates that all dependencies of the panel are on:
- *
- * - PLL enabled
- * - pipe enabled
- * - LVDS/DVOB/DVOC on
- */
-#define PP_READY (1 << 30)
-#define PP_SEQUENCE_NONE (0 << 28)
-#define PP_SEQUENCE_ON (1 << 28)
-#define PP_SEQUENCE_OFF (2 << 28)
-#define PP_SEQUENCE_MASK 0x30000000
-#define PP_CONTROL 0x61204
-#define POWER_TARGET_ON (1 << 0)
-#define PP_ON_DELAYS 0x61208
-#define PP_OFF_DELAYS 0x6120c
-#define PP_DIVISOR 0x61210
-
-/* Panel fitting */
-#define PFIT_CONTROL 0x61230
-#define PFIT_ENABLE (1 << 31)
-#define PFIT_PIPE_MASK (3 << 29)
-#define PFIT_PIPE_SHIFT 29
-#define VERT_INTERP_DISABLE (0 << 10)
-#define VERT_INTERP_BILINEAR (1 << 10)
-#define VERT_INTERP_MASK (3 << 10)
-#define VERT_AUTO_SCALE (1 << 9)
-#define HORIZ_INTERP_DISABLE (0 << 6)
-#define HORIZ_INTERP_BILINEAR (1 << 6)
-#define HORIZ_INTERP_MASK (3 << 6)
-#define HORIZ_AUTO_SCALE (1 << 5)
-#define PANEL_8TO6_DITHER_ENABLE (1 << 3)
-#define PFIT_PGM_RATIOS 0x61234
-#define PFIT_VERT_SCALE_MASK 0xfff00000
-#define PFIT_HORIZ_SCALE_MASK 0x0000fff0
-#define PFIT_AUTO_RATIOS 0x61238
-
-/* Backlight control */
-#define BLC_PWM_CTL 0x61254
-#define BACKLIGHT_MODULATION_FREQ_SHIFT (17)
-#define BLC_PWM_CTL2 0x61250 /* 965+ only */
-#define BLM_COMBINATION_MODE (1 << 30)
-/*
- * This is the most significant 15 bits of the number of backlight cycles in a
- * complete cycle of the modulated backlight control.
- *
- * The actual value is this field multiplied by two.
- */
-#define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17)
-#define BLM_LEGACY_MODE (1 << 16)
-/*
- * This is the number of cycles out of the backlight modulation cycle for which
- * the backlight is on.
- *
- * This field must be no greater than the number of cycles in the complete
- * backlight modulation cycle.
- */
-#define BACKLIGHT_DUTY_CYCLE_SHIFT (0)
-#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff)
-
-/* TV port control */
-#define TV_CTL 0x68000
-/** Enables the TV encoder */
-# define TV_ENC_ENABLE (1 << 31)
-/** Sources the TV encoder input from pipe B instead of A. */
-# define TV_ENC_PIPEB_SELECT (1 << 30)
-/** Outputs composite video (DAC A only) */
-# define TV_ENC_OUTPUT_COMPOSITE (0 << 28)
-/** Outputs SVideo video (DAC B/C) */
-# define TV_ENC_OUTPUT_SVIDEO (1 << 28)
-/** Outputs Component video (DAC A/B/C) */
-# define TV_ENC_OUTPUT_COMPONENT (2 << 28)
-/** Outputs Composite and SVideo (DAC A/B/C) */
-# define TV_ENC_OUTPUT_SVIDEO_COMPOSITE (3 << 28)
-# define TV_TRILEVEL_SYNC (1 << 21)
-/** Enables slow sync generation (945GM only) */
-# define TV_SLOW_SYNC (1 << 20)
-/** Selects 4x oversampling for 480i and 576p */
-# define TV_OVERSAMPLE_4X (0 << 18)
-/** Selects 2x oversampling for 720p and 1080i */
-# define TV_OVERSAMPLE_2X (1 << 18)
-/** Selects no oversampling for 1080p */
-# define TV_OVERSAMPLE_NONE (2 << 18)
-/** Selects 8x oversampling */
-# define TV_OVERSAMPLE_8X (3 << 18)
-/** Selects progressive mode rather than interlaced */
-# define TV_PROGRESSIVE (1 << 17)
-/** Sets the colorburst to PAL mode. Required for non-M PAL modes. */
-# define TV_PAL_BURST (1 << 16)
-/** Field for setting delay of Y compared to C */
-# define TV_YC_SKEW_MASK (7 << 12)
-/** Enables a fix for 480p/576p standard definition modes on the 915GM only */
-# define TV_ENC_SDP_FIX (1 << 11)
-/**
- * Enables a fix for the 915GM only.
- *
- * Not sure what it does.
- */
-# define TV_ENC_C0_FIX (1 << 10)
-/** Bits that must be preserved by software */
-# define TV_CTL_SAVE ((3 << 8) | (3 << 6))
-# define TV_FUSE_STATE_MASK (3 << 4)
-/** Read-only state that reports all features enabled */
-# define TV_FUSE_STATE_ENABLED (0 << 4)
-/** Read-only state that reports that Macrovision is disabled in hardware*/
-# define TV_FUSE_STATE_NO_MACROVISION (1 << 4)
-/** Read-only state that reports that TV-out is disabled in hardware. */
-# define TV_FUSE_STATE_DISABLED (2 << 4)
-/** Normal operation */
-# define TV_TEST_MODE_NORMAL (0 << 0)
-/** Encoder test pattern 1 - combo pattern */
-# define TV_TEST_MODE_PATTERN_1 (1 << 0)
-/** Encoder test pattern 2 - full screen vertical 75% color bars */
-# define TV_TEST_MODE_PATTERN_2 (2 << 0)
-/** Encoder test pattern 3 - full screen horizontal 75% color bars */
-# define TV_TEST_MODE_PATTERN_3 (3 << 0)
-/** Encoder test pattern 4 - random noise */
-# define TV_TEST_MODE_PATTERN_4 (4 << 0)
-/** Encoder test pattern 5 - linear color ramps */
-# define TV_TEST_MODE_PATTERN_5 (5 << 0)
-/**
- * This test mode forces the DACs to 50% of full output.
- *
- * This is used for load detection in combination with TVDAC_SENSE_MASK
- */
-# define TV_TEST_MODE_MONITOR_DETECT (7 << 0)
-# define TV_TEST_MODE_MASK (7 << 0)
-
-#define TV_DAC 0x68004
-/**
- * Reports that DAC state change logic has reported change (RO).
- *
- * This gets cleared when TV_DAC_STATE_EN is cleared
-*/
-# define TVDAC_STATE_CHG (1 << 31)
-# define TVDAC_SENSE_MASK (7 << 28)
-/** Reports that DAC A voltage is above the detect threshold */
-# define TVDAC_A_SENSE (1 << 30)
-/** Reports that DAC B voltage is above the detect threshold */
-# define TVDAC_B_SENSE (1 << 29)
-/** Reports that DAC C voltage is above the detect threshold */
-# define TVDAC_C_SENSE (1 << 28)
-/**
- * Enables DAC state detection logic, for load-based TV detection.
- *
- * The PLL of the chosen pipe (in TV_CTL) must be running, and the encoder set
- * to off, for load detection to work.
- */
-# define TVDAC_STATE_CHG_EN (1 << 27)
-/** Sets the DAC A sense value to high */
-# define TVDAC_A_SENSE_CTL (1 << 26)
-/** Sets the DAC B sense value to high */
-# define TVDAC_B_SENSE_CTL (1 << 25)
-/** Sets the DAC C sense value to high */
-# define TVDAC_C_SENSE_CTL (1 << 24)
-/** Overrides the ENC_ENABLE and DAC voltage levels */
-# define DAC_CTL_OVERRIDE (1 << 7)
-/** Sets the slew rate. Must be preserved in software */
-# define ENC_TVDAC_SLEW_FAST (1 << 6)
-# define DAC_A_1_3_V (0 << 4)
-# define DAC_A_1_1_V (1 << 4)
-# define DAC_A_0_7_V (2 << 4)
-# define DAC_A_OFF (3 << 4)
-# define DAC_B_1_3_V (0 << 2)
-# define DAC_B_1_1_V (1 << 2)
-# define DAC_B_0_7_V (2 << 2)
-# define DAC_B_OFF (3 << 2)
-# define DAC_C_1_3_V (0 << 0)
-# define DAC_C_1_1_V (1 << 0)
-# define DAC_C_0_7_V (2 << 0)
-# define DAC_C_OFF (3 << 0)
-
-/**
- * CSC coefficients are stored in a floating point format with 9 bits of
- * mantissa and 2 or 3 bits of exponent. The exponent is represented as 2**-n,
- * where 2-bit exponents are unsigned n, and 3-bit exponents are signed n with
- * -1 (0x3) being the only legal negative value.
- */
-#define TV_CSC_Y 0x68010
-# define TV_RY_MASK 0x07ff0000
-# define TV_RY_SHIFT 16
-# define TV_GY_MASK 0x00000fff
-# define TV_GY_SHIFT 0
-
-#define TV_CSC_Y2 0x68014
-# define TV_BY_MASK 0x07ff0000
-# define TV_BY_SHIFT 16
-/**
- * Y attenuation for component video.
- *
- * Stored in 1.9 fixed point.
- */
-# define TV_AY_MASK 0x000003ff
-# define TV_AY_SHIFT 0
-
-#define TV_CSC_U 0x68018
-# define TV_RU_MASK 0x07ff0000
-# define TV_RU_SHIFT 16
-# define TV_GU_MASK 0x000007ff
-# define TV_GU_SHIFT 0
-
-#define TV_CSC_U2 0x6801c
-# define TV_BU_MASK 0x07ff0000
-# define TV_BU_SHIFT 16
-/**
- * U attenuation for component video.
- *
- * Stored in 1.9 fixed point.
- */
-# define TV_AU_MASK 0x000003ff
-# define TV_AU_SHIFT 0
-
-#define TV_CSC_V 0x68020
-# define TV_RV_MASK 0x0fff0000
-# define TV_RV_SHIFT 16
-# define TV_GV_MASK 0x000007ff
-# define TV_GV_SHIFT 0
-
-#define TV_CSC_V2 0x68024
-# define TV_BV_MASK 0x07ff0000
-# define TV_BV_SHIFT 16
-/**
- * V attenuation for component video.
- *
- * Stored in 1.9 fixed point.
- */
-# define TV_AV_MASK 0x000007ff
-# define TV_AV_SHIFT 0
-
-#define TV_CLR_KNOBS 0x68028
-/** 2s-complement brightness adjustment */
-# define TV_BRIGHTNESS_MASK 0xff000000
-# define TV_BRIGHTNESS_SHIFT 24
-/** Contrast adjustment, as a 2.6 unsigned floating point number */
-# define TV_CONTRAST_MASK 0x00ff0000
-# define TV_CONTRAST_SHIFT 16
-/** Saturation adjustment, as a 2.6 unsigned floating point number */
-# define TV_SATURATION_MASK 0x0000ff00
-# define TV_SATURATION_SHIFT 8
-/** Hue adjustment, as an integer phase angle in degrees */
-# define TV_HUE_MASK 0x000000ff
-# define TV_HUE_SHIFT 0
-
-#define TV_CLR_LEVEL 0x6802c
-/** Controls the DAC level for black */
-# define TV_BLACK_LEVEL_MASK 0x01ff0000
-# define TV_BLACK_LEVEL_SHIFT 16
-/** Controls the DAC level for blanking */
-# define TV_BLANK_LEVEL_MASK 0x000001ff
-# define TV_BLANK_LEVEL_SHIFT 0
-
-#define TV_H_CTL_1 0x68030
-/** Number of pixels in the hsync. */
-# define TV_HSYNC_END_MASK 0x1fff0000
-# define TV_HSYNC_END_SHIFT 16
-/** Total number of pixels minus one in the line (display and blanking). */
-# define TV_HTOTAL_MASK 0x00001fff
-# define TV_HTOTAL_SHIFT 0
-
-#define TV_H_CTL_2 0x68034
-/** Enables the colorburst (needed for non-component color) */
-# define TV_BURST_ENA (1 << 31)
-/** Offset of the colorburst from the start of hsync, in pixels minus one. */
-# define TV_HBURST_START_SHIFT 16
-# define TV_HBURST_START_MASK 0x1fff0000
-/** Length of the colorburst */
-# define TV_HBURST_LEN_SHIFT 0
-# define TV_HBURST_LEN_MASK 0x0001fff
-
-#define TV_H_CTL_3 0x68038
-/** End of hblank, measured in pixels minus one from start of hsync */
-# define TV_HBLANK_END_SHIFT 16
-# define TV_HBLANK_END_MASK 0x1fff0000
-/** Start of hblank, measured in pixels minus one from start of hsync */
-# define TV_HBLANK_START_SHIFT 0
-# define TV_HBLANK_START_MASK 0x0001fff
-
-#define TV_V_CTL_1 0x6803c
-/** XXX */
-# define TV_NBR_END_SHIFT 16
-# define TV_NBR_END_MASK 0x07ff0000
-/** XXX */
-# define TV_VI_END_F1_SHIFT 8
-# define TV_VI_END_F1_MASK 0x00003f00
-/** XXX */
-# define TV_VI_END_F2_SHIFT 0
-# define TV_VI_END_F2_MASK 0x0000003f
-
-#define TV_V_CTL_2 0x68040
-/** Length of vsync, in half lines */
-# define TV_VSYNC_LEN_MASK 0x07ff0000
-# define TV_VSYNC_LEN_SHIFT 16
-/** Offset of the start of vsync in field 1, measured in one less than the
- * number of half lines.
- */
-# define TV_VSYNC_START_F1_MASK 0x00007f00
-# define TV_VSYNC_START_F1_SHIFT 8
-/**
- * Offset of the start of vsync in field 2, measured in one less than the
- * number of half lines.
- */
-# define TV_VSYNC_START_F2_MASK 0x0000007f
-# define TV_VSYNC_START_F2_SHIFT 0
-
-#define TV_V_CTL_3 0x68044
-/** Enables generation of the equalization signal */
-# define TV_EQUAL_ENA (1 << 31)
-/** Length of vsync, in half lines */
-# define TV_VEQ_LEN_MASK 0x007f0000
-# define TV_VEQ_LEN_SHIFT 16
-/** Offset of the start of equalization in field 1, measured in one less than
- * the number of half lines.
- */
-# define TV_VEQ_START_F1_MASK 0x0007f00
-# define TV_VEQ_START_F1_SHIFT 8
-/**
- * Offset of the start of equalization in field 2, measured in one less than
- * the number of half lines.
- */
-# define TV_VEQ_START_F2_MASK 0x000007f
-# define TV_VEQ_START_F2_SHIFT 0
-
-#define TV_V_CTL_4 0x68048
-/**
- * Offset to start of vertical colorburst, measured in one less than the
- * number of lines from vertical start.
- */
-# define TV_VBURST_START_F1_MASK 0x003f0000
-# define TV_VBURST_START_F1_SHIFT 16
-/**
- * Offset to the end of vertical colorburst, measured in one less than the
- * number of lines from the start of NBR.
- */
-# define TV_VBURST_END_F1_MASK 0x000000ff
-# define TV_VBURST_END_F1_SHIFT 0
-
-#define TV_V_CTL_5 0x6804c
-/**
- * Offset to start of vertical colorburst, measured in one less than the
- * number of lines from vertical start.
- */
-# define TV_VBURST_START_F2_MASK 0x003f0000
-# define TV_VBURST_START_F2_SHIFT 16
-/**
- * Offset to the end of vertical colorburst, measured in one less than the
- * number of lines from the start of NBR.
- */
-# define TV_VBURST_END_F2_MASK 0x000000ff
-# define TV_VBURST_END_F2_SHIFT 0
-
-#define TV_V_CTL_6 0x68050
-/**
- * Offset to start of vertical colorburst, measured in one less than the
- * number of lines from vertical start.
- */
-# define TV_VBURST_START_F3_MASK 0x003f0000
-# define TV_VBURST_START_F3_SHIFT 16
-/**
- * Offset to the end of vertical colorburst, measured in one less than the
- * number of lines from the start of NBR.
- */
-# define TV_VBURST_END_F3_MASK 0x000000ff
-# define TV_VBURST_END_F3_SHIFT 0
-
-#define TV_V_CTL_7 0x68054
-/**
- * Offset to start of vertical colorburst, measured in one less than the
- * number of lines from vertical start.
- */
-# define TV_VBURST_START_F4_MASK 0x003f0000
-# define TV_VBURST_START_F4_SHIFT 16
-/**
- * Offset to the end of vertical colorburst, measured in one less than the
- * number of lines from the start of NBR.
- */
-# define TV_VBURST_END_F4_MASK 0x000000ff
-# define TV_VBURST_END_F4_SHIFT 0
-
-#define TV_SC_CTL_1 0x68060
-/** Turns on the first subcarrier phase generation DDA */
-# define TV_SC_DDA1_EN (1 << 31)
-/** Turns on the first subcarrier phase generation DDA */
-# define TV_SC_DDA2_EN (1 << 30)
-/** Turns on the first subcarrier phase generation DDA */
-# define TV_SC_DDA3_EN (1 << 29)
-/** Sets the subcarrier DDA to reset frequency every other field */
-# define TV_SC_RESET_EVERY_2 (0 << 24)
-/** Sets the subcarrier DDA to reset frequency every fourth field */
-# define TV_SC_RESET_EVERY_4 (1 << 24)
-/** Sets the subcarrier DDA to reset frequency every eighth field */
-# define TV_SC_RESET_EVERY_8 (2 << 24)
-/** Sets the subcarrier DDA to never reset the frequency */
-# define TV_SC_RESET_NEVER (3 << 24)
-/** Sets the peak amplitude of the colorburst.*/
-# define TV_BURST_LEVEL_MASK 0x00ff0000
-# define TV_BURST_LEVEL_SHIFT 16
-/** Sets the increment of the first subcarrier phase generation DDA */
-# define TV_SCDDA1_INC_MASK 0x00000fff
-# define TV_SCDDA1_INC_SHIFT 0
-
-#define TV_SC_CTL_2 0x68064
-/** Sets the rollover for the second subcarrier phase generation DDA */
-# define TV_SCDDA2_SIZE_MASK 0x7fff0000
-# define TV_SCDDA2_SIZE_SHIFT 16
-/** Sets the increent of the second subcarrier phase generation DDA */
-# define TV_SCDDA2_INC_MASK 0x00007fff
-# define TV_SCDDA2_INC_SHIFT 0
-
-#define TV_SC_CTL_3 0x68068
-/** Sets the rollover for the third subcarrier phase generation DDA */
-# define TV_SCDDA3_SIZE_MASK 0x7fff0000
-# define TV_SCDDA3_SIZE_SHIFT 16
-/** Sets the increent of the third subcarrier phase generation DDA */
-# define TV_SCDDA3_INC_MASK 0x00007fff
-# define TV_SCDDA3_INC_SHIFT 0
-
-#define TV_WIN_POS 0x68070
-/** X coordinate of the display from the start of horizontal active */
-# define TV_XPOS_MASK 0x1fff0000
-# define TV_XPOS_SHIFT 16
-/** Y coordinate of the display from the start of vertical active (NBR) */
-# define TV_YPOS_MASK 0x00000fff
-# define TV_YPOS_SHIFT 0
-
-#define TV_WIN_SIZE 0x68074
-/** Horizontal size of the display window, measured in pixels*/
-# define TV_XSIZE_MASK 0x1fff0000
-# define TV_XSIZE_SHIFT 16
-/**
- * Vertical size of the display window, measured in pixels.
- *
- * Must be even for interlaced modes.
- */
-# define TV_YSIZE_MASK 0x00000fff
-# define TV_YSIZE_SHIFT 0
-
-#define TV_FILTER_CTL_1 0x68080
-/**
- * Enables automatic scaling calculation.
- *
- * If set, the rest of the registers are ignored, and the calculated values can
- * be read back from the register.
- */
-# define TV_AUTO_SCALE (1 << 31)
-/**
- * Disables the vertical filter.
- *
- * This is required on modes more than 1024 pixels wide */
-# define TV_V_FILTER_BYPASS (1 << 29)
-/** Enables adaptive vertical filtering */
-# define TV_VADAPT (1 << 28)
-# define TV_VADAPT_MODE_MASK (3 << 26)
-/** Selects the least adaptive vertical filtering mode */
-# define TV_VADAPT_MODE_LEAST (0 << 26)
-/** Selects the moderately adaptive vertical filtering mode */
-# define TV_VADAPT_MODE_MODERATE (1 << 26)
-/** Selects the most adaptive vertical filtering mode */
-# define TV_VADAPT_MODE_MOST (3 << 26)
-/**
- * Sets the horizontal scaling factor.
- *
- * This should be the fractional part of the horizontal scaling factor divided
- * by the oversampling rate. TV_HSCALE should be less than 1, and set to:
- *
- * (src width - 1) / ((oversample * dest width) - 1)
- */
-# define TV_HSCALE_FRAC_MASK 0x00003fff
-# define TV_HSCALE_FRAC_SHIFT 0
-
-#define TV_FILTER_CTL_2 0x68084
-/**
- * Sets the integer part of the 3.15 fixed-point vertical scaling factor.
- *
- * TV_VSCALE should be (src height - 1) / ((interlace * dest height) - 1)
- */
-# define TV_VSCALE_INT_MASK 0x00038000
-# define TV_VSCALE_INT_SHIFT 15
-/**
- * Sets the fractional part of the 3.15 fixed-point vertical scaling factor.
- *
- * \sa TV_VSCALE_INT_MASK
- */
-# define TV_VSCALE_FRAC_MASK 0x00007fff
-# define TV_VSCALE_FRAC_SHIFT 0
-
-#define TV_FILTER_CTL_3 0x68088
-/**
- * Sets the integer part of the 3.15 fixed-point vertical scaling factor.
- *
- * TV_VSCALE should be (src height - 1) / (1/4 * (dest height - 1))
- *
- * For progressive modes, TV_VSCALE_IP_INT should be set to zeroes.
- */
-# define TV_VSCALE_IP_INT_MASK 0x00038000
-# define TV_VSCALE_IP_INT_SHIFT 15
-/**
- * Sets the fractional part of the 3.15 fixed-point vertical scaling factor.
- *
- * For progressive modes, TV_VSCALE_IP_INT should be set to zeroes.
- *
- * \sa TV_VSCALE_IP_INT_MASK
- */
-# define TV_VSCALE_IP_FRAC_MASK 0x00007fff
-# define TV_VSCALE_IP_FRAC_SHIFT 0
-
-#define TV_CC_CONTROL 0x68090
-# define TV_CC_ENABLE (1 << 31)
-/**
- * Specifies which field to send the CC data in.
- *
- * CC data is usually sent in field 0.
- */
-# define TV_CC_FID_MASK (1 << 27)
-# define TV_CC_FID_SHIFT 27
-/** Sets the horizontal position of the CC data. Usually 135. */
-# define TV_CC_HOFF_MASK 0x03ff0000
-# define TV_CC_HOFF_SHIFT 16
-/** Sets the vertical position of the CC data. Usually 21 */
-# define TV_CC_LINE_MASK 0x0000003f
-# define TV_CC_LINE_SHIFT 0
-
-#define TV_CC_DATA 0x68094
-# define TV_CC_RDY (1 << 31)
-/** Second word of CC data to be transmitted. */
-# define TV_CC_DATA_2_MASK 0x007f0000
-# define TV_CC_DATA_2_SHIFT 16
-/** First word of CC data to be transmitted. */
-# define TV_CC_DATA_1_MASK 0x0000007f
-# define TV_CC_DATA_1_SHIFT 0
-
-#define TV_H_LUMA_0 0x68100
-#define TV_H_LUMA_59 0x681ec
-#define TV_H_CHROMA_0 0x68200
-#define TV_H_CHROMA_59 0x682ec
-#define TV_V_LUMA_0 0x68300
-#define TV_V_LUMA_42 0x683a8
-#define TV_V_CHROMA_0 0x68400
-#define TV_V_CHROMA_42 0x684a8
-
-/* Display & cursor control */
-
-/* Pipe A */
-#define PIPEADSL 0x70000
-#define PIPEACONF 0x70008
-#define PIPEACONF_ENABLE (1<<31)
-#define PIPEACONF_DISABLE 0
-#define PIPEACONF_DOUBLE_WIDE (1<<30)
-#define I965_PIPECONF_ACTIVE (1<<30)
-#define PIPEACONF_SINGLE_WIDE 0
-#define PIPEACONF_PIPE_UNLOCKED 0
-#define PIPEACONF_PIPE_LOCKED (1<<25)
-#define PIPEACONF_PALETTE 0
-#define PIPEACONF_GAMMA (1<<24)
-#define PIPECONF_FORCE_BORDER (1<<25)
-#define PIPECONF_PROGRESSIVE (0 << 21)
-#define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
-#define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21)
-#define PIPEASTAT 0x70024
-#define PIPE_FIFO_UNDERRUN_STATUS (1UL<<31)
-#define PIPE_CRC_ERROR_ENABLE (1UL<<29)
-#define PIPE_CRC_DONE_ENABLE (1UL<<28)
-#define PIPE_GMBUS_EVENT_ENABLE (1UL<<27)
-#define PIPE_HOTPLUG_INTERRUPT_ENABLE (1UL<<26)
-#define PIPE_VSYNC_INTERRUPT_ENABLE (1UL<<25)
-#define PIPE_DISPLAY_LINE_COMPARE_ENABLE (1UL<<24)
-#define PIPE_DPST_EVENT_ENABLE (1UL<<23)
-#define PIPE_LEGACY_BLC_EVENT_ENABLE (1UL<<22)
-#define PIPE_ODD_FIELD_INTERRUPT_ENABLE (1UL<<21)
-#define PIPE_EVEN_FIELD_INTERRUPT_ENABLE (1UL<<20)
-#define PIPE_HOTPLUG_TV_INTERRUPT_ENABLE (1UL<<18) /* pre-965 */
-#define PIPE_START_VBLANK_INTERRUPT_ENABLE (1UL<<18) /* 965 or later */
-#define PIPE_VBLANK_INTERRUPT_ENABLE (1UL<<17)
-#define PIPE_OVERLAY_UPDATED_ENABLE (1UL<<16)
-#define PIPE_CRC_ERROR_INTERRUPT_STATUS (1UL<<13)
-#define PIPE_CRC_DONE_INTERRUPT_STATUS (1UL<<12)
-#define PIPE_GMBUS_INTERRUPT_STATUS (1UL<<11)
-#define PIPE_HOTPLUG_INTERRUPT_STATUS (1UL<<10)
-#define PIPE_VSYNC_INTERRUPT_STATUS (1UL<<9)
-#define PIPE_DISPLAY_LINE_COMPARE_STATUS (1UL<<8)
-#define PIPE_DPST_EVENT_STATUS (1UL<<7)
-#define PIPE_LEGACY_BLC_EVENT_STATUS (1UL<<6)
-#define PIPE_ODD_FIELD_INTERRUPT_STATUS (1UL<<5)
-#define PIPE_EVEN_FIELD_INTERRUPT_STATUS (1UL<<4)
-#define PIPE_HOTPLUG_TV_INTERRUPT_STATUS (1UL<<2) /* pre-965 */
-#define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */
-#define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1)
-#define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0)
-
-#define DSPARB 0x70030
-#define DSPARB_CSTART_MASK (0x7f << 7)
-#define DSPARB_CSTART_SHIFT 7
-#define DSPARB_BSTART_MASK (0x7f)
-#define DSPARB_BSTART_SHIFT 0
-/*
- * The two pipe frame counter registers are not synchronized, so
- * reading a stable value is somewhat tricky. The following code
- * should work:
- *
- * do {
- * high1 = ((INREG(PIPEAFRAMEHIGH) & PIPE_FRAME_HIGH_MASK) >>
- * PIPE_FRAME_HIGH_SHIFT;
- * low1 = ((INREG(PIPEAFRAMEPIXEL) & PIPE_FRAME_LOW_MASK) >>
- * PIPE_FRAME_LOW_SHIFT);
- * high2 = ((INREG(PIPEAFRAMEHIGH) & PIPE_FRAME_HIGH_MASK) >>
- * PIPE_FRAME_HIGH_SHIFT);
- * } while (high1 != high2);
- * frame = (high1 << 8) | low1;
- */
-#define PIPEAFRAMEHIGH 0x70040
-#define PIPE_FRAME_HIGH_MASK 0x0000ffff
-#define PIPE_FRAME_HIGH_SHIFT 0
-#define PIPEAFRAMEPIXEL 0x70044
-#define PIPE_FRAME_LOW_MASK 0xff000000
-#define PIPE_FRAME_LOW_SHIFT 24
-#define PIPE_PIXEL_MASK 0x00ffffff
-#define PIPE_PIXEL_SHIFT 0
-/* GM45+ just has to be different */
-#define PIPEA_FRMCOUNT_GM45 0x70040
-#define PIPEA_FLIPCOUNT_GM45 0x70044
-
-/* Cursor A & B regs */
-#define CURACNTR 0x70080
-#define CURSOR_MODE_DISABLE 0x00
-#define CURSOR_MODE_64_32B_AX 0x07
-#define CURSOR_MODE_64_ARGB_AX ((1 << 5) | CURSOR_MODE_64_32B_AX)
-#define MCURSOR_GAMMA_ENABLE (1 << 26)
-#define CURABASE 0x70084
-#define CURAPOS 0x70088
-#define CURSOR_POS_MASK 0x007FF
-#define CURSOR_POS_SIGN 0x8000
-#define CURSOR_X_SHIFT 0
-#define CURSOR_Y_SHIFT 16
-#define CURBCNTR 0x700c0
-#define CURBBASE 0x700c4
-#define CURBPOS 0x700c8
-
-/* Display A control */
-#define DSPACNTR 0x70180
-#define DISPLAY_PLANE_ENABLE (1<<31)
-#define DISPLAY_PLANE_DISABLE 0
-#define DISPPLANE_GAMMA_ENABLE (1<<30)
-#define DISPPLANE_GAMMA_DISABLE 0
-#define DISPPLANE_PIXFORMAT_MASK (0xf<<26)
-#define DISPPLANE_8BPP (0x2<<26)
-#define DISPPLANE_15_16BPP (0x4<<26)
-#define DISPPLANE_16BPP (0x5<<26)
-#define DISPPLANE_32BPP_NO_ALPHA (0x6<<26)
-#define DISPPLANE_32BPP (0x7<<26)
-#define DISPPLANE_STEREO_ENABLE (1<<25)
-#define DISPPLANE_STEREO_DISABLE 0
-#define DISPPLANE_SEL_PIPE_MASK (1<<24)
-#define DISPPLANE_SEL_PIPE_A 0
-#define DISPPLANE_SEL_PIPE_B (1<<24)
-#define DISPPLANE_SRC_KEY_ENABLE (1<<22)
-#define DISPPLANE_SRC_KEY_DISABLE 0
-#define DISPPLANE_LINE_DOUBLE (1<<20)
-#define DISPPLANE_NO_LINE_DOUBLE 0
-#define DISPPLANE_STEREO_POLARITY_FIRST 0
-#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18)
-#define DSPAADDR 0x70184
-#define DSPASTRIDE 0x70188
-#define DSPAPOS 0x7018C /* reserved */
-#define DSPASIZE 0x70190
-#define DSPASURF 0x7019C /* 965+ only */
-#define DSPATILEOFF 0x701A4 /* 965+ only */
-
-/* VBIOS flags */
-#define SWF00 0x71410
-#define SWF01 0x71414
-#define SWF02 0x71418
-#define SWF03 0x7141c
-#define SWF04 0x71420
-#define SWF05 0x71424
-#define SWF06 0x71428
-#define SWF10 0x70410
-#define SWF11 0x70414
-#define SWF14 0x71420
-#define SWF30 0x72414
-#define SWF31 0x72418
-#define SWF32 0x7241c
-
-/* Pipe B */
-#define PIPEBDSL 0x71000
-#define PIPEBCONF 0x71008
-#define PIPEBSTAT 0x71024
-#define PIPEBFRAMEHIGH 0x71040
-#define PIPEBFRAMEPIXEL 0x71044
-#define PIPEB_FRMCOUNT_GM45 0x71040
-#define PIPEB_FLIPCOUNT_GM45 0x71044
-
-/* Display B control */
-#define DSPBCNTR 0x71180
-#define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15)
-#define DISPPLANE_ALPHA_TRANS_DISABLE 0
-#define DISPPLANE_SPRITE_ABOVE_DISPLAY 0
-#define DISPPLANE_SPRITE_ABOVE_OVERLAY (1)
-#define DSPBADDR 0x71184
-#define DSPBSTRIDE 0x71188
-#define DSPBPOS 0x7118C
-#define DSPBSIZE 0x71190
-#define DSPBSURF 0x7119C
-#define DSPBTILEOFF 0x711A4
-
-/* VBIOS regs */
-#define VGACNTRL 0x71400
-# define VGA_DISP_DISABLE (1 << 31)
-# define VGA_2X_MODE (1 << 30)
-# define VGA_PIPE_B_SELECT (1 << 29)
-
-#endif /* _I915_REG_H_ */
+++ /dev/null
-/* i915_suspend.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
- */
-/*
- *
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "i915_drm.h"
-#include "i915_drv.h"
-
-static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- if (pipe == PIPE_A)
- return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE);
- else
- return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE);
-}
-
-static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- unsigned long reg = (pipe == PIPE_A ? PALETTE_A : PALETTE_B);
- u32 *array;
- int i;
-
- if (!i915_pipe_enabled(dev, pipe))
- return;
-
- if (pipe == PIPE_A)
- array = dev_priv->save_palette_a;
- else
- array = dev_priv->save_palette_b;
-
- for(i = 0; i < 256; i++)
- array[i] = I915_READ(reg + (i << 2));
-}
-
-static void i915_restore_palette(struct drm_device *dev, enum pipe pipe)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- unsigned long reg = (pipe == PIPE_A ? PALETTE_A : PALETTE_B);
- u32 *array;
- int i;
-
- if (!i915_pipe_enabled(dev, pipe))
- return;
-
- if (pipe == PIPE_A)
- array = dev_priv->save_palette_a;
- else
- array = dev_priv->save_palette_b;
-
- for(i = 0; i < 256; i++)
- I915_WRITE(reg + (i << 2), array[i]);
-}
-
-static u8 i915_read_indexed(struct drm_device *dev, u16 index_port, u16 data_port, u8 reg)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- I915_WRITE8(index_port, reg);
- return I915_READ8(data_port);
-}
-
-static u8 i915_read_ar(struct drm_device *dev, u16 st01, u8 reg, u16 palette_enable)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- I915_READ8(st01);
- I915_WRITE8(VGA_AR_INDEX, palette_enable | reg);
- return I915_READ8(VGA_AR_DATA_READ);
-}
-
-static void i915_write_ar(struct drm_device *dev, u16 st01, u8 reg, u8 val, u16 palette_enable)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- I915_READ8(st01);
- I915_WRITE8(VGA_AR_INDEX, palette_enable | reg);
- I915_WRITE8(VGA_AR_DATA_WRITE, val);
-}
-
-static void i915_write_indexed(struct drm_device *dev, u16 index_port, u16 data_port, u8 reg, u8 val)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- I915_WRITE8(index_port, reg);
- I915_WRITE8(data_port, val);
-}
-
-static void i915_save_vga(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- int i;
- u16 cr_index, cr_data, st01;
-
- /* VGA color palette registers */
- dev_priv->saveDACMASK = I915_READ8(VGA_DACMASK);
- /* DACCRX automatically increments during read */
- I915_WRITE8(VGA_DACRX, 0);
- /* Read 3 bytes of color data from each index */
- for (i = 0; i < 256 * 3; i++)
- dev_priv->saveDACDATA[i] = I915_READ8(VGA_DACDATA);
-
- /* MSR bits */
- dev_priv->saveMSR = I915_READ8(VGA_MSR_READ);
- if (dev_priv->saveMSR & VGA_MSR_CGA_MODE) {
- cr_index = VGA_CR_INDEX_CGA;
- cr_data = VGA_CR_DATA_CGA;
- st01 = VGA_ST01_CGA;
- } else {
- cr_index = VGA_CR_INDEX_MDA;
- cr_data = VGA_CR_DATA_MDA;
- st01 = VGA_ST01_MDA;
- }
-
- /* CRT controller regs */
- i915_write_indexed(dev, cr_index, cr_data, 0x11,
- i915_read_indexed(dev, cr_index, cr_data, 0x11) &
- (~0x80));
- for (i = 0; i <= 0x24; i++)
- dev_priv->saveCR[i] =
- i915_read_indexed(dev, cr_index, cr_data, i);
- /* Make sure we don't turn off CR group 0 writes */
- dev_priv->saveCR[0x11] &= ~0x80;
-
- /* Attribute controller registers */
- I915_READ8(st01);
- dev_priv->saveAR_INDEX = I915_READ8(VGA_AR_INDEX);
- for (i = 0; i <= 0x14; i++)
- dev_priv->saveAR[i] = i915_read_ar(dev, st01, i, 0);
- I915_READ8(st01);
- I915_WRITE8(VGA_AR_INDEX, dev_priv->saveAR_INDEX);
- I915_READ8(st01);
-
- /* Graphics controller registers */
- for (i = 0; i < 9; i++)
- dev_priv->saveGR[i] =
- i915_read_indexed(dev, VGA_GR_INDEX, VGA_GR_DATA, i);
-
- dev_priv->saveGR[0x10] =
- i915_read_indexed(dev, VGA_GR_INDEX, VGA_GR_DATA, 0x10);
- dev_priv->saveGR[0x11] =
- i915_read_indexed(dev, VGA_GR_INDEX, VGA_GR_DATA, 0x11);
- dev_priv->saveGR[0x18] =
- i915_read_indexed(dev, VGA_GR_INDEX, VGA_GR_DATA, 0x18);
-
- /* Sequencer registers */
- for (i = 0; i < 8; i++)
- dev_priv->saveSR[i] =
- i915_read_indexed(dev, VGA_SR_INDEX, VGA_SR_DATA, i);
-}
-
-static void i915_restore_vga(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- int i;
- u16 cr_index, cr_data, st01;
-
- /* MSR bits */
- I915_WRITE8(VGA_MSR_WRITE, dev_priv->saveMSR);
- if (dev_priv->saveMSR & VGA_MSR_CGA_MODE) {
- cr_index = VGA_CR_INDEX_CGA;
- cr_data = VGA_CR_DATA_CGA;
- st01 = VGA_ST01_CGA;
- } else {
- cr_index = VGA_CR_INDEX_MDA;
- cr_data = VGA_CR_DATA_MDA;
- st01 = VGA_ST01_MDA;
- }
-
- /* Sequencer registers, don't write SR07 */
- for (i = 0; i < 7; i++)
- i915_write_indexed(dev, VGA_SR_INDEX, VGA_SR_DATA, i,
- dev_priv->saveSR[i]);
-
- /* CRT controller regs */
- /* Enable CR group 0 writes */
- i915_write_indexed(dev, cr_index, cr_data, 0x11, dev_priv->saveCR[0x11]);
- for (i = 0; i <= 0x24; i++)
- i915_write_indexed(dev, cr_index, cr_data, i, dev_priv->saveCR[i]);
-
- /* Graphics controller regs */
- for (i = 0; i < 9; i++)
- i915_write_indexed(dev, VGA_GR_INDEX, VGA_GR_DATA, i,
- dev_priv->saveGR[i]);
-
- i915_write_indexed(dev, VGA_GR_INDEX, VGA_GR_DATA, 0x10,
- dev_priv->saveGR[0x10]);
- i915_write_indexed(dev, VGA_GR_INDEX, VGA_GR_DATA, 0x11,
- dev_priv->saveGR[0x11]);
- i915_write_indexed(dev, VGA_GR_INDEX, VGA_GR_DATA, 0x18,
- dev_priv->saveGR[0x18]);
-
- /* Attribute controller registers */
- I915_READ8(st01); /* switch back to index mode */
- for (i = 0; i <= 0x14; i++)
- i915_write_ar(dev, st01, i, dev_priv->saveAR[i], 0);
- I915_READ8(st01); /* switch back to index mode */
- I915_WRITE8(VGA_AR_INDEX, dev_priv->saveAR_INDEX | 0x20);
- I915_READ8(st01);
-
- /* VGA color palette registers */
- I915_WRITE8(VGA_DACMASK, dev_priv->saveDACMASK);
- /* DACCRX automatically increments during read */
- I915_WRITE8(VGA_DACWX, 0);
- /* Read 3 bytes of color data from each index */
- for (i = 0; i < 256 * 3; i++)
- I915_WRITE8(VGA_DACDATA, dev_priv->saveDACDATA[i]);
-
-}
-
-int i915_save_state(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- int i;
-
-#if defined(__FreeBSD__)
- dev_priv->saveLBB = (u8) pci_read_config(dev->device, LBB, 1);
-#else
- pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
-#endif
-
- /* Display arbitration control */
- dev_priv->saveDSPARB = I915_READ(DSPARB);
-
- /* Pipe & plane A info */
- dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
- dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
- dev_priv->saveFPA0 = I915_READ(FPA0);
- dev_priv->saveFPA1 = I915_READ(FPA1);
- dev_priv->saveDPLL_A = I915_READ(DPLL_A);
- if (IS_I965G(dev))
- dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
- dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
- dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
- dev_priv->saveHSYNC_A = I915_READ(HSYNC_A);
- dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
- dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
- dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
- dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
-
- dev_priv->saveDSPACNTR = I915_READ(DSPACNTR);
- dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE);
- dev_priv->saveDSPASIZE = I915_READ(DSPASIZE);
- dev_priv->saveDSPAPOS = I915_READ(DSPAPOS);
- dev_priv->saveDSPAADDR = I915_READ(DSPAADDR);
- if (IS_I965G(dev)) {
- dev_priv->saveDSPASURF = I915_READ(DSPASURF);
- dev_priv->saveDSPATILEOFF = I915_READ(DSPATILEOFF);
- }
- i915_save_palette(dev, PIPE_A);
- dev_priv->savePIPEASTAT = I915_READ(PIPEASTAT);
-
- /* Pipe & plane B info */
- dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
- dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
- dev_priv->saveFPB0 = I915_READ(FPB0);
- dev_priv->saveFPB1 = I915_READ(FPB1);
- dev_priv->saveDPLL_B = I915_READ(DPLL_B);
- if (IS_I965G(dev))
- dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
- dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
- dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
- dev_priv->saveHSYNC_B = I915_READ(HSYNC_B);
- dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
- dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
- dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
- dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
-
- dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR);
- dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE);
- dev_priv->saveDSPBSIZE = I915_READ(DSPBSIZE);
- dev_priv->saveDSPBPOS = I915_READ(DSPBPOS);
- dev_priv->saveDSPBADDR = I915_READ(DSPBADDR);
- if (IS_I965GM(dev) || IS_GM45(dev)) {
- dev_priv->saveDSPBSURF = I915_READ(DSPBSURF);
- dev_priv->saveDSPBTILEOFF = I915_READ(DSPBTILEOFF);
- }
- i915_save_palette(dev, PIPE_B);
- dev_priv->savePIPEBSTAT = I915_READ(PIPEBSTAT);
-
- /* CRT state */
- dev_priv->saveADPA = I915_READ(ADPA);
-
- /* LVDS state */
- dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
- dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
- dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
- if (IS_I965G(dev))
- dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
- if (IS_MOBILE(dev) && !IS_I830(dev))
- dev_priv->saveLVDS = I915_READ(LVDS);
- if (!IS_I830(dev) && !IS_845G(dev))
- dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
- dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);
- dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
- dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
-
- /* FIXME: save TV & SDVO state */
-
- /* FBC state */
- dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
- dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
- dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
- dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
-
- /* Interrupt state */
- dev_priv->saveIIR = I915_READ(IIR);
- dev_priv->saveIER = I915_READ(IER);
- dev_priv->saveIMR = I915_READ(IMR);
-
- /* VGA state */
- dev_priv->saveVGA0 = I915_READ(VGA0);
- dev_priv->saveVGA1 = I915_READ(VGA1);
- dev_priv->saveVGA_PD = I915_READ(VGA_PD);
- dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
-
- /* Clock gating state */
- dev_priv->saveD_STATE = I915_READ(D_STATE);
- dev_priv->saveCG_2D_DIS = I915_READ(CG_2D_DIS);
-
- /* Cache mode state */
- dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
-
- /* Memory Arbitration state */
- dev_priv->saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
-
- /* Scratch space */
- for (i = 0; i < 16; i++) {
- dev_priv->saveSWF0[i] = I915_READ(SWF00 + (i << 2));
- dev_priv->saveSWF1[i] = I915_READ(SWF10 + (i << 2));
- }
- for (i = 0; i < 3; i++)
- dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2));
-
- i915_save_vga(dev);
-
- return 0;
-}
-
-int i915_restore_state(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- int i;
-
-#if defined(__FreeBSD__)
- pci_write_config(dev->device, LBB, dev_priv->saveLBB, 1);
-#else
- pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
-#endif
-
- I915_WRITE(DSPARB, dev_priv->saveDSPARB);
-
- /* Pipe & plane A info */
- /* Prime the clock */
- if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
- I915_WRITE(DPLL_A, dev_priv->saveDPLL_A &
- ~DPLL_VCO_ENABLE);
- DRM_UDELAY(150);
- }
- I915_WRITE(FPA0, dev_priv->saveFPA0);
- I915_WRITE(FPA1, dev_priv->saveFPA1);
- /* Actually enable it */
- I915_WRITE(DPLL_A, dev_priv->saveDPLL_A);
- DRM_UDELAY(150);
- if (IS_I965G(dev))
- I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
- DRM_UDELAY(150);
-
- /* Restore mode */
- I915_WRITE(HTOTAL_A, dev_priv->saveHTOTAL_A);
- I915_WRITE(HBLANK_A, dev_priv->saveHBLANK_A);
- I915_WRITE(HSYNC_A, dev_priv->saveHSYNC_A);
- I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
- I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
- I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
- I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
-
- /* Restore plane info */
- I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE);
- I915_WRITE(DSPAPOS, dev_priv->saveDSPAPOS);
- I915_WRITE(PIPEASRC, dev_priv->savePIPEASRC);
- I915_WRITE(DSPAADDR, dev_priv->saveDSPAADDR);
- I915_WRITE(DSPASTRIDE, dev_priv->saveDSPASTRIDE);
- if (IS_I965G(dev)) {
- I915_WRITE(DSPASURF, dev_priv->saveDSPASURF);
- I915_WRITE(DSPATILEOFF, dev_priv->saveDSPATILEOFF);
- }
-
- I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF);
-
- i915_restore_palette(dev, PIPE_A);
- /* Enable the plane */
- I915_WRITE(DSPACNTR, dev_priv->saveDSPACNTR);
- I915_WRITE(DSPAADDR, I915_READ(DSPAADDR));
-
- /* Pipe & plane B info */
- if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {
- I915_WRITE(DPLL_B, dev_priv->saveDPLL_B &
- ~DPLL_VCO_ENABLE);
- DRM_UDELAY(150);
- }
- I915_WRITE(FPB0, dev_priv->saveFPB0);
- I915_WRITE(FPB1, dev_priv->saveFPB1);
- /* Actually enable it */
- I915_WRITE(DPLL_B, dev_priv->saveDPLL_B);
- DRM_UDELAY(150);
- if (IS_I965G(dev))
- I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
- DRM_UDELAY(150);
-
- /* Restore mode */
- I915_WRITE(HTOTAL_B, dev_priv->saveHTOTAL_B);
- I915_WRITE(HBLANK_B, dev_priv->saveHBLANK_B);
- I915_WRITE(HSYNC_B, dev_priv->saveHSYNC_B);
- I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
- I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
- I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
- I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
-
- /* Restore plane info */
- I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE);
- I915_WRITE(DSPBPOS, dev_priv->saveDSPBPOS);
- I915_WRITE(PIPEBSRC, dev_priv->savePIPEBSRC);
- I915_WRITE(DSPBADDR, dev_priv->saveDSPBADDR);
- I915_WRITE(DSPBSTRIDE, dev_priv->saveDSPBSTRIDE);
- if (IS_I965G(dev)) {
- I915_WRITE(DSPBSURF, dev_priv->saveDSPBSURF);
- I915_WRITE(DSPBTILEOFF, dev_priv->saveDSPBTILEOFF);
- }
-
- I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF);
-
- i915_restore_palette(dev, PIPE_B);
- /* Enable the plane */
- I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);
- I915_WRITE(DSPBADDR, I915_READ(DSPBADDR));
-
- /* CRT state */
- I915_WRITE(ADPA, dev_priv->saveADPA);
-
- /* LVDS state */
- if (IS_I965G(dev))
- I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
- if (IS_MOBILE(dev) && !IS_I830(dev))
- I915_WRITE(LVDS, dev_priv->saveLVDS);
- if (!IS_I830(dev) && !IS_845G(dev))
- I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
-
- I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
- I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
- I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
- I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
- I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
- I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
-
- /* FIXME: restore TV & SDVO state */
-
- /* FBC info */
- I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
- I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
- I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
- I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
-
- /* VGA state */
- I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
- I915_WRITE(VGA0, dev_priv->saveVGA0);
- I915_WRITE(VGA1, dev_priv->saveVGA1);
- I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
- DRM_UDELAY(150);
-
- /* Clock gating state */
- I915_WRITE (D_STATE, dev_priv->saveD_STATE);
- I915_WRITE (CG_2D_DIS, dev_priv->saveCG_2D_DIS);
-
- /* Cache mode state */
- I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
-
- /* Memory arbitration state */
- I915_WRITE (MI_ARB_STATE, dev_priv->saveMI_ARB_STATE | 0xffff0000);
-
- for (i = 0; i < 16; i++) {
- I915_WRITE(SWF00 + (i << 2), dev_priv->saveSWF0[i]);
- I915_WRITE(SWF10 + (i << 2), dev_priv->saveSWF1[i+7]);
- }
- for (i = 0; i < 3; i++)
- I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
-
- i915_restore_vga(dev);
-
- return 0;
-}
-
+++ /dev/null
-/*
- * Copyright 2005 Adam Jackson.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/* derived from tdfx_drv.h */
-
-#ifndef __IMAGINE_DRV_H__
-#define __IMAGINE_DRV_H__
-
-#define DRIVER_AUTHOR "Adam Jackson"
-#define DRIVER_NAME "imagine"
-#define DRIVER_DESC "#9 Imagine128 and Ticket 2 Ride"
-#define DRIVER_DATE "20050328"
-#define DRIVER_MAJOR 0
-#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 1
-
-enum imagine_family {
- IMAGINE_128,
- IMAGINE_128_2,
- IMAGINE_T2R,
- IMAGINE_REV4
-};
-
-#endif /* __IMAGINE_DRV_H__ */
+++ /dev/null
-/* mach64_dma.c -- DMA support for mach64 (Rage Pro) driver -*- linux-c -*- */
-/**
- * \file mach64_dma.c
- * DMA support for mach64 (Rage Pro) driver
- *
- * \author Gareth Hughes <gareth@valinux.com>
- * \author Frank C. Earl <fearl@airmail.net>
- * \author Leif Delgass <ldelgass@retinalburn.net>
- * \author José Fonseca <j_r_fonseca@yahoo.co.uk>
- */
-
-/*
- * Copyright 2000 Gareth Hughes
- * Copyright 2002 Frank C. Earl
- * Copyright 2002-2003 Leif Delgass
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "mach64_drm.h"
-#include "mach64_drv.h"
-
-/*******************************************************************/
-/** \name Engine, FIFO control */
-/*@{*/
-
-/**
- * Waits for free entries in the FIFO.
- *
- * \note Most writes to Mach64 registers are automatically routed through
- * command FIFO which is 16 entry deep. Prior to writing to any draw engine
- * register one has to ensure that enough FIFO entries are available by calling
- * this function. Failure to do so may cause the engine to lock.
- *
- * \param dev_priv pointer to device private data structure.
- * \param entries number of free entries in the FIFO to wait for.
- *
- * \returns zero on success, or -EBUSY if the timeout (specificed by
- * drm_mach64_private::usec_timeout) occurs.
- */
-int mach64_do_wait_for_fifo(drm_mach64_private_t *dev_priv, int entries)
-{
- int slots = 0, i;
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- slots = (MACH64_READ(MACH64_FIFO_STAT) & MACH64_FIFO_SLOT_MASK);
- if (slots <= (0x8000 >> entries))
- return 0;
- DRM_UDELAY(1);
- }
-
- DRM_INFO("failed! slots=%d entries=%d\n", slots, entries);
- return -EBUSY;
-}
-
-/**
- * Wait for the draw engine to be idle.
- */
-int mach64_do_wait_for_idle(drm_mach64_private_t *dev_priv)
-{
- int i, ret;
-
- ret = mach64_do_wait_for_fifo(dev_priv, 16);
- if (ret < 0)
- return ret;
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- if (!(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE))
- return 0;
- DRM_UDELAY(1);
- }
-
- DRM_INFO("failed! GUI_STAT=0x%08x\n", MACH64_READ(MACH64_GUI_STAT));
- mach64_dump_ring_info(dev_priv);
- return -EBUSY;
-}
-
-/**
- * Wait for free entries in the ring buffer.
- *
- * The Mach64 bus master can be configured to act as a virtual FIFO, using a
- * circular buffer (commonly referred as "ring buffer" in other drivers) with
- * pointers to engine commands. This allows the CPU to do other things while
- * the graphics engine is busy, i.e., DMA mode.
- *
- * This function should be called before writing new entries to the ring
- * buffer.
- *
- * \param dev_priv pointer to device private data structure.
- * \param n number of free entries in the ring buffer to wait for.
- *
- * \returns zero on success, or -EBUSY if the timeout (specificed by
- * drm_mach64_private_t::usec_timeout) occurs.
- *
- * \sa mach64_dump_ring_info()
- */
-int mach64_wait_ring(drm_mach64_private_t *dev_priv, int n)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
- int i;
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- mach64_update_ring_snapshot(dev_priv);
- if (ring->space >= n) {
- if (i > 0)
- DRM_DEBUG("%d usecs\n", i);
- return 0;
- }
- DRM_UDELAY(1);
- }
-
- /* FIXME: This is being ignored... */
- DRM_ERROR("failed!\n");
- mach64_dump_ring_info(dev_priv);
- return -EBUSY;
-}
-
-/**
- * Wait until all DMA requests have been processed...
- *
- * \sa mach64_wait_ring()
- */
-static int mach64_ring_idle(drm_mach64_private_t *dev_priv)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
- u32 head;
- int i;
-
- head = ring->head;
- i = 0;
- while (i < dev_priv->usec_timeout) {
- mach64_update_ring_snapshot(dev_priv);
- if (ring->head == ring->tail &&
- !(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE)) {
- if (i > 0)
- DRM_DEBUG("%d usecs\n", i);
- return 0;
- }
- if (ring->head == head) {
- ++i;
- } else {
- head = ring->head;
- i = 0;
- }
- DRM_UDELAY(1);
- }
-
- DRM_INFO("failed! GUI_STAT=0x%08x\n", MACH64_READ(MACH64_GUI_STAT));
- mach64_dump_ring_info(dev_priv);
- return -EBUSY;
-}
-
-/**
- * Reset the the ring buffer descriptors.
- *
- * \sa mach64_do_engine_reset()
- */
-static void mach64_ring_reset(drm_mach64_private_t *dev_priv)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
-
- mach64_do_release_used_buffers(dev_priv);
- ring->head_addr = ring->start_addr;
- ring->head = ring->tail = 0;
- ring->space = ring->size;
-
- MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
- ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
-
- dev_priv->ring_running = 0;
-}
-
-/**
- * Ensure the all the queued commands will be processed.
- */
-int mach64_do_dma_flush(drm_mach64_private_t *dev_priv)
-{
- /* FIXME: It's not necessary to wait for idle when flushing
- * we just need to ensure the ring will be completely processed
- * in finite time without another ioctl
- */
- return mach64_ring_idle(dev_priv);
-}
-
-/**
- * Stop all DMA activity.
- */
-int mach64_do_dma_idle(drm_mach64_private_t *dev_priv)
-{
- int ret;
-
- /* wait for completion */
- if ((ret = mach64_ring_idle(dev_priv)) < 0) {
- DRM_ERROR("failed BM_GUI_TABLE=0x%08x tail: %u\n",
- MACH64_READ(MACH64_BM_GUI_TABLE),
- dev_priv->ring.tail);
- return ret;
- }
-
- mach64_ring_stop(dev_priv);
-
- /* clean up after pass */
- mach64_do_release_used_buffers(dev_priv);
- return 0;
-}
-
-/**
- * Reset the engine. This will stop the DMA if it is running.
- */
-int mach64_do_engine_reset(drm_mach64_private_t *dev_priv)
-{
- u32 tmp;
-
- DRM_DEBUG("\n");
-
- /* Kill off any outstanding DMA transfers.
- */
- tmp = MACH64_READ(MACH64_BUS_CNTL);
- MACH64_WRITE(MACH64_BUS_CNTL, tmp | MACH64_BUS_MASTER_DIS);
-
- /* Reset the GUI engine (high to low transition).
- */
- tmp = MACH64_READ(MACH64_GEN_TEST_CNTL);
- MACH64_WRITE(MACH64_GEN_TEST_CNTL, tmp & ~MACH64_GUI_ENGINE_ENABLE);
- /* Enable the GUI engine
- */
- tmp = MACH64_READ(MACH64_GEN_TEST_CNTL);
- MACH64_WRITE(MACH64_GEN_TEST_CNTL, tmp | MACH64_GUI_ENGINE_ENABLE);
-
- /* ensure engine is not locked up by clearing any FIFO or HOST errors
- */
- tmp = MACH64_READ(MACH64_BUS_CNTL);
- MACH64_WRITE(MACH64_BUS_CNTL, tmp | 0x00a00000);
-
- /* Once GUI engine is restored, disable bus mastering */
- MACH64_WRITE(MACH64_SRC_CNTL, 0);
-
- /* Reset descriptor ring */
- mach64_ring_reset(dev_priv);
-
- return 0;
-}
-
-/*@}*/
-
-
-/*******************************************************************/
-/** \name Debugging output */
-/*@{*/
-
-/**
- * Dump engine registers values.
- */
-void mach64_dump_engine_info(drm_mach64_private_t *dev_priv)
-{
- DRM_INFO("\n");
- if (!dev_priv->is_pci) {
- DRM_INFO(" AGP_BASE = 0x%08x\n",
- MACH64_READ(MACH64_AGP_BASE));
- DRM_INFO(" AGP_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_AGP_CNTL));
- }
- DRM_INFO(" ALPHA_TST_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_ALPHA_TST_CNTL));
- DRM_INFO("\n");
- DRM_INFO(" BM_COMMAND = 0x%08x\n",
- MACH64_READ(MACH64_BM_COMMAND));
- DRM_INFO("BM_FRAME_BUF_OFFSET = 0x%08x\n",
- MACH64_READ(MACH64_BM_FRAME_BUF_OFFSET));
- DRM_INFO(" BM_GUI_TABLE = 0x%08x\n",
- MACH64_READ(MACH64_BM_GUI_TABLE));
- DRM_INFO(" BM_STATUS = 0x%08x\n",
- MACH64_READ(MACH64_BM_STATUS));
- DRM_INFO(" BM_SYSTEM_MEM_ADDR = 0x%08x\n",
- MACH64_READ(MACH64_BM_SYSTEM_MEM_ADDR));
- DRM_INFO(" BM_SYSTEM_TABLE = 0x%08x\n",
- MACH64_READ(MACH64_BM_SYSTEM_TABLE));
- DRM_INFO(" BUS_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_BUS_CNTL));
- DRM_INFO("\n");
- /* DRM_INFO( " CLOCK_CNTL = 0x%08x\n", MACH64_READ( MACH64_CLOCK_CNTL ) ); */
- DRM_INFO(" CLR_CMP_CLR = 0x%08x\n",
- MACH64_READ(MACH64_CLR_CMP_CLR));
- DRM_INFO(" CLR_CMP_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_CLR_CMP_CNTL));
- /* DRM_INFO( " CLR_CMP_MSK = 0x%08x\n", MACH64_READ( MACH64_CLR_CMP_MSK ) ); */
- DRM_INFO(" CONFIG_CHIP_ID = 0x%08x\n",
- MACH64_READ(MACH64_CONFIG_CHIP_ID));
- DRM_INFO(" CONFIG_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_CONFIG_CNTL));
- DRM_INFO(" CONFIG_STAT0 = 0x%08x\n",
- MACH64_READ(MACH64_CONFIG_STAT0));
- DRM_INFO(" CONFIG_STAT1 = 0x%08x\n",
- MACH64_READ(MACH64_CONFIG_STAT1));
- DRM_INFO(" CONFIG_STAT2 = 0x%08x\n",
- MACH64_READ(MACH64_CONFIG_STAT2));
- DRM_INFO(" CRC_SIG = 0x%08x\n", MACH64_READ(MACH64_CRC_SIG));
- DRM_INFO(" CUSTOM_MACRO_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_CUSTOM_MACRO_CNTL));
- DRM_INFO("\n");
- /* DRM_INFO( " DAC_CNTL = 0x%08x\n", MACH64_READ( MACH64_DAC_CNTL ) ); */
- /* DRM_INFO( " DAC_REGS = 0x%08x\n", MACH64_READ( MACH64_DAC_REGS ) ); */
- DRM_INFO(" DP_BKGD_CLR = 0x%08x\n",
- MACH64_READ(MACH64_DP_BKGD_CLR));
- DRM_INFO(" DP_FRGD_CLR = 0x%08x\n",
- MACH64_READ(MACH64_DP_FRGD_CLR));
- DRM_INFO(" DP_MIX = 0x%08x\n", MACH64_READ(MACH64_DP_MIX));
- DRM_INFO(" DP_PIX_WIDTH = 0x%08x\n",
- MACH64_READ(MACH64_DP_PIX_WIDTH));
- DRM_INFO(" DP_SRC = 0x%08x\n", MACH64_READ(MACH64_DP_SRC));
- DRM_INFO(" DP_WRITE_MASK = 0x%08x\n",
- MACH64_READ(MACH64_DP_WRITE_MASK));
- DRM_INFO(" DSP_CONFIG = 0x%08x\n",
- MACH64_READ(MACH64_DSP_CONFIG));
- DRM_INFO(" DSP_ON_OFF = 0x%08x\n",
- MACH64_READ(MACH64_DSP_ON_OFF));
- DRM_INFO(" DST_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_DST_CNTL));
- DRM_INFO(" DST_OFF_PITCH = 0x%08x\n",
- MACH64_READ(MACH64_DST_OFF_PITCH));
- DRM_INFO("\n");
- /* DRM_INFO( " EXT_DAC_REGS = 0x%08x\n", MACH64_READ( MACH64_EXT_DAC_REGS ) ); */
- DRM_INFO(" EXT_MEM_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_EXT_MEM_CNTL));
- DRM_INFO("\n");
- DRM_INFO(" FIFO_STAT = 0x%08x\n",
- MACH64_READ(MACH64_FIFO_STAT));
- DRM_INFO("\n");
- DRM_INFO(" GEN_TEST_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_GEN_TEST_CNTL));
- /* DRM_INFO( " GP_IO = 0x%08x\n", MACH64_READ( MACH64_GP_IO ) ); */
- DRM_INFO(" GUI_CMDFIFO_DATA = 0x%08x\n",
- MACH64_READ(MACH64_GUI_CMDFIFO_DATA));
- DRM_INFO(" GUI_CMDFIFO_DEBUG = 0x%08x\n",
- MACH64_READ(MACH64_GUI_CMDFIFO_DEBUG));
- DRM_INFO(" GUI_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_GUI_CNTL));
- DRM_INFO(" GUI_STAT = 0x%08x\n",
- MACH64_READ(MACH64_GUI_STAT));
- DRM_INFO(" GUI_TRAJ_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_GUI_TRAJ_CNTL));
- DRM_INFO("\n");
- DRM_INFO(" HOST_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_HOST_CNTL));
- DRM_INFO(" HW_DEBUG = 0x%08x\n",
- MACH64_READ(MACH64_HW_DEBUG));
- DRM_INFO("\n");
- DRM_INFO(" MEM_ADDR_CONFIG = 0x%08x\n",
- MACH64_READ(MACH64_MEM_ADDR_CONFIG));
- DRM_INFO(" MEM_BUF_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_MEM_BUF_CNTL));
- DRM_INFO("\n");
- DRM_INFO(" PAT_REG0 = 0x%08x\n",
- MACH64_READ(MACH64_PAT_REG0));
- DRM_INFO(" PAT_REG1 = 0x%08x\n",
- MACH64_READ(MACH64_PAT_REG1));
- DRM_INFO("\n");
- DRM_INFO(" SC_LEFT = 0x%08x\n", MACH64_READ(MACH64_SC_LEFT));
- DRM_INFO(" SC_RIGHT = 0x%08x\n",
- MACH64_READ(MACH64_SC_RIGHT));
- DRM_INFO(" SC_TOP = 0x%08x\n", MACH64_READ(MACH64_SC_TOP));
- DRM_INFO(" SC_BOTTOM = 0x%08x\n",
- MACH64_READ(MACH64_SC_BOTTOM));
- DRM_INFO("\n");
- DRM_INFO(" SCALE_3D_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_SCALE_3D_CNTL));
- DRM_INFO(" SCRATCH_REG0 = 0x%08x\n",
- MACH64_READ(MACH64_SCRATCH_REG0));
- DRM_INFO(" SCRATCH_REG1 = 0x%08x\n",
- MACH64_READ(MACH64_SCRATCH_REG1));
- DRM_INFO(" SETUP_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_SETUP_CNTL));
- DRM_INFO(" SRC_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_SRC_CNTL));
- DRM_INFO("\n");
- DRM_INFO(" TEX_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_TEX_CNTL));
- DRM_INFO(" TEX_SIZE_PITCH = 0x%08x\n",
- MACH64_READ(MACH64_TEX_SIZE_PITCH));
- DRM_INFO(" TIMER_CONFIG = 0x%08x\n",
- MACH64_READ(MACH64_TIMER_CONFIG));
- DRM_INFO("\n");
- DRM_INFO(" Z_CNTL = 0x%08x\n", MACH64_READ(MACH64_Z_CNTL));
- DRM_INFO(" Z_OFF_PITCH = 0x%08x\n",
- MACH64_READ(MACH64_Z_OFF_PITCH));
- DRM_INFO("\n");
-}
-
-#define MACH64_DUMP_CONTEXT 3
-
-/**
- * Used by mach64_dump_ring_info() to dump the contents of the current buffer
- * pointed by the ring head.
- */
-static void mach64_dump_buf_info(drm_mach64_private_t *dev_priv,
- struct drm_buf *buf)
-{
- u32 addr = GETBUFADDR(buf);
- u32 used = buf->used >> 2;
- u32 sys_addr = MACH64_READ(MACH64_BM_SYSTEM_MEM_ADDR);
- u32 *p = GETBUFPTR(buf);
- int skipped = 0;
-
- DRM_INFO("buffer contents:\n");
-
- while (used) {
- u32 reg, count;
-
- reg = le32_to_cpu(*p++);
- if (addr <= GETBUFADDR(buf) + MACH64_DUMP_CONTEXT * 4 ||
- (addr >= sys_addr - MACH64_DUMP_CONTEXT * 4 &&
- addr <= sys_addr + MACH64_DUMP_CONTEXT * 4) ||
- addr >=
- GETBUFADDR(buf) + buf->used - MACH64_DUMP_CONTEXT * 4) {
- DRM_INFO("%08x: 0x%08x\n", addr, reg);
- }
- addr += 4;
- used--;
-
- count = (reg >> 16) + 1;
- reg = reg & 0xffff;
- reg = MMSELECT(reg);
- while (count && used) {
- if (addr <= GETBUFADDR(buf) + MACH64_DUMP_CONTEXT * 4 ||
- (addr >= sys_addr - MACH64_DUMP_CONTEXT * 4 &&
- addr <= sys_addr + MACH64_DUMP_CONTEXT * 4) ||
- addr >=
- GETBUFADDR(buf) + buf->used -
- MACH64_DUMP_CONTEXT * 4) {
- DRM_INFO("%08x: 0x%04x = 0x%08x\n", addr,
- reg, le32_to_cpu(*p));
- skipped = 0;
- } else {
- if (!skipped) {
- DRM_INFO(" ...\n");
- skipped = 1;
- }
- }
- p++;
- addr += 4;
- used--;
-
- reg += 4;
- count--;
- }
- }
-
- DRM_INFO("\n");
-}
-
-/**
- * Dump the ring state and contents, including the contents of the buffer being
- * processed by the graphics engine.
- */
-void mach64_dump_ring_info(drm_mach64_private_t *dev_priv)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
- int i, skipped;
-
- DRM_INFO("\n");
-
- DRM_INFO("ring contents:\n");
- DRM_INFO(" head_addr: 0x%08x head: %u tail: %u\n\n",
- ring->head_addr, ring->head, ring->tail);
-
- skipped = 0;
- for (i = 0; i < ring->size / sizeof(u32); i += 4) {
- if (i <= MACH64_DUMP_CONTEXT * 4 ||
- i >= ring->size / sizeof(u32) - MACH64_DUMP_CONTEXT * 4 ||
- (i >= ring->tail - MACH64_DUMP_CONTEXT * 4 &&
- i <= ring->tail + MACH64_DUMP_CONTEXT * 4) ||
- (i >= ring->head - MACH64_DUMP_CONTEXT * 4 &&
- i <= ring->head + MACH64_DUMP_CONTEXT * 4)) {
- DRM_INFO(" 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x%s%s\n",
- (u32)(ring->start_addr + i * sizeof(u32)),
- le32_to_cpu(((u32 *) ring->start)[i + 0]),
- le32_to_cpu(((u32 *) ring->start)[i + 1]),
- le32_to_cpu(((u32 *) ring->start)[i + 2]),
- le32_to_cpu(((u32 *) ring->start)[i + 3]),
- i == ring->head ? " (head)" : "",
- i == ring->tail ? " (tail)" : "");
- skipped = 0;
- } else {
- if (!skipped) {
- DRM_INFO(" ...\n");
- skipped = 1;
- }
- }
- }
-
- DRM_INFO("\n");
-
- if (ring->head >= 0 && ring->head < ring->size / sizeof(u32)) {
- struct list_head *ptr;
- u32 addr = le32_to_cpu(((u32 *) ring->start)[ring->head + 1]);
-
- list_for_each(ptr, &dev_priv->pending) {
- drm_mach64_freelist_t *entry =
- list_entry(ptr, drm_mach64_freelist_t, list);
- struct drm_buf *buf = entry->buf;
-
- u32 buf_addr = GETBUFADDR(buf);
-
- if (buf_addr <= addr && addr < buf_addr + buf->used)
- mach64_dump_buf_info(dev_priv, buf);
- }
- }
-
- DRM_INFO("\n");
- DRM_INFO(" BM_GUI_TABLE = 0x%08x\n",
- MACH64_READ(MACH64_BM_GUI_TABLE));
- DRM_INFO("\n");
- DRM_INFO("BM_FRAME_BUF_OFFSET = 0x%08x\n",
- MACH64_READ(MACH64_BM_FRAME_BUF_OFFSET));
- DRM_INFO(" BM_SYSTEM_MEM_ADDR = 0x%08x\n",
- MACH64_READ(MACH64_BM_SYSTEM_MEM_ADDR));
- DRM_INFO(" BM_COMMAND = 0x%08x\n",
- MACH64_READ(MACH64_BM_COMMAND));
- DRM_INFO("\n");
- DRM_INFO(" BM_STATUS = 0x%08x\n",
- MACH64_READ(MACH64_BM_STATUS));
- DRM_INFO(" BUS_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_BUS_CNTL));
- DRM_INFO(" FIFO_STAT = 0x%08x\n",
- MACH64_READ(MACH64_FIFO_STAT));
- DRM_INFO(" GUI_STAT = 0x%08x\n",
- MACH64_READ(MACH64_GUI_STAT));
- DRM_INFO(" SRC_CNTL = 0x%08x\n",
- MACH64_READ(MACH64_SRC_CNTL));
-}
-
-/*@}*/
-
-
-/*******************************************************************/
-/** \name DMA descriptor ring macros */
-/*@{*/
-
-/**
- * Add the end mark to the ring's new tail position.
- *
- * The bus master engine will keep processing the DMA buffers listed in the ring
- * until it finds this mark, making it stop.
- *
- * \sa mach64_clear_dma_eol
- */
-static __inline__ void mach64_set_dma_eol(volatile u32 *addr)
-{
-#if defined(__i386__)
- int nr = 31;
-
- /* Taken from include/asm-i386/bitops.h linux header */
- __asm__ __volatile__("lock;" "btsl %1,%0":"=m"(*addr)
- :"Ir"(nr));
-#elif defined(__powerpc__)
- u32 old;
- u32 mask = cpu_to_le32(MACH64_DMA_EOL);
-
- /* Taken from the include/asm-ppc/bitops.h linux header */
- __asm__ __volatile__("\n\
-1: lwarx %0,0,%3 \n\
- or %0,%0,%2 \n\
- stwcx. %0,0,%3 \n\
- bne- 1b":"=&r"(old), "=m"(*addr)
- :"r"(mask), "r"(addr), "m"(*addr)
- :"cc");
-#elif defined(__alpha__)
- u32 temp;
- u32 mask = MACH64_DMA_EOL;
-
- /* Taken from the include/asm-alpha/bitops.h linux header */
- __asm__ __volatile__("1: ldl_l %0,%3\n"
- " bis %0,%2,%0\n"
- " stl_c %0,%1\n"
- " beq %0,2f\n"
- ".subsection 2\n"
- "2: br 1b\n"
- ".previous":"=&r"(temp), "=m"(*addr)
- :"Ir"(mask), "m"(*addr));
-#else
- u32 mask = cpu_to_le32(MACH64_DMA_EOL);
-
- *addr |= mask;
-#endif
-}
-
-/**
- * Remove the end mark from the ring's old tail position.
- *
- * It should be called after calling mach64_set_dma_eol to mark the ring's new
- * tail position.
- *
- * We update the end marks while the bus master engine is in operation. Since
- * the bus master engine may potentially be reading from the same position
- * that we write, we must change atomically to avoid having intermediary bad
- * data.
- */
-static __inline__ void mach64_clear_dma_eol(volatile u32 *addr)
-{
-#if defined(__i386__)
- int nr = 31;
-
- /* Taken from include/asm-i386/bitops.h linux header */
- __asm__ __volatile__("lock;" "btrl %1,%0":"=m"(*addr)
- :"Ir"(nr));
-#elif defined(__powerpc__)
- u32 old;
- u32 mask = cpu_to_le32(MACH64_DMA_EOL);
-
- /* Taken from the include/asm-ppc/bitops.h linux header */
- __asm__ __volatile__("\n\
-1: lwarx %0,0,%3 \n\
- andc %0,%0,%2 \n\
- stwcx. %0,0,%3 \n\
- bne- 1b":"=&r"(old), "=m"(*addr)
- :"r"(mask), "r"(addr), "m"(*addr)
- :"cc");
-#elif defined(__alpha__)
- u32 temp;
- u32 mask = ~MACH64_DMA_EOL;
-
- /* Taken from the include/asm-alpha/bitops.h linux header */
- __asm__ __volatile__("1: ldl_l %0,%3\n"
- " and %0,%2,%0\n"
- " stl_c %0,%1\n"
- " beq %0,2f\n"
- ".subsection 2\n"
- "2: br 1b\n"
- ".previous":"=&r"(temp), "=m"(*addr)
- :"Ir"(mask), "m"(*addr));
-#else
- u32 mask = cpu_to_le32(~MACH64_DMA_EOL);
-
- *addr &= mask;
-#endif
-}
-
-#define RING_LOCALS \
- int _ring_tail, _ring_write; unsigned int _ring_mask; volatile u32 *_ring
-
-#define RING_WRITE_OFS _ring_write
-
-#define BEGIN_RING(n) \
- do { \
- if (MACH64_VERBOSE) { \
- DRM_INFO( "BEGIN_RING( %d ) \n", \
- (n) ); \
- } \
- if (dev_priv->ring.space <= (n) * sizeof(u32)) { \
- int ret; \
- if ((ret = mach64_wait_ring( dev_priv, (n) * sizeof(u32))) < 0 ) { \
- DRM_ERROR( "wait_ring failed, resetting engine\n"); \
- mach64_dump_engine_info( dev_priv ); \
- mach64_do_engine_reset( dev_priv ); \
- return ret; \
- } \
- } \
- dev_priv->ring.space -= (n) * sizeof(u32); \
- _ring = (u32 *) dev_priv->ring.start; \
- _ring_tail = _ring_write = dev_priv->ring.tail; \
- _ring_mask = dev_priv->ring.tail_mask; \
- } while (0)
-
-#define OUT_RING( x ) \
-do { \
- if (MACH64_VERBOSE) { \
- DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \
- (unsigned int)(x), _ring_write ); \
- } \
- _ring[_ring_write++] = cpu_to_le32( x ); \
- _ring_write &= _ring_mask; \
-} while (0)
-
-#define ADVANCE_RING() \
-do { \
- if (MACH64_VERBOSE) { \
- DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \
- _ring_write, _ring_tail ); \
- } \
- DRM_MEMORYBARRIER(); \
- mach64_clear_dma_eol( &_ring[(_ring_tail - 2) & _ring_mask] ); \
- DRM_MEMORYBARRIER(); \
- dev_priv->ring.tail = _ring_write; \
- mach64_ring_tick( dev_priv, &(dev_priv)->ring ); \
-} while (0)
-
-/**
- * Queue a DMA buffer of registers writes into the ring buffer.
- */
-int mach64_add_buf_to_ring(drm_mach64_private_t *dev_priv,
- drm_mach64_freelist_t *entry)
-{
- int bytes, pages, remainder;
- u32 address, page;
- int i;
- struct drm_buf *buf = entry->buf;
- RING_LOCALS;
-
- bytes = buf->used;
- address = GETBUFADDR( buf );
- pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE;
-
- BEGIN_RING( pages * 4 );
-
- for ( i = 0 ; i < pages-1 ; i++ ) {
- page = address + i * MACH64_DMA_CHUNKSIZE;
- OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR );
- OUT_RING( page );
- OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET );
- OUT_RING( 0 );
- }
-
- /* generate the final descriptor for any remaining commands in this buffer */
- page = address + i * MACH64_DMA_CHUNKSIZE;
- remainder = bytes - i * MACH64_DMA_CHUNKSIZE;
-
- /* Save dword offset of last descriptor for this buffer.
- * This is needed to check for completion of the buffer in freelist_get
- */
- entry->ring_ofs = RING_WRITE_OFS;
-
- OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR );
- OUT_RING( page );
- OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL );
- OUT_RING( 0 );
-
- ADVANCE_RING();
-
- return 0;
-}
-
-/**
- * Queue DMA buffer controlling host data tranfers (e.g., blit).
- *
- * Almost identical to mach64_add_buf_to_ring.
- */
-int mach64_add_hostdata_buf_to_ring(drm_mach64_private_t *dev_priv,
- drm_mach64_freelist_t *entry)
-{
- int bytes, pages, remainder;
- u32 address, page;
- int i;
- struct drm_buf *buf = entry->buf;
- RING_LOCALS;
-
- bytes = buf->used - MACH64_HOSTDATA_BLIT_OFFSET;
- pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE;
- address = GETBUFADDR( buf );
-
- BEGIN_RING( 4 + pages * 4 );
-
- OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR );
- OUT_RING( address );
- OUT_RING( MACH64_HOSTDATA_BLIT_OFFSET | MACH64_DMA_HOLD_OFFSET );
- OUT_RING( 0 );
- address += MACH64_HOSTDATA_BLIT_OFFSET;
-
- for ( i = 0 ; i < pages-1 ; i++ ) {
- page = address + i * MACH64_DMA_CHUNKSIZE;
- OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA );
- OUT_RING( page );
- OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET );
- OUT_RING( 0 );
- }
-
- /* generate the final descriptor for any remaining commands in this buffer */
- page = address + i * MACH64_DMA_CHUNKSIZE;
- remainder = bytes - i * MACH64_DMA_CHUNKSIZE;
-
- /* Save dword offset of last descriptor for this buffer.
- * This is needed to check for completion of the buffer in freelist_get
- */
- entry->ring_ofs = RING_WRITE_OFS;
-
- OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA );
- OUT_RING( page );
- OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL );
- OUT_RING( 0 );
-
- ADVANCE_RING();
-
- return 0;
-}
-
-/*@}*/
-
-
-/*******************************************************************/
-/** \name DMA test and initialization */
-/*@{*/
-
-/**
- * Perform a simple DMA operation using the pattern registers to test whether
- * DMA works.
- *
- * \return zero if successful.
- *
- * \note This function was the testbed for many experiences regarding Mach64
- * DMA operation. It is left here since it so tricky to get DMA operating
- * properly in some architectures and hardware.
- */
-static int mach64_bm_dma_test(struct drm_device * dev)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_dma_handle_t *cpu_addr_dmah;
- u32 data_addr;
- u32 *table, *data;
- u32 expected[2];
- u32 src_cntl, pat_reg0, pat_reg1;
- int i, count, failed;
-
- DRM_DEBUG("\n");
-
- table = (u32 *) dev_priv->ring.start;
-
- /* FIXME: get a dma buffer from the freelist here */
- DRM_DEBUG("Allocating data memory ...\n");
-#ifdef __FreeBSD__
- DRM_UNLOCK();
-#endif
- cpu_addr_dmah =
- drm_pci_alloc(dev, 0x1000, 0x1000, 0xfffffffful);
-#ifdef __FreeBSD__
- DRM_LOCK();
-#endif
- if (!cpu_addr_dmah) {
- DRM_INFO("data-memory allocation failed!\n");
- return -ENOMEM;
- } else {
- data = (u32 *) cpu_addr_dmah->vaddr;
- data_addr = (u32) cpu_addr_dmah->busaddr;
- }
-
- /* Save the X server's value for SRC_CNTL and restore it
- * in case our test fails. This prevents the X server
- * from disabling it's cache for this register
- */
- src_cntl = MACH64_READ(MACH64_SRC_CNTL);
- pat_reg0 = MACH64_READ(MACH64_PAT_REG0);
- pat_reg1 = MACH64_READ(MACH64_PAT_REG1);
-
- mach64_do_wait_for_fifo(dev_priv, 3);
-
- MACH64_WRITE(MACH64_SRC_CNTL, 0);
- MACH64_WRITE(MACH64_PAT_REG0, 0x11111111);
- MACH64_WRITE(MACH64_PAT_REG1, 0x11111111);
-
- mach64_do_wait_for_idle(dev_priv);
-
- for (i = 0; i < 2; i++) {
- u32 reg;
- reg = MACH64_READ((MACH64_PAT_REG0 + i * 4));
- DRM_DEBUG("(Before DMA Transfer) reg %d = 0x%08x\n", i, reg);
- if (reg != 0x11111111) {
- DRM_INFO("Error initializing test registers\n");
- DRM_INFO("resetting engine ...\n");
- mach64_do_engine_reset(dev_priv);
- DRM_INFO("freeing data buffer memory.\n");
- drm_pci_free(dev, cpu_addr_dmah);
- return -EIO;
- }
- }
-
- /* fill up a buffer with sets of 2 consecutive writes starting with PAT_REG0 */
- count = 0;
-
- data[count++] = cpu_to_le32(DMAREG(MACH64_PAT_REG0) | (1 << 16));
- data[count++] = expected[0] = 0x22222222;
- data[count++] = expected[1] = 0xaaaaaaaa;
-
- while (count < 1020) {
- data[count++] =
- cpu_to_le32(DMAREG(MACH64_PAT_REG0) | (1 << 16));
- data[count++] = 0x22222222;
- data[count++] = 0xaaaaaaaa;
- }
- data[count++] = cpu_to_le32(DMAREG(MACH64_SRC_CNTL) | (0 << 16));
- data[count++] = 0;
-
- DRM_DEBUG("Preparing table ...\n");
- table[MACH64_DMA_FRAME_BUF_OFFSET] = cpu_to_le32(MACH64_BM_ADDR +
- MACH64_APERTURE_OFFSET);
- table[MACH64_DMA_SYS_MEM_ADDR] = cpu_to_le32(data_addr);
- table[MACH64_DMA_COMMAND] = cpu_to_le32(count * sizeof(u32)
- | MACH64_DMA_HOLD_OFFSET
- | MACH64_DMA_EOL);
- table[MACH64_DMA_RESERVED] = 0;
-
- DRM_DEBUG("table[0] = 0x%08x\n", table[0]);
- DRM_DEBUG("table[1] = 0x%08x\n", table[1]);
- DRM_DEBUG("table[2] = 0x%08x\n", table[2]);
- DRM_DEBUG("table[3] = 0x%08x\n", table[3]);
-
- for (i = 0; i < 6; i++) {
- DRM_DEBUG(" data[%d] = 0x%08x\n", i, data[i]);
- }
- DRM_DEBUG(" ...\n");
- for (i = count - 5; i < count; i++) {
- DRM_DEBUG(" data[%d] = 0x%08x\n", i, data[i]);
- }
-
- DRM_MEMORYBARRIER();
-
- DRM_DEBUG("waiting for idle...\n");
- if ((i = mach64_do_wait_for_idle(dev_priv))) {
- DRM_INFO("mach64_do_wait_for_idle failed (result=%d)\n", i);
- DRM_INFO("resetting engine ...\n");
- mach64_do_engine_reset(dev_priv);
- mach64_do_wait_for_fifo(dev_priv, 3);
- MACH64_WRITE(MACH64_SRC_CNTL, src_cntl);
- MACH64_WRITE(MACH64_PAT_REG0, pat_reg0);
- MACH64_WRITE(MACH64_PAT_REG1, pat_reg1);
- DRM_INFO("freeing data buffer memory.\n");
- drm_pci_free(dev, cpu_addr_dmah);
- return i;
- }
- DRM_DEBUG("waiting for idle...done\n");
-
- DRM_DEBUG("BUS_CNTL = 0x%08x\n", MACH64_READ(MACH64_BUS_CNTL));
- DRM_DEBUG("SRC_CNTL = 0x%08x\n", MACH64_READ(MACH64_SRC_CNTL));
- DRM_DEBUG("\n");
- DRM_DEBUG("data bus addr = 0x%08x\n", data_addr);
- DRM_DEBUG("table bus addr = 0x%08x\n", dev_priv->ring.start_addr);
-
- DRM_DEBUG("starting DMA transfer...\n");
- MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
- dev_priv->ring.start_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
-
- MACH64_WRITE(MACH64_SRC_CNTL,
- MACH64_SRC_BM_ENABLE | MACH64_SRC_BM_SYNC |
- MACH64_SRC_BM_OP_SYSTEM_TO_REG);
-
- /* Kick off the transfer */
- DRM_DEBUG("starting DMA transfer... done.\n");
- MACH64_WRITE(MACH64_DST_HEIGHT_WIDTH, 0);
-
- DRM_DEBUG("waiting for idle...\n");
-
- if ((i = mach64_do_wait_for_idle(dev_priv))) {
- /* engine locked up, dump register state and reset */
- DRM_INFO("mach64_do_wait_for_idle failed (result=%d)\n", i);
- mach64_dump_engine_info(dev_priv);
- DRM_INFO("resetting engine ...\n");
- mach64_do_engine_reset(dev_priv);
- mach64_do_wait_for_fifo(dev_priv, 3);
- MACH64_WRITE(MACH64_SRC_CNTL, src_cntl);
- MACH64_WRITE(MACH64_PAT_REG0, pat_reg0);
- MACH64_WRITE(MACH64_PAT_REG1, pat_reg1);
- DRM_INFO("freeing data buffer memory.\n");
- drm_pci_free(dev, cpu_addr_dmah);
- return i;
- }
-
- DRM_DEBUG("waiting for idle...done\n");
-
- /* restore SRC_CNTL */
- mach64_do_wait_for_fifo(dev_priv, 1);
- MACH64_WRITE(MACH64_SRC_CNTL, src_cntl);
-
- failed = 0;
-
- /* Check register values to see if the GUI master operation succeeded */
- for (i = 0; i < 2; i++) {
- u32 reg;
- reg = MACH64_READ((MACH64_PAT_REG0 + i * 4));
- DRM_DEBUG("(After DMA Transfer) reg %d = 0x%08x\n", i, reg);
- if (reg != expected[i]) {
- failed = -1;
- }
- }
-
- /* restore pattern registers */
- mach64_do_wait_for_fifo(dev_priv, 2);
- MACH64_WRITE(MACH64_PAT_REG0, pat_reg0);
- MACH64_WRITE(MACH64_PAT_REG1, pat_reg1);
-
- DRM_DEBUG("freeing data buffer memory.\n");
- drm_pci_free(dev, cpu_addr_dmah);
- DRM_DEBUG("returning ...\n");
-
- return failed;
-}
-
-/**
- * Called during the DMA initialization ioctl to initialize all the necessary
- * software and hardware state for DMA operation.
- */
-static int mach64_do_dma_init(struct drm_device * dev, drm_mach64_init_t * init)
-{
- drm_mach64_private_t *dev_priv;
- u32 tmp;
- int i, ret;
-
- DRM_DEBUG("\n");
-
- dev_priv = drm_alloc(sizeof(drm_mach64_private_t), DRM_MEM_DRIVER);
- if (dev_priv == NULL)
- return -ENOMEM;
-
- memset(dev_priv, 0, sizeof(drm_mach64_private_t));
-
- dev_priv->is_pci = init->is_pci;
-
- dev_priv->fb_bpp = init->fb_bpp;
- dev_priv->front_offset = init->front_offset;
- dev_priv->front_pitch = init->front_pitch;
- dev_priv->back_offset = init->back_offset;
- dev_priv->back_pitch = init->back_pitch;
-
- dev_priv->depth_bpp = init->depth_bpp;
- dev_priv->depth_offset = init->depth_offset;
- dev_priv->depth_pitch = init->depth_pitch;
-
- dev_priv->front_offset_pitch = (((dev_priv->front_pitch / 8) << 22) |
- (dev_priv->front_offset >> 3));
- dev_priv->back_offset_pitch = (((dev_priv->back_pitch / 8) << 22) |
- (dev_priv->back_offset >> 3));
- dev_priv->depth_offset_pitch = (((dev_priv->depth_pitch / 8) << 22) |
- (dev_priv->depth_offset >> 3));
-
- dev_priv->usec_timeout = 1000000;
-
- /* Set up the freelist, placeholder list and pending list */
- INIT_LIST_HEAD(&dev_priv->free_list);
- INIT_LIST_HEAD(&dev_priv->placeholders);
- INIT_LIST_HEAD(&dev_priv->pending);
-
- dev_priv->sarea = drm_getsarea(dev);
- if (!dev_priv->sarea) {
- DRM_ERROR("can not find sarea!\n");
- dev->dev_private = (void *)dev_priv;
- mach64_do_cleanup_dma(dev);
- return -EINVAL;
- }
- dev_priv->fb = drm_core_findmap(dev, init->fb_offset);
- if (!dev_priv->fb) {
- DRM_ERROR("can not find frame buffer map!\n");
- dev->dev_private = (void *)dev_priv;
- mach64_do_cleanup_dma(dev);
- return -EINVAL;
- }
- dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
- if (!dev_priv->mmio) {
- DRM_ERROR("can not find mmio map!\n");
- dev->dev_private = (void *)dev_priv;
- mach64_do_cleanup_dma(dev);
- return -EINVAL;
- }
-
- dev_priv->ring_map = drm_core_findmap(dev, init->ring_offset);
- if (!dev_priv->ring_map) {
- DRM_ERROR("can not find ring map!\n");
- dev->dev_private = (void *)dev_priv;
- mach64_do_cleanup_dma(dev);
- return -EINVAL;
- }
-
- dev_priv->sarea_priv = (drm_mach64_sarea_t *)
- ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
-
- if (!dev_priv->is_pci) {
- drm_core_ioremap(dev_priv->ring_map, dev);
- if (!dev_priv->ring_map->handle) {
- DRM_ERROR("can not ioremap virtual address for"
- " descriptor ring\n");
- dev->dev_private = (void *)dev_priv;
- mach64_do_cleanup_dma(dev);
- return -ENOMEM;
- }
- dev->agp_buffer_token = init->buffers_offset;
- dev->agp_buffer_map =
- drm_core_findmap(dev, init->buffers_offset);
- if (!dev->agp_buffer_map) {
- DRM_ERROR("can not find dma buffer map!\n");
- dev->dev_private = (void *)dev_priv;
- mach64_do_cleanup_dma(dev);
- return -EINVAL;
- }
- /* there might be a nicer way to do this -
- dev isn't passed all the way though the mach64 - DA */
- dev_priv->dev_buffers = dev->agp_buffer_map;
-
- drm_core_ioremap(dev->agp_buffer_map, dev);
- if (!dev->agp_buffer_map->handle) {
- DRM_ERROR("can not ioremap virtual address for"
- " dma buffer\n");
- dev->dev_private = (void *)dev_priv;
- mach64_do_cleanup_dma(dev);
- return -ENOMEM;
- }
- dev_priv->agp_textures =
- drm_core_findmap(dev, init->agp_textures_offset);
- if (!dev_priv->agp_textures) {
- DRM_ERROR("can not find agp texture region!\n");
- dev->dev_private = (void *)dev_priv;
- mach64_do_cleanup_dma(dev);
- return -EINVAL;
- }
- }
-
- dev->dev_private = (void *)dev_priv;
-
- dev_priv->driver_mode = init->dma_mode;
-
- /* changing the FIFO size from the default causes problems with DMA */
- tmp = MACH64_READ(MACH64_GUI_CNTL);
- if ((tmp & MACH64_CMDFIFO_SIZE_MASK) != MACH64_CMDFIFO_SIZE_128) {
- DRM_INFO("Setting FIFO size to 128 entries\n");
- /* FIFO must be empty to change the FIFO depth */
- if ((ret = mach64_do_wait_for_idle(dev_priv))) {
- DRM_ERROR
- ("wait for idle failed before changing FIFO depth!\n");
- mach64_do_cleanup_dma(dev);
- return ret;
- }
- MACH64_WRITE(MACH64_GUI_CNTL, ((tmp & ~MACH64_CMDFIFO_SIZE_MASK)
- | MACH64_CMDFIFO_SIZE_128));
- /* need to read GUI_STAT for proper sync according to docs */
- if ((ret = mach64_do_wait_for_idle(dev_priv))) {
- DRM_ERROR
- ("wait for idle failed when changing FIFO depth!\n");
- mach64_do_cleanup_dma(dev);
- return ret;
- }
- }
-
- dev_priv->ring.size = 0x4000; /* 16KB */
- dev_priv->ring.start = dev_priv->ring_map->handle;
- dev_priv->ring.start_addr = (u32) dev_priv->ring_map->offset;
-
- memset(dev_priv->ring.start, 0, dev_priv->ring.size);
- DRM_INFO("descriptor ring: cpu addr %p, bus addr: 0x%08x\n",
- dev_priv->ring.start, dev_priv->ring.start_addr);
-
- ret = 0;
- if (dev_priv->driver_mode != MACH64_MODE_MMIO) {
-
- /* enable block 1 registers and bus mastering */
- MACH64_WRITE(MACH64_BUS_CNTL, ((MACH64_READ(MACH64_BUS_CNTL)
- | MACH64_BUS_EXT_REG_EN)
- & ~MACH64_BUS_MASTER_DIS));
-
- /* try a DMA GUI-mastering pass and fall back to MMIO if it fails */
- DRM_DEBUG("Starting DMA test...\n");
- if ((ret = mach64_bm_dma_test(dev))) {
- dev_priv->driver_mode = MACH64_MODE_MMIO;
- }
- }
-
- switch (dev_priv->driver_mode) {
- case MACH64_MODE_MMIO:
- MACH64_WRITE(MACH64_BUS_CNTL, (MACH64_READ(MACH64_BUS_CNTL)
- | MACH64_BUS_EXT_REG_EN
- | MACH64_BUS_MASTER_DIS));
- if (init->dma_mode == MACH64_MODE_MMIO)
- DRM_INFO("Forcing pseudo-DMA mode\n");
- else
- DRM_INFO
- ("DMA test failed (ret=%d), using pseudo-DMA mode\n",
- ret);
- break;
- case MACH64_MODE_DMA_SYNC:
- DRM_INFO("DMA test succeeded, using synchronous DMA mode\n");
- break;
- case MACH64_MODE_DMA_ASYNC:
- default:
- DRM_INFO("DMA test succeeded, using asynchronous DMA mode\n");
- }
-
- dev_priv->ring_running = 0;
-
- /* setup offsets for physical address of table start and end */
- dev_priv->ring.head_addr = dev_priv->ring.start_addr;
- dev_priv->ring.head = dev_priv->ring.tail = 0;
- dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;
- dev_priv->ring.space = dev_priv->ring.size;
-
- /* setup physical address and size of descriptor table */
- mach64_do_wait_for_fifo(dev_priv, 1);
- MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
- (dev_priv->ring.
- head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB));
-
- /* init frame counter */
- dev_priv->sarea_priv->frames_queued = 0;
- for (i = 0; i < MACH64_MAX_QUEUED_FRAMES; i++) {
- dev_priv->frame_ofs[i] = ~0; /* All ones indicates placeholder */
- }
-
- /* Allocate the DMA buffer freelist */
- if ((ret = mach64_init_freelist(dev))) {
- DRM_ERROR("Freelist allocation failed\n");
- mach64_do_cleanup_dma(dev);
- return ret;
- }
-
- return 0;
-}
-
-/*******************************************************************/
-/** MMIO Pseudo-DMA (intended primarily for debugging, not performance)
- */
-
-int mach64_do_dispatch_pseudo_dma(drm_mach64_private_t *dev_priv)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
- volatile u32 *ring_read;
- struct list_head *ptr;
- drm_mach64_freelist_t *entry;
- struct drm_buf *buf = NULL;
- u32 *buf_ptr;
- u32 used, reg, target;
- int fifo, count, found, ret, no_idle_wait;
-
- fifo = count = reg = no_idle_wait = 0;
- target = MACH64_BM_ADDR;
-
- if ((ret = mach64_do_wait_for_idle(dev_priv)) < 0) {
- DRM_INFO("idle failed before pseudo-dma dispatch, resetting engine\n");
- mach64_dump_engine_info(dev_priv);
- mach64_do_engine_reset(dev_priv);
- return ret;
- }
-
- ring_read = (u32 *) ring->start;
-
- while (ring->tail != ring->head) {
- u32 buf_addr, new_target, offset;
- u32 bytes, remaining, head, eol;
-
- head = ring->head;
-
- new_target =
- le32_to_cpu(ring_read[head++]) - MACH64_APERTURE_OFFSET;
- buf_addr = le32_to_cpu(ring_read[head++]);
- eol = le32_to_cpu(ring_read[head]) & MACH64_DMA_EOL;
- bytes = le32_to_cpu(ring_read[head++])
- & ~(MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL);
- head++;
- head &= ring->tail_mask;
-
- /* can't wait for idle between a blit setup descriptor
- * and a HOSTDATA descriptor or the engine will lock
- */
- if (new_target == MACH64_BM_HOSTDATA
- && target == MACH64_BM_ADDR)
- no_idle_wait = 1;
-
- target = new_target;
-
- found = 0;
- offset = 0;
- list_for_each(ptr, &dev_priv->pending) {
- entry = list_entry(ptr, drm_mach64_freelist_t, list);
- buf = entry->buf;
- offset = buf_addr - GETBUFADDR(buf);
- if (offset >= 0 && offset < MACH64_BUFFER_SIZE) {
- found = 1;
- break;
- }
- }
-
- if (!found || buf == NULL) {
- DRM_ERROR
- ("Couldn't find pending buffer: head: %u tail: %u buf_addr: 0x%08x %s\n",
- head, ring->tail, buf_addr, (eol ? "eol" : ""));
- mach64_dump_ring_info(dev_priv);
- mach64_do_engine_reset(dev_priv);
- return -EINVAL;
- }
-
- /* Hand feed the buffer to the card via MMIO, waiting for the fifo
- * every 16 writes
- */
- DRM_DEBUG("target: (0x%08x) %s\n", target,
- (target ==
- MACH64_BM_HOSTDATA ? "BM_HOSTDATA" : "BM_ADDR"));
- DRM_DEBUG("offset: %u bytes: %u used: %u\n", offset, bytes,
- buf->used);
-
- remaining = (buf->used - offset) >> 2; /* dwords remaining in buffer */
- used = bytes >> 2; /* dwords in buffer for this descriptor */
- buf_ptr = (u32 *) ((char *)GETBUFPTR(buf) + offset);
-
- while (used) {
-
- if (count == 0) {
- if (target == MACH64_BM_HOSTDATA) {
- reg = DMAREG(MACH64_HOST_DATA0);
- count =
- (remaining > 16) ? 16 : remaining;
- fifo = 0;
- } else {
- reg = le32_to_cpu(*buf_ptr++);
- used--;
- count = (reg >> 16) + 1;
- }
-
- reg = reg & 0xffff;
- reg = MMSELECT(reg);
- }
- while (count && used) {
- if (!fifo) {
- if (no_idle_wait) {
- if ((ret =
- mach64_do_wait_for_fifo
- (dev_priv, 16)) < 0) {
- no_idle_wait = 0;
- return ret;
- }
- } else {
- if ((ret =
- mach64_do_wait_for_idle
- (dev_priv)) < 0) {
- return ret;
- }
- }
- fifo = 16;
- }
- --fifo;
- MACH64_WRITE(reg, le32_to_cpu(*buf_ptr++));
- used--;
- remaining--;
-
- reg += 4;
- count--;
- }
- }
- ring->head = head;
- ring->head_addr = ring->start_addr + (ring->head * sizeof(u32));
- ring->space += (4 * sizeof(u32));
- }
-
- if ((ret = mach64_do_wait_for_idle(dev_priv)) < 0) {
- return ret;
- }
- MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
- ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
-
- DRM_DEBUG("completed\n");
- return 0;
-}
-
-/*@}*/
-
-
-/*******************************************************************/
-/** \name DMA cleanup */
-/*@{*/
-
-int mach64_do_cleanup_dma(struct drm_device * dev)
-{
- DRM_DEBUG("\n");
-
- /* Make sure interrupts are disabled here because the uninstall ioctl
- * may not have been called from userspace and after dev_private
- * is freed, it's too late.
- */
- if (dev->irq)
- drm_irq_uninstall(dev);
-
- if (dev->dev_private) {
- drm_mach64_private_t *dev_priv = dev->dev_private;
-
- if (!dev_priv->is_pci) {
- if (dev_priv->ring_map)
- drm_core_ioremapfree(dev_priv->ring_map, dev);
-
- if (dev->agp_buffer_map) {
- drm_core_ioremapfree(dev->agp_buffer_map, dev);
- dev->agp_buffer_map = NULL;
- }
- }
-
- mach64_destroy_freelist(dev);
-
- drm_free(dev_priv, sizeof(drm_mach64_private_t),
- DRM_MEM_DRIVER);
- dev->dev_private = NULL;
- }
-
- return 0;
-}
-
-/*@}*/
-
-
-/*******************************************************************/
-/** \name IOCTL handlers */
-/*@{*/
-
-int mach64_dma_init(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mach64_init_t *init = data;
-
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- switch (init->func) {
- case DRM_MACH64_INIT_DMA:
- return mach64_do_dma_init(dev, init);
- case DRM_MACH64_CLEANUP_DMA:
- return mach64_do_cleanup_dma(dev);
- }
-
- return -EINVAL;
-}
-
-int mach64_dma_idle(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- return mach64_do_dma_idle(dev_priv);
-}
-
-int mach64_dma_flush(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- return mach64_do_dma_flush(dev_priv);
-}
-
-int mach64_engine_reset(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- return mach64_do_engine_reset(dev_priv);
-}
-
-/*@}*/
-
-
-/*******************************************************************/
-/** \name Freelist management */
-/*@{*/
-
-int mach64_init_freelist(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_freelist_t *entry;
- struct list_head *ptr;
- int i;
-
- DRM_DEBUG("adding %d buffers to freelist\n", dma->buf_count);
-
- for (i = 0; i < dma->buf_count; i++) {
- if ((entry =
- (drm_mach64_freelist_t *)
- drm_alloc(sizeof(drm_mach64_freelist_t),
- DRM_MEM_BUFLISTS)) == NULL)
- return -ENOMEM;
- memset(entry, 0, sizeof(drm_mach64_freelist_t));
- entry->buf = dma->buflist[i];
- ptr = &entry->list;
- list_add_tail(ptr, &dev_priv->free_list);
- }
-
- return 0;
-}
-
-void mach64_destroy_freelist(struct drm_device * dev)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_freelist_t *entry;
- struct list_head *ptr;
- struct list_head *tmp;
-
- DRM_DEBUG("\n");
-
- list_for_each_safe(ptr, tmp, &dev_priv->pending) {
- list_del(ptr);
- entry = list_entry(ptr, drm_mach64_freelist_t, list);
- drm_free(entry, sizeof(*entry), DRM_MEM_BUFLISTS);
- }
- list_for_each_safe(ptr, tmp, &dev_priv->placeholders) {
- list_del(ptr);
- entry = list_entry(ptr, drm_mach64_freelist_t, list);
- drm_free(entry, sizeof(*entry), DRM_MEM_BUFLISTS);
- }
-
- list_for_each_safe(ptr, tmp, &dev_priv->free_list) {
- list_del(ptr);
- entry = list_entry(ptr, drm_mach64_freelist_t, list);
- drm_free(entry, sizeof(*entry), DRM_MEM_BUFLISTS);
- }
-}
-
-/* IMPORTANT: This function should only be called when the engine is idle or locked up,
- * as it assumes all buffers in the pending list have been completed by the hardware.
- */
-int mach64_do_release_used_buffers(drm_mach64_private_t *dev_priv)
-{
- struct list_head *ptr;
- struct list_head *tmp;
- drm_mach64_freelist_t *entry;
- int i;
-
- if (list_empty(&dev_priv->pending))
- return 0;
-
- /* Iterate the pending list and move all buffers into the freelist... */
- i = 0;
- list_for_each_safe(ptr, tmp, &dev_priv->pending) {
- entry = list_entry(ptr, drm_mach64_freelist_t, list);
- if (entry->discard) {
- entry->buf->pending = 0;
- list_del(ptr);
- list_add_tail(ptr, &dev_priv->free_list);
- i++;
- }
- }
-
- DRM_DEBUG("released %d buffers from pending list\n", i);
-
- return 0;
-}
-
-static int mach64_do_reclaim_completed(drm_mach64_private_t *dev_priv)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
- struct list_head *ptr;
- struct list_head *tmp;
- drm_mach64_freelist_t *entry;
- u32 head, tail, ofs;
-
- mach64_ring_tick(dev_priv, ring);
- head = ring->head;
- tail = ring->tail;
-
- if (head == tail) {
-#if MACH64_EXTRA_CHECKING
- if (MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE) {
- DRM_ERROR("Empty ring with non-idle engine!\n");
- mach64_dump_ring_info(dev_priv);
- return -1;
- }
-#endif
- /* last pass is complete, so release everything */
- mach64_do_release_used_buffers(dev_priv);
- DRM_DEBUG("idle engine, freed all buffers.\n");
- if (list_empty(&dev_priv->free_list)) {
- DRM_ERROR("Freelist empty with idle engine\n");
- return -1;
- }
- return 0;
- }
- /* Look for a completed buffer and bail out of the loop
- * as soon as we find one -- don't waste time trying
- * to free extra bufs here, leave that to do_release_used_buffers
- */
- list_for_each_safe(ptr, tmp, &dev_priv->pending) {
- entry = list_entry(ptr, drm_mach64_freelist_t, list);
- ofs = entry->ring_ofs;
- if (entry->discard &&
- ((head < tail && (ofs < head || ofs >= tail)) ||
- (head > tail && (ofs < head && ofs >= tail)))) {
-#if MACH64_EXTRA_CHECKING
- int i;
-
- for (i = head; i != tail; i = (i + 4) & ring->tail_mask)
- {
- u32 o1 = le32_to_cpu(((u32 *) ring->
- start)[i + 1]);
- u32 o2 = GETBUFADDR(entry->buf);
-
- if (o1 == o2) {
- DRM_ERROR
- ("Attempting to free used buffer: "
- "i=%d buf=0x%08x\n",
- i, o1);
- mach64_dump_ring_info(dev_priv);
- return -1;
- }
- }
-#endif
- /* found a processed buffer */
- entry->buf->pending = 0;
- list_del(ptr);
- list_add_tail(ptr, &dev_priv->free_list);
- DRM_DEBUG
- ("freed processed buffer (head=%d tail=%d "
- "buf ring ofs=%d).\n",
- head, tail, ofs);
- return 0;
- }
- }
-
- return 1;
-}
-
-struct drm_buf *mach64_freelist_get(drm_mach64_private_t *dev_priv)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
- drm_mach64_freelist_t *entry;
- struct list_head *ptr;
- int t;
-
- if (list_empty(&dev_priv->free_list)) {
- if (list_empty(&dev_priv->pending)) {
- DRM_ERROR
- ("Couldn't get buffer - pending and free lists empty\n");
- t = 0;
- list_for_each(ptr, &dev_priv->placeholders) {
- t++;
- }
- DRM_INFO("Placeholders: %d\n", t);
- return NULL;
- }
-
- for (t = 0; t < dev_priv->usec_timeout; t++) {
- int ret;
-
- ret = mach64_do_reclaim_completed(dev_priv);
- if (ret == 0)
- goto _freelist_entry_found;
- if (ret < 0)
- return NULL;
-
- DRM_UDELAY(1);
- }
- mach64_dump_ring_info(dev_priv);
- DRM_ERROR
- ("timeout waiting for buffers: ring head_addr: 0x%08x head: %d tail: %d\n",
- ring->head_addr, ring->head, ring->tail);
- return NULL;
- }
-
- _freelist_entry_found:
- ptr = dev_priv->free_list.next;
- list_del(ptr);
- entry = list_entry(ptr, drm_mach64_freelist_t, list);
- entry->buf->used = 0;
- list_add_tail(ptr, &dev_priv->placeholders);
- return entry->buf;
-}
-
-int mach64_freelist_put(drm_mach64_private_t *dev_priv, struct drm_buf *copy_buf)
-{
- struct list_head *ptr;
- drm_mach64_freelist_t *entry;
-
-#if MACH64_EXTRA_CHECKING
- list_for_each(ptr, &dev_priv->pending) {
- entry = list_entry(ptr, drm_mach64_freelist_t, list);
- if (copy_buf == entry->buf) {
- DRM_ERROR("Trying to release a pending buf\n");
- return -EFAULT;
- }
- }
-#endif
- ptr = dev_priv->placeholders.next;
- entry = list_entry(ptr, drm_mach64_freelist_t, list);
- copy_buf->pending = 0;
- copy_buf->used = 0;
- entry->buf = copy_buf;
- entry->discard = 1;
- list_del(ptr);
- list_add_tail(ptr, &dev_priv->free_list);
-
- return 0;
-}
-
-/*@}*/
-
-
-/*******************************************************************/
-/** \name DMA buffer request and submission IOCTL handler */
-/*@{*/
-
-static int mach64_dma_get_buffers(struct drm_device *dev,
- struct drm_file *file_priv,
- struct drm_dma * d)
-{
- int i;
- struct drm_buf *buf;
- drm_mach64_private_t *dev_priv = dev->dev_private;
-
- for (i = d->granted_count; i < d->request_count; i++) {
- buf = mach64_freelist_get(dev_priv);
-#if MACH64_EXTRA_CHECKING
- if (!buf)
- return -EFAULT;
-#else
- if (!buf)
- return -EAGAIN;
-#endif
-
- buf->file_priv = file_priv;
-
- if (DRM_COPY_TO_USER(&d->request_indices[i], &buf->idx,
- sizeof(buf->idx)))
- return -EFAULT;
- if (DRM_COPY_TO_USER(&d->request_sizes[i], &buf->total,
- sizeof(buf->total)))
- return -EFAULT;
-
- d->granted_count++;
- }
- return 0;
-}
-
-int mach64_dma_buffers(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- struct drm_dma *d = data;
- int ret = 0;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- /* Please don't send us buffers.
- */
- if (d->send_count != 0) {
- DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
- DRM_CURRENTPID, d->send_count);
- return -EINVAL;
- }
-
- /* We'll send you buffers.
- */
- if (d->request_count < 0 || d->request_count > dma->buf_count) {
- DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
- DRM_CURRENTPID, d->request_count, dma->buf_count);
- ret = -EINVAL;
- }
-
- d->granted_count = 0;
-
- if (d->request_count) {
- ret = mach64_dma_get_buffers(dev, file_priv, d);
- }
-
- return ret;
-}
-
-void mach64_driver_lastclose(struct drm_device * dev)
-{
- mach64_do_cleanup_dma(dev);
-}
-
-/*@}*/
+++ /dev/null
-/* mach64_drm.h -- Public header for the mach64 driver -*- linux-c -*-
- * Created: Thu Nov 30 20:04:32 2000 by gareth@valinux.com
- */
-/*
- * Copyright 2000 Gareth Hughes
- * Copyright 2002 Frank C. Earl
- * Copyright 2002-2003 Leif Delgass
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- * Frank C. Earl <fearl@airmail.net>
- * Leif Delgass <ldelgass@retinalburn.net>
- */
-
-#ifndef __MACH64_DRM_H__
-#define __MACH64_DRM_H__
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (mach64_sarea.h)
- */
-#ifndef __MACH64_SAREA_DEFINES__
-#define __MACH64_SAREA_DEFINES__
-
-/* What needs to be changed for the current vertex buffer?
- * GH: We're going to be pedantic about this. We want the card to do as
- * little as possible, so let's avoid having it fetch a whole bunch of
- * register values that don't change all that often, if at all.
- */
-#define MACH64_UPLOAD_DST_OFF_PITCH 0x0001
-#define MACH64_UPLOAD_Z_OFF_PITCH 0x0002
-#define MACH64_UPLOAD_Z_ALPHA_CNTL 0x0004
-#define MACH64_UPLOAD_SCALE_3D_CNTL 0x0008
-#define MACH64_UPLOAD_DP_FOG_CLR 0x0010
-#define MACH64_UPLOAD_DP_WRITE_MASK 0x0020
-#define MACH64_UPLOAD_DP_PIX_WIDTH 0x0040
-#define MACH64_UPLOAD_SETUP_CNTL 0x0080
-#define MACH64_UPLOAD_MISC 0x0100
-#define MACH64_UPLOAD_TEXTURE 0x0200
-#define MACH64_UPLOAD_TEX0IMAGE 0x0400
-#define MACH64_UPLOAD_TEX1IMAGE 0x0800
-#define MACH64_UPLOAD_CLIPRECTS 0x1000 /* handled client-side */
-#define MACH64_UPLOAD_CONTEXT 0x00ff
-#define MACH64_UPLOAD_ALL 0x1fff
-
-/* DMA buffer size
- */
-#define MACH64_BUFFER_SIZE 16384
-
-/* Max number of swaps allowed on the ring
- * before the client must wait
- */
-#define MACH64_MAX_QUEUED_FRAMES 3U
-
-/* Byte offsets for host blit buffer data
- */
-#define MACH64_HOSTDATA_BLIT_OFFSET 104
-
-/* Keep these small for testing.
- */
-#define MACH64_NR_SAREA_CLIPRECTS 8
-
-#define MACH64_CARD_HEAP 0
-#define MACH64_AGP_HEAP 1
-#define MACH64_NR_TEX_HEAPS 2
-#define MACH64_NR_TEX_REGIONS 64
-#define MACH64_LOG_TEX_GRANULARITY 16
-
-#define MACH64_TEX_MAXLEVELS 1
-
-#define MACH64_NR_CONTEXT_REGS 15
-#define MACH64_NR_TEXTURE_REGS 4
-
-#endif /* __MACH64_SAREA_DEFINES__ */
-
-typedef struct {
- unsigned int dst_off_pitch;
-
- unsigned int z_off_pitch;
- unsigned int z_cntl;
- unsigned int alpha_tst_cntl;
-
- unsigned int scale_3d_cntl;
-
- unsigned int sc_left_right;
- unsigned int sc_top_bottom;
-
- unsigned int dp_fog_clr;
- unsigned int dp_write_mask;
- unsigned int dp_pix_width;
- unsigned int dp_mix;
- unsigned int dp_src;
-
- unsigned int clr_cmp_cntl;
- unsigned int gui_traj_cntl;
-
- unsigned int setup_cntl;
-
- unsigned int tex_size_pitch;
- unsigned int tex_cntl;
- unsigned int secondary_tex_off;
- unsigned int tex_offset;
-} drm_mach64_context_regs_t;
-
-typedef struct drm_mach64_sarea {
- /* The channel for communication of state information to the kernel
- * on firing a vertex dma buffer.
- */
- drm_mach64_context_regs_t context_state;
- unsigned int dirty;
- unsigned int vertsize;
-
- /* The current cliprects, or a subset thereof.
- */
- struct drm_clip_rect boxes[MACH64_NR_SAREA_CLIPRECTS];
- unsigned int nbox;
-
- /* Counters for client-side throttling of rendering clients.
- */
- unsigned int frames_queued;
-
- /* Texture memory LRU.
- */
- struct drm_tex_region tex_list[MACH64_NR_TEX_HEAPS][MACH64_NR_TEX_REGIONS +
- 1];
- unsigned int tex_age[MACH64_NR_TEX_HEAPS];
- int ctx_owner;
-} drm_mach64_sarea_t;
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (mach64_common.h)
- */
-
-/* Mach64 specific ioctls
- * The device specific ioctl range is 0x40 to 0x79.
- */
-
-#define DRM_MACH64_INIT 0x00
-#define DRM_MACH64_IDLE 0x01
-#define DRM_MACH64_RESET 0x02
-#define DRM_MACH64_SWAP 0x03
-#define DRM_MACH64_CLEAR 0x04
-#define DRM_MACH64_VERTEX 0x05
-#define DRM_MACH64_BLIT 0x06
-#define DRM_MACH64_FLUSH 0x07
-#define DRM_MACH64_GETPARAM 0x08
-
-#define DRM_IOCTL_MACH64_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_INIT, drm_mach64_init_t)
-#define DRM_IOCTL_MACH64_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_IDLE )
-#define DRM_IOCTL_MACH64_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_RESET )
-#define DRM_IOCTL_MACH64_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_SWAP )
-#define DRM_IOCTL_MACH64_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_CLEAR, drm_mach64_clear_t)
-#define DRM_IOCTL_MACH64_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_VERTEX, drm_mach64_vertex_t)
-#define DRM_IOCTL_MACH64_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_BLIT, drm_mach64_blit_t)
-#define DRM_IOCTL_MACH64_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_FLUSH )
-#define DRM_IOCTL_MACH64_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_MACH64_GETPARAM, drm_mach64_getparam_t)
-
-/* Buffer flags for clears
- */
-#define MACH64_FRONT 0x1
-#define MACH64_BACK 0x2
-#define MACH64_DEPTH 0x4
-
-/* Primitive types for vertex buffers
- */
-#define MACH64_PRIM_POINTS 0x00000000
-#define MACH64_PRIM_LINES 0x00000001
-#define MACH64_PRIM_LINE_LOOP 0x00000002
-#define MACH64_PRIM_LINE_STRIP 0x00000003
-#define MACH64_PRIM_TRIANGLES 0x00000004
-#define MACH64_PRIM_TRIANGLE_STRIP 0x00000005
-#define MACH64_PRIM_TRIANGLE_FAN 0x00000006
-#define MACH64_PRIM_QUADS 0x00000007
-#define MACH64_PRIM_QUAD_STRIP 0x00000008
-#define MACH64_PRIM_POLYGON 0x00000009
-
-typedef enum _drm_mach64_dma_mode_t {
- MACH64_MODE_DMA_ASYNC,
- MACH64_MODE_DMA_SYNC,
- MACH64_MODE_MMIO
-} drm_mach64_dma_mode_t;
-
-typedef struct drm_mach64_init {
- enum {
- DRM_MACH64_INIT_DMA = 0x01,
- DRM_MACH64_CLEANUP_DMA = 0x02
- } func;
-
- unsigned long sarea_priv_offset;
- int is_pci;
- drm_mach64_dma_mode_t dma_mode;
-
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
-
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
-
- unsigned long fb_offset;
- unsigned long mmio_offset;
- unsigned long ring_offset;
- unsigned long buffers_offset;
- unsigned long agp_textures_offset;
-} drm_mach64_init_t;
-
-typedef struct drm_mach64_clear {
- unsigned int flags;
- int x, y, w, h;
- unsigned int clear_color;
- unsigned int clear_depth;
-} drm_mach64_clear_t;
-
-typedef struct drm_mach64_vertex {
- int prim;
- void *buf; /* Address of vertex buffer */
- unsigned long used; /* Number of bytes in buffer */
- int discard; /* Client finished with buffer? */
-} drm_mach64_vertex_t;
-
-typedef struct drm_mach64_blit {
- void *buf;
- int pitch;
- int offset;
- int format;
- unsigned short x, y;
- unsigned short width, height;
-} drm_mach64_blit_t;
-
-typedef struct drm_mach64_getparam {
- enum {
- MACH64_PARAM_FRAMES_QUEUED = 0x01,
- MACH64_PARAM_IRQ_NR = 0x02
- } param;
- void *value;
-} drm_mach64_getparam_t;
-
-#endif
+++ /dev/null
-/* mach64_drv.h -- Private header for mach64 driver -*- linux-c -*-
- * Created: Fri Nov 24 22:07:58 2000 by gareth@valinux.com
- */
-/*
- * Copyright 2000 Gareth Hughes
- * Copyright 2002 Frank C. Earl
- * Copyright 2002-2003 Leif Delgass
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- * Frank C. Earl <fearl@airmail.net>
- * Leif Delgass <ldelgass@retinalburn.net>
- * José Fonseca <j_r_fonseca@yahoo.co.uk>
- */
-
-#ifndef __MACH64_DRV_H__
-#define __MACH64_DRV_H__
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "Gareth Hughes, Leif Delgass, José Fonseca"
-
-#define DRIVER_NAME "mach64"
-#define DRIVER_DESC "DRM module for the ATI Rage Pro"
-#define DRIVER_DATE "20060718"
-
-#define DRIVER_MAJOR 2
-#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 0
-
-/* FIXME: remove these when not needed */
-/* Development driver options */
-#define MACH64_EXTRA_CHECKING 0 /* Extra sanity checks for DMA/freelist management */
-#define MACH64_VERBOSE 0 /* Verbose debugging output */
-
-typedef struct drm_mach64_freelist {
- struct list_head list; /* List pointers for free_list, placeholders, or pending list */
- struct drm_buf *buf; /* Pointer to the buffer */
- int discard; /* This flag is set when we're done (re)using a buffer */
- u32 ring_ofs; /* dword offset in ring of last descriptor for this buffer */
-} drm_mach64_freelist_t;
-
-typedef struct drm_mach64_descriptor_ring {
- void *start; /* write pointer (cpu address) to start of descriptor ring */
- u32 start_addr; /* bus address of beginning of descriptor ring */
- int size; /* size of ring in bytes */
-
- u32 head_addr; /* bus address of descriptor ring head */
- u32 head; /* dword offset of descriptor ring head */
- u32 tail; /* dword offset of descriptor ring tail */
- u32 tail_mask; /* mask used to wrap ring */
- int space; /* number of free bytes in ring */
-} drm_mach64_descriptor_ring_t;
-
-typedef struct drm_mach64_private {
- drm_mach64_sarea_t *sarea_priv;
-
- int is_pci;
- drm_mach64_dma_mode_t driver_mode; /* Async DMA, sync DMA, or MMIO */
-
- int usec_timeout; /* Timeout for the wait functions */
-
- drm_mach64_descriptor_ring_t ring; /* DMA descriptor table (ring buffer) */
- int ring_running; /* Is bus mastering is enabled */
-
- struct list_head free_list; /* Free-list head */
- struct list_head placeholders; /* Placeholder list for buffers held by clients */
- struct list_head pending; /* Buffers pending completion */
-
- u32 frame_ofs[MACH64_MAX_QUEUED_FRAMES]; /* dword ring offsets of most recent frame swaps */
-
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
-
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
-
- atomic_t vbl_received; /**< Number of vblanks received. */
-
- u32 front_offset_pitch;
- u32 back_offset_pitch;
- u32 depth_offset_pitch;
-
- drm_local_map_t *sarea;
- drm_local_map_t *fb;
- drm_local_map_t *mmio;
- drm_local_map_t *ring_map;
- drm_local_map_t *dev_buffers; /* this is a pointer to a structure in dev */
- drm_local_map_t *agp_textures;
-} drm_mach64_private_t;
-
-extern struct drm_ioctl_desc mach64_ioctls[];
-extern int mach64_max_ioctl;
-
- /* mach64_dma.c */
-extern int mach64_dma_init(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mach64_dma_idle(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mach64_dma_flush(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mach64_engine_reset(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mach64_dma_buffers(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern void mach64_driver_lastclose(struct drm_device * dev);
-
-extern int mach64_init_freelist(struct drm_device * dev);
-extern void mach64_destroy_freelist(struct drm_device * dev);
-extern struct drm_buf *mach64_freelist_get(drm_mach64_private_t * dev_priv);
-extern int mach64_freelist_put(drm_mach64_private_t * dev_priv,
- struct drm_buf * copy_buf);
-
-extern int mach64_do_wait_for_fifo(drm_mach64_private_t * dev_priv,
- int entries);
-extern int mach64_do_wait_for_idle(drm_mach64_private_t * dev_priv);
-extern int mach64_wait_ring(drm_mach64_private_t * dev_priv, int n);
-extern int mach64_do_dispatch_pseudo_dma(drm_mach64_private_t * dev_priv);
-extern int mach64_do_release_used_buffers(drm_mach64_private_t * dev_priv);
-extern void mach64_dump_engine_info(drm_mach64_private_t * dev_priv);
-extern void mach64_dump_ring_info(drm_mach64_private_t * dev_priv);
-extern int mach64_do_engine_reset(drm_mach64_private_t * dev_priv);
-
-extern int mach64_add_buf_to_ring(drm_mach64_private_t *dev_priv,
- drm_mach64_freelist_t *_entry);
-extern int mach64_add_hostdata_buf_to_ring(drm_mach64_private_t *dev_priv,
- drm_mach64_freelist_t *_entry);
-
-extern int mach64_do_dma_idle(drm_mach64_private_t * dev_priv);
-extern int mach64_do_dma_flush(drm_mach64_private_t * dev_priv);
-extern int mach64_do_cleanup_dma(struct drm_device * dev);
-
- /* mach64_state.c */
-extern int mach64_dma_clear(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mach64_dma_swap(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mach64_dma_vertex(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mach64_dma_blit(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mach64_get_param(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
-extern int mach64_driver_load(struct drm_device * dev, unsigned long flags);
-extern u32 mach64_get_vblank_counter(struct drm_device *dev, int crtc);
-extern int mach64_enable_vblank(struct drm_device *dev, int crtc);
-extern void mach64_disable_vblank(struct drm_device *dev, int crtc);
-extern irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS);
-extern void mach64_driver_irq_preinstall(struct drm_device *dev);
-extern int mach64_driver_irq_postinstall(struct drm_device *dev);
-extern void mach64_driver_irq_uninstall(struct drm_device *dev);
-
-/* ================================================================
- * Registers
- */
-
-#define MACH64_AGP_BASE 0x0148
-#define MACH64_AGP_CNTL 0x014c
-#define MACH64_ALPHA_TST_CNTL 0x0550
-
-#define MACH64_DSP_CONFIG 0x0420
-#define MACH64_DSP_ON_OFF 0x0424
-#define MACH64_EXT_MEM_CNTL 0x04ac
-#define MACH64_GEN_TEST_CNTL 0x04d0
-#define MACH64_HW_DEBUG 0x047c
-#define MACH64_MEM_ADDR_CONFIG 0x0434
-#define MACH64_MEM_BUF_CNTL 0x042c
-#define MACH64_MEM_CNTL 0x04b0
-
-#define MACH64_BM_ADDR 0x0648
-#define MACH64_BM_COMMAND 0x0188
-#define MACH64_BM_DATA 0x0648
-#define MACH64_BM_FRAME_BUF_OFFSET 0x0180
-#define MACH64_BM_GUI_TABLE 0x01b8
-#define MACH64_BM_GUI_TABLE_CMD 0x064c
-# define MACH64_CIRCULAR_BUF_SIZE_16KB (0 << 0)
-# define MACH64_CIRCULAR_BUF_SIZE_32KB (1 << 0)
-# define MACH64_CIRCULAR_BUF_SIZE_64KB (2 << 0)
-# define MACH64_CIRCULAR_BUF_SIZE_128KB (3 << 0)
-# define MACH64_LAST_DESCRIPTOR (1 << 31)
-#define MACH64_BM_HOSTDATA 0x0644
-#define MACH64_BM_STATUS 0x018c
-#define MACH64_BM_SYSTEM_MEM_ADDR 0x0184
-#define MACH64_BM_SYSTEM_TABLE 0x01bc
-#define MACH64_BUS_CNTL 0x04a0
-# define MACH64_BUS_MSTR_RESET (1 << 1)
-# define MACH64_BUS_APER_REG_DIS (1 << 4)
-# define MACH64_BUS_FLUSH_BUF (1 << 2)
-# define MACH64_BUS_MASTER_DIS (1 << 6)
-# define MACH64_BUS_EXT_REG_EN (1 << 27)
-
-#define MACH64_CLR_CMP_CLR 0x0700
-#define MACH64_CLR_CMP_CNTL 0x0708
-#define MACH64_CLR_CMP_MASK 0x0704
-#define MACH64_CONFIG_CHIP_ID 0x04e0
-#define MACH64_CONFIG_CNTL 0x04dc
-#define MACH64_CONFIG_STAT0 0x04e4
-#define MACH64_CONFIG_STAT1 0x0494
-#define MACH64_CONFIG_STAT2 0x0498
-#define MACH64_CONTEXT_LOAD_CNTL 0x072c
-#define MACH64_CONTEXT_MASK 0x0720
-#define MACH64_COMPOSITE_SHADOW_ID 0x0798
-#define MACH64_CRC_SIG 0x04e8
-#define MACH64_CUSTOM_MACRO_CNTL 0x04d4
-
-#define MACH64_DP_BKGD_CLR 0x06c0
-#define MACH64_DP_FOG_CLR 0x06c4
-#define MACH64_DP_FGRD_BKGD_CLR 0x06e0
-#define MACH64_DP_FRGD_CLR 0x06c4
-#define MACH64_DP_FGRD_CLR_MIX 0x06dc
-
-#define MACH64_DP_MIX 0x06d4
-# define BKGD_MIX_NOT_D (0 << 0)
-# define BKGD_MIX_ZERO (1 << 0)
-# define BKGD_MIX_ONE (2 << 0)
-# define MACH64_BKGD_MIX_D (3 << 0)
-# define BKGD_MIX_NOT_S (4 << 0)
-# define BKGD_MIX_D_XOR_S (5 << 0)
-# define BKGD_MIX_NOT_D_XOR_S (6 << 0)
-# define MACH64_BKGD_MIX_S (7 << 0)
-# define BKGD_MIX_NOT_D_OR_NOT_S (8 << 0)
-# define BKGD_MIX_D_OR_NOT_S (9 << 0)
-# define BKGD_MIX_NOT_D_OR_S (10 << 0)
-# define BKGD_MIX_D_OR_S (11 << 0)
-# define BKGD_MIX_D_AND_S (12 << 0)
-# define BKGD_MIX_NOT_D_AND_S (13 << 0)
-# define BKGD_MIX_D_AND_NOT_S (14 << 0)
-# define BKGD_MIX_NOT_D_AND_NOT_S (15 << 0)
-# define BKGD_MIX_D_PLUS_S_DIV2 (23 << 0)
-# define FRGD_MIX_NOT_D (0 << 16)
-# define FRGD_MIX_ZERO (1 << 16)
-# define FRGD_MIX_ONE (2 << 16)
-# define FRGD_MIX_D (3 << 16)
-# define FRGD_MIX_NOT_S (4 << 16)
-# define FRGD_MIX_D_XOR_S (5 << 16)
-# define FRGD_MIX_NOT_D_XOR_S (6 << 16)
-# define MACH64_FRGD_MIX_S (7 << 16)
-# define FRGD_MIX_NOT_D_OR_NOT_S (8 << 16)
-# define FRGD_MIX_D_OR_NOT_S (9 << 16)
-# define FRGD_MIX_NOT_D_OR_S (10 << 16)
-# define FRGD_MIX_D_OR_S (11 << 16)
-# define FRGD_MIX_D_AND_S (12 << 16)
-# define FRGD_MIX_NOT_D_AND_S (13 << 16)
-# define FRGD_MIX_D_AND_NOT_S (14 << 16)
-# define FRGD_MIX_NOT_D_AND_NOT_S (15 << 16)
-# define FRGD_MIX_D_PLUS_S_DIV2 (23 << 16)
-
-#define MACH64_DP_PIX_WIDTH 0x06d0
-# define MACH64_HOST_TRIPLE_ENABLE (1 << 13)
-# define MACH64_BYTE_ORDER_MSB_TO_LSB (0 << 24)
-# define MACH64_BYTE_ORDER_LSB_TO_MSB (1 << 24)
-
-#define MACH64_DP_SRC 0x06d8
-# define MACH64_BKGD_SRC_BKGD_CLR (0 << 0)
-# define MACH64_BKGD_SRC_FRGD_CLR (1 << 0)
-# define MACH64_BKGD_SRC_HOST (2 << 0)
-# define MACH64_BKGD_SRC_BLIT (3 << 0)
-# define MACH64_BKGD_SRC_PATTERN (4 << 0)
-# define MACH64_BKGD_SRC_3D (5 << 0)
-# define MACH64_FRGD_SRC_BKGD_CLR (0 << 8)
-# define MACH64_FRGD_SRC_FRGD_CLR (1 << 8)
-# define MACH64_FRGD_SRC_HOST (2 << 8)
-# define MACH64_FRGD_SRC_BLIT (3 << 8)
-# define MACH64_FRGD_SRC_PATTERN (4 << 8)
-# define MACH64_FRGD_SRC_3D (5 << 8)
-# define MACH64_MONO_SRC_ONE (0 << 16)
-# define MACH64_MONO_SRC_PATTERN (1 << 16)
-# define MACH64_MONO_SRC_HOST (2 << 16)
-# define MACH64_MONO_SRC_BLIT (3 << 16)
-
-#define MACH64_DP_WRITE_MASK 0x06c8
-
-#define MACH64_DST_CNTL 0x0530
-# define MACH64_DST_X_RIGHT_TO_LEFT (0 << 0)
-# define MACH64_DST_X_LEFT_TO_RIGHT (1 << 0)
-# define MACH64_DST_Y_BOTTOM_TO_TOP (0 << 1)
-# define MACH64_DST_Y_TOP_TO_BOTTOM (1 << 1)
-# define MACH64_DST_X_MAJOR (0 << 2)
-# define MACH64_DST_Y_MAJOR (1 << 2)
-# define MACH64_DST_X_TILE (1 << 3)
-# define MACH64_DST_Y_TILE (1 << 4)
-# define MACH64_DST_LAST_PEL (1 << 5)
-# define MACH64_DST_POLYGON_ENABLE (1 << 6)
-# define MACH64_DST_24_ROTATION_ENABLE (1 << 7)
-
-#define MACH64_DST_HEIGHT_WIDTH 0x0518
-#define MACH64_DST_OFF_PITCH 0x0500
-#define MACH64_DST_WIDTH_HEIGHT 0x06ec
-#define MACH64_DST_X_Y 0x06e8
-#define MACH64_DST_Y_X 0x050c
-
-#define MACH64_FIFO_STAT 0x0710
-# define MACH64_FIFO_SLOT_MASK 0x0000ffff
-# define MACH64_FIFO_ERR (1 << 31)
-
-#define MACH64_GEN_TEST_CNTL 0x04d0
-# define MACH64_GUI_ENGINE_ENABLE (1 << 8)
-#define MACH64_GUI_CMDFIFO_DEBUG 0x0170
-#define MACH64_GUI_CMDFIFO_DATA 0x0174
-#define MACH64_GUI_CNTL 0x0178
-# define MACH64_CMDFIFO_SIZE_MASK 0x00000003ul
-# define MACH64_CMDFIFO_SIZE_192 0x00000000ul
-# define MACH64_CMDFIFO_SIZE_128 0x00000001ul
-# define MACH64_CMDFIFO_SIZE_64 0x00000002ul
-#define MACH64_GUI_STAT 0x0738
-# define MACH64_GUI_ACTIVE (1 << 0)
-#define MACH64_GUI_TRAJ_CNTL 0x0730
-
-#define MACH64_HOST_CNTL 0x0640
-#define MACH64_HOST_DATA0 0x0600
-
-#define MACH64_ONE_OVER_AREA 0x029c
-#define MACH64_ONE_OVER_AREA_UC 0x0300
-
-#define MACH64_PAT_REG0 0x0680
-#define MACH64_PAT_REG1 0x0684
-
-#define MACH64_SC_LEFT 0x06a0
-#define MACH64_SC_RIGHT 0x06a4
-#define MACH64_SC_LEFT_RIGHT 0x06a8
-#define MACH64_SC_TOP 0x06ac
-#define MACH64_SC_BOTTOM 0x06b0
-#define MACH64_SC_TOP_BOTTOM 0x06b4
-
-#define MACH64_SCALE_3D_CNTL 0x05fc
-#define MACH64_SCRATCH_REG0 0x0480
-#define MACH64_SCRATCH_REG1 0x0484
-#define MACH64_SECONDARY_TEX_OFF 0x0778
-#define MACH64_SETUP_CNTL 0x0304
-#define MACH64_SRC_CNTL 0x05b4
-# define MACH64_SRC_BM_ENABLE (1 << 8)
-# define MACH64_SRC_BM_SYNC (1 << 9)
-# define MACH64_SRC_BM_OP_FRAME_TO_SYSTEM (0 << 10)
-# define MACH64_SRC_BM_OP_SYSTEM_TO_FRAME (1 << 10)
-# define MACH64_SRC_BM_OP_REG_TO_SYSTEM (2 << 10)
-# define MACH64_SRC_BM_OP_SYSTEM_TO_REG (3 << 10)
-#define MACH64_SRC_HEIGHT1 0x0594
-#define MACH64_SRC_HEIGHT2 0x05ac
-#define MACH64_SRC_HEIGHT1_WIDTH1 0x0598
-#define MACH64_SRC_HEIGHT2_WIDTH2 0x05b0
-#define MACH64_SRC_OFF_PITCH 0x0580
-#define MACH64_SRC_WIDTH1 0x0590
-#define MACH64_SRC_Y_X 0x058c
-
-#define MACH64_TEX_0_OFF 0x05c0
-#define MACH64_TEX_CNTL 0x0774
-#define MACH64_TEX_SIZE_PITCH 0x0770
-#define MACH64_TIMER_CONFIG 0x0428
-
-#define MACH64_VERTEX_1_ARGB 0x0254
-#define MACH64_VERTEX_1_S 0x0240
-#define MACH64_VERTEX_1_SECONDARY_S 0x0328
-#define MACH64_VERTEX_1_SECONDARY_T 0x032c
-#define MACH64_VERTEX_1_SECONDARY_W 0x0330
-#define MACH64_VERTEX_1_SPEC_ARGB 0x024c
-#define MACH64_VERTEX_1_T 0x0244
-#define MACH64_VERTEX_1_W 0x0248
-#define MACH64_VERTEX_1_X_Y 0x0258
-#define MACH64_VERTEX_1_Z 0x0250
-#define MACH64_VERTEX_2_ARGB 0x0274
-#define MACH64_VERTEX_2_S 0x0260
-#define MACH64_VERTEX_2_SECONDARY_S 0x0334
-#define MACH64_VERTEX_2_SECONDARY_T 0x0338
-#define MACH64_VERTEX_2_SECONDARY_W 0x033c
-#define MACH64_VERTEX_2_SPEC_ARGB 0x026c
-#define MACH64_VERTEX_2_T 0x0264
-#define MACH64_VERTEX_2_W 0x0268
-#define MACH64_VERTEX_2_X_Y 0x0278
-#define MACH64_VERTEX_2_Z 0x0270
-#define MACH64_VERTEX_3_ARGB 0x0294
-#define MACH64_VERTEX_3_S 0x0280
-#define MACH64_VERTEX_3_SECONDARY_S 0x02a0
-#define MACH64_VERTEX_3_SECONDARY_T 0x02a4
-#define MACH64_VERTEX_3_SECONDARY_W 0x02a8
-#define MACH64_VERTEX_3_SPEC_ARGB 0x028c
-#define MACH64_VERTEX_3_T 0x0284
-#define MACH64_VERTEX_3_W 0x0288
-#define MACH64_VERTEX_3_X_Y 0x0298
-#define MACH64_VERTEX_3_Z 0x0290
-
-#define MACH64_Z_CNTL 0x054c
-#define MACH64_Z_OFF_PITCH 0x0548
-
-#define MACH64_CRTC_VLINE_CRNT_VLINE 0x0410
-# define MACH64_CRTC_VLINE_MASK 0x000007ff
-# define MACH64_CRTC_CRNT_VLINE_MASK 0x07ff0000
-#define MACH64_CRTC_OFF_PITCH 0x0414
-#define MACH64_CRTC_INT_CNTL 0x0418
-# define MACH64_CRTC_VBLANK (1 << 0)
-# define MACH64_CRTC_VBLANK_INT_EN (1 << 1)
-# define MACH64_CRTC_VBLANK_INT (1 << 2)
-# define MACH64_CRTC_VLINE_INT_EN (1 << 3)
-# define MACH64_CRTC_VLINE_INT (1 << 4)
-# define MACH64_CRTC_VLINE_SYNC (1 << 5) /* 0=even, 1=odd */
-# define MACH64_CRTC_FRAME (1 << 6) /* 0=even, 1=odd */
-# define MACH64_CRTC_SNAPSHOT_INT_EN (1 << 7)
-# define MACH64_CRTC_SNAPSHOT_INT (1 << 8)
-# define MACH64_CRTC_I2C_INT_EN (1 << 9)
-# define MACH64_CRTC_I2C_INT (1 << 10)
-# define MACH64_CRTC2_VBLANK (1 << 11) /* LT Pro */
-# define MACH64_CRTC2_VBLANK_INT_EN (1 << 12) /* LT Pro */
-# define MACH64_CRTC2_VBLANK_INT (1 << 13) /* LT Pro */
-# define MACH64_CRTC2_VLINE_INT_EN (1 << 14) /* LT Pro */
-# define MACH64_CRTC2_VLINE_INT (1 << 15) /* LT Pro */
-# define MACH64_CRTC_CAPBUF0_INT_EN (1 << 16)
-# define MACH64_CRTC_CAPBUF0_INT (1 << 17)
-# define MACH64_CRTC_CAPBUF1_INT_EN (1 << 18)
-# define MACH64_CRTC_CAPBUF1_INT (1 << 19)
-# define MACH64_CRTC_OVERLAY_EOF_INT_EN (1 << 20)
-# define MACH64_CRTC_OVERLAY_EOF_INT (1 << 21)
-# define MACH64_CRTC_ONESHOT_CAP_INT_EN (1 << 22)
-# define MACH64_CRTC_ONESHOT_CAP_INT (1 << 23)
-# define MACH64_CRTC_BUSMASTER_EOL_INT_EN (1 << 24)
-# define MACH64_CRTC_BUSMASTER_EOL_INT (1 << 25)
-# define MACH64_CRTC_GP_INT_EN (1 << 26)
-# define MACH64_CRTC_GP_INT (1 << 27)
-# define MACH64_CRTC2_VLINE_SYNC (1 << 28) /* LT Pro */ /* 0=even, 1=odd */
-# define MACH64_CRTC_SNAPSHOT2_INT_EN (1 << 29) /* LT Pro */
-# define MACH64_CRTC_SNAPSHOT2_INT (1 << 30) /* LT Pro */
-# define MACH64_CRTC_VBLANK2_INT (1 << 31)
-# define MACH64_CRTC_INT_ENS \
- ( \
- MACH64_CRTC_VBLANK_INT_EN | \
- MACH64_CRTC_VLINE_INT_EN | \
- MACH64_CRTC_SNAPSHOT_INT_EN | \
- MACH64_CRTC_I2C_INT_EN | \
- MACH64_CRTC2_VBLANK_INT_EN | \
- MACH64_CRTC2_VLINE_INT_EN | \
- MACH64_CRTC_CAPBUF0_INT_EN | \
- MACH64_CRTC_CAPBUF1_INT_EN | \
- MACH64_CRTC_OVERLAY_EOF_INT_EN | \
- MACH64_CRTC_ONESHOT_CAP_INT_EN | \
- MACH64_CRTC_BUSMASTER_EOL_INT_EN | \
- MACH64_CRTC_GP_INT_EN | \
- MACH64_CRTC_SNAPSHOT2_INT_EN | \
- 0 \
- )
-# define MACH64_CRTC_INT_ACKS \
- ( \
- MACH64_CRTC_VBLANK_INT | \
- MACH64_CRTC_VLINE_INT | \
- MACH64_CRTC_SNAPSHOT_INT | \
- MACH64_CRTC_I2C_INT | \
- MACH64_CRTC2_VBLANK_INT | \
- MACH64_CRTC2_VLINE_INT | \
- MACH64_CRTC_CAPBUF0_INT | \
- MACH64_CRTC_CAPBUF1_INT | \
- MACH64_CRTC_OVERLAY_EOF_INT | \
- MACH64_CRTC_ONESHOT_CAP_INT | \
- MACH64_CRTC_BUSMASTER_EOL_INT | \
- MACH64_CRTC_GP_INT | \
- MACH64_CRTC_SNAPSHOT2_INT | \
- MACH64_CRTC_VBLANK2_INT | \
- 0 \
- )
-
-#define MACH64_DATATYPE_CI8 2
-#define MACH64_DATATYPE_ARGB1555 3
-#define MACH64_DATATYPE_RGB565 4
-#define MACH64_DATATYPE_ARGB8888 6
-#define MACH64_DATATYPE_RGB332 7
-#define MACH64_DATATYPE_Y8 8
-#define MACH64_DATATYPE_RGB8 9
-#define MACH64_DATATYPE_VYUY422 11
-#define MACH64_DATATYPE_YVYU422 12
-#define MACH64_DATATYPE_AYUV444 14
-#define MACH64_DATATYPE_ARGB4444 15
-
-#define MACH64_READ(reg) DRM_READ32(dev_priv->mmio, (reg) )
-#define MACH64_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio, (reg), (val) )
-
-#define DWMREG0 0x0400
-#define DWMREG0_END 0x07ff
-#define DWMREG1 0x0000
-#define DWMREG1_END 0x03ff
-
-#define ISREG0(r) (((r) >= DWMREG0) && ((r) <= DWMREG0_END))
-#define DMAREG0(r) (((r) - DWMREG0) >> 2)
-#define DMAREG1(r) ((((r) - DWMREG1) >> 2 ) | 0x0100)
-#define DMAREG(r) (ISREG0(r) ? DMAREG0(r) : DMAREG1(r))
-
-#define MMREG0 0x0000
-#define MMREG0_END 0x00ff
-
-#define ISMMREG0(r) (((r) >= MMREG0) && ((r) <= MMREG0_END))
-#define MMSELECT0(r) (((r) << 2) + DWMREG0)
-#define MMSELECT1(r) (((((r) & 0xff) << 2) + DWMREG1))
-#define MMSELECT(r) (ISMMREG0(r) ? MMSELECT0(r) : MMSELECT1(r))
-
-/* ================================================================
- * DMA constants
- */
-
-/* DMA descriptor field indices:
- * The descriptor fields are loaded into the read-only
- * BM_* system bus master registers during a bus-master operation
- */
-#define MACH64_DMA_FRAME_BUF_OFFSET 0 /* BM_FRAME_BUF_OFFSET */
-#define MACH64_DMA_SYS_MEM_ADDR 1 /* BM_SYSTEM_MEM_ADDR */
-#define MACH64_DMA_COMMAND 2 /* BM_COMMAND */
-#define MACH64_DMA_RESERVED 3 /* BM_STATUS */
-
-/* BM_COMMAND descriptor field flags */
-#define MACH64_DMA_HOLD_OFFSET (1<<30) /* Don't increment DMA_FRAME_BUF_OFFSET */
-#define MACH64_DMA_EOL (1<<31) /* End of descriptor list flag */
-
-#define MACH64_DMA_CHUNKSIZE 0x1000 /* 4kB per DMA descriptor */
-#define MACH64_APERTURE_OFFSET 0x7ff800 /* frame-buffer offset for gui-masters */
-
-/* ================================================================
- * Ring operations
- *
- * Since the Mach64 bus master engine requires polling, these functions end
- * up being called frequently, hence being inline.
- */
-
-static __inline__ void mach64_ring_start(drm_mach64_private_t * dev_priv)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
-
- DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n",
- ring->head_addr, ring->head, ring->tail, ring->space);
-
- if (mach64_do_wait_for_idle(dev_priv) < 0) {
- mach64_do_engine_reset(dev_priv);
- }
-
- if (dev_priv->driver_mode != MACH64_MODE_MMIO) {
- /* enable bus mastering and block 1 registers */
- MACH64_WRITE(MACH64_BUS_CNTL,
- (MACH64_READ(MACH64_BUS_CNTL) &
- ~MACH64_BUS_MASTER_DIS)
- | MACH64_BUS_EXT_REG_EN);
- mach64_do_wait_for_idle(dev_priv);
- }
-
- /* reset descriptor table ring head */
- MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
- ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
-
- dev_priv->ring_running = 1;
-}
-
-static __inline__ void mach64_ring_resume(drm_mach64_private_t * dev_priv,
- drm_mach64_descriptor_ring_t * ring)
-{
- DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n",
- ring->head_addr, ring->head, ring->tail, ring->space);
-
- /* reset descriptor table ring head */
- MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
- ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
-
- if (dev_priv->driver_mode == MACH64_MODE_MMIO) {
- mach64_do_dispatch_pseudo_dma(dev_priv);
- } else {
- /* enable GUI bus mastering, and sync the bus master to the GUI */
- MACH64_WRITE(MACH64_SRC_CNTL,
- MACH64_SRC_BM_ENABLE | MACH64_SRC_BM_SYNC |
- MACH64_SRC_BM_OP_SYSTEM_TO_REG);
-
- /* kick off the transfer */
- MACH64_WRITE(MACH64_DST_HEIGHT_WIDTH, 0);
- if (dev_priv->driver_mode == MACH64_MODE_DMA_SYNC) {
- if ((mach64_do_wait_for_idle(dev_priv)) < 0) {
- DRM_ERROR("idle failed, resetting engine\n");
- mach64_dump_engine_info(dev_priv);
- mach64_do_engine_reset(dev_priv);
- return;
- }
- mach64_do_release_used_buffers(dev_priv);
- }
- }
-}
-
-/**
- * Poll the ring head and make sure the bus master is alive.
- *
- * Mach64's bus master engine will stop if there are no more entries to process.
- * This function polls the engine for the last processed entry and calls
- * mach64_ring_resume if there is an unprocessed entry.
- *
- * Note also that, since we update the ring tail while the bus master engine is
- * in operation, it is possible that the last tail update was too late to be
- * processed, and the bus master engine stops at the previous tail position.
- * Therefore it is important to call this function frequently.
- */
-static __inline__ void mach64_ring_tick(drm_mach64_private_t * dev_priv,
- drm_mach64_descriptor_ring_t * ring)
-{
- DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n",
- ring->head_addr, ring->head, ring->tail, ring->space);
-
- if (!dev_priv->ring_running) {
- mach64_ring_start(dev_priv);
-
- if (ring->head != ring->tail) {
- mach64_ring_resume(dev_priv, ring);
- }
- } else {
- /* GUI_ACTIVE must be read before BM_GUI_TABLE to
- * correctly determine the ring head
- */
- int gui_active =
- MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE;
-
- ring->head_addr = MACH64_READ(MACH64_BM_GUI_TABLE) & 0xfffffff0;
-
- if (gui_active) {
- /* If not idle, BM_GUI_TABLE points one descriptor
- * past the current head
- */
- if (ring->head_addr == ring->start_addr) {
- ring->head_addr += ring->size;
- }
- ring->head_addr -= 4 * sizeof(u32);
- }
-
- if (ring->head_addr < ring->start_addr ||
- ring->head_addr >= ring->start_addr + ring->size) {
- DRM_ERROR("bad ring head address: 0x%08x\n",
- ring->head_addr);
- mach64_dump_ring_info(dev_priv);
- mach64_do_engine_reset(dev_priv);
- return;
- }
-
- ring->head = (ring->head_addr - ring->start_addr) / sizeof(u32);
-
- if (!gui_active && ring->head != ring->tail) {
- mach64_ring_resume(dev_priv, ring);
- }
- }
-}
-
-static __inline__ void mach64_ring_stop(drm_mach64_private_t * dev_priv)
-{
- DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n",
- dev_priv->ring.head_addr, dev_priv->ring.head,
- dev_priv->ring.tail, dev_priv->ring.space);
-
- /* restore previous SRC_CNTL to disable busmastering */
- mach64_do_wait_for_fifo(dev_priv, 1);
- MACH64_WRITE(MACH64_SRC_CNTL, 0);
-
- /* disable busmastering but keep the block 1 registers enabled */
- mach64_do_wait_for_idle(dev_priv);
- MACH64_WRITE(MACH64_BUS_CNTL, MACH64_READ(MACH64_BUS_CNTL)
- | MACH64_BUS_MASTER_DIS | MACH64_BUS_EXT_REG_EN);
-
- dev_priv->ring_running = 0;
-}
-
-static __inline__ void
-mach64_update_ring_snapshot(drm_mach64_private_t * dev_priv)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
-
- DRM_DEBUG("\n");
-
- mach64_ring_tick(dev_priv, ring);
-
- ring->space = (ring->head - ring->tail) * sizeof(u32);
- if (ring->space <= 0) {
- ring->space += ring->size;
- }
-}
-
-/* ================================================================
- * DMA macros
- *
- * Mach64's ring buffer doesn't take register writes directly. These
- * have to be written indirectly in DMA buffers. These macros simplify
- * the task of setting up a buffer, writing commands to it, and
- * queuing the buffer in the ring.
- */
-
-#define DMALOCALS \
- drm_mach64_freelist_t *_entry = NULL; \
- struct drm_buf *_buf = NULL; \
- u32 *_buf_wptr; int _outcount
-
-#define GETBUFPTR( __buf ) \
-((dev_priv->is_pci) ? \
- ((u32 *)(__buf)->address) : \
- ((u32 *)((char *)dev_priv->dev_buffers->handle + (__buf)->offset)))
-
-#define GETBUFADDR( __buf ) ((u32)(__buf)->bus_address)
-
-#define GETRINGOFFSET() (_entry->ring_ofs)
-
-static __inline__ int mach64_find_pending_buf_entry(drm_mach64_private_t *
- dev_priv,
- drm_mach64_freelist_t **
- entry, struct drm_buf * buf)
-{
- struct list_head *ptr;
-#if MACH64_EXTRA_CHECKING
- if (list_empty(&dev_priv->pending)) {
- DRM_ERROR("Empty pending list in \n");
- return -EINVAL;
- }
-#endif
- ptr = dev_priv->pending.prev;
- *entry = list_entry(ptr, drm_mach64_freelist_t, list);
- while ((*entry)->buf != buf) {
- if (ptr == &dev_priv->pending) {
- return -EFAULT;
- }
- ptr = ptr->prev;
- *entry = list_entry(ptr, drm_mach64_freelist_t, list);
- }
- return 0;
-}
-
-#define DMASETPTR( _p ) \
-do { \
- _buf = (_p); \
- _outcount = 0; \
- _buf_wptr = GETBUFPTR( _buf ); \
-} while(0)
-
-/* FIXME: use a private set of smaller buffers for state emits, clears, and swaps? */
-#define DMAGETPTR( file_priv, dev_priv, n ) \
-do { \
- if ( MACH64_VERBOSE ) { \
- DRM_INFO( "DMAGETPTR( %d )\n", (n) ); \
- } \
- _buf = mach64_freelist_get( dev_priv ); \
- if (_buf == NULL) { \
- DRM_ERROR("couldn't get buffer in DMAGETPTR\n"); \
- return -EAGAIN; \
- } \
- if (_buf->pending) { \
- DRM_ERROR("pending buf in DMAGETPTR\n"); \
- return -EFAULT; \
- } \
- _buf->file_priv = file_priv; \
- _outcount = 0; \
- \
- _buf_wptr = GETBUFPTR( _buf ); \
-} while (0)
-
-#define DMAOUTREG( reg, val ) \
-do { \
- if ( MACH64_VERBOSE ) { \
- DRM_INFO( " DMAOUTREG( 0x%x = 0x%08x )\n", \
- reg, val ); \
- } \
- _buf_wptr[_outcount++] = cpu_to_le32(DMAREG(reg)); \
- _buf_wptr[_outcount++] = cpu_to_le32((val)); \
- _buf->used += 8; \
-} while (0)
-
-#define DMAADVANCE( dev_priv, _discard ) \
- do { \
- struct list_head *ptr; \
- int ret; \
- \
- if ( MACH64_VERBOSE ) { \
- DRM_INFO( "DMAADVANCE() in \n" ); \
- } \
- \
- if (_buf->used <= 0) { \
- DRM_ERROR( "DMAADVANCE(): sending empty buf %d\n", \
- _buf->idx ); \
- return -EFAULT; \
- } \
- if (_buf->pending) { \
- /* This is a resued buffer, so we need to find it in the pending list */ \
- if ((ret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \
- DRM_ERROR( "DMAADVANCE(): couldn't find pending buf %d\n", _buf->idx ); \
- return ret; \
- } \
- if (_entry->discard) { \
- DRM_ERROR( "DMAADVANCE(): sending discarded pending buf %d\n", _buf->idx ); \
- return -EFAULT; \
- } \
- } else { \
- if (list_empty(&dev_priv->placeholders)) { \
- DRM_ERROR( "DMAADVANCE(): empty placeholder list\n"); \
- return -EFAULT; \
- } \
- ptr = dev_priv->placeholders.next; \
- list_del(ptr); \
- _entry = list_entry(ptr, drm_mach64_freelist_t, list); \
- _buf->pending = 1; \
- _entry->buf = _buf; \
- list_add_tail(ptr, &dev_priv->pending); \
- } \
- _entry->discard = (_discard); \
- if ((ret = mach64_add_buf_to_ring( dev_priv, _entry ))) \
- return ret; \
- } while (0)
-
-#define DMADISCARDBUF() \
- do { \
- if (_entry == NULL) { \
- int ret; \
- if ((ret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \
- DRM_ERROR( "couldn't find pending buf %d\n", \
- _buf->idx ); \
- return ret; \
- } \
- } \
- _entry->discard = 1; \
- } while(0)
-
-#define DMAADVANCEHOSTDATA( dev_priv ) \
- do { \
- struct list_head *ptr; \
- int ret; \
- \
- if ( MACH64_VERBOSE ) { \
- DRM_INFO( "DMAADVANCEHOSTDATA() in \n" ); \
- } \
- \
- if (_buf->used <= 0) { \
- DRM_ERROR( "DMAADVANCEHOSTDATA(): sending empty buf %d\n", _buf->idx ); \
- return -EFAULT; \
- } \
- if (list_empty(&dev_priv->placeholders)) { \
- DRM_ERROR( "empty placeholder list in DMAADVANCEHOSTDATA()\n" ); \
- return -EFAULT; \
- } \
- \
- ptr = dev_priv->placeholders.next; \
- list_del(ptr); \
- _entry = list_entry(ptr, drm_mach64_freelist_t, list); \
- _entry->buf = _buf; \
- _entry->buf->pending = 1; \
- list_add_tail(ptr, &dev_priv->pending); \
- _entry->discard = 1; \
- if ((ret = mach64_add_hostdata_buf_to_ring( dev_priv, _entry ))) \
- return ret; \
- } while (0)
-
-#endif /* __MACH64_DRV_H__ */
+++ /dev/null
-/* mach64_irq.c -- IRQ handling for ATI Mach64 -*- linux-c -*-
- * Created: Tue Feb 25, 2003 by Leif Delgass, based on radeon_irq.c/r128_irq.c
- */
-/*-
- * Copyright (C) The Weather Channel, Inc. 2002.
- * Copyright 2003 Leif Delgass
- * All Rights Reserved.
- *
- * The Weather Channel (TM) funded Tungsten Graphics to develop the
- * initial release of the Radeon 8500 driver under the XFree86 license.
- * This notice must be preserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
- * Eric Anholt <anholt@FreeBSD.org>
- * Leif Delgass <ldelgass@retinalburn.net>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "mach64_drm.h"
-#include "mach64_drv.h"
-
-irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS)
-{
- struct drm_device *dev = arg;
- drm_mach64_private_t *dev_priv = dev->dev_private;
- int status;
-
- status = MACH64_READ(MACH64_CRTC_INT_CNTL);
-
- /* VBLANK interrupt */
- if (status & MACH64_CRTC_VBLANK_INT) {
- /* Mask off all interrupt ack bits before setting the ack bit, since
- * there may be other handlers outside the DRM.
- *
- * NOTE: On mach64, you need to keep the enable bits set when doing
- * the ack, despite what the docs say about not acking and enabling
- * in a single write.
- */
- MACH64_WRITE(MACH64_CRTC_INT_CNTL,
- (status & ~MACH64_CRTC_INT_ACKS)
- | MACH64_CRTC_VBLANK_INT);
-
- atomic_inc(&dev_priv->vbl_received);
- drm_handle_vblank(dev, 0);
- return IRQ_HANDLED;
- }
- return IRQ_NONE;
-}
-
-u32 mach64_get_vblank_counter(struct drm_device * dev, int crtc)
-{
- const drm_mach64_private_t *const dev_priv = dev->dev_private;
-
- if (crtc != 0)
- return 0;
-
- return atomic_read(&dev_priv->vbl_received);
-}
-
-int mach64_enable_vblank(struct drm_device * dev, int crtc)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
-
- if (crtc != 0) {
- DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
- crtc);
- return -EINVAL;
- }
-
- DRM_DEBUG("before enable vblank CRTC_INT_CTNL: 0x%08x\n", status);
-
- /* Turn on VBLANK interrupt */
- MACH64_WRITE(MACH64_CRTC_INT_CNTL, MACH64_READ(MACH64_CRTC_INT_CNTL)
- | MACH64_CRTC_VBLANK_INT_EN);
-
- return 0;
-}
-
-void mach64_disable_vblank(struct drm_device * dev, int crtc)
-{
- if (crtc != 0) {
- DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
- crtc);
- return;
- }
-
- /*
- * FIXME: implement proper interrupt disable by using the vblank
- * counter register (if available).
- */
-}
-
-static void mach64_disable_vblank_local(struct drm_device * dev, int crtc)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
-
- if (crtc != 0) {
- DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
- crtc);
- return;
- }
-
- DRM_DEBUG("before disable vblank CRTC_INT_CTNL: 0x%08x\n", status);
-
- /* Disable and clear VBLANK interrupt */
- MACH64_WRITE(MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_VBLANK_INT_EN)
- | MACH64_CRTC_VBLANK_INT);
-}
-
-void mach64_driver_irq_preinstall(struct drm_device * dev)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
-
- u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
-
- DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status);
-
- mach64_disable_vblank_local(dev, 0);
-}
-
-int mach64_driver_irq_postinstall(struct drm_device * dev)
-{
- return 0;
-}
-
-void mach64_driver_irq_uninstall(struct drm_device * dev)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- if (!dev_priv)
- return;
-
- mach64_disable_vblank_local(dev, 0);
-
- DRM_DEBUG("after uninstall CRTC_INT_CTNL: 0x%08x\n",
- MACH64_READ(MACH64_CRTC_INT_CNTL));
-}
+++ /dev/null
-/* mach64_state.c -- State support for mach64 (Rage Pro) driver -*- linux-c -*-
- * Created: Sun Dec 03 19:20:26 2000 by gareth@valinux.com
- */
-/*
- * Copyright 2000 Gareth Hughes
- * Copyright 2002-2003 Leif Delgass
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- * Leif Delgass <ldelgass@retinalburn.net>
- * José Fonseca <j_r_fonseca@yahoo.co.uk>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "mach64_drm.h"
-#include "mach64_drv.h"
-
-/* Interface history:
- *
- * 1.0 - Initial mach64 DRM
- *
- */
-struct drm_ioctl_desc mach64_ioctls[] = {
- DRM_IOCTL_DEF(DRM_MACH64_INIT, mach64_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_MACH64_CLEAR, mach64_dma_clear, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MACH64_SWAP, mach64_dma_swap, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MACH64_IDLE, mach64_dma_idle, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MACH64_RESET, mach64_engine_reset, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MACH64_VERTEX, mach64_dma_vertex, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MACH64_BLIT, mach64_dma_blit, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MACH64_FLUSH, mach64_dma_flush, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MACH64_GETPARAM, mach64_get_param, DRM_AUTH),
-};
-
-int mach64_max_ioctl = DRM_ARRAY_SIZE(mach64_ioctls);
-
-/* ================================================================
- * DMA hardware state programming functions
- */
-
-static void mach64_print_dirty(const char *msg, unsigned int flags)
-{
- DRM_DEBUG("%s: (0x%x) %s%s%s%s%s%s%s%s%s%s%s%s\n",
- msg,
- flags,
- (flags & MACH64_UPLOAD_DST_OFF_PITCH) ? "dst_off_pitch, " :
- "",
- (flags & MACH64_UPLOAD_Z_ALPHA_CNTL) ? "z_alpha_cntl, " : "",
- (flags & MACH64_UPLOAD_SCALE_3D_CNTL) ? "scale_3d_cntl, " :
- "", (flags & MACH64_UPLOAD_DP_FOG_CLR) ? "dp_fog_clr, " : "",
- (flags & MACH64_UPLOAD_DP_WRITE_MASK) ? "dp_write_mask, " :
- "",
- (flags & MACH64_UPLOAD_DP_PIX_WIDTH) ? "dp_pix_width, " : "",
- (flags & MACH64_UPLOAD_SETUP_CNTL) ? "setup_cntl, " : "",
- (flags & MACH64_UPLOAD_MISC) ? "misc, " : "",
- (flags & MACH64_UPLOAD_TEXTURE) ? "texture, " : "",
- (flags & MACH64_UPLOAD_TEX0IMAGE) ? "tex0 image, " : "",
- (flags & MACH64_UPLOAD_TEX1IMAGE) ? "tex1 image, " : "",
- (flags & MACH64_UPLOAD_CLIPRECTS) ? "cliprects, " : "");
-}
-
-/* Mach64 doesn't have hardware cliprects, just one hardware scissor,
- * so the GL scissor is intersected with each cliprect here
- */
-/* This function returns 0 on success, 1 for no intersection, and
- * negative for an error
- */
-static int mach64_emit_cliprect(struct drm_file *file_priv,
- drm_mach64_private_t * dev_priv,
- struct drm_clip_rect * box)
-{
- u32 sc_left_right, sc_top_bottom;
- struct drm_clip_rect scissor;
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mach64_context_regs_t *regs = &sarea_priv->context_state;
- DMALOCALS;
-
- DRM_DEBUG("box=%p\n", box);
-
- /* Get GL scissor */
- /* FIXME: store scissor in SAREA as a cliprect instead of in
- * hardware format, or do intersection client-side
- */
- scissor.x1 = regs->sc_left_right & 0xffff;
- scissor.x2 = (regs->sc_left_right & 0xffff0000) >> 16;
- scissor.y1 = regs->sc_top_bottom & 0xffff;
- scissor.y2 = (regs->sc_top_bottom & 0xffff0000) >> 16;
-
- /* Intersect GL scissor with cliprect */
- if (box->x1 > scissor.x1)
- scissor.x1 = box->x1;
- if (box->y1 > scissor.y1)
- scissor.y1 = box->y1;
- if (box->x2 < scissor.x2)
- scissor.x2 = box->x2;
- if (box->y2 < scissor.y2)
- scissor.y2 = box->y2;
- /* positive return means skip */
- if (scissor.x1 >= scissor.x2)
- return 1;
- if (scissor.y1 >= scissor.y2)
- return 1;
-
- DMAGETPTR(file_priv, dev_priv, 2); /* returns on failure to get buffer */
-
- sc_left_right = ((scissor.x1 << 0) | (scissor.x2 << 16));
- sc_top_bottom = ((scissor.y1 << 0) | (scissor.y2 << 16));
-
- DMAOUTREG(MACH64_SC_LEFT_RIGHT, sc_left_right);
- DMAOUTREG(MACH64_SC_TOP_BOTTOM, sc_top_bottom);
-
- DMAADVANCE(dev_priv, 1);
-
- return 0;
-}
-
-static __inline__ int mach64_emit_state(struct drm_file *file_priv,
- drm_mach64_private_t * dev_priv)
-{
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mach64_context_regs_t *regs = &sarea_priv->context_state;
- unsigned int dirty = sarea_priv->dirty;
- u32 offset = ((regs->tex_size_pitch & 0xf0) >> 2);
- DMALOCALS;
-
- if (MACH64_VERBOSE) {
- mach64_print_dirty(__FUNCTION__, dirty);
- } else {
- DRM_DEBUG("dirty=0x%08x\n", dirty);
- }
-
- DMAGETPTR(file_priv, dev_priv, 17); /* returns on failure to get buffer */
-
- if (dirty & MACH64_UPLOAD_MISC) {
- DMAOUTREG(MACH64_DP_MIX, regs->dp_mix);
- DMAOUTREG(MACH64_DP_SRC, regs->dp_src);
- DMAOUTREG(MACH64_CLR_CMP_CNTL, regs->clr_cmp_cntl);
- DMAOUTREG(MACH64_GUI_TRAJ_CNTL, regs->gui_traj_cntl);
- sarea_priv->dirty &= ~MACH64_UPLOAD_MISC;
- }
-
- if (dirty & MACH64_UPLOAD_DST_OFF_PITCH) {
- DMAOUTREG(MACH64_DST_OFF_PITCH, regs->dst_off_pitch);
- sarea_priv->dirty &= ~MACH64_UPLOAD_DST_OFF_PITCH;
- }
- if (dirty & MACH64_UPLOAD_Z_OFF_PITCH) {
- DMAOUTREG(MACH64_Z_OFF_PITCH, regs->z_off_pitch);
- sarea_priv->dirty &= ~MACH64_UPLOAD_Z_OFF_PITCH;
- }
- if (dirty & MACH64_UPLOAD_Z_ALPHA_CNTL) {
- DMAOUTREG(MACH64_Z_CNTL, regs->z_cntl);
- DMAOUTREG(MACH64_ALPHA_TST_CNTL, regs->alpha_tst_cntl);
- sarea_priv->dirty &= ~MACH64_UPLOAD_Z_ALPHA_CNTL;
- }
- if (dirty & MACH64_UPLOAD_SCALE_3D_CNTL) {
- DMAOUTREG(MACH64_SCALE_3D_CNTL, regs->scale_3d_cntl);
- sarea_priv->dirty &= ~MACH64_UPLOAD_SCALE_3D_CNTL;
- }
- if (dirty & MACH64_UPLOAD_DP_FOG_CLR) {
- DMAOUTREG(MACH64_DP_FOG_CLR, regs->dp_fog_clr);
- sarea_priv->dirty &= ~MACH64_UPLOAD_DP_FOG_CLR;
- }
- if (dirty & MACH64_UPLOAD_DP_WRITE_MASK) {
- DMAOUTREG(MACH64_DP_WRITE_MASK, regs->dp_write_mask);
- sarea_priv->dirty &= ~MACH64_UPLOAD_DP_WRITE_MASK;
- }
- if (dirty & MACH64_UPLOAD_DP_PIX_WIDTH) {
- DMAOUTREG(MACH64_DP_PIX_WIDTH, regs->dp_pix_width);
- sarea_priv->dirty &= ~MACH64_UPLOAD_DP_PIX_WIDTH;
- }
- if (dirty & MACH64_UPLOAD_SETUP_CNTL) {
- DMAOUTREG(MACH64_SETUP_CNTL, regs->setup_cntl);
- sarea_priv->dirty &= ~MACH64_UPLOAD_SETUP_CNTL;
- }
-
- if (dirty & MACH64_UPLOAD_TEXTURE) {
- DMAOUTREG(MACH64_TEX_SIZE_PITCH, regs->tex_size_pitch);
- DMAOUTREG(MACH64_TEX_CNTL, regs->tex_cntl);
- DMAOUTREG(MACH64_SECONDARY_TEX_OFF, regs->secondary_tex_off);
- DMAOUTREG(MACH64_TEX_0_OFF + offset, regs->tex_offset);
- sarea_priv->dirty &= ~MACH64_UPLOAD_TEXTURE;
- }
-
- DMAADVANCE(dev_priv, 1);
-
- sarea_priv->dirty &= MACH64_UPLOAD_CLIPRECTS;
-
- return 0;
-
-}
-
-/* ================================================================
- * DMA command dispatch functions
- */
-
-static int mach64_dma_dispatch_clear(struct drm_device * dev,
- struct drm_file *file_priv,
- unsigned int flags,
- int cx, int cy, int cw, int ch,
- unsigned int clear_color,
- unsigned int clear_depth)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mach64_context_regs_t *ctx = &sarea_priv->context_state;
- int nbox = sarea_priv->nbox;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- u32 fb_bpp, depth_bpp;
- int i;
- DMALOCALS;
-
- DRM_DEBUG("\n");
-
- switch (dev_priv->fb_bpp) {
- case 16:
- fb_bpp = MACH64_DATATYPE_RGB565;
- break;
- case 32:
- fb_bpp = MACH64_DATATYPE_ARGB8888;
- break;
- default:
- return -EINVAL;
- }
- switch (dev_priv->depth_bpp) {
- case 16:
- depth_bpp = MACH64_DATATYPE_RGB565;
- break;
- case 24:
- case 32:
- depth_bpp = MACH64_DATATYPE_ARGB8888;
- break;
- default:
- return -EINVAL;
- }
-
- if (!nbox)
- return 0;
-
- DMAGETPTR(file_priv, dev_priv, nbox * 31); /* returns on failure to get buffer */
-
- for (i = 0; i < nbox; i++) {
- int x = pbox[i].x1;
- int y = pbox[i].y1;
- int w = pbox[i].x2 - x;
- int h = pbox[i].y2 - y;
-
- DRM_DEBUG("dispatch clear %d,%d-%d,%d flags 0x%x\n",
- pbox[i].x1, pbox[i].y1,
- pbox[i].x2, pbox[i].y2, flags);
-
- if (flags & (MACH64_FRONT | MACH64_BACK)) {
- /* Setup for color buffer clears
- */
-
- DMAOUTREG(MACH64_Z_CNTL, 0);
- DMAOUTREG(MACH64_SCALE_3D_CNTL, 0);
-
- DMAOUTREG(MACH64_SC_LEFT_RIGHT, ctx->sc_left_right);
- DMAOUTREG(MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom);
-
- DMAOUTREG(MACH64_CLR_CMP_CNTL, 0);
- DMAOUTREG(MACH64_GUI_TRAJ_CNTL,
- (MACH64_DST_X_LEFT_TO_RIGHT |
- MACH64_DST_Y_TOP_TO_BOTTOM));
-
- DMAOUTREG(MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) |
- (fb_bpp << 4) |
- (fb_bpp << 8) |
- (fb_bpp << 16) |
- (fb_bpp << 28)));
-
- DMAOUTREG(MACH64_DP_FRGD_CLR, clear_color);
- DMAOUTREG(MACH64_DP_WRITE_MASK, ctx->dp_write_mask);
- DMAOUTREG(MACH64_DP_MIX, (MACH64_BKGD_MIX_D |
- MACH64_FRGD_MIX_S));
- DMAOUTREG(MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR |
- MACH64_FRGD_SRC_FRGD_CLR |
- MACH64_MONO_SRC_ONE));
-
- }
-
- if (flags & MACH64_FRONT) {
-
- DMAOUTREG(MACH64_DST_OFF_PITCH,
- dev_priv->front_offset_pitch);
- DMAOUTREG(MACH64_DST_X_Y, (y << 16) | x);
- DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w);
-
- }
-
- if (flags & MACH64_BACK) {
-
- DMAOUTREG(MACH64_DST_OFF_PITCH,
- dev_priv->back_offset_pitch);
- DMAOUTREG(MACH64_DST_X_Y, (y << 16) | x);
- DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w);
-
- }
-
- if (flags & MACH64_DEPTH) {
- /* Setup for depth buffer clear
- */
- DMAOUTREG(MACH64_Z_CNTL, 0);
- DMAOUTREG(MACH64_SCALE_3D_CNTL, 0);
-
- DMAOUTREG(MACH64_SC_LEFT_RIGHT, ctx->sc_left_right);
- DMAOUTREG(MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom);
-
- DMAOUTREG(MACH64_CLR_CMP_CNTL, 0);
- DMAOUTREG(MACH64_GUI_TRAJ_CNTL,
- (MACH64_DST_X_LEFT_TO_RIGHT |
- MACH64_DST_Y_TOP_TO_BOTTOM));
-
- DMAOUTREG(MACH64_DP_PIX_WIDTH, ((depth_bpp << 0) |
- (depth_bpp << 4) |
- (depth_bpp << 8) |
- (depth_bpp << 16) |
- (depth_bpp << 28)));
-
- DMAOUTREG(MACH64_DP_FRGD_CLR, clear_depth);
- DMAOUTREG(MACH64_DP_WRITE_MASK, 0xffffffff);
- DMAOUTREG(MACH64_DP_MIX, (MACH64_BKGD_MIX_D |
- MACH64_FRGD_MIX_S));
- DMAOUTREG(MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR |
- MACH64_FRGD_SRC_FRGD_CLR |
- MACH64_MONO_SRC_ONE));
-
- DMAOUTREG(MACH64_DST_OFF_PITCH,
- dev_priv->depth_offset_pitch);
- DMAOUTREG(MACH64_DST_X_Y, (y << 16) | x);
- DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w);
- }
- }
-
- DMAADVANCE(dev_priv, 1);
-
- return 0;
-}
-
-static int mach64_dma_dispatch_swap(struct drm_device * dev,
- struct drm_file *file_priv)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int nbox = sarea_priv->nbox;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- u32 fb_bpp;
- int i;
- DMALOCALS;
-
- DRM_DEBUG("\n");
-
- switch (dev_priv->fb_bpp) {
- case 16:
- fb_bpp = MACH64_DATATYPE_RGB565;
- break;
- case 32:
- default:
- fb_bpp = MACH64_DATATYPE_ARGB8888;
- break;
- }
-
- if (!nbox)
- return 0;
-
- DMAGETPTR(file_priv, dev_priv, 13 + nbox * 4); /* returns on failure to get buffer */
-
- DMAOUTREG(MACH64_Z_CNTL, 0);
- DMAOUTREG(MACH64_SCALE_3D_CNTL, 0);
-
- DMAOUTREG(MACH64_SC_LEFT_RIGHT, 0 | (8191 << 16)); /* no scissor */
- DMAOUTREG(MACH64_SC_TOP_BOTTOM, 0 | (16383 << 16));
-
- DMAOUTREG(MACH64_CLR_CMP_CNTL, 0);
- DMAOUTREG(MACH64_GUI_TRAJ_CNTL, (MACH64_DST_X_LEFT_TO_RIGHT |
- MACH64_DST_Y_TOP_TO_BOTTOM));
-
- DMAOUTREG(MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) |
- (fb_bpp << 4) |
- (fb_bpp << 8) |
- (fb_bpp << 16) | (fb_bpp << 28)));
-
- DMAOUTREG(MACH64_DP_WRITE_MASK, 0xffffffff);
- DMAOUTREG(MACH64_DP_MIX, (MACH64_BKGD_MIX_D | MACH64_FRGD_MIX_S));
- DMAOUTREG(MACH64_DP_SRC, (MACH64_BKGD_SRC_BKGD_CLR |
- MACH64_FRGD_SRC_BLIT | MACH64_MONO_SRC_ONE));
-
- DMAOUTREG(MACH64_SRC_OFF_PITCH, dev_priv->back_offset_pitch);
- DMAOUTREG(MACH64_DST_OFF_PITCH, dev_priv->front_offset_pitch);
-
- for (i = 0; i < nbox; i++) {
- int x = pbox[i].x1;
- int y = pbox[i].y1;
- int w = pbox[i].x2 - x;
- int h = pbox[i].y2 - y;
-
- DRM_DEBUG("dispatch swap %d,%d-%d,%d\n",
- pbox[i].x1, pbox[i].y1, pbox[i].x2, pbox[i].y2);
-
- DMAOUTREG(MACH64_SRC_WIDTH1, w);
- DMAOUTREG(MACH64_SRC_Y_X, (x << 16) | y);
- DMAOUTREG(MACH64_DST_Y_X, (x << 16) | y);
- DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w);
-
- }
-
- DMAADVANCE(dev_priv, 1);
-
- if (dev_priv->driver_mode == MACH64_MODE_DMA_ASYNC) {
- for (i = 0; i < MACH64_MAX_QUEUED_FRAMES - 1; i++) {
- dev_priv->frame_ofs[i] = dev_priv->frame_ofs[i + 1];
- }
- dev_priv->frame_ofs[i] = GETRINGOFFSET();
-
- dev_priv->sarea_priv->frames_queued++;
- }
-
- return 0;
-}
-
-static int mach64_do_get_frames_queued(drm_mach64_private_t * dev_priv)
-{
- drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int i, start;
- u32 head, tail, ofs;
-
- DRM_DEBUG("\n");
-
- if (sarea_priv->frames_queued == 0)
- return 0;
-
- tail = ring->tail;
- mach64_ring_tick(dev_priv, ring);
- head = ring->head;
-
- start = (MACH64_MAX_QUEUED_FRAMES -
- DRM_MIN(MACH64_MAX_QUEUED_FRAMES, sarea_priv->frames_queued));
-
- if (head == tail) {
- sarea_priv->frames_queued = 0;
- for (i = start; i < MACH64_MAX_QUEUED_FRAMES; i++) {
- dev_priv->frame_ofs[i] = ~0;
- }
- return 0;
- }
-
- for (i = start; i < MACH64_MAX_QUEUED_FRAMES; i++) {
- ofs = dev_priv->frame_ofs[i];
- DRM_DEBUG("frame_ofs[%d] ofs: %d\n", i, ofs);
- if (ofs == ~0 ||
- (head < tail && (ofs < head || ofs >= tail)) ||
- (head > tail && (ofs < head && ofs >= tail))) {
- sarea_priv->frames_queued =
- (MACH64_MAX_QUEUED_FRAMES - 1) - i;
- dev_priv->frame_ofs[i] = ~0;
- }
- }
-
- return sarea_priv->frames_queued;
-}
-
-/* Copy and verify a client submited buffer.
- * FIXME: Make an assembly optimized version
- */
-static __inline__ int copy_from_user_vertex(u32 *to,
- const u32 __user *ufrom,
- unsigned long bytes)
-{
- unsigned long n = bytes; /* dwords remaining in buffer */
- u32 *from, *orig_from;
-
- from = drm_alloc(bytes, DRM_MEM_DRIVER);
- if (from == NULL)
- return -ENOMEM;
-
- if (DRM_COPY_FROM_USER(from, ufrom, bytes)) {
- drm_free(from, bytes, DRM_MEM_DRIVER);
- return -EFAULT;
- }
- orig_from = from; /* we'll be modifying the "from" ptr, so save it */
-
- n >>= 2;
-
- while (n > 1) {
- u32 data, reg, count;
-
- data = *from++;
-
- n--;
-
- reg = le32_to_cpu(data);
- count = (reg >> 16) + 1;
- if (count <= n) {
- n -= count;
- reg &= 0xffff;
-
- /* This is an exact match of Mach64's Setup Engine registers,
- * excluding SETUP_CNTL (1_C1).
- */
- if ((reg >= 0x0190 && reg < 0x01c1) ||
- (reg >= 0x01ca && reg <= 0x01cf)) {
- *to++ = data;
- memcpy(to, from, count << 2);
- from += count;
- to += count;
- } else {
- DRM_ERROR("Got bad command: 0x%04x\n", reg);
- drm_free(orig_from, bytes, DRM_MEM_DRIVER);
- return -EACCES;
- }
- } else {
- DRM_ERROR
- ("Got bad command count(=%u) dwords remaining=%lu\n",
- count, n);
- drm_free(orig_from, bytes, DRM_MEM_DRIVER);
- return -EINVAL;
- }
- }
-
- drm_free(orig_from, bytes, DRM_MEM_DRIVER);
- if (n == 0)
- return 0;
- else {
- DRM_ERROR("Bad buf->used(=%lu)\n", bytes);
- return -EINVAL;
- }
-}
-
-static int mach64_dma_dispatch_vertex(struct drm_device * dev,
- struct drm_file *file_priv,
- drm_mach64_vertex_t * vertex)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- struct drm_buf *copy_buf;
- void *buf = vertex->buf;
- unsigned long used = vertex->used;
- int ret = 0;
- int i = 0;
- int done = 0;
- int verify_ret = 0;
- DMALOCALS;
-
- DRM_DEBUG("buf=%p used=%lu nbox=%d\n",
- buf, used, sarea_priv->nbox);
-
- if (!used)
- goto _vertex_done;
-
- copy_buf = mach64_freelist_get(dev_priv);
- if (copy_buf == NULL) {
- DRM_ERROR("couldn't get buffer\n");
- return -EAGAIN;
- }
-
- /* Mach64's vertex data is actually register writes. To avoid security
- * compromises these register writes have to be verified and copied from
- * user space into a private DMA buffer.
- */
- verify_ret = copy_from_user_vertex(GETBUFPTR(copy_buf), buf, used);
-
- if (verify_ret != 0) {
- mach64_freelist_put(dev_priv, copy_buf);
- goto _vertex_done;
- }
-
- copy_buf->used = used;
-
- DMASETPTR(copy_buf);
-
- if (sarea_priv->dirty & ~MACH64_UPLOAD_CLIPRECTS) {
- ret = mach64_emit_state(file_priv, dev_priv);
- if (ret < 0)
- return ret;
- }
-
- do {
- /* Emit the next cliprect */
- if (i < sarea_priv->nbox) {
- ret = mach64_emit_cliprect(file_priv, dev_priv,
- &sarea_priv->boxes[i]);
- if (ret < 0) {
- /* failed to get buffer */
- return ret;
- } else if (ret != 0) {
- /* null intersection with scissor */
- continue;
- }
- }
- if ((i >= sarea_priv->nbox - 1))
- done = 1;
-
- /* Add the buffer to the DMA queue */
- DMAADVANCE(dev_priv, done);
-
- } while (++i < sarea_priv->nbox);
-
- if (!done) {
- if (copy_buf->pending) {
- DMADISCARDBUF();
- } else {
- /* This buffer wasn't used (no cliprects), so place it
- * back on the free list
- */
- mach64_freelist_put(dev_priv, copy_buf);
- }
- }
-
-_vertex_done:
- sarea_priv->dirty &= ~MACH64_UPLOAD_CLIPRECTS;
- sarea_priv->nbox = 0;
-
- return verify_ret;
-}
-
-static __inline__ int copy_from_user_blit(u32 *to,
- const u32 __user *ufrom,
- unsigned long bytes)
-{
- to = (u32 *)((char *)to + MACH64_HOSTDATA_BLIT_OFFSET);
-
- if (DRM_COPY_FROM_USER(to, ufrom, bytes)) {
- return -EFAULT;
- }
-
- return 0;
-}
-
-static int mach64_dma_dispatch_blit(struct drm_device * dev,
- struct drm_file *file_priv,
- drm_mach64_blit_t * blit)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- int dword_shift, dwords;
- unsigned long used;
- struct drm_buf *copy_buf;
- int verify_ret = 0;
- DMALOCALS;
-
- /* The compiler won't optimize away a division by a variable,
- * even if the only legal values are powers of two. Thus, we'll
- * use a shift instead.
- */
- switch (blit->format) {
- case MACH64_DATATYPE_ARGB8888:
- dword_shift = 0;
- break;
- case MACH64_DATATYPE_ARGB1555:
- case MACH64_DATATYPE_RGB565:
- case MACH64_DATATYPE_VYUY422:
- case MACH64_DATATYPE_YVYU422:
- case MACH64_DATATYPE_ARGB4444:
- dword_shift = 1;
- break;
- case MACH64_DATATYPE_CI8:
- case MACH64_DATATYPE_RGB8:
- dword_shift = 2;
- break;
- default:
- DRM_ERROR("invalid blit format %d\n", blit->format);
- return -EINVAL;
- }
-
- /* Set buf->used to the bytes of blit data based on the blit dimensions
- * and verify the size. When the setup is emitted to the buffer with
- * the DMA* macros below, buf->used is incremented to include the bytes
- * used for setup as well as the blit data.
- */
- dwords = (blit->width * blit->height) >> dword_shift;
- used = dwords << 2;
- if (used <= 0 ||
- used > MACH64_BUFFER_SIZE - MACH64_HOSTDATA_BLIT_OFFSET) {
- DRM_ERROR("Invalid blit size: %lu bytes\n", used);
- return -EINVAL;
- }
-
- copy_buf = mach64_freelist_get(dev_priv);
- if (copy_buf == NULL) {
- DRM_ERROR("couldn't get buffer\n");
- return -EAGAIN;
- }
-
- /* Copy the blit data from userspace.
- *
- * XXX: This is overkill. The most efficient solution would be having
- * two sets of buffers (one set private for vertex data, the other set
- * client-writable for blits). However that would bring more complexity
- * and would break backward compatability. The solution currently
- * implemented is keeping all buffers private, allowing to secure the
- * driver, without increasing complexity at the expense of some speed
- * transfering data.
- */
- verify_ret = copy_from_user_blit(GETBUFPTR(copy_buf), blit->buf, used);
-
- if (verify_ret != 0) {
- mach64_freelist_put(dev_priv, copy_buf);
- goto _blit_done;
- }
-
- copy_buf->used = used;
-
- /* FIXME: Use a last buffer flag and reduce the state emitted for subsequent,
- * continuation buffers?
- */
-
- /* Blit via BM_HOSTDATA (gui-master) - like HOST_DATA[0-15], but doesn't require
- * a register command every 16 dwords. State setup is added at the start of the
- * buffer -- the client leaves space for this based on MACH64_HOSTDATA_BLIT_OFFSET
- */
- DMASETPTR(copy_buf);
-
- DMAOUTREG(MACH64_Z_CNTL, 0);
- DMAOUTREG(MACH64_SCALE_3D_CNTL, 0);
-
- DMAOUTREG(MACH64_SC_LEFT_RIGHT, 0 | (8191 << 16)); /* no scissor */
- DMAOUTREG(MACH64_SC_TOP_BOTTOM, 0 | (16383 << 16));
-
- DMAOUTREG(MACH64_CLR_CMP_CNTL, 0); /* disable */
- DMAOUTREG(MACH64_GUI_TRAJ_CNTL,
- MACH64_DST_X_LEFT_TO_RIGHT | MACH64_DST_Y_TOP_TO_BOTTOM);
-
- DMAOUTREG(MACH64_DP_PIX_WIDTH, (blit->format << 0) /* dst pix width */
- |(blit->format << 4) /* composite pix width */
- |(blit->format << 8) /* src pix width */
- |(blit->format << 16) /* host data pix width */
- |(blit->format << 28) /* scaler/3D pix width */
- );
-
- DMAOUTREG(MACH64_DP_WRITE_MASK, 0xffffffff); /* enable all planes */
- DMAOUTREG(MACH64_DP_MIX, MACH64_BKGD_MIX_D | MACH64_FRGD_MIX_S);
- DMAOUTREG(MACH64_DP_SRC,
- MACH64_BKGD_SRC_BKGD_CLR
- | MACH64_FRGD_SRC_HOST | MACH64_MONO_SRC_ONE);
-
- DMAOUTREG(MACH64_DST_OFF_PITCH,
- (blit->pitch << 22) | (blit->offset >> 3));
- DMAOUTREG(MACH64_DST_X_Y, (blit->y << 16) | blit->x);
- DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (blit->height << 16) | blit->width);
-
- DRM_DEBUG("%lu bytes\n", used);
-
- /* Add the buffer to the queue */
- DMAADVANCEHOSTDATA(dev_priv);
-
-_blit_done:
- return verify_ret;
-}
-
-/* ================================================================
- * IOCTL functions
- */
-
-int mach64_dma_clear(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mach64_clear_t *clear = data;
- int ret;
-
- DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
-
- ret = mach64_dma_dispatch_clear(dev, file_priv, clear->flags,
- clear->x, clear->y, clear->w, clear->h,
- clear->clear_color,
- clear->clear_depth);
-
- /* Make sure we restore the 3D state next time.
- */
- sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | MACH64_UPLOAD_MISC);
- return ret;
-}
-
-int mach64_dma_swap(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int ret;
-
- DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
-
- ret = mach64_dma_dispatch_swap(dev, file_priv);
-
- /* Make sure we restore the 3D state next time.
- */
- sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | MACH64_UPLOAD_MISC);
- return ret;
-}
-
-int mach64_dma_vertex(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mach64_vertex_t *vertex = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("pid=%d buf=%p used=%lu discard=%d\n",
- DRM_CURRENTPID,
- vertex->buf, vertex->used, vertex->discard);
-
- if (vertex->prim < 0 || vertex->prim > MACH64_PRIM_POLYGON) {
- DRM_ERROR("buffer prim %d\n", vertex->prim);
- return -EINVAL;
- }
-
- if (vertex->used > MACH64_BUFFER_SIZE || (vertex->used & 3) != 0) {
- DRM_ERROR("Invalid vertex buffer size: %lu bytes\n",
- vertex->used);
- return -EINVAL;
- }
-
- if (sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
-
- return mach64_dma_dispatch_vertex(dev, file_priv, vertex);
-}
-
-int mach64_dma_blit(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mach64_blit_t *blit = data;
- int ret;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- ret = mach64_dma_dispatch_blit(dev, file_priv, blit);
-
- /* Make sure we restore the 3D state next time.
- */
- sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT |
- MACH64_UPLOAD_MISC | MACH64_UPLOAD_CLIPRECTS);
-
- return ret;
-}
-
-int mach64_get_param(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mach64_private_t *dev_priv = dev->dev_private;
- drm_mach64_getparam_t *param = data;
- int value;
-
- DRM_DEBUG("\n");
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- switch (param->param) {
- case MACH64_PARAM_FRAMES_QUEUED:
- /* Needs lock since it calls mach64_ring_tick() */
- LOCK_TEST_WITH_RETURN(dev, file_priv);
- value = mach64_do_get_frames_queued(dev_priv);
- break;
- case MACH64_PARAM_IRQ_NR:
- value = dev->irq;
- break;
- default:
- return -EINVAL;
- }
-
- if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
- DRM_ERROR("copy_to_user\n");
- return -EFAULT;
- }
-
- return 0;
-}
+++ /dev/null
-/* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
- * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
- */
-/* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-/**
- * \file mga_dma.c
- * DMA support for MGA G200 / G400.
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Jeff Hartmann <jhartmann@valinux.com>
- * \author Keith Whitwell <keith@tungstengraphics.com>
- * \author Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "drm_sarea.h"
-#include "mga_drm.h"
-#include "mga_drv.h"
-
-#define MGA_DEFAULT_USEC_TIMEOUT 10000
-#define MGA_FREELIST_DEBUG 0
-
-#define MINIMAL_CLEANUP 0
-#define FULL_CLEANUP 1
-static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup);
-
-/* ================================================================
- * Engine control
- */
-
-int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
-{
- u32 status = 0;
- int i;
- DRM_DEBUG("\n");
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
- if (status == MGA_ENDPRDMASTS) {
- MGA_WRITE8(MGA_CRTC_INDEX, 0);
- return 0;
- }
- DRM_UDELAY(1);
- }
-
-#if MGA_DMA_DEBUG
- DRM_ERROR("failed!\n");
- DRM_INFO(" status=0x%08x\n", status);
-#endif
- return -EBUSY;
-}
-
-static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_primary_buffer_t *primary = &dev_priv->prim;
-
- DRM_DEBUG("\n");
-
- /* The primary DMA stream should look like new right about now.
- */
- primary->tail = 0;
- primary->space = primary->size;
- primary->last_flush = 0;
-
- sarea_priv->last_wrap = 0;
-
- /* FIXME: Reset counters, buffer ages etc...
- */
-
- /* FIXME: What else do we need to reinitialize? WARP stuff?
- */
-
- return 0;
-}
-
-/* ================================================================
- * Primary DMA stream
- */
-
-void mga_do_dma_flush(drm_mga_private_t * dev_priv)
-{
- drm_mga_primary_buffer_t *primary = &dev_priv->prim;
- u32 head, tail;
- u32 status = 0;
- int i;
- DMA_LOCALS;
- DRM_DEBUG("\n");
-
- /* We need to wait so that we can do an safe flush */
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
- if (status == MGA_ENDPRDMASTS)
- break;
- DRM_UDELAY(1);
- }
-
- if (primary->tail == primary->last_flush) {
- DRM_DEBUG(" bailing out...\n");
- return;
- }
-
- tail = primary->tail + dev_priv->primary->offset;
-
- /* We need to pad the stream between flushes, as the card
- * actually (partially?) reads the first of these commands.
- * See page 4-16 in the G400 manual, middle of the page or so.
- */
- BEGIN_DMA(1);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
-
- ADVANCE_DMA();
-
- primary->last_flush = primary->tail;
-
- head = MGA_READ(MGA_PRIMADDRESS);
-
- if (head <= tail) {
- primary->space = primary->size - primary->tail;
- } else {
- primary->space = head - tail;
- }
-
- DRM_DEBUG(" head = 0x%06lx\n", head - dev_priv->primary->offset);
- DRM_DEBUG(" tail = 0x%06lx\n", tail - dev_priv->primary->offset);
- DRM_DEBUG(" space = 0x%06x\n", primary->space);
-
- mga_flush_write_combine();
- MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access);
-
- DRM_DEBUG("done.\n");
-}
-
-void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
-{
- drm_mga_primary_buffer_t *primary = &dev_priv->prim;
- u32 head, tail;
- DMA_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_DMA_WRAP();
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
-
- ADVANCE_DMA();
-
- tail = primary->tail + dev_priv->primary->offset;
-
- primary->tail = 0;
- primary->last_flush = 0;
- primary->last_wrap++;
-
- head = MGA_READ(MGA_PRIMADDRESS);
-
- if (head == dev_priv->primary->offset) {
- primary->space = primary->size;
- } else {
- primary->space = head - dev_priv->primary->offset;
- }
-
- DRM_DEBUG(" head = 0x%06lx\n", head - dev_priv->primary->offset);
- DRM_DEBUG(" tail = 0x%06x\n", primary->tail);
- DRM_DEBUG(" wrap = %d\n", primary->last_wrap);
- DRM_DEBUG(" space = 0x%06x\n", primary->space);
-
- mga_flush_write_combine();
- MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access);
-
- set_bit(0, &primary->wrapped);
- DRM_DEBUG("done.\n");
-}
-
-void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
-{
- drm_mga_primary_buffer_t *primary = &dev_priv->prim;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- u32 head = dev_priv->primary->offset;
- DRM_DEBUG("\n");
-
- sarea_priv->last_wrap++;
- DRM_DEBUG(" wrap = %d\n", sarea_priv->last_wrap);
-
- mga_flush_write_combine();
- MGA_WRITE(MGA_PRIMADDRESS, head | MGA_DMA_GENERAL);
-
- clear_bit(0, &primary->wrapped);
- DRM_DEBUG("done.\n");
-}
-
-/* ================================================================
- * Freelist management
- */
-
-#define MGA_BUFFER_USED ~0
-#define MGA_BUFFER_FREE 0
-
-#if MGA_FREELIST_DEBUG
-static void mga_freelist_print(struct drm_device * dev)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_freelist_t *entry;
-
- DRM_INFO("\n");
- DRM_INFO("current dispatch: last=0x%x done=0x%x\n",
- dev_priv->sarea_priv->last_dispatch,
- (unsigned int)(MGA_READ(MGA_PRIMADDRESS) -
- dev_priv->primary->offset));
- DRM_INFO("current freelist:\n");
-
- for (entry = dev_priv->head->next; entry; entry = entry->next) {
- DRM_INFO(" %p idx=%2d age=0x%x 0x%06lx\n",
- entry, entry->buf->idx, entry->age.head,
- entry->age.head - dev_priv->primary->offset);
- }
- DRM_INFO("\n");
-}
-#endif
-
-static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_mga_buf_priv_t *buf_priv;
- drm_mga_freelist_t *entry;
- int i;
- DRM_DEBUG("count=%d\n", dma->buf_count);
-
- dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
- if (dev_priv->head == NULL)
- return -ENOMEM;
-
- memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t));
- SET_AGE(&dev_priv->head->age, MGA_BUFFER_USED, 0);
-
- for (i = 0; i < dma->buf_count; i++) {
- buf = dma->buflist[i];
- buf_priv = buf->dev_private;
-
- entry = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
- if (entry == NULL)
- return -ENOMEM;
-
- memset(entry, 0, sizeof(drm_mga_freelist_t));
-
- entry->next = dev_priv->head->next;
- entry->prev = dev_priv->head;
- SET_AGE(&entry->age, MGA_BUFFER_FREE, 0);
- entry->buf = buf;
-
- if (dev_priv->head->next != NULL)
- dev_priv->head->next->prev = entry;
- if (entry->next == NULL)
- dev_priv->tail = entry;
-
- buf_priv->list_entry = entry;
- buf_priv->discard = 0;
- buf_priv->dispatched = 0;
-
- dev_priv->head->next = entry;
- }
-
- return 0;
-}
-
-static void mga_freelist_cleanup(struct drm_device * dev)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_freelist_t *entry;
- drm_mga_freelist_t *next;
- DRM_DEBUG("\n");
-
- entry = dev_priv->head;
- while (entry) {
- next = entry->next;
- drm_free(entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
- entry = next;
- }
-
- dev_priv->head = dev_priv->tail = NULL;
-}
-
-#if 0
-/* FIXME: Still needed?
- */
-static void mga_freelist_reset(struct drm_device * dev)
-{
- drm_device_dma_t *dma = dev->dma;
- struct drm_buf *buf;
- drm_mga_buf_priv_t *buf_priv;
- int i;
-
- for (i = 0; i < dma->buf_count; i++) {
- buf = dma->buflist[i];
- buf_priv = buf->dev_private;
- SET_AGE(&buf_priv->list_entry->age, MGA_BUFFER_FREE, 0);
- }
-}
-#endif
-
-static struct drm_buf *mga_freelist_get(struct drm_device * dev)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_freelist_t *next;
- drm_mga_freelist_t *prev;
- drm_mga_freelist_t *tail = dev_priv->tail;
- u32 head, wrap;
- DRM_DEBUG("\n");
-
- head = MGA_READ(MGA_PRIMADDRESS);
- wrap = dev_priv->sarea_priv->last_wrap;
-
- DRM_DEBUG(" tail=0x%06lx %d\n",
- tail->age.head ?
- tail->age.head - dev_priv->primary->offset : 0,
- tail->age.wrap);
- DRM_DEBUG(" head=0x%06lx %d\n",
- head - dev_priv->primary->offset, wrap);
-
- if (TEST_AGE(&tail->age, head, wrap)) {
- prev = dev_priv->tail->prev;
- next = dev_priv->tail;
- prev->next = NULL;
- next->prev = next->next = NULL;
- dev_priv->tail = prev;
- SET_AGE(&next->age, MGA_BUFFER_USED, 0);
- return next->buf;
- }
-
- DRM_DEBUG("returning NULL!\n");
- return NULL;
-}
-
-int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_buf_priv_t *buf_priv = buf->dev_private;
- drm_mga_freelist_t *head, *entry, *prev;
-
- DRM_DEBUG("age=0x%06lx wrap=%d\n",
- buf_priv->list_entry->age.head -
- dev_priv->primary->offset, buf_priv->list_entry->age.wrap);
-
- entry = buf_priv->list_entry;
- head = dev_priv->head;
-
- if (buf_priv->list_entry->age.head == MGA_BUFFER_USED) {
- SET_AGE(&entry->age, MGA_BUFFER_FREE, 0);
- prev = dev_priv->tail;
- prev->next = entry;
- entry->prev = prev;
- entry->next = NULL;
- } else {
- prev = head->next;
- head->next = entry;
- prev->prev = entry;
- entry->prev = head;
- entry->next = prev;
- }
-
- return 0;
-}
-
-/* ================================================================
- * DMA initialization, cleanup
- */
-
-int mga_driver_load(struct drm_device *dev, unsigned long flags)
-{
- drm_mga_private_t *dev_priv;
- int ret;
-
- dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
- if (!dev_priv)
- return -ENOMEM;
-
- dev->dev_private = (void *)dev_priv;
- memset(dev_priv, 0, sizeof(drm_mga_private_t));
-
- dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
- dev_priv->chipset = flags;
-
- dev_priv->mmio_base = drm_get_resource_start(dev, 1);
- dev_priv->mmio_size = drm_get_resource_len(dev, 1);
-
- dev->counters += 3;
- dev->types[6] = _DRM_STAT_IRQ;
- dev->types[7] = _DRM_STAT_PRIMARY;
- dev->types[8] = _DRM_STAT_SECONDARY;
-
- ret = drm_vblank_init(dev, 1);
-
- if (ret) {
- (void) mga_driver_unload(dev);
- return ret;
- }
-
- return 0;
-}
-
-/**
- * Bootstrap the driver for AGP DMA.
- *
- * \todo
- * Investigate whether there is any benifit to storing the WARP microcode in
- * AGP memory. If not, the microcode may as well always be put in PCI
- * memory.
- *
- * \todo
- * This routine needs to set dma_bs->agp_mode to the mode actually configured
- * in the hardware. Looking just at the Linux AGP driver code, I don't see
- * an easy way to determine this.
- *
- * \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap
- */
-static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
- drm_mga_dma_bootstrap_t * dma_bs)
-{
- drm_mga_private_t *const dev_priv =
- (drm_mga_private_t *)dev->dev_private;
- unsigned int warp_size = mga_warp_microcode_size(dev_priv);
- int err;
- unsigned offset;
- const unsigned secondary_size = dma_bs->secondary_bin_count
- * dma_bs->secondary_bin_size;
- const unsigned agp_size = (dma_bs->agp_size << 20);
- struct drm_buf_desc req;
- struct drm_agp_mode mode;
- struct drm_agp_info info;
- struct drm_agp_buffer agp_req;
- struct drm_agp_binding bind_req;
-
- /* Acquire AGP. */
- err = drm_agp_acquire(dev);
- if (err) {
- DRM_ERROR("Unable to acquire AGP: %d\n", err);
- return err;
- }
-
- err = drm_agp_info(dev, &info);
- if (err) {
- DRM_ERROR("Unable to get AGP info: %d\n", err);
- return err;
- }
-
- mode.mode = (info.mode & ~0x07) | dma_bs->agp_mode;
- err = drm_agp_enable(dev, mode);
- if (err) {
- DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);
- return err;
- }
-
- /* In addition to the usual AGP mode configuration, the G200 AGP cards
- * need to have the AGP mode "manually" set.
- */
-
- if (dev_priv->chipset == MGA_CARD_TYPE_G200) {
- if (mode.mode & 0x02) {
- MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE);
- } else {
- MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE);
- }
- }
-
- /* Allocate and bind AGP memory. */
- agp_req.size = agp_size;
- agp_req.type = 0;
- err = drm_agp_alloc(dev, &agp_req);
- if (err) {
- dev_priv->agp_size = 0;
- DRM_ERROR("Unable to allocate %uMB AGP memory\n",
- dma_bs->agp_size);
- return err;
- }
-
- dev_priv->agp_size = agp_size;
- dev_priv->agp_handle = agp_req.handle;
-
- bind_req.handle = agp_req.handle;
- bind_req.offset = 0;
- err = drm_agp_bind( dev, &bind_req );
- if (err) {
- DRM_ERROR("Unable to bind AGP memory: %d\n", err);
- return err;
- }
-
- /* Make drm_addbufs happy by not trying to create a mapping for less
- * than a page.
- */
- if (warp_size < PAGE_SIZE)
- warp_size = PAGE_SIZE;
-
- offset = 0;
- err = drm_addmap(dev, offset, warp_size,
- _DRM_AGP, _DRM_READ_ONLY, &dev_priv->warp);
- if (err) {
- DRM_ERROR("Unable to map WARP microcode: %d\n", err);
- return err;
- }
-
- offset += warp_size;
- err = drm_addmap(dev, offset, dma_bs->primary_size,
- _DRM_AGP, _DRM_READ_ONLY, & dev_priv->primary);
- if (err) {
- DRM_ERROR("Unable to map primary DMA region: %d\n", err);
- return err;
- }
-
- offset += dma_bs->primary_size;
- err = drm_addmap(dev, offset, secondary_size,
- _DRM_AGP, 0, & dev->agp_buffer_map);
- if (err) {
- DRM_ERROR("Unable to map secondary DMA region: %d\n", err);
- return err;
- }
-
- (void)memset( &req, 0, sizeof(req) );
- req.count = dma_bs->secondary_bin_count;
- req.size = dma_bs->secondary_bin_size;
- req.flags = _DRM_AGP_BUFFER;
- req.agp_start = offset;
-
- err = drm_addbufs_agp(dev, &req);
- if (err) {
- DRM_ERROR("Unable to add secondary DMA buffers: %d\n", err);
- return err;
- }
-
-#ifdef __linux__
- {
- struct drm_map_list *_entry;
- unsigned long agp_token = 0;
-
- list_for_each_entry(_entry, &dev->maplist, head) {
- if (_entry->map == dev->agp_buffer_map)
- agp_token = _entry->user_token;
- }
- if (!agp_token)
- return -EFAULT;
-
- dev->agp_buffer_token = agp_token;
- }
-#endif
-
- offset += secondary_size;
- err = drm_addmap(dev, offset, agp_size - offset,
- _DRM_AGP, 0, & dev_priv->agp_textures);
- if (err) {
- DRM_ERROR("Unable to map AGP texture region: %d\n", err);
- return err;
- }
-
- drm_core_ioremap(dev_priv->warp, dev);
- drm_core_ioremap(dev_priv->primary, dev);
- drm_core_ioremap(dev->agp_buffer_map, dev);
-
- if (!dev_priv->warp->handle ||
- !dev_priv->primary->handle || !dev->agp_buffer_map->handle) {
- DRM_ERROR("failed to ioremap agp regions! (%p, %p, %p)\n",
- dev_priv->warp->handle, dev_priv->primary->handle,
- dev->agp_buffer_map->handle);
- return -ENOMEM;
- }
-
- dev_priv->dma_access = MGA_PAGPXFER;
- dev_priv->wagp_enable = MGA_WAGP_ENABLE;
-
- DRM_INFO("Initialized card for AGP DMA.\n");
- return 0;
-}
-
-/**
- * Bootstrap the driver for PCI DMA.
- *
- * \todo
- * The algorithm for decreasing the size of the primary DMA buffer could be
- * better. The size should be rounded up to the nearest page size, then
- * decrease the request size by a single page each pass through the loop.
- *
- * \todo
- * Determine whether the maximum address passed to drm_pci_alloc is correct.
- * The same goes for drm_addbufs_pci.
- *
- * \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap
- */
-static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
- drm_mga_dma_bootstrap_t * dma_bs)
-{
- drm_mga_private_t *const dev_priv =
- (drm_mga_private_t *) dev->dev_private;
- unsigned int warp_size = mga_warp_microcode_size(dev_priv);
- unsigned int primary_size;
- unsigned int bin_count;
- int err;
- struct drm_buf_desc req;
-
-
- if (dev->dma == NULL) {
- DRM_ERROR("dev->dma is NULL\n");
- return -EFAULT;
- }
-
- /* Make drm_addbufs happy by not trying to create a mapping for less
- * than a page.
- */
- if (warp_size < PAGE_SIZE)
- warp_size = PAGE_SIZE;
-
- /* The proper alignment is 0x100 for this mapping */
- err = drm_addmap(dev, 0, warp_size, _DRM_CONSISTENT,
- _DRM_READ_ONLY, &dev_priv->warp);
- if (err != 0) {
- DRM_ERROR("Unable to create mapping for WARP microcode: %d\n",
- err);
- return err;
- }
-
- /* Other than the bottom two bits being used to encode other
- * information, there don't appear to be any restrictions on the
- * alignment of the primary or secondary DMA buffers.
- */
-
- for (primary_size = dma_bs->primary_size; primary_size != 0;
- primary_size >>= 1 ) {
- /* The proper alignment for this mapping is 0x04 */
- err = drm_addmap(dev, 0, primary_size, _DRM_CONSISTENT,
- _DRM_READ_ONLY, &dev_priv->primary);
- if (!err)
- break;
- }
-
- if (err != 0) {
- DRM_ERROR("Unable to allocate primary DMA region: %d\n", err);
- return -ENOMEM;
- }
-
- if (dev_priv->primary->size != dma_bs->primary_size) {
- DRM_INFO("Primary DMA buffer size reduced from %u to %u.\n",
- dma_bs->primary_size,
- (unsigned)dev_priv->primary->size);
- dma_bs->primary_size = dev_priv->primary->size;
- }
-
- for (bin_count = dma_bs->secondary_bin_count; bin_count > 0;
- bin_count-- ) {
- (void)memset(&req, 0, sizeof(req));
- req.count = bin_count;
- req.size = dma_bs->secondary_bin_size;
-
- err = drm_addbufs_pci(dev, &req);
- if (!err) {
- break;
- }
- }
-
- if (bin_count == 0) {
- DRM_ERROR("Unable to add secondary DMA buffers: %d\n", err);
- return err;
- }
-
- if (bin_count != dma_bs->secondary_bin_count) {
- DRM_INFO("Secondary PCI DMA buffer bin count reduced from %u "
- "to %u.\n", dma_bs->secondary_bin_count, bin_count);
-
- dma_bs->secondary_bin_count = bin_count;
- }
-
- dev_priv->dma_access = 0;
- dev_priv->wagp_enable = 0;
-
- dma_bs->agp_mode = 0;
-
- DRM_INFO("Initialized card for PCI DMA.\n");
- return 0;
-}
-
-
-static int mga_do_dma_bootstrap(struct drm_device *dev,
- drm_mga_dma_bootstrap_t *dma_bs)
-{
- const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev);
- int err;
- drm_mga_private_t *const dev_priv =
- (drm_mga_private_t *) dev->dev_private;
-
-
- dev_priv->used_new_dma_init = 1;
-
- /* The first steps are the same for both PCI and AGP based DMA. Map
- * the cards MMIO registers and map a status page.
- */
- err = drm_addmap(dev, dev_priv->mmio_base, dev_priv->mmio_size,
- _DRM_REGISTERS, _DRM_READ_ONLY, & dev_priv->mmio);
- if (err) {
- DRM_ERROR("Unable to map MMIO region: %d\n", err);
- return err;
- }
-
-
- err = drm_addmap(dev, 0, SAREA_MAX, _DRM_SHM,
- _DRM_READ_ONLY | _DRM_LOCKED | _DRM_KERNEL,
- & dev_priv->status);
- if (err) {
- DRM_ERROR("Unable to map status region: %d\n", err);
- return err;
- }
-
-
- /* The DMA initialization procedure is slightly different for PCI and
- * AGP cards. AGP cards just allocate a large block of AGP memory and
- * carve off portions of it for internal uses. The remaining memory
- * is returned to user-mode to be used for AGP textures.
- */
-
- if (is_agp) {
- err = mga_do_agp_dma_bootstrap(dev, dma_bs);
- }
-
- /* If we attempted to initialize the card for AGP DMA but failed,
- * clean-up any mess that may have been created.
- */
-
- if (err) {
- mga_do_cleanup_dma(dev, MINIMAL_CLEANUP);
- }
-
-
- /* Not only do we want to try and initialized PCI cards for PCI DMA,
- * but we also try to initialized AGP cards that could not be
- * initialized for AGP DMA. This covers the case where we have an AGP
- * card in a system with an unsupported AGP chipset. In that case the
- * card will be detected as AGP, but we won't be able to allocate any
- * AGP memory, etc.
- */
-
- if (!is_agp || err) {
- err = mga_do_pci_dma_bootstrap(dev, dma_bs);
- }
-
-
- return err;
-}
-
-int mga_dma_bootstrap(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mga_dma_bootstrap_t *bootstrap = data;
- int err;
- static const int modes[] = { 0, 1, 2, 2, 4, 4, 4, 4 };
- const drm_mga_private_t *const dev_priv =
- (drm_mga_private_t *) dev->dev_private;
-
-
- err = mga_do_dma_bootstrap(dev, bootstrap);
- if (err) {
- mga_do_cleanup_dma(dev, FULL_CLEANUP);
- return err;
- }
-
- if (dev_priv->agp_textures != NULL) {
- bootstrap->texture_handle = dev_priv->agp_textures->offset;
- bootstrap->texture_size = dev_priv->agp_textures->size;
- } else {
- bootstrap->texture_handle = 0;
- bootstrap->texture_size = 0;
- }
-
- bootstrap->agp_mode = modes[bootstrap->agp_mode & 0x07];
-
- return 0;
-}
-
-
-static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init)
-{
- drm_mga_private_t *dev_priv;
- int ret;
- DRM_DEBUG("\n");
-
-
- dev_priv = dev->dev_private;
-
- if (init->sgram) {
- dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
- } else {
- dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
- }
- dev_priv->maccess = init->maccess;
-
- dev_priv->fb_cpp = init->fb_cpp;
- dev_priv->front_offset = init->front_offset;
- dev_priv->front_pitch = init->front_pitch;
- dev_priv->back_offset = init->back_offset;
- dev_priv->back_pitch = init->back_pitch;
-
- dev_priv->depth_cpp = init->depth_cpp;
- dev_priv->depth_offset = init->depth_offset;
- dev_priv->depth_pitch = init->depth_pitch;
-
- /* FIXME: Need to support AGP textures...
- */
- dev_priv->texture_offset = init->texture_offset[0];
- dev_priv->texture_size = init->texture_size[0];
-
- dev_priv->sarea = drm_getsarea(dev);
- if (!dev_priv->sarea) {
- DRM_ERROR("failed to find sarea!\n");
- return -EINVAL;
- }
-
- if (!dev_priv->used_new_dma_init) {
-
- dev_priv->dma_access = MGA_PAGPXFER;
- dev_priv->wagp_enable = MGA_WAGP_ENABLE;
-
- dev_priv->status = drm_core_findmap(dev, init->status_offset);
- if (!dev_priv->status) {
- DRM_ERROR("failed to find status page!\n");
- return -EINVAL;
- }
- dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
- if (!dev_priv->mmio) {
- DRM_ERROR("failed to find mmio region!\n");
- return -EINVAL;
- }
- dev_priv->warp = drm_core_findmap(dev, init->warp_offset);
- if (!dev_priv->warp) {
- DRM_ERROR("failed to find warp microcode region!\n");
- return -EINVAL;
- }
- dev_priv->primary = drm_core_findmap(dev, init->primary_offset);
- if (!dev_priv->primary) {
- DRM_ERROR("failed to find primary dma region!\n");
- return -EINVAL;
- }
- dev->agp_buffer_token = init->buffers_offset;
- dev->agp_buffer_map =
- drm_core_findmap(dev, init->buffers_offset);
- if (!dev->agp_buffer_map) {
- DRM_ERROR("failed to find dma buffer region!\n");
- return -EINVAL;
- }
-
- drm_core_ioremap(dev_priv->warp, dev);
- drm_core_ioremap(dev_priv->primary, dev);
- drm_core_ioremap(dev->agp_buffer_map, dev);
- }
-
- dev_priv->sarea_priv =
- (drm_mga_sarea_t *) ((u8 *) dev_priv->sarea->handle +
- init->sarea_priv_offset);
-
- if (!dev_priv->warp->handle ||
- !dev_priv->primary->handle ||
- ((dev_priv->dma_access != 0) &&
- ((dev->agp_buffer_map == NULL) ||
- (dev->agp_buffer_map->handle == NULL)))) {
- DRM_ERROR("failed to ioremap agp regions!\n");
- return -ENOMEM;
- }
-
- ret = mga_warp_install_microcode(dev_priv);
- if (ret != 0) {
- DRM_ERROR("failed to install WARP ucode: %d!\n", ret);
- return ret;
- }
-
- ret = mga_warp_init(dev_priv);
- if (ret != 0) {
- DRM_ERROR("failed to init WARP engine: %d!\n", ret);
- return ret;
- }
-
- dev_priv->prim.status = (u32 *) dev_priv->status->handle;
-
- mga_do_wait_for_idle(dev_priv);
-
- /* Init the primary DMA registers.
- */
- MGA_WRITE(MGA_PRIMADDRESS, dev_priv->primary->offset | MGA_DMA_GENERAL);
-
- dev_priv->prim.start = (u8 *) dev_priv->primary->handle;
- dev_priv->prim.end = ((u8 *) dev_priv->primary->handle
- + dev_priv->primary->size);
- dev_priv->prim.size = dev_priv->primary->size;
-
- dev_priv->prim.tail = 0;
- dev_priv->prim.space = dev_priv->prim.size;
- dev_priv->prim.wrapped = 0;
-
- dev_priv->prim.last_flush = 0;
- dev_priv->prim.last_wrap = 0;
-
- dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE;
-
- dev_priv->prim.status[0] = dev_priv->primary->offset;
- dev_priv->prim.status[1] = 0;
-
- dev_priv->sarea_priv->last_wrap = 0;
- dev_priv->sarea_priv->last_frame.head = 0;
- dev_priv->sarea_priv->last_frame.wrap = 0;
-
- if (mga_freelist_init(dev, dev_priv) < 0) {
- DRM_ERROR("could not initialize freelist\n");
- return -ENOMEM;
- }
-
- return 0;
-}
-
-static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
-{
- int err = 0;
- DRM_DEBUG("\n");
-
- /* Make sure interrupts are disabled here because the uninstall ioctl
- * may not have been called from userspace and after dev_private
- * is freed, it's too late.
- */
- if (dev->irq_enabled)
- drm_irq_uninstall(dev);
-
- if (dev->dev_private) {
- drm_mga_private_t *dev_priv = dev->dev_private;
-
- if ((dev_priv->warp != NULL)
- && (dev_priv->warp->type != _DRM_CONSISTENT))
- drm_core_ioremapfree(dev_priv->warp, dev);
-
- if ((dev_priv->primary != NULL)
- && (dev_priv->primary->type != _DRM_CONSISTENT))
- drm_core_ioremapfree(dev_priv->primary, dev);
-
- if (dev->agp_buffer_map != NULL)
- drm_core_ioremapfree(dev->agp_buffer_map, dev);
-
- if (dev_priv->used_new_dma_init) {
- if (dev_priv->agp_handle != 0) {
- struct drm_agp_binding unbind_req;
- struct drm_agp_buffer free_req;
-
- unbind_req.handle = dev_priv->agp_handle;
- drm_agp_unbind(dev, &unbind_req);
-
- free_req.handle = dev_priv->agp_handle;
- drm_agp_free(dev, &free_req);
-
- dev_priv->agp_textures = NULL;
- dev_priv->agp_size = 0;
- dev_priv->agp_handle = 0;
- }
-
- if ((dev->agp != NULL) && dev->agp->acquired) {
- err = drm_agp_release(dev);
- }
- }
-
- dev_priv->warp = NULL;
- dev_priv->primary = NULL;
- dev_priv->sarea = NULL;
- dev_priv->sarea_priv = NULL;
- dev->agp_buffer_map = NULL;
-
- if (full_cleanup) {
- dev_priv->mmio = NULL;
- dev_priv->status = NULL;
- dev_priv->used_new_dma_init = 0;
- }
-
- memset(&dev_priv->prim, 0, sizeof(dev_priv->prim));
- dev_priv->warp_pipe = 0;
- memset(dev_priv->warp_pipe_phys, 0,
- sizeof(dev_priv->warp_pipe_phys));
-
- if (dev_priv->head != NULL) {
- mga_freelist_cleanup(dev);
- }
- }
-
- return err;
-}
-
-int mga_dma_init(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mga_init_t *init = data;
- int err;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- switch (init->func) {
- case MGA_INIT_DMA:
- err = mga_do_init_dma(dev, init);
- if (err) {
- (void)mga_do_cleanup_dma(dev, FULL_CLEANUP);
- }
- return err;
- case MGA_CLEANUP_DMA:
- return mga_do_cleanup_dma(dev, FULL_CLEANUP);
- }
-
- return -EINVAL;
-}
-
-/* ================================================================
- * Primary DMA stream management
- */
-
-int mga_dma_flush(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
- struct drm_lock *lock = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- DRM_DEBUG("%s%s%s\n",
- (lock->flags & _DRM_LOCK_FLUSH) ? "flush, " : "",
- (lock->flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "",
- (lock->flags & _DRM_LOCK_QUIESCENT) ? "idle, " : "");
-
- WRAP_WAIT_WITH_RETURN(dev_priv);
-
- if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL)) {
- mga_do_dma_flush(dev_priv);
- }
-
- if (lock->flags & _DRM_LOCK_QUIESCENT) {
-#if MGA_DMA_DEBUG
- int ret = mga_do_wait_for_idle(dev_priv);
- if (ret < 0)
- DRM_INFO("-EBUSY\n");
- return ret;
-#else
- return mga_do_wait_for_idle(dev_priv);
-#endif
- } else {
- return 0;
- }
-}
-
-int mga_dma_reset(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- return mga_do_dma_reset(dev_priv);
-}
-
-/* ================================================================
- * DMA buffer management
- */
-
-static int mga_dma_get_buffers(struct drm_device * dev,
- struct drm_file *file_priv, struct drm_dma * d)
-{
- struct drm_buf *buf;
- int i;
-
- for (i = d->granted_count; i < d->request_count; i++) {
- buf = mga_freelist_get(dev);
- if (!buf)
- return -EAGAIN;
-
- buf->file_priv = file_priv;
-
- if (DRM_COPY_TO_USER(&d->request_indices[i],
- &buf->idx, sizeof(buf->idx)))
- return -EFAULT;
- if (DRM_COPY_TO_USER(&d->request_sizes[i],
- &buf->total, sizeof(buf->total)))
- return -EFAULT;
-
- d->granted_count++;
- }
- return 0;
-}
-
-int mga_dma_buffers(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
- struct drm_dma *d = data;
- int ret = 0;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- /* Please don't send us buffers.
- */
- if (d->send_count != 0) {
- DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
- DRM_CURRENTPID, d->send_count);
- return -EINVAL;
- }
-
- /* We'll send you buffers.
- */
- if (d->request_count < 0 || d->request_count > dma->buf_count) {
- DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
- DRM_CURRENTPID, d->request_count, dma->buf_count);
- return -EINVAL;
- }
-
- WRAP_TEST_WITH_RETURN(dev_priv);
-
- d->granted_count = 0;
-
- if (d->request_count) {
- ret = mga_dma_get_buffers(dev, file_priv, d);
- }
-
- return ret;
-}
-
-/**
- * Called just before the module is unloaded.
- */
-int mga_driver_unload(struct drm_device * dev)
-{
- drm_free(dev->dev_private, sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
- dev->dev_private = NULL;
-
- return 0;
-}
-
-/**
- * Called when the last opener of the device is closed.
- */
-void mga_driver_lastclose(struct drm_device * dev)
-{
- mga_do_cleanup_dma(dev, FULL_CLEANUP);
-}
-
-int mga_driver_dma_quiescent(struct drm_device * dev)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- return mga_do_wait_for_idle(dev_priv);
-}
+++ /dev/null
-/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
- * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Jeff Hartmann <jhartmann@valinux.com>
- * Keith Whitwell <keith@tungstengraphics.com>
- *
- * Rewritten by:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __MGA_DRM_H__
-#define __MGA_DRM_H__
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (mga_sarea.h)
- */
-
-#ifndef __MGA_SAREA_DEFINES__
-#define __MGA_SAREA_DEFINES__
-
-/* WARP pipe flags
- */
-#define MGA_F 0x1 /* fog */
-#define MGA_A 0x2 /* alpha */
-#define MGA_S 0x4 /* specular */
-#define MGA_T2 0x8 /* multitexture */
-
-#define MGA_WARP_TGZ 0
-#define MGA_WARP_TGZF (MGA_F)
-#define MGA_WARP_TGZA (MGA_A)
-#define MGA_WARP_TGZAF (MGA_F|MGA_A)
-#define MGA_WARP_TGZS (MGA_S)
-#define MGA_WARP_TGZSF (MGA_S|MGA_F)
-#define MGA_WARP_TGZSA (MGA_S|MGA_A)
-#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A)
-#define MGA_WARP_T2GZ (MGA_T2)
-#define MGA_WARP_T2GZF (MGA_T2|MGA_F)
-#define MGA_WARP_T2GZA (MGA_T2|MGA_A)
-#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F)
-#define MGA_WARP_T2GZS (MGA_T2|MGA_S)
-#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F)
-#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
-#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
-
-#define MGA_MAX_G200_PIPES 8 /* no multitex */
-#define MGA_MAX_G400_PIPES 16
-#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
-#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */
-
-#define MGA_CARD_TYPE_G200 1
-#define MGA_CARD_TYPE_G400 2
-#define MGA_CARD_TYPE_G450 3 /* not currently used */
-#define MGA_CARD_TYPE_G550 4
-
-#define MGA_FRONT 0x1
-#define MGA_BACK 0x2
-#define MGA_DEPTH 0x4
-
-/* What needs to be changed for the current vertex dma buffer?
- */
-#define MGA_UPLOAD_CONTEXT 0x1
-#define MGA_UPLOAD_TEX0 0x2
-#define MGA_UPLOAD_TEX1 0x4
-#define MGA_UPLOAD_PIPE 0x8
-#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */
-#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */
-#define MGA_UPLOAD_2D 0x40
-#define MGA_WAIT_AGE 0x80 /* handled client-side */
-#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
-#if 0
-#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
- quiescent */
-#endif
-
-/* 32 buffers of 64k each, total 2 meg.
- */
-#define MGA_BUFFER_SIZE (1 << 16)
-#define MGA_NUM_BUFFERS 128
-
-/* Keep these small for testing.
- */
-#define MGA_NR_SAREA_CLIPRECTS 8
-
-/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
- * regions, subject to a minimum region size of (1<<16) == 64k.
- *
- * Clients may subdivide regions internally, but when sharing between
- * clients, the region size is the minimum granularity.
- */
-
-#define MGA_CARD_HEAP 0
-#define MGA_AGP_HEAP 1
-#define MGA_NR_TEX_HEAPS 2
-#define MGA_NR_TEX_REGIONS 16
-#define MGA_LOG_MIN_TEX_REGION_SIZE 16
-
-#define DRM_MGA_IDLE_RETRY 2048
-
-#endif /* __MGA_SAREA_DEFINES__ */
-
-/* Setup registers for 3D context
- */
-typedef struct {
- unsigned int dstorg;
- unsigned int maccess;
- unsigned int plnwt;
- unsigned int dwgctl;
- unsigned int alphactrl;
- unsigned int fogcolor;
- unsigned int wflag;
- unsigned int tdualstage0;
- unsigned int tdualstage1;
- unsigned int fcol;
- unsigned int stencil;
- unsigned int stencilctl;
-} drm_mga_context_regs_t;
-
-/* Setup registers for 2D, X server
- */
-typedef struct {
- unsigned int pitch;
-} drm_mga_server_regs_t;
-
-/* Setup registers for each texture unit
- */
-typedef struct {
- unsigned int texctl;
- unsigned int texctl2;
- unsigned int texfilter;
- unsigned int texbordercol;
- unsigned int texorg;
- unsigned int texwidth;
- unsigned int texheight;
- unsigned int texorg1;
- unsigned int texorg2;
- unsigned int texorg3;
- unsigned int texorg4;
-} drm_mga_texture_regs_t;
-
-/* General aging mechanism
- */
-typedef struct {
- unsigned int head; /* Position of head pointer */
- unsigned int wrap; /* Primary DMA wrap count */
-} drm_mga_age_t;
-
-typedef struct _drm_mga_sarea {
- /* The channel for communication of state information to the kernel
- * on firing a vertex dma buffer.
- */
- drm_mga_context_regs_t context_state;
- drm_mga_server_regs_t server_state;
- drm_mga_texture_regs_t tex_state[2];
- unsigned int warp_pipe;
- unsigned int dirty;
- unsigned int vertsize;
-
- /* The current cliprects, or a subset thereof.
- */
- struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS];
- unsigned int nbox;
-
- /* Information about the most recently used 3d drawable. The
- * client fills in the req_* fields, the server fills in the
- * exported_ fields and puts the cliprects into boxes, above.
- *
- * The client clears the exported_drawable field before
- * clobbering the boxes data.
- */
- unsigned int req_drawable; /* the X drawable id */
- unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
-
- unsigned int exported_drawable;
- unsigned int exported_index;
- unsigned int exported_stamp;
- unsigned int exported_buffers;
- unsigned int exported_nfront;
- unsigned int exported_nback;
- int exported_back_x, exported_front_x, exported_w;
- int exported_back_y, exported_front_y, exported_h;
- struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS];
-
- /* Counters for aging textures and for client-side throttling.
- */
- unsigned int status[4];
- unsigned int last_wrap;
-
- drm_mga_age_t last_frame;
- unsigned int last_enqueue; /* last time a buffer was enqueued */
- unsigned int last_dispatch; /* age of the most recently dispatched buffer */
- unsigned int last_quiescent; /* */
-
- /* LRU lists for texture memory in agp space and on the card.
- */
- struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1];
- unsigned int texAge[MGA_NR_TEX_HEAPS];
-
- /* Mechanism to validate card state.
- */
- int ctxOwner;
-} drm_mga_sarea_t;
-
-
-/* MGA specific ioctls
- * The device specific ioctl range is 0x40 to 0x79.
- */
-#define DRM_MGA_INIT 0x00
-#define DRM_MGA_FLUSH 0x01
-#define DRM_MGA_RESET 0x02
-#define DRM_MGA_SWAP 0x03
-#define DRM_MGA_CLEAR 0x04
-#define DRM_MGA_VERTEX 0x05
-#define DRM_MGA_INDICES 0x06
-#define DRM_MGA_ILOAD 0x07
-#define DRM_MGA_BLIT 0x08
-#define DRM_MGA_GETPARAM 0x09
-
-/* 3.2:
- * ioctls for operating on fences.
- */
-#define DRM_MGA_SET_FENCE 0x0a
-#define DRM_MGA_WAIT_FENCE 0x0b
-#define DRM_MGA_DMA_BOOTSTRAP 0x0c
-
-
-#define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t)
-#define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t)
-#define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET)
-#define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP)
-#define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t)
-#define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t)
-#define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t)
-#define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t)
-#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
-#define DRM_IOCTL_MGA_SET_FENCE DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, uint32_t)
-#define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, uint32_t)
-#define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t)
-
-typedef struct _drm_mga_warp_index {
- int installed;
- unsigned long phys_addr;
- int size;
-} drm_mga_warp_index_t;
-
-typedef struct drm_mga_init {
- enum {
- MGA_INIT_DMA = 0x01,
- MGA_CLEANUP_DMA = 0x02
- } func;
-
- unsigned long sarea_priv_offset;
-
- int chipset;
- int sgram;
-
- unsigned int maccess;
-
- unsigned int fb_cpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
-
- unsigned int depth_cpp;
- unsigned int depth_offset, depth_pitch;
-
- unsigned int texture_offset[MGA_NR_TEX_HEAPS];
- unsigned int texture_size[MGA_NR_TEX_HEAPS];
-
- unsigned long fb_offset;
- unsigned long mmio_offset;
- unsigned long status_offset;
- unsigned long warp_offset;
- unsigned long primary_offset;
- unsigned long buffers_offset;
-} drm_mga_init_t;
-
-
-typedef struct drm_mga_dma_bootstrap {
- /**
- * \name AGP texture region
- *
- * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, these fields will
- * be filled in with the actual AGP texture settings.
- *
- * \warning
- * If these fields are non-zero, but dma_mga_dma_bootstrap::agp_mode
- * is zero, it means that PCI memory (most likely through the use of
- * an IOMMU) is being used for "AGP" textures.
- */
- /*@{*/
- unsigned long texture_handle; /**< Handle used to map AGP textures. */
- uint32_t texture_size; /**< Size of the AGP texture region. */
- /*@}*/
-
-
- /**
- * Requested size of the primary DMA region.
- *
- * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be
- * filled in with the actual AGP mode. If AGP was not available
- */
- uint32_t primary_size;
-
-
- /**
- * Requested number of secondary DMA buffers.
- *
- * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be
- * filled in with the actual number of secondary DMA buffers
- * allocated. Particularly when PCI DMA is used, this may be
- * (subtantially) less than the number requested.
- */
- uint32_t secondary_bin_count;
-
-
- /**
- * Requested size of each secondary DMA buffer.
- *
- * While the kernel \b is free to reduce
- * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed
- * to reduce dma_mga_dma_bootstrap::secondary_bin_size.
- */
- uint32_t secondary_bin_size;
-
-
- /**
- * Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X,
- * \c AGPSTAT2_2X, and \c AGPSTAT2_4X are supported. If this value is
- * zero, it means that PCI DMA should be used, even if AGP is
- * possible.
- *
- * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be
- * filled in with the actual AGP mode. If AGP was not available
- * (i.e., PCI DMA was used), this value will be zero.
- */
- uint32_t agp_mode;
-
-
- /**
- * Desired AGP GART size, measured in megabytes.
- */
- uint8_t agp_size;
-} drm_mga_dma_bootstrap_t;
-
-typedef struct drm_mga_clear {
- unsigned int flags;
- unsigned int clear_color;
- unsigned int clear_depth;
- unsigned int color_mask;
- unsigned int depth_mask;
-} drm_mga_clear_t;
-
-typedef struct drm_mga_vertex {
- int idx; /* buffer to queue */
- int used; /* bytes in use */
- int discard; /* client finished with buffer? */
-} drm_mga_vertex_t;
-
-typedef struct drm_mga_indices {
- int idx; /* buffer to queue */
- unsigned int start;
- unsigned int end;
- int discard; /* client finished with buffer? */
-} drm_mga_indices_t;
-
-typedef struct drm_mga_iload {
- int idx;
- unsigned int dstorg;
- unsigned int length;
-} drm_mga_iload_t;
-
-typedef struct _drm_mga_blit {
- unsigned int planemask;
- unsigned int srcorg;
- unsigned int dstorg;
- int src_pitch, dst_pitch;
- int delta_sx, delta_sy;
- int delta_dx, delta_dy;
- int height, ydir; /* flip image vertically */
- int source_pitch, dest_pitch;
-} drm_mga_blit_t;
-
-/* 3.1: An ioctl to get parameters that aren't available to the 3d
- * client any other way.
- */
-#define MGA_PARAM_IRQ_NR 1
-
-/* 3.2: Query the actual card type. The DDX only distinguishes between
- * G200 chips and non-G200 chips, which it calls G400. It turns out that
- * there are some very sublte differences between the G4x0 chips and the G550
- * chips. Using this parameter query, a client-side driver can detect the
- * difference between a G4x0 and a G550.
- */
-#define MGA_PARAM_CARD_TYPE 2
-
-typedef struct drm_mga_getparam {
- int param;
- void __user *value;
-} drm_mga_getparam_t;
-
-#endif
+++ /dev/null
-/* mga_drv.h -- Private header for the Matrox G200/G400 driver -*- linux-c -*-
- * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __MGA_DRV_H__
-#define __MGA_DRV_H__
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
-
-#define DRIVER_NAME "mga"
-#define DRIVER_DESC "Matrox G200/G400"
-#define DRIVER_DATE "20060319"
-
-#define DRIVER_MAJOR 3
-#define DRIVER_MINOR 2
-#define DRIVER_PATCHLEVEL 2
-
-typedef struct drm_mga_primary_buffer {
- u8 *start;
- u8 *end;
- int size;
-
- u32 tail;
- int space;
- volatile long wrapped;
-
- volatile u32 *status;
-
- u32 last_flush;
- u32 last_wrap;
-
- u32 high_mark;
-} drm_mga_primary_buffer_t;
-
-typedef struct drm_mga_freelist {
- struct drm_mga_freelist *next;
- struct drm_mga_freelist *prev;
- drm_mga_age_t age;
- struct drm_buf *buf;
-} drm_mga_freelist_t;
-
-typedef struct {
- drm_mga_freelist_t *list_entry;
- int discard;
- int dispatched;
-} drm_mga_buf_priv_t;
-
-typedef struct drm_mga_private {
- drm_mga_primary_buffer_t prim;
- drm_mga_sarea_t *sarea_priv;
-
- drm_mga_freelist_t *head;
- drm_mga_freelist_t *tail;
-
- unsigned int warp_pipe;
- unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES];
-
- int chipset;
- int usec_timeout;
-
- /**
- * If set, the new DMA initialization sequence was used. This is
- * primarilly used to select how the driver should uninitialized its
- * internal DMA structures.
- */
- int used_new_dma_init;
-
- /**
- * If AGP memory is used for DMA buffers, this will be the value
- * \c MGA_PAGPXFER. Otherwise, it will be zero (for a PCI transfer).
- */
- u32 dma_access;
-
- /**
- * If AGP memory is used for DMA buffers, this will be the value
- * \c MGA_WAGP_ENABLE. Otherwise, it will be zero (for a PCI
- * transfer).
- */
- u32 wagp_enable;
-
- /**
- * \name MMIO region parameters.
- *
- * \sa drm_mga_private_t::mmio
- */
- /*@{*/
- u32 mmio_base; /**< Bus address of base of MMIO. */
- u32 mmio_size; /**< Size of the MMIO region. */
- /*@}*/
-
- u32 clear_cmd;
- u32 maccess;
-
- atomic_t vbl_received; /**< Number of vblanks received. */
- wait_queue_head_t fence_queue;
- atomic_t last_fence_retired;
- u32 next_fence_to_post;
-
- unsigned int fb_cpp;
- unsigned int front_offset;
- unsigned int front_pitch;
- unsigned int back_offset;
- unsigned int back_pitch;
-
- unsigned int depth_cpp;
- unsigned int depth_offset;
- unsigned int depth_pitch;
-
- unsigned int texture_offset;
- unsigned int texture_size;
-
- drm_local_map_t *sarea;
- drm_local_map_t *mmio;
- drm_local_map_t *status;
- drm_local_map_t *warp;
- drm_local_map_t *primary;
- drm_local_map_t *agp_textures;
-
- unsigned long agp_handle;
- unsigned int agp_size;
-} drm_mga_private_t;
-
-extern struct drm_ioctl_desc mga_ioctls[];
-extern int mga_max_ioctl;
-
- /* mga_dma.c */
-extern int mga_dma_bootstrap(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mga_dma_init(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mga_dma_flush(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mga_dma_reset(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mga_dma_buffers(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-extern int mga_driver_load(struct drm_device *dev, unsigned long flags);
-extern int mga_driver_unload(struct drm_device * dev);
-extern void mga_driver_lastclose(struct drm_device * dev);
-extern int mga_driver_dma_quiescent(struct drm_device * dev);
-
-extern int mga_do_wait_for_idle(drm_mga_private_t * dev_priv);
-
-extern void mga_do_dma_flush(drm_mga_private_t * dev_priv);
-extern void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv);
-extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv);
-
-extern int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf);
-
- /* mga_warp.c */
-extern unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv);
-extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv);
-extern int mga_warp_init(drm_mga_private_t * dev_priv);
-
- /* mga_irq.c */
-extern int mga_enable_vblank(struct drm_device *dev, int crtc);
-extern void mga_disable_vblank(struct drm_device *dev, int crtc);
-extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc);
-extern int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence);
-extern int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence);
-extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS);
-extern void mga_driver_irq_preinstall(struct drm_device * dev);
-extern int mga_driver_irq_postinstall(struct drm_device * dev);
-extern void mga_driver_irq_uninstall(struct drm_device * dev);
-extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg);
-
-#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
-
-#if defined(__linux__) && defined(__alpha__)
-#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle))
-#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg)
-
-#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg )
-#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg )
-
-#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg)))
-#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg)))
-#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0)
-#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0)
-
-static inline u32 _MGA_READ(u32 * addr)
-{
- DRM_MEMORYBARRIER();
- return *(volatile u32 *)addr;
-}
-#else
-#define MGA_READ8( reg ) DRM_READ8(dev_priv->mmio, (reg))
-#define MGA_READ( reg ) DRM_READ32(dev_priv->mmio, (reg))
-#define MGA_WRITE8( reg, val ) DRM_WRITE8(dev_priv->mmio, (reg), (val))
-#define MGA_WRITE( reg, val ) DRM_WRITE32(dev_priv->mmio, (reg), (val))
-#endif
-
-#define DWGREG0 0x1c00
-#define DWGREG0_END 0x1dff
-#define DWGREG1 0x2c00
-#define DWGREG1_END 0x2dff
-
-#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END)
-#define DMAREG0(r) (u8)((r - DWGREG0) >> 2)
-#define DMAREG1(r) (u8)(((r - DWGREG1) >> 2) | 0x80)
-#define DMAREG(r) (ISREG0(r) ? DMAREG0(r) : DMAREG1(r))
-
-/* ================================================================
- * Helper macross...
- */
-
-#define MGA_EMIT_STATE( dev_priv, dirty ) \
-do { \
- if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) { \
- if ( dev_priv->chipset >= MGA_CARD_TYPE_G400 ) { \
- mga_g400_emit_state( dev_priv ); \
- } else { \
- mga_g200_emit_state( dev_priv ); \
- } \
- } \
-} while (0)
-
-#define WRAP_TEST_WITH_RETURN( dev_priv ) \
-do { \
- if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \
- if ( mga_is_idle( dev_priv ) ) { \
- mga_do_dma_wrap_end( dev_priv ); \
- } else if ( dev_priv->prim.space < \
- dev_priv->prim.high_mark ) { \
- if ( MGA_DMA_DEBUG ) \
- DRM_INFO( "wrap...\n"); \
- return -EBUSY; \
- } \
- } \
-} while (0)
-
-#define WRAP_WAIT_WITH_RETURN( dev_priv ) \
-do { \
- if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \
- if ( mga_do_wait_for_idle( dev_priv ) < 0 ) { \
- if ( MGA_DMA_DEBUG ) \
- DRM_INFO( "wrap...\n"); \
- return -EBUSY; \
- } \
- mga_do_dma_wrap_end( dev_priv ); \
- } \
-} while (0)
-
-/* ================================================================
- * Primary DMA command stream
- */
-
-#define MGA_VERBOSE 0
-
-#define DMA_LOCALS unsigned int write; volatile u8 *prim;
-
-#define DMA_BLOCK_SIZE (5 * sizeof(u32))
-
-#define BEGIN_DMA( n ) \
-do { \
- if ( MGA_VERBOSE ) { \
- DRM_INFO( "BEGIN_DMA( %d )\n", (n) ); \
- DRM_INFO( " space=0x%x req=0x%Zx\n", \
- dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \
- } \
- prim = dev_priv->prim.start; \
- write = dev_priv->prim.tail; \
-} while (0)
-
-#define BEGIN_DMA_WRAP() \
-do { \
- if ( MGA_VERBOSE ) { \
- DRM_INFO( "BEGIN_DMA()\n" ); \
- DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \
- } \
- prim = dev_priv->prim.start; \
- write = dev_priv->prim.tail; \
-} while (0)
-
-#define ADVANCE_DMA() \
-do { \
- dev_priv->prim.tail = write; \
- if ( MGA_VERBOSE ) { \
- DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
- write, dev_priv->prim.space ); \
- } \
-} while (0)
-
-#define FLUSH_DMA() \
-do { \
- if ( 0 ) { \
- DRM_INFO( "\n" ); \
- DRM_INFO( " tail=0x%06x head=0x%06lx\n", \
- dev_priv->prim.tail, \
- MGA_READ( MGA_PRIMADDRESS ) - \
- dev_priv->primary->offset ); \
- } \
- if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \
- if ( dev_priv->prim.space < \
- dev_priv->prim.high_mark ) { \
- mga_do_dma_wrap_start( dev_priv ); \
- } else { \
- mga_do_dma_flush( dev_priv ); \
- } \
- } \
-} while (0)
-
-/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
- */
-#define DMA_WRITE( offset, val ) \
-do { \
- if ( MGA_VERBOSE ) { \
- DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \
- (u32)(val), write + (offset) * sizeof(u32) ); \
- } \
- *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \
-} while (0)
-
-#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 ) \
-do { \
- DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) | \
- (DMAREG( reg1 ) << 8) | \
- (DMAREG( reg2 ) << 16) | \
- (DMAREG( reg3 ) << 24)) ); \
- DMA_WRITE( 1, val0 ); \
- DMA_WRITE( 2, val1 ); \
- DMA_WRITE( 3, val2 ); \
- DMA_WRITE( 4, val3 ); \
- write += DMA_BLOCK_SIZE; \
-} while (0)
-
-/* Buffer aging via primary DMA stream head pointer.
- */
-
-#define SET_AGE( age, h, w ) \
-do { \
- (age)->head = h; \
- (age)->wrap = w; \
-} while (0)
-
-#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \
- ( (age)->wrap == w && \
- (age)->head < h ) )
-
-#define AGE_BUFFER( buf_priv ) \
-do { \
- drm_mga_freelist_t *entry = (buf_priv)->list_entry; \
- if ( (buf_priv)->dispatched ) { \
- entry->age.head = (dev_priv->prim.tail + \
- dev_priv->primary->offset); \
- entry->age.wrap = dev_priv->sarea_priv->last_wrap; \
- } else { \
- entry->age.head = 0; \
- entry->age.wrap = 0; \
- } \
-} while (0)
-
-#define MGA_ENGINE_IDLE_MASK (MGA_SOFTRAPEN | \
- MGA_DWGENGSTS | \
- MGA_ENDPRDMASTS)
-#define MGA_DMA_IDLE_MASK (MGA_SOFTRAPEN | \
- MGA_ENDPRDMASTS)
-
-#define MGA_DMA_DEBUG 0
-
-/* A reduced set of the mga registers.
- */
-#define MGA_CRTC_INDEX 0x1fd4
-#define MGA_CRTC_DATA 0x1fd5
-
-/* CRTC11 */
-#define MGA_VINTCLR (1 << 4)
-#define MGA_VINTEN (1 << 5)
-
-#define MGA_ALPHACTRL 0x2c7c
-#define MGA_AR0 0x1c60
-#define MGA_AR1 0x1c64
-#define MGA_AR2 0x1c68
-#define MGA_AR3 0x1c6c
-#define MGA_AR4 0x1c70
-#define MGA_AR5 0x1c74
-#define MGA_AR6 0x1c78
-
-#define MGA_CXBNDRY 0x1c80
-#define MGA_CXLEFT 0x1ca0
-#define MGA_CXRIGHT 0x1ca4
-
-#define MGA_DMAPAD 0x1c54
-#define MGA_DSTORG 0x2cb8
-#define MGA_DWGCTL 0x1c00
-# define MGA_OPCOD_MASK (15 << 0)
-# define MGA_OPCOD_TRAP (4 << 0)
-# define MGA_OPCOD_TEXTURE_TRAP (6 << 0)
-# define MGA_OPCOD_BITBLT (8 << 0)
-# define MGA_OPCOD_ILOAD (9 << 0)
-# define MGA_ATYPE_MASK (7 << 4)
-# define MGA_ATYPE_RPL (0 << 4)
-# define MGA_ATYPE_RSTR (1 << 4)
-# define MGA_ATYPE_ZI (3 << 4)
-# define MGA_ATYPE_BLK (4 << 4)
-# define MGA_ATYPE_I (7 << 4)
-# define MGA_LINEAR (1 << 7)
-# define MGA_ZMODE_MASK (7 << 8)
-# define MGA_ZMODE_NOZCMP (0 << 8)
-# define MGA_ZMODE_ZE (2 << 8)
-# define MGA_ZMODE_ZNE (3 << 8)
-# define MGA_ZMODE_ZLT (4 << 8)
-# define MGA_ZMODE_ZLTE (5 << 8)
-# define MGA_ZMODE_ZGT (6 << 8)
-# define MGA_ZMODE_ZGTE (7 << 8)
-# define MGA_SOLID (1 << 11)
-# define MGA_ARZERO (1 << 12)
-# define MGA_SGNZERO (1 << 13)
-# define MGA_SHIFTZERO (1 << 14)
-# define MGA_BOP_MASK (15 << 16)
-# define MGA_BOP_ZERO (0 << 16)
-# define MGA_BOP_DST (10 << 16)
-# define MGA_BOP_SRC (12 << 16)
-# define MGA_BOP_ONE (15 << 16)
-# define MGA_TRANS_SHIFT 20
-# define MGA_TRANS_MASK (15 << 20)
-# define MGA_BLTMOD_MASK (15 << 25)
-# define MGA_BLTMOD_BMONOLEF (0 << 25)
-# define MGA_BLTMOD_BMONOWF (4 << 25)
-# define MGA_BLTMOD_PLAN (1 << 25)
-# define MGA_BLTMOD_BFCOL (2 << 25)
-# define MGA_BLTMOD_BU32BGR (3 << 25)
-# define MGA_BLTMOD_BU32RGB (7 << 25)
-# define MGA_BLTMOD_BU24BGR (11 << 25)
-# define MGA_BLTMOD_BU24RGB (15 << 25)
-# define MGA_PATTERN (1 << 29)
-# define MGA_TRANSC (1 << 30)
-# define MGA_CLIPDIS (1 << 31)
-#define MGA_DWGSYNC 0x2c4c
-
-#define MGA_FCOL 0x1c24
-#define MGA_FIFOSTATUS 0x1e10
-#define MGA_FOGCOL 0x1cf4
-#define MGA_FXBNDRY 0x1c84
-#define MGA_FXLEFT 0x1ca8
-#define MGA_FXRIGHT 0x1cac
-
-#define MGA_ICLEAR 0x1e18
-# define MGA_SOFTRAPICLR (1 << 0)
-# define MGA_VLINEICLR (1 << 5)
-#define MGA_IEN 0x1e1c
-# define MGA_SOFTRAPIEN (1 << 0)
-# define MGA_VLINEIEN (1 << 5)
-
-#define MGA_LEN 0x1c5c
-
-#define MGA_MACCESS 0x1c04
-
-#define MGA_PITCH 0x1c8c
-#define MGA_PLNWT 0x1c1c
-#define MGA_PRIMADDRESS 0x1e58
-# define MGA_DMA_GENERAL (0 << 0)
-# define MGA_DMA_BLIT (1 << 0)
-# define MGA_DMA_VECTOR (2 << 0)
-# define MGA_DMA_VERTEX (3 << 0)
-#define MGA_PRIMEND 0x1e5c
-# define MGA_PRIMNOSTART (1 << 0)
-# define MGA_PAGPXFER (1 << 1)
-#define MGA_PRIMPTR 0x1e50
-# define MGA_PRIMPTREN0 (1 << 0)
-# define MGA_PRIMPTREN1 (1 << 1)
-
-#define MGA_RST 0x1e40
-# define MGA_SOFTRESET (1 << 0)
-# define MGA_SOFTEXTRST (1 << 1)
-
-#define MGA_SECADDRESS 0x2c40
-#define MGA_SECEND 0x2c44
-#define MGA_SETUPADDRESS 0x2cd0
-#define MGA_SETUPEND 0x2cd4
-#define MGA_SGN 0x1c58
-#define MGA_SOFTRAP 0x2c48
-#define MGA_SRCORG 0x2cb4
-# define MGA_SRMMAP_MASK (1 << 0)
-# define MGA_SRCMAP_FB (0 << 0)
-# define MGA_SRCMAP_SYSMEM (1 << 0)
-# define MGA_SRCACC_MASK (1 << 1)
-# define MGA_SRCACC_PCI (0 << 1)
-# define MGA_SRCACC_AGP (1 << 1)
-#define MGA_STATUS 0x1e14
-# define MGA_SOFTRAPEN (1 << 0)
-# define MGA_VSYNCPEN (1 << 4)
-# define MGA_VLINEPEN (1 << 5)
-# define MGA_DWGENGSTS (1 << 16)
-# define MGA_ENDPRDMASTS (1 << 17)
-#define MGA_STENCIL 0x2cc8
-#define MGA_STENCILCTL 0x2ccc
-
-#define MGA_TDUALSTAGE0 0x2cf8
-#define MGA_TDUALSTAGE1 0x2cfc
-#define MGA_TEXBORDERCOL 0x2c5c
-#define MGA_TEXCTL 0x2c30
-#define MGA_TEXCTL2 0x2c3c
-# define MGA_DUALTEX (1 << 7)
-# define MGA_G400_TC2_MAGIC (1 << 15)
-# define MGA_MAP1_ENABLE (1 << 31)
-#define MGA_TEXFILTER 0x2c58
-#define MGA_TEXHEIGHT 0x2c2c
-#define MGA_TEXORG 0x2c24
-# define MGA_TEXORGMAP_MASK (1 << 0)
-# define MGA_TEXORGMAP_FB (0 << 0)
-# define MGA_TEXORGMAP_SYSMEM (1 << 0)
-# define MGA_TEXORGACC_MASK (1 << 1)
-# define MGA_TEXORGACC_PCI (0 << 1)
-# define MGA_TEXORGACC_AGP (1 << 1)
-#define MGA_TEXORG1 0x2ca4
-#define MGA_TEXORG2 0x2ca8
-#define MGA_TEXORG3 0x2cac
-#define MGA_TEXORG4 0x2cb0
-#define MGA_TEXTRANS 0x2c34
-#define MGA_TEXTRANSHIGH 0x2c38
-#define MGA_TEXWIDTH 0x2c28
-
-#define MGA_WACCEPTSEQ 0x1dd4
-#define MGA_WCODEADDR 0x1e6c
-#define MGA_WFLAG 0x1dc4
-#define MGA_WFLAG1 0x1de0
-#define MGA_WFLAGNB 0x1e64
-#define MGA_WFLAGNB1 0x1e08
-#define MGA_WGETMSB 0x1dc8
-#define MGA_WIADDR 0x1dc0
-#define MGA_WIADDR2 0x1dd8
-# define MGA_WMODE_SUSPEND (0 << 0)
-# define MGA_WMODE_RESUME (1 << 0)
-# define MGA_WMODE_JUMP (2 << 0)
-# define MGA_WMODE_START (3 << 0)
-# define MGA_WAGP_ENABLE (1 << 2)
-#define MGA_WMISC 0x1e70
-# define MGA_WUCODECACHE_ENABLE (1 << 0)
-# define MGA_WMASTER_ENABLE (1 << 1)
-# define MGA_WCACHEFLUSH_ENABLE (1 << 3)
-#define MGA_WVRTXSZ 0x1dcc
-
-#define MGA_YBOT 0x1c9c
-#define MGA_YDST 0x1c90
-#define MGA_YDSTLEN 0x1c88
-#define MGA_YDSTORG 0x1c94
-#define MGA_YTOP 0x1c98
-
-#define MGA_ZORG 0x1c0c
-
-/* This finishes the current batch of commands
- */
-#define MGA_EXEC 0x0100
-
-/* AGP PLL encoding (for G200 only).
- */
-#define MGA_AGP_PLL 0x1e4c
-# define MGA_AGP2XPLL_DISABLE (0 << 0)
-# define MGA_AGP2XPLL_ENABLE (1 << 0)
-
-/* Warp registers
- */
-#define MGA_WR0 0x2d00
-#define MGA_WR1 0x2d04
-#define MGA_WR2 0x2d08
-#define MGA_WR3 0x2d0c
-#define MGA_WR4 0x2d10
-#define MGA_WR5 0x2d14
-#define MGA_WR6 0x2d18
-#define MGA_WR7 0x2d1c
-#define MGA_WR8 0x2d20
-#define MGA_WR9 0x2d24
-#define MGA_WR10 0x2d28
-#define MGA_WR11 0x2d2c
-#define MGA_WR12 0x2d30
-#define MGA_WR13 0x2d34
-#define MGA_WR14 0x2d38
-#define MGA_WR15 0x2d3c
-#define MGA_WR16 0x2d40
-#define MGA_WR17 0x2d44
-#define MGA_WR18 0x2d48
-#define MGA_WR19 0x2d4c
-#define MGA_WR20 0x2d50
-#define MGA_WR21 0x2d54
-#define MGA_WR22 0x2d58
-#define MGA_WR23 0x2d5c
-#define MGA_WR24 0x2d60
-#define MGA_WR25 0x2d64
-#define MGA_WR26 0x2d68
-#define MGA_WR27 0x2d6c
-#define MGA_WR28 0x2d70
-#define MGA_WR29 0x2d74
-#define MGA_WR30 0x2d78
-#define MGA_WR31 0x2d7c
-#define MGA_WR32 0x2d80
-#define MGA_WR33 0x2d84
-#define MGA_WR34 0x2d88
-#define MGA_WR35 0x2d8c
-#define MGA_WR36 0x2d90
-#define MGA_WR37 0x2d94
-#define MGA_WR38 0x2d98
-#define MGA_WR39 0x2d9c
-#define MGA_WR40 0x2da0
-#define MGA_WR41 0x2da4
-#define MGA_WR42 0x2da8
-#define MGA_WR43 0x2dac
-#define MGA_WR44 0x2db0
-#define MGA_WR45 0x2db4
-#define MGA_WR46 0x2db8
-#define MGA_WR47 0x2dbc
-#define MGA_WR48 0x2dc0
-#define MGA_WR49 0x2dc4
-#define MGA_WR50 0x2dc8
-#define MGA_WR51 0x2dcc
-#define MGA_WR52 0x2dd0
-#define MGA_WR53 0x2dd4
-#define MGA_WR54 0x2dd8
-#define MGA_WR55 0x2ddc
-#define MGA_WR56 0x2de0
-#define MGA_WR57 0x2de4
-#define MGA_WR58 0x2de8
-#define MGA_WR59 0x2dec
-#define MGA_WR60 0x2df0
-#define MGA_WR61 0x2df4
-#define MGA_WR62 0x2df8
-#define MGA_WR63 0x2dfc
-# define MGA_G400_WR_MAGIC (1 << 6)
-# define MGA_G400_WR56_MAGIC 0x46480000 /* 12800.0f */
-
-#define MGA_ILOAD_ALIGN 64
-#define MGA_ILOAD_MASK (MGA_ILOAD_ALIGN - 1)
-
-#define MGA_DWGCTL_FLUSH (MGA_OPCOD_TEXTURE_TRAP | \
- MGA_ATYPE_I | \
- MGA_ZMODE_NOZCMP | \
- MGA_ARZERO | \
- MGA_SGNZERO | \
- MGA_BOP_SRC | \
- (15 << MGA_TRANS_SHIFT))
-
-#define MGA_DWGCTL_CLEAR (MGA_OPCOD_TRAP | \
- MGA_ZMODE_NOZCMP | \
- MGA_SOLID | \
- MGA_ARZERO | \
- MGA_SGNZERO | \
- MGA_SHIFTZERO | \
- MGA_BOP_SRC | \
- (0 << MGA_TRANS_SHIFT) | \
- MGA_BLTMOD_BMONOLEF | \
- MGA_TRANSC | \
- MGA_CLIPDIS)
-
-#define MGA_DWGCTL_COPY (MGA_OPCOD_BITBLT | \
- MGA_ATYPE_RPL | \
- MGA_SGNZERO | \
- MGA_SHIFTZERO | \
- MGA_BOP_SRC | \
- (0 << MGA_TRANS_SHIFT) | \
- MGA_BLTMOD_BFCOL | \
- MGA_CLIPDIS)
-
-/* Simple idle test.
- */
-static __inline__ int mga_is_idle(drm_mga_private_t * dev_priv)
-{
- u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
- return (status == MGA_ENDPRDMASTS);
-}
-
-#endif
+++ /dev/null
-/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
- */
-/*
- * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
- *
- * The Weather Channel (TM) funded Tungsten Graphics to develop the
- * initial release of the Radeon 8500 driver under the XFree86 license.
- * This notice must be preserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
- * Eric Anholt <anholt@FreeBSD.org>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "mga_drm.h"
-#include "mga_drv.h"
-
-u32 mga_get_vblank_counter(struct drm_device *dev, int crtc)
-{
- const drm_mga_private_t *const dev_priv =
- (drm_mga_private_t *) dev->dev_private;
-
- if (crtc != 0) {
- return 0;
- }
-
-
- return atomic_read(&dev_priv->vbl_received);
-}
-
-
-irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
-{
- struct drm_device *dev = (struct drm_device *) arg;
- drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
- int status;
- int handled = 0;
-
- status = MGA_READ(MGA_STATUS);
-
- /* VBLANK interrupt */
- if (status & MGA_VLINEPEN) {
- MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
- atomic_inc(&dev_priv->vbl_received);
- drm_handle_vblank(dev, 0);
- handled = 1;
- }
-
- /* SOFTRAP interrupt */
- if (status & MGA_SOFTRAPEN) {
- const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
- const u32 prim_end = MGA_READ(MGA_PRIMEND);
-
-
- MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
-
- /* In addition to clearing the interrupt-pending bit, we
- * have to write to MGA_PRIMEND to re-start the DMA operation.
- */
- if ((prim_start & ~0x03) != (prim_end & ~0x03)) {
- MGA_WRITE(MGA_PRIMEND, prim_end);
- }
-
- atomic_inc(&dev_priv->last_fence_retired);
- DRM_WAKEUP(&dev_priv->fence_queue);
- handled = 1;
- }
-
- if (handled)
- return IRQ_HANDLED;
- return IRQ_NONE;
-}
-
-int mga_enable_vblank(struct drm_device *dev, int crtc)
-{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
-
- if (crtc != 0) {
- DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
- crtc);
- return 0;
- }
-
- MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
- return 0;
-}
-
-
-void mga_disable_vblank(struct drm_device *dev, int crtc)
-{
- if (crtc != 0) {
- DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
- crtc);
- }
-
- /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have
- * a nice hardware counter that tracks the number of refreshes when
- * the interrupt is disabled, and the kernel doesn't know the refresh
- * rate to calculate an estimate.
- */
- /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
-}
-
-int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
-{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
- unsigned int cur_fence;
- int ret = 0;
-
- /* Assume that the user has missed the current sequence number
- * by about a day rather than she wants to wait for years
- * using fences.
- */
- DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ,
- (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
- - *sequence) <= (1 << 23)));
-
- *sequence = cur_fence;
-
- return ret;
-}
-
-void mga_driver_irq_preinstall(struct drm_device * dev)
-{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
-
- /* Disable *all* interrupts */
- MGA_WRITE(MGA_IEN, 0);
- /* Clear bits if they're already high */
- MGA_WRITE(MGA_ICLEAR, ~0);
-}
-
-int mga_driver_irq_postinstall(struct drm_device * dev)
-{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
-
- DRM_INIT_WAITQUEUE(&dev_priv->fence_queue);
-
- /* Turn on soft trap interrupt. Vertical blank interrupts are enabled
- * in mga_enable_vblank.
- */
- MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
- return 0;
-}
-
-void mga_driver_irq_uninstall(struct drm_device * dev)
-{
- drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
- if (!dev_priv)
- return;
-
- /* Disable *all* interrupts */
- MGA_WRITE(MGA_IEN, 0);
-
- dev->irq_enabled = 0;
-}
+++ /dev/null
-/* mga_state.c -- State support for MGA G200/G400 -*- linux-c -*-
- * Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com
- */
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Jeff Hartmann <jhartmann@valinux.com>
- * Keith Whitwell <keith@tungstengraphics.com>
- *
- * Rewritten by:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "mga_drm.h"
-#include "mga_drv.h"
-
-/* ================================================================
- * DMA hardware state programming functions
- */
-
-static void mga_emit_clip_rect(drm_mga_private_t * dev_priv,
- struct drm_clip_rect * box)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
- unsigned int pitch = dev_priv->front_pitch;
- DMA_LOCALS;
-
- BEGIN_DMA(2);
-
- /* Force reset of DWGCTL on G400 (eliminates clip disable bit).
- */
- if (dev_priv->chipset >= MGA_CARD_TYPE_G400) {
- DMA_BLOCK(MGA_DWGCTL, ctx->dwgctl,
- MGA_LEN + MGA_EXEC, 0x80000000,
- MGA_DWGCTL, ctx->dwgctl,
- MGA_LEN + MGA_EXEC, 0x80000000);
- }
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_CXBNDRY, ((box->x2 - 1) << 16) | box->x1,
- MGA_YTOP, box->y1 * pitch, MGA_YBOT, (box->y2 - 1) * pitch);
-
- ADVANCE_DMA();
-}
-
-static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
- DMA_LOCALS;
-
- BEGIN_DMA(3);
-
- DMA_BLOCK(MGA_DSTORG, ctx->dstorg,
- MGA_MACCESS, ctx->maccess,
- MGA_PLNWT, ctx->plnwt, MGA_DWGCTL, ctx->dwgctl);
-
- DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl,
- MGA_FOGCOL, ctx->fogcolor,
- MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset);
-
- DMA_BLOCK(MGA_FCOL, ctx->fcol,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
-
- ADVANCE_DMA();
-}
-
-static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
- DMA_LOCALS;
-
- BEGIN_DMA(4);
-
- DMA_BLOCK(MGA_DSTORG, ctx->dstorg,
- MGA_MACCESS, ctx->maccess,
- MGA_PLNWT, ctx->plnwt,
- MGA_DWGCTL, ctx->dwgctl);
-
- DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl,
- MGA_FOGCOL, ctx->fogcolor,
- MGA_WFLAG, ctx->wflag,
- MGA_ZORG, dev_priv->depth_offset);
-
- DMA_BLOCK(MGA_WFLAG1, ctx->wflag,
- MGA_TDUALSTAGE0, ctx->tdualstage0,
- MGA_TDUALSTAGE1, ctx->tdualstage1,
- MGA_FCOL, ctx->fcol);
-
- DMA_BLOCK(MGA_STENCIL, ctx->stencil,
- MGA_STENCILCTL, ctx->stencilctl,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000);
-
- ADVANCE_DMA();
-}
-
-static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
- DMA_LOCALS;
-
- BEGIN_DMA(4);
-
- DMA_BLOCK(MGA_TEXCTL2, tex->texctl2,
- MGA_TEXCTL, tex->texctl,
- MGA_TEXFILTER, tex->texfilter,
- MGA_TEXBORDERCOL, tex->texbordercol);
-
- DMA_BLOCK(MGA_TEXORG, tex->texorg,
- MGA_TEXORG1, tex->texorg1,
- MGA_TEXORG2, tex->texorg2,
- MGA_TEXORG3, tex->texorg3);
-
- DMA_BLOCK(MGA_TEXORG4, tex->texorg4,
- MGA_TEXWIDTH, tex->texwidth,
- MGA_TEXHEIGHT, tex->texheight,
- MGA_WR24, tex->texwidth);
-
- DMA_BLOCK(MGA_WR34, tex->texheight,
- MGA_TEXTRANS, 0x0000ffff,
- MGA_TEXTRANSHIGH, 0x0000ffff,
- MGA_DMAPAD, 0x00000000);
-
- ADVANCE_DMA();
-}
-
-static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
- DMA_LOCALS;
-
-/* printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */
-/* tex->texctl, tex->texctl2); */
-
- BEGIN_DMA(6);
-
- DMA_BLOCK(MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC,
- MGA_TEXCTL, tex->texctl,
- MGA_TEXFILTER, tex->texfilter,
- MGA_TEXBORDERCOL, tex->texbordercol);
-
- DMA_BLOCK(MGA_TEXORG, tex->texorg,
- MGA_TEXORG1, tex->texorg1,
- MGA_TEXORG2, tex->texorg2,
- MGA_TEXORG3, tex->texorg3);
-
- DMA_BLOCK(MGA_TEXORG4, tex->texorg4,
- MGA_TEXWIDTH, tex->texwidth,
- MGA_TEXHEIGHT, tex->texheight,
- MGA_WR49, 0x00000000);
-
- DMA_BLOCK(MGA_WR57, 0x00000000,
- MGA_WR53, 0x00000000,
- MGA_WR61, 0x00000000,
- MGA_WR52, MGA_G400_WR_MAGIC);
-
- DMA_BLOCK(MGA_WR60, MGA_G400_WR_MAGIC,
- MGA_WR54, tex->texwidth | MGA_G400_WR_MAGIC,
- MGA_WR62, tex->texheight | MGA_G400_WR_MAGIC,
- MGA_DMAPAD, 0x00000000);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_TEXTRANS, 0x0000ffff,
- MGA_TEXTRANSHIGH, 0x0000ffff);
-
- ADVANCE_DMA();
-}
-
-static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
- DMA_LOCALS;
-
-/* printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg, */
-/* tex->texctl, tex->texctl2); */
-
- BEGIN_DMA(5);
-
- DMA_BLOCK(MGA_TEXCTL2, (tex->texctl2 |
- MGA_MAP1_ENABLE |
- MGA_G400_TC2_MAGIC),
- MGA_TEXCTL, tex->texctl,
- MGA_TEXFILTER, tex->texfilter,
- MGA_TEXBORDERCOL, tex->texbordercol);
-
- DMA_BLOCK(MGA_TEXORG, tex->texorg,
- MGA_TEXORG1, tex->texorg1,
- MGA_TEXORG2, tex->texorg2,
- MGA_TEXORG3, tex->texorg3);
-
- DMA_BLOCK(MGA_TEXORG4, tex->texorg4,
- MGA_TEXWIDTH, tex->texwidth,
- MGA_TEXHEIGHT, tex->texheight,
- MGA_WR49, 0x00000000);
-
- DMA_BLOCK(MGA_WR57, 0x00000000,
- MGA_WR53, 0x00000000,
- MGA_WR61, 0x00000000,
- MGA_WR52, tex->texwidth | MGA_G400_WR_MAGIC);
-
- DMA_BLOCK(MGA_WR60, tex->texheight | MGA_G400_WR_MAGIC,
- MGA_TEXTRANS, 0x0000ffff,
- MGA_TEXTRANSHIGH, 0x0000ffff,
- MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC);
-
- ADVANCE_DMA();
-}
-
-static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int pipe = sarea_priv->warp_pipe;
- DMA_LOCALS;
-
- BEGIN_DMA(3);
-
- DMA_BLOCK(MGA_WIADDR, MGA_WMODE_SUSPEND,
- MGA_WVRTXSZ, 0x00000007,
- MGA_WFLAG, 0x00000000,
- MGA_WR24, 0x00000000);
-
- DMA_BLOCK(MGA_WR25, 0x00000100,
- MGA_WR34, 0x00000000,
- MGA_WR42, 0x0000ffff,
- MGA_WR60, 0x0000ffff);
-
- /* Padding required to to hardware bug.
- */
- DMA_BLOCK(MGA_DMAPAD, 0xffffffff,
- MGA_DMAPAD, 0xffffffff,
- MGA_DMAPAD, 0xffffffff,
- MGA_WIADDR, (dev_priv->warp_pipe_phys[pipe] |
- MGA_WMODE_START | dev_priv->wagp_enable));
-
- ADVANCE_DMA();
-}
-
-static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int pipe = sarea_priv->warp_pipe;
- DMA_LOCALS;
-
-/* printk("mga_g400_emit_pipe %x\n", pipe); */
-
- BEGIN_DMA(10);
-
- DMA_BLOCK(MGA_WIADDR2, MGA_WMODE_SUSPEND,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000);
-
- if (pipe & MGA_T2) {
- DMA_BLOCK(MGA_WVRTXSZ, 0x00001e09,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000);
-
- DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000,
- MGA_WACCEPTSEQ, 0x00000000,
- MGA_WACCEPTSEQ, 0x00000000,
- MGA_WACCEPTSEQ, 0x1e000000);
- } else {
- if (dev_priv->warp_pipe & MGA_T2) {
- /* Flush the WARP pipe */
- DMA_BLOCK(MGA_YDST, 0x00000000,
- MGA_FXLEFT, 0x00000000,
- MGA_FXRIGHT, 0x00000001,
- MGA_DWGCTL, MGA_DWGCTL_FLUSH);
-
- DMA_BLOCK(MGA_LEN + MGA_EXEC, 0x00000001,
- MGA_DWGSYNC, 0x00007000,
- MGA_TEXCTL2, MGA_G400_TC2_MAGIC,
- MGA_LEN + MGA_EXEC, 0x00000000);
-
- DMA_BLOCK(MGA_TEXCTL2, (MGA_DUALTEX |
- MGA_G400_TC2_MAGIC),
- MGA_LEN + MGA_EXEC, 0x00000000,
- MGA_TEXCTL2, MGA_G400_TC2_MAGIC,
- MGA_DMAPAD, 0x00000000);
- }
-
- DMA_BLOCK(MGA_WVRTXSZ, 0x00001807,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000);
-
- DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000,
- MGA_WACCEPTSEQ, 0x00000000,
- MGA_WACCEPTSEQ, 0x00000000,
- MGA_WACCEPTSEQ, 0x18000000);
- }
-
- DMA_BLOCK(MGA_WFLAG, 0x00000000,
- MGA_WFLAG1, 0x00000000,
- MGA_WR56, MGA_G400_WR56_MAGIC,
- MGA_DMAPAD, 0x00000000);
-
- DMA_BLOCK(MGA_WR49, 0x00000000, /* tex0 */
- MGA_WR57, 0x00000000, /* tex0 */
- MGA_WR53, 0x00000000, /* tex1 */
- MGA_WR61, 0x00000000); /* tex1 */
-
- DMA_BLOCK(MGA_WR54, MGA_G400_WR_MAGIC, /* tex0 width */
- MGA_WR62, MGA_G400_WR_MAGIC, /* tex0 height */
- MGA_WR52, MGA_G400_WR_MAGIC, /* tex1 width */
- MGA_WR60, MGA_G400_WR_MAGIC); /* tex1 height */
-
- /* Padding required to to hardware bug */
- DMA_BLOCK(MGA_DMAPAD, 0xffffffff,
- MGA_DMAPAD, 0xffffffff,
- MGA_DMAPAD, 0xffffffff,
- MGA_WIADDR2, (dev_priv->warp_pipe_phys[pipe] |
- MGA_WMODE_START | dev_priv->wagp_enable));
-
- ADVANCE_DMA();
-}
-
-static void mga_g200_emit_state(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int dirty = sarea_priv->dirty;
-
- if (sarea_priv->warp_pipe != dev_priv->warp_pipe) {
- mga_g200_emit_pipe(dev_priv);
- dev_priv->warp_pipe = sarea_priv->warp_pipe;
- }
-
- if (dirty & MGA_UPLOAD_CONTEXT) {
- mga_g200_emit_context(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
- }
-
- if (dirty & MGA_UPLOAD_TEX0) {
- mga_g200_emit_tex0(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
- }
-}
-
-static void mga_g400_emit_state(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int dirty = sarea_priv->dirty;
- int multitex = sarea_priv->warp_pipe & MGA_T2;
-
- if (sarea_priv->warp_pipe != dev_priv->warp_pipe) {
- mga_g400_emit_pipe(dev_priv);
- dev_priv->warp_pipe = sarea_priv->warp_pipe;
- }
-
- if (dirty & MGA_UPLOAD_CONTEXT) {
- mga_g400_emit_context(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
- }
-
- if (dirty & MGA_UPLOAD_TEX0) {
- mga_g400_emit_tex0(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
- }
-
- if ((dirty & MGA_UPLOAD_TEX1) && multitex) {
- mga_g400_emit_tex1(dev_priv);
- sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
- }
-}
-
-/* ================================================================
- * SAREA state verification
- */
-
-/* Disallow all write destinations except the front and backbuffer.
- */
-static int mga_verify_context(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
-
- if (ctx->dstorg != dev_priv->front_offset &&
- ctx->dstorg != dev_priv->back_offset) {
- DRM_ERROR("*** bad DSTORG: %x (front %x, back %x)\n\n",
- ctx->dstorg, dev_priv->front_offset,
- dev_priv->back_offset);
- ctx->dstorg = 0;
- return -EINVAL;
- }
-
- return 0;
-}
-
-/* Disallow texture reads from PCI space.
- */
-static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
- unsigned int org;
-
- org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK);
-
- if (org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI)) {
- DRM_ERROR("*** bad TEXORG: 0x%x, unit %d\n", tex->texorg, unit);
- tex->texorg = 0;
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int mga_verify_state(drm_mga_private_t * dev_priv)
-{
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int dirty = sarea_priv->dirty;
- int ret = 0;
-
- if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
-
- if (dirty & MGA_UPLOAD_CONTEXT)
- ret |= mga_verify_context(dev_priv);
-
- if (dirty & MGA_UPLOAD_TEX0)
- ret |= mga_verify_tex(dev_priv, 0);
-
- if (dev_priv->chipset >= MGA_CARD_TYPE_G400) {
- if (dirty & MGA_UPLOAD_TEX1)
- ret |= mga_verify_tex(dev_priv, 1);
-
- if (dirty & MGA_UPLOAD_PIPE)
- ret |= (sarea_priv->warp_pipe > MGA_MAX_G400_PIPES);
- } else {
- if (dirty & MGA_UPLOAD_PIPE)
- ret |= (sarea_priv->warp_pipe > MGA_MAX_G200_PIPES);
- }
-
- return (ret == 0);
-}
-
-static int mga_verify_iload(drm_mga_private_t * dev_priv,
- unsigned int dstorg, unsigned int length)
-{
- if (dstorg < dev_priv->texture_offset ||
- dstorg + length > (dev_priv->texture_offset +
- dev_priv->texture_size)) {
- DRM_ERROR("*** bad iload DSTORG: 0x%x\n", dstorg);
- return -EINVAL;
- }
-
- if (length & MGA_ILOAD_MASK) {
- DRM_ERROR("*** bad iload length: 0x%x\n",
- length & MGA_ILOAD_MASK);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int mga_verify_blit(drm_mga_private_t * dev_priv,
- unsigned int srcorg, unsigned int dstorg)
-{
- if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
- (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM)) {
- DRM_ERROR("*** bad blit: src=0x%x dst=0x%x\n", srcorg, dstorg);
- return -EINVAL;
- }
- return 0;
-}
-
-/* ================================================================
- *
- */
-
-static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * clear)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- int nbox = sarea_priv->nbox;
- int i;
- DMA_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_DMA(1);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DWGSYNC, 0x00007100,
- MGA_DWGSYNC, 0x00007000);
-
- ADVANCE_DMA();
-
- for (i = 0; i < nbox; i++) {
- struct drm_clip_rect *box = &pbox[i];
- u32 height = box->y2 - box->y1;
-
- DRM_DEBUG(" from=%d,%d to=%d,%d\n",
- box->x1, box->y1, box->x2, box->y2);
-
- if (clear->flags & MGA_FRONT) {
- BEGIN_DMA(2);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_PLNWT, clear->color_mask,
- MGA_YDSTLEN, (box->y1 << 16) | height,
- MGA_FXBNDRY, (box->x2 << 16) | box->x1);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_FCOL, clear->clear_color,
- MGA_DSTORG, dev_priv->front_offset,
- MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd);
-
- ADVANCE_DMA();
- }
-
- if (clear->flags & MGA_BACK) {
- BEGIN_DMA(2);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_PLNWT, clear->color_mask,
- MGA_YDSTLEN, (box->y1 << 16) | height,
- MGA_FXBNDRY, (box->x2 << 16) | box->x1);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_FCOL, clear->clear_color,
- MGA_DSTORG, dev_priv->back_offset,
- MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd);
-
- ADVANCE_DMA();
- }
-
- if (clear->flags & MGA_DEPTH) {
- BEGIN_DMA(2);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_PLNWT, clear->depth_mask,
- MGA_YDSTLEN, (box->y1 << 16) | height,
- MGA_FXBNDRY, (box->x2 << 16) | box->x1);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_FCOL, clear->clear_depth,
- MGA_DSTORG, dev_priv->depth_offset,
- MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd);
-
- ADVANCE_DMA();
- }
-
- }
-
- BEGIN_DMA(1);
-
- /* Force reset of DWGCTL */
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_PLNWT, ctx->plnwt,
- MGA_DWGCTL, ctx->dwgctl);
-
- ADVANCE_DMA();
-
- FLUSH_DMA();
-}
-
-static void mga_dma_dispatch_swap(struct drm_device * dev)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- int nbox = sarea_priv->nbox;
- int i;
- DMA_LOCALS;
- DRM_DEBUG("\n");
-
- sarea_priv->last_frame.head = dev_priv->prim.tail;
- sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap;
-
- BEGIN_DMA(4 + nbox);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DWGSYNC, 0x00007100,
- MGA_DWGSYNC, 0x00007000);
-
- DMA_BLOCK(MGA_DSTORG, dev_priv->front_offset,
- MGA_MACCESS, dev_priv->maccess,
- MGA_SRCORG, dev_priv->back_offset,
- MGA_AR5, dev_priv->front_pitch);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_PLNWT, 0xffffffff,
- MGA_DWGCTL, MGA_DWGCTL_COPY);
-
- for (i = 0; i < nbox; i++) {
- struct drm_clip_rect *box = &pbox[i];
- u32 height = box->y2 - box->y1;
- u32 start = box->y1 * dev_priv->front_pitch;
-
- DRM_DEBUG(" from=%d,%d to=%d,%d\n",
- box->x1, box->y1, box->x2, box->y2);
-
- DMA_BLOCK(MGA_AR0, start + box->x2 - 1,
- MGA_AR3, start + box->x1,
- MGA_FXBNDRY, ((box->x2 - 1) << 16) | box->x1,
- MGA_YDSTLEN + MGA_EXEC, (box->y1 << 16) | height);
- }
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_PLNWT, ctx->plnwt,
- MGA_SRCORG, dev_priv->front_offset,
- MGA_DWGCTL, ctx->dwgctl);
-
- ADVANCE_DMA();
-
- FLUSH_DMA();
-
- DRM_DEBUG("... done.\n");
-}
-
-static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_buf_priv_t *buf_priv = buf->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- u32 address = (u32) buf->bus_address;
- u32 length = (u32) buf->used;
- int i = 0;
- DMA_LOCALS;
- DRM_DEBUG("buf=%d used=%d\n", buf->idx, buf->used);
-
- if (buf->used) {
- buf_priv->dispatched = 1;
-
- MGA_EMIT_STATE(dev_priv, sarea_priv->dirty);
-
- do {
- if (i < sarea_priv->nbox) {
- mga_emit_clip_rect(dev_priv,
- &sarea_priv->boxes[i]);
- }
-
- BEGIN_DMA(1);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_SECADDRESS, (address |
- MGA_DMA_VERTEX),
- MGA_SECEND, ((address + length) |
- dev_priv->dma_access));
-
- ADVANCE_DMA();
- } while (++i < sarea_priv->nbox);
- }
-
- if (buf_priv->discard) {
- AGE_BUFFER(buf_priv);
- buf->pending = 0;
- buf->used = 0;
- buf_priv->dispatched = 0;
-
- mga_freelist_put(dev, buf);
- }
-
- FLUSH_DMA();
-}
-
-static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * buf,
- unsigned int start, unsigned int end)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_buf_priv_t *buf_priv = buf->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- u32 address = (u32) buf->bus_address;
- int i = 0;
- DMA_LOCALS;
- DRM_DEBUG("buf=%d start=%d end=%d\n", buf->idx, start, end);
-
- if (start != end) {
- buf_priv->dispatched = 1;
-
- MGA_EMIT_STATE(dev_priv, sarea_priv->dirty);
-
- do {
- if (i < sarea_priv->nbox) {
- mga_emit_clip_rect(dev_priv,
- &sarea_priv->boxes[i]);
- }
-
- BEGIN_DMA(1);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_SETUPADDRESS, address + start,
- MGA_SETUPEND, ((address + end) |
- dev_priv->dma_access));
-
- ADVANCE_DMA();
- } while (++i < sarea_priv->nbox);
- }
-
- if (buf_priv->discard) {
- AGE_BUFFER(buf_priv);
- buf->pending = 0;
- buf->used = 0;
- buf_priv->dispatched = 0;
-
- mga_freelist_put(dev, buf);
- }
-
- FLUSH_DMA();
-}
-
-/* This copies a 64 byte aligned agp region to the frambuffer with a
- * standard blit, the ioctl needs to do checking.
- */
-static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf,
- unsigned int dstorg, unsigned int length)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_buf_priv_t *buf_priv = buf->dev_private;
- drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state;
- u32 srcorg = buf->bus_address | dev_priv->dma_access | MGA_SRCMAP_SYSMEM;
- u32 y2;
- DMA_LOCALS;
- DRM_DEBUG("buf=%d used=%d\n", buf->idx, buf->used);
-
- y2 = length / 64;
-
- BEGIN_DMA(5);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DWGSYNC, 0x00007100,
- MGA_DWGSYNC, 0x00007000);
-
- DMA_BLOCK(MGA_DSTORG, dstorg,
- MGA_MACCESS, 0x00000000,
- MGA_SRCORG, srcorg,
- MGA_AR5, 64);
-
- DMA_BLOCK(MGA_PITCH, 64,
- MGA_PLNWT, 0xffffffff,
- MGA_DMAPAD, 0x00000000,
- MGA_DWGCTL, MGA_DWGCTL_COPY);
-
- DMA_BLOCK(MGA_AR0, 63,
- MGA_AR3, 0,
- MGA_FXBNDRY, (63 << 16) | 0,
- MGA_YDSTLEN + MGA_EXEC, y2);
-
- DMA_BLOCK(MGA_PLNWT, ctx->plnwt,
- MGA_SRCORG, dev_priv->front_offset,
- MGA_PITCH, dev_priv->front_pitch,
- MGA_DWGSYNC, 0x00007000);
-
- ADVANCE_DMA();
-
- AGE_BUFFER(buf_priv);
-
- buf->pending = 0;
- buf->used = 0;
- buf_priv->dispatched = 0;
-
- mga_freelist_put(dev, buf);
-
- FLUSH_DMA();
-}
-
-static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- int nbox = sarea_priv->nbox;
- u32 scandir = 0, i;
- DMA_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_DMA(4 + nbox);
-
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DWGSYNC, 0x00007100,
- MGA_DWGSYNC, 0x00007000);
-
- DMA_BLOCK(MGA_DWGCTL, MGA_DWGCTL_COPY,
- MGA_PLNWT, blit->planemask,
- MGA_SRCORG, blit->srcorg,
- MGA_DSTORG, blit->dstorg);
-
- DMA_BLOCK(MGA_SGN, scandir,
- MGA_MACCESS, dev_priv->maccess,
- MGA_AR5, blit->ydir * blit->src_pitch,
- MGA_PITCH, blit->dst_pitch);
-
- for (i = 0; i < nbox; i++) {
- int srcx = pbox[i].x1 + blit->delta_sx;
- int srcy = pbox[i].y1 + blit->delta_sy;
- int dstx = pbox[i].x1 + blit->delta_dx;
- int dsty = pbox[i].y1 + blit->delta_dy;
- int h = pbox[i].y2 - pbox[i].y1;
- int w = pbox[i].x2 - pbox[i].x1 - 1;
- int start;
-
- if (blit->ydir == -1) {
- srcy = blit->height - srcy - 1;
- }
-
- start = srcy * blit->src_pitch + srcx;
-
- DMA_BLOCK(MGA_AR0, start + w,
- MGA_AR3, start,
- MGA_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff),
- MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h);
- }
-
- /* Do something to flush AGP?
- */
-
- /* Force reset of DWGCTL */
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_PLNWT, ctx->plnwt,
- MGA_PITCH, dev_priv->front_pitch,
- MGA_DWGCTL, ctx->dwgctl);
-
- ADVANCE_DMA();
-}
-
-/* ================================================================
- *
- */
-
-static int mga_dma_clear(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_clear_t *clear = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
-
- WRAP_TEST_WITH_RETURN(dev_priv);
-
- mga_dma_dispatch_clear(dev, clear);
-
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
-
- return 0;
-}
-
-static int mga_dma_swap(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
-
- WRAP_TEST_WITH_RETURN(dev_priv);
-
- mga_dma_dispatch_swap(dev);
-
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
-
- return 0;
-}
-
-static int mga_dma_vertex(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_mga_buf_priv_t *buf_priv;
- drm_mga_vertex_t *vertex = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (vertex->idx < 0 || vertex->idx > dma->buf_count)
- return -EINVAL;
- buf = dma->buflist[vertex->idx];
- buf_priv = buf->dev_private;
-
- buf->used = vertex->used;
- buf_priv->discard = vertex->discard;
-
- if (!mga_verify_state(dev_priv)) {
- if (vertex->discard) {
- if (buf_priv->dispatched == 1)
- AGE_BUFFER(buf_priv);
- buf_priv->dispatched = 0;
- mga_freelist_put(dev, buf);
- }
- return -EINVAL;
- }
-
- WRAP_TEST_WITH_RETURN(dev_priv);
-
- mga_dma_dispatch_vertex(dev, buf);
-
- return 0;
-}
-
-static int mga_dma_indices(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_mga_buf_priv_t *buf_priv;
- drm_mga_indices_t *indices = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (indices->idx < 0 || indices->idx > dma->buf_count)
- return -EINVAL;
-
- buf = dma->buflist[indices->idx];
- buf_priv = buf->dev_private;
-
- buf_priv->discard = indices->discard;
-
- if (!mga_verify_state(dev_priv)) {
- if (indices->discard) {
- if (buf_priv->dispatched == 1)
- AGE_BUFFER(buf_priv);
- buf_priv->dispatched = 0;
- mga_freelist_put(dev, buf);
- }
- return -EINVAL;
- }
-
- WRAP_TEST_WITH_RETURN(dev_priv);
-
- mga_dma_dispatch_indices(dev, buf, indices->start, indices->end);
-
- return 0;
-}
-
-static int mga_dma_iload(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_mga_private_t *dev_priv = dev->dev_private;
- struct drm_buf *buf;
- drm_mga_buf_priv_t *buf_priv;
- drm_mga_iload_t *iload = data;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
-#if 0
- if (mga_do_wait_for_idle(dev_priv) < 0) {
- if (MGA_DMA_DEBUG)
- DRM_INFO("-EBUSY\n");
- return -EBUSY;
- }
-#endif
- if (iload->idx < 0 || iload->idx > dma->buf_count)
- return -EINVAL;
-
- buf = dma->buflist[iload->idx];
- buf_priv = buf->dev_private;
-
- if (mga_verify_iload(dev_priv, iload->dstorg, iload->length)) {
- mga_freelist_put(dev, buf);
- return -EINVAL;
- }
-
- WRAP_TEST_WITH_RETURN(dev_priv);
-
- mga_dma_dispatch_iload(dev, buf, iload->dstorg, iload->length);
-
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
-
- return 0;
-}
-
-static int mga_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_mga_blit_t *blit = data;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
-
- if (mga_verify_blit(dev_priv, blit->srcorg, blit->dstorg))
- return -EINVAL;
-
- WRAP_TEST_WITH_RETURN(dev_priv);
-
- mga_dma_dispatch_blit(dev, blit);
-
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
-
- return 0;
-}
-
-static int mga_getparam(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- drm_mga_getparam_t *param = data;
- int value;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
-
- switch (param->param) {
- case MGA_PARAM_IRQ_NR:
- value = dev->irq;
- break;
- case MGA_PARAM_CARD_TYPE:
- value = dev_priv->chipset;
- break;
- default:
- return -EINVAL;
- }
-
- if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
- DRM_ERROR("copy_to_user\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-static int mga_set_fence(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- u32 *fence = data;
- DMA_LOCALS;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
-
- /* I would normal do this assignment in the declaration of fence,
- * but dev_priv may be NULL.
- */
-
- *fence = dev_priv->next_fence_to_post;
- dev_priv->next_fence_to_post++;
-
- BEGIN_DMA(1);
- DMA_BLOCK(MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_DMAPAD, 0x00000000,
- MGA_SOFTRAP, 0x00000000);
- ADVANCE_DMA();
-
- return 0;
-}
-
-static int mga_wait_fence(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_mga_private_t *dev_priv = dev->dev_private;
- u32 *fence = data;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
-
- mga_driver_fence_wait(dev, fence);
-
- return 0;
-}
-
-struct drm_ioctl_desc mga_ioctls[] = {
- DRM_IOCTL_DEF(DRM_MGA_INIT, mga_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_MGA_FLUSH, mga_dma_flush, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_RESET, mga_dma_reset, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_SWAP, mga_dma_swap, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_CLEAR, mga_dma_clear, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_VERTEX, mga_dma_vertex, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_INDICES, mga_dma_indices, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_ILOAD, mga_dma_iload, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_BLIT, mga_dma_blit, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_GETPARAM, mga_getparam, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_SET_FENCE, mga_set_fence, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_WAIT_FENCE, mga_wait_fence, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_MGA_DMA_BOOTSTRAP, mga_dma_bootstrap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-
-};
-
-int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls);
+++ /dev/null
-/* mga_ucode.h -- Matrox G200/G400 WARP engine microcode -*- linux-c -*-
- * Created: Thu Jan 11 21:20:43 2001 by gareth@valinux.com
- *
- * Copyright 1999 Matrox Graphics Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * MATROX GRAPHICS INC., OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
- * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Kernel-based WARP engine management:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-/*
- * WARP pipes are named according to the functions they perform, where:
- *
- * - T stands for computation of texture stage 0
- * - T2 stands for computation of both texture stage 0 and texture stage 1
- * - G stands for computation of triangle intensity (Gouraud interpolation)
- * - Z stands for computation of Z buffer interpolation
- * - S stands for computation of specular highlight
- * - A stands for computation of the alpha channel
- * - F stands for computation of vertex fog interpolation
- */
-
-static unsigned char warp_g200_tgz[] = {
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x98, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x81, 0x04,
- 0x89, 0x04,
- 0x01, 0x04,
- 0x09, 0x04,
-
- 0xC9, 0x41, 0xC0, 0xEC,
- 0x11, 0x04,
- 0x00, 0xE0,
-
- 0x41, 0xCC, 0x41, 0xCD,
- 0x49, 0xCC, 0x49, 0xCD,
-
- 0xD1, 0x41, 0xC0, 0xEC,
- 0x51, 0xCC, 0x51, 0xCD,
-
- 0x80, 0x04,
- 0x10, 0x04,
- 0x08, 0x04,
- 0x00, 0xE0,
-
- 0x00, 0xCC, 0xC0, 0xCD,
- 0xD1, 0x49, 0xC0, 0xEC,
-
- 0x8A, 0x1F, 0x20, 0xE9,
- 0x8B, 0x3F, 0x20, 0xE9,
-
- 0x41, 0x3C, 0x41, 0xAD,
- 0x49, 0x3C, 0x49, 0xAD,
-
- 0x10, 0xCC, 0x10, 0xCD,
- 0x08, 0xCC, 0x08, 0xCD,
-
- 0xB9, 0x41, 0x49, 0xBB,
- 0x1F, 0xF0, 0x41, 0xCD,
-
- 0x51, 0x3C, 0x51, 0xAD,
- 0x00, 0x98, 0x80, 0xE9,
-
- 0x72, 0x80, 0x07, 0xEA,
- 0x24, 0x1F, 0x20, 0xE9,
-
- 0x15, 0x41, 0x49, 0xBD,
- 0x1D, 0x41, 0x51, 0xBD,
-
- 0x2E, 0x41, 0x2A, 0xB8,
- 0x34, 0x53, 0xA0, 0xE8,
-
- 0x15, 0x30,
- 0x1D, 0x30,
- 0x58, 0xE3,
- 0x00, 0xE0,
-
- 0xB5, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x24, 0x43, 0xA0, 0xE8,
- 0x2C, 0x4B, 0xA0, 0xE8,
-
- 0x15, 0x72,
- 0x09, 0xE3,
- 0x00, 0xE0,
- 0x1D, 0x72,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0x97, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6C, 0x64, 0xC8, 0xEC,
- 0x98, 0xE1,
- 0xB5, 0x05,
-
- 0xBD, 0x05,
- 0x2E, 0x30,
- 0x32, 0xC0, 0xA0, 0xE8,
-
- 0x33, 0xC0, 0xA0, 0xE8,
- 0x74, 0x64, 0xC8, 0xEC,
-
- 0x40, 0x3C, 0x40, 0xAD,
- 0x32, 0x6A,
- 0x2A, 0x30,
-
- 0x20, 0x73,
- 0x33, 0x6A,
- 0x00, 0xE0,
- 0x28, 0x73,
-
- 0x1C, 0x72,
- 0x83, 0xE2,
- 0x60, 0x80, 0x15, 0xEA,
-
- 0xB8, 0x3D, 0x28, 0xDF,
- 0x30, 0x35, 0x20, 0xDF,
-
- 0x40, 0x30,
- 0x00, 0xE0,
- 0xCC, 0xE2,
- 0x64, 0x72,
-
- 0x25, 0x42, 0x52, 0xBF,
- 0x2D, 0x42, 0x4A, 0xBF,
-
- 0x30, 0x2E, 0x30, 0xDF,
- 0x38, 0x2E, 0x38, 0xDF,
-
- 0x18, 0x1D, 0x45, 0xE9,
- 0x1E, 0x15, 0x45, 0xE9,
-
- 0x2B, 0x49, 0x51, 0xBD,
- 0x00, 0xE0,
- 0x1F, 0x73,
-
- 0x38, 0x38, 0x40, 0xAF,
- 0x30, 0x30, 0x40, 0xAF,
-
- 0x24, 0x1F, 0x24, 0xDF,
- 0x1D, 0x32, 0x20, 0xE9,
-
- 0x2C, 0x1F, 0x2C, 0xDF,
- 0x1A, 0x33, 0x20, 0xE9,
-
- 0xB0, 0x10,
- 0x08, 0xE3,
- 0x40, 0x10,
- 0xB8, 0x10,
-
- 0x26, 0xF0, 0x30, 0xCD,
- 0x2F, 0xF0, 0x38, 0xCD,
-
- 0x2B, 0x80, 0x20, 0xE9,
- 0x2A, 0x80, 0x20, 0xE9,
-
- 0xA6, 0x20,
- 0x88, 0xE2,
- 0x00, 0xE0,
- 0xAF, 0x20,
-
- 0x28, 0x2A, 0x26, 0xAF,
- 0x20, 0x2A, 0xC0, 0xAF,
-
- 0x34, 0x1F, 0x34, 0xDF,
- 0x46, 0x24, 0x46, 0xDF,
-
- 0x28, 0x30, 0x80, 0xBF,
- 0x20, 0x38, 0x80, 0xBF,
-
- 0x47, 0x24, 0x47, 0xDF,
- 0x4E, 0x2C, 0x4E, 0xDF,
-
- 0x4F, 0x2C, 0x4F, 0xDF,
- 0x56, 0x34, 0x56, 0xDF,
-
- 0x28, 0x15, 0x28, 0xDF,
- 0x20, 0x1D, 0x20, 0xDF,
-
- 0x57, 0x34, 0x57, 0xDF,
- 0x00, 0xE0,
- 0x1D, 0x05,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x89, 0xE2,
- 0x2B, 0x30,
-
- 0x3F, 0xC1, 0x1D, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x68,
- 0xBF, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x20, 0xC0, 0x20, 0xAF,
- 0x28, 0x05,
- 0x97, 0x74,
-
- 0x00, 0xE0,
- 0x2A, 0x10,
- 0x16, 0xC0, 0x20, 0xE9,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x8C, 0xE2,
- 0x95, 0x05,
-
- 0x28, 0xC1, 0x28, 0xAD,
- 0x1F, 0xC1, 0x15, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA8, 0x67,
- 0x9F, 0x6B,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x28, 0xC0, 0x28, 0xAD,
- 0x1D, 0x25,
- 0x20, 0x05,
-
- 0x28, 0x32, 0x80, 0xAD,
- 0x40, 0x2A, 0x40, 0xBD,
-
- 0x1C, 0x80, 0x20, 0xE9,
- 0x20, 0x33, 0x20, 0xAD,
-
- 0x20, 0x73,
- 0x00, 0xE0,
- 0xB6, 0x49, 0x51, 0xBB,
-
- 0x26, 0x2F, 0xB0, 0xE8,
- 0x19, 0x20, 0x20, 0xE9,
-
- 0x35, 0x20, 0x35, 0xDF,
- 0x3D, 0x20, 0x3D, 0xDF,
-
- 0x15, 0x20, 0x15, 0xDF,
- 0x1D, 0x20, 0x1D, 0xDF,
-
- 0x26, 0xD0, 0x26, 0xCD,
- 0x29, 0x49, 0x2A, 0xB8,
-
- 0x26, 0x40, 0x80, 0xBD,
- 0x3B, 0x48, 0x50, 0xBD,
-
- 0x3E, 0x54, 0x57, 0x9F,
- 0x00, 0xE0,
- 0x82, 0xE1,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x26, 0x30,
- 0x29, 0x30,
- 0x48, 0x3C, 0x48, 0xAD,
-
- 0x2B, 0x72,
- 0xC2, 0xE1,
- 0x2C, 0xC0, 0x44, 0xC2,
-
- 0x05, 0x24, 0x34, 0xBF,
- 0x0D, 0x24, 0x2C, 0xBF,
-
- 0x2D, 0x46, 0x4E, 0xBF,
- 0x25, 0x46, 0x56, 0xBF,
-
- 0x20, 0x1D, 0x6F, 0x8F,
- 0x32, 0x3E, 0x5F, 0xE9,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x30,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x33, 0x1E, 0x5F, 0xE9,
-
- 0x05, 0x44, 0x54, 0xB2,
- 0x0D, 0x44, 0x4C, 0xB2,
-
- 0x19, 0xC0, 0xB0, 0xE8,
- 0x34, 0xC0, 0x44, 0xC4,
-
- 0x33, 0x73,
- 0x00, 0xE0,
- 0x3E, 0x62, 0x57, 0x9F,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0xE0,
- 0x0D, 0x20,
-
- 0x84, 0x3E, 0x58, 0xE9,
- 0x28, 0x1D, 0x6F, 0x8F,
-
- 0x05, 0x20,
- 0x00, 0xE0,
- 0x85, 0x1E, 0x58, 0xE9,
-
- 0x9B, 0x3B, 0x33, 0xDF,
- 0x20, 0x20, 0x42, 0xAF,
-
- 0x30, 0x42, 0x56, 0x9F,
- 0x80, 0x3E, 0x57, 0xE9,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x30, 0x80, 0x5F, 0xE9,
-
- 0x28, 0x28, 0x24, 0xAF,
- 0x81, 0x1E, 0x57, 0xE9,
-
- 0x05, 0x47, 0x57, 0xBF,
- 0x0D, 0x47, 0x4F, 0xBF,
-
- 0x88, 0x80, 0x58, 0xE9,
- 0x1B, 0x29, 0x1B, 0xDF,
-
- 0x30, 0x1D, 0x6F, 0x8F,
- 0x3A, 0x30, 0x4F, 0xE9,
-
- 0x1C, 0x30, 0x26, 0xDF,
- 0x09, 0xE3,
- 0x3B, 0x05,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x3B, 0x3F, 0x4F, 0xE9,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x00, 0xE0,
- 0xAC, 0x20,
-
- 0x2D, 0x44, 0x4C, 0xB4,
- 0x2C, 0x1C, 0xC0, 0xAF,
-
- 0x25, 0x44, 0x54, 0xB4,
- 0x00, 0xE0,
- 0xC8, 0x30,
-
- 0x30, 0x46, 0x30, 0xAF,
- 0x1B, 0x1B, 0x48, 0xAF,
-
- 0x00, 0xE0,
- 0x25, 0x20,
- 0x38, 0x2C, 0x4F, 0xE9,
-
- 0x86, 0x80, 0x57, 0xE9,
- 0x38, 0x1D, 0x6F, 0x8F,
-
- 0x28, 0x74,
- 0x00, 0xE0,
- 0x0D, 0x44, 0x4C, 0xB0,
-
- 0x05, 0x44, 0x54, 0xB0,
- 0x2D, 0x20,
- 0x9B, 0x10,
-
- 0x82, 0x3E, 0x57, 0xE9,
- 0x32, 0xF0, 0x1B, 0xCD,
-
- 0x1E, 0xBD, 0x59, 0x9F,
- 0x83, 0x1E, 0x57, 0xE9,
-
- 0x38, 0x47, 0x38, 0xAF,
- 0x34, 0x20,
- 0x2A, 0x30,
-
- 0x00, 0xE0,
- 0x0D, 0x20,
- 0x32, 0x20,
- 0x05, 0x20,
-
- 0x87, 0x80, 0x57, 0xE9,
- 0x1F, 0x54, 0x57, 0x9F,
-
- 0x17, 0x42, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x6A,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x37, 0x1E, 0x4F, 0xE9,
-
- 0x37, 0x32, 0x2A, 0xAF,
- 0x00, 0xE0,
- 0x32, 0x00,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x27, 0xC0, 0x44, 0xC0,
-
- 0x36, 0x1F, 0x4F, 0xE9,
- 0x1F, 0x1F, 0x26, 0xDF,
-
- 0x37, 0x1B, 0x37, 0xBF,
- 0x17, 0x26, 0x17, 0xDF,
-
- 0x3E, 0x17, 0x4F, 0xE9,
- 0x3F, 0x3F, 0x4F, 0xE9,
-
- 0x34, 0x1F, 0x34, 0xAF,
- 0x2B, 0x05,
- 0xA7, 0x20,
-
- 0x33, 0x2B, 0x37, 0xDF,
- 0x27, 0x17, 0xC0, 0xAF,
-
- 0x34, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x03, 0x80, 0x0A, 0xEA,
- 0x17, 0xC1, 0x2B, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xB3, 0x68,
- 0x97, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0xC0, 0x33, 0xAF,
- 0x3C, 0x27, 0x4F, 0xE9,
-
- 0x57, 0x39, 0x20, 0xE9,
- 0x28, 0x19, 0x60, 0xEC,
-
- 0x2B, 0x32, 0x20, 0xE9,
- 0x1D, 0x3B, 0x20, 0xE9,
-
- 0xB3, 0x05,
- 0x00, 0xE0,
- 0x16, 0x28, 0x20, 0xE9,
-
- 0x23, 0x3B, 0x33, 0xAD,
- 0x1E, 0x2B, 0x20, 0xE9,
-
- 0x1C, 0x80, 0x20, 0xE9,
- 0x57, 0x36, 0x20, 0xE9,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x90, 0xE2,
- 0x00, 0xE0,
-
- 0x85, 0xFF, 0x20, 0xEA,
- 0x19, 0xC8, 0xC1, 0xCD,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x9F, 0x41, 0x49, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x41, 0x49, 0xBD,
- 0x2D, 0x41, 0x51, 0xBD,
-
- 0x0D, 0x80, 0x07, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x35, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x25, 0x30,
- 0x2D, 0x30,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0xA7, 0x5B, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x84, 0xFF, 0x0A, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC9, 0x41, 0xC8, 0xEC,
- 0x42, 0xE1,
- 0x00, 0xE0,
-
- 0x82, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC8, 0x40, 0xC0, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x7F, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
-};
-
-static unsigned char warp_g200_tgza[] = {
-
- 0x00, 0x98, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x81, 0x04,
- 0x89, 0x04,
- 0x01, 0x04,
- 0x09, 0x04,
-
- 0xC9, 0x41, 0xC0, 0xEC,
- 0x11, 0x04,
- 0x00, 0xE0,
-
- 0x41, 0xCC, 0x41, 0xCD,
- 0x49, 0xCC, 0x49, 0xCD,
-
- 0xD1, 0x41, 0xC0, 0xEC,
- 0x51, 0xCC, 0x51, 0xCD,
-
- 0x80, 0x04,
- 0x10, 0x04,
- 0x08, 0x04,
- 0x00, 0xE0,
-
- 0x00, 0xCC, 0xC0, 0xCD,
- 0xD1, 0x49, 0xC0, 0xEC,
-
- 0x8A, 0x1F, 0x20, 0xE9,
- 0x8B, 0x3F, 0x20, 0xE9,
-
- 0x41, 0x3C, 0x41, 0xAD,
- 0x49, 0x3C, 0x49, 0xAD,
-
- 0x10, 0xCC, 0x10, 0xCD,
- 0x08, 0xCC, 0x08, 0xCD,
-
- 0xB9, 0x41, 0x49, 0xBB,
- 0x1F, 0xF0, 0x41, 0xCD,
-
- 0x51, 0x3C, 0x51, 0xAD,
- 0x00, 0x98, 0x80, 0xE9,
-
- 0x7D, 0x80, 0x07, 0xEA,
- 0x24, 0x1F, 0x20, 0xE9,
-
- 0x15, 0x41, 0x49, 0xBD,
- 0x1D, 0x41, 0x51, 0xBD,
-
- 0x2E, 0x41, 0x2A, 0xB8,
- 0x34, 0x53, 0xA0, 0xE8,
-
- 0x15, 0x30,
- 0x1D, 0x30,
- 0x58, 0xE3,
- 0x00, 0xE0,
-
- 0xB5, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x24, 0x43, 0xA0, 0xE8,
- 0x2C, 0x4B, 0xA0, 0xE8,
-
- 0x15, 0x72,
- 0x09, 0xE3,
- 0x00, 0xE0,
- 0x1D, 0x72,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0x97, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6C, 0x64, 0xC8, 0xEC,
- 0x98, 0xE1,
- 0xB5, 0x05,
-
- 0xBD, 0x05,
- 0x2E, 0x30,
- 0x32, 0xC0, 0xA0, 0xE8,
-
- 0x33, 0xC0, 0xA0, 0xE8,
- 0x74, 0x64, 0xC8, 0xEC,
-
- 0x40, 0x3C, 0x40, 0xAD,
- 0x32, 0x6A,
- 0x2A, 0x30,
-
- 0x20, 0x73,
- 0x33, 0x6A,
- 0x00, 0xE0,
- 0x28, 0x73,
-
- 0x1C, 0x72,
- 0x83, 0xE2,
- 0x6B, 0x80, 0x15, 0xEA,
-
- 0xB8, 0x3D, 0x28, 0xDF,
- 0x30, 0x35, 0x20, 0xDF,
-
- 0x40, 0x30,
- 0x00, 0xE0,
- 0xCC, 0xE2,
- 0x64, 0x72,
-
- 0x25, 0x42, 0x52, 0xBF,
- 0x2D, 0x42, 0x4A, 0xBF,
-
- 0x30, 0x2E, 0x30, 0xDF,
- 0x38, 0x2E, 0x38, 0xDF,
-
- 0x18, 0x1D, 0x45, 0xE9,
- 0x1E, 0x15, 0x45, 0xE9,
-
- 0x2B, 0x49, 0x51, 0xBD,
- 0x00, 0xE0,
- 0x1F, 0x73,
-
- 0x38, 0x38, 0x40, 0xAF,
- 0x30, 0x30, 0x40, 0xAF,
-
- 0x24, 0x1F, 0x24, 0xDF,
- 0x1D, 0x32, 0x20, 0xE9,
-
- 0x2C, 0x1F, 0x2C, 0xDF,
- 0x1A, 0x33, 0x20, 0xE9,
-
- 0xB0, 0x10,
- 0x08, 0xE3,
- 0x40, 0x10,
- 0xB8, 0x10,
-
- 0x26, 0xF0, 0x30, 0xCD,
- 0x2F, 0xF0, 0x38, 0xCD,
-
- 0x2B, 0x80, 0x20, 0xE9,
- 0x2A, 0x80, 0x20, 0xE9,
-
- 0xA6, 0x20,
- 0x88, 0xE2,
- 0x00, 0xE0,
- 0xAF, 0x20,
-
- 0x28, 0x2A, 0x26, 0xAF,
- 0x20, 0x2A, 0xC0, 0xAF,
-
- 0x34, 0x1F, 0x34, 0xDF,
- 0x46, 0x24, 0x46, 0xDF,
-
- 0x28, 0x30, 0x80, 0xBF,
- 0x20, 0x38, 0x80, 0xBF,
-
- 0x47, 0x24, 0x47, 0xDF,
- 0x4E, 0x2C, 0x4E, 0xDF,
-
- 0x4F, 0x2C, 0x4F, 0xDF,
- 0x56, 0x34, 0x56, 0xDF,
-
- 0x28, 0x15, 0x28, 0xDF,
- 0x20, 0x1D, 0x20, 0xDF,
-
- 0x57, 0x34, 0x57, 0xDF,
- 0x00, 0xE0,
- 0x1D, 0x05,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x89, 0xE2,
- 0x2B, 0x30,
-
- 0x3F, 0xC1, 0x1D, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x68,
- 0xBF, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x20, 0xC0, 0x20, 0xAF,
- 0x28, 0x05,
- 0x97, 0x74,
-
- 0x00, 0xE0,
- 0x2A, 0x10,
- 0x16, 0xC0, 0x20, 0xE9,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x8C, 0xE2,
- 0x95, 0x05,
-
- 0x28, 0xC1, 0x28, 0xAD,
- 0x1F, 0xC1, 0x15, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA8, 0x67,
- 0x9F, 0x6B,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x28, 0xC0, 0x28, 0xAD,
- 0x1D, 0x25,
- 0x20, 0x05,
-
- 0x28, 0x32, 0x80, 0xAD,
- 0x40, 0x2A, 0x40, 0xBD,
-
- 0x1C, 0x80, 0x20, 0xE9,
- 0x20, 0x33, 0x20, 0xAD,
-
- 0x20, 0x73,
- 0x00, 0xE0,
- 0xB6, 0x49, 0x51, 0xBB,
-
- 0x26, 0x2F, 0xB0, 0xE8,
- 0x19, 0x20, 0x20, 0xE9,
-
- 0x35, 0x20, 0x35, 0xDF,
- 0x3D, 0x20, 0x3D, 0xDF,
-
- 0x15, 0x20, 0x15, 0xDF,
- 0x1D, 0x20, 0x1D, 0xDF,
-
- 0x26, 0xD0, 0x26, 0xCD,
- 0x29, 0x49, 0x2A, 0xB8,
-
- 0x26, 0x40, 0x80, 0xBD,
- 0x3B, 0x48, 0x50, 0xBD,
-
- 0x3E, 0x54, 0x57, 0x9F,
- 0x00, 0xE0,
- 0x82, 0xE1,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x26, 0x30,
- 0x29, 0x30,
- 0x48, 0x3C, 0x48, 0xAD,
-
- 0x2B, 0x72,
- 0xC2, 0xE1,
- 0x2C, 0xC0, 0x44, 0xC2,
-
- 0x05, 0x24, 0x34, 0xBF,
- 0x0D, 0x24, 0x2C, 0xBF,
-
- 0x2D, 0x46, 0x4E, 0xBF,
- 0x25, 0x46, 0x56, 0xBF,
-
- 0x20, 0x1D, 0x6F, 0x8F,
- 0x32, 0x3E, 0x5F, 0xE9,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x30,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x33, 0x1E, 0x5F, 0xE9,
-
- 0x05, 0x44, 0x54, 0xB2,
- 0x0D, 0x44, 0x4C, 0xB2,
-
- 0x19, 0xC0, 0xB0, 0xE8,
- 0x34, 0xC0, 0x44, 0xC4,
-
- 0x33, 0x73,
- 0x00, 0xE0,
- 0x3E, 0x62, 0x57, 0x9F,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0xE0,
- 0x0D, 0x20,
-
- 0x84, 0x3E, 0x58, 0xE9,
- 0x28, 0x1D, 0x6F, 0x8F,
-
- 0x05, 0x20,
- 0x00, 0xE0,
- 0x85, 0x1E, 0x58, 0xE9,
-
- 0x9B, 0x3B, 0x33, 0xDF,
- 0x20, 0x20, 0x42, 0xAF,
-
- 0x30, 0x42, 0x56, 0x9F,
- 0x80, 0x3E, 0x57, 0xE9,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x30, 0x80, 0x5F, 0xE9,
-
- 0x28, 0x28, 0x24, 0xAF,
- 0x81, 0x1E, 0x57, 0xE9,
-
- 0x05, 0x47, 0x57, 0xBF,
- 0x0D, 0x47, 0x4F, 0xBF,
-
- 0x88, 0x80, 0x58, 0xE9,
- 0x1B, 0x29, 0x1B, 0xDF,
-
- 0x30, 0x1D, 0x6F, 0x8F,
- 0x3A, 0x30, 0x4F, 0xE9,
-
- 0x1C, 0x30, 0x26, 0xDF,
- 0x09, 0xE3,
- 0x3B, 0x05,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x3B, 0x3F, 0x4F, 0xE9,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x00, 0xE0,
- 0xAC, 0x20,
-
- 0x2D, 0x44, 0x4C, 0xB4,
- 0x2C, 0x1C, 0xC0, 0xAF,
-
- 0x25, 0x44, 0x54, 0xB4,
- 0x00, 0xE0,
- 0xC8, 0x30,
-
- 0x30, 0x46, 0x30, 0xAF,
- 0x1B, 0x1B, 0x48, 0xAF,
-
- 0x00, 0xE0,
- 0x25, 0x20,
- 0x38, 0x2C, 0x4F, 0xE9,
-
- 0x86, 0x80, 0x57, 0xE9,
- 0x38, 0x1D, 0x6F, 0x8F,
-
- 0x28, 0x74,
- 0x00, 0xE0,
- 0x0D, 0x44, 0x4C, 0xB0,
-
- 0x05, 0x44, 0x54, 0xB0,
- 0x2D, 0x20,
- 0x9B, 0x10,
-
- 0x82, 0x3E, 0x57, 0xE9,
- 0x32, 0xF0, 0x1B, 0xCD,
-
- 0x1E, 0xBD, 0x59, 0x9F,
- 0x83, 0x1E, 0x57, 0xE9,
-
- 0x38, 0x47, 0x38, 0xAF,
- 0x34, 0x20,
- 0x2A, 0x30,
-
- 0x00, 0xE0,
- 0x0D, 0x20,
- 0x32, 0x20,
- 0x05, 0x20,
-
- 0x87, 0x80, 0x57, 0xE9,
- 0x1F, 0x54, 0x57, 0x9F,
-
- 0x17, 0x42, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x6A,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x37, 0x1E, 0x4F, 0xE9,
-
- 0x37, 0x32, 0x2A, 0xAF,
- 0x00, 0xE0,
- 0x32, 0x00,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x27, 0xC0, 0x44, 0xC0,
-
- 0x36, 0x1F, 0x4F, 0xE9,
- 0x1F, 0x1F, 0x26, 0xDF,
-
- 0x37, 0x1B, 0x37, 0xBF,
- 0x17, 0x26, 0x17, 0xDF,
-
- 0x3E, 0x17, 0x4F, 0xE9,
- 0x3F, 0x3F, 0x4F, 0xE9,
-
- 0x34, 0x1F, 0x34, 0xAF,
- 0x2B, 0x05,
- 0xA7, 0x20,
-
- 0x33, 0x2B, 0x37, 0xDF,
- 0x27, 0x17, 0xC0, 0xAF,
-
- 0x34, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x2D, 0x44, 0x4C, 0xB6,
- 0x25, 0x44, 0x54, 0xB6,
-
- 0x03, 0x80, 0x2A, 0xEA,
- 0x17, 0xC1, 0x2B, 0xBD,
-
- 0x2D, 0x20,
- 0x25, 0x20,
- 0x07, 0xC0, 0x44, 0xC6,
-
- 0xB3, 0x68,
- 0x97, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0xC0, 0x33, 0xAF,
- 0x3C, 0x27, 0x4F, 0xE9,
-
- 0x1F, 0x62, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x3F, 0x3D, 0x5D, 0x9F,
- 0x00, 0xE0,
- 0x07, 0x20,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x28, 0x19, 0x60, 0xEC,
-
- 0xB3, 0x05,
- 0x00, 0xE0,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x23, 0x3B, 0x33, 0xAD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1F, 0x26, 0x1F, 0xDF,
- 0x9D, 0x1F, 0x4F, 0xE9,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x9E, 0x3F, 0x4F, 0xE9,
-
- 0x07, 0x07, 0x1F, 0xAF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x9C, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x57, 0x39, 0x20, 0xE9,
-
- 0x16, 0x28, 0x20, 0xE9,
- 0x1D, 0x3B, 0x20, 0xE9,
-
- 0x1E, 0x2B, 0x20, 0xE9,
- 0x2B, 0x32, 0x20, 0xE9,
-
- 0x1C, 0x23, 0x20, 0xE9,
- 0x57, 0x36, 0x20, 0xE9,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x90, 0xE2,
- 0x00, 0xE0,
-
- 0x7A, 0xFF, 0x20, 0xEA,
- 0x19, 0xC8, 0xC1, 0xCD,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x9F, 0x41, 0x49, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x41, 0x49, 0xBD,
- 0x2D, 0x41, 0x51, 0xBD,
-
- 0x0D, 0x80, 0x07, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x35, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x25, 0x30,
- 0x2D, 0x30,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0xA7, 0x5B, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x79, 0xFF, 0x0A, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC9, 0x41, 0xC8, 0xEC,
- 0x42, 0xE1,
- 0x00, 0xE0,
-
- 0x77, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC8, 0x40, 0xC0, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x74, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
-};
-
-static unsigned char warp_g200_tgzaf[] = {
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x98, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x81, 0x04,
- 0x89, 0x04,
- 0x01, 0x04,
- 0x09, 0x04,
-
- 0xC9, 0x41, 0xC0, 0xEC,
- 0x11, 0x04,
- 0x00, 0xE0,
-
- 0x41, 0xCC, 0x41, 0xCD,
- 0x49, 0xCC, 0x49, 0xCD,
-
- 0xD1, 0x41, 0xC0, 0xEC,
- 0x51, 0xCC, 0x51, 0xCD,
-
- 0x80, 0x04,
- 0x10, 0x04,
- 0x08, 0x04,
- 0x00, 0xE0,
-
- 0x00, 0xCC, 0xC0, 0xCD,
- 0xD1, 0x49, 0xC0, 0xEC,
-
- 0x8A, 0x1F, 0x20, 0xE9,
- 0x8B, 0x3F, 0x20, 0xE9,
-
- 0x41, 0x3C, 0x41, 0xAD,
- 0x49, 0x3C, 0x49, 0xAD,
-
- 0x10, 0xCC, 0x10, 0xCD,
- 0x08, 0xCC, 0x08, 0xCD,
-
- 0xB9, 0x41, 0x49, 0xBB,
- 0x1F, 0xF0, 0x41, 0xCD,
-
- 0x51, 0x3C, 0x51, 0xAD,
- 0x00, 0x98, 0x80, 0xE9,
-
- 0x83, 0x80, 0x07, 0xEA,
- 0x24, 0x1F, 0x20, 0xE9,
-
- 0x21, 0x45, 0x80, 0xE8,
- 0x1A, 0x4D, 0x80, 0xE8,
-
- 0x31, 0x55, 0x80, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0x41, 0x49, 0xBD,
- 0x1D, 0x41, 0x51, 0xBD,
-
- 0x2E, 0x41, 0x2A, 0xB8,
- 0x34, 0x53, 0xA0, 0xE8,
-
- 0x15, 0x30,
- 0x1D, 0x30,
- 0x58, 0xE3,
- 0x00, 0xE0,
-
- 0xB5, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x24, 0x43, 0xA0, 0xE8,
- 0x2C, 0x4B, 0xA0, 0xE8,
-
- 0x15, 0x72,
- 0x09, 0xE3,
- 0x00, 0xE0,
- 0x1D, 0x72,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0x97, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6C, 0x64, 0xC8, 0xEC,
- 0x98, 0xE1,
- 0xB5, 0x05,
-
- 0xBD, 0x05,
- 0x2E, 0x30,
- 0x32, 0xC0, 0xA0, 0xE8,
-
- 0x33, 0xC0, 0xA0, 0xE8,
- 0x74, 0x64, 0xC8, 0xEC,
-
- 0x40, 0x3C, 0x40, 0xAD,
- 0x32, 0x6A,
- 0x2A, 0x30,
-
- 0x20, 0x73,
- 0x33, 0x6A,
- 0x00, 0xE0,
- 0x28, 0x73,
-
- 0x1C, 0x72,
- 0x83, 0xE2,
- 0x6F, 0x80, 0x15, 0xEA,
-
- 0xB8, 0x3D, 0x28, 0xDF,
- 0x30, 0x35, 0x20, 0xDF,
-
- 0x40, 0x30,
- 0x00, 0xE0,
- 0xCC, 0xE2,
- 0x64, 0x72,
-
- 0x25, 0x42, 0x52, 0xBF,
- 0x2D, 0x42, 0x4A, 0xBF,
-
- 0x30, 0x2E, 0x30, 0xDF,
- 0x38, 0x2E, 0x38, 0xDF,
-
- 0x18, 0x1D, 0x45, 0xE9,
- 0x1E, 0x15, 0x45, 0xE9,
-
- 0x2B, 0x49, 0x51, 0xBD,
- 0x00, 0xE0,
- 0x1F, 0x73,
-
- 0x38, 0x38, 0x40, 0xAF,
- 0x30, 0x30, 0x40, 0xAF,
-
- 0x24, 0x1F, 0x24, 0xDF,
- 0x1D, 0x32, 0x20, 0xE9,
-
- 0x2C, 0x1F, 0x2C, 0xDF,
- 0x1A, 0x33, 0x20, 0xE9,
-
- 0xB0, 0x10,
- 0x08, 0xE3,
- 0x40, 0x10,
- 0xB8, 0x10,
-
- 0x26, 0xF0, 0x30, 0xCD,
- 0x2F, 0xF0, 0x38, 0xCD,
-
- 0x2B, 0x80, 0x20, 0xE9,
- 0x2A, 0x80, 0x20, 0xE9,
-
- 0xA6, 0x20,
- 0x88, 0xE2,
- 0x00, 0xE0,
- 0xAF, 0x20,
-
- 0x28, 0x2A, 0x26, 0xAF,
- 0x20, 0x2A, 0xC0, 0xAF,
-
- 0x34, 0x1F, 0x34, 0xDF,
- 0x46, 0x24, 0x46, 0xDF,
-
- 0x28, 0x30, 0x80, 0xBF,
- 0x20, 0x38, 0x80, 0xBF,
-
- 0x47, 0x24, 0x47, 0xDF,
- 0x4E, 0x2C, 0x4E, 0xDF,
-
- 0x4F, 0x2C, 0x4F, 0xDF,
- 0x56, 0x34, 0x56, 0xDF,
-
- 0x28, 0x15, 0x28, 0xDF,
- 0x20, 0x1D, 0x20, 0xDF,
-
- 0x57, 0x34, 0x57, 0xDF,
- 0x00, 0xE0,
- 0x1D, 0x05,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x89, 0xE2,
- 0x2B, 0x30,
-
- 0x3F, 0xC1, 0x1D, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x68,
- 0xBF, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x20, 0xC0, 0x20, 0xAF,
- 0x28, 0x05,
- 0x97, 0x74,
-
- 0x00, 0xE0,
- 0x2A, 0x10,
- 0x16, 0xC0, 0x20, 0xE9,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x8C, 0xE2,
- 0x95, 0x05,
-
- 0x28, 0xC1, 0x28, 0xAD,
- 0x1F, 0xC1, 0x15, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA8, 0x67,
- 0x9F, 0x6B,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x28, 0xC0, 0x28, 0xAD,
- 0x1D, 0x25,
- 0x20, 0x05,
-
- 0x28, 0x32, 0x80, 0xAD,
- 0x40, 0x2A, 0x40, 0xBD,
-
- 0x1C, 0x80, 0x20, 0xE9,
- 0x20, 0x33, 0x20, 0xAD,
-
- 0x20, 0x73,
- 0x00, 0xE0,
- 0xB6, 0x49, 0x51, 0xBB,
-
- 0x26, 0x2F, 0xB0, 0xE8,
- 0x19, 0x20, 0x20, 0xE9,
-
- 0x35, 0x20, 0x35, 0xDF,
- 0x3D, 0x20, 0x3D, 0xDF,
-
- 0x15, 0x20, 0x15, 0xDF,
- 0x1D, 0x20, 0x1D, 0xDF,
-
- 0x26, 0xD0, 0x26, 0xCD,
- 0x29, 0x49, 0x2A, 0xB8,
-
- 0x26, 0x40, 0x80, 0xBD,
- 0x3B, 0x48, 0x50, 0xBD,
-
- 0x3E, 0x54, 0x57, 0x9F,
- 0x00, 0xE0,
- 0x82, 0xE1,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x26, 0x30,
- 0x29, 0x30,
- 0x48, 0x3C, 0x48, 0xAD,
-
- 0x2B, 0x72,
- 0xC2, 0xE1,
- 0x2C, 0xC0, 0x44, 0xC2,
-
- 0x05, 0x24, 0x34, 0xBF,
- 0x0D, 0x24, 0x2C, 0xBF,
-
- 0x2D, 0x46, 0x4E, 0xBF,
- 0x25, 0x46, 0x56, 0xBF,
-
- 0x20, 0x1D, 0x6F, 0x8F,
- 0x32, 0x3E, 0x5F, 0xE9,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x30,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x33, 0x1E, 0x5F, 0xE9,
-
- 0x05, 0x44, 0x54, 0xB2,
- 0x0D, 0x44, 0x4C, 0xB2,
-
- 0x19, 0xC0, 0xB0, 0xE8,
- 0x34, 0xC0, 0x44, 0xC4,
-
- 0x33, 0x73,
- 0x00, 0xE0,
- 0x3E, 0x62, 0x57, 0x9F,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0xE0,
- 0x0D, 0x20,
-
- 0x84, 0x3E, 0x58, 0xE9,
- 0x28, 0x1D, 0x6F, 0x8F,
-
- 0x05, 0x20,
- 0x00, 0xE0,
- 0x85, 0x1E, 0x58, 0xE9,
-
- 0x9B, 0x3B, 0x33, 0xDF,
- 0x20, 0x20, 0x42, 0xAF,
-
- 0x30, 0x42, 0x56, 0x9F,
- 0x80, 0x3E, 0x57, 0xE9,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x30, 0x80, 0x5F, 0xE9,
-
- 0x28, 0x28, 0x24, 0xAF,
- 0x81, 0x1E, 0x57, 0xE9,
-
- 0x05, 0x47, 0x57, 0xBF,
- 0x0D, 0x47, 0x4F, 0xBF,
-
- 0x88, 0x80, 0x58, 0xE9,
- 0x1B, 0x29, 0x1B, 0xDF,
-
- 0x30, 0x1D, 0x6F, 0x8F,
- 0x3A, 0x30, 0x4F, 0xE9,
-
- 0x1C, 0x30, 0x26, 0xDF,
- 0x09, 0xE3,
- 0x3B, 0x05,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x3B, 0x3F, 0x4F, 0xE9,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x00, 0xE0,
- 0xAC, 0x20,
-
- 0x2D, 0x44, 0x4C, 0xB4,
- 0x2C, 0x1C, 0xC0, 0xAF,
-
- 0x25, 0x44, 0x54, 0xB4,
- 0x00, 0xE0,
- 0xC8, 0x30,
-
- 0x30, 0x46, 0x30, 0xAF,
- 0x1B, 0x1B, 0x48, 0xAF,
-
- 0x00, 0xE0,
- 0x25, 0x20,
- 0x38, 0x2C, 0x4F, 0xE9,
-
- 0x86, 0x80, 0x57, 0xE9,
- 0x38, 0x1D, 0x6F, 0x8F,
-
- 0x28, 0x74,
- 0x00, 0xE0,
- 0x0D, 0x44, 0x4C, 0xB0,
-
- 0x05, 0x44, 0x54, 0xB0,
- 0x2D, 0x20,
- 0x9B, 0x10,
-
- 0x82, 0x3E, 0x57, 0xE9,
- 0x32, 0xF0, 0x1B, 0xCD,
-
- 0x1E, 0xBD, 0x59, 0x9F,
- 0x83, 0x1E, 0x57, 0xE9,
-
- 0x38, 0x47, 0x38, 0xAF,
- 0x34, 0x20,
- 0x2A, 0x30,
-
- 0x00, 0xE0,
- 0x0D, 0x20,
- 0x32, 0x20,
- 0x05, 0x20,
-
- 0x87, 0x80, 0x57, 0xE9,
- 0x1F, 0x54, 0x57, 0x9F,
-
- 0x17, 0x42, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x6A,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x37, 0x1E, 0x4F, 0xE9,
-
- 0x37, 0x32, 0x2A, 0xAF,
- 0x00, 0xE0,
- 0x32, 0x00,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x27, 0xC0, 0x44, 0xC0,
-
- 0x36, 0x1F, 0x4F, 0xE9,
- 0x1F, 0x1F, 0x26, 0xDF,
-
- 0x37, 0x1B, 0x37, 0xBF,
- 0x17, 0x26, 0x17, 0xDF,
-
- 0x3E, 0x17, 0x4F, 0xE9,
- 0x3F, 0x3F, 0x4F, 0xE9,
-
- 0x34, 0x1F, 0x34, 0xAF,
- 0x2B, 0x05,
- 0xA7, 0x20,
-
- 0x33, 0x2B, 0x37, 0xDF,
- 0x27, 0x17, 0xC0, 0xAF,
-
- 0x34, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0D, 0x21, 0x1A, 0xB6,
- 0x05, 0x21, 0x31, 0xB6,
-
- 0x2D, 0x44, 0x4C, 0xB6,
- 0x25, 0x44, 0x54, 0xB6,
-
- 0x03, 0x80, 0x2A, 0xEA,
- 0x17, 0xC1, 0x2B, 0xBD,
-
- 0x0D, 0x20,
- 0x05, 0x20,
- 0x2F, 0xC0, 0x21, 0xC6,
-
- 0xB3, 0x68,
- 0x97, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0xC0, 0x33, 0xAF,
- 0x3C, 0x27, 0x4F, 0xE9,
-
- 0x00, 0xE0,
- 0x25, 0x20,
- 0x07, 0xC0, 0x44, 0xC6,
-
- 0x17, 0x50, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x2D, 0x20,
-
- 0x37, 0x0F, 0x5C, 0x9F,
- 0x00, 0xE0,
- 0x2F, 0x20,
-
- 0x1F, 0x62, 0x57, 0x9F,
- 0x00, 0xE0,
- 0x07, 0x20,
-
- 0x3F, 0x3D, 0x5D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x28, 0x19, 0x60, 0xEC,
-
- 0xB3, 0x05,
- 0x00, 0xE0,
- 0x17, 0x26, 0x17, 0xDF,
-
- 0x23, 0x3B, 0x33, 0xAD,
- 0x35, 0x17, 0x4F, 0xE9,
-
- 0x1F, 0x26, 0x1F, 0xDF,
- 0x9D, 0x1F, 0x4F, 0xE9,
-
- 0x9E, 0x3F, 0x4F, 0xE9,
- 0x39, 0x37, 0x4F, 0xE9,
-
- 0x2F, 0x2F, 0x17, 0xAF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x07, 0x07, 0x1F, 0xAF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x31, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x9C, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x57, 0x39, 0x20, 0xE9,
-
- 0x16, 0x28, 0x20, 0xE9,
- 0x1D, 0x3B, 0x20, 0xE9,
-
- 0x1E, 0x2B, 0x20, 0xE9,
- 0x2B, 0x32, 0x20, 0xE9,
-
- 0x1C, 0x23, 0x20, 0xE9,
- 0x57, 0x36, 0x20, 0xE9,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x90, 0xE2,
- 0x00, 0xE0,
-
- 0x74, 0xFF, 0x20, 0xEA,
- 0x19, 0xC8, 0xC1, 0xCD,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x9F, 0x41, 0x49, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x41, 0x49, 0xBD,
- 0x2D, 0x41, 0x51, 0xBD,
-
- 0x0D, 0x80, 0x07, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x35, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x25, 0x30,
- 0x2D, 0x30,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0xA7, 0x5B, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x73, 0xFF, 0x0A, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC9, 0x41, 0xC8, 0xEC,
- 0x42, 0xE1,
- 0x00, 0xE0,
-
- 0x71, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC8, 0x40, 0xC0, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6E, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
-};
-
-static unsigned char warp_g200_tgzf[] = {
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x98, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x81, 0x04,
- 0x89, 0x04,
- 0x01, 0x04,
- 0x09, 0x04,
-
- 0xC9, 0x41, 0xC0, 0xEC,
- 0x11, 0x04,
- 0x00, 0xE0,
-
- 0x41, 0xCC, 0x41, 0xCD,
- 0x49, 0xCC, 0x49, 0xCD,
-
- 0xD1, 0x41, 0xC0, 0xEC,
- 0x51, 0xCC, 0x51, 0xCD,
-
- 0x80, 0x04,
- 0x10, 0x04,
- 0x08, 0x04,
- 0x00, 0xE0,
-
- 0x00, 0xCC, 0xC0, 0xCD,
- 0xD1, 0x49, 0xC0, 0xEC,
-
- 0x8A, 0x1F, 0x20, 0xE9,
- 0x8B, 0x3F, 0x20, 0xE9,
-
- 0x41, 0x3C, 0x41, 0xAD,
- 0x49, 0x3C, 0x49, 0xAD,
-
- 0x10, 0xCC, 0x10, 0xCD,
- 0x08, 0xCC, 0x08, 0xCD,
-
- 0xB9, 0x41, 0x49, 0xBB,
- 0x1F, 0xF0, 0x41, 0xCD,
-
- 0x51, 0x3C, 0x51, 0xAD,
- 0x00, 0x98, 0x80, 0xE9,
-
- 0x7F, 0x80, 0x07, 0xEA,
- 0x24, 0x1F, 0x20, 0xE9,
-
- 0x21, 0x45, 0x80, 0xE8,
- 0x1A, 0x4D, 0x80, 0xE8,
-
- 0x31, 0x55, 0x80, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0x41, 0x49, 0xBD,
- 0x1D, 0x41, 0x51, 0xBD,
-
- 0x2E, 0x41, 0x2A, 0xB8,
- 0x34, 0x53, 0xA0, 0xE8,
-
- 0x15, 0x30,
- 0x1D, 0x30,
- 0x58, 0xE3,
- 0x00, 0xE0,
-
- 0xB5, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x24, 0x43, 0xA0, 0xE8,
- 0x2C, 0x4B, 0xA0, 0xE8,
-
- 0x15, 0x72,
- 0x09, 0xE3,
- 0x00, 0xE0,
- 0x1D, 0x72,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0x97, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6C, 0x64, 0xC8, 0xEC,
- 0x98, 0xE1,
- 0xB5, 0x05,
-
- 0xBD, 0x05,
- 0x2E, 0x30,
- 0x32, 0xC0, 0xA0, 0xE8,
-
- 0x33, 0xC0, 0xA0, 0xE8,
- 0x74, 0x64, 0xC8, 0xEC,
-
- 0x40, 0x3C, 0x40, 0xAD,
- 0x32, 0x6A,
- 0x2A, 0x30,
-
- 0x20, 0x73,
- 0x33, 0x6A,
- 0x00, 0xE0,
- 0x28, 0x73,
-
- 0x1C, 0x72,
- 0x83, 0xE2,
- 0x6B, 0x80, 0x15, 0xEA,
-
- 0xB8, 0x3D, 0x28, 0xDF,
- 0x30, 0x35, 0x20, 0xDF,
-
- 0x40, 0x30,
- 0x00, 0xE0,
- 0xCC, 0xE2,
- 0x64, 0x72,
-
- 0x25, 0x42, 0x52, 0xBF,
- 0x2D, 0x42, 0x4A, 0xBF,
-
- 0x30, 0x2E, 0x30, 0xDF,
- 0x38, 0x2E, 0x38, 0xDF,
-
- 0x18, 0x1D, 0x45, 0xE9,
- 0x1E, 0x15, 0x45, 0xE9,
-
- 0x2B, 0x49, 0x51, 0xBD,
- 0x00, 0xE0,
- 0x1F, 0x73,
-
- 0x38, 0x38, 0x40, 0xAF,
- 0x30, 0x30, 0x40, 0xAF,
-
- 0x24, 0x1F, 0x24, 0xDF,
- 0x1D, 0x32, 0x20, 0xE9,
-
- 0x2C, 0x1F, 0x2C, 0xDF,
- 0x1A, 0x33, 0x20, 0xE9,
-
- 0xB0, 0x10,
- 0x08, 0xE3,
- 0x40, 0x10,
- 0xB8, 0x10,
-
- 0x26, 0xF0, 0x30, 0xCD,
- 0x2F, 0xF0, 0x38, 0xCD,
-
- 0x2B, 0x80, 0x20, 0xE9,
- 0x2A, 0x80, 0x20, 0xE9,
-
- 0xA6, 0x20,
- 0x88, 0xE2,
- 0x00, 0xE0,
- 0xAF, 0x20,
-
- 0x28, 0x2A, 0x26, 0xAF,
- 0x20, 0x2A, 0xC0, 0xAF,
-
- 0x34, 0x1F, 0x34, 0xDF,
- 0x46, 0x24, 0x46, 0xDF,
-
- 0x28, 0x30, 0x80, 0xBF,
- 0x20, 0x38, 0x80, 0xBF,
-
- 0x47, 0x24, 0x47, 0xDF,
- 0x4E, 0x2C, 0x4E, 0xDF,
-
- 0x4F, 0x2C, 0x4F, 0xDF,
- 0x56, 0x34, 0x56, 0xDF,
-
- 0x28, 0x15, 0x28, 0xDF,
- 0x20, 0x1D, 0x20, 0xDF,
-
- 0x57, 0x34, 0x57, 0xDF,
- 0x00, 0xE0,
- 0x1D, 0x05,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x89, 0xE2,
- 0x2B, 0x30,
-
- 0x3F, 0xC1, 0x1D, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x68,
- 0xBF, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x20, 0xC0, 0x20, 0xAF,
- 0x28, 0x05,
- 0x97, 0x74,
-
- 0x00, 0xE0,
- 0x2A, 0x10,
- 0x16, 0xC0, 0x20, 0xE9,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x8C, 0xE2,
- 0x95, 0x05,
-
- 0x28, 0xC1, 0x28, 0xAD,
- 0x1F, 0xC1, 0x15, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA8, 0x67,
- 0x9F, 0x6B,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x28, 0xC0, 0x28, 0xAD,
- 0x1D, 0x25,
- 0x20, 0x05,
-
- 0x28, 0x32, 0x80, 0xAD,
- 0x40, 0x2A, 0x40, 0xBD,
-
- 0x1C, 0x80, 0x20, 0xE9,
- 0x20, 0x33, 0x20, 0xAD,
-
- 0x20, 0x73,
- 0x00, 0xE0,
- 0xB6, 0x49, 0x51, 0xBB,
-
- 0x26, 0x2F, 0xB0, 0xE8,
- 0x19, 0x20, 0x20, 0xE9,
-
- 0x35, 0x20, 0x35, 0xDF,
- 0x3D, 0x20, 0x3D, 0xDF,
-
- 0x15, 0x20, 0x15, 0xDF,
- 0x1D, 0x20, 0x1D, 0xDF,
-
- 0x26, 0xD0, 0x26, 0xCD,
- 0x29, 0x49, 0x2A, 0xB8,
-
- 0x26, 0x40, 0x80, 0xBD,
- 0x3B, 0x48, 0x50, 0xBD,
-
- 0x3E, 0x54, 0x57, 0x9F,
- 0x00, 0xE0,
- 0x82, 0xE1,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x26, 0x30,
- 0x29, 0x30,
- 0x48, 0x3C, 0x48, 0xAD,
-
- 0x2B, 0x72,
- 0xC2, 0xE1,
- 0x2C, 0xC0, 0x44, 0xC2,
-
- 0x05, 0x24, 0x34, 0xBF,
- 0x0D, 0x24, 0x2C, 0xBF,
-
- 0x2D, 0x46, 0x4E, 0xBF,
- 0x25, 0x46, 0x56, 0xBF,
-
- 0x20, 0x1D, 0x6F, 0x8F,
- 0x32, 0x3E, 0x5F, 0xE9,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x30,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x33, 0x1E, 0x5F, 0xE9,
-
- 0x05, 0x44, 0x54, 0xB2,
- 0x0D, 0x44, 0x4C, 0xB2,
-
- 0x19, 0xC0, 0xB0, 0xE8,
- 0x34, 0xC0, 0x44, 0xC4,
-
- 0x33, 0x73,
- 0x00, 0xE0,
- 0x3E, 0x62, 0x57, 0x9F,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0xE0,
- 0x0D, 0x20,
-
- 0x84, 0x3E, 0x58, 0xE9,
- 0x28, 0x1D, 0x6F, 0x8F,
-
- 0x05, 0x20,
- 0x00, 0xE0,
- 0x85, 0x1E, 0x58, 0xE9,
-
- 0x9B, 0x3B, 0x33, 0xDF,
- 0x20, 0x20, 0x42, 0xAF,
-
- 0x30, 0x42, 0x56, 0x9F,
- 0x80, 0x3E, 0x57, 0xE9,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x30, 0x80, 0x5F, 0xE9,
-
- 0x28, 0x28, 0x24, 0xAF,
- 0x81, 0x1E, 0x57, 0xE9,
-
- 0x05, 0x47, 0x57, 0xBF,
- 0x0D, 0x47, 0x4F, 0xBF,
-
- 0x88, 0x80, 0x58, 0xE9,
- 0x1B, 0x29, 0x1B, 0xDF,
-
- 0x30, 0x1D, 0x6F, 0x8F,
- 0x3A, 0x30, 0x4F, 0xE9,
-
- 0x1C, 0x30, 0x26, 0xDF,
- 0x09, 0xE3,
- 0x3B, 0x05,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x3B, 0x3F, 0x4F, 0xE9,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x00, 0xE0,
- 0xAC, 0x20,
-
- 0x2D, 0x44, 0x4C, 0xB4,
- 0x2C, 0x1C, 0xC0, 0xAF,
-
- 0x25, 0x44, 0x54, 0xB4,
- 0x00, 0xE0,
- 0xC8, 0x30,
-
- 0x30, 0x46, 0x30, 0xAF,
- 0x1B, 0x1B, 0x48, 0xAF,
-
- 0x00, 0xE0,
- 0x25, 0x20,
- 0x38, 0x2C, 0x4F, 0xE9,
-
- 0x86, 0x80, 0x57, 0xE9,
- 0x38, 0x1D, 0x6F, 0x8F,
-
- 0x28, 0x74,
- 0x00, 0xE0,
- 0x0D, 0x44, 0x4C, 0xB0,
-
- 0x05, 0x44, 0x54, 0xB0,
- 0x2D, 0x20,
- 0x9B, 0x10,
-
- 0x82, 0x3E, 0x57, 0xE9,
- 0x32, 0xF0, 0x1B, 0xCD,
-
- 0x1E, 0xBD, 0x59, 0x9F,
- 0x83, 0x1E, 0x57, 0xE9,
-
- 0x38, 0x47, 0x38, 0xAF,
- 0x34, 0x20,
- 0x2A, 0x30,
-
- 0x00, 0xE0,
- 0x0D, 0x20,
- 0x32, 0x20,
- 0x05, 0x20,
-
- 0x87, 0x80, 0x57, 0xE9,
- 0x1F, 0x54, 0x57, 0x9F,
-
- 0x17, 0x42, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x6A,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x37, 0x1E, 0x4F, 0xE9,
-
- 0x37, 0x32, 0x2A, 0xAF,
- 0x00, 0xE0,
- 0x32, 0x00,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x27, 0xC0, 0x44, 0xC0,
-
- 0x36, 0x1F, 0x4F, 0xE9,
- 0x1F, 0x1F, 0x26, 0xDF,
-
- 0x37, 0x1B, 0x37, 0xBF,
- 0x17, 0x26, 0x17, 0xDF,
-
- 0x3E, 0x17, 0x4F, 0xE9,
- 0x3F, 0x3F, 0x4F, 0xE9,
-
- 0x34, 0x1F, 0x34, 0xAF,
- 0x2B, 0x05,
- 0xA7, 0x20,
-
- 0x33, 0x2B, 0x37, 0xDF,
- 0x27, 0x17, 0xC0, 0xAF,
-
- 0x34, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0D, 0x21, 0x1A, 0xB6,
- 0x05, 0x21, 0x31, 0xB6,
-
- 0x03, 0x80, 0x2A, 0xEA,
- 0x17, 0xC1, 0x2B, 0xBD,
-
- 0x0D, 0x20,
- 0x05, 0x20,
- 0x2F, 0xC0, 0x21, 0xC6,
-
- 0xB3, 0x68,
- 0x97, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0xC0, 0x33, 0xAF,
- 0x3C, 0x27, 0x4F, 0xE9,
-
- 0x17, 0x50, 0x56, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x37, 0x0F, 0x5C, 0x9F,
- 0x00, 0xE0,
- 0x2F, 0x20,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x28, 0x19, 0x60, 0xEC,
-
- 0xB3, 0x05,
- 0x00, 0xE0,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x23, 0x3B, 0x33, 0xAD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x17, 0x26, 0x17, 0xDF,
- 0x35, 0x17, 0x4F, 0xE9,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x39, 0x37, 0x4F, 0xE9,
-
- 0x2F, 0x2F, 0x17, 0xAF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x31, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x57, 0x39, 0x20, 0xE9,
-
- 0x16, 0x28, 0x20, 0xE9,
- 0x1D, 0x3B, 0x20, 0xE9,
-
- 0x1E, 0x2B, 0x20, 0xE9,
- 0x2B, 0x32, 0x20, 0xE9,
-
- 0x1C, 0x23, 0x20, 0xE9,
- 0x57, 0x36, 0x20, 0xE9,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x90, 0xE2,
- 0x00, 0xE0,
-
- 0x78, 0xFF, 0x20, 0xEA,
- 0x19, 0xC8, 0xC1, 0xCD,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x9F, 0x41, 0x49, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x41, 0x49, 0xBD,
- 0x2D, 0x41, 0x51, 0xBD,
-
- 0x0D, 0x80, 0x07, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x35, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x25, 0x30,
- 0x2D, 0x30,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0xA7, 0x5B, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x77, 0xFF, 0x0A, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC9, 0x41, 0xC8, 0xEC,
- 0x42, 0xE1,
- 0x00, 0xE0,
-
- 0x75, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC8, 0x40, 0xC0, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x72, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
-};
-
-static unsigned char warp_g200_tgzs[] = {
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x98, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x81, 0x04,
- 0x89, 0x04,
- 0x01, 0x04,
- 0x09, 0x04,
-
- 0xC9, 0x41, 0xC0, 0xEC,
- 0x11, 0x04,
- 0x00, 0xE0,
-
- 0x41, 0xCC, 0x41, 0xCD,
- 0x49, 0xCC, 0x49, 0xCD,
-
- 0xD1, 0x41, 0xC0, 0xEC,
- 0x51, 0xCC, 0x51, 0xCD,
-
- 0x80, 0x04,
- 0x10, 0x04,
- 0x08, 0x04,
- 0x00, 0xE0,
-
- 0x00, 0xCC, 0xC0, 0xCD,
- 0xD1, 0x49, 0xC0, 0xEC,
-
- 0x8A, 0x1F, 0x20, 0xE9,
- 0x8B, 0x3F, 0x20, 0xE9,
-
- 0x41, 0x3C, 0x41, 0xAD,
- 0x49, 0x3C, 0x49, 0xAD,
-
- 0x10, 0xCC, 0x10, 0xCD,
- 0x08, 0xCC, 0x08, 0xCD,
-
- 0xB9, 0x41, 0x49, 0xBB,
- 0x1F, 0xF0, 0x41, 0xCD,
-
- 0x51, 0x3C, 0x51, 0xAD,
- 0x00, 0x98, 0x80, 0xE9,
-
- 0x8B, 0x80, 0x07, 0xEA,
- 0x24, 0x1F, 0x20, 0xE9,
-
- 0x21, 0x45, 0x80, 0xE8,
- 0x1A, 0x4D, 0x80, 0xE8,
-
- 0x31, 0x55, 0x80, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0x41, 0x49, 0xBD,
- 0x1D, 0x41, 0x51, 0xBD,
-
- 0x2E, 0x41, 0x2A, 0xB8,
- 0x34, 0x53, 0xA0, 0xE8,
-
- 0x15, 0x30,
- 0x1D, 0x30,
- 0x58, 0xE3,
- 0x00, 0xE0,
-
- 0xB5, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x24, 0x43, 0xA0, 0xE8,
- 0x2C, 0x4B, 0xA0, 0xE8,
-
- 0x15, 0x72,
- 0x09, 0xE3,
- 0x00, 0xE0,
- 0x1D, 0x72,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0x97, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6C, 0x64, 0xC8, 0xEC,
- 0x98, 0xE1,
- 0xB5, 0x05,
-
- 0xBD, 0x05,
- 0x2E, 0x30,
- 0x32, 0xC0, 0xA0, 0xE8,
-
- 0x33, 0xC0, 0xA0, 0xE8,
- 0x74, 0x64, 0xC8, 0xEC,
-
- 0x40, 0x3C, 0x40, 0xAD,
- 0x32, 0x6A,
- 0x2A, 0x30,
-
- 0x20, 0x73,
- 0x33, 0x6A,
- 0x00, 0xE0,
- 0x28, 0x73,
-
- 0x1C, 0x72,
- 0x83, 0xE2,
- 0x77, 0x80, 0x15, 0xEA,
-
- 0xB8, 0x3D, 0x28, 0xDF,
- 0x30, 0x35, 0x20, 0xDF,
-
- 0x40, 0x30,
- 0x00, 0xE0,
- 0xCC, 0xE2,
- 0x64, 0x72,
-
- 0x25, 0x42, 0x52, 0xBF,
- 0x2D, 0x42, 0x4A, 0xBF,
-
- 0x30, 0x2E, 0x30, 0xDF,
- 0x38, 0x2E, 0x38, 0xDF,
-
- 0x18, 0x1D, 0x45, 0xE9,
- 0x1E, 0x15, 0x45, 0xE9,
-
- 0x2B, 0x49, 0x51, 0xBD,
- 0x00, 0xE0,
- 0x1F, 0x73,
-
- 0x38, 0x38, 0x40, 0xAF,
- 0x30, 0x30, 0x40, 0xAF,
-
- 0x24, 0x1F, 0x24, 0xDF,
- 0x1D, 0x32, 0x20, 0xE9,
-
- 0x2C, 0x1F, 0x2C, 0xDF,
- 0x1A, 0x33, 0x20, 0xE9,
-
- 0xB0, 0x10,
- 0x08, 0xE3,
- 0x40, 0x10,
- 0xB8, 0x10,
-
- 0x26, 0xF0, 0x30, 0xCD,
- 0x2F, 0xF0, 0x38, 0xCD,
-
- 0x2B, 0x80, 0x20, 0xE9,
- 0x2A, 0x80, 0x20, 0xE9,
-
- 0xA6, 0x20,
- 0x88, 0xE2,
- 0x00, 0xE0,
- 0xAF, 0x20,
-
- 0x28, 0x2A, 0x26, 0xAF,
- 0x20, 0x2A, 0xC0, 0xAF,
-
- 0x34, 0x1F, 0x34, 0xDF,
- 0x46, 0x24, 0x46, 0xDF,
-
- 0x28, 0x30, 0x80, 0xBF,
- 0x20, 0x38, 0x80, 0xBF,
-
- 0x47, 0x24, 0x47, 0xDF,
- 0x4E, 0x2C, 0x4E, 0xDF,
-
- 0x4F, 0x2C, 0x4F, 0xDF,
- 0x56, 0x34, 0x56, 0xDF,
-
- 0x28, 0x15, 0x28, 0xDF,
- 0x20, 0x1D, 0x20, 0xDF,
-
- 0x57, 0x34, 0x57, 0xDF,
- 0x00, 0xE0,
- 0x1D, 0x05,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x89, 0xE2,
- 0x2B, 0x30,
-
- 0x3F, 0xC1, 0x1D, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x68,
- 0xBF, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x20, 0xC0, 0x20, 0xAF,
- 0x28, 0x05,
- 0x97, 0x74,
-
- 0x00, 0xE0,
- 0x2A, 0x10,
- 0x16, 0xC0, 0x20, 0xE9,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x8C, 0xE2,
- 0x95, 0x05,
-
- 0x28, 0xC1, 0x28, 0xAD,
- 0x1F, 0xC1, 0x15, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA8, 0x67,
- 0x9F, 0x6B,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x28, 0xC0, 0x28, 0xAD,
- 0x1D, 0x25,
- 0x20, 0x05,
-
- 0x28, 0x32, 0x80, 0xAD,
- 0x40, 0x2A, 0x40, 0xBD,
-
- 0x1C, 0x80, 0x20, 0xE9,
- 0x20, 0x33, 0x20, 0xAD,
-
- 0x20, 0x73,
- 0x00, 0xE0,
- 0xB6, 0x49, 0x51, 0xBB,
-
- 0x26, 0x2F, 0xB0, 0xE8,
- 0x19, 0x20, 0x20, 0xE9,
-
- 0x35, 0x20, 0x35, 0xDF,
- 0x3D, 0x20, 0x3D, 0xDF,
-
- 0x15, 0x20, 0x15, 0xDF,
- 0x1D, 0x20, 0x1D, 0xDF,
-
- 0x26, 0xD0, 0x26, 0xCD,
- 0x29, 0x49, 0x2A, 0xB8,
-
- 0x26, 0x40, 0x80, 0xBD,
- 0x3B, 0x48, 0x50, 0xBD,
-
- 0x3E, 0x54, 0x57, 0x9F,
- 0x00, 0xE0,
- 0x82, 0xE1,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x26, 0x30,
- 0x29, 0x30,
- 0x48, 0x3C, 0x48, 0xAD,
-
- 0x2B, 0x72,
- 0xC2, 0xE1,
- 0x2C, 0xC0, 0x44, 0xC2,
-
- 0x05, 0x24, 0x34, 0xBF,
- 0x0D, 0x24, 0x2C, 0xBF,
-
- 0x2D, 0x46, 0x4E, 0xBF,
- 0x25, 0x46, 0x56, 0xBF,
-
- 0x20, 0x1D, 0x6F, 0x8F,
- 0x32, 0x3E, 0x5F, 0xE9,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x30,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x33, 0x1E, 0x5F, 0xE9,
-
- 0x05, 0x44, 0x54, 0xB2,
- 0x0D, 0x44, 0x4C, 0xB2,
-
- 0x19, 0xC0, 0xB0, 0xE8,
- 0x34, 0xC0, 0x44, 0xC4,
-
- 0x33, 0x73,
- 0x00, 0xE0,
- 0x3E, 0x62, 0x57, 0x9F,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0xE0,
- 0x0D, 0x20,
-
- 0x84, 0x3E, 0x58, 0xE9,
- 0x28, 0x1D, 0x6F, 0x8F,
-
- 0x05, 0x20,
- 0x00, 0xE0,
- 0x85, 0x1E, 0x58, 0xE9,
-
- 0x9B, 0x3B, 0x33, 0xDF,
- 0x20, 0x20, 0x42, 0xAF,
-
- 0x30, 0x42, 0x56, 0x9F,
- 0x80, 0x3E, 0x57, 0xE9,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x30, 0x80, 0x5F, 0xE9,
-
- 0x28, 0x28, 0x24, 0xAF,
- 0x81, 0x1E, 0x57, 0xE9,
-
- 0x05, 0x47, 0x57, 0xBF,
- 0x0D, 0x47, 0x4F, 0xBF,
-
- 0x88, 0x80, 0x58, 0xE9,
- 0x1B, 0x29, 0x1B, 0xDF,
-
- 0x30, 0x1D, 0x6F, 0x8F,
- 0x3A, 0x30, 0x4F, 0xE9,
-
- 0x1C, 0x30, 0x26, 0xDF,
- 0x09, 0xE3,
- 0x3B, 0x05,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x3B, 0x3F, 0x4F, 0xE9,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x00, 0xE0,
- 0xAC, 0x20,
-
- 0x2D, 0x44, 0x4C, 0xB4,
- 0x2C, 0x1C, 0xC0, 0xAF,
-
- 0x25, 0x44, 0x54, 0xB4,
- 0x00, 0xE0,
- 0xC8, 0x30,
-
- 0x30, 0x46, 0x30, 0xAF,
- 0x1B, 0x1B, 0x48, 0xAF,
-
- 0x00, 0xE0,
- 0x25, 0x20,
- 0x38, 0x2C, 0x4F, 0xE9,
-
- 0x86, 0x80, 0x57, 0xE9,
- 0x38, 0x1D, 0x6F, 0x8F,
-
- 0x28, 0x74,
- 0x00, 0xE0,
- 0x0D, 0x44, 0x4C, 0xB0,
-
- 0x05, 0x44, 0x54, 0xB0,
- 0x2D, 0x20,
- 0x9B, 0x10,
-
- 0x82, 0x3E, 0x57, 0xE9,
- 0x32, 0xF0, 0x1B, 0xCD,
-
- 0x1E, 0xBD, 0x59, 0x9F,
- 0x83, 0x1E, 0x57, 0xE9,
-
- 0x38, 0x47, 0x38, 0xAF,
- 0x34, 0x20,
- 0x2A, 0x30,
-
- 0x00, 0xE0,
- 0x0D, 0x20,
- 0x32, 0x20,
- 0x05, 0x20,
-
- 0x87, 0x80, 0x57, 0xE9,
- 0x1F, 0x54, 0x57, 0x9F,
-
- 0x17, 0x42, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x6A,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x37, 0x1E, 0x4F, 0xE9,
-
- 0x37, 0x32, 0x2A, 0xAF,
- 0x00, 0xE0,
- 0x32, 0x00,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x27, 0xC0, 0x44, 0xC0,
-
- 0x36, 0x1F, 0x4F, 0xE9,
- 0x1F, 0x1F, 0x26, 0xDF,
-
- 0x37, 0x1B, 0x37, 0xBF,
- 0x17, 0x26, 0x17, 0xDF,
-
- 0x3E, 0x17, 0x4F, 0xE9,
- 0x3F, 0x3F, 0x4F, 0xE9,
-
- 0x34, 0x1F, 0x34, 0xAF,
- 0x2B, 0x05,
- 0xA7, 0x20,
-
- 0x33, 0x2B, 0x37, 0xDF,
- 0x27, 0x17, 0xC0, 0xAF,
-
- 0x34, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x2D, 0x21, 0x1A, 0xB0,
- 0x25, 0x21, 0x31, 0xB0,
-
- 0x0D, 0x21, 0x1A, 0xB2,
- 0x05, 0x21, 0x31, 0xB2,
-
- 0x03, 0x80, 0x2A, 0xEA,
- 0x17, 0xC1, 0x2B, 0xBD,
-
- 0x2D, 0x20,
- 0x25, 0x20,
- 0x05, 0x20,
- 0x0D, 0x20,
-
- 0xB3, 0x68,
- 0x97, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0xC0, 0x33, 0xAF,
- 0x2F, 0xC0, 0x21, 0xC0,
-
- 0x16, 0x42, 0x56, 0x9F,
- 0x3C, 0x27, 0x4F, 0xE9,
-
- 0x1E, 0x62, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x21, 0x31, 0xB4,
- 0x2D, 0x21, 0x1A, 0xB4,
-
- 0x3F, 0x2F, 0x5D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0x05,
- 0x00, 0xE0,
- 0x28, 0x19, 0x60, 0xEC,
-
- 0x37, 0x0F, 0x5C, 0x9F,
- 0x00, 0xE0,
- 0x2F, 0x20,
-
- 0x23, 0x3B, 0x33, 0xAD,
- 0x1E, 0x26, 0x1E, 0xDF,
-
- 0xA7, 0x1E, 0x4F, 0xE9,
- 0x17, 0x26, 0x16, 0xDF,
-
- 0x2D, 0x20,
- 0x00, 0xE0,
- 0xA8, 0x3F, 0x4F, 0xE9,
-
- 0x2F, 0x2F, 0x1E, 0xAF,
- 0x25, 0x20,
- 0x00, 0xE0,
-
- 0xA4, 0x16, 0x4F, 0xE9,
- 0x0F, 0xC0, 0x21, 0xC2,
-
- 0xA6, 0x80, 0x4F, 0xE9,
- 0x1F, 0x62, 0x57, 0x9F,
-
- 0x3F, 0x2F, 0x5D, 0x9F,
- 0x00, 0xE0,
- 0x8F, 0x20,
-
- 0xA5, 0x37, 0x4F, 0xE9,
- 0x0F, 0x17, 0x0F, 0xAF,
-
- 0x06, 0xC0, 0x21, 0xC4,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0xA3, 0x80, 0x4F, 0xE9,
-
- 0x06, 0x20,
- 0x00, 0xE0,
- 0x1F, 0x26, 0x1F, 0xDF,
-
- 0xA1, 0x1F, 0x4F, 0xE9,
- 0xA2, 0x3F, 0x4F, 0xE9,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x06, 0x06, 0x1F, 0xAF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x57, 0x39, 0x20, 0xE9,
-
- 0x16, 0x28, 0x20, 0xE9,
- 0x1D, 0x3B, 0x20, 0xE9,
-
- 0x1E, 0x2B, 0x20, 0xE9,
- 0x2B, 0x32, 0x20, 0xE9,
-
- 0x1C, 0x23, 0x20, 0xE9,
- 0x57, 0x36, 0x20, 0xE9,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x90, 0xE2,
- 0x00, 0xE0,
-
- 0x6C, 0xFF, 0x20, 0xEA,
- 0x19, 0xC8, 0xC1, 0xCD,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x9F, 0x41, 0x49, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x41, 0x49, 0xBD,
- 0x2D, 0x41, 0x51, 0xBD,
-
- 0x0D, 0x80, 0x07, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x35, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x25, 0x30,
- 0x2D, 0x30,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0xA7, 0x5B, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6B, 0xFF, 0x0A, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC9, 0x41, 0xC8, 0xEC,
- 0x42, 0xE1,
- 0x00, 0xE0,
-
- 0x69, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC8, 0x40, 0xC0, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x66, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
-};
-
-static unsigned char warp_g200_tgzsa[] = {
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x98, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x81, 0x04,
- 0x89, 0x04,
- 0x01, 0x04,
- 0x09, 0x04,
-
- 0xC9, 0x41, 0xC0, 0xEC,
- 0x11, 0x04,
- 0x00, 0xE0,
-
- 0x41, 0xCC, 0x41, 0xCD,
- 0x49, 0xCC, 0x49, 0xCD,
-
- 0xD1, 0x41, 0xC0, 0xEC,
- 0x51, 0xCC, 0x51, 0xCD,
-
- 0x80, 0x04,
- 0x10, 0x04,
- 0x08, 0x04,
- 0x00, 0xE0,
-
- 0x00, 0xCC, 0xC0, 0xCD,
- 0xD1, 0x49, 0xC0, 0xEC,
-
- 0x8A, 0x1F, 0x20, 0xE9,
- 0x8B, 0x3F, 0x20, 0xE9,
-
- 0x41, 0x3C, 0x41, 0xAD,
- 0x49, 0x3C, 0x49, 0xAD,
-
- 0x10, 0xCC, 0x10, 0xCD,
- 0x08, 0xCC, 0x08, 0xCD,
-
- 0xB9, 0x41, 0x49, 0xBB,
- 0x1F, 0xF0, 0x41, 0xCD,
-
- 0x51, 0x3C, 0x51, 0xAD,
- 0x00, 0x98, 0x80, 0xE9,
-
- 0x8F, 0x80, 0x07, 0xEA,
- 0x24, 0x1F, 0x20, 0xE9,
-
- 0x21, 0x45, 0x80, 0xE8,
- 0x1A, 0x4D, 0x80, 0xE8,
-
- 0x31, 0x55, 0x80, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0x41, 0x49, 0xBD,
- 0x1D, 0x41, 0x51, 0xBD,
-
- 0x2E, 0x41, 0x2A, 0xB8,
- 0x34, 0x53, 0xA0, 0xE8,
-
- 0x15, 0x30,
- 0x1D, 0x30,
- 0x58, 0xE3,
- 0x00, 0xE0,
-
- 0xB5, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x24, 0x43, 0xA0, 0xE8,
- 0x2C, 0x4B, 0xA0, 0xE8,
-
- 0x15, 0x72,
- 0x09, 0xE3,
- 0x00, 0xE0,
- 0x1D, 0x72,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0x97, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6C, 0x64, 0xC8, 0xEC,
- 0x98, 0xE1,
- 0xB5, 0x05,
-
- 0xBD, 0x05,
- 0x2E, 0x30,
- 0x32, 0xC0, 0xA0, 0xE8,
-
- 0x33, 0xC0, 0xA0, 0xE8,
- 0x74, 0x64, 0xC8, 0xEC,
-
- 0x40, 0x3C, 0x40, 0xAD,
- 0x32, 0x6A,
- 0x2A, 0x30,
-
- 0x20, 0x73,
- 0x33, 0x6A,
- 0x00, 0xE0,
- 0x28, 0x73,
-
- 0x1C, 0x72,
- 0x83, 0xE2,
- 0x7B, 0x80, 0x15, 0xEA,
-
- 0xB8, 0x3D, 0x28, 0xDF,
- 0x30, 0x35, 0x20, 0xDF,
-
- 0x40, 0x30,
- 0x00, 0xE0,
- 0xCC, 0xE2,
- 0x64, 0x72,
-
- 0x25, 0x42, 0x52, 0xBF,
- 0x2D, 0x42, 0x4A, 0xBF,
-
- 0x30, 0x2E, 0x30, 0xDF,
- 0x38, 0x2E, 0x38, 0xDF,
-
- 0x18, 0x1D, 0x45, 0xE9,
- 0x1E, 0x15, 0x45, 0xE9,
-
- 0x2B, 0x49, 0x51, 0xBD,
- 0x00, 0xE0,
- 0x1F, 0x73,
-
- 0x38, 0x38, 0x40, 0xAF,
- 0x30, 0x30, 0x40, 0xAF,
-
- 0x24, 0x1F, 0x24, 0xDF,
- 0x1D, 0x32, 0x20, 0xE9,
-
- 0x2C, 0x1F, 0x2C, 0xDF,
- 0x1A, 0x33, 0x20, 0xE9,
-
- 0xB0, 0x10,
- 0x08, 0xE3,
- 0x40, 0x10,
- 0xB8, 0x10,
-
- 0x26, 0xF0, 0x30, 0xCD,
- 0x2F, 0xF0, 0x38, 0xCD,
-
- 0x2B, 0x80, 0x20, 0xE9,
- 0x2A, 0x80, 0x20, 0xE9,
-
- 0xA6, 0x20,
- 0x88, 0xE2,
- 0x00, 0xE0,
- 0xAF, 0x20,
-
- 0x28, 0x2A, 0x26, 0xAF,
- 0x20, 0x2A, 0xC0, 0xAF,
-
- 0x34, 0x1F, 0x34, 0xDF,
- 0x46, 0x24, 0x46, 0xDF,
-
- 0x28, 0x30, 0x80, 0xBF,
- 0x20, 0x38, 0x80, 0xBF,
-
- 0x47, 0x24, 0x47, 0xDF,
- 0x4E, 0x2C, 0x4E, 0xDF,
-
- 0x4F, 0x2C, 0x4F, 0xDF,
- 0x56, 0x34, 0x56, 0xDF,
-
- 0x28, 0x15, 0x28, 0xDF,
- 0x20, 0x1D, 0x20, 0xDF,
-
- 0x57, 0x34, 0x57, 0xDF,
- 0x00, 0xE0,
- 0x1D, 0x05,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x89, 0xE2,
- 0x2B, 0x30,
-
- 0x3F, 0xC1, 0x1D, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x68,
- 0xBF, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x20, 0xC0, 0x20, 0xAF,
- 0x28, 0x05,
- 0x97, 0x74,
-
- 0x00, 0xE0,
- 0x2A, 0x10,
- 0x16, 0xC0, 0x20, 0xE9,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x8C, 0xE2,
- 0x95, 0x05,
-
- 0x28, 0xC1, 0x28, 0xAD,
- 0x1F, 0xC1, 0x15, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA8, 0x67,
- 0x9F, 0x6B,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x28, 0xC0, 0x28, 0xAD,
- 0x1D, 0x25,
- 0x20, 0x05,
-
- 0x28, 0x32, 0x80, 0xAD,
- 0x40, 0x2A, 0x40, 0xBD,
-
- 0x1C, 0x80, 0x20, 0xE9,
- 0x20, 0x33, 0x20, 0xAD,
-
- 0x20, 0x73,
- 0x00, 0xE0,
- 0xB6, 0x49, 0x51, 0xBB,
-
- 0x26, 0x2F, 0xB0, 0xE8,
- 0x19, 0x20, 0x20, 0xE9,
-
- 0x35, 0x20, 0x35, 0xDF,
- 0x3D, 0x20, 0x3D, 0xDF,
-
- 0x15, 0x20, 0x15, 0xDF,
- 0x1D, 0x20, 0x1D, 0xDF,
-
- 0x26, 0xD0, 0x26, 0xCD,
- 0x29, 0x49, 0x2A, 0xB8,
-
- 0x26, 0x40, 0x80, 0xBD,
- 0x3B, 0x48, 0x50, 0xBD,
-
- 0x3E, 0x54, 0x57, 0x9F,
- 0x00, 0xE0,
- 0x82, 0xE1,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x26, 0x30,
- 0x29, 0x30,
- 0x48, 0x3C, 0x48, 0xAD,
-
- 0x2B, 0x72,
- 0xC2, 0xE1,
- 0x2C, 0xC0, 0x44, 0xC2,
-
- 0x05, 0x24, 0x34, 0xBF,
- 0x0D, 0x24, 0x2C, 0xBF,
-
- 0x2D, 0x46, 0x4E, 0xBF,
- 0x25, 0x46, 0x56, 0xBF,
-
- 0x20, 0x1D, 0x6F, 0x8F,
- 0x32, 0x3E, 0x5F, 0xE9,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x30,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x33, 0x1E, 0x5F, 0xE9,
-
- 0x05, 0x44, 0x54, 0xB2,
- 0x0D, 0x44, 0x4C, 0xB2,
-
- 0x19, 0xC0, 0xB0, 0xE8,
- 0x34, 0xC0, 0x44, 0xC4,
-
- 0x33, 0x73,
- 0x00, 0xE0,
- 0x3E, 0x62, 0x57, 0x9F,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0xE0,
- 0x0D, 0x20,
-
- 0x84, 0x3E, 0x58, 0xE9,
- 0x28, 0x1D, 0x6F, 0x8F,
-
- 0x05, 0x20,
- 0x00, 0xE0,
- 0x85, 0x1E, 0x58, 0xE9,
-
- 0x9B, 0x3B, 0x33, 0xDF,
- 0x20, 0x20, 0x42, 0xAF,
-
- 0x30, 0x42, 0x56, 0x9F,
- 0x80, 0x3E, 0x57, 0xE9,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x30, 0x80, 0x5F, 0xE9,
-
- 0x28, 0x28, 0x24, 0xAF,
- 0x81, 0x1E, 0x57, 0xE9,
-
- 0x05, 0x47, 0x57, 0xBF,
- 0x0D, 0x47, 0x4F, 0xBF,
-
- 0x88, 0x80, 0x58, 0xE9,
- 0x1B, 0x29, 0x1B, 0xDF,
-
- 0x30, 0x1D, 0x6F, 0x8F,
- 0x3A, 0x30, 0x4F, 0xE9,
-
- 0x1C, 0x30, 0x26, 0xDF,
- 0x09, 0xE3,
- 0x3B, 0x05,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x3B, 0x3F, 0x4F, 0xE9,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x00, 0xE0,
- 0xAC, 0x20,
-
- 0x2D, 0x44, 0x4C, 0xB4,
- 0x2C, 0x1C, 0xC0, 0xAF,
-
- 0x25, 0x44, 0x54, 0xB4,
- 0x00, 0xE0,
- 0xC8, 0x30,
-
- 0x30, 0x46, 0x30, 0xAF,
- 0x1B, 0x1B, 0x48, 0xAF,
-
- 0x00, 0xE0,
- 0x25, 0x20,
- 0x38, 0x2C, 0x4F, 0xE9,
-
- 0x86, 0x80, 0x57, 0xE9,
- 0x38, 0x1D, 0x6F, 0x8F,
-
- 0x28, 0x74,
- 0x00, 0xE0,
- 0x0D, 0x44, 0x4C, 0xB0,
-
- 0x05, 0x44, 0x54, 0xB0,
- 0x2D, 0x20,
- 0x9B, 0x10,
-
- 0x82, 0x3E, 0x57, 0xE9,
- 0x32, 0xF0, 0x1B, 0xCD,
-
- 0x1E, 0xBD, 0x59, 0x9F,
- 0x83, 0x1E, 0x57, 0xE9,
-
- 0x38, 0x47, 0x38, 0xAF,
- 0x34, 0x20,
- 0x2A, 0x30,
-
- 0x00, 0xE0,
- 0x0D, 0x20,
- 0x32, 0x20,
- 0x05, 0x20,
-
- 0x87, 0x80, 0x57, 0xE9,
- 0x1F, 0x54, 0x57, 0x9F,
-
- 0x17, 0x42, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x6A,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x37, 0x1E, 0x4F, 0xE9,
-
- 0x37, 0x32, 0x2A, 0xAF,
- 0x00, 0xE0,
- 0x32, 0x00,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x27, 0xC0, 0x44, 0xC0,
-
- 0x36, 0x1F, 0x4F, 0xE9,
- 0x1F, 0x1F, 0x26, 0xDF,
-
- 0x37, 0x1B, 0x37, 0xBF,
- 0x17, 0x26, 0x17, 0xDF,
-
- 0x3E, 0x17, 0x4F, 0xE9,
- 0x3F, 0x3F, 0x4F, 0xE9,
-
- 0x34, 0x1F, 0x34, 0xAF,
- 0x2B, 0x05,
- 0xA7, 0x20,
-
- 0x33, 0x2B, 0x37, 0xDF,
- 0x27, 0x17, 0xC0, 0xAF,
-
- 0x34, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x2D, 0x21, 0x1A, 0xB0,
- 0x25, 0x21, 0x31, 0xB0,
-
- 0x0D, 0x21, 0x1A, 0xB2,
- 0x05, 0x21, 0x31, 0xB2,
-
- 0x03, 0x80, 0x2A, 0xEA,
- 0x17, 0xC1, 0x2B, 0xBD,
-
- 0x2D, 0x20,
- 0x25, 0x20,
- 0x05, 0x20,
- 0x0D, 0x20,
-
- 0xB3, 0x68,
- 0x97, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0xC0, 0x33, 0xAF,
- 0x2F, 0xC0, 0x21, 0xC0,
-
- 0x16, 0x42, 0x56, 0x9F,
- 0x3C, 0x27, 0x4F, 0xE9,
-
- 0x1E, 0x62, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x21, 0x31, 0xB4,
- 0x2D, 0x21, 0x1A, 0xB4,
-
- 0x3F, 0x2F, 0x5D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0x05,
- 0x00, 0xE0,
- 0x28, 0x19, 0x60, 0xEC,
-
- 0x0D, 0x44, 0x4C, 0xB6,
- 0x05, 0x44, 0x54, 0xB6,
-
- 0x37, 0x0F, 0x5C, 0x9F,
- 0x00, 0xE0,
- 0x2F, 0x20,
-
- 0x23, 0x3B, 0x33, 0xAD,
- 0x1E, 0x26, 0x1E, 0xDF,
-
- 0xA7, 0x1E, 0x4F, 0xE9,
- 0x17, 0x26, 0x16, 0xDF,
-
- 0x2D, 0x20,
- 0x00, 0xE0,
- 0xA8, 0x3F, 0x4F, 0xE9,
-
- 0x2F, 0x2F, 0x1E, 0xAF,
- 0x25, 0x20,
- 0x00, 0xE0,
-
- 0xA4, 0x16, 0x4F, 0xE9,
- 0x0F, 0xC0, 0x21, 0xC2,
-
- 0xA6, 0x80, 0x4F, 0xE9,
- 0x1F, 0x62, 0x57, 0x9F,
-
- 0x0D, 0x20,
- 0x05, 0x20,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x3F, 0x2F, 0x5D, 0x9F,
- 0x00, 0xE0,
- 0x0F, 0x20,
-
- 0x17, 0x50, 0x56, 0x9F,
- 0xA5, 0x37, 0x4F, 0xE9,
-
- 0x06, 0xC0, 0x21, 0xC4,
- 0x0F, 0x17, 0x0F, 0xAF,
-
- 0x37, 0x0F, 0x5C, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x2F, 0xC0, 0x44, 0xC6,
- 0xA3, 0x80, 0x4F, 0xE9,
-
- 0x06, 0x20,
- 0x00, 0xE0,
- 0x1F, 0x26, 0x1F, 0xDF,
-
- 0x17, 0x26, 0x17, 0xDF,
- 0x9D, 0x17, 0x4F, 0xE9,
-
- 0xA1, 0x1F, 0x4F, 0xE9,
- 0xA2, 0x3F, 0x4F, 0xE9,
-
- 0x06, 0x06, 0x1F, 0xAF,
- 0x00, 0xE0,
- 0xAF, 0x20,
-
- 0x9E, 0x37, 0x4F, 0xE9,
- 0x2F, 0x17, 0x2F, 0xAF,
-
- 0xA0, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x9C, 0x80, 0x4F, 0xE9,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x57, 0x39, 0x20, 0xE9,
-
- 0x16, 0x28, 0x20, 0xE9,
- 0x1D, 0x3B, 0x20, 0xE9,
-
- 0x1E, 0x2B, 0x20, 0xE9,
- 0x2B, 0x32, 0x20, 0xE9,
-
- 0x1C, 0x23, 0x20, 0xE9,
- 0x57, 0x36, 0x20, 0xE9,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x90, 0xE2,
- 0x00, 0xE0,
-
- 0x68, 0xFF, 0x20, 0xEA,
- 0x19, 0xC8, 0xC1, 0xCD,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x9F, 0x41, 0x49, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x41, 0x49, 0xBD,
- 0x2D, 0x41, 0x51, 0xBD,
-
- 0x0D, 0x80, 0x07, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x35, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x25, 0x30,
- 0x2D, 0x30,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0xA7, 0x5B, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x67, 0xFF, 0x0A, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC9, 0x41, 0xC8, 0xEC,
- 0x42, 0xE1,
- 0x00, 0xE0,
-
- 0x65, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC8, 0x40, 0xC0, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x62, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
-};
-
-static unsigned char warp_g200_tgzsaf[] = {
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x98, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x81, 0x04,
- 0x89, 0x04,
- 0x01, 0x04,
- 0x09, 0x04,
-
- 0xC9, 0x41, 0xC0, 0xEC,
- 0x11, 0x04,
- 0x00, 0xE0,
-
- 0x41, 0xCC, 0x41, 0xCD,
- 0x49, 0xCC, 0x49, 0xCD,
-
- 0xD1, 0x41, 0xC0, 0xEC,
- 0x51, 0xCC, 0x51, 0xCD,
-
- 0x80, 0x04,
- 0x10, 0x04,
- 0x08, 0x04,
- 0x00, 0xE0,
-
- 0x00, 0xCC, 0xC0, 0xCD,
- 0xD1, 0x49, 0xC0, 0xEC,
-
- 0x8A, 0x1F, 0x20, 0xE9,
- 0x8B, 0x3F, 0x20, 0xE9,
-
- 0x41, 0x3C, 0x41, 0xAD,
- 0x49, 0x3C, 0x49, 0xAD,
-
- 0x10, 0xCC, 0x10, 0xCD,
- 0x08, 0xCC, 0x08, 0xCD,
-
- 0xB9, 0x41, 0x49, 0xBB,
- 0x1F, 0xF0, 0x41, 0xCD,
-
- 0x51, 0x3C, 0x51, 0xAD,
- 0x00, 0x98, 0x80, 0xE9,
-
- 0x94, 0x80, 0x07, 0xEA,
- 0x24, 0x1F, 0x20, 0xE9,
-
- 0x21, 0x45, 0x80, 0xE8,
- 0x1A, 0x4D, 0x80, 0xE8,
-
- 0x31, 0x55, 0x80, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0x41, 0x49, 0xBD,
- 0x1D, 0x41, 0x51, 0xBD,
-
- 0x2E, 0x41, 0x2A, 0xB8,
- 0x34, 0x53, 0xA0, 0xE8,
-
- 0x15, 0x30,
- 0x1D, 0x30,
- 0x58, 0xE3,
- 0x00, 0xE0,
-
- 0xB5, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x24, 0x43, 0xA0, 0xE8,
- 0x2C, 0x4B, 0xA0, 0xE8,
-
- 0x15, 0x72,
- 0x09, 0xE3,
- 0x00, 0xE0,
- 0x1D, 0x72,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0x97, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6C, 0x64, 0xC8, 0xEC,
- 0x98, 0xE1,
- 0xB5, 0x05,
-
- 0xBD, 0x05,
- 0x2E, 0x30,
- 0x32, 0xC0, 0xA0, 0xE8,
-
- 0x33, 0xC0, 0xA0, 0xE8,
- 0x74, 0x64, 0xC8, 0xEC,
-
- 0x40, 0x3C, 0x40, 0xAD,
- 0x32, 0x6A,
- 0x2A, 0x30,
-
- 0x20, 0x73,
- 0x33, 0x6A,
- 0x00, 0xE0,
- 0x28, 0x73,
-
- 0x1C, 0x72,
- 0x83, 0xE2,
- 0x80, 0x80, 0x15, 0xEA,
-
- 0xB8, 0x3D, 0x28, 0xDF,
- 0x30, 0x35, 0x20, 0xDF,
-
- 0x40, 0x30,
- 0x00, 0xE0,
- 0xCC, 0xE2,
- 0x64, 0x72,
-
- 0x25, 0x42, 0x52, 0xBF,
- 0x2D, 0x42, 0x4A, 0xBF,
-
- 0x30, 0x2E, 0x30, 0xDF,
- 0x38, 0x2E, 0x38, 0xDF,
-
- 0x18, 0x1D, 0x45, 0xE9,
- 0x1E, 0x15, 0x45, 0xE9,
-
- 0x2B, 0x49, 0x51, 0xBD,
- 0x00, 0xE0,
- 0x1F, 0x73,
-
- 0x38, 0x38, 0x40, 0xAF,
- 0x30, 0x30, 0x40, 0xAF,
-
- 0x24, 0x1F, 0x24, 0xDF,
- 0x1D, 0x32, 0x20, 0xE9,
-
- 0x2C, 0x1F, 0x2C, 0xDF,
- 0x1A, 0x33, 0x20, 0xE9,
-
- 0xB0, 0x10,
- 0x08, 0xE3,
- 0x40, 0x10,
- 0xB8, 0x10,
-
- 0x26, 0xF0, 0x30, 0xCD,
- 0x2F, 0xF0, 0x38, 0xCD,
-
- 0x2B, 0x80, 0x20, 0xE9,
- 0x2A, 0x80, 0x20, 0xE9,
-
- 0xA6, 0x20,
- 0x88, 0xE2,
- 0x00, 0xE0,
- 0xAF, 0x20,
-
- 0x28, 0x2A, 0x26, 0xAF,
- 0x20, 0x2A, 0xC0, 0xAF,
-
- 0x34, 0x1F, 0x34, 0xDF,
- 0x46, 0x24, 0x46, 0xDF,
-
- 0x28, 0x30, 0x80, 0xBF,
- 0x20, 0x38, 0x80, 0xBF,
-
- 0x47, 0x24, 0x47, 0xDF,
- 0x4E, 0x2C, 0x4E, 0xDF,
-
- 0x4F, 0x2C, 0x4F, 0xDF,
- 0x56, 0x34, 0x56, 0xDF,
-
- 0x28, 0x15, 0x28, 0xDF,
- 0x20, 0x1D, 0x20, 0xDF,
-
- 0x57, 0x34, 0x57, 0xDF,
- 0x00, 0xE0,
- 0x1D, 0x05,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x89, 0xE2,
- 0x2B, 0x30,
-
- 0x3F, 0xC1, 0x1D, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x68,
- 0xBF, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x20, 0xC0, 0x20, 0xAF,
- 0x28, 0x05,
- 0x97, 0x74,
-
- 0x00, 0xE0,
- 0x2A, 0x10,
- 0x16, 0xC0, 0x20, 0xE9,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x8C, 0xE2,
- 0x95, 0x05,
-
- 0x28, 0xC1, 0x28, 0xAD,
- 0x1F, 0xC1, 0x15, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA8, 0x67,
- 0x9F, 0x6B,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x28, 0xC0, 0x28, 0xAD,
- 0x1D, 0x25,
- 0x20, 0x05,
-
- 0x28, 0x32, 0x80, 0xAD,
- 0x40, 0x2A, 0x40, 0xBD,
-
- 0x1C, 0x80, 0x20, 0xE9,
- 0x20, 0x33, 0x20, 0xAD,
-
- 0x20, 0x73,
- 0x00, 0xE0,
- 0xB6, 0x49, 0x51, 0xBB,
-
- 0x26, 0x2F, 0xB0, 0xE8,
- 0x19, 0x20, 0x20, 0xE9,
-
- 0x35, 0x20, 0x35, 0xDF,
- 0x3D, 0x20, 0x3D, 0xDF,
-
- 0x15, 0x20, 0x15, 0xDF,
- 0x1D, 0x20, 0x1D, 0xDF,
-
- 0x26, 0xD0, 0x26, 0xCD,
- 0x29, 0x49, 0x2A, 0xB8,
-
- 0x26, 0x40, 0x80, 0xBD,
- 0x3B, 0x48, 0x50, 0xBD,
-
- 0x3E, 0x54, 0x57, 0x9F,
- 0x00, 0xE0,
- 0x82, 0xE1,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x26, 0x30,
- 0x29, 0x30,
- 0x48, 0x3C, 0x48, 0xAD,
-
- 0x2B, 0x72,
- 0xC2, 0xE1,
- 0x2C, 0xC0, 0x44, 0xC2,
-
- 0x05, 0x24, 0x34, 0xBF,
- 0x0D, 0x24, 0x2C, 0xBF,
-
- 0x2D, 0x46, 0x4E, 0xBF,
- 0x25, 0x46, 0x56, 0xBF,
-
- 0x20, 0x1D, 0x6F, 0x8F,
- 0x32, 0x3E, 0x5F, 0xE9,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x30,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x33, 0x1E, 0x5F, 0xE9,
-
- 0x05, 0x44, 0x54, 0xB2,
- 0x0D, 0x44, 0x4C, 0xB2,
-
- 0x19, 0xC0, 0xB0, 0xE8,
- 0x34, 0xC0, 0x44, 0xC4,
-
- 0x33, 0x73,
- 0x00, 0xE0,
- 0x3E, 0x62, 0x57, 0x9F,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0xE0,
- 0x0D, 0x20,
-
- 0x84, 0x3E, 0x58, 0xE9,
- 0x28, 0x1D, 0x6F, 0x8F,
-
- 0x05, 0x20,
- 0x00, 0xE0,
- 0x85, 0x1E, 0x58, 0xE9,
-
- 0x9B, 0x3B, 0x33, 0xDF,
- 0x20, 0x20, 0x42, 0xAF,
-
- 0x30, 0x42, 0x56, 0x9F,
- 0x80, 0x3E, 0x57, 0xE9,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x30, 0x80, 0x5F, 0xE9,
-
- 0x28, 0x28, 0x24, 0xAF,
- 0x81, 0x1E, 0x57, 0xE9,
-
- 0x05, 0x47, 0x57, 0xBF,
- 0x0D, 0x47, 0x4F, 0xBF,
-
- 0x88, 0x80, 0x58, 0xE9,
- 0x1B, 0x29, 0x1B, 0xDF,
-
- 0x30, 0x1D, 0x6F, 0x8F,
- 0x3A, 0x30, 0x4F, 0xE9,
-
- 0x1C, 0x30, 0x26, 0xDF,
- 0x09, 0xE3,
- 0x3B, 0x05,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x3B, 0x3F, 0x4F, 0xE9,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x00, 0xE0,
- 0xAC, 0x20,
-
- 0x2D, 0x44, 0x4C, 0xB4,
- 0x2C, 0x1C, 0xC0, 0xAF,
-
- 0x25, 0x44, 0x54, 0xB4,
- 0x00, 0xE0,
- 0xC8, 0x30,
-
- 0x30, 0x46, 0x30, 0xAF,
- 0x1B, 0x1B, 0x48, 0xAF,
-
- 0x00, 0xE0,
- 0x25, 0x20,
- 0x38, 0x2C, 0x4F, 0xE9,
-
- 0x86, 0x80, 0x57, 0xE9,
- 0x38, 0x1D, 0x6F, 0x8F,
-
- 0x28, 0x74,
- 0x00, 0xE0,
- 0x0D, 0x44, 0x4C, 0xB0,
-
- 0x05, 0x44, 0x54, 0xB0,
- 0x2D, 0x20,
- 0x9B, 0x10,
-
- 0x82, 0x3E, 0x57, 0xE9,
- 0x32, 0xF0, 0x1B, 0xCD,
-
- 0x1E, 0xBD, 0x59, 0x9F,
- 0x83, 0x1E, 0x57, 0xE9,
-
- 0x38, 0x47, 0x38, 0xAF,
- 0x34, 0x20,
- 0x2A, 0x30,
-
- 0x00, 0xE0,
- 0x0D, 0x20,
- 0x32, 0x20,
- 0x05, 0x20,
-
- 0x87, 0x80, 0x57, 0xE9,
- 0x1F, 0x54, 0x57, 0x9F,
-
- 0x17, 0x42, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x6A,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x37, 0x1E, 0x4F, 0xE9,
-
- 0x37, 0x32, 0x2A, 0xAF,
- 0x00, 0xE0,
- 0x32, 0x00,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x27, 0xC0, 0x44, 0xC0,
-
- 0x36, 0x1F, 0x4F, 0xE9,
- 0x1F, 0x1F, 0x26, 0xDF,
-
- 0x37, 0x1B, 0x37, 0xBF,
- 0x17, 0x26, 0x17, 0xDF,
-
- 0x3E, 0x17, 0x4F, 0xE9,
- 0x3F, 0x3F, 0x4F, 0xE9,
-
- 0x34, 0x1F, 0x34, 0xAF,
- 0x2B, 0x05,
- 0xA7, 0x20,
-
- 0x33, 0x2B, 0x37, 0xDF,
- 0x27, 0x17, 0xC0, 0xAF,
-
- 0x34, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x2D, 0x21, 0x1A, 0xB0,
- 0x25, 0x21, 0x31, 0xB0,
-
- 0x0D, 0x21, 0x1A, 0xB2,
- 0x05, 0x21, 0x31, 0xB2,
-
- 0x03, 0x80, 0x2A, 0xEA,
- 0x17, 0xC1, 0x2B, 0xBD,
-
- 0x2D, 0x20,
- 0x25, 0x20,
- 0x05, 0x20,
- 0x0D, 0x20,
-
- 0xB3, 0x68,
- 0x97, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0xC0, 0x33, 0xAF,
- 0x2F, 0xC0, 0x21, 0xC0,
-
- 0x16, 0x42, 0x56, 0x9F,
- 0x3C, 0x27, 0x4F, 0xE9,
-
- 0x1E, 0x62, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x21, 0x31, 0xB4,
- 0x2D, 0x21, 0x1A, 0xB4,
-
- 0x3F, 0x2F, 0x5D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0x05,
- 0x00, 0xE0,
- 0x28, 0x19, 0x60, 0xEC,
-
- 0x0D, 0x21, 0x1A, 0xB6,
- 0x05, 0x21, 0x31, 0xB6,
-
- 0x37, 0x0F, 0x5C, 0x9F,
- 0x00, 0xE0,
- 0x2F, 0x20,
-
- 0x23, 0x3B, 0x33, 0xAD,
- 0x1E, 0x26, 0x1E, 0xDF,
-
- 0xA7, 0x1E, 0x4F, 0xE9,
- 0x17, 0x26, 0x16, 0xDF,
-
- 0x2D, 0x20,
- 0x00, 0xE0,
- 0xA8, 0x3F, 0x4F, 0xE9,
-
- 0x2F, 0x2F, 0x1E, 0xAF,
- 0x25, 0x20,
- 0x00, 0xE0,
-
- 0xA4, 0x16, 0x4F, 0xE9,
- 0x0F, 0xC0, 0x21, 0xC2,
-
- 0xA6, 0x80, 0x4F, 0xE9,
- 0x1F, 0x62, 0x57, 0x9F,
-
- 0x0D, 0x20,
- 0x05, 0x20,
- 0x2F, 0xC0, 0x21, 0xC6,
-
- 0x2D, 0x44, 0x4C, 0xB6,
- 0x25, 0x44, 0x54, 0xB6,
-
- 0x3F, 0x2F, 0x5D, 0x9F,
- 0x00, 0xE0,
- 0x0F, 0x20,
-
- 0x2D, 0x20,
- 0x25, 0x20,
- 0x07, 0xC0, 0x44, 0xC6,
-
- 0x17, 0x50, 0x56, 0x9F,
- 0xA5, 0x37, 0x4F, 0xE9,
-
- 0x06, 0xC0, 0x21, 0xC4,
- 0x0F, 0x17, 0x0F, 0xAF,
-
- 0x37, 0x0F, 0x5C, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1E, 0x62, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x3E, 0x3D, 0x5D, 0x9F,
- 0x00, 0xE0,
- 0x07, 0x20,
-
- 0x2F, 0x20,
- 0x00, 0xE0,
- 0xA3, 0x0F, 0x4F, 0xE9,
-
- 0x06, 0x20,
- 0x00, 0xE0,
- 0x1F, 0x26, 0x1F, 0xDF,
-
- 0x17, 0x26, 0x17, 0xDF,
- 0xA1, 0x1F, 0x4F, 0xE9,
-
- 0x1E, 0x26, 0x1E, 0xDF,
- 0x9D, 0x1E, 0x4F, 0xE9,
-
- 0x35, 0x17, 0x4F, 0xE9,
- 0xA2, 0x3F, 0x4F, 0xE9,
-
- 0x06, 0x06, 0x1F, 0xAF,
- 0x39, 0x37, 0x4F, 0xE9,
-
- 0x2F, 0x2F, 0x17, 0xAF,
- 0x07, 0x07, 0x1E, 0xAF,
-
- 0xA0, 0x80, 0x4F, 0xE9,
- 0x9E, 0x3E, 0x4F, 0xE9,
-
- 0x31, 0x80, 0x4F, 0xE9,
- 0x9C, 0x80, 0x4F, 0xE9,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x57, 0x39, 0x20, 0xE9,
-
- 0x16, 0x28, 0x20, 0xE9,
- 0x1D, 0x3B, 0x20, 0xE9,
-
- 0x1E, 0x2B, 0x20, 0xE9,
- 0x2B, 0x32, 0x20, 0xE9,
-
- 0x1C, 0x23, 0x20, 0xE9,
- 0x57, 0x36, 0x20, 0xE9,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x90, 0xE2,
- 0x00, 0xE0,
-
- 0x63, 0xFF, 0x20, 0xEA,
- 0x19, 0xC8, 0xC1, 0xCD,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x9F, 0x41, 0x49, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x41, 0x49, 0xBD,
- 0x2D, 0x41, 0x51, 0xBD,
-
- 0x0D, 0x80, 0x07, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x35, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x25, 0x30,
- 0x2D, 0x30,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0xA7, 0x5B, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x62, 0xFF, 0x0A, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC9, 0x41, 0xC8, 0xEC,
- 0x42, 0xE1,
- 0x00, 0xE0,
-
- 0x60, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC8, 0x40, 0xC0, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x5D, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
-};
-
-static unsigned char warp_g200_tgzsf[] = {
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x98, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x81, 0x04,
- 0x89, 0x04,
- 0x01, 0x04,
- 0x09, 0x04,
-
- 0xC9, 0x41, 0xC0, 0xEC,
- 0x11, 0x04,
- 0x00, 0xE0,
-
- 0x41, 0xCC, 0x41, 0xCD,
- 0x49, 0xCC, 0x49, 0xCD,
-
- 0xD1, 0x41, 0xC0, 0xEC,
- 0x51, 0xCC, 0x51, 0xCD,
-
- 0x80, 0x04,
- 0x10, 0x04,
- 0x08, 0x04,
- 0x00, 0xE0,
-
- 0x00, 0xCC, 0xC0, 0xCD,
- 0xD1, 0x49, 0xC0, 0xEC,
-
- 0x8A, 0x1F, 0x20, 0xE9,
- 0x8B, 0x3F, 0x20, 0xE9,
-
- 0x41, 0x3C, 0x41, 0xAD,
- 0x49, 0x3C, 0x49, 0xAD,
-
- 0x10, 0xCC, 0x10, 0xCD,
- 0x08, 0xCC, 0x08, 0xCD,
-
- 0xB9, 0x41, 0x49, 0xBB,
- 0x1F, 0xF0, 0x41, 0xCD,
-
- 0x51, 0x3C, 0x51, 0xAD,
- 0x00, 0x98, 0x80, 0xE9,
-
- 0x8F, 0x80, 0x07, 0xEA,
- 0x24, 0x1F, 0x20, 0xE9,
-
- 0x21, 0x45, 0x80, 0xE8,
- 0x1A, 0x4D, 0x80, 0xE8,
-
- 0x31, 0x55, 0x80, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0x41, 0x49, 0xBD,
- 0x1D, 0x41, 0x51, 0xBD,
-
- 0x2E, 0x41, 0x2A, 0xB8,
- 0x34, 0x53, 0xA0, 0xE8,
-
- 0x15, 0x30,
- 0x1D, 0x30,
- 0x58, 0xE3,
- 0x00, 0xE0,
-
- 0xB5, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x24, 0x43, 0xA0, 0xE8,
- 0x2C, 0x4B, 0xA0, 0xE8,
-
- 0x15, 0x72,
- 0x09, 0xE3,
- 0x00, 0xE0,
- 0x1D, 0x72,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0x97, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x6C, 0x64, 0xC8, 0xEC,
- 0x98, 0xE1,
- 0xB5, 0x05,
-
- 0xBD, 0x05,
- 0x2E, 0x30,
- 0x32, 0xC0, 0xA0, 0xE8,
-
- 0x33, 0xC0, 0xA0, 0xE8,
- 0x74, 0x64, 0xC8, 0xEC,
-
- 0x40, 0x3C, 0x40, 0xAD,
- 0x32, 0x6A,
- 0x2A, 0x30,
-
- 0x20, 0x73,
- 0x33, 0x6A,
- 0x00, 0xE0,
- 0x28, 0x73,
-
- 0x1C, 0x72,
- 0x83, 0xE2,
- 0x7B, 0x80, 0x15, 0xEA,
-
- 0xB8, 0x3D, 0x28, 0xDF,
- 0x30, 0x35, 0x20, 0xDF,
-
- 0x40, 0x30,
- 0x00, 0xE0,
- 0xCC, 0xE2,
- 0x64, 0x72,
-
- 0x25, 0x42, 0x52, 0xBF,
- 0x2D, 0x42, 0x4A, 0xBF,
-
- 0x30, 0x2E, 0x30, 0xDF,
- 0x38, 0x2E, 0x38, 0xDF,
-
- 0x18, 0x1D, 0x45, 0xE9,
- 0x1E, 0x15, 0x45, 0xE9,
-
- 0x2B, 0x49, 0x51, 0xBD,
- 0x00, 0xE0,
- 0x1F, 0x73,
-
- 0x38, 0x38, 0x40, 0xAF,
- 0x30, 0x30, 0x40, 0xAF,
-
- 0x24, 0x1F, 0x24, 0xDF,
- 0x1D, 0x32, 0x20, 0xE9,
-
- 0x2C, 0x1F, 0x2C, 0xDF,
- 0x1A, 0x33, 0x20, 0xE9,
-
- 0xB0, 0x10,
- 0x08, 0xE3,
- 0x40, 0x10,
- 0xB8, 0x10,
-
- 0x26, 0xF0, 0x30, 0xCD,
- 0x2F, 0xF0, 0x38, 0xCD,
-
- 0x2B, 0x80, 0x20, 0xE9,
- 0x2A, 0x80, 0x20, 0xE9,
-
- 0xA6, 0x20,
- 0x88, 0xE2,
- 0x00, 0xE0,
- 0xAF, 0x20,
-
- 0x28, 0x2A, 0x26, 0xAF,
- 0x20, 0x2A, 0xC0, 0xAF,
-
- 0x34, 0x1F, 0x34, 0xDF,
- 0x46, 0x24, 0x46, 0xDF,
-
- 0x28, 0x30, 0x80, 0xBF,
- 0x20, 0x38, 0x80, 0xBF,
-
- 0x47, 0x24, 0x47, 0xDF,
- 0x4E, 0x2C, 0x4E, 0xDF,
-
- 0x4F, 0x2C, 0x4F, 0xDF,
- 0x56, 0x34, 0x56, 0xDF,
-
- 0x28, 0x15, 0x28, 0xDF,
- 0x20, 0x1D, 0x20, 0xDF,
-
- 0x57, 0x34, 0x57, 0xDF,
- 0x00, 0xE0,
- 0x1D, 0x05,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x89, 0xE2,
- 0x2B, 0x30,
-
- 0x3F, 0xC1, 0x1D, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x68,
- 0xBF, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x20, 0xC0, 0x20, 0xAF,
- 0x28, 0x05,
- 0x97, 0x74,
-
- 0x00, 0xE0,
- 0x2A, 0x10,
- 0x16, 0xC0, 0x20, 0xE9,
-
- 0x04, 0x80, 0x10, 0xEA,
- 0x8C, 0xE2,
- 0x95, 0x05,
-
- 0x28, 0xC1, 0x28, 0xAD,
- 0x1F, 0xC1, 0x15, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA8, 0x67,
- 0x9F, 0x6B,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x28, 0xC0, 0x28, 0xAD,
- 0x1D, 0x25,
- 0x20, 0x05,
-
- 0x28, 0x32, 0x80, 0xAD,
- 0x40, 0x2A, 0x40, 0xBD,
-
- 0x1C, 0x80, 0x20, 0xE9,
- 0x20, 0x33, 0x20, 0xAD,
-
- 0x20, 0x73,
- 0x00, 0xE0,
- 0xB6, 0x49, 0x51, 0xBB,
-
- 0x26, 0x2F, 0xB0, 0xE8,
- 0x19, 0x20, 0x20, 0xE9,
-
- 0x35, 0x20, 0x35, 0xDF,
- 0x3D, 0x20, 0x3D, 0xDF,
-
- 0x15, 0x20, 0x15, 0xDF,
- 0x1D, 0x20, 0x1D, 0xDF,
-
- 0x26, 0xD0, 0x26, 0xCD,
- 0x29, 0x49, 0x2A, 0xB8,
-
- 0x26, 0x40, 0x80, 0xBD,
- 0x3B, 0x48, 0x50, 0xBD,
-
- 0x3E, 0x54, 0x57, 0x9F,
- 0x00, 0xE0,
- 0x82, 0xE1,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x26, 0x30,
- 0x29, 0x30,
- 0x48, 0x3C, 0x48, 0xAD,
-
- 0x2B, 0x72,
- 0xC2, 0xE1,
- 0x2C, 0xC0, 0x44, 0xC2,
-
- 0x05, 0x24, 0x34, 0xBF,
- 0x0D, 0x24, 0x2C, 0xBF,
-
- 0x2D, 0x46, 0x4E, 0xBF,
- 0x25, 0x46, 0x56, 0xBF,
-
- 0x20, 0x1D, 0x6F, 0x8F,
- 0x32, 0x3E, 0x5F, 0xE9,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x30,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x33, 0x1E, 0x5F, 0xE9,
-
- 0x05, 0x44, 0x54, 0xB2,
- 0x0D, 0x44, 0x4C, 0xB2,
-
- 0x19, 0xC0, 0xB0, 0xE8,
- 0x34, 0xC0, 0x44, 0xC4,
-
- 0x33, 0x73,
- 0x00, 0xE0,
- 0x3E, 0x62, 0x57, 0x9F,
-
- 0x1E, 0xAF, 0x59, 0x9F,
- 0x00, 0xE0,
- 0x0D, 0x20,
-
- 0x84, 0x3E, 0x58, 0xE9,
- 0x28, 0x1D, 0x6F, 0x8F,
-
- 0x05, 0x20,
- 0x00, 0xE0,
- 0x85, 0x1E, 0x58, 0xE9,
-
- 0x9B, 0x3B, 0x33, 0xDF,
- 0x20, 0x20, 0x42, 0xAF,
-
- 0x30, 0x42, 0x56, 0x9F,
- 0x80, 0x3E, 0x57, 0xE9,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x30, 0x80, 0x5F, 0xE9,
-
- 0x28, 0x28, 0x24, 0xAF,
- 0x81, 0x1E, 0x57, 0xE9,
-
- 0x05, 0x47, 0x57, 0xBF,
- 0x0D, 0x47, 0x4F, 0xBF,
-
- 0x88, 0x80, 0x58, 0xE9,
- 0x1B, 0x29, 0x1B, 0xDF,
-
- 0x30, 0x1D, 0x6F, 0x8F,
- 0x3A, 0x30, 0x4F, 0xE9,
-
- 0x1C, 0x30, 0x26, 0xDF,
- 0x09, 0xE3,
- 0x3B, 0x05,
-
- 0x3E, 0x50, 0x56, 0x9F,
- 0x3B, 0x3F, 0x4F, 0xE9,
-
- 0x1E, 0x8F, 0x51, 0x9F,
- 0x00, 0xE0,
- 0xAC, 0x20,
-
- 0x2D, 0x44, 0x4C, 0xB4,
- 0x2C, 0x1C, 0xC0, 0xAF,
-
- 0x25, 0x44, 0x54, 0xB4,
- 0x00, 0xE0,
- 0xC8, 0x30,
-
- 0x30, 0x46, 0x30, 0xAF,
- 0x1B, 0x1B, 0x48, 0xAF,
-
- 0x00, 0xE0,
- 0x25, 0x20,
- 0x38, 0x2C, 0x4F, 0xE9,
-
- 0x86, 0x80, 0x57, 0xE9,
- 0x38, 0x1D, 0x6F, 0x8F,
-
- 0x28, 0x74,
- 0x00, 0xE0,
- 0x0D, 0x44, 0x4C, 0xB0,
-
- 0x05, 0x44, 0x54, 0xB0,
- 0x2D, 0x20,
- 0x9B, 0x10,
-
- 0x82, 0x3E, 0x57, 0xE9,
- 0x32, 0xF0, 0x1B, 0xCD,
-
- 0x1E, 0xBD, 0x59, 0x9F,
- 0x83, 0x1E, 0x57, 0xE9,
-
- 0x38, 0x47, 0x38, 0xAF,
- 0x34, 0x20,
- 0x2A, 0x30,
-
- 0x00, 0xE0,
- 0x0D, 0x20,
- 0x32, 0x20,
- 0x05, 0x20,
-
- 0x87, 0x80, 0x57, 0xE9,
- 0x1F, 0x54, 0x57, 0x9F,
-
- 0x17, 0x42, 0x56, 0x9F,
- 0x00, 0xE0,
- 0x3B, 0x6A,
-
- 0x3F, 0x8F, 0x51, 0x9F,
- 0x37, 0x1E, 0x4F, 0xE9,
-
- 0x37, 0x32, 0x2A, 0xAF,
- 0x00, 0xE0,
- 0x32, 0x00,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x27, 0xC0, 0x44, 0xC0,
-
- 0x36, 0x1F, 0x4F, 0xE9,
- 0x1F, 0x1F, 0x26, 0xDF,
-
- 0x37, 0x1B, 0x37, 0xBF,
- 0x17, 0x26, 0x17, 0xDF,
-
- 0x3E, 0x17, 0x4F, 0xE9,
- 0x3F, 0x3F, 0x4F, 0xE9,
-
- 0x34, 0x1F, 0x34, 0xAF,
- 0x2B, 0x05,
- 0xA7, 0x20,
-
- 0x33, 0x2B, 0x37, 0xDF,
- 0x27, 0x17, 0xC0, 0xAF,
-
- 0x34, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x2D, 0x21, 0x1A, 0xB0,
- 0x25, 0x21, 0x31, 0xB0,
-
- 0x0D, 0x21, 0x1A, 0xB2,
- 0x05, 0x21, 0x31, 0xB2,
-
- 0x03, 0x80, 0x2A, 0xEA,
- 0x17, 0xC1, 0x2B, 0xBD,
-
- 0x2D, 0x20,
- 0x25, 0x20,
- 0x05, 0x20,
- 0x0D, 0x20,
-
- 0xB3, 0x68,
- 0x97, 0x25,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0xC0, 0x33, 0xAF,
- 0x2F, 0xC0, 0x21, 0xC0,
-
- 0x16, 0x42, 0x56, 0x9F,
- 0x3C, 0x27, 0x4F, 0xE9,
-
- 0x1E, 0x62, 0x57, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x21, 0x31, 0xB4,
- 0x2D, 0x21, 0x1A, 0xB4,
-
- 0x3F, 0x2F, 0x5D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x33, 0x05,
- 0x00, 0xE0,
- 0x28, 0x19, 0x60, 0xEC,
-
- 0x0D, 0x21, 0x1A, 0xB6,
- 0x05, 0x21, 0x31, 0xB6,
-
- 0x37, 0x0F, 0x5C, 0x9F,
- 0x00, 0xE0,
- 0x2F, 0x20,
-
- 0x23, 0x3B, 0x33, 0xAD,
- 0x1E, 0x26, 0x1E, 0xDF,
-
- 0xA7, 0x1E, 0x4F, 0xE9,
- 0x17, 0x26, 0x16, 0xDF,
-
- 0x2D, 0x20,
- 0x00, 0xE0,
- 0xA8, 0x3F, 0x4F, 0xE9,
-
- 0x2F, 0x2F, 0x1E, 0xAF,
- 0x25, 0x20,
- 0x00, 0xE0,
-
- 0xA4, 0x16, 0x4F, 0xE9,
- 0x0F, 0xC0, 0x21, 0xC2,
-
- 0xA6, 0x80, 0x4F, 0xE9,
- 0x1F, 0x62, 0x57, 0x9F,
-
- 0x0D, 0x20,
- 0x05, 0x20,
- 0x2F, 0xC0, 0x21, 0xC6,
-
- 0x3F, 0x2F, 0x5D, 0x9F,
- 0x00, 0xE0,
- 0x0F, 0x20,
-
- 0x17, 0x50, 0x56, 0x9F,
- 0xA5, 0x37, 0x4F, 0xE9,
-
- 0x06, 0xC0, 0x21, 0xC4,
- 0x0F, 0x17, 0x0F, 0xAF,
-
- 0x37, 0x0F, 0x5C, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x2F, 0x20,
- 0x00, 0xE0,
- 0xA3, 0x80, 0x4F, 0xE9,
-
- 0x06, 0x20,
- 0x00, 0xE0,
- 0x1F, 0x26, 0x1F, 0xDF,
-
- 0x17, 0x26, 0x17, 0xDF,
- 0x35, 0x17, 0x4F, 0xE9,
-
- 0xA1, 0x1F, 0x4F, 0xE9,
- 0xA2, 0x3F, 0x4F, 0xE9,
-
- 0x06, 0x06, 0x1F, 0xAF,
- 0x39, 0x37, 0x4F, 0xE9,
-
- 0x2F, 0x2F, 0x17, 0xAF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xA0, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x31, 0x80, 0x4F, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x57, 0x39, 0x20, 0xE9,
-
- 0x16, 0x28, 0x20, 0xE9,
- 0x1D, 0x3B, 0x20, 0xE9,
-
- 0x1E, 0x2B, 0x20, 0xE9,
- 0x2B, 0x32, 0x20, 0xE9,
-
- 0x1C, 0x23, 0x20, 0xE9,
- 0x57, 0x36, 0x20, 0xE9,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x40, 0x40, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x90, 0xE2,
- 0x00, 0xE0,
-
- 0x68, 0xFF, 0x20, 0xEA,
- 0x19, 0xC8, 0xC1, 0xCD,
-
- 0x1F, 0xD7, 0x18, 0xBD,
- 0x3F, 0xD7, 0x22, 0xBD,
-
- 0x9F, 0x41, 0x49, 0xBD,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x25, 0x41, 0x49, 0xBD,
- 0x2D, 0x41, 0x51, 0xBD,
-
- 0x0D, 0x80, 0x07, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x35, 0x40, 0x48, 0xBD,
- 0x3D, 0x40, 0x50, 0xBD,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x25, 0x30,
- 0x2D, 0x30,
-
- 0x35, 0x30,
- 0xB5, 0x30,
- 0xBD, 0x30,
- 0x3D, 0x30,
-
- 0x9C, 0xA7, 0x5B, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x67, 0xFF, 0x0A, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC9, 0x41, 0xC8, 0xEC,
- 0x42, 0xE1,
- 0x00, 0xE0,
-
- 0x65, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xC8, 0x40, 0xC0, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x62, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
-};
-
-static unsigned char warp_g400_t2gz[] = {
-
- 0x00, 0x8A, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0A, 0x40, 0x50, 0xBF,
- 0x2A, 0x40, 0x60, 0xBF,
-
- 0x32, 0x41, 0x51, 0xBF,
- 0x3A, 0x41, 0x61, 0xBF,
-
- 0xC3, 0x6B,
- 0xD3, 0x6B,
- 0x00, 0x8A, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x23, 0x9F,
- 0x00, 0xE0,
- 0x51, 0x04,
-
- 0x90, 0xE2,
- 0x61, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x51, 0x41, 0xE0, 0xEC,
- 0x39, 0x67, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x63, 0xA0, 0xE8,
-
- 0x61, 0x41, 0xE0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x78, 0x80, 0x15, 0xEA,
- 0x10, 0x04,
- 0x20, 0x04,
-
- 0x61, 0x51, 0xE0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x52, 0xBF,
- 0x0F, 0x52, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x62, 0xBF,
- 0x1E, 0x51, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x0E, 0x61, 0x60, 0xEA,
-
- 0x32, 0x40, 0x50, 0xBD,
- 0x22, 0x40, 0x60, 0xBD,
-
- 0x12, 0x41, 0x51, 0xBD,
- 0x3A, 0x41, 0x61, 0xBD,
-
- 0xBF, 0x2F, 0x0E, 0xBD,
- 0x97, 0xE2,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x35, 0x48, 0xB1, 0xE8,
- 0x3D, 0x59, 0xB1, 0xE8,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x56, 0x31, 0x56, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x66, 0x31, 0x66, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x57, 0x39, 0x57, 0xBF,
- 0x67, 0x39, 0x67, 0xBF,
-
- 0x69, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x35, 0x00,
- 0x3D, 0x00,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0x8D, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x75, 0xF8, 0xEC,
- 0x35, 0x20,
- 0x3D, 0x20,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x53, 0x53, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x0E, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x48, 0x35, 0x48, 0xBF,
- 0x58, 0x35, 0x58, 0xBF,
-
- 0x68, 0x35, 0x68, 0xBF,
- 0x49, 0x3D, 0x49, 0xBF,
-
- 0x59, 0x3D, 0x59, 0xBF,
- 0x69, 0x3D, 0x69, 0xBF,
-
- 0x63, 0x63, 0x2D, 0xDF,
- 0x4D, 0x7D, 0xF8, 0xEC,
-
- 0x59, 0xE3,
- 0x00, 0xE0,
- 0xB8, 0x38, 0x33, 0xBF,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x18, 0x3A, 0x41, 0xE9,
-
- 0x3F, 0x53, 0xA0, 0xE8,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x63, 0xA0, 0xE8,
-
- 0x50, 0x70, 0xF8, 0xEC,
- 0x2B, 0x50, 0x3C, 0xE9,
-
- 0x1F, 0x0F, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x59, 0x78, 0xF8, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x56, 0x3F, 0x56, 0xDF,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x66, 0x3D, 0x66, 0xDF,
-
- 0x1D, 0x32, 0x41, 0xE9,
- 0x67, 0x3D, 0x67, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3F, 0x57, 0xDF,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x59, 0x3F, 0x59, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x69, 0x3D, 0x69, 0xDF,
-
- 0x48, 0x37, 0x48, 0xDF,
- 0x58, 0x3F, 0x58, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x68, 0x3D, 0x68, 0xDF,
- 0x49, 0x37, 0x49, 0xDF,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x34, 0x80, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x54, 0xB0,
- 0x02, 0x44, 0x64, 0xB0,
-
- 0x2A, 0x44, 0x54, 0xB2,
- 0x1A, 0x44, 0x64, 0xB2,
-
- 0x25, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x3D, 0xCF, 0x74, 0xC2,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x2A, 0x44, 0x54, 0xB4,
- 0x1A, 0x44, 0x64, 0xB4,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x38, 0x3D, 0x20, 0xE9,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x2A, 0x46, 0x56, 0xBF,
- 0x1A, 0x46, 0x66, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x0A, 0x47, 0x57, 0xBF,
- 0x02, 0x47, 0x67, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x53, 0xBF,
- 0x1A, 0x43, 0x63, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x48, 0x58, 0xBF,
- 0x02, 0x48, 0x68, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x2A, 0x49, 0x59, 0xBF,
- 0x1A, 0x49, 0x69, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x82, 0x30, 0x57, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x83, 0x38, 0x57, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x84, 0x31, 0x5E, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x85, 0x39, 0x5E, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x87, 0x77, 0x57, 0xE9,
- 0x8B, 0x3E, 0xBF, 0xEA,
-
- 0x80, 0x30, 0x57, 0xE9,
- 0x81, 0x38, 0x57, 0xE9,
-
- 0x82, 0x31, 0x57, 0xE9,
- 0x86, 0x78, 0x57, 0xE9,
-
- 0x83, 0x39, 0x57, 0xE9,
- 0x87, 0x79, 0x57, 0xE9,
-
- 0x30, 0x1F, 0x5F, 0xE9,
- 0x8A, 0x34, 0x20, 0xE9,
-
- 0x8B, 0x3C, 0x20, 0xE9,
- 0x37, 0x50, 0x60, 0xBD,
-
- 0x57, 0x0D, 0x20, 0xE9,
- 0x35, 0x51, 0x61, 0xBD,
-
- 0x2B, 0x50, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x0E, 0x77,
-
- 0x24, 0x51, 0x20, 0xE9,
- 0x9F, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x0E, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x0B, 0x46, 0xA0, 0xE8,
- 0x1B, 0x56, 0xA0, 0xE8,
-
- 0x2B, 0x66, 0xA0, 0xE8,
- 0x0C, 0x47, 0xA0, 0xE8,
-
- 0x1C, 0x57, 0xA0, 0xE8,
- 0x2C, 0x67, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x57, 0x80, 0x57, 0xCF,
-
- 0x66, 0x33, 0x66, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x67, 0x3B, 0x67, 0xCF,
-
- 0x0B, 0x48, 0xA0, 0xE8,
- 0x1B, 0x58, 0xA0, 0xE8,
-
- 0x2B, 0x68, 0xA0, 0xE8,
- 0x0C, 0x49, 0xA0, 0xE8,
-
- 0x1C, 0x59, 0xA0, 0xE8,
- 0x2C, 0x69, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x34, 0xD7, 0x34, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3C, 0xD7, 0x3C, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x34, 0x80, 0x34, 0xBD,
- 0x3C, 0x80, 0x3C, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x48, 0x80, 0x48, 0xCF,
- 0x59, 0x80, 0x59, 0xCF,
-
- 0x68, 0x33, 0x68, 0xCF,
- 0x49, 0x3B, 0x49, 0xCF,
-
- 0xBE, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x58, 0x33, 0x58, 0xCF,
- 0x69, 0x3B, 0x69, 0xCF,
-
- 0x7D, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_t2gza[] = {
-
- 0x00, 0x8A, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0A, 0x40, 0x50, 0xBF,
- 0x2A, 0x40, 0x60, 0xBF,
-
- 0x32, 0x41, 0x51, 0xBF,
- 0x3A, 0x41, 0x61, 0xBF,
-
- 0xC3, 0x6B,
- 0xD3, 0x6B,
- 0x00, 0x8A, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x23, 0x9F,
- 0x00, 0xE0,
- 0x51, 0x04,
-
- 0x90, 0xE2,
- 0x61, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x51, 0x41, 0xE0, 0xEC,
- 0x39, 0x67, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x63, 0xA0, 0xE8,
-
- 0x61, 0x41, 0xE0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x7C, 0x80, 0x15, 0xEA,
- 0x10, 0x04,
- 0x20, 0x04,
-
- 0x61, 0x51, 0xE0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x52, 0xBF,
- 0x0F, 0x52, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x62, 0xBF,
- 0x1E, 0x51, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x0E, 0x61, 0x60, 0xEA,
-
- 0x32, 0x40, 0x50, 0xBD,
- 0x22, 0x40, 0x60, 0xBD,
-
- 0x12, 0x41, 0x51, 0xBD,
- 0x3A, 0x41, 0x61, 0xBD,
-
- 0xBF, 0x2F, 0x0E, 0xBD,
- 0x97, 0xE2,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x35, 0x48, 0xB1, 0xE8,
- 0x3D, 0x59, 0xB1, 0xE8,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x56, 0x31, 0x56, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x66, 0x31, 0x66, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x57, 0x39, 0x57, 0xBF,
- 0x67, 0x39, 0x67, 0xBF,
-
- 0x6D, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x35, 0x00,
- 0x3D, 0x00,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0x8D, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x75, 0xF8, 0xEC,
- 0x35, 0x20,
- 0x3D, 0x20,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x53, 0x53, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x0E, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x48, 0x35, 0x48, 0xBF,
- 0x58, 0x35, 0x58, 0xBF,
-
- 0x68, 0x35, 0x68, 0xBF,
- 0x49, 0x3D, 0x49, 0xBF,
-
- 0x59, 0x3D, 0x59, 0xBF,
- 0x69, 0x3D, 0x69, 0xBF,
-
- 0x63, 0x63, 0x2D, 0xDF,
- 0x4D, 0x7D, 0xF8, 0xEC,
-
- 0x59, 0xE3,
- 0x00, 0xE0,
- 0xB8, 0x38, 0x33, 0xBF,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x18, 0x3A, 0x41, 0xE9,
-
- 0x3F, 0x53, 0xA0, 0xE8,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x63, 0xA0, 0xE8,
-
- 0x50, 0x70, 0xF8, 0xEC,
- 0x2B, 0x50, 0x3C, 0xE9,
-
- 0x1F, 0x0F, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x59, 0x78, 0xF8, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x56, 0x3F, 0x56, 0xDF,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x66, 0x3D, 0x66, 0xDF,
-
- 0x1D, 0x32, 0x41, 0xE9,
- 0x67, 0x3D, 0x67, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3F, 0x57, 0xDF,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x59, 0x3F, 0x59, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x69, 0x3D, 0x69, 0xDF,
-
- 0x48, 0x37, 0x48, 0xDF,
- 0x58, 0x3F, 0x58, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x68, 0x3D, 0x68, 0xDF,
- 0x49, 0x37, 0x49, 0xDF,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x34, 0x80, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x54, 0xB0,
- 0x02, 0x44, 0x64, 0xB0,
-
- 0x2A, 0x44, 0x54, 0xB2,
- 0x1A, 0x44, 0x64, 0xB2,
-
- 0x29, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x0F, 0xCF, 0x74, 0xC6,
- 0x3D, 0xCF, 0x74, 0xC2,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9C, 0x0F, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x54, 0xB4,
- 0x02, 0x44, 0x64, 0xB4,
-
- 0x2A, 0x44, 0x54, 0xB6,
- 0x1A, 0x44, 0x64, 0xB6,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x38, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x20,
- 0x02, 0x20,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x0A, 0x47, 0x57, 0xBF,
- 0x02, 0x47, 0x67, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x46, 0x56, 0xBF,
- 0x1A, 0x46, 0x66, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x36, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x37, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x53, 0xBF,
- 0x1A, 0x43, 0x63, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x9D, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x9E, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x48, 0x58, 0xBF,
- 0x02, 0x48, 0x68, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x2A, 0x49, 0x59, 0xBF,
- 0x1A, 0x49, 0x69, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x82, 0x30, 0x57, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x83, 0x38, 0x57, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x84, 0x31, 0x5E, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x85, 0x39, 0x5E, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x87, 0x77, 0x57, 0xE9,
- 0x8B, 0x3E, 0xBF, 0xEA,
-
- 0x80, 0x30, 0x57, 0xE9,
- 0x81, 0x38, 0x57, 0xE9,
-
- 0x82, 0x31, 0x57, 0xE9,
- 0x86, 0x78, 0x57, 0xE9,
-
- 0x83, 0x39, 0x57, 0xE9,
- 0x87, 0x79, 0x57, 0xE9,
-
- 0x30, 0x1F, 0x5F, 0xE9,
- 0x8A, 0x34, 0x20, 0xE9,
-
- 0x8B, 0x3C, 0x20, 0xE9,
- 0x37, 0x50, 0x60, 0xBD,
-
- 0x57, 0x0D, 0x20, 0xE9,
- 0x35, 0x51, 0x61, 0xBD,
-
- 0x2B, 0x50, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x0E, 0x77,
-
- 0x24, 0x51, 0x20, 0xE9,
- 0x9B, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x0E, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x0B, 0x46, 0xA0, 0xE8,
- 0x1B, 0x56, 0xA0, 0xE8,
-
- 0x2B, 0x66, 0xA0, 0xE8,
- 0x0C, 0x47, 0xA0, 0xE8,
-
- 0x1C, 0x57, 0xA0, 0xE8,
- 0x2C, 0x67, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x57, 0x80, 0x57, 0xCF,
-
- 0x66, 0x33, 0x66, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x67, 0x3B, 0x67, 0xCF,
-
- 0x0B, 0x48, 0xA0, 0xE8,
- 0x1B, 0x58, 0xA0, 0xE8,
-
- 0x2B, 0x68, 0xA0, 0xE8,
- 0x0C, 0x49, 0xA0, 0xE8,
-
- 0x1C, 0x59, 0xA0, 0xE8,
- 0x2C, 0x69, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x34, 0xD7, 0x34, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3C, 0xD7, 0x3C, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x34, 0x80, 0x34, 0xBD,
- 0x3C, 0x80, 0x3C, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x48, 0x80, 0x48, 0xCF,
- 0x59, 0x80, 0x59, 0xCF,
-
- 0x68, 0x33, 0x68, 0xCF,
- 0x49, 0x3B, 0x49, 0xCF,
-
- 0xBA, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x58, 0x33, 0x58, 0xCF,
- 0x69, 0x3B, 0x69, 0xCF,
-
- 0x79, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_t2gzaf[] = {
-
- 0x00, 0x8A, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0A, 0x40, 0x50, 0xBF,
- 0x2A, 0x40, 0x60, 0xBF,
-
- 0x32, 0x41, 0x51, 0xBF,
- 0x3A, 0x41, 0x61, 0xBF,
-
- 0xC3, 0x6B,
- 0xD3, 0x6B,
- 0x00, 0x8A, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x23, 0x9F,
- 0x00, 0xE0,
- 0x51, 0x04,
-
- 0x90, 0xE2,
- 0x61, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x51, 0x41, 0xE0, 0xEC,
- 0x39, 0x67, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x63, 0xA0, 0xE8,
-
- 0x61, 0x41, 0xE0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x81, 0x80, 0x15, 0xEA,
- 0x10, 0x04,
- 0x20, 0x04,
-
- 0x61, 0x51, 0xE0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x52, 0xBF,
- 0x0F, 0x52, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x62, 0xBF,
- 0x1E, 0x51, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x0E, 0x61, 0x60, 0xEA,
-
- 0x32, 0x40, 0x50, 0xBD,
- 0x22, 0x40, 0x60, 0xBD,
-
- 0x12, 0x41, 0x51, 0xBD,
- 0x3A, 0x41, 0x61, 0xBD,
-
- 0xBF, 0x2F, 0x0E, 0xBD,
- 0x97, 0xE2,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x35, 0x48, 0xB1, 0xE8,
- 0x3D, 0x59, 0xB1, 0xE8,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x56, 0x31, 0x56, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x66, 0x31, 0x66, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x57, 0x39, 0x57, 0xBF,
- 0x67, 0x39, 0x67, 0xBF,
-
- 0x72, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x35, 0x00,
- 0x3D, 0x00,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0x8D, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x75, 0xF8, 0xEC,
- 0x35, 0x20,
- 0x3D, 0x20,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x53, 0x53, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x0E, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x48, 0x35, 0x48, 0xBF,
- 0x58, 0x35, 0x58, 0xBF,
-
- 0x68, 0x35, 0x68, 0xBF,
- 0x49, 0x3D, 0x49, 0xBF,
-
- 0x59, 0x3D, 0x59, 0xBF,
- 0x69, 0x3D, 0x69, 0xBF,
-
- 0x63, 0x63, 0x2D, 0xDF,
- 0x4D, 0x7D, 0xF8, 0xEC,
-
- 0x59, 0xE3,
- 0x00, 0xE0,
- 0xB8, 0x38, 0x33, 0xBF,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x18, 0x3A, 0x41, 0xE9,
-
- 0x3F, 0x53, 0xA0, 0xE8,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x63, 0xA0, 0xE8,
-
- 0x50, 0x70, 0xF8, 0xEC,
- 0x2B, 0x50, 0x3C, 0xE9,
-
- 0x1F, 0x0F, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x59, 0x78, 0xF8, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x56, 0x3F, 0x56, 0xDF,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x66, 0x3D, 0x66, 0xDF,
-
- 0x1D, 0x32, 0x41, 0xE9,
- 0x67, 0x3D, 0x67, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3F, 0x57, 0xDF,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x59, 0x3F, 0x59, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x69, 0x3D, 0x69, 0xDF,
-
- 0x48, 0x37, 0x48, 0xDF,
- 0x58, 0x3F, 0x58, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x68, 0x3D, 0x68, 0xDF,
- 0x49, 0x37, 0x49, 0xDF,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x54, 0xB0,
- 0x02, 0x44, 0x64, 0xB0,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB2,
- 0x1A, 0x44, 0x64, 0xB2,
-
- 0x2E, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x3D, 0xCF, 0x74, 0xC2,
- 0x0F, 0xCF, 0x74, 0xC6,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9C, 0x0F, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x54, 0xB4,
- 0x02, 0x44, 0x64, 0xB4,
-
- 0x2A, 0x44, 0x54, 0xB6,
- 0x1A, 0x44, 0x64, 0xB6,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x38, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x20,
- 0x02, 0x20,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x3D, 0xCF, 0x75, 0xC6,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x0A, 0x45, 0x55, 0xB6,
- 0x02, 0x45, 0x65, 0xB6,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x3D, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x2A, 0x46, 0x56, 0xBF,
- 0x1A, 0x46, 0x66, 0xBF,
-
- 0x0A, 0x47, 0x57, 0xBF,
- 0x02, 0x47, 0x67, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x38, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9D, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x9E, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x53, 0xBF,
- 0x1A, 0x43, 0x63, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x35, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x39, 0x38, 0x4F, 0xE9,
-
- 0x0A, 0x48, 0x58, 0xBF,
- 0x02, 0x48, 0x68, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x2A, 0x49, 0x59, 0xBF,
- 0x1A, 0x49, 0x69, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x82, 0x30, 0x57, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x83, 0x38, 0x57, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x84, 0x31, 0x5E, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x85, 0x39, 0x5E, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x87, 0x77, 0x57, 0xE9,
- 0x8B, 0x3E, 0xBF, 0xEA,
-
- 0x80, 0x30, 0x57, 0xE9,
- 0x81, 0x38, 0x57, 0xE9,
-
- 0x82, 0x31, 0x57, 0xE9,
- 0x86, 0x78, 0x57, 0xE9,
-
- 0x83, 0x39, 0x57, 0xE9,
- 0x87, 0x79, 0x57, 0xE9,
-
- 0x30, 0x1F, 0x5F, 0xE9,
- 0x8A, 0x34, 0x20, 0xE9,
-
- 0x8B, 0x3C, 0x20, 0xE9,
- 0x37, 0x50, 0x60, 0xBD,
-
- 0x57, 0x0D, 0x20, 0xE9,
- 0x35, 0x51, 0x61, 0xBD,
-
- 0x2B, 0x50, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x0E, 0x77,
-
- 0x24, 0x51, 0x20, 0xE9,
- 0x96, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x0E, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x0B, 0x46, 0xA0, 0xE8,
- 0x1B, 0x56, 0xA0, 0xE8,
-
- 0x2B, 0x66, 0xA0, 0xE8,
- 0x0C, 0x47, 0xA0, 0xE8,
-
- 0x1C, 0x57, 0xA0, 0xE8,
- 0x2C, 0x67, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x57, 0x80, 0x57, 0xCF,
-
- 0x66, 0x33, 0x66, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x67, 0x3B, 0x67, 0xCF,
-
- 0x0B, 0x48, 0xA0, 0xE8,
- 0x1B, 0x58, 0xA0, 0xE8,
-
- 0x2B, 0x68, 0xA0, 0xE8,
- 0x0C, 0x49, 0xA0, 0xE8,
-
- 0x1C, 0x59, 0xA0, 0xE8,
- 0x2C, 0x69, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x34, 0xD7, 0x34, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3C, 0xD7, 0x3C, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x34, 0x80, 0x34, 0xBD,
- 0x3C, 0x80, 0x3C, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x48, 0x80, 0x48, 0xCF,
- 0x59, 0x80, 0x59, 0xCF,
-
- 0x68, 0x33, 0x68, 0xCF,
- 0x49, 0x3B, 0x49, 0xCF,
-
- 0xB5, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x58, 0x33, 0x58, 0xCF,
- 0x69, 0x3B, 0x69, 0xCF,
-
- 0x74, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_t2gzf[] = {
-
- 0x00, 0x8A, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0A, 0x40, 0x50, 0xBF,
- 0x2A, 0x40, 0x60, 0xBF,
-
- 0x32, 0x41, 0x51, 0xBF,
- 0x3A, 0x41, 0x61, 0xBF,
-
- 0xC3, 0x6B,
- 0xD3, 0x6B,
- 0x00, 0x8A, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x23, 0x9F,
- 0x00, 0xE0,
- 0x51, 0x04,
-
- 0x90, 0xE2,
- 0x61, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x51, 0x41, 0xE0, 0xEC,
- 0x39, 0x67, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x63, 0xA0, 0xE8,
-
- 0x61, 0x41, 0xE0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x7D, 0x80, 0x15, 0xEA,
- 0x10, 0x04,
- 0x20, 0x04,
-
- 0x61, 0x51, 0xE0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x52, 0xBF,
- 0x0F, 0x52, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x62, 0xBF,
- 0x1E, 0x51, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x0E, 0x61, 0x60, 0xEA,
-
- 0x32, 0x40, 0x50, 0xBD,
- 0x22, 0x40, 0x60, 0xBD,
-
- 0x12, 0x41, 0x51, 0xBD,
- 0x3A, 0x41, 0x61, 0xBD,
-
- 0xBF, 0x2F, 0x0E, 0xBD,
- 0x97, 0xE2,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x35, 0x48, 0xB1, 0xE8,
- 0x3D, 0x59, 0xB1, 0xE8,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x56, 0x31, 0x56, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x66, 0x31, 0x66, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x57, 0x39, 0x57, 0xBF,
- 0x67, 0x39, 0x67, 0xBF,
-
- 0x6E, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x35, 0x00,
- 0x3D, 0x00,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0x8D, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x75, 0xF8, 0xEC,
- 0x35, 0x20,
- 0x3D, 0x20,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x53, 0x53, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x0E, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x48, 0x35, 0x48, 0xBF,
- 0x58, 0x35, 0x58, 0xBF,
-
- 0x68, 0x35, 0x68, 0xBF,
- 0x49, 0x3D, 0x49, 0xBF,
-
- 0x59, 0x3D, 0x59, 0xBF,
- 0x69, 0x3D, 0x69, 0xBF,
-
- 0x63, 0x63, 0x2D, 0xDF,
- 0x4D, 0x7D, 0xF8, 0xEC,
-
- 0x59, 0xE3,
- 0x00, 0xE0,
- 0xB8, 0x38, 0x33, 0xBF,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x18, 0x3A, 0x41, 0xE9,
-
- 0x3F, 0x53, 0xA0, 0xE8,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x63, 0xA0, 0xE8,
-
- 0x50, 0x70, 0xF8, 0xEC,
- 0x2B, 0x50, 0x3C, 0xE9,
-
- 0x1F, 0x0F, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x59, 0x78, 0xF8, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x56, 0x3F, 0x56, 0xDF,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x66, 0x3D, 0x66, 0xDF,
-
- 0x1D, 0x32, 0x41, 0xE9,
- 0x67, 0x3D, 0x67, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3F, 0x57, 0xDF,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x59, 0x3F, 0x59, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x69, 0x3D, 0x69, 0xDF,
-
- 0x48, 0x37, 0x48, 0xDF,
- 0x58, 0x3F, 0x58, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x68, 0x3D, 0x68, 0xDF,
- 0x49, 0x37, 0x49, 0xDF,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x34, 0x80, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0F, 0xCF, 0x75, 0xC6,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x54, 0xB0,
- 0x02, 0x44, 0x64, 0xB0,
-
- 0x2A, 0x44, 0x54, 0xB2,
- 0x1A, 0x44, 0x64, 0xB2,
-
- 0x28, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x3D, 0xCF, 0x74, 0xC2,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x31, 0x0F, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x54, 0xB4,
- 0x02, 0x44, 0x64, 0xB4,
-
- 0x2A, 0x45, 0x55, 0xB6,
- 0x1A, 0x45, 0x65, 0xB6,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x38, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x20,
- 0x02, 0x20,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x0A, 0x47, 0x57, 0xBF,
- 0x02, 0x47, 0x67, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x46, 0x56, 0xBF,
- 0x1A, 0x46, 0x66, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x36, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x37, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x53, 0xBF,
- 0x1A, 0x43, 0x63, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x35, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x39, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x48, 0x58, 0xBF,
- 0x02, 0x48, 0x68, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x2A, 0x49, 0x59, 0xBF,
- 0x1A, 0x49, 0x69, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x82, 0x30, 0x57, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x83, 0x38, 0x57, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x84, 0x31, 0x5E, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x85, 0x39, 0x5E, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x87, 0x77, 0x57, 0xE9,
- 0x8B, 0x3E, 0xBF, 0xEA,
-
- 0x80, 0x30, 0x57, 0xE9,
- 0x81, 0x38, 0x57, 0xE9,
-
- 0x82, 0x31, 0x57, 0xE9,
- 0x86, 0x78, 0x57, 0xE9,
-
- 0x83, 0x39, 0x57, 0xE9,
- 0x87, 0x79, 0x57, 0xE9,
-
- 0x30, 0x1F, 0x5F, 0xE9,
- 0x8A, 0x34, 0x20, 0xE9,
-
- 0x8B, 0x3C, 0x20, 0xE9,
- 0x37, 0x50, 0x60, 0xBD,
-
- 0x57, 0x0D, 0x20, 0xE9,
- 0x35, 0x51, 0x61, 0xBD,
-
- 0x2B, 0x50, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x0E, 0x77,
-
- 0x24, 0x51, 0x20, 0xE9,
- 0x9A, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x0E, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x0B, 0x46, 0xA0, 0xE8,
- 0x1B, 0x56, 0xA0, 0xE8,
-
- 0x2B, 0x66, 0xA0, 0xE8,
- 0x0C, 0x47, 0xA0, 0xE8,
-
- 0x1C, 0x57, 0xA0, 0xE8,
- 0x2C, 0x67, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x57, 0x80, 0x57, 0xCF,
-
- 0x66, 0x33, 0x66, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x67, 0x3B, 0x67, 0xCF,
-
- 0x0B, 0x48, 0xA0, 0xE8,
- 0x1B, 0x58, 0xA0, 0xE8,
-
- 0x2B, 0x68, 0xA0, 0xE8,
- 0x0C, 0x49, 0xA0, 0xE8,
-
- 0x1C, 0x59, 0xA0, 0xE8,
- 0x2C, 0x69, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x34, 0xD7, 0x34, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3C, 0xD7, 0x3C, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x34, 0x80, 0x34, 0xBD,
- 0x3C, 0x80, 0x3C, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x48, 0x80, 0x48, 0xCF,
- 0x59, 0x80, 0x59, 0xCF,
-
- 0x68, 0x33, 0x68, 0xCF,
- 0x49, 0x3B, 0x49, 0xCF,
-
- 0xBB, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x58, 0x33, 0x58, 0xCF,
- 0x69, 0x3B, 0x69, 0xCF,
-
- 0x78, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_t2gzs[] = {
-
- 0x00, 0x8A, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0A, 0x40, 0x50, 0xBF,
- 0x2A, 0x40, 0x60, 0xBF,
-
- 0x32, 0x41, 0x51, 0xBF,
- 0x3A, 0x41, 0x61, 0xBF,
-
- 0xC3, 0x6B,
- 0xD3, 0x6B,
- 0x00, 0x8A, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x23, 0x9F,
- 0x00, 0xE0,
- 0x51, 0x04,
-
- 0x90, 0xE2,
- 0x61, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x51, 0x41, 0xE0, 0xEC,
- 0x39, 0x67, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x63, 0xA0, 0xE8,
-
- 0x61, 0x41, 0xE0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x85, 0x80, 0x15, 0xEA,
- 0x10, 0x04,
- 0x20, 0x04,
-
- 0x61, 0x51, 0xE0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x52, 0xBF,
- 0x0F, 0x52, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x62, 0xBF,
- 0x1E, 0x51, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x0E, 0x61, 0x60, 0xEA,
-
- 0x32, 0x40, 0x50, 0xBD,
- 0x22, 0x40, 0x60, 0xBD,
-
- 0x12, 0x41, 0x51, 0xBD,
- 0x3A, 0x41, 0x61, 0xBD,
-
- 0xBF, 0x2F, 0x0E, 0xBD,
- 0x97, 0xE2,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x35, 0x48, 0xB1, 0xE8,
- 0x3D, 0x59, 0xB1, 0xE8,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x56, 0x31, 0x56, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x66, 0x31, 0x66, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x57, 0x39, 0x57, 0xBF,
- 0x67, 0x39, 0x67, 0xBF,
-
- 0x76, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x35, 0x00,
- 0x3D, 0x00,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0x8D, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x75, 0xF8, 0xEC,
- 0x35, 0x20,
- 0x3D, 0x20,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x53, 0x53, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x0E, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x48, 0x35, 0x48, 0xBF,
- 0x58, 0x35, 0x58, 0xBF,
-
- 0x68, 0x35, 0x68, 0xBF,
- 0x49, 0x3D, 0x49, 0xBF,
-
- 0x59, 0x3D, 0x59, 0xBF,
- 0x69, 0x3D, 0x69, 0xBF,
-
- 0x63, 0x63, 0x2D, 0xDF,
- 0x4D, 0x7D, 0xF8, 0xEC,
-
- 0x59, 0xE3,
- 0x00, 0xE0,
- 0xB8, 0x38, 0x33, 0xBF,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x18, 0x3A, 0x41, 0xE9,
-
- 0x3F, 0x53, 0xA0, 0xE8,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x63, 0xA0, 0xE8,
-
- 0x50, 0x70, 0xF8, 0xEC,
- 0x2B, 0x50, 0x3C, 0xE9,
-
- 0x1F, 0x0F, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x59, 0x78, 0xF8, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x56, 0x3F, 0x56, 0xDF,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x66, 0x3D, 0x66, 0xDF,
-
- 0x1D, 0x32, 0x41, 0xE9,
- 0x67, 0x3D, 0x67, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3F, 0x57, 0xDF,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x59, 0x3F, 0x59, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x69, 0x3D, 0x69, 0xDF,
-
- 0x48, 0x37, 0x48, 0xDF,
- 0x58, 0x3F, 0x58, 0xDF,
-
- 0x68, 0x3D, 0x68, 0xDF,
- 0x49, 0x37, 0x49, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x0F, 0xCF, 0x74, 0xC2,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x54, 0xB0,
- 0x02, 0x44, 0x64, 0xB0,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x38, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB2,
- 0x1A, 0x44, 0x64, 0xB2,
-
- 0x31, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x0F, 0xCF, 0x75, 0xC0,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x3D, 0xCF, 0x75, 0xC2,
- 0x37, 0xCF, 0x75, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA6, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA3, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB4,
- 0x1A, 0x44, 0x64, 0xB4,
-
- 0x0A, 0x45, 0x55, 0xB0,
- 0x02, 0x45, 0x65, 0xB0,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA0, 0x37, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x55, 0xB2,
- 0x1A, 0x45, 0x65, 0xB2,
-
- 0x0A, 0x45, 0x55, 0xB4,
- 0x02, 0x45, 0x65, 0xB4,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x20,
- 0x1A, 0x20,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x2A, 0x46, 0x56, 0xBF,
- 0x1A, 0x46, 0x66, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0xA7, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0xA8, 0x38, 0x4F, 0xE9,
-
- 0x0A, 0x47, 0x57, 0xBF,
- 0x02, 0x47, 0x67, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA4, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA5, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x53, 0xBF,
- 0x1A, 0x43, 0x63, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0xA1, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0xA2, 0x38, 0x4F, 0xE9,
-
- 0x0A, 0x48, 0x58, 0xBF,
- 0x02, 0x48, 0x68, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x2A, 0x49, 0x59, 0xBF,
- 0x1A, 0x49, 0x69, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x82, 0x30, 0x57, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x83, 0x38, 0x57, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x84, 0x31, 0x5E, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x85, 0x39, 0x5E, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x87, 0x77, 0x57, 0xE9,
- 0x8B, 0x3E, 0xBF, 0xEA,
-
- 0x80, 0x30, 0x57, 0xE9,
- 0x81, 0x38, 0x57, 0xE9,
-
- 0x82, 0x31, 0x57, 0xE9,
- 0x86, 0x78, 0x57, 0xE9,
-
- 0x83, 0x39, 0x57, 0xE9,
- 0x87, 0x79, 0x57, 0xE9,
-
- 0x30, 0x1F, 0x5F, 0xE9,
- 0x8A, 0x34, 0x20, 0xE9,
-
- 0x8B, 0x3C, 0x20, 0xE9,
- 0x37, 0x50, 0x60, 0xBD,
-
- 0x57, 0x0D, 0x20, 0xE9,
- 0x35, 0x51, 0x61, 0xBD,
-
- 0x2B, 0x50, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x0E, 0x77,
-
- 0x24, 0x51, 0x20, 0xE9,
- 0x92, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x0E, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x0B, 0x46, 0xA0, 0xE8,
- 0x1B, 0x56, 0xA0, 0xE8,
-
- 0x2B, 0x66, 0xA0, 0xE8,
- 0x0C, 0x47, 0xA0, 0xE8,
-
- 0x1C, 0x57, 0xA0, 0xE8,
- 0x2C, 0x67, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x57, 0x80, 0x57, 0xCF,
-
- 0x66, 0x33, 0x66, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x67, 0x3B, 0x67, 0xCF,
-
- 0x0B, 0x48, 0xA0, 0xE8,
- 0x1B, 0x58, 0xA0, 0xE8,
-
- 0x2B, 0x68, 0xA0, 0xE8,
- 0x0C, 0x49, 0xA0, 0xE8,
-
- 0x1C, 0x59, 0xA0, 0xE8,
- 0x2C, 0x69, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x34, 0xD7, 0x34, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3C, 0xD7, 0x3C, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x34, 0x80, 0x34, 0xBD,
- 0x3C, 0x80, 0x3C, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x48, 0x80, 0x48, 0xCF,
- 0x59, 0x80, 0x59, 0xCF,
-
- 0x68, 0x33, 0x68, 0xCF,
- 0x49, 0x3B, 0x49, 0xCF,
-
- 0xB2, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x58, 0x33, 0x58, 0xCF,
- 0x69, 0x3B, 0x69, 0xCF,
-
- 0x70, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_t2gzsa[] = {
-
- 0x00, 0x8A, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0A, 0x40, 0x50, 0xBF,
- 0x2A, 0x40, 0x60, 0xBF,
-
- 0x32, 0x41, 0x51, 0xBF,
- 0x3A, 0x41, 0x61, 0xBF,
-
- 0xC3, 0x6B,
- 0xD3, 0x6B,
- 0x00, 0x8A, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x23, 0x9F,
- 0x00, 0xE0,
- 0x51, 0x04,
-
- 0x90, 0xE2,
- 0x61, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x51, 0x41, 0xE0, 0xEC,
- 0x39, 0x67, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x63, 0xA0, 0xE8,
-
- 0x61, 0x41, 0xE0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x8A, 0x80, 0x15, 0xEA,
- 0x10, 0x04,
- 0x20, 0x04,
-
- 0x61, 0x51, 0xE0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x52, 0xBF,
- 0x0F, 0x52, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x62, 0xBF,
- 0x1E, 0x51, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x0E, 0x61, 0x60, 0xEA,
-
- 0x32, 0x40, 0x50, 0xBD,
- 0x22, 0x40, 0x60, 0xBD,
-
- 0x12, 0x41, 0x51, 0xBD,
- 0x3A, 0x41, 0x61, 0xBD,
-
- 0xBF, 0x2F, 0x0E, 0xBD,
- 0x97, 0xE2,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x35, 0x48, 0xB1, 0xE8,
- 0x3D, 0x59, 0xB1, 0xE8,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x56, 0x31, 0x56, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x66, 0x31, 0x66, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x57, 0x39, 0x57, 0xBF,
- 0x67, 0x39, 0x67, 0xBF,
-
- 0x7B, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x35, 0x00,
- 0x3D, 0x00,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0x8D, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x75, 0xF8, 0xEC,
- 0x35, 0x20,
- 0x3D, 0x20,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x53, 0x53, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x0E, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x48, 0x35, 0x48, 0xBF,
- 0x58, 0x35, 0x58, 0xBF,
-
- 0x68, 0x35, 0x68, 0xBF,
- 0x49, 0x3D, 0x49, 0xBF,
-
- 0x59, 0x3D, 0x59, 0xBF,
- 0x69, 0x3D, 0x69, 0xBF,
-
- 0x63, 0x63, 0x2D, 0xDF,
- 0x4D, 0x7D, 0xF8, 0xEC,
-
- 0x59, 0xE3,
- 0x00, 0xE0,
- 0xB8, 0x38, 0x33, 0xBF,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x18, 0x3A, 0x41, 0xE9,
-
- 0x3F, 0x53, 0xA0, 0xE8,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x63, 0xA0, 0xE8,
-
- 0x50, 0x70, 0xF8, 0xEC,
- 0x2B, 0x50, 0x3C, 0xE9,
-
- 0x1F, 0x0F, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x59, 0x78, 0xF8, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x56, 0x3F, 0x56, 0xDF,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x66, 0x3D, 0x66, 0xDF,
-
- 0x1D, 0x32, 0x41, 0xE9,
- 0x67, 0x3D, 0x67, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3F, 0x57, 0xDF,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x59, 0x3F, 0x59, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x69, 0x3D, 0x69, 0xDF,
-
- 0x48, 0x37, 0x48, 0xDF,
- 0x58, 0x3F, 0x58, 0xDF,
-
- 0x68, 0x3D, 0x68, 0xDF,
- 0x49, 0x37, 0x49, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x0F, 0xCF, 0x74, 0xC2,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x54, 0xB0,
- 0x02, 0x44, 0x64, 0xB0,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x38, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB2,
- 0x1A, 0x44, 0x64, 0xB2,
-
- 0x36, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x0F, 0xCF, 0x75, 0xC0,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x3D, 0xCF, 0x75, 0xC2,
- 0x37, 0xCF, 0x75, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA6, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA3, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB4,
- 0x1A, 0x44, 0x64, 0xB4,
-
- 0x0A, 0x45, 0x55, 0xB0,
- 0x02, 0x45, 0x65, 0xB0,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA0, 0x37, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x55, 0xB2,
- 0x1A, 0x45, 0x65, 0xB2,
-
- 0x0A, 0x45, 0x55, 0xB4,
- 0x02, 0x45, 0x65, 0xB4,
-
- 0x0F, 0xCF, 0x74, 0xC6,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA7, 0x30, 0x4F, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9C, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA8, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB6,
- 0x1A, 0x44, 0x64, 0xB6,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x2A, 0x46, 0x56, 0xBF,
- 0x1A, 0x46, 0x66, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA4, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA5, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x47, 0x57, 0xBF,
- 0x02, 0x47, 0x67, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA1, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA2, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x53, 0xBF,
- 0x1A, 0x43, 0x63, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x9D, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x9E, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x48, 0x58, 0xBF,
- 0x02, 0x48, 0x68, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x2A, 0x49, 0x59, 0xBF,
- 0x1A, 0x49, 0x69, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x82, 0x30, 0x57, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x83, 0x38, 0x57, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x84, 0x31, 0x5E, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x85, 0x39, 0x5E, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x87, 0x77, 0x57, 0xE9,
- 0x8B, 0x3E, 0xBF, 0xEA,
-
- 0x80, 0x30, 0x57, 0xE9,
- 0x81, 0x38, 0x57, 0xE9,
-
- 0x82, 0x31, 0x57, 0xE9,
- 0x86, 0x78, 0x57, 0xE9,
-
- 0x83, 0x39, 0x57, 0xE9,
- 0x87, 0x79, 0x57, 0xE9,
-
- 0x30, 0x1F, 0x5F, 0xE9,
- 0x8A, 0x34, 0x20, 0xE9,
-
- 0x8B, 0x3C, 0x20, 0xE9,
- 0x37, 0x50, 0x60, 0xBD,
-
- 0x57, 0x0D, 0x20, 0xE9,
- 0x35, 0x51, 0x61, 0xBD,
-
- 0x2B, 0x50, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x0E, 0x77,
-
- 0x24, 0x51, 0x20, 0xE9,
- 0x8D, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x0E, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x0B, 0x46, 0xA0, 0xE8,
- 0x1B, 0x56, 0xA0, 0xE8,
-
- 0x2B, 0x66, 0xA0, 0xE8,
- 0x0C, 0x47, 0xA0, 0xE8,
-
- 0x1C, 0x57, 0xA0, 0xE8,
- 0x2C, 0x67, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x57, 0x80, 0x57, 0xCF,
-
- 0x66, 0x33, 0x66, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x67, 0x3B, 0x67, 0xCF,
-
- 0x0B, 0x48, 0xA0, 0xE8,
- 0x1B, 0x58, 0xA0, 0xE8,
-
- 0x2B, 0x68, 0xA0, 0xE8,
- 0x0C, 0x49, 0xA0, 0xE8,
-
- 0x1C, 0x59, 0xA0, 0xE8,
- 0x2C, 0x69, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x34, 0xD7, 0x34, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3C, 0xD7, 0x3C, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x34, 0x80, 0x34, 0xBD,
- 0x3C, 0x80, 0x3C, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x48, 0x80, 0x48, 0xCF,
- 0x59, 0x80, 0x59, 0xCF,
-
- 0x68, 0x33, 0x68, 0xCF,
- 0x49, 0x3B, 0x49, 0xCF,
-
- 0xAD, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x58, 0x33, 0x58, 0xCF,
- 0x69, 0x3B, 0x69, 0xCF,
-
- 0x6B, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_t2gzsaf[] = {
-
- 0x00, 0x8A, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0A, 0x40, 0x50, 0xBF,
- 0x2A, 0x40, 0x60, 0xBF,
-
- 0x32, 0x41, 0x51, 0xBF,
- 0x3A, 0x41, 0x61, 0xBF,
-
- 0xC3, 0x6B,
- 0xD3, 0x6B,
- 0x00, 0x8A, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x23, 0x9F,
- 0x00, 0xE0,
- 0x51, 0x04,
-
- 0x90, 0xE2,
- 0x61, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x51, 0x41, 0xE0, 0xEC,
- 0x39, 0x67, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x63, 0xA0, 0xE8,
-
- 0x61, 0x41, 0xE0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x8E, 0x80, 0x15, 0xEA,
- 0x10, 0x04,
- 0x20, 0x04,
-
- 0x61, 0x51, 0xE0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x52, 0xBF,
- 0x0F, 0x52, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x62, 0xBF,
- 0x1E, 0x51, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x0E, 0x61, 0x60, 0xEA,
-
- 0x32, 0x40, 0x50, 0xBD,
- 0x22, 0x40, 0x60, 0xBD,
-
- 0x12, 0x41, 0x51, 0xBD,
- 0x3A, 0x41, 0x61, 0xBD,
-
- 0xBF, 0x2F, 0x0E, 0xBD,
- 0x97, 0xE2,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x35, 0x48, 0xB1, 0xE8,
- 0x3D, 0x59, 0xB1, 0xE8,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x56, 0x31, 0x56, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x66, 0x31, 0x66, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x57, 0x39, 0x57, 0xBF,
- 0x67, 0x39, 0x67, 0xBF,
-
- 0x7F, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x35, 0x00,
- 0x3D, 0x00,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0x8D, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x75, 0xF8, 0xEC,
- 0x35, 0x20,
- 0x3D, 0x20,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x53, 0x53, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x0E, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x48, 0x35, 0x48, 0xBF,
- 0x58, 0x35, 0x58, 0xBF,
-
- 0x68, 0x35, 0x68, 0xBF,
- 0x49, 0x3D, 0x49, 0xBF,
-
- 0x59, 0x3D, 0x59, 0xBF,
- 0x69, 0x3D, 0x69, 0xBF,
-
- 0x63, 0x63, 0x2D, 0xDF,
- 0x4D, 0x7D, 0xF8, 0xEC,
-
- 0x59, 0xE3,
- 0x00, 0xE0,
- 0xB8, 0x38, 0x33, 0xBF,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x18, 0x3A, 0x41, 0xE9,
-
- 0x3F, 0x53, 0xA0, 0xE8,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x63, 0xA0, 0xE8,
-
- 0x50, 0x70, 0xF8, 0xEC,
- 0x2B, 0x50, 0x3C, 0xE9,
-
- 0x1F, 0x0F, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x59, 0x78, 0xF8, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x56, 0x3F, 0x56, 0xDF,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x66, 0x3D, 0x66, 0xDF,
-
- 0x1D, 0x32, 0x41, 0xE9,
- 0x67, 0x3D, 0x67, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3F, 0x57, 0xDF,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x59, 0x3F, 0x59, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x69, 0x3D, 0x69, 0xDF,
-
- 0x48, 0x37, 0x48, 0xDF,
- 0x58, 0x3F, 0x58, 0xDF,
-
- 0x68, 0x3D, 0x68, 0xDF,
- 0x49, 0x37, 0x49, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x0F, 0xCF, 0x74, 0xC2,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x54, 0xB0,
- 0x02, 0x44, 0x64, 0xB0,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x38, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB2,
- 0x1A, 0x44, 0x64, 0xB2,
-
- 0x3A, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x0F, 0xCF, 0x75, 0xC0,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x3D, 0xCF, 0x75, 0xC2,
- 0x37, 0xCF, 0x75, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA6, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA3, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB4,
- 0x1A, 0x44, 0x64, 0xB4,
-
- 0x0A, 0x45, 0x55, 0xB0,
- 0x02, 0x45, 0x65, 0xB0,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA0, 0x37, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x55, 0xB2,
- 0x1A, 0x45, 0x65, 0xB2,
-
- 0x0A, 0x45, 0x55, 0xB4,
- 0x02, 0x45, 0x65, 0xB4,
-
- 0x0F, 0xCF, 0x74, 0xC6,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA7, 0x30, 0x4F, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9C, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA8, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB6,
- 0x1A, 0x44, 0x64, 0xB6,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x45, 0x55, 0xB6,
- 0x02, 0x45, 0x65, 0xB6,
-
- 0x3D, 0xCF, 0x75, 0xC6,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x2A, 0x46, 0x56, 0xBF,
- 0x1A, 0x46, 0x66, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA4, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA5, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x3D, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x0A, 0x47, 0x57, 0xBF,
- 0x02, 0x47, 0x67, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0xA1, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0xA2, 0x38, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9D, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x9E, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x53, 0xBF,
- 0x1A, 0x43, 0x63, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x35, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x39, 0x38, 0x4F, 0xE9,
-
- 0x0A, 0x48, 0x58, 0xBF,
- 0x02, 0x48, 0x68, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x2A, 0x49, 0x59, 0xBF,
- 0x1A, 0x49, 0x69, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x82, 0x30, 0x57, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x83, 0x38, 0x57, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x84, 0x31, 0x5E, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x85, 0x39, 0x5E, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x87, 0x77, 0x57, 0xE9,
- 0x8B, 0x3E, 0xBF, 0xEA,
-
- 0x80, 0x30, 0x57, 0xE9,
- 0x81, 0x38, 0x57, 0xE9,
-
- 0x82, 0x31, 0x57, 0xE9,
- 0x86, 0x78, 0x57, 0xE9,
-
- 0x83, 0x39, 0x57, 0xE9,
- 0x87, 0x79, 0x57, 0xE9,
-
- 0x30, 0x1F, 0x5F, 0xE9,
- 0x8A, 0x34, 0x20, 0xE9,
-
- 0x8B, 0x3C, 0x20, 0xE9,
- 0x37, 0x50, 0x60, 0xBD,
-
- 0x57, 0x0D, 0x20, 0xE9,
- 0x35, 0x51, 0x61, 0xBD,
-
- 0x2B, 0x50, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x0E, 0x77,
-
- 0x24, 0x51, 0x20, 0xE9,
- 0x89, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x0E, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x0B, 0x46, 0xA0, 0xE8,
- 0x1B, 0x56, 0xA0, 0xE8,
-
- 0x2B, 0x66, 0xA0, 0xE8,
- 0x0C, 0x47, 0xA0, 0xE8,
-
- 0x1C, 0x57, 0xA0, 0xE8,
- 0x2C, 0x67, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x57, 0x80, 0x57, 0xCF,
-
- 0x66, 0x33, 0x66, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x67, 0x3B, 0x67, 0xCF,
-
- 0x0B, 0x48, 0xA0, 0xE8,
- 0x1B, 0x58, 0xA0, 0xE8,
-
- 0x2B, 0x68, 0xA0, 0xE8,
- 0x0C, 0x49, 0xA0, 0xE8,
-
- 0x1C, 0x59, 0xA0, 0xE8,
- 0x2C, 0x69, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x34, 0xD7, 0x34, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3C, 0xD7, 0x3C, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x34, 0x80, 0x34, 0xBD,
- 0x3C, 0x80, 0x3C, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x48, 0x80, 0x48, 0xCF,
- 0x59, 0x80, 0x59, 0xCF,
-
- 0x68, 0x33, 0x68, 0xCF,
- 0x49, 0x3B, 0x49, 0xCF,
-
- 0xA9, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x58, 0x33, 0x58, 0xCF,
- 0x69, 0x3B, 0x69, 0xCF,
-
- 0x67, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_t2gzsf[] = {
-
- 0x00, 0x8A, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x0A, 0x40, 0x50, 0xBF,
- 0x2A, 0x40, 0x60, 0xBF,
-
- 0x32, 0x41, 0x51, 0xBF,
- 0x3A, 0x41, 0x61, 0xBF,
-
- 0xC3, 0x6B,
- 0xD3, 0x6B,
- 0x00, 0x8A, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x23, 0x9F,
- 0x00, 0xE0,
- 0x51, 0x04,
-
- 0x90, 0xE2,
- 0x61, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x51, 0x41, 0xE0, 0xEC,
- 0x39, 0x67, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x63, 0xA0, 0xE8,
-
- 0x61, 0x41, 0xE0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x8A, 0x80, 0x15, 0xEA,
- 0x10, 0x04,
- 0x20, 0x04,
-
- 0x61, 0x51, 0xE0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x52, 0xBF,
- 0x0F, 0x52, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x62, 0xBF,
- 0x1E, 0x51, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x0E, 0x61, 0x60, 0xEA,
-
- 0x32, 0x40, 0x50, 0xBD,
- 0x22, 0x40, 0x60, 0xBD,
-
- 0x12, 0x41, 0x51, 0xBD,
- 0x3A, 0x41, 0x61, 0xBD,
-
- 0xBF, 0x2F, 0x0E, 0xBD,
- 0x97, 0xE2,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x35, 0x48, 0xB1, 0xE8,
- 0x3D, 0x59, 0xB1, 0xE8,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x56, 0x31, 0x56, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x66, 0x31, 0x66, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x57, 0x39, 0x57, 0xBF,
- 0x67, 0x39, 0x67, 0xBF,
-
- 0x7B, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x35, 0x00,
- 0x3D, 0x00,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0x8D, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x75, 0xF8, 0xEC,
- 0x35, 0x20,
- 0x3D, 0x20,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x53, 0x53, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x0E, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x48, 0x35, 0x48, 0xBF,
- 0x58, 0x35, 0x58, 0xBF,
-
- 0x68, 0x35, 0x68, 0xBF,
- 0x49, 0x3D, 0x49, 0xBF,
-
- 0x59, 0x3D, 0x59, 0xBF,
- 0x69, 0x3D, 0x69, 0xBF,
-
- 0x63, 0x63, 0x2D, 0xDF,
- 0x4D, 0x7D, 0xF8, 0xEC,
-
- 0x59, 0xE3,
- 0x00, 0xE0,
- 0xB8, 0x38, 0x33, 0xBF,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x18, 0x3A, 0x41, 0xE9,
-
- 0x3F, 0x53, 0xA0, 0xE8,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x63, 0xA0, 0xE8,
-
- 0x50, 0x70, 0xF8, 0xEC,
- 0x2B, 0x50, 0x3C, 0xE9,
-
- 0x1F, 0x0F, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x59, 0x78, 0xF8, 0xEC,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x56, 0x3F, 0x56, 0xDF,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x66, 0x3D, 0x66, 0xDF,
-
- 0x1D, 0x32, 0x41, 0xE9,
- 0x67, 0x3D, 0x67, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3F, 0x57, 0xDF,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x59, 0x3F, 0x59, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x69, 0x3D, 0x69, 0xDF,
-
- 0x48, 0x37, 0x48, 0xDF,
- 0x58, 0x3F, 0x58, 0xDF,
-
- 0x68, 0x3D, 0x68, 0xDF,
- 0x49, 0x37, 0x49, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x0F, 0xCF, 0x74, 0xC2,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x54, 0xB0,
- 0x02, 0x44, 0x64, 0xB0,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x38, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB2,
- 0x1A, 0x44, 0x64, 0xB2,
-
- 0x36, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x0F, 0xCF, 0x75, 0xC0,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x3D, 0xCF, 0x75, 0xC2,
- 0x37, 0xCF, 0x75, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA6, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA3, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x54, 0xB4,
- 0x1A, 0x44, 0x64, 0xB4,
-
- 0x0A, 0x45, 0x55, 0xB0,
- 0x02, 0x45, 0x65, 0xB0,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA0, 0x37, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x55, 0xB2,
- 0x1A, 0x45, 0x65, 0xB2,
-
- 0x0A, 0x45, 0x55, 0xB4,
- 0x02, 0x45, 0x65, 0xB4,
-
- 0x0F, 0xCF, 0x75, 0xC6,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA7, 0x30, 0x4F, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x31, 0x0F, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA8, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x55, 0xB6,
- 0x1A, 0x45, 0x65, 0xB6,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x2A, 0x46, 0x56, 0xBF,
- 0x1A, 0x46, 0x66, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA4, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA5, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x47, 0x57, 0xBF,
- 0x02, 0x47, 0x67, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA1, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA2, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x53, 0xBF,
- 0x1A, 0x43, 0x63, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x35, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x39, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x48, 0x58, 0xBF,
- 0x02, 0x48, 0x68, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x2A, 0x49, 0x59, 0xBF,
- 0x1A, 0x49, 0x69, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x82, 0x30, 0x57, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x83, 0x38, 0x57, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x84, 0x31, 0x5E, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x85, 0x39, 0x5E, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x87, 0x77, 0x57, 0xE9,
- 0x8B, 0x3E, 0xBF, 0xEA,
-
- 0x80, 0x30, 0x57, 0xE9,
- 0x81, 0x38, 0x57, 0xE9,
-
- 0x82, 0x31, 0x57, 0xE9,
- 0x86, 0x78, 0x57, 0xE9,
-
- 0x83, 0x39, 0x57, 0xE9,
- 0x87, 0x79, 0x57, 0xE9,
-
- 0x30, 0x1F, 0x5F, 0xE9,
- 0x8A, 0x34, 0x20, 0xE9,
-
- 0x8B, 0x3C, 0x20, 0xE9,
- 0x37, 0x50, 0x60, 0xBD,
-
- 0x57, 0x0D, 0x20, 0xE9,
- 0x35, 0x51, 0x61, 0xBD,
-
- 0x2B, 0x50, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x0E, 0x77,
-
- 0x24, 0x51, 0x20, 0xE9,
- 0x8D, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x0E, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x0B, 0x46, 0xA0, 0xE8,
- 0x1B, 0x56, 0xA0, 0xE8,
-
- 0x2B, 0x66, 0xA0, 0xE8,
- 0x0C, 0x47, 0xA0, 0xE8,
-
- 0x1C, 0x57, 0xA0, 0xE8,
- 0x2C, 0x67, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x57, 0x80, 0x57, 0xCF,
-
- 0x66, 0x33, 0x66, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x67, 0x3B, 0x67, 0xCF,
-
- 0x0B, 0x48, 0xA0, 0xE8,
- 0x1B, 0x58, 0xA0, 0xE8,
-
- 0x2B, 0x68, 0xA0, 0xE8,
- 0x0C, 0x49, 0xA0, 0xE8,
-
- 0x1C, 0x59, 0xA0, 0xE8,
- 0x2C, 0x69, 0xA0, 0xE8,
-
- 0x0B, 0x00,
- 0x1B, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x0C, 0x00,
- 0x1C, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x0B, 0x65,
- 0x1B, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x0C, 0x65,
- 0x1C, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x0B, 0x1B, 0x60, 0xEC,
- 0x34, 0xD7, 0x34, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x0C, 0x1C, 0x60, 0xEC,
-
- 0x3C, 0xD7, 0x3C, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x0B, 0x2B, 0xDE, 0xE8,
- 0x1B, 0x80, 0xDE, 0xE8,
-
- 0x34, 0x80, 0x34, 0xBD,
- 0x3C, 0x80, 0x3C, 0xBD,
-
- 0x33, 0xD7, 0x0B, 0xBD,
- 0x3B, 0xD7, 0x1B, 0xBD,
-
- 0x48, 0x80, 0x48, 0xCF,
- 0x59, 0x80, 0x59, 0xCF,
-
- 0x68, 0x33, 0x68, 0xCF,
- 0x49, 0x3B, 0x49, 0xCF,
-
- 0xAD, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x58, 0x33, 0x58, 0xCF,
- 0x69, 0x3B, 0x69, 0xCF,
-
- 0x6B, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_tgz[] = {
-
- 0x00, 0x88, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x22, 0x40, 0x48, 0xBF,
- 0x2A, 0x40, 0x50, 0xBF,
-
- 0x32, 0x41, 0x49, 0xBF,
- 0x3A, 0x41, 0x51, 0xBF,
-
- 0xC3, 0x6B,
- 0xCB, 0x6B,
- 0x00, 0x88, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x4B, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x29, 0x9F,
- 0x00, 0xE0,
- 0x49, 0x04,
-
- 0x90, 0xE2,
- 0x51, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x49, 0x41, 0xC0, 0xEC,
- 0x39, 0x57, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0x51, 0x41, 0xC0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x58, 0x80, 0x15, 0xEA,
- 0x08, 0x04,
- 0x10, 0x04,
-
- 0x51, 0x49, 0xC0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x4A, 0xBF,
- 0x27, 0x4A, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x52, 0xBF,
- 0x1E, 0x49, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x26, 0x51, 0x60, 0xEA,
-
- 0x32, 0x40, 0x48, 0xBD,
- 0x22, 0x40, 0x50, 0xBD,
-
- 0x12, 0x41, 0x49, 0xBD,
- 0x3A, 0x41, 0x51, 0xBD,
-
- 0xBF, 0x2F, 0x26, 0xBD,
- 0x00, 0xE0,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x4E, 0x31, 0x4E, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x56, 0x31, 0x56, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x4F, 0x39, 0x4F, 0xBF,
- 0x57, 0x39, 0x57, 0xBF,
-
- 0x4A, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x42, 0x73, 0xF8, 0xEC,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0xA5, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x4B, 0x4B, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x26, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x53, 0x53, 0x2D, 0xDF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xB8, 0x38, 0x33, 0xBF,
- 0x00, 0xE0,
- 0x59, 0xE3,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x3F, 0x4B, 0xA0, 0xE8,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x53, 0xA0, 0xE8,
-
- 0x48, 0x70, 0xF8, 0xEC,
- 0x2B, 0x48, 0x3C, 0xE9,
-
- 0x1F, 0x27, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x18, 0x3A, 0x41, 0xE9,
- 0x1D, 0x32, 0x41, 0xE9,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x56, 0x3D, 0x56, 0xDF,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x4E, 0x3F, 0x4E, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x4F, 0x3F, 0x4F, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3D, 0x57, 0xDF,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x34, 0x80, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x4C, 0xB0,
- 0x02, 0x44, 0x54, 0xB0,
-
- 0x2A, 0x44, 0x4C, 0xB2,
- 0x1A, 0x44, 0x54, 0xB2,
-
- 0x1D, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x3D, 0xCF, 0x74, 0xC2,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x2A, 0x44, 0x4C, 0xB4,
- 0x1A, 0x44, 0x54, 0xB4,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x38, 0x3D, 0x20, 0xE9,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x2A, 0x46, 0x4E, 0xBF,
- 0x1A, 0x46, 0x56, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x0A, 0x47, 0x4F, 0xBF,
- 0x02, 0x47, 0x57, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x4B, 0xBF,
- 0x1A, 0x43, 0x53, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x37, 0x48, 0x50, 0xBD,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8B, 0x3E, 0x20, 0xE9,
-
- 0x82, 0x30, 0x57, 0xE9,
- 0x87, 0x77, 0x57, 0xE9,
-
- 0x83, 0x38, 0x57, 0xE9,
- 0x35, 0x49, 0x51, 0xBD,
-
- 0x84, 0x31, 0x5E, 0xE9,
- 0x30, 0x1F, 0x5F, 0xE9,
-
- 0x85, 0x39, 0x5E, 0xE9,
- 0x57, 0x25, 0x20, 0xE9,
-
- 0x2B, 0x48, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x26, 0x77,
-
- 0x24, 0x49, 0x20, 0xE9,
- 0xAF, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x26, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x1C, 0x46, 0xA0, 0xE8,
- 0x23, 0x4E, 0xA0, 0xE8,
-
- 0x2B, 0x56, 0xA0, 0xE8,
- 0x1D, 0x47, 0xA0, 0xE8,
-
- 0x24, 0x4F, 0xA0, 0xE8,
- 0x2C, 0x57, 0xA0, 0xE8,
-
- 0x1C, 0x00,
- 0x23, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x1D, 0x00,
- 0x24, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x1C, 0x65,
- 0x23, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x1D, 0x65,
- 0x24, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x1C, 0x23, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x1D, 0x24, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x1C, 0x2B, 0xDE, 0xE8,
- 0x23, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x1C, 0xBD,
- 0x3B, 0xD7, 0x23, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x4F, 0x80, 0x4F, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0xD6, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x4E, 0x33, 0x4E, 0xCF,
- 0x57, 0x3B, 0x57, 0xCF,
-
- 0x9D, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_tgza[] = {
-
- 0x00, 0x88, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x22, 0x40, 0x48, 0xBF,
- 0x2A, 0x40, 0x50, 0xBF,
-
- 0x32, 0x41, 0x49, 0xBF,
- 0x3A, 0x41, 0x51, 0xBF,
-
- 0xC3, 0x6B,
- 0xCB, 0x6B,
- 0x00, 0x88, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x4B, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x29, 0x9F,
- 0x00, 0xE0,
- 0x49, 0x04,
-
- 0x90, 0xE2,
- 0x51, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x49, 0x41, 0xC0, 0xEC,
- 0x39, 0x57, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0x51, 0x41, 0xC0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x5C, 0x80, 0x15, 0xEA,
- 0x08, 0x04,
- 0x10, 0x04,
-
- 0x51, 0x49, 0xC0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x4A, 0xBF,
- 0x27, 0x4A, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x52, 0xBF,
- 0x1E, 0x49, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x26, 0x51, 0x60, 0xEA,
-
- 0x32, 0x40, 0x48, 0xBD,
- 0x22, 0x40, 0x50, 0xBD,
-
- 0x12, 0x41, 0x49, 0xBD,
- 0x3A, 0x41, 0x51, 0xBD,
-
- 0xBF, 0x2F, 0x26, 0xBD,
- 0x00, 0xE0,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x4E, 0x31, 0x4E, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x56, 0x31, 0x56, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x4F, 0x39, 0x4F, 0xBF,
- 0x57, 0x39, 0x57, 0xBF,
-
- 0x4E, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x42, 0x73, 0xF8, 0xEC,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0xA5, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x4B, 0x4B, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x26, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x53, 0x53, 0x2D, 0xDF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xB8, 0x38, 0x33, 0xBF,
- 0x00, 0xE0,
- 0x59, 0xE3,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x3F, 0x4B, 0xA0, 0xE8,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x53, 0xA0, 0xE8,
-
- 0x48, 0x70, 0xF8, 0xEC,
- 0x2B, 0x48, 0x3C, 0xE9,
-
- 0x1F, 0x27, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x18, 0x3A, 0x41, 0xE9,
- 0x1D, 0x32, 0x41, 0xE9,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x56, 0x3D, 0x56, 0xDF,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x4E, 0x3F, 0x4E, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x4F, 0x3F, 0x4F, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3D, 0x57, 0xDF,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x34, 0x80, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x27, 0xCF, 0x74, 0xC6,
- 0x3D, 0xCF, 0x74, 0xC2,
-
- 0x0A, 0x44, 0x4C, 0xB0,
- 0x02, 0x44, 0x54, 0xB0,
-
- 0x2A, 0x44, 0x4C, 0xB2,
- 0x1A, 0x44, 0x54, 0xB2,
-
- 0x20, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9C, 0x27, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x4C, 0xB4,
- 0x02, 0x44, 0x54, 0xB4,
-
- 0x2A, 0x44, 0x4C, 0xB6,
- 0x1A, 0x44, 0x54, 0xB6,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x38, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x20,
- 0x02, 0x20,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x0A, 0x47, 0x4F, 0xBF,
- 0x02, 0x47, 0x57, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x46, 0x4E, 0xBF,
- 0x1A, 0x46, 0x56, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x36, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x37, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x4B, 0xBF,
- 0x1A, 0x43, 0x53, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x9D, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x9E, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x37, 0x48, 0x50, 0xBD,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8B, 0x3E, 0x20, 0xE9,
-
- 0x82, 0x30, 0x57, 0xE9,
- 0x87, 0x77, 0x57, 0xE9,
-
- 0x83, 0x38, 0x57, 0xE9,
- 0x35, 0x49, 0x51, 0xBD,
-
- 0x84, 0x31, 0x5E, 0xE9,
- 0x30, 0x1F, 0x5F, 0xE9,
-
- 0x85, 0x39, 0x5E, 0xE9,
- 0x57, 0x25, 0x20, 0xE9,
-
- 0x2B, 0x48, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x26, 0x77,
-
- 0x24, 0x49, 0x20, 0xE9,
- 0xAB, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x26, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x1C, 0x46, 0xA0, 0xE8,
- 0x23, 0x4E, 0xA0, 0xE8,
-
- 0x2B, 0x56, 0xA0, 0xE8,
- 0x1D, 0x47, 0xA0, 0xE8,
-
- 0x24, 0x4F, 0xA0, 0xE8,
- 0x2C, 0x57, 0xA0, 0xE8,
-
- 0x1C, 0x00,
- 0x23, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x1D, 0x00,
- 0x24, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x1C, 0x65,
- 0x23, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x1D, 0x65,
- 0x24, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x1C, 0x23, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x1D, 0x24, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x1C, 0x2B, 0xDE, 0xE8,
- 0x23, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x1C, 0xBD,
- 0x3B, 0xD7, 0x23, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x4F, 0x80, 0x4F, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0xD3, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x4E, 0x33, 0x4E, 0xCF,
- 0x57, 0x3B, 0x57, 0xCF,
-
- 0x99, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_tgzaf[] = {
-
- 0x00, 0x88, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x22, 0x40, 0x48, 0xBF,
- 0x2A, 0x40, 0x50, 0xBF,
-
- 0x32, 0x41, 0x49, 0xBF,
- 0x3A, 0x41, 0x51, 0xBF,
-
- 0xC3, 0x6B,
- 0xCB, 0x6B,
- 0x00, 0x88, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x4B, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x29, 0x9F,
- 0x00, 0xE0,
- 0x49, 0x04,
-
- 0x90, 0xE2,
- 0x51, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x49, 0x41, 0xC0, 0xEC,
- 0x39, 0x57, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0x51, 0x41, 0xC0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x61, 0x80, 0x15, 0xEA,
- 0x08, 0x04,
- 0x10, 0x04,
-
- 0x51, 0x49, 0xC0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x4A, 0xBF,
- 0x27, 0x4A, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x52, 0xBF,
- 0x1E, 0x49, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x26, 0x51, 0x60, 0xEA,
-
- 0x32, 0x40, 0x48, 0xBD,
- 0x22, 0x40, 0x50, 0xBD,
-
- 0x12, 0x41, 0x49, 0xBD,
- 0x3A, 0x41, 0x51, 0xBD,
-
- 0xBF, 0x2F, 0x26, 0xBD,
- 0x00, 0xE0,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x4E, 0x31, 0x4E, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x56, 0x31, 0x56, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x4F, 0x39, 0x4F, 0xBF,
- 0x57, 0x39, 0x57, 0xBF,
-
- 0x53, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x42, 0x73, 0xF8, 0xEC,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0xA5, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x4B, 0x4B, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x26, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x53, 0x53, 0x2D, 0xDF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xB8, 0x38, 0x33, 0xBF,
- 0x00, 0xE0,
- 0x59, 0xE3,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x3F, 0x4B, 0xA0, 0xE8,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x53, 0xA0, 0xE8,
-
- 0x48, 0x70, 0xF8, 0xEC,
- 0x2B, 0x48, 0x3C, 0xE9,
-
- 0x1F, 0x27, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x18, 0x3A, 0x41, 0xE9,
- 0x1D, 0x32, 0x41, 0xE9,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x56, 0x3D, 0x56, 0xDF,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x4E, 0x3F, 0x4E, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x4F, 0x3F, 0x4F, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3D, 0x57, 0xDF,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x4C, 0xB0,
- 0x02, 0x44, 0x54, 0xB0,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB2,
- 0x1A, 0x44, 0x54, 0xB2,
-
- 0x26, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x3D, 0xCF, 0x74, 0xC2,
- 0x27, 0xCF, 0x74, 0xC6,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9C, 0x27, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x4C, 0xB4,
- 0x02, 0x44, 0x54, 0xB4,
-
- 0x2A, 0x44, 0x4C, 0xB6,
- 0x1A, 0x44, 0x54, 0xB6,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x38, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x20,
- 0x02, 0x20,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x3D, 0xCF, 0x75, 0xC6,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x0A, 0x45, 0x4D, 0xB6,
- 0x02, 0x45, 0x55, 0xB6,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x3D, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x2A, 0x46, 0x4E, 0xBF,
- 0x1A, 0x46, 0x56, 0xBF,
-
- 0x0A, 0x47, 0x4F, 0xBF,
- 0x02, 0x47, 0x57, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x38, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9D, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x9E, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x4B, 0xBF,
- 0x1A, 0x43, 0x53, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x35, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x39, 0x38, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x37, 0x48, 0x50, 0xBD,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8B, 0x3E, 0x20, 0xE9,
-
- 0x82, 0x30, 0x57, 0xE9,
- 0x87, 0x77, 0x57, 0xE9,
-
- 0x83, 0x38, 0x57, 0xE9,
- 0x35, 0x49, 0x51, 0xBD,
-
- 0x84, 0x31, 0x5E, 0xE9,
- 0x30, 0x1F, 0x5F, 0xE9,
-
- 0x85, 0x39, 0x5E, 0xE9,
- 0x57, 0x25, 0x20, 0xE9,
-
- 0x2B, 0x48, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x26, 0x77,
-
- 0x24, 0x49, 0x20, 0xE9,
- 0xA6, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x26, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x1C, 0x46, 0xA0, 0xE8,
- 0x23, 0x4E, 0xA0, 0xE8,
-
- 0x2B, 0x56, 0xA0, 0xE8,
- 0x1D, 0x47, 0xA0, 0xE8,
-
- 0x24, 0x4F, 0xA0, 0xE8,
- 0x2C, 0x57, 0xA0, 0xE8,
-
- 0x1C, 0x00,
- 0x23, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x1D, 0x00,
- 0x24, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x1C, 0x65,
- 0x23, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x1D, 0x65,
- 0x24, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x1C, 0x23, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x1D, 0x24, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x1C, 0x2B, 0xDE, 0xE8,
- 0x23, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x1C, 0xBD,
- 0x3B, 0xD7, 0x23, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x4F, 0x80, 0x4F, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0xCD, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x4E, 0x33, 0x4E, 0xCF,
- 0x57, 0x3B, 0x57, 0xCF,
-
- 0x94, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_tgzf[] = {
-
- 0x00, 0x88, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x22, 0x40, 0x48, 0xBF,
- 0x2A, 0x40, 0x50, 0xBF,
-
- 0x32, 0x41, 0x49, 0xBF,
- 0x3A, 0x41, 0x51, 0xBF,
-
- 0xC3, 0x6B,
- 0xCB, 0x6B,
- 0x00, 0x88, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x4B, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x29, 0x9F,
- 0x00, 0xE0,
- 0x49, 0x04,
-
- 0x90, 0xE2,
- 0x51, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x49, 0x41, 0xC0, 0xEC,
- 0x39, 0x57, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0x51, 0x41, 0xC0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x5D, 0x80, 0x15, 0xEA,
- 0x08, 0x04,
- 0x10, 0x04,
-
- 0x51, 0x49, 0xC0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x4A, 0xBF,
- 0x27, 0x4A, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x52, 0xBF,
- 0x1E, 0x49, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x26, 0x51, 0x60, 0xEA,
-
- 0x32, 0x40, 0x48, 0xBD,
- 0x22, 0x40, 0x50, 0xBD,
-
- 0x12, 0x41, 0x49, 0xBD,
- 0x3A, 0x41, 0x51, 0xBD,
-
- 0xBF, 0x2F, 0x26, 0xBD,
- 0x00, 0xE0,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x4E, 0x31, 0x4E, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x56, 0x31, 0x56, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x4F, 0x39, 0x4F, 0xBF,
- 0x57, 0x39, 0x57, 0xBF,
-
- 0x4F, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x42, 0x73, 0xF8, 0xEC,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0xA5, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x4B, 0x4B, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x26, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x53, 0x53, 0x2D, 0xDF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xB8, 0x38, 0x33, 0xBF,
- 0x00, 0xE0,
- 0x59, 0xE3,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x3F, 0x4B, 0xA0, 0xE8,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x53, 0xA0, 0xE8,
-
- 0x48, 0x70, 0xF8, 0xEC,
- 0x2B, 0x48, 0x3C, 0xE9,
-
- 0x1F, 0x27, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x18, 0x3A, 0x41, 0xE9,
- 0x1D, 0x32, 0x41, 0xE9,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x56, 0x3D, 0x56, 0xDF,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x4E, 0x3F, 0x4E, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x4F, 0x3F, 0x4F, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3D, 0x57, 0xDF,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x34, 0x80, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x27, 0xCF, 0x75, 0xC6,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x4C, 0xB0,
- 0x02, 0x44, 0x54, 0xB0,
-
- 0x2A, 0x44, 0x4C, 0xB2,
- 0x1A, 0x44, 0x54, 0xB2,
-
- 0x20, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x3D, 0xCF, 0x74, 0xC2,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x31, 0x27, 0x20, 0xE9,
-
- 0x0A, 0x44, 0x4C, 0xB4,
- 0x02, 0x44, 0x54, 0xB4,
-
- 0x2A, 0x45, 0x4D, 0xB6,
- 0x1A, 0x45, 0x55, 0xB6,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x38, 0x3D, 0x20, 0xE9,
-
- 0x0A, 0x20,
- 0x02, 0x20,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x0A, 0x47, 0x4F, 0xBF,
- 0x02, 0x47, 0x57, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x46, 0x4E, 0xBF,
- 0x1A, 0x46, 0x56, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x36, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x37, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x4B, 0xBF,
- 0x1A, 0x43, 0x53, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x35, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x39, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x37, 0x48, 0x50, 0xBD,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8B, 0x3E, 0x20, 0xE9,
-
- 0x82, 0x30, 0x57, 0xE9,
- 0x87, 0x77, 0x57, 0xE9,
-
- 0x83, 0x38, 0x57, 0xE9,
- 0x35, 0x49, 0x51, 0xBD,
-
- 0x84, 0x31, 0x5E, 0xE9,
- 0x30, 0x1F, 0x5F, 0xE9,
-
- 0x85, 0x39, 0x5E, 0xE9,
- 0x57, 0x25, 0x20, 0xE9,
-
- 0x2B, 0x48, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x26, 0x77,
-
- 0x24, 0x49, 0x20, 0xE9,
- 0xAA, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x26, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x1C, 0x46, 0xA0, 0xE8,
- 0x23, 0x4E, 0xA0, 0xE8,
-
- 0x2B, 0x56, 0xA0, 0xE8,
- 0x1D, 0x47, 0xA0, 0xE8,
-
- 0x24, 0x4F, 0xA0, 0xE8,
- 0x2C, 0x57, 0xA0, 0xE8,
-
- 0x1C, 0x00,
- 0x23, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x1D, 0x00,
- 0x24, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x1C, 0x65,
- 0x23, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x1D, 0x65,
- 0x24, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x1C, 0x23, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x1D, 0x24, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x1C, 0x2B, 0xDE, 0xE8,
- 0x23, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x1C, 0xBD,
- 0x3B, 0xD7, 0x23, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x4F, 0x80, 0x4F, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0xD3, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x4E, 0x33, 0x4E, 0xCF,
- 0x57, 0x3B, 0x57, 0xCF,
-
- 0x98, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_tgzs[] = {
-
- 0x00, 0x88, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x22, 0x40, 0x48, 0xBF,
- 0x2A, 0x40, 0x50, 0xBF,
-
- 0x32, 0x41, 0x49, 0xBF,
- 0x3A, 0x41, 0x51, 0xBF,
-
- 0xC3, 0x6B,
- 0xCB, 0x6B,
- 0x00, 0x88, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x4B, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x29, 0x9F,
- 0x00, 0xE0,
- 0x49, 0x04,
-
- 0x90, 0xE2,
- 0x51, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x49, 0x41, 0xC0, 0xEC,
- 0x39, 0x57, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0x51, 0x41, 0xC0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x65, 0x80, 0x15, 0xEA,
- 0x08, 0x04,
- 0x10, 0x04,
-
- 0x51, 0x49, 0xC0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x4A, 0xBF,
- 0x27, 0x4A, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x52, 0xBF,
- 0x1E, 0x49, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x26, 0x51, 0x60, 0xEA,
-
- 0x32, 0x40, 0x48, 0xBD,
- 0x22, 0x40, 0x50, 0xBD,
-
- 0x12, 0x41, 0x49, 0xBD,
- 0x3A, 0x41, 0x51, 0xBD,
-
- 0xBF, 0x2F, 0x26, 0xBD,
- 0x00, 0xE0,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x4E, 0x31, 0x4E, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x56, 0x31, 0x56, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x4F, 0x39, 0x4F, 0xBF,
- 0x57, 0x39, 0x57, 0xBF,
-
- 0x57, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x42, 0x73, 0xF8, 0xEC,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0xA5, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x4B, 0x4B, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x26, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x53, 0x53, 0x2D, 0xDF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xB8, 0x38, 0x33, 0xBF,
- 0x00, 0xE0,
- 0x59, 0xE3,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x3F, 0x4B, 0xA0, 0xE8,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x53, 0xA0, 0xE8,
-
- 0x48, 0x70, 0xF8, 0xEC,
- 0x2B, 0x48, 0x3C, 0xE9,
-
- 0x1F, 0x27, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x18, 0x3A, 0x41, 0xE9,
- 0x1D, 0x32, 0x41, 0xE9,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x56, 0x3D, 0x56, 0xDF,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x4E, 0x3F, 0x4E, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x4F, 0x3F, 0x4F, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3D, 0x57, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x27, 0xCF, 0x74, 0xC2,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x4C, 0xB0,
- 0x02, 0x44, 0x54, 0xB0,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x38, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB2,
- 0x1A, 0x44, 0x54, 0xB2,
-
- 0x29, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x27, 0xCF, 0x75, 0xC0,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x3D, 0xCF, 0x75, 0xC2,
- 0x37, 0xCF, 0x75, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA6, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA3, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB4,
- 0x1A, 0x44, 0x54, 0xB4,
-
- 0x0A, 0x45, 0x4D, 0xB0,
- 0x02, 0x45, 0x55, 0xB0,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA0, 0x37, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x4D, 0xB2,
- 0x1A, 0x45, 0x55, 0xB2,
-
- 0x0A, 0x45, 0x4D, 0xB4,
- 0x02, 0x45, 0x55, 0xB4,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x20,
- 0x02, 0x20,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x2A, 0x46, 0x4E, 0xBF,
- 0x1A, 0x46, 0x56, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0xA7, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0xA8, 0x38, 0x4F, 0xE9,
-
- 0x0A, 0x47, 0x4F, 0xBF,
- 0x02, 0x47, 0x57, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA4, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA5, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x4B, 0xBF,
- 0x1A, 0x43, 0x53, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0xA1, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0xA2, 0x38, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x37, 0x48, 0x50, 0xBD,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8B, 0x3E, 0x20, 0xE9,
-
- 0x82, 0x30, 0x57, 0xE9,
- 0x87, 0x77, 0x57, 0xE9,
-
- 0x83, 0x38, 0x57, 0xE9,
- 0x35, 0x49, 0x51, 0xBD,
-
- 0x84, 0x31, 0x5E, 0xE9,
- 0x30, 0x1F, 0x5F, 0xE9,
-
- 0x85, 0x39, 0x5E, 0xE9,
- 0x57, 0x25, 0x20, 0xE9,
-
- 0x2B, 0x48, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x26, 0x77,
-
- 0x24, 0x49, 0x20, 0xE9,
- 0xA2, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x26, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x1C, 0x46, 0xA0, 0xE8,
- 0x23, 0x4E, 0xA0, 0xE8,
-
- 0x2B, 0x56, 0xA0, 0xE8,
- 0x1D, 0x47, 0xA0, 0xE8,
-
- 0x24, 0x4F, 0xA0, 0xE8,
- 0x2C, 0x57, 0xA0, 0xE8,
-
- 0x1C, 0x00,
- 0x23, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x1D, 0x00,
- 0x24, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x1C, 0x65,
- 0x23, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x1D, 0x65,
- 0x24, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x1C, 0x23, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x1D, 0x24, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x1C, 0x2B, 0xDE, 0xE8,
- 0x23, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x1C, 0xBD,
- 0x3B, 0xD7, 0x23, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x4F, 0x80, 0x4F, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0xCA, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x4E, 0x33, 0x4E, 0xCF,
- 0x57, 0x3B, 0x57, 0xCF,
-
- 0x90, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_tgzsa[] = {
-
- 0x00, 0x88, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x22, 0x40, 0x48, 0xBF,
- 0x2A, 0x40, 0x50, 0xBF,
-
- 0x32, 0x41, 0x49, 0xBF,
- 0x3A, 0x41, 0x51, 0xBF,
-
- 0xC3, 0x6B,
- 0xCB, 0x6B,
- 0x00, 0x88, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x4B, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x29, 0x9F,
- 0x00, 0xE0,
- 0x49, 0x04,
-
- 0x90, 0xE2,
- 0x51, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x49, 0x41, 0xC0, 0xEC,
- 0x39, 0x57, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0x51, 0x41, 0xC0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x6A, 0x80, 0x15, 0xEA,
- 0x08, 0x04,
- 0x10, 0x04,
-
- 0x51, 0x49, 0xC0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x4A, 0xBF,
- 0x27, 0x4A, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x52, 0xBF,
- 0x1E, 0x49, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x26, 0x51, 0x60, 0xEA,
-
- 0x32, 0x40, 0x48, 0xBD,
- 0x22, 0x40, 0x50, 0xBD,
-
- 0x12, 0x41, 0x49, 0xBD,
- 0x3A, 0x41, 0x51, 0xBD,
-
- 0xBF, 0x2F, 0x26, 0xBD,
- 0x00, 0xE0,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x4E, 0x31, 0x4E, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x56, 0x31, 0x56, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x4F, 0x39, 0x4F, 0xBF,
- 0x57, 0x39, 0x57, 0xBF,
-
- 0x5C, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x42, 0x73, 0xF8, 0xEC,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0xA5, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x4B, 0x4B, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x26, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x53, 0x53, 0x2D, 0xDF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xB8, 0x38, 0x33, 0xBF,
- 0x00, 0xE0,
- 0x59, 0xE3,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x3F, 0x4B, 0xA0, 0xE8,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x53, 0xA0, 0xE8,
-
- 0x48, 0x70, 0xF8, 0xEC,
- 0x2B, 0x48, 0x3C, 0xE9,
-
- 0x1F, 0x27, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x18, 0x3A, 0x41, 0xE9,
- 0x1D, 0x32, 0x41, 0xE9,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x56, 0x3D, 0x56, 0xDF,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x4E, 0x3F, 0x4E, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x4F, 0x3F, 0x4F, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3D, 0x57, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x27, 0xCF, 0x74, 0xC2,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x4C, 0xB0,
- 0x02, 0x44, 0x54, 0xB0,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x38, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB2,
- 0x1A, 0x44, 0x54, 0xB2,
-
- 0x2E, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x27, 0xCF, 0x75, 0xC0,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x3D, 0xCF, 0x75, 0xC2,
- 0x37, 0xCF, 0x75, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA6, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA3, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB4,
- 0x1A, 0x44, 0x54, 0xB4,
-
- 0x0A, 0x45, 0x4D, 0xB0,
- 0x02, 0x45, 0x55, 0xB0,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA0, 0x37, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x4D, 0xB2,
- 0x1A, 0x45, 0x55, 0xB2,
-
- 0x0A, 0x45, 0x4D, 0xB4,
- 0x02, 0x45, 0x55, 0xB4,
-
- 0x27, 0xCF, 0x74, 0xC6,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA7, 0x30, 0x4F, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9C, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA8, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB6,
- 0x1A, 0x44, 0x54, 0xB6,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x2A, 0x46, 0x4E, 0xBF,
- 0x1A, 0x46, 0x56, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA4, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA5, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x47, 0x4F, 0xBF,
- 0x02, 0x47, 0x57, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA1, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA2, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x4B, 0xBF,
- 0x1A, 0x43, 0x53, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x9D, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x9E, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x37, 0x48, 0x50, 0xBD,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8B, 0x3E, 0x20, 0xE9,
-
- 0x82, 0x30, 0x57, 0xE9,
- 0x87, 0x77, 0x57, 0xE9,
-
- 0x83, 0x38, 0x57, 0xE9,
- 0x35, 0x49, 0x51, 0xBD,
-
- 0x84, 0x31, 0x5E, 0xE9,
- 0x30, 0x1F, 0x5F, 0xE9,
-
- 0x85, 0x39, 0x5E, 0xE9,
- 0x57, 0x25, 0x20, 0xE9,
-
- 0x2B, 0x48, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x26, 0x77,
-
- 0x24, 0x49, 0x20, 0xE9,
- 0x9D, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x26, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x1C, 0x46, 0xA0, 0xE8,
- 0x23, 0x4E, 0xA0, 0xE8,
-
- 0x2B, 0x56, 0xA0, 0xE8,
- 0x1D, 0x47, 0xA0, 0xE8,
-
- 0x24, 0x4F, 0xA0, 0xE8,
- 0x2C, 0x57, 0xA0, 0xE8,
-
- 0x1C, 0x00,
- 0x23, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x1D, 0x00,
- 0x24, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x1C, 0x65,
- 0x23, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x1D, 0x65,
- 0x24, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x1C, 0x23, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x1D, 0x24, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x1C, 0x2B, 0xDE, 0xE8,
- 0x23, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x1C, 0xBD,
- 0x3B, 0xD7, 0x23, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x4F, 0x80, 0x4F, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0xC5, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x4E, 0x33, 0x4E, 0xCF,
- 0x57, 0x3B, 0x57, 0xCF,
-
- 0x8B, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_tgzsaf[] = {
-
- 0x00, 0x88, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x22, 0x40, 0x48, 0xBF,
- 0x2A, 0x40, 0x50, 0xBF,
-
- 0x32, 0x41, 0x49, 0xBF,
- 0x3A, 0x41, 0x51, 0xBF,
-
- 0xC3, 0x6B,
- 0xCB, 0x6B,
- 0x00, 0x88, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x4B, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x29, 0x9F,
- 0x00, 0xE0,
- 0x49, 0x04,
-
- 0x90, 0xE2,
- 0x51, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x49, 0x41, 0xC0, 0xEC,
- 0x39, 0x57, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0x51, 0x41, 0xC0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x6E, 0x80, 0x15, 0xEA,
- 0x08, 0x04,
- 0x10, 0x04,
-
- 0x51, 0x49, 0xC0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x4A, 0xBF,
- 0x27, 0x4A, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x52, 0xBF,
- 0x1E, 0x49, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x26, 0x51, 0x60, 0xEA,
-
- 0x32, 0x40, 0x48, 0xBD,
- 0x22, 0x40, 0x50, 0xBD,
-
- 0x12, 0x41, 0x49, 0xBD,
- 0x3A, 0x41, 0x51, 0xBD,
-
- 0xBF, 0x2F, 0x26, 0xBD,
- 0x00, 0xE0,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x4E, 0x31, 0x4E, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x56, 0x31, 0x56, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x4F, 0x39, 0x4F, 0xBF,
- 0x57, 0x39, 0x57, 0xBF,
-
- 0x60, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x42, 0x73, 0xF8, 0xEC,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0xA5, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x4B, 0x4B, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x26, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x53, 0x53, 0x2D, 0xDF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xB8, 0x38, 0x33, 0xBF,
- 0x00, 0xE0,
- 0x59, 0xE3,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x3F, 0x4B, 0xA0, 0xE8,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x53, 0xA0, 0xE8,
-
- 0x48, 0x70, 0xF8, 0xEC,
- 0x2B, 0x48, 0x3C, 0xE9,
-
- 0x1F, 0x27, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x18, 0x3A, 0x41, 0xE9,
- 0x1D, 0x32, 0x41, 0xE9,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x56, 0x3D, 0x56, 0xDF,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x4E, 0x3F, 0x4E, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x4F, 0x3F, 0x4F, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3D, 0x57, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x27, 0xCF, 0x74, 0xC2,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x4C, 0xB0,
- 0x02, 0x44, 0x54, 0xB0,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x38, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB2,
- 0x1A, 0x44, 0x54, 0xB2,
-
- 0x32, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x27, 0xCF, 0x75, 0xC0,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x3D, 0xCF, 0x75, 0xC2,
- 0x37, 0xCF, 0x75, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA6, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA3, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB4,
- 0x1A, 0x44, 0x54, 0xB4,
-
- 0x0A, 0x45, 0x4D, 0xB0,
- 0x02, 0x45, 0x55, 0xB0,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA0, 0x37, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x4D, 0xB2,
- 0x1A, 0x45, 0x55, 0xB2,
-
- 0x0A, 0x45, 0x4D, 0xB4,
- 0x02, 0x45, 0x55, 0xB4,
-
- 0x27, 0xCF, 0x74, 0xC6,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA7, 0x30, 0x4F, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9C, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA8, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB6,
- 0x1A, 0x44, 0x54, 0xB6,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x45, 0x4D, 0xB6,
- 0x02, 0x45, 0x55, 0xB6,
-
- 0x3D, 0xCF, 0x75, 0xC6,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x2A, 0x46, 0x4E, 0xBF,
- 0x1A, 0x46, 0x56, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA4, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA5, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x3D, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x0A, 0x47, 0x4F, 0xBF,
- 0x02, 0x47, 0x57, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0xA1, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0xA2, 0x38, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x9D, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x9E, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x4B, 0xBF,
- 0x1A, 0x43, 0x53, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x35, 0x30, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x39, 0x38, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x37, 0x48, 0x50, 0xBD,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8B, 0x3E, 0x20, 0xE9,
-
- 0x82, 0x30, 0x57, 0xE9,
- 0x87, 0x77, 0x57, 0xE9,
-
- 0x83, 0x38, 0x57, 0xE9,
- 0x35, 0x49, 0x51, 0xBD,
-
- 0x84, 0x31, 0x5E, 0xE9,
- 0x30, 0x1F, 0x5F, 0xE9,
-
- 0x85, 0x39, 0x5E, 0xE9,
- 0x57, 0x25, 0x20, 0xE9,
-
- 0x2B, 0x48, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x26, 0x77,
-
- 0x24, 0x49, 0x20, 0xE9,
- 0x99, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x26, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x1C, 0x46, 0xA0, 0xE8,
- 0x23, 0x4E, 0xA0, 0xE8,
-
- 0x2B, 0x56, 0xA0, 0xE8,
- 0x1D, 0x47, 0xA0, 0xE8,
-
- 0x24, 0x4F, 0xA0, 0xE8,
- 0x2C, 0x57, 0xA0, 0xE8,
-
- 0x1C, 0x00,
- 0x23, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x1D, 0x00,
- 0x24, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x1C, 0x65,
- 0x23, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x1D, 0x65,
- 0x24, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x1C, 0x23, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x1D, 0x24, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x1C, 0x2B, 0xDE, 0xE8,
- 0x23, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x1C, 0xBD,
- 0x3B, 0xD7, 0x23, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x4F, 0x80, 0x4F, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0xC1, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x4E, 0x33, 0x4E, 0xCF,
- 0x57, 0x3B, 0x57, 0xCF,
-
- 0x87, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
-
-static unsigned char warp_g400_tgzsf[] = {
-
- 0x00, 0x88, 0x98, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
- 0xFF, 0x80, 0xC0, 0xE9,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x22, 0x40, 0x48, 0xBF,
- 0x2A, 0x40, 0x50, 0xBF,
-
- 0x32, 0x41, 0x49, 0xBF,
- 0x3A, 0x41, 0x51, 0xBF,
-
- 0xC3, 0x6B,
- 0xCB, 0x6B,
- 0x00, 0x88, 0x98, 0xE9,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x96, 0xE2,
- 0x41, 0x04,
-
- 0x7B, 0x43, 0xA0, 0xE8,
- 0x73, 0x4B, 0xA0, 0xE8,
-
- 0xAD, 0xEE, 0x29, 0x9F,
- 0x00, 0xE0,
- 0x49, 0x04,
-
- 0x90, 0xE2,
- 0x51, 0x04,
- 0x31, 0x46, 0xB1, 0xE8,
-
- 0x49, 0x41, 0xC0, 0xEC,
- 0x39, 0x57, 0xB1, 0xE8,
-
- 0x00, 0x04,
- 0x46, 0xE2,
- 0x73, 0x53, 0xA0, 0xE8,
-
- 0x51, 0x41, 0xC0, 0xEC,
- 0x31, 0x00,
- 0x39, 0x00,
-
- 0x6A, 0x80, 0x15, 0xEA,
- 0x08, 0x04,
- 0x10, 0x04,
-
- 0x51, 0x49, 0xC0, 0xEC,
- 0x2F, 0x41, 0x60, 0xEA,
-
- 0x31, 0x20,
- 0x39, 0x20,
- 0x1F, 0x42, 0xA0, 0xE8,
-
- 0x2A, 0x42, 0x4A, 0xBF,
- 0x27, 0x4A, 0xA0, 0xE8,
-
- 0x1A, 0x42, 0x52, 0xBF,
- 0x1E, 0x49, 0x60, 0xEA,
-
- 0x73, 0x7B, 0xC8, 0xEC,
- 0x26, 0x51, 0x60, 0xEA,
-
- 0x32, 0x40, 0x48, 0xBD,
- 0x22, 0x40, 0x50, 0xBD,
-
- 0x12, 0x41, 0x49, 0xBD,
- 0x3A, 0x41, 0x51, 0xBD,
-
- 0xBF, 0x2F, 0x26, 0xBD,
- 0x00, 0xE0,
- 0x7B, 0x72,
-
- 0x32, 0x20,
- 0x22, 0x20,
- 0x12, 0x20,
- 0x3A, 0x20,
-
- 0x46, 0x31, 0x46, 0xBF,
- 0x4E, 0x31, 0x4E, 0xBF,
-
- 0xB3, 0xE2, 0x2D, 0x9F,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x56, 0x31, 0x56, 0xBF,
- 0x47, 0x39, 0x47, 0xBF,
-
- 0x4F, 0x39, 0x4F, 0xBF,
- 0x57, 0x39, 0x57, 0xBF,
-
- 0x5C, 0x80, 0x07, 0xEA,
- 0x24, 0x41, 0x20, 0xE9,
-
- 0x42, 0x73, 0xF8, 0xEC,
- 0x00, 0xE0,
- 0x2D, 0x73,
-
- 0x33, 0x72,
- 0x0C, 0xE3,
- 0xA5, 0x2F, 0x1E, 0xBD,
-
- 0x43, 0x43, 0x2D, 0xDF,
- 0x4B, 0x4B, 0x2D, 0xDF,
-
- 0xAE, 0x1E, 0x26, 0xBD,
- 0x58, 0xE3,
- 0x33, 0x66,
-
- 0x53, 0x53, 0x2D, 0xDF,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0xB8, 0x38, 0x33, 0xBF,
- 0x00, 0xE0,
- 0x59, 0xE3,
-
- 0x1E, 0x12, 0x41, 0xE9,
- 0x1A, 0x22, 0x41, 0xE9,
-
- 0x2B, 0x40, 0x3D, 0xE9,
- 0x3F, 0x4B, 0xA0, 0xE8,
-
- 0x2D, 0x73,
- 0x30, 0x76,
- 0x05, 0x80, 0x3D, 0xEA,
-
- 0x37, 0x43, 0xA0, 0xE8,
- 0x3D, 0x53, 0xA0, 0xE8,
-
- 0x48, 0x70, 0xF8, 0xEC,
- 0x2B, 0x48, 0x3C, 0xE9,
-
- 0x1F, 0x27, 0xBC, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x15, 0xC0, 0x20, 0xE9,
- 0x15, 0xC0, 0x20, 0xE9,
-
- 0x18, 0x3A, 0x41, 0xE9,
- 0x1D, 0x32, 0x41, 0xE9,
-
- 0x2A, 0x40, 0x20, 0xE9,
- 0x56, 0x3D, 0x56, 0xDF,
-
- 0x46, 0x37, 0x46, 0xDF,
- 0x4E, 0x3F, 0x4E, 0xDF,
-
- 0x16, 0x30, 0x20, 0xE9,
- 0x4F, 0x3F, 0x4F, 0xDF,
-
- 0x47, 0x37, 0x47, 0xDF,
- 0x57, 0x3D, 0x57, 0xDF,
-
- 0x32, 0x32, 0x2D, 0xDF,
- 0x22, 0x22, 0x2D, 0xDF,
-
- 0x12, 0x12, 0x2D, 0xDF,
- 0x3A, 0x3A, 0x2D, 0xDF,
-
- 0x27, 0xCF, 0x74, 0xC2,
- 0x37, 0xCF, 0x74, 0xC4,
-
- 0x0A, 0x44, 0x4C, 0xB0,
- 0x02, 0x44, 0x54, 0xB0,
-
- 0x3D, 0xCF, 0x74, 0xC0,
- 0x34, 0x37, 0x20, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x38, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3C, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB2,
- 0x1A, 0x44, 0x54, 0xB2,
-
- 0x2E, 0x80, 0x3A, 0xEA,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x27, 0xCF, 0x75, 0xC0,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x32, 0x31, 0x5F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x33, 0x39, 0x5F, 0xE9,
-
- 0x3D, 0xCF, 0x75, 0xC2,
- 0x37, 0xCF, 0x75, 0xC4,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA6, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA3, 0x3D, 0x20, 0xE9,
-
- 0x2A, 0x44, 0x4C, 0xB4,
- 0x1A, 0x44, 0x54, 0xB4,
-
- 0x0A, 0x45, 0x4D, 0xB0,
- 0x02, 0x45, 0x55, 0xB0,
-
- 0x88, 0x73, 0x5E, 0xE9,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA0, 0x37, 0x20, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x3E, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x3F, 0x38, 0x4F, 0xE9,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x3A, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x3B, 0x39, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x4D, 0xB2,
- 0x1A, 0x45, 0x55, 0xB2,
-
- 0x0A, 0x45, 0x4D, 0xB4,
- 0x02, 0x45, 0x55, 0xB4,
-
- 0x27, 0xCF, 0x75, 0xC6,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0xA7, 0x30, 0x4F, 0xE9,
- 0x0A, 0x20,
- 0x02, 0x20,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x31, 0x27, 0x20, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA8, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x45, 0x4D, 0xB6,
- 0x1A, 0x45, 0x55, 0xB6,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x36, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x37, 0x39, 0x4F, 0xE9,
-
- 0x00, 0x80, 0x00, 0xE8,
- 0x2A, 0x20,
- 0x1A, 0x20,
-
- 0x2A, 0x46, 0x4E, 0xBF,
- 0x1A, 0x46, 0x56, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA4, 0x31, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA5, 0x39, 0x4F, 0xE9,
-
- 0x0A, 0x47, 0x4F, 0xBF,
- 0x02, 0x47, 0x57, 0xBF,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0xA1, 0x30, 0x4F, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0xA2, 0x38, 0x4F, 0xE9,
-
- 0x2A, 0x43, 0x4B, 0xBF,
- 0x1A, 0x43, 0x53, 0xBF,
-
- 0x30, 0x50, 0x2E, 0x9F,
- 0x35, 0x31, 0x4F, 0xE9,
-
- 0x38, 0x21, 0x2C, 0x9F,
- 0x39, 0x39, 0x4F, 0xE9,
-
- 0x31, 0x53, 0x2F, 0x9F,
- 0x80, 0x31, 0x57, 0xE9,
-
- 0x39, 0xE5, 0x2C, 0x9F,
- 0x81, 0x39, 0x57, 0xE9,
-
- 0x37, 0x48, 0x50, 0xBD,
- 0x8A, 0x36, 0x20, 0xE9,
-
- 0x86, 0x76, 0x57, 0xE9,
- 0x8B, 0x3E, 0x20, 0xE9,
-
- 0x82, 0x30, 0x57, 0xE9,
- 0x87, 0x77, 0x57, 0xE9,
-
- 0x83, 0x38, 0x57, 0xE9,
- 0x35, 0x49, 0x51, 0xBD,
-
- 0x84, 0x31, 0x5E, 0xE9,
- 0x30, 0x1F, 0x5F, 0xE9,
-
- 0x85, 0x39, 0x5E, 0xE9,
- 0x57, 0x25, 0x20, 0xE9,
-
- 0x2B, 0x48, 0x20, 0xE9,
- 0x1D, 0x37, 0xE1, 0xEA,
-
- 0x1E, 0x35, 0xE1, 0xEA,
- 0x00, 0xE0,
- 0x26, 0x77,
-
- 0x24, 0x49, 0x20, 0xE9,
- 0x9D, 0xFF, 0x20, 0xEA,
-
- 0x16, 0x26, 0x20, 0xE9,
- 0x57, 0x2E, 0xBF, 0xEA,
-
- 0x1C, 0x46, 0xA0, 0xE8,
- 0x23, 0x4E, 0xA0, 0xE8,
-
- 0x2B, 0x56, 0xA0, 0xE8,
- 0x1D, 0x47, 0xA0, 0xE8,
-
- 0x24, 0x4F, 0xA0, 0xE8,
- 0x2C, 0x57, 0xA0, 0xE8,
-
- 0x1C, 0x00,
- 0x23, 0x00,
- 0x2B, 0x00,
- 0x00, 0xE0,
-
- 0x1D, 0x00,
- 0x24, 0x00,
- 0x2C, 0x00,
- 0x00, 0xE0,
-
- 0x1C, 0x65,
- 0x23, 0x65,
- 0x2B, 0x65,
- 0x00, 0xE0,
-
- 0x1D, 0x65,
- 0x24, 0x65,
- 0x2C, 0x65,
- 0x00, 0xE0,
-
- 0x1C, 0x23, 0x60, 0xEC,
- 0x36, 0xD7, 0x36, 0xAD,
-
- 0x2B, 0x80, 0x60, 0xEC,
- 0x1D, 0x24, 0x60, 0xEC,
-
- 0x3E, 0xD7, 0x3E, 0xAD,
- 0x2C, 0x80, 0x60, 0xEC,
-
- 0x1C, 0x2B, 0xDE, 0xE8,
- 0x23, 0x80, 0xDE, 0xE8,
-
- 0x36, 0x80, 0x36, 0xBD,
- 0x3E, 0x80, 0x3E, 0xBD,
-
- 0x33, 0xD7, 0x1C, 0xBD,
- 0x3B, 0xD7, 0x23, 0xBD,
-
- 0x46, 0x80, 0x46, 0xCF,
- 0x4F, 0x80, 0x4F, 0xCF,
-
- 0x56, 0x33, 0x56, 0xCF,
- 0x47, 0x3B, 0x47, 0xCF,
-
- 0xC5, 0xFF, 0x20, 0xEA,
- 0x00, 0x80, 0x00, 0xE8,
-
- 0x4E, 0x33, 0x4E, 0xCF,
- 0x57, 0x3B, 0x57, 0xCF,
-
- 0x8B, 0xFF, 0x20, 0xEA,
- 0x57, 0xC0, 0xBF, 0xEA,
-
- 0x00, 0x80, 0xA0, 0xE9,
- 0x00, 0x00, 0xD8, 0xEC,
-
-};
+++ /dev/null
-/* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*-
- * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com
- */
-/*
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "mga_drm.h"
-#include "mga_drv.h"
-#include "mga_ucode.h"
-
-#define MGA_WARP_CODE_ALIGN 256 /* in bytes */
-
-#define WARP_UCODE_SIZE( which ) \
- ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN)
-
-#define WARP_UCODE_INSTALL( which, where ) \
-do { \
- DRM_DEBUG( " pcbase = 0x%08lx vcbase = %p\n", pcbase, vcbase );\
- dev_priv->warp_pipe_phys[where] = pcbase; \
- memcpy( vcbase, which, sizeof(which) ); \
- pcbase += WARP_UCODE_SIZE( which ); \
- vcbase += WARP_UCODE_SIZE( which ); \
-} while (0)
-
-static const unsigned int mga_warp_g400_microcode_size =
- (WARP_UCODE_SIZE(warp_g400_tgz) +
- WARP_UCODE_SIZE(warp_g400_tgza) +
- WARP_UCODE_SIZE(warp_g400_tgzaf) +
- WARP_UCODE_SIZE(warp_g400_tgzf) +
- WARP_UCODE_SIZE(warp_g400_tgzs) +
- WARP_UCODE_SIZE(warp_g400_tgzsa) +
- WARP_UCODE_SIZE(warp_g400_tgzsaf) +
- WARP_UCODE_SIZE(warp_g400_tgzsf) +
- WARP_UCODE_SIZE(warp_g400_t2gz) +
- WARP_UCODE_SIZE(warp_g400_t2gza) +
- WARP_UCODE_SIZE(warp_g400_t2gzaf) +
- WARP_UCODE_SIZE(warp_g400_t2gzf) +
- WARP_UCODE_SIZE(warp_g400_t2gzs) +
- WARP_UCODE_SIZE(warp_g400_t2gzsa) +
- WARP_UCODE_SIZE(warp_g400_t2gzsaf) +
- WARP_UCODE_SIZE(warp_g400_t2gzsf));
-
-static const unsigned int mga_warp_g200_microcode_size =
- (WARP_UCODE_SIZE(warp_g200_tgz) +
- WARP_UCODE_SIZE(warp_g200_tgza) +
- WARP_UCODE_SIZE(warp_g200_tgzaf) +
- WARP_UCODE_SIZE(warp_g200_tgzf) +
- WARP_UCODE_SIZE(warp_g200_tgzs) +
- WARP_UCODE_SIZE(warp_g200_tgzsa) +
- WARP_UCODE_SIZE(warp_g200_tgzsaf) +
- WARP_UCODE_SIZE(warp_g200_tgzsf));
-
-
-unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv)
-{
- switch (dev_priv->chipset) {
- case MGA_CARD_TYPE_G400:
- case MGA_CARD_TYPE_G550:
- return PAGE_ALIGN(mga_warp_g400_microcode_size);
- case MGA_CARD_TYPE_G200:
- return PAGE_ALIGN(mga_warp_g200_microcode_size);
- default:
- DRM_ERROR("Unknown chipset value: 0x%x\n", dev_priv->chipset);
- return 0;
- }
-}
-
-static int mga_warp_install_g400_microcode(drm_mga_private_t * dev_priv)
-{
- unsigned char *vcbase = dev_priv->warp->handle;
- unsigned long pcbase = dev_priv->warp->offset;
-
- memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
-
- WARP_UCODE_INSTALL(warp_g400_tgz, MGA_WARP_TGZ);
- WARP_UCODE_INSTALL(warp_g400_tgzf, MGA_WARP_TGZF);
- WARP_UCODE_INSTALL(warp_g400_tgza, MGA_WARP_TGZA);
- WARP_UCODE_INSTALL(warp_g400_tgzaf, MGA_WARP_TGZAF);
- WARP_UCODE_INSTALL(warp_g400_tgzs, MGA_WARP_TGZS);
- WARP_UCODE_INSTALL(warp_g400_tgzsf, MGA_WARP_TGZSF);
- WARP_UCODE_INSTALL(warp_g400_tgzsa, MGA_WARP_TGZSA);
- WARP_UCODE_INSTALL(warp_g400_tgzsaf, MGA_WARP_TGZSAF);
-
- WARP_UCODE_INSTALL(warp_g400_t2gz, MGA_WARP_T2GZ);
- WARP_UCODE_INSTALL(warp_g400_t2gzf, MGA_WARP_T2GZF);
- WARP_UCODE_INSTALL(warp_g400_t2gza, MGA_WARP_T2GZA);
- WARP_UCODE_INSTALL(warp_g400_t2gzaf, MGA_WARP_T2GZAF);
- WARP_UCODE_INSTALL(warp_g400_t2gzs, MGA_WARP_T2GZS);
- WARP_UCODE_INSTALL(warp_g400_t2gzsf, MGA_WARP_T2GZSF);
- WARP_UCODE_INSTALL(warp_g400_t2gzsa, MGA_WARP_T2GZSA);
- WARP_UCODE_INSTALL(warp_g400_t2gzsaf, MGA_WARP_T2GZSAF);
-
- return 0;
-}
-
-static int mga_warp_install_g200_microcode(drm_mga_private_t * dev_priv)
-{
- unsigned char *vcbase = dev_priv->warp->handle;
- unsigned long pcbase = dev_priv->warp->offset;
-
- memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
-
- WARP_UCODE_INSTALL(warp_g200_tgz, MGA_WARP_TGZ);
- WARP_UCODE_INSTALL(warp_g200_tgzf, MGA_WARP_TGZF);
- WARP_UCODE_INSTALL(warp_g200_tgza, MGA_WARP_TGZA);
- WARP_UCODE_INSTALL(warp_g200_tgzaf, MGA_WARP_TGZAF);
- WARP_UCODE_INSTALL(warp_g200_tgzs, MGA_WARP_TGZS);
- WARP_UCODE_INSTALL(warp_g200_tgzsf, MGA_WARP_TGZSF);
- WARP_UCODE_INSTALL(warp_g200_tgzsa, MGA_WARP_TGZSA);
- WARP_UCODE_INSTALL(warp_g200_tgzsaf, MGA_WARP_TGZSAF);
-
- return 0;
-}
-
-int mga_warp_install_microcode(drm_mga_private_t * dev_priv)
-{
- const unsigned int size = mga_warp_microcode_size(dev_priv);
-
- DRM_DEBUG("MGA ucode size = %d bytes\n", size);
- if (size > dev_priv->warp->size) {
- DRM_ERROR("microcode too large! (%u > %lu)\n",
- size, dev_priv->warp->size);
- return -ENOMEM;
- }
-
- switch (dev_priv->chipset) {
- case MGA_CARD_TYPE_G400:
- case MGA_CARD_TYPE_G550:
- return mga_warp_install_g400_microcode(dev_priv);
- case MGA_CARD_TYPE_G200:
- return mga_warp_install_g200_microcode(dev_priv);
- default:
- return -EINVAL;
- }
-}
-
-#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
-
-int mga_warp_init(drm_mga_private_t * dev_priv)
-{
- u32 wmisc;
-
- /* FIXME: Get rid of these damned magic numbers...
- */
- switch (dev_priv->chipset) {
- case MGA_CARD_TYPE_G400:
- case MGA_CARD_TYPE_G550:
- MGA_WRITE(MGA_WIADDR2, MGA_WMODE_SUSPEND);
- MGA_WRITE(MGA_WGETMSB, 0x00000E00);
- MGA_WRITE(MGA_WVRTXSZ, 0x00001807);
- MGA_WRITE(MGA_WACCEPTSEQ, 0x18000000);
- break;
- case MGA_CARD_TYPE_G200:
- MGA_WRITE(MGA_WIADDR, MGA_WMODE_SUSPEND);
- MGA_WRITE(MGA_WGETMSB, 0x1606);
- MGA_WRITE(MGA_WVRTXSZ, 7);
- break;
- default:
- return -EINVAL;
- }
-
- MGA_WRITE(MGA_WMISC, (MGA_WUCODECACHE_ENABLE |
- MGA_WMASTER_ENABLE | MGA_WCACHEFLUSH_ENABLE));
- wmisc = MGA_READ(MGA_WMISC);
- if (wmisc != WMISC_EXPECTED) {
- DRM_ERROR("WARP engine config failed! 0x%x != 0x%x\n",
- wmisc, WMISC_EXPECTED);
- return -EINVAL;
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_dma.h"
-
-int
-nouveau_dma_channel_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_drm_channel *dchan = &dev_priv->channel;
- struct nouveau_gpuobj *gpuobj = NULL;
- struct mem_block *pushbuf;
- int grclass, ret, i;
-
- DRM_DEBUG("\n");
-
- pushbuf = nouveau_mem_alloc(dev, 0, 0x8000,
- NOUVEAU_MEM_FB | NOUVEAU_MEM_MAPPED,
- (struct drm_file *)-2);
- if (!pushbuf) {
- DRM_ERROR("Failed to allocate DMA push buffer\n");
- return -ENOMEM;
- }
-
- /* Allocate channel */
- ret = nouveau_fifo_alloc(dev, &dchan->chan, (struct drm_file *)-2,
- pushbuf, NvDmaFB, NvDmaTT);
- if (ret) {
- DRM_ERROR("Error allocating GPU channel: %d\n", ret);
- return ret;
- }
- DRM_DEBUG("Using FIFO channel %d\n", dchan->chan->id);
-
- /* Map push buffer */
- drm_core_ioremap(dchan->chan->pushbuf_mem->map, dev);
- if (!dchan->chan->pushbuf_mem->map->handle) {
- DRM_ERROR("Failed to ioremap push buffer\n");
- return -EINVAL;
- }
- dchan->pushbuf = (void*)dchan->chan->pushbuf_mem->map->handle;
-
- /* Initialise DMA vars */
- dchan->max = (dchan->chan->pushbuf_mem->size >> 2) - 2;
- dchan->put = dchan->chan->pushbuf_base >> 2;
- dchan->cur = dchan->put;
- dchan->free = dchan->max - dchan->cur;
-
- /* Insert NOPS for NOUVEAU_DMA_SKIPS */
- dchan->free -= NOUVEAU_DMA_SKIPS;
- dchan->push_free = NOUVEAU_DMA_SKIPS;
- for (i=0; i < NOUVEAU_DMA_SKIPS; i++)
- OUT_RING(0);
-
- /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier */
- if ((ret = nouveau_notifier_alloc(dchan->chan, NvNotify0, 1,
- &dchan->notify0_offset))) {
- DRM_ERROR("Error allocating NvNotify0: %d\n", ret);
- return ret;
- }
-
- /* We use NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */
- if (dev_priv->card_type < NV_50) grclass = NV_MEMORY_TO_MEMORY_FORMAT;
- else grclass = NV50_MEMORY_TO_MEMORY_FORMAT;
- if ((ret = nouveau_gpuobj_gr_new(dchan->chan, grclass, &gpuobj))) {
- DRM_ERROR("Error creating NvM2MF: %d\n", ret);
- return ret;
- }
-
- if ((ret = nouveau_gpuobj_ref_add(dev, dchan->chan, NvM2MF,
- gpuobj, NULL))) {
- DRM_ERROR("Error referencing NvM2MF: %d\n", ret);
- return ret;
- }
- dchan->m2mf_dma_source = NvDmaFB;
- dchan->m2mf_dma_destin = NvDmaFB;
-
- BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NAME, 1);
- OUT_RING (NvM2MF);
- BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_NOTIFY, 1);
- OUT_RING (NvNotify0);
- BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_SOURCE, 2);
- OUT_RING (dchan->m2mf_dma_source);
- OUT_RING (dchan->m2mf_dma_destin);
- FIRE_RING();
-
- return 0;
-}
-
-void
-nouveau_dma_channel_takedown(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_drm_channel *dchan = &dev_priv->channel;
-
- DRM_DEBUG("\n");
-
- if (dchan->chan) {
- drm_core_ioremapfree(dchan->chan->pushbuf_mem->map, dev);
- nouveau_fifo_free(dchan->chan);
- dchan->chan = NULL;
- }
-}
-
-#define READ_GET() ((NV_READ(dchan->chan->get) - \
- dchan->chan->pushbuf_base) >> 2)
-#define WRITE_PUT(val) do { \
- NV_WRITE(dchan->chan->put, \
- ((val) << 2) + dchan->chan->pushbuf_base); \
-} while(0)
-
-int
-nouveau_dma_wait(struct drm_device *dev, int size)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_drm_channel *dchan = &dev_priv->channel;
- uint32_t get;
-
- while (dchan->free < size) {
- get = READ_GET();
-
- if (dchan->put >= get) {
- dchan->free = dchan->max - dchan->cur;
-
- if (dchan->free < size) {
- dchan->push_free = 1;
- OUT_RING(0x20000000|dchan->chan->pushbuf_base);
- if (get <= NOUVEAU_DMA_SKIPS) {
- /*corner case - will be idle*/
- if (dchan->put <= NOUVEAU_DMA_SKIPS)
- WRITE_PUT(NOUVEAU_DMA_SKIPS + 1);
-
- do {
- get = READ_GET();
- } while (get <= NOUVEAU_DMA_SKIPS);
- }
-
- WRITE_PUT(NOUVEAU_DMA_SKIPS);
- dchan->cur = dchan->put = NOUVEAU_DMA_SKIPS;
- dchan->free = get - (NOUVEAU_DMA_SKIPS + 1);
- }
- } else {
- dchan->free = get - dchan->cur - 1;
- }
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __NOUVEAU_DMA_H__
-#define __NOUVEAU_DMA_H__
-
-typedef enum {
- NvSubM2MF = 0,
-} nouveau_subchannel_id_t;
-
-typedef enum {
- NvM2MF = 0x80039001,
- NvDmaFB = 0x8003d001,
- NvDmaTT = 0x8003d002,
- NvNotify0 = 0x8003d003
-} nouveau_object_handle_t;
-
-#define NV_MEMORY_TO_MEMORY_FORMAT 0x00000039
-#define NV_MEMORY_TO_MEMORY_FORMAT_NAME 0x00000000
-#define NV_MEMORY_TO_MEMORY_FORMAT_SET_REF 0x00000050
-#define NV_MEMORY_TO_MEMORY_FORMAT_NOP 0x00000100
-#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
-#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE 0x00000000
-#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE_LE_AWAKEN 0x00000001
-#define NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_NOTIFY 0x00000180
-#define NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_SOURCE 0x00000184
-#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
-
-#define NV50_MEMORY_TO_MEMORY_FORMAT 0x00005039
-#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK200 0x00000200
-#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK21C 0x0000021c
-#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH 0x00000238
-#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH 0x0000023c
-
-#define BEGIN_RING(subc, mthd, cnt) do { \
- int push_size = (cnt) + 1; \
- if (dchan->push_free) { \
- DRM_ERROR("prior packet incomplete: %d\n", dchan->push_free); \
- break; \
- } \
- if (dchan->free < push_size) { \
- if (nouveau_dma_wait(dev, push_size)) { \
- DRM_ERROR("FIFO timeout\n"); \
- break; \
- } \
- } \
- dchan->free -= push_size; \
- dchan->push_free = push_size; \
- OUT_RING(((cnt)<<18) | ((subc)<<15) | mthd); \
-} while(0)
-
-#define OUT_RING(data) do { \
- if (dchan->push_free == 0) { \
- DRM_ERROR("no space left in packet\n"); \
- break; \
- } \
- dchan->pushbuf[dchan->cur++] = (data); \
- dchan->push_free--; \
-} while(0)
-
-#define FIRE_RING() do { \
- if (dchan->push_free) { \
- DRM_ERROR("packet incomplete: %d\n", dchan->push_free); \
- break; \
- } \
- if (dchan->cur != dchan->put) { \
- DRM_MEMORYBARRIER(); \
- dchan->put = dchan->cur; \
- NV_WRITE(dchan->chan->put, dchan->put << 2); \
- } \
-} while(0)
-
-#endif
+++ /dev/null
-/*
- * Copyright 2005 Stephane Marchesin.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __NOUVEAU_DRM_H__
-#define __NOUVEAU_DRM_H__
-
-#define NOUVEAU_DRM_HEADER_PATCHLEVEL 15
-
-struct drm_nouveau_channel_alloc {
- uint32_t fb_ctxdma_handle;
- uint32_t tt_ctxdma_handle;
-
- int channel;
-
- /* Notifier memory */
- uint32_t notifier_handle;
-
- /* DRM-enforced subchannel assignments */
- struct {
- uint32_t handle;
- uint32_t grclass;
- } subchan[8];
- uint32_t nr_subchan;
-};
-
-struct drm_nouveau_channel_free {
- int channel;
-};
-
-struct drm_nouveau_grobj_alloc {
- int channel;
- uint32_t handle;
- int class;
-};
-
-struct drm_nouveau_notifierobj_alloc {
- uint32_t channel;
- uint32_t handle;
- uint32_t size;
- uint32_t offset;
-};
-
-struct drm_nouveau_gpuobj_free {
- int channel;
- uint32_t handle;
-};
-
-/* FIXME : maybe unify {GET,SET}PARAMs */
-#define NOUVEAU_GETPARAM_PCI_VENDOR 3
-#define NOUVEAU_GETPARAM_PCI_DEVICE 4
-#define NOUVEAU_GETPARAM_BUS_TYPE 5
-#define NOUVEAU_GETPARAM_FB_PHYSICAL 6
-#define NOUVEAU_GETPARAM_AGP_PHYSICAL 7
-#define NOUVEAU_GETPARAM_FB_SIZE 8
-#define NOUVEAU_GETPARAM_AGP_SIZE 9
-#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10
-#define NOUVEAU_GETPARAM_CHIPSET_ID 11
-#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12
-struct drm_nouveau_getparam {
- uint64_t param;
- uint64_t value;
-};
-
-struct drm_nouveau_setparam {
- uint64_t param;
- uint64_t value;
-};
-
-#define NOUVEAU_GEM_DOMAIN_CPU (1 << 0)
-#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1)
-#define NOUVEAU_GEM_DOMAIN_GART (1 << 2)
-#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3)
-
-struct drm_nouveau_gem_info {
- uint32_t handle;
- uint32_t domain;
- uint64_t size;
- uint64_t offset;
- uint64_t map_handle;
- uint32_t tile_mode;
- uint32_t tile_flags;
-};
-
-struct drm_nouveau_gem_new {
- struct drm_nouveau_gem_info info;
- uint32_t channel_hint;
- uint32_t align;
-};
-
-struct drm_nouveau_gem_pushbuf_bo {
- uint64_t user_priv;
- uint32_t handle;
- uint32_t read_domains;
- uint32_t write_domains;
- uint32_t valid_domains;
- uint32_t presumed_ok;
- uint32_t presumed_domain;
- uint64_t presumed_offset;
-};
-
-#define NOUVEAU_GEM_RELOC_LOW (1 << 0)
-#define NOUVEAU_GEM_RELOC_HIGH (1 << 1)
-#define NOUVEAU_GEM_RELOC_OR (1 << 2)
-struct drm_nouveau_gem_pushbuf_reloc {
- uint32_t bo_index;
- uint32_t reloc_index;
- uint32_t flags;
- uint32_t data;
- uint32_t vor;
- uint32_t tor;
-};
-
-#define NOUVEAU_GEM_MAX_BUFFERS 1024
-#define NOUVEAU_GEM_MAX_RELOCS 1024
-
-struct drm_nouveau_gem_pushbuf {
- uint32_t channel;
- uint32_t nr_dwords;
- uint32_t nr_buffers;
- uint32_t nr_relocs;
- uint64_t dwords;
- uint64_t buffers;
- uint64_t relocs;
-};
-
-struct drm_nouveau_gem_pushbuf_call {
- uint32_t channel;
- uint32_t handle;
- uint32_t offset;
- uint32_t nr_buffers;
- uint32_t nr_relocs;
- uint32_t nr_dwords;
- uint64_t buffers;
- uint64_t relocs;
- uint32_t suffix0;
- uint32_t suffix1;
- /* below only accessed for CALL2 */
- uint64_t vram_available;
- uint64_t gart_available;
-};
-
-struct drm_nouveau_gem_pin {
- uint32_t handle;
- uint32_t domain;
- uint64_t offset;
-};
-
-struct drm_nouveau_gem_unpin {
- uint32_t handle;
-};
-
-#define NOUVEAU_GEM_CPU_PREP_NOWAIT 0x00000001
-#define NOUVEAU_GEM_CPU_PREP_NOBLOCK 0x00000002
-#define NOUVEAU_GEM_CPU_PREP_WRITE 0x00000004
-struct drm_nouveau_gem_cpu_prep {
- uint32_t handle;
- uint32_t flags;
-};
-
-struct drm_nouveau_gem_cpu_fini {
- uint32_t handle;
-};
-
-struct drm_nouveau_gem_tile {
- uint32_t handle;
- uint32_t offset;
- uint32_t size;
- uint32_t tile_mode;
- uint32_t tile_flags;
-};
-
-enum nouveau_bus_type {
- NV_AGP = 0,
- NV_PCI = 1,
- NV_PCIE = 2,
-};
-
-struct drm_nouveau_sarea {
-};
-
-#define DRM_NOUVEAU_CARD_INIT 0x00
-#define DRM_NOUVEAU_GETPARAM 0x01
-#define DRM_NOUVEAU_SETPARAM 0x02
-#define DRM_NOUVEAU_CHANNEL_ALLOC 0x03
-#define DRM_NOUVEAU_CHANNEL_FREE 0x04
-#define DRM_NOUVEAU_GROBJ_ALLOC 0x05
-#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x06
-#define DRM_NOUVEAU_GPUOBJ_FREE 0x07
-#define DRM_NOUVEAU_GEM_NEW 0x40
-#define DRM_NOUVEAU_GEM_PUSHBUF 0x41
-#define DRM_NOUVEAU_GEM_PUSHBUF_CALL 0x42
-#define DRM_NOUVEAU_GEM_PIN 0x43 /* !KMS only */
-#define DRM_NOUVEAU_GEM_UNPIN 0x44 /* !KMS only */
-#define DRM_NOUVEAU_GEM_CPU_PREP 0x45
-#define DRM_NOUVEAU_GEM_CPU_FINI 0x46
-#define DRM_NOUVEAU_GEM_INFO 0x47
-#define DRM_NOUVEAU_GEM_PUSHBUF_CALL2 0x48
-
-#endif /* __NOUVEAU_DRM_H__ */
+++ /dev/null
-/*
- * Copyright 2005 Stephane Marchesin.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __NOUVEAU_DRV_H__
-#define __NOUVEAU_DRV_H__
-
-#define DRIVER_AUTHOR "Stephane Marchesin"
-#define DRIVER_EMAIL "dri-devel@lists.sourceforge.net"
-
-#define DRIVER_NAME "nouveau"
-#define DRIVER_DESC "nVidia Riva/TNT/GeForce"
-#define DRIVER_DATE "20060213"
-
-#define DRIVER_MAJOR 0
-#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 14
-
-#define NOUVEAU_FAMILY 0x0000FFFF
-#define NOUVEAU_FLAGS 0xFFFF0000
-
-#include "nouveau_drm.h"
-#include "nouveau_reg.h"
-
-struct mem_block {
- struct mem_block *next;
- struct mem_block *prev;
- uint64_t start;
- uint64_t size;
- struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
- int flags;
- drm_local_map_t *map;
- drm_handle_t map_handle;
-};
-
-enum nouveau_flags {
- NV_NFORCE =0x10000000,
- NV_NFORCE2 =0x20000000
-};
-
-#define NVOBJ_ENGINE_SW 0
-#define NVOBJ_ENGINE_GR 1
-#define NVOBJ_ENGINE_INT 0xdeadbeef
-
-#define NVOBJ_FLAG_ALLOW_NO_REFS (1 << 0)
-#define NVOBJ_FLAG_ZERO_ALLOC (1 << 1)
-#define NVOBJ_FLAG_ZERO_FREE (1 << 2)
-#define NVOBJ_FLAG_FAKE (1 << 3)
-struct nouveau_gpuobj {
- struct list_head list;
-
- int im_channel;
- struct mem_block *im_pramin;
- struct mem_block *im_backing;
- int im_bound;
-
- uint32_t flags;
- int refcount;
-
- uint32_t engine;
- uint32_t class;
-
- void (*dtor)(struct drm_device *, struct nouveau_gpuobj *);
- void *priv;
-};
-
-struct nouveau_gpuobj_ref {
- struct list_head list;
-
- struct nouveau_gpuobj *gpuobj;
- uint32_t instance;
-
- int channel;
- int handle;
-};
-
-struct nouveau_channel
-{
- struct drm_device *dev;
- int id;
-
- /* owner of this fifo */
- struct drm_file *file_priv;
- /* mapping of the fifo itself */
- drm_local_map_t *map;
- /* mapping of the regs controling the fifo */
- drm_local_map_t *regs;
-
- /* Fencing */
- uint32_t next_sequence;
-
- /* DMA push buffer */
- struct nouveau_gpuobj_ref *pushbuf;
- struct mem_block *pushbuf_mem;
- uint32_t pushbuf_base;
-
- /* FIFO user control regs */
- uint32_t user, user_size;
- uint32_t put;
- uint32_t get;
- uint32_t ref_cnt;
-
- /* Notifier memory */
- struct mem_block *notifier_block;
- struct mem_block *notifier_heap;
- drm_local_map_t *notifier_map;
-
- /* PFIFO context */
- struct nouveau_gpuobj_ref *ramfc;
-
- /* PGRAPH context */
- /* XXX may be merge 2 pointers as private data ??? */
- struct nouveau_gpuobj_ref *ramin_grctx;
- void *pgraph_ctx;
-
- /* NV50 VM */
- struct nouveau_gpuobj *vm_pd;
- struct nouveau_gpuobj_ref *vm_gart_pt;
- struct nouveau_gpuobj_ref *vm_vram_pt;
-
- /* Objects */
- struct nouveau_gpuobj_ref *ramin; /* Private instmem */
- struct mem_block *ramin_heap; /* Private PRAMIN heap */
- struct nouveau_gpuobj_ref *ramht; /* Hash table */
- struct list_head ramht_refs; /* Objects referenced by RAMHT */
-};
-
-struct nouveau_drm_channel {
- struct nouveau_channel *chan;
-
- /* DMA state */
- int max, put, cur, free;
- int push_free;
- volatile uint32_t *pushbuf;
-
- /* Notifiers */
- uint32_t notify0_offset;
-
- /* Buffer moves */
- uint32_t m2mf_dma_source;
- uint32_t m2mf_dma_destin;
-};
-
-struct nouveau_config {
- struct {
- int location;
- int size;
- } cmdbuf;
-};
-
-struct nouveau_instmem_engine {
- void *priv;
-
- int (*init)(struct drm_device *dev);
- void (*takedown)(struct drm_device *dev);
-
- int (*populate)(struct drm_device *, struct nouveau_gpuobj *,
- uint32_t *size);
- void (*clear)(struct drm_device *, struct nouveau_gpuobj *);
- int (*bind)(struct drm_device *, struct nouveau_gpuobj *);
- int (*unbind)(struct drm_device *, struct nouveau_gpuobj *);
-};
-
-struct nouveau_mc_engine {
- int (*init)(struct drm_device *dev);
- void (*takedown)(struct drm_device *dev);
-};
-
-struct nouveau_timer_engine {
- int (*init)(struct drm_device *dev);
- void (*takedown)(struct drm_device *dev);
- uint64_t (*read)(struct drm_device *dev);
-};
-
-struct nouveau_fb_engine {
- int (*init)(struct drm_device *dev);
- void (*takedown)(struct drm_device *dev);
-};
-
-struct nouveau_fifo_engine {
- void *priv;
-
- int channels;
-
- int (*init)(struct drm_device *);
- void (*takedown)(struct drm_device *);
-
- int (*channel_id)(struct drm_device *);
-
- int (*create_context)(struct nouveau_channel *);
- void (*destroy_context)(struct nouveau_channel *);
- int (*load_context)(struct nouveau_channel *);
- int (*save_context)(struct nouveau_channel *);
-};
-
-struct nouveau_pgraph_engine {
- int (*init)(struct drm_device *);
- void (*takedown)(struct drm_device *);
-
- int (*create_context)(struct nouveau_channel *);
- void (*destroy_context)(struct nouveau_channel *);
- int (*load_context)(struct nouveau_channel *);
- int (*save_context)(struct nouveau_channel *);
-};
-
-struct nouveau_engine {
- struct nouveau_instmem_engine instmem;
- struct nouveau_mc_engine mc;
- struct nouveau_timer_engine timer;
- struct nouveau_fb_engine fb;
- struct nouveau_pgraph_engine graph;
- struct nouveau_fifo_engine fifo;
-};
-
-#define NOUVEAU_MAX_CHANNEL_NR 128
-struct drm_nouveau_private {
- enum {
- NOUVEAU_CARD_INIT_DOWN,
- NOUVEAU_CARD_INIT_DONE,
- NOUVEAU_CARD_INIT_FAILED
- } init_state;
-
- int ttm;
-
- /* the card type, takes NV_* as values */
- int card_type;
- /* exact chipset, derived from NV_PMC_BOOT_0 */
- int chipset;
- int flags;
-
- drm_local_map_t *mmio;
- drm_local_map_t *fb;
- drm_local_map_t *ramin; /* NV40 onwards */
-
- int fifo_alloc_count;
- struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR];
-
- struct nouveau_engine Engine;
- struct nouveau_drm_channel channel;
-
- /* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */
- struct nouveau_gpuobj *ramht;
- uint32_t ramin_rsvd_vram;
- uint32_t ramht_offset;
- uint32_t ramht_size;
- uint32_t ramht_bits;
- uint32_t ramfc_offset;
- uint32_t ramfc_size;
- uint32_t ramro_offset;
- uint32_t ramro_size;
-
- /* base physical adresses */
- uint64_t fb_phys;
- uint64_t fb_available_size;
-
- struct {
- enum {
- NOUVEAU_GART_NONE = 0,
- NOUVEAU_GART_AGP,
- NOUVEAU_GART_SGDMA
- } type;
- uint64_t aper_base;
- uint64_t aper_size;
-
- struct nouveau_gpuobj *sg_ctxdma;
- struct page *sg_dummy_page;
- dma_addr_t sg_dummy_bus;
-
- /* nottm hack */
- struct drm_ttm_backend *sg_be;
- unsigned long sg_handle;
- } gart_info;
-
- /* G8x global VRAM page table */
- struct nouveau_gpuobj *vm_vram_pt;
-
- /* the mtrr covering the FB */
- int fb_mtrr;
-
- struct mem_block *agp_heap;
- struct mem_block *fb_heap;
- struct mem_block *fb_nomap_heap;
- struct mem_block *ramin_heap;
- struct mem_block *pci_heap;
-
- /* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
- uint32_t ctx_table_size;
- struct nouveau_gpuobj_ref *ctx_table;
-
- struct nouveau_config config;
-
- struct list_head gpuobj_list;
-
- struct nouveau_suspend_resume {
- uint32_t fifo_mode;
- uint32_t graph_ctx_control;
- uint32_t graph_state;
- uint32_t *ramin_copy;
- uint64_t ramin_size;
- } susres;
- struct backlight_device *backlight;
-};
-
-#define NOUVEAU_CHECK_INITIALISED_WITH_RETURN do { \
- struct drm_nouveau_private *nv = dev->dev_private; \
- if (nv->init_state != NOUVEAU_CARD_INIT_DONE) { \
- DRM_ERROR("called without init\n"); \
- return -EINVAL; \
- } \
-} while(0)
-
-#define NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(id,cl,ch) do { \
- struct drm_nouveau_private *nv = dev->dev_private; \
- if (!nouveau_fifo_owner(dev, (cl), (id))) { \
- DRM_ERROR("pid %d doesn't own channel %d\n", \
- DRM_CURRENTPID, (id)); \
- return -EPERM; \
- } \
- (ch) = nv->fifos[(id)]; \
-} while(0)
-
-/* nouveau_state.c */
-extern void nouveau_preclose(struct drm_device *dev, struct drm_file *);
-extern int nouveau_load(struct drm_device *, unsigned long flags);
-extern int nouveau_firstopen(struct drm_device *);
-extern void nouveau_lastclose(struct drm_device *);
-extern int nouveau_unload(struct drm_device *);
-extern int nouveau_ioctl_getparam(struct drm_device *, void *data,
- struct drm_file *);
-extern int nouveau_ioctl_setparam(struct drm_device *, void *data,
- struct drm_file *);
-extern void nouveau_wait_for_idle(struct drm_device *);
-extern int nouveau_card_init(struct drm_device *);
-extern int nouveau_ioctl_card_init(struct drm_device *, void *data,
- struct drm_file *);
-extern int nouveau_ioctl_suspend(struct drm_device *, void *data,
- struct drm_file *);
-extern int nouveau_ioctl_resume(struct drm_device *, void *data,
- struct drm_file *);
-
-/* nouveau_mem.c */
-extern int nouveau_mem_init_heap(struct mem_block **, uint64_t start,
- uint64_t size);
-extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *,
- uint64_t size, int align2,
- struct drm_file *, int tail);
-extern void nouveau_mem_takedown(struct mem_block **heap);
-extern void nouveau_mem_free_block(struct mem_block *);
-extern uint64_t nouveau_mem_fb_amount(struct drm_device *);
-extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
-extern int nouveau_ioctl_mem_alloc(struct drm_device *, void *data,
- struct drm_file *);
-extern int nouveau_ioctl_mem_free(struct drm_device *, void *data,
- struct drm_file *);
-extern int nouveau_ioctl_mem_tile(struct drm_device *, void *data,
- struct drm_file *);
-extern struct mem_block* nouveau_mem_alloc(struct drm_device *,
- int alignment, uint64_t size,
- int flags, struct drm_file *);
-extern void nouveau_mem_free(struct drm_device *dev, struct mem_block*);
-extern int nouveau_mem_init(struct drm_device *);
-extern int nouveau_mem_init_ttm(struct drm_device *);
-extern void nouveau_mem_close(struct drm_device *);
-
-/* nouveau_notifier.c */
-extern int nouveau_notifier_init_channel(struct nouveau_channel *);
-extern void nouveau_notifier_takedown_channel(struct nouveau_channel *);
-extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle,
- int cout, uint32_t *offset);
-extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data,
- struct drm_file *);
-extern int nouveau_ioctl_notifier_free(struct drm_device *, void *data,
- struct drm_file *);
-
-/* nouveau_fifo.c */
-extern int nouveau_fifo_init(struct drm_device *);
-extern int nouveau_fifo_ctx_size(struct drm_device *);
-extern void nouveau_fifo_cleanup(struct drm_device *, struct drm_file *);
-extern int nouveau_fifo_owner(struct drm_device *, struct drm_file *,
- int channel);
-extern int nouveau_fifo_alloc(struct drm_device *dev,
- struct nouveau_channel **chan,
- struct drm_file *file_priv,
- struct mem_block *pushbuf,
- uint32_t fb_ctxdma, uint32_t tt_ctxdma);
-extern void nouveau_fifo_free(struct nouveau_channel *);
-extern int nouveau_channel_idle(struct nouveau_channel *chan);
-
-/* nouveau_object.c */
-extern int nouveau_gpuobj_early_init(struct drm_device *);
-extern int nouveau_gpuobj_init(struct drm_device *);
-extern void nouveau_gpuobj_takedown(struct drm_device *);
-extern void nouveau_gpuobj_late_takedown(struct drm_device *);
-extern int nouveau_gpuobj_channel_init(struct nouveau_channel *,
- uint32_t vram_h, uint32_t tt_h);
-extern void nouveau_gpuobj_channel_takedown(struct nouveau_channel *);
-extern int nouveau_gpuobj_new(struct drm_device *, struct nouveau_channel *,
- int size, int align, uint32_t flags,
- struct nouveau_gpuobj **);
-extern int nouveau_gpuobj_del(struct drm_device *, struct nouveau_gpuobj **);
-extern int nouveau_gpuobj_ref_add(struct drm_device *, struct nouveau_channel *,
- uint32_t handle, struct nouveau_gpuobj *,
- struct nouveau_gpuobj_ref **);
-extern int nouveau_gpuobj_ref_del(struct drm_device *,
- struct nouveau_gpuobj_ref **);
-extern int nouveau_gpuobj_ref_find(struct nouveau_channel *, uint32_t handle,
- struct nouveau_gpuobj_ref **ref_ret);
-extern int nouveau_gpuobj_new_ref(struct drm_device *,
- struct nouveau_channel *alloc_chan,
- struct nouveau_channel *ref_chan,
- uint32_t handle, int size, int align,
- uint32_t flags, struct nouveau_gpuobj_ref **);
-extern int nouveau_gpuobj_new_fake(struct drm_device *,
- uint32_t p_offset, uint32_t b_offset,
- uint32_t size, uint32_t flags,
- struct nouveau_gpuobj **,
- struct nouveau_gpuobj_ref**);
-extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class,
- uint64_t offset, uint64_t size, int access,
- int target, struct nouveau_gpuobj **);
-extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *,
- uint64_t offset, uint64_t size,
- int access, struct nouveau_gpuobj **,
- uint32_t *o_ret);
-extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,
- struct nouveau_gpuobj **);
-extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data,
- struct drm_file *);
-extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
- struct drm_file *);
-
-/* nouveau_irq.c */
-extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
-extern void nouveau_irq_preinstall(struct drm_device *);
-extern int nouveau_irq_postinstall(struct drm_device *);
-extern void nouveau_irq_uninstall(struct drm_device *);
-
-/* nouveau_sgdma.c */
-extern int nouveau_sgdma_init(struct drm_device *);
-extern void nouveau_sgdma_takedown(struct drm_device *);
-extern int nouveau_sgdma_get_page(struct drm_device *, uint32_t offset,
- uint32_t *page);
-extern struct drm_ttm_backend *nouveau_sgdma_init_ttm(struct drm_device *);
-extern int nouveau_sgdma_nottm_hack_init(struct drm_device *);
-extern void nouveau_sgdma_nottm_hack_takedown(struct drm_device *);
-
-/* nouveau_dma.c */
-extern int nouveau_dma_channel_init(struct drm_device *);
-extern void nouveau_dma_channel_takedown(struct drm_device *);
-extern int nouveau_dma_wait(struct drm_device *, int size);
-
-/* nouveau_backlight.c */
-extern int nouveau_backlight_init(struct drm_device *);
-extern void nouveau_backlight_exit(struct drm_device *);
-
-/* nv04_fb.c */
-extern int nv04_fb_init(struct drm_device *);
-extern void nv04_fb_takedown(struct drm_device *);
-
-/* nv10_fb.c */
-extern int nv10_fb_init(struct drm_device *);
-extern void nv10_fb_takedown(struct drm_device *);
-
-/* nv40_fb.c */
-extern int nv40_fb_init(struct drm_device *);
-extern void nv40_fb_takedown(struct drm_device *);
-
-/* nv04_fifo.c */
-extern int nv04_fifo_channel_id(struct drm_device *);
-extern int nv04_fifo_create_context(struct nouveau_channel *);
-extern void nv04_fifo_destroy_context(struct nouveau_channel *);
-extern int nv04_fifo_load_context(struct nouveau_channel *);
-extern int nv04_fifo_save_context(struct nouveau_channel *);
-
-/* nv10_fifo.c */
-extern int nv10_fifo_channel_id(struct drm_device *);
-extern int nv10_fifo_create_context(struct nouveau_channel *);
-extern void nv10_fifo_destroy_context(struct nouveau_channel *);
-extern int nv10_fifo_load_context(struct nouveau_channel *);
-extern int nv10_fifo_save_context(struct nouveau_channel *);
-
-/* nv40_fifo.c */
-extern int nv40_fifo_init(struct drm_device *);
-extern int nv40_fifo_create_context(struct nouveau_channel *);
-extern void nv40_fifo_destroy_context(struct nouveau_channel *);
-extern int nv40_fifo_load_context(struct nouveau_channel *);
-extern int nv40_fifo_save_context(struct nouveau_channel *);
-
-/* nv50_fifo.c */
-extern int nv50_fifo_init(struct drm_device *);
-extern void nv50_fifo_takedown(struct drm_device *);
-extern int nv50_fifo_channel_id(struct drm_device *);
-extern int nv50_fifo_create_context(struct nouveau_channel *);
-extern void nv50_fifo_destroy_context(struct nouveau_channel *);
-extern int nv50_fifo_load_context(struct nouveau_channel *);
-extern int nv50_fifo_save_context(struct nouveau_channel *);
-
-/* nv04_graph.c */
-extern void nouveau_nv04_context_switch(struct drm_device *);
-extern int nv04_graph_init(struct drm_device *);
-extern void nv04_graph_takedown(struct drm_device *);
-extern int nv04_graph_create_context(struct nouveau_channel *);
-extern void nv04_graph_destroy_context(struct nouveau_channel *);
-extern int nv04_graph_load_context(struct nouveau_channel *);
-extern int nv04_graph_save_context(struct nouveau_channel *);
-
-/* nv10_graph.c */
-extern void nouveau_nv10_context_switch(struct drm_device *);
-extern int nv10_graph_init(struct drm_device *);
-extern void nv10_graph_takedown(struct drm_device *);
-extern int nv10_graph_create_context(struct nouveau_channel *);
-extern void nv10_graph_destroy_context(struct nouveau_channel *);
-extern int nv10_graph_load_context(struct nouveau_channel *);
-extern int nv10_graph_save_context(struct nouveau_channel *);
-
-/* nv20_graph.c */
-extern int nv20_graph_create_context(struct nouveau_channel *);
-extern void nv20_graph_destroy_context(struct nouveau_channel *);
-extern int nv20_graph_load_context(struct nouveau_channel *);
-extern int nv20_graph_save_context(struct nouveau_channel *);
-extern int nv20_graph_init(struct drm_device *);
-extern void nv20_graph_takedown(struct drm_device *);
-extern int nv30_graph_init(struct drm_device *);
-
-/* nv40_graph.c */
-extern int nv40_graph_init(struct drm_device *);
-extern void nv40_graph_takedown(struct drm_device *);
-extern int nv40_graph_create_context(struct nouveau_channel *);
-extern void nv40_graph_destroy_context(struct nouveau_channel *);
-extern int nv40_graph_load_context(struct nouveau_channel *);
-extern int nv40_graph_save_context(struct nouveau_channel *);
-
-/* nv50_graph.c */
-extern int nv50_graph_init(struct drm_device *);
-extern void nv50_graph_takedown(struct drm_device *);
-extern int nv50_graph_create_context(struct nouveau_channel *);
-extern void nv50_graph_destroy_context(struct nouveau_channel *);
-extern int nv50_graph_load_context(struct nouveau_channel *);
-extern int nv50_graph_save_context(struct nouveau_channel *);
-
-/* nv04_instmem.c */
-extern int nv04_instmem_init(struct drm_device *);
-extern void nv04_instmem_takedown(struct drm_device *);
-extern int nv04_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
- uint32_t *size);
-extern void nv04_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
-extern int nv04_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
-extern int nv04_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
-
-/* nv50_instmem.c */
-extern int nv50_instmem_init(struct drm_device *);
-extern void nv50_instmem_takedown(struct drm_device *);
-extern int nv50_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
- uint32_t *size);
-extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
-extern int nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
-extern int nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
-
-/* nv04_mc.c */
-extern int nv04_mc_init(struct drm_device *);
-extern void nv04_mc_takedown(struct drm_device *);
-
-/* nv40_mc.c */
-extern int nv40_mc_init(struct drm_device *);
-extern void nv40_mc_takedown(struct drm_device *);
-
-/* nv50_mc.c */
-extern int nv50_mc_init(struct drm_device *);
-extern void nv50_mc_takedown(struct drm_device *);
-
-/* nv04_timer.c */
-extern int nv04_timer_init(struct drm_device *);
-extern uint64_t nv04_timer_read(struct drm_device *);
-extern void nv04_timer_takedown(struct drm_device *);
-
-extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
- unsigned long arg);
-
-/* nouveau_buffer.c */
-extern struct drm_bo_driver nouveau_bo_driver;
-
-/* nouveau_fence.c */
-extern struct drm_fence_driver nouveau_fence_driver;
-extern void nouveau_fence_handler(struct drm_device *dev, int channel);
-
-#if defined(__powerpc__)
-#define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) )
-#define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) )
-#else
-#define NV_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
-#define NV_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
-#endif
-
-/* PRAMIN access */
-#if defined(__powerpc__)
-#define NV_RI32(o) in_be32((void __iomem *)(dev_priv->ramin)->handle+(o))
-#define NV_WI32(o,v) out_be32((void __iomem*)(dev_priv->ramin)->handle+(o), (v))
-#else
-#define NV_RI32(o) DRM_READ32(dev_priv->ramin, (o))
-#define NV_WI32(o,v) DRM_WRITE32(dev_priv->ramin, (o), (v))
-#endif
-
-#define INSTANCE_RD(o,i) NV_RI32((o)->im_pramin->start + ((i)<<2))
-#define INSTANCE_WR(o,i,v) NV_WI32((o)->im_pramin->start + ((i)<<2), (v))
-
-#endif /* __NOUVEAU_DRV_H__ */
+++ /dev/null
-/*
- * Copyright 2005-2006 Stephane Marchesin
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-
-/* returns the size of fifo context */
-int nouveau_fifo_ctx_size(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv=dev->dev_private;
-
- if (dev_priv->card_type >= NV_40)
- return 128;
- else if (dev_priv->card_type >= NV_17)
- return 64;
- else
- return 32;
-}
-
-/***********************************
- * functions doing the actual work
- ***********************************/
-
-static int nouveau_fifo_instmem_configure(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- NV_WRITE(NV03_PFIFO_RAMHT,
- (0x03 << 24) /* search 128 */ |
- ((dev_priv->ramht_bits - 9) << 16) |
- (dev_priv->ramht_offset >> 8)
- );
-
- NV_WRITE(NV03_PFIFO_RAMRO, dev_priv->ramro_offset>>8);
-
- switch(dev_priv->card_type)
- {
- case NV_40:
- switch (dev_priv->chipset) {
- case 0x47:
- case 0x49:
- case 0x4b:
- NV_WRITE(0x2230, 1);
- break;
- default:
- break;
- }
- NV_WRITE(NV40_PFIFO_RAMFC, 0x30002);
- break;
- case NV_44:
- NV_WRITE(NV40_PFIFO_RAMFC, ((nouveau_mem_fb_amount(dev)-512*1024+dev_priv->ramfc_offset)>>16) |
- (2 << 16));
- break;
- case NV_30:
- case NV_20:
- case NV_17:
- NV_WRITE(NV03_PFIFO_RAMFC, (dev_priv->ramfc_offset>>8) |
- (1 << 16) /* 64 Bytes entry*/);
- /* XXX nvidia blob set bit 18, 21,23 for nv20 & nv30 */
- break;
- case NV_11:
- case NV_10:
- case NV_04:
- NV_WRITE(NV03_PFIFO_RAMFC, dev_priv->ramfc_offset>>8);
- break;
- }
-
- return 0;
-}
-
-int nouveau_fifo_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
-
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) &
- ~NV_PMC_ENABLE_PFIFO);
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) |
- NV_PMC_ENABLE_PFIFO);
-
- /* Enable PFIFO error reporting */
- NV_WRITE(NV03_PFIFO_INTR_0, 0xFFFFFFFF);
- NV_WRITE(NV03_PFIFO_INTR_EN_0, 0xFFFFFFFF);
-
- NV_WRITE(NV03_PFIFO_CACHES, 0x00000000);
-
- ret = nouveau_fifo_instmem_configure(dev);
- if (ret) {
- DRM_ERROR("Failed to configure instance memory\n");
- return ret;
- }
-
- /* FIXME remove all the stuff that's done in nouveau_fifo_alloc */
-
- DRM_DEBUG("Setting defaults for remaining PFIFO regs\n");
-
- /* All channels into PIO mode */
- NV_WRITE(NV04_PFIFO_MODE, 0x00000000);
-
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000000);
- /* Channel 0 active, PIO mode */
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, 0x00000000);
- /* PUT and GET to 0 */
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET, 0x00000000);
- /* No cmdbuf object */
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE, 0x00000000);
- NV_WRITE(NV03_PFIFO_CACHE0_PUSH0, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE0_PULL0, 0x00000000);
- NV_WRITE(NV04_PFIFO_SIZE, 0x0000FFFF);
- NV_WRITE(NV04_PFIFO_CACHE1_HASH, 0x0000FFFF);
- NV_WRITE(NV04_PFIFO_CACHE0_PULL1, 0x00000001);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_CTL, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_ENGINE, 0x00000000);
-
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_FETCH, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_112_BYTES |
- NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |
- NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_4 |
-#ifdef __BIG_ENDIAN
- NV_PFIFO_CACHE1_BIG_ENDIAN |
-#endif
- 0x00000000);
-
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH, 0x00000001);
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000001);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000001);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL1, 0x00000001);
-
- /* FIXME on NV04 */
- if (dev_priv->card_type >= NV_10) {
- NV_WRITE(NV10_PGRAPH_CTX_USER, 0x0);
- NV_WRITE(NV04_PFIFO_DELAY_0, 0xff /* retrycount*/ );
- if (dev_priv->card_type >= NV_40)
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x00002001);
- else
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10110000);
- } else {
- NV_WRITE(NV04_PGRAPH_CTX_USER, 0x0);
- NV_WRITE(NV04_PFIFO_DELAY_0, 0xff /* retrycount*/ );
- NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10110000);
- }
-
- NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, 0x001fffff);
- NV_WRITE(NV03_PFIFO_CACHES, 0x00000001);
- return 0;
-}
-
-static int
-nouveau_fifo_pushbuf_ctxdma_init(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct mem_block *pb = chan->pushbuf_mem;
- struct nouveau_gpuobj *pushbuf = NULL;
- int ret;
-
- if (pb->flags & NOUVEAU_MEM_AGP) {
- ret = nouveau_gpuobj_gart_dma_new(chan, pb->start, pb->size,
- NV_DMA_ACCESS_RO,
- &pushbuf,
- &chan->pushbuf_base);
- } else
- if (pb->flags & NOUVEAU_MEM_PCI) {
- ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
- pb->start, pb->size,
- NV_DMA_ACCESS_RO,
- NV_DMA_TARGET_PCI_NONLINEAR,
- &pushbuf);
- chan->pushbuf_base = 0;
- } else if (dev_priv->card_type != NV_04) {
- ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
- pb->start, pb->size,
- NV_DMA_ACCESS_RO,
- NV_DMA_TARGET_VIDMEM, &pushbuf);
- chan->pushbuf_base = 0;
- } else {
- /* NV04 cmdbuf hack, from original ddx.. not sure of it's
- * exact reason for existing :) PCI access to cmdbuf in
- * VRAM.
- */
- ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
- pb->start +
- drm_get_resource_start(dev, 1),
- pb->size, NV_DMA_ACCESS_RO,
- NV_DMA_TARGET_PCI, &pushbuf);
- chan->pushbuf_base = 0;
- }
-
- if ((ret = nouveau_gpuobj_ref_add(dev, chan, 0, pushbuf,
- &chan->pushbuf))) {
- DRM_ERROR("Error referencing push buffer ctxdma: %d\n", ret);
- if (pushbuf != dev_priv->gart_info.sg_ctxdma)
- nouveau_gpuobj_del(dev, &pushbuf);
- return ret;
- }
-
- return 0;
-}
-
-static struct mem_block *
-nouveau_fifo_user_pushbuf_alloc(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_config *config = &dev_priv->config;
- struct mem_block *pb;
- int pb_min_size = max(NV03_FIFO_SIZE,PAGE_SIZE);
-
- /* Defaults for unconfigured values */
- if (!config->cmdbuf.location)
- config->cmdbuf.location = NOUVEAU_MEM_FB;
- if (!config->cmdbuf.size || config->cmdbuf.size < pb_min_size)
- config->cmdbuf.size = pb_min_size;
-
- pb = nouveau_mem_alloc(dev, 0, config->cmdbuf.size,
- config->cmdbuf.location | NOUVEAU_MEM_MAPPED,
- (struct drm_file *)-2);
- if (!pb)
- DRM_ERROR("Couldn't allocate DMA push buffer.\n");
-
- return pb;
-}
-
-/* allocates and initializes a fifo for user space consumption */
-int
-nouveau_fifo_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
- struct drm_file *file_priv, struct mem_block *pushbuf,
- uint32_t vram_handle, uint32_t tt_handle)
-{
- int ret;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- struct nouveau_channel *chan;
- int channel;
-
- /*
- * Alright, here is the full story
- * Nvidia cards have multiple hw fifo contexts (praise them for that,
- * no complicated crash-prone context switches)
- * We allocate a new context for each app and let it write to it directly
- * (woo, full userspace command submission !)
- * When there are no more contexts, you lost
- */
- for (channel = 0; channel < engine->fifo.channels; channel++) {
- if (dev_priv->fifos[channel] == NULL)
- break;
- }
-
- /* no more fifos. you lost. */
- if (channel == engine->fifo.channels)
- return -EINVAL;
-
- dev_priv->fifos[channel] = drm_calloc(1, sizeof(struct nouveau_channel),
- DRM_MEM_DRIVER);
- if (!dev_priv->fifos[channel])
- return -ENOMEM;
- dev_priv->fifo_alloc_count++;
- chan = dev_priv->fifos[channel];
- chan->dev = dev;
- chan->id = channel;
- chan->file_priv = file_priv;
- chan->pushbuf_mem = pushbuf;
-
- DRM_INFO("Allocating FIFO number %d\n", channel);
-
- /* Locate channel's user control regs */
- if (dev_priv->card_type < NV_40) {
- chan->user = NV03_USER(channel);
- chan->user_size = NV03_USER_SIZE;
- chan->put = NV03_USER_DMA_PUT(channel);
- chan->get = NV03_USER_DMA_GET(channel);
- chan->ref_cnt = NV03_USER_REF_CNT(channel);
- } else
- if (dev_priv->card_type < NV_50) {
- chan->user = NV40_USER(channel);
- chan->user_size = NV40_USER_SIZE;
- chan->put = NV40_USER_DMA_PUT(channel);
- chan->get = NV40_USER_DMA_GET(channel);
- chan->ref_cnt = NV40_USER_REF_CNT(channel);
- } else {
- chan->user = NV50_USER(channel);
- chan->user_size = NV50_USER_SIZE;
- chan->put = NV50_USER_DMA_PUT(channel);
- chan->get = NV50_USER_DMA_GET(channel);
- chan->ref_cnt = NV50_USER_REF_CNT(channel);
- }
-
- /* Allocate space for per-channel fixed notifier memory */
- ret = nouveau_notifier_init_channel(chan);
- if (ret) {
- nouveau_fifo_free(chan);
- return ret;
- }
-
- /* Setup channel's default objects */
- ret = nouveau_gpuobj_channel_init(chan, vram_handle, tt_handle);
- if (ret) {
- nouveau_fifo_free(chan);
- return ret;
- }
-
- /* Create a dma object for the push buffer */
- ret = nouveau_fifo_pushbuf_ctxdma_init(chan);
- if (ret) {
- nouveau_fifo_free(chan);
- return ret;
- }
-
- nouveau_wait_for_idle(dev);
-
- /* disable the fifo caches */
- NV_WRITE(NV03_PFIFO_CACHES, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH, NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH)&(~0x1));
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000000);
-
- /* Create a graphics context for new channel */
- ret = engine->graph.create_context(chan);
- if (ret) {
- nouveau_fifo_free(chan);
- return ret;
- }
-
- /* Construct inital RAMFC for new channel */
- ret = engine->fifo.create_context(chan);
- if (ret) {
- nouveau_fifo_free(chan);
- return ret;
- }
-
- /* setup channel's default get/put values
- * XXX: quite possibly extremely pointless..
- */
- NV_WRITE(chan->get, chan->pushbuf_base);
- NV_WRITE(chan->put, chan->pushbuf_base);
-
- /* If this is the first channel, setup PFIFO ourselves. For any
- * other case, the GPU will handle this when it switches contexts.
- */
- if (dev_priv->card_type < NV_50 &&
- dev_priv->fifo_alloc_count == 1) {
- ret = engine->fifo.load_context(chan);
- if (ret) {
- nouveau_fifo_free(chan);
- return ret;
- }
-
- ret = engine->graph.load_context(chan);
- if (ret) {
- nouveau_fifo_free(chan);
- return ret;
- }
- }
-
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH,
- NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH) | 1);
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000001);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000001);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL1, 0x00000001);
-
- /* reenable the fifo caches */
- NV_WRITE(NV03_PFIFO_CACHES, 1);
-
- DRM_INFO("%s: initialised FIFO %d\n", __func__, channel);
- *chan_ret = chan;
- return 0;
-}
-
-int
-nouveau_channel_idle(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- uint32_t caches;
- int idle;
-
- caches = NV_READ(NV03_PFIFO_CACHES);
- NV_WRITE(NV03_PFIFO_CACHES, caches & ~1);
-
- if (engine->fifo.channel_id(dev) != chan->id) {
- struct nouveau_gpuobj *ramfc = chan->ramfc->gpuobj;
-
- if (INSTANCE_RD(ramfc, 0) != INSTANCE_RD(ramfc, 1))
- idle = 0;
- else
- idle = 1;
- } else {
- idle = (NV_READ(NV04_PFIFO_CACHE1_DMA_GET) ==
- NV_READ(NV04_PFIFO_CACHE1_DMA_PUT));
- }
-
- NV_WRITE(NV03_PFIFO_CACHES, caches);
- return idle;
-}
-
-/* stops a fifo */
-void nouveau_fifo_free(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- uint64_t t_start;
-
- DRM_INFO("%s: freeing fifo %d\n", __func__, chan->id);
-
- /* Give the channel a chance to idle, wait 2s (hopefully) */
- t_start = engine->timer.read(dev);
- while (!nouveau_channel_idle(chan)) {
- if (engine->timer.read(dev) - t_start > 2000000000ULL) {
- DRM_ERROR("Failed to idle channel %d before destroy."
- "Prepare for strangeness..\n", chan->id);
- break;
- }
- }
-
- /*XXX: Maybe should wait for PGRAPH to finish with the stuff it fetched
- * from CACHE1 too?
- */
-
- /* disable the fifo caches */
- NV_WRITE(NV03_PFIFO_CACHES, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH, NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH)&(~0x1));
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000000);
-
- // FIXME XXX needs more code
-
- engine->fifo.destroy_context(chan);
-
- /* Cleanup PGRAPH state */
- engine->graph.destroy_context(chan);
-
- /* reenable the fifo caches */
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH,
- NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH) | 1);
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000001);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000001);
- NV_WRITE(NV03_PFIFO_CACHES, 0x00000001);
-
- /* Deallocate push buffer */
- nouveau_gpuobj_ref_del(dev, &chan->pushbuf);
- if (chan->pushbuf_mem) {
- nouveau_mem_free(dev, chan->pushbuf_mem);
- chan->pushbuf_mem = NULL;
- }
-
- /* Destroy objects belonging to the channel */
- nouveau_gpuobj_channel_takedown(chan);
-
- nouveau_notifier_takedown_channel(chan);
-
- dev_priv->fifos[chan->id] = NULL;
- dev_priv->fifo_alloc_count--;
- drm_free(chan, sizeof(*chan), DRM_MEM_DRIVER);
-}
-
-/* cleanups all the fifos from file_priv */
-void nouveau_fifo_cleanup(struct drm_device *dev, struct drm_file *file_priv)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- int i;
-
- DRM_DEBUG("clearing FIFO enables from file_priv\n");
- for(i = 0; i < engine->fifo.channels; i++) {
- struct nouveau_channel *chan = dev_priv->fifos[i];
-
- if (chan && chan->file_priv == file_priv)
- nouveau_fifo_free(chan);
- }
-}
-
-int
-nouveau_fifo_owner(struct drm_device *dev, struct drm_file *file_priv,
- int channel)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
-
- if (channel >= engine->fifo.channels)
- return 0;
- if (dev_priv->fifos[channel] == NULL)
- return 0;
- return (dev_priv->fifos[channel]->file_priv == file_priv);
-}
-
-/***********************************
- * ioctls wrapping the functions
- ***********************************/
-
-static int nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_nouveau_channel_alloc *init = data;
- struct drm_map_list *entry;
- struct nouveau_channel *chan;
- struct mem_block *pushbuf;
- int res;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
-
- if (init->fb_ctxdma_handle == ~0 || init->tt_ctxdma_handle == ~0)
- return -EINVAL;
-
- pushbuf = nouveau_fifo_user_pushbuf_alloc(dev);
- if (!pushbuf)
- return -ENOMEM;
-
- res = nouveau_fifo_alloc(dev, &chan, file_priv, pushbuf,
- init->fb_ctxdma_handle,
- init->tt_ctxdma_handle);
- if (res)
- return res;
- init->channel = chan->id;
- init->put_base = chan->pushbuf_base;
-
- /* make the fifo available to user space */
- /* first, the fifo control regs */
- init->ctrl = dev_priv->mmio->offset + chan->user;
- init->ctrl_size = chan->user_size;
- res = drm_addmap(dev, init->ctrl, init->ctrl_size, _DRM_REGISTERS,
- 0, &chan->regs);
- if (res != 0)
- return res;
-
- entry = drm_find_matching_map(dev, chan->regs);
- if (!entry)
- return -EINVAL;
- init->ctrl = entry->user_token;
-
- /* pass back FIFO map info to the caller */
- init->cmdbuf = chan->pushbuf_mem->map_handle;
- init->cmdbuf_size = chan->pushbuf_mem->size;
-
- /* and the notifier block */
- init->notifier = chan->notifier_block->map_handle;
- init->notifier_size = chan->notifier_block->size;
-
- return 0;
-}
-
-static int nouveau_ioctl_fifo_free(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_nouveau_channel_free *cfree = data;
- struct nouveau_channel *chan;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
- NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(cfree->channel, file_priv, chan);
-
- nouveau_fifo_free(chan);
- return 0;
-}
-
-/***********************************
- * finally, the ioctl table
- ***********************************/
-
-struct drm_ioctl_desc nouveau_ioctls[] = {
- DRM_IOCTL_DEF(DRM_NOUVEAU_CARD_INIT, nouveau_ioctl_card_init, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_GETPARAM, nouveau_ioctl_getparam, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_SETPARAM, nouveau_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_NOUVEAU_CHANNEL_ALLOC, nouveau_ioctl_fifo_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_CHANNEL_FREE, nouveau_ioctl_fifo_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_GROBJ_ALLOC, nouveau_ioctl_grobj_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_ioctl_notifier_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_GPUOBJ_FREE, nouveau_ioctl_gpuobj_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_MEM_ALLOC, nouveau_ioctl_mem_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_MEM_FREE, nouveau_ioctl_mem_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_MEM_TILE, nouveau_ioctl_mem_tile, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_SUSPEND, nouveau_ioctl_suspend, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_NOUVEAU_RESUME, nouveau_ioctl_resume, DRM_AUTH),
-};
-
-int nouveau_max_ioctl = DRM_ARRAY_SIZE(nouveau_ioctls);
+++ /dev/null
-/*
- * Copyright (C) 2006 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/*
- * Authors:
- * Ben Skeggs <darktama@iinet.net.au>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_reg.h"
-#include "nouveau_swmthd.h"
-
-void
-nouveau_irq_preinstall(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- /* Master disable */
- NV_WRITE(NV03_PMC_INTR_EN_0, 0);
-}
-
-int
-nouveau_irq_postinstall(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- /* Master enable */
- NV_WRITE(NV03_PMC_INTR_EN_0, NV_PMC_INTR_EN_0_MASTER_ENABLE);
-
- return 0;
-}
-
-void
-nouveau_irq_uninstall(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- /* Master disable */
- NV_WRITE(NV03_PMC_INTR_EN_0, 0);
-}
-
-static void
-nouveau_fifo_irq_handler(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- uint32_t status, reassign;
-
- reassign = NV_READ(NV03_PFIFO_CACHES) & 1;
- while ((status = NV_READ(NV03_PFIFO_INTR_0))) {
- uint32_t chid, get;
-
- NV_WRITE(NV03_PFIFO_CACHES, 0);
-
- chid = engine->fifo.channel_id(dev);
- get = NV_READ(NV03_PFIFO_CACHE1_GET);
-
- if (status & NV_PFIFO_INTR_CACHE_ERROR) {
- uint32_t mthd, data;
- int ptr;
-
- ptr = get >> 2;
- if (dev_priv->card_type < NV_40) {
- mthd = NV_READ(NV04_PFIFO_CACHE1_METHOD(ptr));
- data = NV_READ(NV04_PFIFO_CACHE1_DATA(ptr));
- } else {
- mthd = NV_READ(NV40_PFIFO_CACHE1_METHOD(ptr));
- data = NV_READ(NV40_PFIFO_CACHE1_DATA(ptr));
- }
-
- DRM_INFO("PFIFO_CACHE_ERROR - "
- "Ch %d/%d Mthd 0x%04x Data 0x%08x\n",
- chid, (mthd >> 13) & 7, mthd & 0x1ffc, data);
-
- NV_WRITE(NV03_PFIFO_CACHE1_GET, get + 4);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 1);
-
- status &= ~NV_PFIFO_INTR_CACHE_ERROR;
- NV_WRITE(NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR);
- }
-
- if (status & NV_PFIFO_INTR_DMA_PUSHER) {
- DRM_INFO("PFIFO_DMA_PUSHER - Ch %d\n", chid);
-
- status &= ~NV_PFIFO_INTR_DMA_PUSHER;
- NV_WRITE(NV03_PFIFO_INTR_0, NV_PFIFO_INTR_DMA_PUSHER);
-
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE, 0x00000000);
- if (NV_READ(NV04_PFIFO_CACHE1_DMA_PUT) != get)
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET, get + 4);
- }
-
- if (status) {
- DRM_INFO("Unhandled PFIFO_INTR - 0x%08x\n", status);
- NV_WRITE(NV03_PFIFO_INTR_0, status);
- NV_WRITE(NV03_PMC_INTR_EN_0, 0);
- }
-
- NV_WRITE(NV03_PFIFO_CACHES, reassign);
- }
-
- NV_WRITE(NV03_PMC_INTR_0, NV_PMC_INTR_0_PFIFO_PENDING);
-}
-
-struct nouveau_bitfield_names {
- uint32_t mask;
- const char * name;
-};
-
-static struct nouveau_bitfield_names nouveau_nstatus_names[] =
-{
- { NV04_PGRAPH_NSTATUS_STATE_IN_USE, "STATE_IN_USE" },
- { NV04_PGRAPH_NSTATUS_INVALID_STATE, "INVALID_STATE" },
- { NV04_PGRAPH_NSTATUS_BAD_ARGUMENT, "BAD_ARGUMENT" },
- { NV04_PGRAPH_NSTATUS_PROTECTION_FAULT, "PROTECTION_FAULT" }
-};
-
-static struct nouveau_bitfield_names nouveau_nstatus_names_nv10[] =
-{
- { NV10_PGRAPH_NSTATUS_STATE_IN_USE, "STATE_IN_USE" },
- { NV10_PGRAPH_NSTATUS_INVALID_STATE, "INVALID_STATE" },
- { NV10_PGRAPH_NSTATUS_BAD_ARGUMENT, "BAD_ARGUMENT" },
- { NV10_PGRAPH_NSTATUS_PROTECTION_FAULT, "PROTECTION_FAULT" }
-};
-
-static struct nouveau_bitfield_names nouveau_nsource_names[] =
-{
- { NV03_PGRAPH_NSOURCE_NOTIFICATION, "NOTIFICATION" },
- { NV03_PGRAPH_NSOURCE_DATA_ERROR, "DATA_ERROR" },
- { NV03_PGRAPH_NSOURCE_PROTECTION_ERROR, "PROTECTION_ERROR" },
- { NV03_PGRAPH_NSOURCE_RANGE_EXCEPTION, "RANGE_EXCEPTION" },
- { NV03_PGRAPH_NSOURCE_LIMIT_COLOR, "LIMIT_COLOR" },
- { NV03_PGRAPH_NSOURCE_LIMIT_ZETA, "LIMIT_ZETA" },
- { NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD, "ILLEGAL_MTHD" },
- { NV03_PGRAPH_NSOURCE_DMA_R_PROTECTION, "DMA_R_PROTECTION" },
- { NV03_PGRAPH_NSOURCE_DMA_W_PROTECTION, "DMA_W_PROTECTION" },
- { NV03_PGRAPH_NSOURCE_FORMAT_EXCEPTION, "FORMAT_EXCEPTION" },
- { NV03_PGRAPH_NSOURCE_PATCH_EXCEPTION, "PATCH_EXCEPTION" },
- { NV03_PGRAPH_NSOURCE_STATE_INVALID, "STATE_INVALID" },
- { NV03_PGRAPH_NSOURCE_DOUBLE_NOTIFY, "DOUBLE_NOTIFY" },
- { NV03_PGRAPH_NSOURCE_NOTIFY_IN_USE, "NOTIFY_IN_USE" },
- { NV03_PGRAPH_NSOURCE_METHOD_CNT, "METHOD_CNT" },
- { NV03_PGRAPH_NSOURCE_BFR_NOTIFICATION, "BFR_NOTIFICATION" },
- { NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION, "DMA_VTX_PROTECTION" },
- { NV03_PGRAPH_NSOURCE_DMA_WIDTH_A, "DMA_WIDTH_A" },
- { NV03_PGRAPH_NSOURCE_DMA_WIDTH_B, "DMA_WIDTH_B" },
-};
-
-static void
-nouveau_print_bitfield_names(uint32_t value,
- const struct nouveau_bitfield_names *namelist,
- const int namelist_len)
-{
- int i;
- for(i=0; i<namelist_len; ++i) {
- uint32_t mask = namelist[i].mask;
- if(value & mask) {
- printk(" %s", namelist[i].name);
- value &= ~mask;
- }
- }
- if(value)
- printk(" (unknown bits 0x%08x)", value);
-}
-
-static int
-nouveau_graph_chid_from_grctx(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t inst;
- int i;
-
- if (dev_priv->card_type < NV_40)
- return dev_priv->Engine.fifo.channels;
- else
- if (dev_priv->card_type < NV_50)
- inst = (NV_READ(0x40032c) & 0xfffff) << 4;
- else
- inst = NV_READ(0x40032c) & 0xfffff;
-
- for (i = 0; i < dev_priv->Engine.fifo.channels; i++) {
- struct nouveau_channel *chan = dev_priv->fifos[i];
-
- if (!chan || !chan->ramin_grctx)
- continue;
-
- if (dev_priv->card_type < NV_50) {
- if (inst == chan->ramin_grctx->instance)
- break;
- } else {
- if (inst == INSTANCE_RD(chan->ramin_grctx->gpuobj, 0))
- break;
- }
- }
-
- return i;
-}
-
-static int
-nouveau_graph_trapped_channel(struct drm_device *dev, int *channel_ret)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- int channel;
-
- if (dev_priv->card_type < NV_10)
- channel = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 24) & 0xf;
- else
- if (dev_priv->card_type < NV_40)
- channel = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 20) & 0x1f;
- else
- channel = nouveau_graph_chid_from_grctx(dev);
-
- if (channel >= engine->fifo.channels || !dev_priv->fifos[channel]) {
- DRM_ERROR("AIII, invalid/inactive channel id %d\n", channel);
- return -EINVAL;
- }
-
- *channel_ret = channel;
- return 0;
-}
-
-struct nouveau_pgraph_trap {
- int channel;
- int class;
- int subc, mthd, size;
- uint32_t data, data2;
- uint32_t nsource, nstatus;
-};
-
-static void
-nouveau_graph_trap_info(struct drm_device *dev,
- struct nouveau_pgraph_trap *trap)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t address;
-
- trap->nsource = trap->nstatus = 0;
- if (dev_priv->card_type < NV_50) {
- trap->nsource = NV_READ(NV03_PGRAPH_NSOURCE);
- trap->nstatus = NV_READ(NV03_PGRAPH_NSTATUS);
- }
-
- if (nouveau_graph_trapped_channel(dev, &trap->channel))
- trap->channel = -1;
- address = NV_READ(NV04_PGRAPH_TRAPPED_ADDR);
-
- trap->mthd = address & 0x1FFC;
- trap->data = NV_READ(NV04_PGRAPH_TRAPPED_DATA);
- if (dev_priv->card_type < NV_10) {
- trap->subc = (address >> 13) & 0x7;
- } else {
- trap->subc = (address >> 16) & 0x7;
- trap->data2 = NV_READ(NV10_PGRAPH_TRAPPED_DATA_HIGH);
- }
-
- if (dev_priv->card_type < NV_10) {
- trap->class = NV_READ(0x400180 + trap->subc*4) & 0xFF;
- } else if (dev_priv->card_type < NV_40) {
- trap->class = NV_READ(0x400160 + trap->subc*4) & 0xFFF;
- } else if (dev_priv->card_type < NV_50) {
- trap->class = NV_READ(0x400160 + trap->subc*4) & 0xFFFF;
- } else {
- trap->class = NV_READ(0x400814);
- }
-}
-
-static void
-nouveau_graph_dump_trap_info(struct drm_device *dev, const char *id,
- struct nouveau_pgraph_trap *trap)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t nsource = trap->nsource, nstatus = trap->nstatus;
-
- DRM_INFO("%s - nSource:", id);
- nouveau_print_bitfield_names(nsource, nouveau_nsource_names,
- ARRAY_SIZE(nouveau_nsource_names));
- printk(", nStatus:");
- if (dev_priv->card_type < NV_10)
- nouveau_print_bitfield_names(nstatus, nouveau_nstatus_names,
- ARRAY_SIZE(nouveau_nstatus_names));
- else
- nouveau_print_bitfield_names(nstatus, nouveau_nstatus_names_nv10,
- ARRAY_SIZE(nouveau_nstatus_names_nv10));
- printk("\n");
-
- DRM_INFO("%s - Ch %d/%d Class 0x%04x Mthd 0x%04x Data 0x%08x:0x%08x\n",
- id, trap->channel, trap->subc, trap->class, trap->mthd,
- trap->data2, trap->data);
-}
-
-static inline void
-nouveau_pgraph_intr_notify(struct drm_device *dev, uint32_t nsource)
-{
- struct nouveau_pgraph_trap trap;
- int unhandled = 0;
-
- nouveau_graph_trap_info(dev, &trap);
-
- if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) {
- /* NV4 (nvidia TNT 1) reports software methods with
- * PGRAPH NOTIFY ILLEGAL_MTHD
- */
- DRM_DEBUG("Got NV04 software method method %x for class %#x\n",
- trap.mthd, trap.class);
-
- if (nouveau_sw_method_execute(dev, trap.class, trap.mthd)) {
- DRM_ERROR("Unable to execute NV04 software method %x "
- "for object class %x. Please report.\n",
- trap.mthd, trap.class);
- unhandled = 1;
- }
- } else {
- unhandled = 1;
- }
-
- if (unhandled)
- nouveau_graph_dump_trap_info(dev, "PGRAPH_NOTIFY", &trap);
-}
-
-static inline void
-nouveau_pgraph_intr_error(struct drm_device *dev, uint32_t nsource)
-{
- struct nouveau_pgraph_trap trap;
- int unhandled = 0;
-
- nouveau_graph_trap_info(dev, &trap);
- trap.nsource = nsource;
-
- if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) {
- if (trap.channel >= 0 && trap.mthd == 0x0150) {
- nouveau_fence_handler(dev, trap.channel);
- } else
- if (nouveau_sw_method_execute(dev, trap.class, trap.mthd)) {
- unhandled = 1;
- }
- } else {
- unhandled = 1;
- }
-
- if (unhandled)
- nouveau_graph_dump_trap_info(dev, "PGRAPH_ERROR", &trap);
-}
-
-static inline void
-nouveau_pgraph_intr_context_switch(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- uint32_t chid;
-
- chid = engine->fifo.channel_id(dev);
- DRM_DEBUG("PGRAPH context switch interrupt channel %x\n", chid);
-
- switch(dev_priv->card_type) {
- case NV_04:
- case NV_05:
- nouveau_nv04_context_switch(dev);
- break;
- case NV_10:
- case NV_11:
- case NV_17:
- nouveau_nv10_context_switch(dev);
- break;
- default:
- DRM_ERROR("Context switch not implemented\n");
- break;
- }
-}
-
-static void
-nouveau_pgraph_irq_handler(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t status;
-
- while ((status = NV_READ(NV03_PGRAPH_INTR))) {
- uint32_t nsource = NV_READ(NV03_PGRAPH_NSOURCE);
-
- if (status & NV_PGRAPH_INTR_NOTIFY) {
- nouveau_pgraph_intr_notify(dev, nsource);
-
- status &= ~NV_PGRAPH_INTR_NOTIFY;
- NV_WRITE(NV03_PGRAPH_INTR, NV_PGRAPH_INTR_NOTIFY);
- }
-
- if (status & NV_PGRAPH_INTR_ERROR) {
- nouveau_pgraph_intr_error(dev, nsource);
-
- status &= ~NV_PGRAPH_INTR_ERROR;
- NV_WRITE(NV03_PGRAPH_INTR, NV_PGRAPH_INTR_ERROR);
- }
-
- if (status & NV_PGRAPH_INTR_CONTEXT_SWITCH) {
- nouveau_pgraph_intr_context_switch(dev);
-
- status &= ~NV_PGRAPH_INTR_CONTEXT_SWITCH;
- NV_WRITE(NV03_PGRAPH_INTR,
- NV_PGRAPH_INTR_CONTEXT_SWITCH);
- }
-
- if (status) {
- DRM_INFO("Unhandled PGRAPH_INTR - 0x%08x\n", status);
- NV_WRITE(NV03_PGRAPH_INTR, status);
- }
-
- if ((NV_READ(NV04_PGRAPH_FIFO) & (1 << 0)) == 0)
- NV_WRITE(NV04_PGRAPH_FIFO, 1);
- }
-
- NV_WRITE(NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING);
-}
-
-static void
-nv50_pgraph_irq_handler(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t status, nsource;
-
- status = NV_READ(NV03_PGRAPH_INTR);
- nsource = NV_READ(NV03_PGRAPH_NSOURCE);
-
- if (status & 0x00000020) {
- nouveau_pgraph_intr_error(dev,
- NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD);
-
- status &= ~0x00000020;
- NV_WRITE(NV03_PGRAPH_INTR, 0x00000020);
- }
-
- if (status & 0x00100000) {
- nouveau_pgraph_intr_error(dev,
- NV03_PGRAPH_NSOURCE_DATA_ERROR);
-
- status &= ~0x00100000;
- NV_WRITE(NV03_PGRAPH_INTR, 0x00100000);
- }
-
- if (status & 0x00200000) {
- int r;
-
- nouveau_pgraph_intr_error(dev, nsource |
- NV03_PGRAPH_NSOURCE_PROTECTION_ERROR);
-
- DRM_ERROR("magic set 1:\n");
- for (r = 0x408900; r <= 0x408910; r += 4)
- DRM_ERROR("\t0x%08x: 0x%08x\n", r, NV_READ(r));
- NV_WRITE(0x408900, NV_READ(0x408904) | 0xc0000000);
- for (r = 0x408e08; r <= 0x408e24; r += 4)
- DRM_ERROR("\t0x%08x: 0x%08x\n", r, NV_READ(r));
- NV_WRITE(0x408e08, NV_READ(0x408e08) | 0xc0000000);
-
- DRM_ERROR("magic set 2:\n");
- for (r = 0x409900; r <= 0x409910; r += 4)
- DRM_ERROR("\t0x%08x: 0x%08x\n", r, NV_READ(r));
- NV_WRITE(0x409900, NV_READ(0x409904) | 0xc0000000);
- for (r = 0x409e08; r <= 0x409e24; r += 4)
- DRM_ERROR("\t0x%08x: 0x%08x\n", r, NV_READ(r));
- NV_WRITE(0x409e08, NV_READ(0x409e08) | 0xc0000000);
-
- status &= ~0x00200000;
- NV_WRITE(NV03_PGRAPH_NSOURCE, nsource);
- NV_WRITE(NV03_PGRAPH_INTR, 0x00200000);
- }
-
- if (status) {
- DRM_INFO("Unhandled PGRAPH_INTR - 0x%08x\n", status);
- NV_WRITE(NV03_PGRAPH_INTR, status);
- }
-
- {
- const int isb = (1 << 16) | (1 << 0);
-
- if ((NV_READ(0x400500) & isb) != isb)
- NV_WRITE(0x400500, NV_READ(0x400500) | isb);
- }
-
- NV_WRITE(NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING);
-}
-
-static void
-nouveau_crtc_irq_handler(struct drm_device *dev, int crtc)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- if (crtc&1) {
- NV_WRITE(NV_CRTC0_INTSTAT, NV_CRTC_INTR_VBLANK);
- }
-
- if (crtc&2) {
- NV_WRITE(NV_CRTC1_INTSTAT, NV_CRTC_INTR_VBLANK);
- }
-}
-
-static void
-nouveau_nv50_display_irq_handler(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t val = NV_READ(NV50_DISPLAY_SUPERVISOR);
-
- DRM_INFO("NV50_DISPLAY_INTR - 0x%08X\n", val);
-
- NV_WRITE(NV50_DISPLAY_SUPERVISOR, val);
-}
-
-static void
-nouveau_nv50_i2c_irq_handler(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_INFO("NV50_I2C_INTR - 0x%08X\n", NV_READ(NV50_I2C_CONTROLLER));
-
- /* This seems to be the way to acknowledge an interrupt. */
- NV_WRITE(NV50_I2C_CONTROLLER, 0x7FFF7FFF);
-}
-
-irqreturn_t
-nouveau_irq_handler(DRM_IRQ_ARGS)
-{
- struct drm_device *dev = (struct drm_device*)arg;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t status;
-
- status = NV_READ(NV03_PMC_INTR_0);
- if (!status)
- return IRQ_NONE;
-
- if (status & NV_PMC_INTR_0_PFIFO_PENDING) {
- nouveau_fifo_irq_handler(dev);
- status &= ~NV_PMC_INTR_0_PFIFO_PENDING;
- }
-
- if (status & NV_PMC_INTR_0_PGRAPH_PENDING) {
- if (dev_priv->card_type >= NV_50)
- nv50_pgraph_irq_handler(dev);
- else
- nouveau_pgraph_irq_handler(dev);
-
- status &= ~NV_PMC_INTR_0_PGRAPH_PENDING;
- }
-
- if (status & NV_PMC_INTR_0_CRTCn_PENDING) {
- nouveau_crtc_irq_handler(dev, (status>>24)&3);
- status &= ~NV_PMC_INTR_0_CRTCn_PENDING;
- }
-
- if (status & NV_PMC_INTR_0_NV50_DISPLAY_PENDING) {
- nouveau_nv50_display_irq_handler(dev);
- status &= ~NV_PMC_INTR_0_NV50_DISPLAY_PENDING;
- }
-
- if (status & NV_PMC_INTR_0_NV50_I2C_PENDING) {
- nouveau_nv50_i2c_irq_handler(dev);
- status &= ~NV_PMC_INTR_0_NV50_I2C_PENDING;
- }
-
- if (status)
- DRM_ERROR("Unhandled PMC INTR status bits 0x%08x\n", status);
-
- return IRQ_HANDLED;
-}
+++ /dev/null
-/*
- * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
- * Copyright 2005 Stephane Marchesin
- *
- * The Weather Channel (TM) funded Tungsten Graphics to develop the
- * initial release of the Radeon 8500 driver under the XFree86 license.
- * This notice must be preserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
- */
-
-
-#include "drmP.h"
-#include "drm.h"
-#include "drm_sarea.h"
-#include "nouveau_drv.h"
-
-static struct mem_block *
-split_block(struct mem_block *p, uint64_t start, uint64_t size,
- struct drm_file *file_priv)
-{
- /* Maybe cut off the start of an existing block */
- if (start > p->start) {
- struct mem_block *newblock =
- drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
- if (!newblock)
- goto out;
- newblock->start = start;
- newblock->size = p->size - (start - p->start);
- newblock->file_priv = NULL;
- newblock->next = p->next;
- newblock->prev = p;
- p->next->prev = newblock;
- p->next = newblock;
- p->size -= newblock->size;
- p = newblock;
- }
-
- /* Maybe cut off the end of an existing block */
- if (size < p->size) {
- struct mem_block *newblock =
- drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
- if (!newblock)
- goto out;
- newblock->start = start + size;
- newblock->size = p->size - size;
- newblock->file_priv = NULL;
- newblock->next = p->next;
- newblock->prev = p;
- p->next->prev = newblock;
- p->next = newblock;
- p->size = size;
- }
-
-out:
- /* Our block is in the middle */
- p->file_priv = file_priv;
- return p;
-}
-
-struct mem_block *
-nouveau_mem_alloc_block(struct mem_block *heap, uint64_t size,
- int align2, struct drm_file *file_priv, int tail)
-{
- struct mem_block *p;
- uint64_t mask = (1 << align2) - 1;
-
- if (!heap)
- return NULL;
-
- if (tail) {
- list_for_each_prev(p, heap) {
- uint64_t start = ((p->start + p->size) - size) & ~mask;
-
- if (p->file_priv == 0 && start >= p->start &&
- start + size <= p->start + p->size)
- return split_block(p, start, size, file_priv);
- }
- } else {
- list_for_each(p, heap) {
- uint64_t start = (p->start + mask) & ~mask;
-
- if (p->file_priv == 0 &&
- start + size <= p->start + p->size)
- return split_block(p, start, size, file_priv);
- }
- }
-
- return NULL;
-}
-
-static struct mem_block *find_block(struct mem_block *heap, uint64_t start)
-{
- struct mem_block *p;
-
- list_for_each(p, heap)
- if (p->start == start)
- return p;
-
- return NULL;
-}
-
-void nouveau_mem_free_block(struct mem_block *p)
-{
- p->file_priv = NULL;
-
- /* Assumes a single contiguous range. Needs a special file_priv in
- * 'heap' to stop it being subsumed.
- */
- if (p->next->file_priv == 0) {
- struct mem_block *q = p->next;
- p->size += q->size;
- p->next = q->next;
- p->next->prev = p;
- drm_free(q, sizeof(*q), DRM_MEM_BUFS);
- }
-
- if (p->prev->file_priv == 0) {
- struct mem_block *q = p->prev;
- q->size += p->size;
- q->next = p->next;
- q->next->prev = q;
- drm_free(p, sizeof(*q), DRM_MEM_BUFS);
- }
-}
-
-/* Initialize. How to check for an uninitialized heap?
- */
-int nouveau_mem_init_heap(struct mem_block **heap, uint64_t start,
- uint64_t size)
-{
- struct mem_block *blocks = drm_alloc(sizeof(*blocks), DRM_MEM_BUFS);
-
- if (!blocks)
- return -ENOMEM;
-
- *heap = drm_alloc(sizeof(**heap), DRM_MEM_BUFS);
- if (!*heap) {
- drm_free(blocks, sizeof(*blocks), DRM_MEM_BUFS);
- return -ENOMEM;
- }
-
- blocks->start = start;
- blocks->size = size;
- blocks->file_priv = NULL;
- blocks->next = blocks->prev = *heap;
-
- memset(*heap, 0, sizeof(**heap));
- (*heap)->file_priv = (struct drm_file *) - 1;
- (*heap)->next = (*heap)->prev = blocks;
- return 0;
-}
-
-/*
- * Free all blocks associated with the releasing file_priv
- */
-void nouveau_mem_release(struct drm_file *file_priv, struct mem_block *heap)
-{
- struct mem_block *p;
-
- if (!heap || !heap->next)
- return;
-
- list_for_each(p, heap) {
- if (p->file_priv == file_priv)
- p->file_priv = NULL;
- }
-
- /* Assumes a single contiguous range. Needs a special file_priv in
- * 'heap' to stop it being subsumed.
- */
- list_for_each(p, heap) {
- while ((p->file_priv == 0) && (p->next->file_priv == 0) &&
- (p->next!=heap)) {
- struct mem_block *q = p->next;
- p->size += q->size;
- p->next = q->next;
- p->next->prev = p;
- drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
- }
- }
-}
-
-/*
- * Cleanup everything
- */
-void nouveau_mem_takedown(struct mem_block **heap)
-{
- struct mem_block *p;
-
- if (!*heap)
- return;
-
- for (p = (*heap)->next; p != *heap;) {
- struct mem_block *q = p;
- p = p->next;
- drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
- }
-
- drm_free(*heap, sizeof(**heap), DRM_MEM_DRIVER);
- *heap = NULL;
-}
-
-void nouveau_mem_close(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- nouveau_mem_takedown(&dev_priv->agp_heap);
- nouveau_mem_takedown(&dev_priv->fb_heap);
- if (dev_priv->pci_heap)
- nouveau_mem_takedown(&dev_priv->pci_heap);
-}
-
-/*XXX BSD needs compat functions for pci access
- * #define DRM_PCI_DEV struct device
- * #define drm_pci_get_bsf pci_get_bsf
- * and a small inline to do *val = pci_read_config(pdev->device, where, 4);
- * might work
- */
-static int nforce_pci_fn_read_config_dword(int devfn, int where, uint32_t *val)
-{
-#ifdef __linux__
- DRM_PCI_DEV *pdev;
-
- if (!(pdev = drm_pci_get_bsf(0, 0, devfn))) {
- DRM_ERROR("nForce PCI device function 0x%02x not found\n",
- devfn);
- return -ENODEV;
- }
-
- return drm_pci_read_config_dword(pdev, where, val);
-#else
- DRM_ERROR("BSD compat for checking IGP memory amount needed\n");
- return 0;
-#endif
-}
-
-static void nouveau_mem_check_nforce_dimms(struct drm_device *dev)
-{
- uint32_t mem_ctrlr_pciid;
-
- nforce_pci_fn_read_config_dword(3, 0x00, &mem_ctrlr_pciid);
- mem_ctrlr_pciid >>= 16;
-
- if (mem_ctrlr_pciid == 0x01a9 || mem_ctrlr_pciid == 0x01ab ||
- mem_ctrlr_pciid == 0x01ed) {
- uint32_t dimm[3];
- int i;
-
- for (i = 0; i < 3; i++) {
- nforce_pci_fn_read_config_dword(2, 0x40 + i * 4, &dimm[i]);
- dimm[i] = (dimm[i] >> 8) & 0x4f;
- }
-
- if (dimm[0] + dimm[1] != dimm[2])
- DRM_INFO("Your nForce DIMMs are not arranged in "
- "optimal banks!\n");
- }
-}
-
-static uint32_t
-nouveau_mem_fb_amount_igp(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t mem = 0;
-
- if (dev_priv->flags & NV_NFORCE) {
- nforce_pci_fn_read_config_dword(1, 0x7C, &mem);
- return (uint64_t)(((mem >> 6) & 31) + 1)*1024*1024;
- }
- if (dev_priv->flags & NV_NFORCE2) {
- nforce_pci_fn_read_config_dword(1, 0x84, &mem);
- return (uint64_t)(((mem >> 4) & 127) + 1)*1024*1024;
- }
-
- DRM_ERROR("impossible!\n");
-
- return 0;
-}
-
-/* returns the amount of FB ram in bytes */
-uint64_t nouveau_mem_fb_amount(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv=dev->dev_private;
- switch(dev_priv->card_type)
- {
- case NV_04:
- case NV_05:
- if (NV_READ(NV03_BOOT_0) & 0x00000100) {
- return (((NV_READ(NV03_BOOT_0) >> 12) & 0xf)*2+2)*1024*1024;
- } else
- switch(NV_READ(NV03_BOOT_0)&NV03_BOOT_0_RAM_AMOUNT)
- {
- case NV04_BOOT_0_RAM_AMOUNT_32MB:
- return 32*1024*1024;
- case NV04_BOOT_0_RAM_AMOUNT_16MB:
- return 16*1024*1024;
- case NV04_BOOT_0_RAM_AMOUNT_8MB:
- return 8*1024*1024;
- case NV04_BOOT_0_RAM_AMOUNT_4MB:
- return 4*1024*1024;
- }
- break;
- case NV_10:
- case NV_11:
- case NV_17:
- case NV_20:
- case NV_30:
- case NV_40:
- case NV_44:
- case NV_50:
- default:
- if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) {
- return nouveau_mem_fb_amount_igp(dev);
- } else {
- uint64_t mem;
-
- mem = (NV_READ(NV10_PFB_CSTATUS) &
- NV10_PFB_CSTATUS_RAM_AMOUNT_MB_MASK) >>
- NV10_PFB_CSTATUS_RAM_AMOUNT_MB_SHIFT;
- return mem*1024*1024;
- }
- break;
- }
-
- DRM_ERROR("Unable to detect video ram size. Please report your setup to " DRIVER_EMAIL "\n");
- return 0;
-}
-
-static void nouveau_mem_reset_agp(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable;
-
- saved_pci_nv_1 = NV_READ(NV04_PBUS_PCI_NV_1);
- saved_pci_nv_19 = NV_READ(NV04_PBUS_PCI_NV_19);
-
- /* clear busmaster bit */
- NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~0x4);
- /* clear SBA and AGP bits */
- NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff0ff);
-
- /* power cycle pgraph, if enabled */
- pmc_enable = NV_READ(NV03_PMC_ENABLE);
- if (pmc_enable & NV_PMC_ENABLE_PGRAPH) {
- NV_WRITE(NV03_PMC_ENABLE, pmc_enable & ~NV_PMC_ENABLE_PGRAPH);
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) |
- NV_PMC_ENABLE_PGRAPH);
- }
-
- /* and restore (gives effect of resetting AGP) */
- NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19);
- NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1);
-}
-
-static int
-nouveau_mem_init_agp(struct drm_device *dev, int ttm)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_agp_info info;
- struct drm_agp_mode mode;
- int ret;
-
- nouveau_mem_reset_agp(dev);
-
- ret = drm_agp_acquire(dev);
- if (ret) {
- DRM_ERROR("Unable to acquire AGP: %d\n", ret);
- return ret;
- }
-
- ret = drm_agp_info(dev, &info);
- if (ret) {
- DRM_ERROR("Unable to get AGP info: %d\n", ret);
- return ret;
- }
-
- /* see agp.h for the AGPSTAT_* modes available */
- mode.mode = info.mode;
- ret = drm_agp_enable(dev, mode);
- if (ret) {
- DRM_ERROR("Unable to enable AGP: %d\n", ret);
- return ret;
- }
-
- if (!ttm) {
- struct drm_agp_buffer agp_req;
- struct drm_agp_binding bind_req;
-
- agp_req.size = info.aperture_size;
- agp_req.type = 0;
- ret = drm_agp_alloc(dev, &agp_req);
- if (ret) {
- DRM_ERROR("Unable to alloc AGP: %d\n", ret);
- return ret;
- }
-
- bind_req.handle = agp_req.handle;
- bind_req.offset = 0;
- ret = drm_agp_bind(dev, &bind_req);
- if (ret) {
- DRM_ERROR("Unable to bind AGP: %d\n", ret);
- return ret;
- }
- }
-
- dev_priv->gart_info.type = NOUVEAU_GART_AGP;
- dev_priv->gart_info.aper_base = info.aperture_base;
- dev_priv->gart_info.aper_size = info.aperture_size;
- return 0;
-}
-
-#define HACK_OLD_MM
-int
-nouveau_mem_init_ttm(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t vram_size, bar1_size;
- int ret;
-
- dev_priv->agp_heap = dev_priv->pci_heap = dev_priv->fb_heap = NULL;
- dev_priv->fb_phys = drm_get_resource_start(dev,1);
- dev_priv->gart_info.type = NOUVEAU_GART_NONE;
-
- drm_bo_driver_init(dev);
-
- /* non-mappable vram */
- dev_priv->fb_available_size = nouveau_mem_fb_amount(dev);
- dev_priv->fb_available_size -= dev_priv->ramin_rsvd_vram;
- vram_size = dev_priv->fb_available_size >> PAGE_SHIFT;
- bar1_size = drm_get_resource_len(dev, 1) >> PAGE_SHIFT;
- if (bar1_size < vram_size) {
- if ((ret = drm_bo_init_mm(dev, DRM_BO_MEM_PRIV0,
- bar1_size, vram_size - bar1_size, 1))) {
- DRM_ERROR("Failed PRIV0 mm init: %d\n", ret);
- return ret;
- }
- vram_size = bar1_size;
- }
-
- /* mappable vram */
-#ifdef HACK_OLD_MM
- vram_size /= 4;
-#endif
- if ((ret = drm_bo_init_mm(dev, DRM_BO_MEM_VRAM, 0, vram_size, 1))) {
- DRM_ERROR("Failed VRAM mm init: %d\n", ret);
- return ret;
- }
-
- /* GART */
-#if !defined(__powerpc__) && !defined(__ia64__)
- if (drm_device_is_agp(dev) && dev->agp) {
- if ((ret = nouveau_mem_init_agp(dev, 1)))
- DRM_ERROR("Error initialising AGP: %d\n", ret);
- }
-#endif
-
- if (dev_priv->gart_info.type == NOUVEAU_GART_NONE) {
- if ((ret = nouveau_sgdma_init(dev)))
- DRM_ERROR("Error initialising PCI SGDMA: %d\n", ret);
- }
-
- if ((ret = drm_bo_init_mm(dev, DRM_BO_MEM_TT, 0,
- dev_priv->gart_info.aper_size >>
- PAGE_SHIFT, 1))) {
- DRM_ERROR("Failed TT mm init: %d\n", ret);
- return ret;
- }
-
-#ifdef HACK_OLD_MM
- vram_size <<= PAGE_SHIFT;
- DRM_INFO("Old MM using %dKiB VRAM\n", (vram_size * 3) >> 10);
- if (nouveau_mem_init_heap(&dev_priv->fb_heap, vram_size, vram_size * 3))
- return -ENOMEM;
-#endif
-
- return 0;
-}
-
-int nouveau_mem_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t fb_size;
- int ret = 0;
-
- dev_priv->agp_heap = dev_priv->pci_heap = dev_priv->fb_heap = NULL;
- dev_priv->fb_phys = 0;
- dev_priv->gart_info.type = NOUVEAU_GART_NONE;
-
- if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2))
- nouveau_mem_check_nforce_dimms(dev);
-
- /* setup a mtrr over the FB */
- dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1),
- nouveau_mem_fb_amount(dev),
- DRM_MTRR_WC);
-
- /* Init FB */
- dev_priv->fb_phys=drm_get_resource_start(dev,1);
- fb_size = nouveau_mem_fb_amount(dev);
- /* On G80, limit VRAM to 512MiB temporarily due to limits in how
- * we handle VRAM page tables.
- */
- if (dev_priv->card_type >= NV_50 && fb_size > (512 * 1024 * 1024))
- fb_size = (512 * 1024 * 1024);
- fb_size -= dev_priv->ramin_rsvd_vram;
- dev_priv->fb_available_size = fb_size;
- DRM_DEBUG("Available VRAM: %dKiB\n", fb_size>>10);
-
- if (fb_size>256*1024*1024) {
- /* On cards with > 256Mb, you can't map everything.
- * So we create a second FB heap for that type of memory */
- if (nouveau_mem_init_heap(&dev_priv->fb_heap,
- 0, 256*1024*1024))
- return -ENOMEM;
- if (nouveau_mem_init_heap(&dev_priv->fb_nomap_heap,
- 256*1024*1024, fb_size-256*1024*1024))
- return -ENOMEM;
- } else {
- if (nouveau_mem_init_heap(&dev_priv->fb_heap, 0, fb_size))
- return -ENOMEM;
- dev_priv->fb_nomap_heap=NULL;
- }
-
-#if !defined(__powerpc__) && !defined(__ia64__)
- /* Init AGP / NV50 PCIEGART */
- if (drm_device_is_agp(dev) && dev->agp) {
- if ((ret = nouveau_mem_init_agp(dev, 0)))
- DRM_ERROR("Error initialising AGP: %d\n", ret);
- }
-#endif
-
- /*Note: this is *not* just NV50 code, but only used on NV50 for now */
- if (dev_priv->gart_info.type == NOUVEAU_GART_NONE &&
- dev_priv->card_type >= NV_50) {
- ret = nouveau_sgdma_init(dev);
- if (!ret) {
- ret = nouveau_sgdma_nottm_hack_init(dev);
- if (ret)
- nouveau_sgdma_takedown(dev);
- }
-
- if (ret)
- DRM_ERROR("Error initialising SG DMA: %d\n", ret);
- }
-
- if (dev_priv->gart_info.type != NOUVEAU_GART_NONE) {
- if (nouveau_mem_init_heap(&dev_priv->agp_heap,
- 0, dev_priv->gart_info.aper_size)) {
- if (dev_priv->gart_info.type == NOUVEAU_GART_SGDMA) {
- nouveau_sgdma_nottm_hack_takedown(dev);
- nouveau_sgdma_takedown(dev);
- }
- }
- }
-
- /* NV04-NV40 PCIEGART */
- if (!dev_priv->agp_heap && dev_priv->card_type < NV_50) {
- struct drm_scatter_gather sgreq;
-
- DRM_DEBUG("Allocating sg memory for PCI DMA\n");
- sgreq.size = 16 << 20; //16MB of PCI scatter-gather zone
-
- if (drm_sg_alloc(dev, &sgreq)) {
- DRM_ERROR("Unable to allocate %ldMB of scatter-gather"
- " pages for PCI DMA!",sgreq.size>>20);
- } else {
- if (nouveau_mem_init_heap(&dev_priv->pci_heap, 0,
- dev->sg->pages * PAGE_SIZE)) {
- DRM_ERROR("Unable to initialize pci_heap!");
- }
- }
- }
-
- /* G8x: Allocate shared page table to map real VRAM pages into */
- if (dev_priv->card_type >= NV_50) {
- unsigned size = ((512 * 1024 * 1024) / 65536) * 8;
-
- ret = nouveau_gpuobj_new(dev, NULL, size, 0,
- NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ALLOW_NO_REFS,
- &dev_priv->vm_vram_pt);
- if (ret) {
- DRM_ERROR("Error creating VRAM page table: %d\n", ret);
- return ret;
- }
- }
-
-
- return 0;
-}
-
-struct mem_block *
-nouveau_mem_alloc(struct drm_device *dev, int alignment, uint64_t size,
- int flags, struct drm_file *file_priv)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct mem_block *block;
- int type, tail = !(flags & NOUVEAU_MEM_USER);
-
- /*
- * Make things easier on ourselves: all allocations are page-aligned.
- * We need that to map allocated regions into the user space
- */
- if (alignment < PAGE_SIZE)
- alignment = PAGE_SIZE;
-
- /* Align allocation sizes to 64KiB blocks on G8x. We use a 64KiB
- * page size in the GPU VM.
- */
- if (flags & NOUVEAU_MEM_FB && dev_priv->card_type >= NV_50) {
- size = (size + 65535) & ~65535;
- if (alignment < 65536)
- alignment = 65536;
- }
-
- /* Further down wants alignment in pages, not bytes */
- alignment >>= PAGE_SHIFT;
-
- /*
- * Warn about 0 sized allocations, but let it go through. It'll return 1 page
- */
- if (size == 0)
- DRM_INFO("warning : 0 byte allocation\n");
-
- /*
- * Keep alloc size a multiple of the page size to keep drm_addmap() happy
- */
- if (size & (~PAGE_MASK))
- size = ((size/PAGE_SIZE) + 1) * PAGE_SIZE;
-
-
-#define NOUVEAU_MEM_ALLOC_AGP {\
- type=NOUVEAU_MEM_AGP;\
- block = nouveau_mem_alloc_block(dev_priv->agp_heap, size,\
- alignment, file_priv, tail); \
- if (block) goto alloc_ok;\
- }
-
-#define NOUVEAU_MEM_ALLOC_PCI {\
- type = NOUVEAU_MEM_PCI;\
- block = nouveau_mem_alloc_block(dev_priv->pci_heap, size, \
- alignment, file_priv, tail); \
- if ( block ) goto alloc_ok;\
- }
-
-#define NOUVEAU_MEM_ALLOC_FB {\
- type=NOUVEAU_MEM_FB;\
- if (!(flags&NOUVEAU_MEM_MAPPED)) {\
- block = nouveau_mem_alloc_block(dev_priv->fb_nomap_heap,\
- size, alignment, \
- file_priv, tail); \
- if (block) goto alloc_ok;\
- }\
- block = nouveau_mem_alloc_block(dev_priv->fb_heap, size,\
- alignment, file_priv, tail);\
- if (block) goto alloc_ok;\
- }
-
-
- if (flags&NOUVEAU_MEM_FB) NOUVEAU_MEM_ALLOC_FB
- if (flags&NOUVEAU_MEM_AGP) NOUVEAU_MEM_ALLOC_AGP
- if (flags&NOUVEAU_MEM_PCI) NOUVEAU_MEM_ALLOC_PCI
- if (flags&NOUVEAU_MEM_FB_ACCEPTABLE) NOUVEAU_MEM_ALLOC_FB
- if (flags&NOUVEAU_MEM_AGP_ACCEPTABLE) NOUVEAU_MEM_ALLOC_AGP
- if (flags&NOUVEAU_MEM_PCI_ACCEPTABLE) NOUVEAU_MEM_ALLOC_PCI
-
-
- return NULL;
-
-alloc_ok:
- block->flags=type;
-
- /* On G8x, map memory into VM */
- if (block->flags & NOUVEAU_MEM_FB && dev_priv->card_type >= NV_50 &&
- !(flags & NOUVEAU_MEM_NOVM)) {
- struct nouveau_gpuobj *pt = dev_priv->vm_vram_pt;
- unsigned offset = block->start;
- unsigned count = block->size / 65536;
- unsigned tile = 0;
-
- if (!pt) {
- DRM_ERROR("vm alloc without vm pt\n");
- nouveau_mem_free_block(block);
- return NULL;
- }
-
- /* The tiling stuff is *not* what NVIDIA does - but both the
- * 2D and 3D engines seem happy with this simpler method.
- * Should look into why NVIDIA do what they do at some point.
- */
- if (flags & NOUVEAU_MEM_TILE) {
- if (flags & NOUVEAU_MEM_TILE_ZETA)
- tile = 0x00002800;
- else
- tile = 0x00007000;
- }
-
- while (count--) {
- unsigned pte = offset / 65536;
-
- INSTANCE_WR(pt, (pte * 2) + 0, offset | 1);
- INSTANCE_WR(pt, (pte * 2) + 1, 0x00000000 | tile);
- offset += 65536;
- }
- } else {
- block->flags |= NOUVEAU_MEM_NOVM;
- }
-
- if (flags&NOUVEAU_MEM_MAPPED)
- {
- struct drm_map_list *entry;
- int ret = 0;
- block->flags|=NOUVEAU_MEM_MAPPED;
-
- if (type == NOUVEAU_MEM_AGP) {
- if (dev_priv->gart_info.type != NOUVEAU_GART_SGDMA)
- ret = drm_addmap(dev, block->start, block->size,
- _DRM_AGP, 0, &block->map);
- else
- ret = drm_addmap(dev, block->start, block->size,
- _DRM_SCATTER_GATHER, 0, &block->map);
- }
- else if (type == NOUVEAU_MEM_FB)
- ret = drm_addmap(dev, block->start + dev_priv->fb_phys,
- block->size, _DRM_FRAME_BUFFER,
- 0, &block->map);
- else if (type == NOUVEAU_MEM_PCI)
- ret = drm_addmap(dev, block->start, block->size,
- _DRM_SCATTER_GATHER, 0, &block->map);
-
- if (ret) {
- nouveau_mem_free_block(block);
- return NULL;
- }
-
- entry = drm_find_matching_map(dev, block->map);
- if (!entry) {
- nouveau_mem_free_block(block);
- return NULL;
- }
- block->map_handle = entry->user_token;
- }
-
- DRM_DEBUG("allocated %lld bytes at 0x%llx type=0x%08x\n", block->size, block->start, block->flags);
- return block;
-}
-
-void nouveau_mem_free(struct drm_device* dev, struct mem_block* block)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("freeing 0x%llx type=0x%08x\n", block->start, block->flags);
-
- if (block->flags&NOUVEAU_MEM_MAPPED)
- drm_rmmap(dev, block->map);
-
- /* G8x: Remove pages from vm */
- if (block->flags & NOUVEAU_MEM_FB && dev_priv->card_type >= NV_50 &&
- !(block->flags & NOUVEAU_MEM_NOVM)) {
- struct nouveau_gpuobj *pt = dev_priv->vm_vram_pt;
- unsigned offset = block->start;
- unsigned count = block->size / 65536;
-
- if (!pt) {
- DRM_ERROR("vm free without vm pt\n");
- goto out_free;
- }
-
- while (count--) {
- unsigned pte = offset / 65536;
- INSTANCE_WR(pt, (pte * 2) + 0, 0);
- INSTANCE_WR(pt, (pte * 2) + 1, 0);
- offset += 65536;
- }
- }
-
-out_free:
- nouveau_mem_free_block(block);
-}
-
-/*
- * Ioctls
- */
-
-int
-nouveau_ioctl_mem_alloc(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_nouveau_mem_alloc *alloc = data;
- struct mem_block *block;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
-
- if (alloc->flags & NOUVEAU_MEM_INTERNAL)
- return -EINVAL;
-
- block = nouveau_mem_alloc(dev, alloc->alignment, alloc->size,
- alloc->flags | NOUVEAU_MEM_USER, file_priv);
- if (!block)
- return -ENOMEM;
- alloc->map_handle=block->map_handle;
- alloc->offset=block->start;
- alloc->flags=block->flags;
-
- if (dev_priv->card_type >= NV_50 && alloc->flags & NOUVEAU_MEM_FB)
- alloc->offset += 512*1024*1024;
-
- return 0;
-}
-
-int
-nouveau_ioctl_mem_free(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_nouveau_mem_free *memfree = data;
- struct mem_block *block;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
-
- if (dev_priv->card_type >= NV_50 && memfree->flags & NOUVEAU_MEM_FB)
- memfree->offset -= 512*1024*1024;
-
- block=NULL;
- if (dev_priv->fb_heap && memfree->flags & NOUVEAU_MEM_FB)
- block = find_block(dev_priv->fb_heap, memfree->offset);
- else if (dev_priv->agp_heap && memfree->flags & NOUVEAU_MEM_AGP)
- block = find_block(dev_priv->agp_heap, memfree->offset);
- else if (dev_priv->pci_heap && memfree->flags & NOUVEAU_MEM_PCI)
- block = find_block(dev_priv->pci_heap, memfree->offset);
- if (!block)
- return -EFAULT;
- if (block->file_priv != file_priv)
- return -EPERM;
-
- nouveau_mem_free(dev, block);
- return 0;
-}
-
-int
-nouveau_ioctl_mem_tile(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_nouveau_mem_tile *memtile = data;
- struct mem_block *block = NULL;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
-
- if (dev_priv->card_type < NV_50)
- return -EINVAL;
-
- if (memtile->flags & NOUVEAU_MEM_FB) {
- memtile->offset -= 512*1024*1024;
- block = find_block(dev_priv->fb_heap, memtile->offset);
- }
-
- if (!block)
- return -EINVAL;
-
- if (block->file_priv != file_priv)
- return -EPERM;
-
- {
- struct nouveau_gpuobj *pt = dev_priv->vm_vram_pt;
- unsigned offset = block->start + memtile->delta;
- unsigned count = memtile->size / 65536;
- unsigned tile = 0;
-
- if (memtile->flags & NOUVEAU_MEM_TILE) {
- if (memtile->flags & NOUVEAU_MEM_TILE_ZETA)
- tile = 0x00002800;
- else
- tile = 0x00007000;
- }
-
- while (count--) {
- unsigned pte = offset / 65536;
-
- INSTANCE_WR(pt, (pte * 2) + 0, offset | 1);
- INSTANCE_WR(pt, (pte * 2) + 1, 0x00000000 | tile);
- offset += 65536;
- }
- }
-
- return 0;
-}
-
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-
-int
-nouveau_notifier_init_channel(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- int flags, ret;
-
- flags = (NOUVEAU_MEM_PCI | NOUVEAU_MEM_MAPPED |
- NOUVEAU_MEM_FB_ACCEPTABLE);
-
- chan->notifier_block = nouveau_mem_alloc(dev, 0, PAGE_SIZE, flags,
- (struct drm_file *)-2);
- if (!chan->notifier_block)
- return -ENOMEM;
- DRM_DEBUG("Allocated notifier block in 0x%08x\n",
- chan->notifier_block->flags);
-
- ret = nouveau_mem_init_heap(&chan->notifier_heap,
- 0, chan->notifier_block->size);
- if (ret)
- return ret;
-
- return 0;
-}
-
-void
-nouveau_notifier_takedown_channel(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
-
- if (chan->notifier_block) {
- nouveau_mem_free(dev, chan->notifier_block);
- chan->notifier_block = NULL;
- }
-
- nouveau_mem_takedown(&chan->notifier_heap);
-}
-
-static void
-nouveau_notifier_gpuobj_dtor(struct drm_device *dev,
- struct nouveau_gpuobj *gpuobj)
-{
- DRM_DEBUG("\n");
-
- if (gpuobj->priv)
- nouveau_mem_free_block(gpuobj->priv);
-}
-
-int
-nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
- int count, uint32_t *b_offset)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *nobj = NULL;
- struct mem_block *mem;
- uint32_t offset;
- int target, ret;
-
- if (!chan->notifier_heap) {
- DRM_ERROR("Channel %d doesn't have a notifier heap!\n",
- chan->id);
- return -EINVAL;
- }
-
- mem = nouveau_mem_alloc_block(chan->notifier_heap, count*32, 0,
- (struct drm_file *)-2, 0);
- if (!mem) {
- DRM_ERROR("Channel %d notifier block full\n", chan->id);
- return -ENOMEM;
- }
- mem->flags = NOUVEAU_MEM_NOTIFIER;
-
- offset = chan->notifier_block->start;
- if (chan->notifier_block->flags & NOUVEAU_MEM_FB) {
- target = NV_DMA_TARGET_VIDMEM;
- } else
- if (chan->notifier_block->flags & NOUVEAU_MEM_AGP) {
- if (dev_priv->gart_info.type == NOUVEAU_GART_SGDMA &&
- dev_priv->card_type < NV_50) {
- ret = nouveau_sgdma_get_page(dev, offset, &offset);
- if (ret)
- return ret;
- target = NV_DMA_TARGET_PCI;
- } else {
- target = NV_DMA_TARGET_AGP;
- }
- } else
- if (chan->notifier_block->flags & NOUVEAU_MEM_PCI) {
- target = NV_DMA_TARGET_PCI_NONLINEAR;
- } else {
- DRM_ERROR("Bad DMA target, flags 0x%08x!\n",
- chan->notifier_block->flags);
- return -EINVAL;
- }
- offset += mem->start;
-
- if ((ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
- offset, mem->size,
- NV_DMA_ACCESS_RW, target, &nobj))) {
- nouveau_mem_free_block(mem);
- DRM_ERROR("Error creating notifier ctxdma: %d\n", ret);
- return ret;
- }
- nobj->dtor = nouveau_notifier_gpuobj_dtor;
- nobj->priv = mem;
-
- if ((ret = nouveau_gpuobj_ref_add(dev, chan, handle, nobj, NULL))) {
- nouveau_gpuobj_del(dev, &nobj);
- nouveau_mem_free_block(mem);
- DRM_ERROR("Error referencing notifier ctxdma: %d\n", ret);
- return ret;
- }
-
- *b_offset = mem->start;
- return 0;
-}
-
-int
-nouveau_ioctl_notifier_alloc(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_nouveau_notifierobj_alloc *na = data;
- struct nouveau_channel *chan;
- int ret;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
- NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(na->channel, file_priv, chan);
-
- ret = nouveau_notifier_alloc(chan, na->handle, na->count, &na->offset);
- if (ret)
- return ret;
-
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (C) 2006 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/*
- * Authors:
- * Ben Skeggs <darktama@iinet.net.au>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-/* NVidia uses context objects to drive drawing operations.
-
- Context objects can be selected into 8 subchannels in the FIFO,
- and then used via DMA command buffers.
-
- A context object is referenced by a user defined handle (CARD32). The HW
- looks up graphics objects in a hash table in the instance RAM.
-
- An entry in the hash table consists of 2 CARD32. The first CARD32 contains
- the handle, the second one a bitfield, that contains the address of the
- object in instance RAM.
-
- The format of the second CARD32 seems to be:
-
- NV4 to NV30:
-
- 15: 0 instance_addr >> 4
- 17:16 engine (here uses 1 = graphics)
- 28:24 channel id (here uses 0)
- 31 valid (use 1)
-
- NV40:
-
- 15: 0 instance_addr >> 4 (maybe 19-0)
- 21:20 engine (here uses 1 = graphics)
- I'm unsure about the other bits, but using 0 seems to work.
-
- The key into the hash table depends on the object handle and channel id and
- is given as:
-*/
-static uint32_t
-nouveau_ramht_hash_handle(struct drm_device *dev, int channel, uint32_t handle)
-{
- struct drm_nouveau_private *dev_priv=dev->dev_private;
- uint32_t hash = 0;
- int i;
-
- DRM_DEBUG("ch%d handle=0x%08x\n", channel, handle);
-
- for (i=32;i>0;i-=dev_priv->ramht_bits) {
- hash ^= (handle & ((1 << dev_priv->ramht_bits) - 1));
- handle >>= dev_priv->ramht_bits;
- }
- if (dev_priv->card_type < NV_50)
- hash ^= channel << (dev_priv->ramht_bits - 4);
- hash <<= 3;
-
- DRM_DEBUG("hash=0x%08x\n", hash);
- return hash;
-}
-
-static int
-nouveau_ramht_entry_valid(struct drm_device *dev, struct nouveau_gpuobj *ramht,
- uint32_t offset)
-{
- struct drm_nouveau_private *dev_priv=dev->dev_private;
- uint32_t ctx = INSTANCE_RD(ramht, (offset + 4)/4);
-
- if (dev_priv->card_type < NV_40)
- return ((ctx & NV_RAMHT_CONTEXT_VALID) != 0);
- return (ctx != 0);
-}
-
-static int
-nouveau_ramht_insert(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
-{
- struct drm_nouveau_private *dev_priv=dev->dev_private;
- struct nouveau_channel *chan = dev_priv->fifos[ref->channel];
- struct nouveau_gpuobj *ramht = chan->ramht ? chan->ramht->gpuobj : NULL;
- struct nouveau_gpuobj *gpuobj = ref->gpuobj;
- uint32_t ctx, co, ho;
-
- if (!ramht) {
- DRM_ERROR("No hash table!\n");
- return -EINVAL;
- }
-
- if (dev_priv->card_type < NV_40) {
- ctx = NV_RAMHT_CONTEXT_VALID | (ref->instance >> 4) |
- (ref->channel << NV_RAMHT_CONTEXT_CHANNEL_SHIFT) |
- (gpuobj->engine << NV_RAMHT_CONTEXT_ENGINE_SHIFT);
- } else
- if (dev_priv->card_type < NV_50) {
- ctx = (ref->instance >> 4) |
- (ref->channel << NV40_RAMHT_CONTEXT_CHANNEL_SHIFT) |
- (gpuobj->engine << NV40_RAMHT_CONTEXT_ENGINE_SHIFT);
- } else {
- ctx = (ref->instance >> 4) |
- (gpuobj->engine << NV40_RAMHT_CONTEXT_ENGINE_SHIFT);
- }
-
- co = ho = nouveau_ramht_hash_handle(dev, ref->channel, ref->handle);
- do {
- if (!nouveau_ramht_entry_valid(dev, ramht, co)) {
- DRM_DEBUG("insert ch%d 0x%08x: h=0x%08x, c=0x%08x\n",
- ref->channel, co, ref->handle, ctx);
- INSTANCE_WR(ramht, (co + 0)/4, ref->handle);
- INSTANCE_WR(ramht, (co + 4)/4, ctx);
-
- list_add_tail(&ref->list, &chan->ramht_refs);
- return 0;
- }
- DRM_DEBUG("collision ch%d 0x%08x: h=0x%08x\n",
- ref->channel, co, INSTANCE_RD(ramht, co/4));
-
- co += 8;
- if (co >= dev_priv->ramht_size)
- co = 0;
- } while (co != ho);
-
- DRM_ERROR("RAMHT space exhausted. ch=%d\n", ref->channel);
- return -ENOMEM;
-}
-
-static void
-nouveau_ramht_remove(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_channel *chan = dev_priv->fifos[ref->channel];
- struct nouveau_gpuobj *ramht = chan->ramht ? chan->ramht->gpuobj : NULL;
- uint32_t co, ho;
-
- if (!ramht) {
- DRM_ERROR("No hash table!\n");
- return;
- }
-
- co = ho = nouveau_ramht_hash_handle(dev, ref->channel, ref->handle);
- do {
- if (nouveau_ramht_entry_valid(dev, ramht, co) &&
- (ref->handle == INSTANCE_RD(ramht, (co/4)))) {
- DRM_DEBUG("remove ch%d 0x%08x: h=0x%08x, c=0x%08x\n",
- ref->channel, co, ref->handle,
- INSTANCE_RD(ramht, (co + 4)));
- INSTANCE_WR(ramht, (co + 0)/4, 0x00000000);
- INSTANCE_WR(ramht, (co + 4)/4, 0x00000000);
-
- list_del(&ref->list);
- return;
- }
-
- co += 8;
- if (co >= dev_priv->ramht_size)
- co = 0;
- } while (co != ho);
-
- DRM_ERROR("RAMHT entry not found. ch=%d, handle=0x%08x\n",
- ref->channel, ref->handle);
-}
-
-int
-nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,
- int size, int align, uint32_t flags,
- struct nouveau_gpuobj **gpuobj_ret)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- struct nouveau_gpuobj *gpuobj;
- struct mem_block *pramin = NULL;
- int ret;
-
- DRM_DEBUG("ch%d size=%d align=%d flags=0x%08x\n",
- chan ? chan->id : -1, size, align, flags);
-
- if (!dev_priv || !gpuobj_ret || *gpuobj_ret != NULL)
- return -EINVAL;
-
- gpuobj = drm_calloc(1, sizeof(*gpuobj), DRM_MEM_DRIVER);
- if (!gpuobj)
- return -ENOMEM;
- DRM_DEBUG("gpuobj %p\n", gpuobj);
- gpuobj->flags = flags;
- gpuobj->im_channel = chan ? chan->id : -1;
-
- list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
-
- /* Choose between global instmem heap, and per-channel private
- * instmem heap. On <NV50 allow requests for private instmem
- * to be satisfied from global heap if no per-channel area
- * available.
- */
- if (chan) {
- if (chan->ramin_heap) {
- DRM_DEBUG("private heap\n");
- pramin = chan->ramin_heap;
- } else
- if (dev_priv->card_type < NV_50) {
- DRM_DEBUG("global heap fallback\n");
- pramin = dev_priv->ramin_heap;
- }
- } else {
- DRM_DEBUG("global heap\n");
- pramin = dev_priv->ramin_heap;
- }
-
- if (!pramin) {
- DRM_ERROR("No PRAMIN heap!\n");
- return -EINVAL;
- }
-
- if (!chan && (ret = engine->instmem.populate(dev, gpuobj, &size))) {
- nouveau_gpuobj_del(dev, &gpuobj);
- return ret;
- }
-
- /* Allocate a chunk of the PRAMIN aperture */
- gpuobj->im_pramin = nouveau_mem_alloc_block(pramin, size,
- drm_order(align),
- (struct drm_file *)-2, 0);
- if (!gpuobj->im_pramin) {
- nouveau_gpuobj_del(dev, &gpuobj);
- return -ENOMEM;
- }
- gpuobj->im_pramin->flags = NOUVEAU_MEM_INSTANCE;
-
- if (!chan && (ret = engine->instmem.bind(dev, gpuobj))) {
- nouveau_gpuobj_del(dev, &gpuobj);
- return ret;
- }
-
- if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
- int i;
-
- for (i = 0; i < gpuobj->im_pramin->size; i += 4)
- INSTANCE_WR(gpuobj, i/4, 0);
- }
-
- *gpuobj_ret = gpuobj;
- return 0;
-}
-
-int
-nouveau_gpuobj_early_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- INIT_LIST_HEAD(&dev_priv->gpuobj_list);
-
- return 0;
-}
-
-int
-nouveau_gpuobj_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
-
- DRM_DEBUG("\n");
-
- if (dev_priv->card_type < NV_50) {
- if ((ret = nouveau_gpuobj_new_fake(dev, dev_priv->ramht_offset,
- ~0, dev_priv->ramht_size,
- NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ALLOW_NO_REFS,
- &dev_priv->ramht, NULL)))
- return ret;
- }
-
- return 0;
-}
-
-void
-nouveau_gpuobj_takedown(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- nouveau_gpuobj_del(dev, &dev_priv->ramht);
-}
-
-void
-nouveau_gpuobj_late_takedown(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *gpuobj = NULL;
- struct list_head *entry, *tmp;
-
- DRM_DEBUG("\n");
-
- list_for_each_safe(entry, tmp, &dev_priv->gpuobj_list) {
- gpuobj = list_entry(entry, struct nouveau_gpuobj, list);
-
- DRM_ERROR("gpuobj %p still exists at takedown, refs=%d\n",
- gpuobj, gpuobj->refcount);
- gpuobj->refcount = 0;
- nouveau_gpuobj_del(dev, &gpuobj);
- }
-}
-
-int
-nouveau_gpuobj_del(struct drm_device *dev, struct nouveau_gpuobj **pgpuobj)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- struct nouveau_gpuobj *gpuobj;
-
- DRM_DEBUG("gpuobj %p\n", pgpuobj ? *pgpuobj : NULL);
-
- if (!dev_priv || !pgpuobj || !(*pgpuobj))
- return -EINVAL;
- gpuobj = *pgpuobj;
-
- if (gpuobj->refcount != 0) {
- DRM_ERROR("gpuobj refcount is %d\n", gpuobj->refcount);
- return -EINVAL;
- }
-
- if (gpuobj->dtor)
- gpuobj->dtor(dev, gpuobj);
-
- if (gpuobj->im_backing) {
- if (gpuobj->flags & NVOBJ_FLAG_FAKE)
- drm_free(gpuobj->im_backing,
- sizeof(*gpuobj->im_backing), DRM_MEM_DRIVER);
- else
- engine->instmem.clear(dev, gpuobj);
- }
-
- if (gpuobj->im_pramin) {
- if (gpuobj->flags & NVOBJ_FLAG_FAKE)
- drm_free(gpuobj->im_pramin, sizeof(*gpuobj->im_pramin),
- DRM_MEM_DRIVER);
- else
- nouveau_mem_free_block(gpuobj->im_pramin);
- }
-
- list_del(&gpuobj->list);
-
- *pgpuobj = NULL;
- drm_free(gpuobj, sizeof(*gpuobj), DRM_MEM_DRIVER);
- return 0;
-}
-
-static int
-nouveau_gpuobj_instance_get(struct drm_device *dev,
- struct nouveau_channel *chan,
- struct nouveau_gpuobj *gpuobj, uint32_t *inst)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *cpramin;
-
- /* <NV50 use PRAMIN address everywhere */
- if (dev_priv->card_type < NV_50) {
- *inst = gpuobj->im_pramin->start;
- return 0;
- }
-
- if (chan && gpuobj->im_channel != chan->id) {
- DRM_ERROR("Channel mismatch: obj %d, ref %d\n",
- gpuobj->im_channel, chan->id);
- return -EINVAL;
- }
-
- /* NV50 channel-local instance */
- if (chan > 0) {
- cpramin = chan->ramin->gpuobj;
- *inst = gpuobj->im_pramin->start - cpramin->im_pramin->start;
- return 0;
- }
-
- /* NV50 global (VRAM) instance */
- if (gpuobj->im_channel < 0) {
- /* ...from global heap */
- if (!gpuobj->im_backing) {
- DRM_ERROR("AII, no VRAM backing gpuobj\n");
- return -EINVAL;
- }
- *inst = gpuobj->im_backing->start;
- return 0;
- } else {
- /* ...from local heap */
- cpramin = dev_priv->fifos[gpuobj->im_channel]->ramin->gpuobj;
- *inst = cpramin->im_backing->start +
- (gpuobj->im_pramin->start - cpramin->im_pramin->start);
- return 0;
- }
-
- return -EINVAL;
-}
-
-int
-nouveau_gpuobj_ref_add(struct drm_device *dev, struct nouveau_channel *chan,
- uint32_t handle, struct nouveau_gpuobj *gpuobj,
- struct nouveau_gpuobj_ref **ref_ret)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj_ref *ref;
- uint32_t instance;
- int ret;
-
- DRM_DEBUG("ch%d h=0x%08x gpuobj=%p\n",
- chan ? chan->id : -1, handle, gpuobj);
-
- if (!dev_priv || !gpuobj || (ref_ret && *ref_ret != NULL))
- return -EINVAL;
-
- if (!chan && !ref_ret)
- return -EINVAL;
-
- ret = nouveau_gpuobj_instance_get(dev, chan, gpuobj, &instance);
- if (ret)
- return ret;
-
- ref = drm_calloc(1, sizeof(*ref), DRM_MEM_DRIVER);
- if (!ref)
- return -ENOMEM;
- ref->gpuobj = gpuobj;
- ref->channel = chan ? chan->id : -1;
- ref->instance = instance;
-
- if (!ref_ret) {
- ref->handle = handle;
-
- ret = nouveau_ramht_insert(dev, ref);
- if (ret) {
- drm_free(ref, sizeof(*ref), DRM_MEM_DRIVER);
- return ret;
- }
- } else {
- ref->handle = ~0;
- *ref_ret = ref;
- }
-
- ref->gpuobj->refcount++;
- return 0;
-}
-
-int nouveau_gpuobj_ref_del(struct drm_device *dev, struct nouveau_gpuobj_ref **pref)
-{
- struct nouveau_gpuobj_ref *ref;
-
- DRM_DEBUG("ref %p\n", pref ? *pref : NULL);
-
- if (!dev || !pref || *pref == NULL)
- return -EINVAL;
- ref = *pref;
-
- if (ref->handle != ~0)
- nouveau_ramht_remove(dev, ref);
-
- if (ref->gpuobj) {
- ref->gpuobj->refcount--;
-
- if (ref->gpuobj->refcount == 0) {
- if (!(ref->gpuobj->flags & NVOBJ_FLAG_ALLOW_NO_REFS))
- nouveau_gpuobj_del(dev, &ref->gpuobj);
- }
- }
-
- *pref = NULL;
- drm_free(ref, sizeof(ref), DRM_MEM_DRIVER);
- return 0;
-}
-
-int
-nouveau_gpuobj_new_ref(struct drm_device *dev,
- struct nouveau_channel *oc, struct nouveau_channel *rc,
- uint32_t handle, int size, int align, uint32_t flags,
- struct nouveau_gpuobj_ref **ref)
-{
- struct nouveau_gpuobj *gpuobj = NULL;
- int ret;
-
- if ((ret = nouveau_gpuobj_new(dev, oc, size, align, flags, &gpuobj)))
- return ret;
-
- if ((ret = nouveau_gpuobj_ref_add(dev, rc, handle, gpuobj, ref))) {
- nouveau_gpuobj_del(dev, &gpuobj);
- return ret;
- }
-
- return 0;
-}
-
-int
-nouveau_gpuobj_ref_find(struct nouveau_channel *chan, uint32_t handle,
- struct nouveau_gpuobj_ref **ref_ret)
-{
- struct nouveau_gpuobj_ref *ref;
- struct list_head *entry, *tmp;
-
- list_for_each_safe(entry, tmp, &chan->ramht_refs) {
- ref = list_entry(entry, struct nouveau_gpuobj_ref, list);
-
- if (ref->handle == handle) {
- if (ref_ret)
- *ref_ret = ref;
- return 0;
- }
- }
-
- return -EINVAL;
-}
-
-int
-nouveau_gpuobj_new_fake(struct drm_device *dev, uint32_t p_offset,
- uint32_t b_offset, uint32_t size,
- uint32_t flags, struct nouveau_gpuobj **pgpuobj,
- struct nouveau_gpuobj_ref **pref)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *gpuobj = NULL;
- int i;
-
- DRM_DEBUG("p_offset=0x%08x b_offset=0x%08x size=0x%08x flags=0x%08x\n",
- p_offset, b_offset, size, flags);
-
- gpuobj = drm_calloc(1, sizeof(*gpuobj), DRM_MEM_DRIVER);
- if (!gpuobj)
- return -ENOMEM;
- DRM_DEBUG("gpuobj %p\n", gpuobj);
- gpuobj->im_channel = -1;
- gpuobj->flags = flags | NVOBJ_FLAG_FAKE;
-
- list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
-
- if (p_offset != ~0) {
- gpuobj->im_pramin = drm_calloc(1, sizeof(struct mem_block),
- DRM_MEM_DRIVER);
- if (!gpuobj->im_pramin) {
- nouveau_gpuobj_del(dev, &gpuobj);
- return -ENOMEM;
- }
- gpuobj->im_pramin->start = p_offset;
- gpuobj->im_pramin->size = size;
- }
-
- if (b_offset != ~0) {
- gpuobj->im_backing = drm_calloc(1, sizeof(struct mem_block),
- DRM_MEM_DRIVER);
- if (!gpuobj->im_backing) {
- nouveau_gpuobj_del(dev, &gpuobj);
- return -ENOMEM;
- }
- gpuobj->im_backing->start = b_offset;
- gpuobj->im_backing->size = size;
- }
-
- if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
- for (i = 0; i < gpuobj->im_pramin->size; i += 4)
- INSTANCE_WR(gpuobj, i/4, 0);
- }
-
- if (pref) {
- if ((i = nouveau_gpuobj_ref_add(dev, NULL, 0, gpuobj, pref))) {
- nouveau_gpuobj_del(dev, &gpuobj);
- return i;
- }
- }
-
- if (pgpuobj)
- *pgpuobj = gpuobj;
- return 0;
-}
-
-
-static int
-nouveau_gpuobj_class_instmem_size(struct drm_device *dev, int class)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- /*XXX: dodgy hack for now */
- if (dev_priv->card_type >= NV_50)
- return 24;
- if (dev_priv->card_type >= NV_40)
- return 32;
- return 16;
-}
-
-/*
- DMA objects are used to reference a piece of memory in the
- framebuffer, PCI or AGP address space. Each object is 16 bytes big
- and looks as follows:
-
- entry[0]
- 11:0 class (seems like I can always use 0 here)
- 12 page table present?
- 13 page entry linear?
- 15:14 access: 0 rw, 1 ro, 2 wo
- 17:16 target: 0 NV memory, 1 NV memory tiled, 2 PCI, 3 AGP
- 31:20 dma adjust (bits 0-11 of the address)
- entry[1]
- dma limit (size of transfer)
- entry[X]
- 1 0 readonly, 1 readwrite
- 31:12 dma frame address of the page (bits 12-31 of the address)
- entry[N]
- page table terminator, same value as the first pte, as does nvidia
- rivatv uses 0xffffffff
-
- Non linear page tables need a list of frame addresses afterwards,
- the rivatv project has some info on this.
-
- The method below creates a DMA object in instance RAM and returns a handle
- to it that can be used to set up context objects.
-*/
-int
-nouveau_gpuobj_dma_new(struct nouveau_channel *chan, int class,
- uint64_t offset, uint64_t size, int access,
- int target, struct nouveau_gpuobj **gpuobj)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
- uint32_t is_scatter_gather = 0;
-
- /* Total number of pages covered by the request.
- */
- const unsigned int page_count = (size + PAGE_SIZE - 1) / PAGE_SIZE;
-
-
- DRM_DEBUG("ch%d class=0x%04x offset=0x%llx size=0x%llx\n",
- chan->id, class, offset, size);
- DRM_DEBUG("access=%d target=%d\n", access, target);
-
- switch (target) {
- case NV_DMA_TARGET_AGP:
- offset += dev_priv->gart_info.aper_base;
- break;
- case NV_DMA_TARGET_PCI_NONLINEAR:
- /*assume the "offset" is a virtual memory address*/
- is_scatter_gather = 1;
- /*put back the right value*/
- target = NV_DMA_TARGET_PCI;
- break;
- default:
- break;
- }
-
- ret = nouveau_gpuobj_new(dev, chan,
- is_scatter_gather ? ((page_count << 2) + 12) : nouveau_gpuobj_class_instmem_size(dev, class),
- 16,
- NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE,
- gpuobj);
- if (ret) {
- DRM_ERROR("Error creating gpuobj: %d\n", ret);
- return ret;
- }
-
- if (dev_priv->card_type < NV_50) {
- uint32_t frame, adjust, pte_flags = 0;
- adjust = offset & 0x00000fff;
- if (access != NV_DMA_ACCESS_RO)
- pte_flags |= (1<<1);
-
- if ( ! is_scatter_gather )
- {
- frame = offset & ~0x00000fff;
-
- INSTANCE_WR(*gpuobj, 0, ((1<<12) | (1<<13) |
- (adjust << 20) |
- (access << 14) |
- (target << 16) |
- class));
- INSTANCE_WR(*gpuobj, 1, size - 1);
- INSTANCE_WR(*gpuobj, 2, frame | pte_flags);
- INSTANCE_WR(*gpuobj, 3, frame | pte_flags);
- }
- else
- {
- /* Intial page entry in the scatter-gather area that
- * corresponds to the base offset
- */
- unsigned int idx = offset / PAGE_SIZE;
-
- uint32_t instance_offset;
- unsigned int i;
-
- if ((idx + page_count) > dev->sg->pages) {
- DRM_ERROR("Requested page range exceedes "
- "allocated scatter-gather range!");
- return -E2BIG;
- }
-
- DRM_DEBUG("Creating PCI DMA object using virtual zone starting at %#llx, size %d\n", offset, (uint32_t)size);
- INSTANCE_WR(*gpuobj, 0, ((1<<12) | (0<<13) |
- (adjust << 20) |
- (access << 14) |
- (target << 16) |
- class));
- INSTANCE_WR(*gpuobj, 1, (uint32_t) size-1);
-
-
- /*write starting at the third dword*/
- instance_offset = 2;
-
- /*for each PAGE, get its bus address, fill in the page table entry, and advance*/
- for (i = 0; i < page_count; i++) {
- if (dev->sg->busaddr[idx] == 0) {
- dev->sg->busaddr[idx] =
- pci_map_page(dev->pdev,
- dev->sg->pagelist[idx],
- 0,
- PAGE_SIZE,
- DMA_BIDIRECTIONAL);
-
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))
- /* Not a 100% sure this is the right kdev in all cases. */
- if (dma_mapping_error(&dev->primary->kdev, dev->sg->busaddr[idx])) {
-#else
- if (dma_mapping_error(dev->sg->busaddr[idx])) {
-#endif
- return -ENOMEM;
- }
- }
-
- frame = (uint32_t) dev->sg->busaddr[idx];
- INSTANCE_WR(*gpuobj, instance_offset,
- frame | pte_flags);
-
- idx++;
- instance_offset ++;
- }
- }
- } else {
- uint32_t flags0, flags5;
-
- if (target == NV_DMA_TARGET_VIDMEM) {
- flags0 = 0x00190000;
- flags5 = 0x00010000;
- } else {
- flags0 = 0x7fc00000;
- flags5 = 0x00080000;
- }
-
- INSTANCE_WR(*gpuobj, 0, flags0 | class);
- INSTANCE_WR(*gpuobj, 1, offset + size - 1);
- INSTANCE_WR(*gpuobj, 2, offset);
- INSTANCE_WR(*gpuobj, 5, flags5);
- }
-
- (*gpuobj)->engine = NVOBJ_ENGINE_SW;
- (*gpuobj)->class = class;
- return 0;
-}
-
-int
-nouveau_gpuobj_gart_dma_new(struct nouveau_channel *chan,
- uint64_t offset, uint64_t size, int access,
- struct nouveau_gpuobj **gpuobj,
- uint32_t *o_ret)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
-
- if (dev_priv->gart_info.type == NOUVEAU_GART_AGP ||
- (dev_priv->card_type >= NV_50 &&
- dev_priv->gart_info.type == NOUVEAU_GART_SGDMA)) {
- ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
- offset, size, access,
- NV_DMA_TARGET_AGP, gpuobj);
- if (o_ret)
- *o_ret = 0;
- } else
- if (dev_priv->gart_info.type == NOUVEAU_GART_SGDMA) {
- *gpuobj = dev_priv->gart_info.sg_ctxdma;
- if (offset & ~0xffffffffULL) {
- DRM_ERROR("obj offset exceeds 32-bits\n");
- return -EINVAL;
- }
- if (o_ret)
- *o_ret = (uint32_t)offset;
- ret = (*gpuobj != NULL) ? 0 : -EINVAL;
- } else {
- DRM_ERROR("Invalid GART type %d\n", dev_priv->gart_info.type);
- return -EINVAL;
- }
-
- return ret;
-}
-
-/* Context objects in the instance RAM have the following structure.
- * On NV40 they are 32 byte long, on NV30 and smaller 16 bytes.
-
- NV4 - NV30:
-
- entry[0]
- 11:0 class
- 12 chroma key enable
- 13 user clip enable
- 14 swizzle enable
- 17:15 patch config:
- scrcopy_and, rop_and, blend_and, scrcopy, srccopy_pre, blend_pre
- 18 synchronize enable
- 19 endian: 1 big, 0 little
- 21:20 dither mode
- 23 single step enable
- 24 patch status: 0 invalid, 1 valid
- 25 context_surface 0: 1 valid
- 26 context surface 1: 1 valid
- 27 context pattern: 1 valid
- 28 context rop: 1 valid
- 29,30 context beta, beta4
- entry[1]
- 7:0 mono format
- 15:8 color format
- 31:16 notify instance address
- entry[2]
- 15:0 dma 0 instance address
- 31:16 dma 1 instance address
- entry[3]
- dma method traps
-
- NV40:
- No idea what the exact format is. Here's what can be deducted:
-
- entry[0]:
- 11:0 class (maybe uses more bits here?)
- 17 user clip enable
- 21:19 patch config
- 25 patch status valid ?
- entry[1]:
- 15:0 DMA notifier (maybe 20:0)
- entry[2]:
- 15:0 DMA 0 instance (maybe 20:0)
- 24 big endian
- entry[3]:
- 15:0 DMA 1 instance (maybe 20:0)
- entry[4]:
- entry[5]:
- set to 0?
-*/
-int
-nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,
- struct nouveau_gpuobj **gpuobj)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
-
- DRM_DEBUG("ch%d class=0x%04x\n", chan->id, class);
-
- ret = nouveau_gpuobj_new(dev, chan,
- nouveau_gpuobj_class_instmem_size(dev, class),
- 16,
- NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE,
- gpuobj);
- if (ret) {
- DRM_ERROR("Error creating gpuobj: %d\n", ret);
- return ret;
- }
-
- if (dev_priv->card_type >= NV_50) {
- INSTANCE_WR(*gpuobj, 0, class);
- INSTANCE_WR(*gpuobj, 5, 0x00010000);
- } else {
- switch (class) {
- case NV_CLASS_NULL:
- INSTANCE_WR(*gpuobj, 0, 0x00001030);
- INSTANCE_WR(*gpuobj, 1, 0xFFFFFFFF);
- break;
- default:
- if (dev_priv->card_type >= NV_40) {
- INSTANCE_WR(*gpuobj, 0, class);
-#ifdef __BIG_ENDIAN
- INSTANCE_WR(*gpuobj, 2, 0x01000000);
-#endif
- } else {
-#ifdef __BIG_ENDIAN
- INSTANCE_WR(*gpuobj, 0, class | 0x00080000);
-#else
- INSTANCE_WR(*gpuobj, 0, class);
-#endif
- }
- }
- }
-
- (*gpuobj)->engine = NVOBJ_ENGINE_GR;
- (*gpuobj)->class = class;
- return 0;
-}
-
-static int
-nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *pramin = NULL;
- int size, base, ret;
-
- DRM_DEBUG("ch%d\n", chan->id);
-
- /* Base amount for object storage (4KiB enough?) */
- size = 0x1000;
- base = 0;
-
- /* PGRAPH context */
-
- if (dev_priv->card_type == NV_50) {
- /* Various fixed table thingos */
- size += 0x1400; /* mostly unknown stuff */
- size += 0x4000; /* vm pd */
- base = 0x6000;
- /* RAMHT, not sure about setting size yet, 32KiB to be safe */
- size += 0x8000;
- /* RAMFC */
- size += 0x1000;
- /* PGRAPH context */
- size += 0x70000;
- }
-
- DRM_DEBUG("ch%d PRAMIN size: 0x%08x bytes, base alloc=0x%08x\n",
- chan->id, size, base);
- ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, size, 0x1000, 0,
- &chan->ramin);
- if (ret) {
- DRM_ERROR("Error allocating channel PRAMIN: %d\n", ret);
- return ret;
- }
- pramin = chan->ramin->gpuobj;
-
- ret = nouveau_mem_init_heap(&chan->ramin_heap,
- pramin->im_pramin->start + base, size);
- if (ret) {
- DRM_ERROR("Error creating PRAMIN heap: %d\n", ret);
- nouveau_gpuobj_ref_del(dev, &chan->ramin);
- return ret;
- }
-
- return 0;
-}
-
-int
-nouveau_gpuobj_channel_init(struct nouveau_channel *chan,
- uint32_t vram_h, uint32_t tt_h)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *vram = NULL, *tt = NULL;
- int ret, i;
-
- INIT_LIST_HEAD(&chan->ramht_refs);
-
- DRM_DEBUG("ch%d vram=0x%08x tt=0x%08x\n", chan->id, vram_h, tt_h);
-
- /* Reserve a block of PRAMIN for the channel
- *XXX: maybe on <NV50 too at some point
- */
- if (0 || dev_priv->card_type == NV_50) {
- ret = nouveau_gpuobj_channel_init_pramin(chan);
- if (ret)
- return ret;
- }
-
- /* NV50 VM
- * - Allocate per-channel page-directory
- * - Point offset 0-512MiB at shared PCIEGART table
- * - Point offset 512-1024MiB at shared VRAM table
- */
- if (dev_priv->card_type >= NV_50) {
- uint32_t vm_offset;
-
- vm_offset = (dev_priv->chipset & 0xf0) == 0x50 ? 0x1400 : 0x200;
- vm_offset += chan->ramin->gpuobj->im_pramin->start;
- if ((ret = nouveau_gpuobj_new_fake(dev, vm_offset, ~0, 0x4000,
- 0, &chan->vm_pd, NULL)))
- return ret;
- for (i=0; i<0x4000; i+=8) {
- INSTANCE_WR(chan->vm_pd, (i+0)/4, 0x00000000);
- INSTANCE_WR(chan->vm_pd, (i+4)/4, 0xdeadcafe);
- }
-
- if ((ret = nouveau_gpuobj_ref_add(dev, NULL, 0,
- dev_priv->gart_info.sg_ctxdma,
- &chan->vm_gart_pt)))
- return ret;
- INSTANCE_WR(chan->vm_pd, (0+0)/4,
- chan->vm_gart_pt->instance | 0x03);
- INSTANCE_WR(chan->vm_pd, (0+4)/4, 0x00000000);
-
- if ((ret = nouveau_gpuobj_ref_add(dev, NULL, 0,
- dev_priv->vm_vram_pt,
- &chan->vm_vram_pt)))
- return ret;
- INSTANCE_WR(chan->vm_pd, (8+0)/4,
- chan->vm_vram_pt->instance | 0x61);
- INSTANCE_WR(chan->vm_pd, (8+4)/4, 0x00000000);
- }
-
- /* RAMHT */
- if (dev_priv->card_type < NV_50) {
- ret = nouveau_gpuobj_ref_add(dev, NULL, 0, dev_priv->ramht,
- &chan->ramht);
- if (ret)
- return ret;
- } else {
- ret = nouveau_gpuobj_new_ref(dev, chan, chan, 0,
- 0x8000, 16,
- NVOBJ_FLAG_ZERO_ALLOC,
- &chan->ramht);
- if (ret)
- return ret;
- }
-
- /* VRAM ctxdma */
- if (dev_priv->card_type >= NV_50) {
- ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
- 0, 0x100000000ULL,
- NV_DMA_ACCESS_RW,
- NV_DMA_TARGET_AGP, &vram);
- if (ret) {
- DRM_ERROR("Error creating VRAM ctxdma: %d\n", ret);
- return ret;
- }
- } else
- if ((ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
- 0, dev_priv->fb_available_size,
- NV_DMA_ACCESS_RW,
- NV_DMA_TARGET_VIDMEM, &vram))) {
- DRM_ERROR("Error creating VRAM ctxdma: %d\n", ret);
- return ret;
- }
-
- if ((ret = nouveau_gpuobj_ref_add(dev, chan, vram_h, vram, NULL))) {
- DRM_ERROR("Error referencing VRAM ctxdma: %d\n", ret);
- return ret;
- }
-
- /* TT memory ctxdma */
- if (dev_priv->card_type >= NV_50) {
- tt = vram;
- } else
- if (dev_priv->gart_info.type != NOUVEAU_GART_NONE) {
- ret = nouveau_gpuobj_gart_dma_new(chan, 0,
- dev_priv->gart_info.aper_size,
- NV_DMA_ACCESS_RW, &tt, NULL);
- } else
- if (dev_priv->pci_heap) {
- ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
- 0, dev->sg->pages * PAGE_SIZE,
- NV_DMA_ACCESS_RW,
- NV_DMA_TARGET_PCI_NONLINEAR, &tt);
- } else {
- DRM_ERROR("Invalid GART type %d\n", dev_priv->gart_info.type);
- ret = -EINVAL;
- }
-
- if (ret) {
- DRM_ERROR("Error creating TT ctxdma: %d\n", ret);
- return ret;
- }
-
- ret = nouveau_gpuobj_ref_add(dev, chan, tt_h, tt, NULL);
- if (ret) {
- DRM_ERROR("Error referencing TT ctxdma: %d\n", ret);
- return ret;
- }
-
- return 0;
-}
-
-void
-nouveau_gpuobj_channel_takedown(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct list_head *entry, *tmp;
- struct nouveau_gpuobj_ref *ref;
-
- DRM_DEBUG("ch%d\n", chan->id);
-
- list_for_each_safe(entry, tmp, &chan->ramht_refs) {
- ref = list_entry(entry, struct nouveau_gpuobj_ref, list);
-
- nouveau_gpuobj_ref_del(dev, &ref);
- }
-
- nouveau_gpuobj_ref_del(dev, &chan->ramht);
-
- nouveau_gpuobj_del(dev, &chan->vm_pd);
- nouveau_gpuobj_ref_del(dev, &chan->vm_gart_pt);
- nouveau_gpuobj_ref_del(dev, &chan->vm_vram_pt);
-
- if (chan->ramin_heap)
- nouveau_mem_takedown(&chan->ramin_heap);
- if (chan->ramin)
- nouveau_gpuobj_ref_del(dev, &chan->ramin);
-
-}
-
-int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct nouveau_channel *chan;
- struct drm_nouveau_grobj_alloc *init = data;
- struct nouveau_gpuobj *gr = NULL;
- int ret;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
- NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(init->channel, file_priv, chan);
-
- //FIXME: check args, only allow trusted objects to be created
-
- if (init->handle == ~0)
- return -EINVAL;
-
- if (nouveau_gpuobj_ref_find(chan, init->handle, NULL) == 0)
- return -EEXIST;
-
- ret = nouveau_gpuobj_gr_new(chan, init->class, &gr);
- if (ret) {
- DRM_ERROR("Error creating gr object: %d (%d/0x%08x)\n",
- ret, init->channel, init->handle);
- return ret;
- }
-
- if ((ret = nouveau_gpuobj_ref_add(dev, chan, init->handle, gr, NULL))) {
- DRM_ERROR("Error referencing gr object: %d (%d/0x%08x\n)",
- ret, init->channel, init->handle);
- nouveau_gpuobj_del(dev, &gr);
- return ret;
- }
-
- return 0;
-}
-
-int nouveau_ioctl_gpuobj_free(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_nouveau_gpuobj_free *objfree = data;
- struct nouveau_gpuobj_ref *ref;
- struct nouveau_channel *chan;
- int ret;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
- NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(objfree->channel, file_priv, chan);
-
- if ((ret = nouveau_gpuobj_ref_find(chan, objfree->handle, &ref)))
- return ret;
- nouveau_gpuobj_ref_del(dev, &ref);
-
- return 0;
-}
+++ /dev/null
-
-
-#define NV03_BOOT_0 0x00100000
-# define NV03_BOOT_0_RAM_AMOUNT 0x00000003
-# define NV03_BOOT_0_RAM_AMOUNT_8MB 0x00000000
-# define NV03_BOOT_0_RAM_AMOUNT_2MB 0x00000001
-# define NV03_BOOT_0_RAM_AMOUNT_4MB 0x00000002
-# define NV03_BOOT_0_RAM_AMOUNT_8MB_SDRAM 0x00000003
-# define NV04_BOOT_0_RAM_AMOUNT_32MB 0x00000000
-# define NV04_BOOT_0_RAM_AMOUNT_4MB 0x00000001
-# define NV04_BOOT_0_RAM_AMOUNT_8MB 0x00000002
-# define NV04_BOOT_0_RAM_AMOUNT_16MB 0x00000003
-
-#define NV_RAMIN 0x00700000
-
-#define NV_RAMHT_HANDLE_OFFSET 0
-#define NV_RAMHT_CONTEXT_OFFSET 4
-# define NV_RAMHT_CONTEXT_VALID (1<<31)
-# define NV_RAMHT_CONTEXT_CHANNEL_SHIFT 24
-# define NV_RAMHT_CONTEXT_ENGINE_SHIFT 16
-# define NV_RAMHT_CONTEXT_ENGINE_SOFTWARE 0
-# define NV_RAMHT_CONTEXT_ENGINE_GRAPHICS 1
-# define NV_RAMHT_CONTEXT_INSTANCE_SHIFT 0
-# define NV40_RAMHT_CONTEXT_CHANNEL_SHIFT 23
-# define NV40_RAMHT_CONTEXT_ENGINE_SHIFT 20
-# define NV40_RAMHT_CONTEXT_INSTANCE_SHIFT 0
-
-/* DMA object defines */
-#define NV_DMA_ACCESS_RW 0
-#define NV_DMA_ACCESS_RO 1
-#define NV_DMA_ACCESS_WO 2
-#define NV_DMA_TARGET_VIDMEM 0
-#define NV_DMA_TARGET_PCI 2
-#define NV_DMA_TARGET_AGP 3
-/*The following is not a real value used by nvidia cards, it's changed by nouveau_object_dma_create*/
-#define NV_DMA_TARGET_PCI_NONLINEAR 8
-
-/* Some object classes we care about in the drm */
-#define NV_CLASS_DMA_FROM_MEMORY 0x00000002
-#define NV_CLASS_DMA_TO_MEMORY 0x00000003
-#define NV_CLASS_NULL 0x00000030
-#define NV_CLASS_DMA_IN_MEMORY 0x0000003D
-
-#define NV03_USER(i) (0x00800000+(i*NV03_USER_SIZE))
-#define NV03_USER__SIZE 16
-#define NV10_USER__SIZE 32
-#define NV03_USER_SIZE 0x00010000
-#define NV03_USER_DMA_PUT(i) (0x00800040+(i*NV03_USER_SIZE))
-#define NV03_USER_DMA_PUT__SIZE 16
-#define NV10_USER_DMA_PUT__SIZE 32
-#define NV03_USER_DMA_GET(i) (0x00800044+(i*NV03_USER_SIZE))
-#define NV03_USER_DMA_GET__SIZE 16
-#define NV10_USER_DMA_GET__SIZE 32
-#define NV03_USER_REF_CNT(i) (0x00800048+(i*NV03_USER_SIZE))
-#define NV03_USER_REF_CNT__SIZE 16
-#define NV10_USER_REF_CNT__SIZE 32
-
-#define NV40_USER(i) (0x00c00000+(i*NV40_USER_SIZE))
-#define NV40_USER_SIZE 0x00001000
-#define NV40_USER_DMA_PUT(i) (0x00c00040+(i*NV40_USER_SIZE))
-#define NV40_USER_DMA_PUT__SIZE 32
-#define NV40_USER_DMA_GET(i) (0x00c00044+(i*NV40_USER_SIZE))
-#define NV40_USER_DMA_GET__SIZE 32
-#define NV40_USER_REF_CNT(i) (0x00c00048+(i*NV40_USER_SIZE))
-#define NV40_USER_REF_CNT__SIZE 32
-
-#define NV50_USER(i) (0x00c00000+(i*NV50_USER_SIZE))
-#define NV50_USER_SIZE 0x00002000
-#define NV50_USER_DMA_PUT(i) (0x00c00040+(i*NV50_USER_SIZE))
-#define NV50_USER_DMA_PUT__SIZE 128
-#define NV50_USER_DMA_GET(i) (0x00c00044+(i*NV50_USER_SIZE))
-#define NV50_USER_DMA_GET__SIZE 128
-/*XXX: I don't think this actually exists.. */
-#define NV50_USER_REF_CNT(i) (0x00c00048+(i*NV50_USER_SIZE))
-#define NV50_USER_REF_CNT__SIZE 128
-
-#define NV03_FIFO_SIZE 0x8000UL
-
-#define NV03_PMC_BOOT_0 0x00000000
-#define NV03_PMC_BOOT_1 0x00000004
-#define NV03_PMC_INTR_0 0x00000100
-# define NV_PMC_INTR_0_PFIFO_PENDING (1<< 8)
-# define NV_PMC_INTR_0_PGRAPH_PENDING (1<<12)
-# define NV_PMC_INTR_0_NV50_I2C_PENDING (1<<21)
-# define NV_PMC_INTR_0_CRTC0_PENDING (1<<24)
-# define NV_PMC_INTR_0_CRTC1_PENDING (1<<25)
-# define NV_PMC_INTR_0_NV50_DISPLAY_PENDING (1<<26)
-# define NV_PMC_INTR_0_CRTCn_PENDING (3<<24)
-#define NV03_PMC_INTR_EN_0 0x00000140
-# define NV_PMC_INTR_EN_0_MASTER_ENABLE (1<< 0)
-#define NV03_PMC_ENABLE 0x00000200
-# define NV_PMC_ENABLE_PFIFO (1<< 8)
-# define NV_PMC_ENABLE_PGRAPH (1<<12)
-/* Disabling the below bit breaks newer (G7X only?) mobile chipsets,
- * the card will hang early on in the X init process.
- */
-# define NV_PMC_ENABLE_UNK13 (1<<13)
-
-#define NV_PBUS_DEBUG_DUALHEAD_CTL 0x000010F0
-
-#define NV40_PMC_BACKLIGHT 0x000015f0
-# define NV40_PMC_BACKLIGHT_MASK 0x001f0000
-#define NV40_PMC_1700 0x00001700
-#define NV40_PMC_1704 0x00001704
-#define NV40_PMC_1708 0x00001708
-#define NV40_PMC_170C 0x0000170C
-
-/* probably PMC ? */
-#define NV50_PUNK_BAR0_PRAMIN 0x00001700
-#define NV50_PUNK_BAR_CFG_BASE 0x00001704
-#define NV50_PUNK_BAR_CFG_BASE_VALID (1<<30)
-#define NV50_PUNK_BAR1_CTXDMA 0x00001708
-#define NV50_PUNK_BAR1_CTXDMA_VALID (1<<31)
-#define NV50_PUNK_BAR3_CTXDMA 0x0000170C
-#define NV50_PUNK_BAR3_CTXDMA_VALID (1<<31)
-#define NV50_PUNK_UNK1710 0x00001710
-
-#define NV04_PBUS_PCI_NV_1 0x00001804
-#define NV04_PBUS_PCI_NV_19 0x0000184C
-
-#define NV04_PTIMER_INTR_0 0x00009100
-#define NV04_PTIMER_INTR_EN_0 0x00009140
-#define NV04_PTIMER_NUMERATOR 0x00009200
-#define NV04_PTIMER_DENOMINATOR 0x00009210
-#define NV04_PTIMER_TIME_0 0x00009400
-#define NV04_PTIMER_TIME_1 0x00009410
-#define NV04_PTIMER_ALARM_0 0x00009420
-
-#define NV50_I2C_CONTROLLER 0x0000E054
-
-#define NV04_PFB_CFG0 0x00100200
-#define NV04_PFB_CFG1 0x00100204
-#define NV10_PFB_CSTATUS 0x0010020C
-# define NV10_PFB_CSTATUS_RAM_AMOUNT_MB_MASK 0xfff00000
-# define NV10_PFB_CSTATUS_RAM_AMOUNT_MB_SHIFT 20
-#define NV10_PFB_TILE(i) (0x00100240 + (i*16))
-#define NV10_PFB_TILE__SIZE 8
-#define NV10_PFB_TLIMIT(i) (0x00100244 + (i*16))
-#define NV10_PFB_TSIZE(i) (0x00100248 + (i*16))
-#define NV10_PFB_TSTATUS(i) (0x0010024C + (i*16))
-#define NV10_PFB_CLOSE_PAGE2 0x0010033C
-#define NV40_PFB_TILE(i) (0x00100600 + (i*16))
-#define NV40_PFB_TILE__SIZE_0 12
-#define NV40_PFB_TILE__SIZE_1 15
-#define NV40_PFB_TLIMIT(i) (0x00100604 + (i*16))
-#define NV40_PFB_TSIZE(i) (0x00100608 + (i*16))
-#define NV40_PFB_TSTATUS(i) (0x0010060C + (i*16))
-#define NV40_PFB_UNK_800 0x00100800
-
-#define NV04_PGRAPH_DEBUG_0 0x00400080
-#define NV04_PGRAPH_DEBUG_1 0x00400084
-#define NV04_PGRAPH_DEBUG_2 0x00400088
-#define NV04_PGRAPH_DEBUG_3 0x0040008c
-#define NV10_PGRAPH_DEBUG_4 0x00400090
-#define NV03_PGRAPH_INTR 0x00400100
-#define NV03_PGRAPH_NSTATUS 0x00400104
-# define NV04_PGRAPH_NSTATUS_STATE_IN_USE (1<<11)
-# define NV04_PGRAPH_NSTATUS_INVALID_STATE (1<<12)
-# define NV04_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<13)
-# define NV04_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<14)
-# define NV10_PGRAPH_NSTATUS_STATE_IN_USE (1<<23)
-# define NV10_PGRAPH_NSTATUS_INVALID_STATE (1<<24)
-# define NV10_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<25)
-# define NV10_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<26)
-#define NV03_PGRAPH_NSOURCE 0x00400108
-# define NV03_PGRAPH_NSOURCE_NOTIFICATION (1<< 0)
-# define NV03_PGRAPH_NSOURCE_DATA_ERROR (1<< 1)
-# define NV03_PGRAPH_NSOURCE_PROTECTION_ERROR (1<< 2)
-# define NV03_PGRAPH_NSOURCE_RANGE_EXCEPTION (1<< 3)
-# define NV03_PGRAPH_NSOURCE_LIMIT_COLOR (1<< 4)
-# define NV03_PGRAPH_NSOURCE_LIMIT_ZETA (1<< 5)
-# define NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD (1<< 6)
-# define NV03_PGRAPH_NSOURCE_DMA_R_PROTECTION (1<< 7)
-# define NV03_PGRAPH_NSOURCE_DMA_W_PROTECTION (1<< 8)
-# define NV03_PGRAPH_NSOURCE_FORMAT_EXCEPTION (1<< 9)
-# define NV03_PGRAPH_NSOURCE_PATCH_EXCEPTION (1<<10)
-# define NV03_PGRAPH_NSOURCE_STATE_INVALID (1<<11)
-# define NV03_PGRAPH_NSOURCE_DOUBLE_NOTIFY (1<<12)
-# define NV03_PGRAPH_NSOURCE_NOTIFY_IN_USE (1<<13)
-# define NV03_PGRAPH_NSOURCE_METHOD_CNT (1<<14)
-# define NV03_PGRAPH_NSOURCE_BFR_NOTIFICATION (1<<15)
-# define NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION (1<<16)
-# define NV03_PGRAPH_NSOURCE_DMA_WIDTH_A (1<<17)
-# define NV03_PGRAPH_NSOURCE_DMA_WIDTH_B (1<<18)
-#define NV03_PGRAPH_INTR_EN 0x00400140
-#define NV40_PGRAPH_INTR_EN 0x0040013C
-# define NV_PGRAPH_INTR_NOTIFY (1<< 0)
-# define NV_PGRAPH_INTR_MISSING_HW (1<< 4)
-# define NV_PGRAPH_INTR_CONTEXT_SWITCH (1<<12)
-# define NV_PGRAPH_INTR_BUFFER_NOTIFY (1<<16)
-# define NV_PGRAPH_INTR_ERROR (1<<20)
-#define NV10_PGRAPH_CTX_CONTROL 0x00400144
-#define NV10_PGRAPH_CTX_USER 0x00400148
-#define NV10_PGRAPH_CTX_SWITCH1 0x0040014C
-#define NV10_PGRAPH_CTX_SWITCH2 0x00400150
-#define NV10_PGRAPH_CTX_SWITCH3 0x00400154
-#define NV10_PGRAPH_CTX_SWITCH4 0x00400158
-#define NV10_PGRAPH_CTX_SWITCH5 0x0040015C
-#define NV04_PGRAPH_CTX_SWITCH1 0x00400160
-#define NV10_PGRAPH_CTX_CACHE1 0x00400160
-#define NV04_PGRAPH_CTX_SWITCH2 0x00400164
-#define NV04_PGRAPH_CTX_SWITCH3 0x00400168
-#define NV04_PGRAPH_CTX_SWITCH4 0x0040016C
-#define NV04_PGRAPH_CTX_CONTROL 0x00400170
-#define NV04_PGRAPH_CTX_USER 0x00400174
-#define NV04_PGRAPH_CTX_CACHE1 0x00400180
-#define NV10_PGRAPH_CTX_CACHE2 0x00400180
-#define NV03_PGRAPH_CTX_CONTROL 0x00400190
-#define NV03_PGRAPH_CTX_USER 0x00400194
-#define NV04_PGRAPH_CTX_CACHE2 0x004001A0
-#define NV10_PGRAPH_CTX_CACHE3 0x004001A0
-#define NV04_PGRAPH_CTX_CACHE3 0x004001C0
-#define NV10_PGRAPH_CTX_CACHE4 0x004001C0
-#define NV04_PGRAPH_CTX_CACHE4 0x004001E0
-#define NV10_PGRAPH_CTX_CACHE5 0x004001E0
-#define NV40_PGRAPH_CTXCTL_0304 0x00400304
-#define NV40_PGRAPH_CTXCTL_0304_XFER_CTX 0x00000001
-#define NV40_PGRAPH_CTXCTL_UCODE_STAT 0x00400308
-#define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_MASK 0xff000000
-#define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_SHIFT 24
-#define NV40_PGRAPH_CTXCTL_UCODE_STAT_OP_MASK 0x00ffffff
-#define NV40_PGRAPH_CTXCTL_0310 0x00400310
-#define NV40_PGRAPH_CTXCTL_0310_XFER_SAVE 0x00000020
-#define NV40_PGRAPH_CTXCTL_0310_XFER_LOAD 0x00000040
-#define NV40_PGRAPH_CTXCTL_030C 0x0040030c
-#define NV40_PGRAPH_CTXCTL_UCODE_INDEX 0x00400324
-#define NV40_PGRAPH_CTXCTL_UCODE_DATA 0x00400328
-#define NV40_PGRAPH_CTXCTL_CUR 0x0040032c
-#define NV40_PGRAPH_CTXCTL_CUR_LOADED 0x01000000
-#define NV40_PGRAPH_CTXCTL_CUR_INST_MASK 0x000FFFFF
-#define NV03_PGRAPH_ABS_X_RAM 0x00400400
-#define NV03_PGRAPH_ABS_Y_RAM 0x00400480
-#define NV03_PGRAPH_X_MISC 0x00400500
-#define NV03_PGRAPH_Y_MISC 0x00400504
-#define NV04_PGRAPH_VALID1 0x00400508
-#define NV04_PGRAPH_SOURCE_COLOR 0x0040050C
-#define NV04_PGRAPH_MISC24_0 0x00400510
-#define NV03_PGRAPH_XY_LOGIC_MISC0 0x00400514
-#define NV03_PGRAPH_XY_LOGIC_MISC1 0x00400518
-#define NV03_PGRAPH_XY_LOGIC_MISC2 0x0040051C
-#define NV03_PGRAPH_XY_LOGIC_MISC3 0x00400520
-#define NV03_PGRAPH_CLIPX_0 0x00400524
-#define NV03_PGRAPH_CLIPX_1 0x00400528
-#define NV03_PGRAPH_CLIPY_0 0x0040052C
-#define NV03_PGRAPH_CLIPY_1 0x00400530
-#define NV03_PGRAPH_ABS_ICLIP_XMAX 0x00400534
-#define NV03_PGRAPH_ABS_ICLIP_YMAX 0x00400538
-#define NV03_PGRAPH_ABS_UCLIP_XMIN 0x0040053C
-#define NV03_PGRAPH_ABS_UCLIP_YMIN 0x00400540
-#define NV03_PGRAPH_ABS_UCLIP_XMAX 0x00400544
-#define NV03_PGRAPH_ABS_UCLIP_YMAX 0x00400548
-#define NV03_PGRAPH_ABS_UCLIPA_XMIN 0x00400560
-#define NV03_PGRAPH_ABS_UCLIPA_YMIN 0x00400564
-#define NV03_PGRAPH_ABS_UCLIPA_XMAX 0x00400568
-#define NV03_PGRAPH_ABS_UCLIPA_YMAX 0x0040056C
-#define NV04_PGRAPH_MISC24_1 0x00400570
-#define NV04_PGRAPH_MISC24_2 0x00400574
-#define NV04_PGRAPH_VALID2 0x00400578
-#define NV04_PGRAPH_PASSTHRU_0 0x0040057C
-#define NV04_PGRAPH_PASSTHRU_1 0x00400580
-#define NV04_PGRAPH_PASSTHRU_2 0x00400584
-#define NV10_PGRAPH_DIMX_TEXTURE 0x00400588
-#define NV10_PGRAPH_WDIMX_TEXTURE 0x0040058C
-#define NV04_PGRAPH_COMBINE_0_ALPHA 0x00400590
-#define NV04_PGRAPH_COMBINE_0_COLOR 0x00400594
-#define NV04_PGRAPH_COMBINE_1_ALPHA 0x00400598
-#define NV04_PGRAPH_COMBINE_1_COLOR 0x0040059C
-#define NV04_PGRAPH_FORMAT_0 0x004005A8
-#define NV04_PGRAPH_FORMAT_1 0x004005AC
-#define NV04_PGRAPH_FILTER_0 0x004005B0
-#define NV04_PGRAPH_FILTER_1 0x004005B4
-#define NV03_PGRAPH_MONO_COLOR0 0x00400600
-#define NV04_PGRAPH_ROP3 0x00400604
-#define NV04_PGRAPH_BETA_AND 0x00400608
-#define NV04_PGRAPH_BETA_PREMULT 0x0040060C
-#define NV04_PGRAPH_LIMIT_VIOL_PIX 0x00400610
-#define NV04_PGRAPH_FORMATS 0x00400618
-#define NV10_PGRAPH_DEBUG_2 0x00400620
-#define NV04_PGRAPH_BOFFSET0 0x00400640
-#define NV04_PGRAPH_BOFFSET1 0x00400644
-#define NV04_PGRAPH_BOFFSET2 0x00400648
-#define NV04_PGRAPH_BOFFSET3 0x0040064C
-#define NV04_PGRAPH_BOFFSET4 0x00400650
-#define NV04_PGRAPH_BOFFSET5 0x00400654
-#define NV04_PGRAPH_BBASE0 0x00400658
-#define NV04_PGRAPH_BBASE1 0x0040065C
-#define NV04_PGRAPH_BBASE2 0x00400660
-#define NV04_PGRAPH_BBASE3 0x00400664
-#define NV04_PGRAPH_BBASE4 0x00400668
-#define NV04_PGRAPH_BBASE5 0x0040066C
-#define NV04_PGRAPH_BPITCH0 0x00400670
-#define NV04_PGRAPH_BPITCH1 0x00400674
-#define NV04_PGRAPH_BPITCH2 0x00400678
-#define NV04_PGRAPH_BPITCH3 0x0040067C
-#define NV04_PGRAPH_BPITCH4 0x00400680
-#define NV04_PGRAPH_BLIMIT0 0x00400684
-#define NV04_PGRAPH_BLIMIT1 0x00400688
-#define NV04_PGRAPH_BLIMIT2 0x0040068C
-#define NV04_PGRAPH_BLIMIT3 0x00400690
-#define NV04_PGRAPH_BLIMIT4 0x00400694
-#define NV04_PGRAPH_BLIMIT5 0x00400698
-#define NV04_PGRAPH_BSWIZZLE2 0x0040069C
-#define NV04_PGRAPH_BSWIZZLE5 0x004006A0
-#define NV03_PGRAPH_STATUS 0x004006B0
-#define NV04_PGRAPH_STATUS 0x00400700
-#define NV04_PGRAPH_TRAPPED_ADDR 0x00400704
-#define NV04_PGRAPH_TRAPPED_DATA 0x00400708
-#define NV04_PGRAPH_SURFACE 0x0040070C
-#define NV10_PGRAPH_TRAPPED_DATA_HIGH 0x0040070C
-#define NV04_PGRAPH_STATE 0x00400710
-#define NV10_PGRAPH_SURFACE 0x00400710
-#define NV04_PGRAPH_NOTIFY 0x00400714
-#define NV10_PGRAPH_STATE 0x00400714
-#define NV10_PGRAPH_NOTIFY 0x00400718
-
-#define NV04_PGRAPH_FIFO 0x00400720
-
-#define NV04_PGRAPH_BPIXEL 0x00400724
-#define NV10_PGRAPH_RDI_INDEX 0x00400750
-#define NV04_PGRAPH_FFINTFC_ST2 0x00400754
-#define NV10_PGRAPH_RDI_DATA 0x00400754
-#define NV04_PGRAPH_DMA_PITCH 0x00400760
-#define NV10_PGRAPH_FFINTFC_ST2 0x00400764
-#define NV04_PGRAPH_DVD_COLORFMT 0x00400764
-#define NV04_PGRAPH_SCALED_FORMAT 0x00400768
-#define NV10_PGRAPH_DMA_PITCH 0x00400770
-#define NV10_PGRAPH_DVD_COLORFMT 0x00400774
-#define NV10_PGRAPH_SCALED_FORMAT 0x00400778
-#define NV20_PGRAPH_CHANNEL_CTX_TABLE 0x00400780
-#define NV20_PGRAPH_CHANNEL_CTX_POINTER 0x00400784
-#define NV20_PGRAPH_CHANNEL_CTX_XFER 0x00400788
-#define NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD 0x00000001
-#define NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE 0x00000002
-#define NV04_PGRAPH_PATT_COLOR0 0x00400800
-#define NV04_PGRAPH_PATT_COLOR1 0x00400804
-#define NV04_PGRAPH_PATTERN 0x00400808
-#define NV04_PGRAPH_PATTERN_SHAPE 0x00400810
-#define NV04_PGRAPH_CHROMA 0x00400814
-#define NV04_PGRAPH_CONTROL0 0x00400818
-#define NV04_PGRAPH_CONTROL1 0x0040081C
-#define NV04_PGRAPH_CONTROL2 0x00400820
-#define NV04_PGRAPH_BLEND 0x00400824
-#define NV04_PGRAPH_STORED_FMT 0x00400830
-#define NV04_PGRAPH_PATT_COLORRAM 0x00400900
-#define NV40_PGRAPH_TILE0(i) (0x00400900 + (i*16))
-#define NV40_PGRAPH_TLIMIT0(i) (0x00400904 + (i*16))
-#define NV40_PGRAPH_TSIZE0(i) (0x00400908 + (i*16))
-#define NV40_PGRAPH_TSTATUS0(i) (0x0040090C + (i*16))
-#define NV10_PGRAPH_TILE(i) (0x00400B00 + (i*16))
-#define NV10_PGRAPH_TLIMIT(i) (0x00400B04 + (i*16))
-#define NV10_PGRAPH_TSIZE(i) (0x00400B08 + (i*16))
-#define NV10_PGRAPH_TSTATUS(i) (0x00400B0C + (i*16))
-#define NV04_PGRAPH_U_RAM 0x00400D00
-#define NV47_PGRAPH_TILE0(i) (0x00400D00 + (i*16))
-#define NV47_PGRAPH_TLIMIT0(i) (0x00400D04 + (i*16))
-#define NV47_PGRAPH_TSIZE0(i) (0x00400D08 + (i*16))
-#define NV47_PGRAPH_TSTATUS0(i) (0x00400D0C + (i*16))
-#define NV04_PGRAPH_V_RAM 0x00400D40
-#define NV04_PGRAPH_W_RAM 0x00400D80
-#define NV10_PGRAPH_COMBINER0_IN_ALPHA 0x00400E40
-#define NV10_PGRAPH_COMBINER1_IN_ALPHA 0x00400E44
-#define NV10_PGRAPH_COMBINER0_IN_RGB 0x00400E48
-#define NV10_PGRAPH_COMBINER1_IN_RGB 0x00400E4C
-#define NV10_PGRAPH_COMBINER_COLOR0 0x00400E50
-#define NV10_PGRAPH_COMBINER_COLOR1 0x00400E54
-#define NV10_PGRAPH_COMBINER0_OUT_ALPHA 0x00400E58
-#define NV10_PGRAPH_COMBINER1_OUT_ALPHA 0x00400E5C
-#define NV10_PGRAPH_COMBINER0_OUT_RGB 0x00400E60
-#define NV10_PGRAPH_COMBINER1_OUT_RGB 0x00400E64
-#define NV10_PGRAPH_COMBINER_FINAL0 0x00400E68
-#define NV10_PGRAPH_COMBINER_FINAL1 0x00400E6C
-#define NV10_PGRAPH_WINDOWCLIP_HORIZONTAL 0x00400F00
-#define NV10_PGRAPH_WINDOWCLIP_VERTICAL 0x00400F20
-#define NV10_PGRAPH_XFMODE0 0x00400F40
-#define NV10_PGRAPH_XFMODE1 0x00400F44
-#define NV10_PGRAPH_GLOBALSTATE0 0x00400F48
-#define NV10_PGRAPH_GLOBALSTATE1 0x00400F4C
-#define NV10_PGRAPH_PIPE_ADDRESS 0x00400F50
-#define NV10_PGRAPH_PIPE_DATA 0x00400F54
-#define NV04_PGRAPH_DMA_START_0 0x00401000
-#define NV04_PGRAPH_DMA_START_1 0x00401004
-#define NV04_PGRAPH_DMA_LENGTH 0x00401008
-#define NV04_PGRAPH_DMA_MISC 0x0040100C
-#define NV04_PGRAPH_DMA_DATA_0 0x00401020
-#define NV04_PGRAPH_DMA_DATA_1 0x00401024
-#define NV04_PGRAPH_DMA_RM 0x00401030
-#define NV04_PGRAPH_DMA_A_XLATE_INST 0x00401040
-#define NV04_PGRAPH_DMA_A_CONTROL 0x00401044
-#define NV04_PGRAPH_DMA_A_LIMIT 0x00401048
-#define NV04_PGRAPH_DMA_A_TLB_PTE 0x0040104C
-#define NV04_PGRAPH_DMA_A_TLB_TAG 0x00401050
-#define NV04_PGRAPH_DMA_A_ADJ_OFFSET 0x00401054
-#define NV04_PGRAPH_DMA_A_OFFSET 0x00401058
-#define NV04_PGRAPH_DMA_A_SIZE 0x0040105C
-#define NV04_PGRAPH_DMA_A_Y_SIZE 0x00401060
-#define NV04_PGRAPH_DMA_B_XLATE_INST 0x00401080
-#define NV04_PGRAPH_DMA_B_CONTROL 0x00401084
-#define NV04_PGRAPH_DMA_B_LIMIT 0x00401088
-#define NV04_PGRAPH_DMA_B_TLB_PTE 0x0040108C
-#define NV04_PGRAPH_DMA_B_TLB_TAG 0x00401090
-#define NV04_PGRAPH_DMA_B_ADJ_OFFSET 0x00401094
-#define NV04_PGRAPH_DMA_B_OFFSET 0x00401098
-#define NV04_PGRAPH_DMA_B_SIZE 0x0040109C
-#define NV04_PGRAPH_DMA_B_Y_SIZE 0x004010A0
-#define NV40_PGRAPH_TILE1(i) (0x00406900 + (i*16))
-#define NV40_PGRAPH_TLIMIT1(i) (0x00406904 + (i*16))
-#define NV40_PGRAPH_TSIZE1(i) (0x00406908 + (i*16))
-#define NV40_PGRAPH_TSTATUS1(i) (0x0040690C + (i*16))
-
-#define NV_PCRTC_GPIO_EXT 0x0060081C
-
-/* It's a guess that this works on NV03. Confirmed on NV04, though */
-#define NV04_PFIFO_DELAY_0 0x00002040
-#define NV04_PFIFO_DMA_TIMESLICE 0x00002044
-#define NV04_PFIFO_NEXT_CHANNEL 0x00002050
-#define NV03_PFIFO_INTR_0 0x00002100
-#define NV03_PFIFO_INTR_EN_0 0x00002140
-# define NV_PFIFO_INTR_CACHE_ERROR (1<< 0)
-# define NV_PFIFO_INTR_RUNOUT (1<< 4)
-# define NV_PFIFO_INTR_RUNOUT_OVERFLOW (1<< 8)
-# define NV_PFIFO_INTR_DMA_PUSHER (1<<12)
-# define NV_PFIFO_INTR_DMA_PT (1<<16)
-# define NV_PFIFO_INTR_SEMAPHORE (1<<20)
-# define NV_PFIFO_INTR_ACQUIRE_TIMEOUT (1<<24)
-#define NV03_PFIFO_RAMHT 0x00002210
-#define NV03_PFIFO_RAMFC 0x00002214
-#define NV03_PFIFO_RAMRO 0x00002218
-#define NV40_PFIFO_RAMFC 0x00002220
-#define NV03_PFIFO_CACHES 0x00002500
-#define NV04_PFIFO_MODE 0x00002504
-#define NV04_PFIFO_DMA 0x00002508
-#define NV04_PFIFO_SIZE 0x0000250c
-#define NV50_PFIFO_CTX_TABLE(c) (0x2600+(c)*4)
-#define NV50_PFIFO_CTX_TABLE__SIZE 128
-#define NV50_PFIFO_CTX_TABLE_CHANNEL_ENABLED (1<<31)
-#define NV50_PFIFO_CTX_TABLE_UNK30_BAD (1<<30)
-#define NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G80 0x0FFFFFFF
-#define NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G84 0x00FFFFFF
-#define NV03_PFIFO_CACHE0_PUSH0 0x00003000
-#define NV03_PFIFO_CACHE0_PULL0 0x00003040
-#define NV04_PFIFO_CACHE0_PULL0 0x00003050
-#define NV04_PFIFO_CACHE0_PULL1 0x00003054
-#define NV03_PFIFO_CACHE1_PUSH0 0x00003200
-#define NV03_PFIFO_CACHE1_PUSH1 0x00003204
-#define NV03_PFIFO_CACHE1_PUSH1_DMA (1<<8)
-#define NV40_PFIFO_CACHE1_PUSH1_DMA (1<<16)
-#define NV03_PFIFO_CACHE1_PUSH1_CHID_MASK 0x0000000f
-#define NV10_PFIFO_CACHE1_PUSH1_CHID_MASK 0x0000001f
-#define NV50_PFIFO_CACHE1_PUSH1_CHID_MASK 0x0000007f
-#define NV03_PFIFO_CACHE1_PUT 0x00003210
-#define NV04_PFIFO_CACHE1_DMA_PUSH 0x00003220
-#define NV04_PFIFO_CACHE1_DMA_FETCH 0x00003224
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_8_BYTES 0x00000000
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_16_BYTES 0x00000008
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_24_BYTES 0x00000010
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_32_BYTES 0x00000018
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_40_BYTES 0x00000020
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_48_BYTES 0x00000028
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_56_BYTES 0x00000030
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_64_BYTES 0x00000038
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_72_BYTES 0x00000040
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_80_BYTES 0x00000048
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_88_BYTES 0x00000050
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_96_BYTES 0x00000058
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_104_BYTES 0x00000060
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_112_BYTES 0x00000068
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_120_BYTES 0x00000070
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES 0x00000078
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_136_BYTES 0x00000080
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_144_BYTES 0x00000088
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_152_BYTES 0x00000090
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_160_BYTES 0x00000098
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_168_BYTES 0x000000A0
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_176_BYTES 0x000000A8
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_184_BYTES 0x000000B0
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_192_BYTES 0x000000B8
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_200_BYTES 0x000000C0
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_208_BYTES 0x000000C8
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_216_BYTES 0x000000D0
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_224_BYTES 0x000000D8
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_232_BYTES 0x000000E0
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_240_BYTES 0x000000E8
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_248_BYTES 0x000000F0
-# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_256_BYTES 0x000000F8
-# define NV_PFIFO_CACHE1_DMA_FETCH_SIZE 0x0000E000
-# define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_32_BYTES 0x00000000
-# define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_64_BYTES 0x00002000
-# define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_96_BYTES 0x00004000
-# define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES 0x00006000
-# define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_160_BYTES 0x00008000
-# define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_192_BYTES 0x0000A000
-# define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_224_BYTES 0x0000C000
-# define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_256_BYTES 0x0000E000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS 0x001F0000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_0 0x00000000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_1 0x00010000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_2 0x00020000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_3 0x00030000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_4 0x00040000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_5 0x00050000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_6 0x00060000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_7 0x00070000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 0x00080000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_9 0x00090000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_10 0x000A0000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_11 0x000B0000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_12 0x000C0000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_13 0x000D0000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_14 0x000E0000
-# define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_15 0x000F0000
-# define NV_PFIFO_CACHE1_ENDIAN 0x80000000
-# define NV_PFIFO_CACHE1_LITTLE_ENDIAN 0x7FFFFFFF
-# define NV_PFIFO_CACHE1_BIG_ENDIAN 0x80000000
-#define NV04_PFIFO_CACHE1_DMA_STATE 0x00003228
-#define NV04_PFIFO_CACHE1_DMA_INSTANCE 0x0000322c
-#define NV04_PFIFO_CACHE1_DMA_CTL 0x00003230
-#define NV04_PFIFO_CACHE1_DMA_PUT 0x00003240
-#define NV04_PFIFO_CACHE1_DMA_GET 0x00003244
-#define NV10_PFIFO_CACHE1_REF_CNT 0x00003248
-#define NV10_PFIFO_CACHE1_DMA_SUBROUTINE 0x0000324C
-#define NV03_PFIFO_CACHE1_PULL0 0x00003240
-#define NV04_PFIFO_CACHE1_PULL0 0x00003250
-#define NV03_PFIFO_CACHE1_PULL1 0x00003250
-#define NV04_PFIFO_CACHE1_PULL1 0x00003254
-#define NV04_PFIFO_CACHE1_HASH 0x00003258
-#define NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT 0x00003260
-#define NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP 0x00003264
-#define NV10_PFIFO_CACHE1_ACQUIRE_VALUE 0x00003268
-#define NV10_PFIFO_CACHE1_SEMAPHORE 0x0000326C
-#define NV03_PFIFO_CACHE1_GET 0x00003270
-#define NV04_PFIFO_CACHE1_ENGINE 0x00003280
-#define NV04_PFIFO_CACHE1_DMA_DCOUNT 0x000032A0
-#define NV40_PFIFO_GRCTX_INSTANCE 0x000032E0
-#define NV40_PFIFO_UNK32E4 0x000032E4
-#define NV04_PFIFO_CACHE1_METHOD(i) (0x00003800+(i*8))
-#define NV04_PFIFO_CACHE1_DATA(i) (0x00003804+(i*8))
-#define NV40_PFIFO_CACHE1_METHOD(i) (0x00090000+(i*8))
-#define NV40_PFIFO_CACHE1_DATA(i) (0x00090004+(i*8))
-
-#define NV_CRTC0_INTSTAT 0x00600100
-#define NV_CRTC0_INTEN 0x00600140
-#define NV_CRTC1_INTSTAT 0x00602100
-#define NV_CRTC1_INTEN 0x00602140
-# define NV_CRTC_INTR_VBLANK (1<<0)
-
-/* This name is a partial guess. */
-#define NV50_DISPLAY_SUPERVISOR 0x00610024
-
-#define NV50_PDISPLAY_BACKLIGHT 0x0061c084
-# define NV50_PDISPLAY_BACKLIGHT_ENABLE 0x80000000
-
-/* Fifo commands. These are not regs, neither masks */
-#define NV03_FIFO_CMD_JUMP 0x20000000
-#define NV03_FIFO_CMD_JUMP_OFFSET_MASK 0x1ffffffc
-#define NV03_FIFO_CMD_REWIND (NV03_FIFO_CMD_JUMP | (0 & NV03_FIFO_CMD_JUMP_OFFSET_MASK))
-
-/* RAMFC offsets */
-#define NV04_RAMFC_DMA_PUT 0x00
-#define NV04_RAMFC_DMA_GET 0x04
-#define NV04_RAMFC_DMA_INSTANCE 0x08
-#define NV04_RAMFC_DMA_STATE 0x0C
-#define NV04_RAMFC_DMA_FETCH 0x10
-#define NV04_RAMFC_ENGINE 0x14
-#define NV04_RAMFC_PULL1_ENGINE 0x18
-
-#define NV10_RAMFC_DMA_PUT 0x00
-#define NV10_RAMFC_DMA_GET 0x04
-#define NV10_RAMFC_REF_CNT 0x08
-#define NV10_RAMFC_DMA_INSTANCE 0x0C
-#define NV10_RAMFC_DMA_STATE 0x10
-#define NV10_RAMFC_DMA_FETCH 0x14
-#define NV10_RAMFC_ENGINE 0x18
-#define NV10_RAMFC_PULL1_ENGINE 0x1C
-#define NV10_RAMFC_ACQUIRE_VALUE 0x20
-#define NV10_RAMFC_ACQUIRE_TIMESTAMP 0x24
-#define NV10_RAMFC_ACQUIRE_TIMEOUT 0x28
-#define NV10_RAMFC_SEMAPHORE 0x2C
-#define NV10_RAMFC_DMA_SUBROUTINE 0x30
-
-#define NV40_RAMFC_DMA_PUT 0x00
-#define NV40_RAMFC_DMA_GET 0x04
-#define NV40_RAMFC_REF_CNT 0x08
-#define NV40_RAMFC_DMA_INSTANCE 0x0C
-#define NV40_RAMFC_DMA_DCOUNT /* ? */ 0x10
-#define NV40_RAMFC_DMA_STATE 0x14
-#define NV40_RAMFC_DMA_FETCH 0x18
-#define NV40_RAMFC_ENGINE 0x1C
-#define NV40_RAMFC_PULL1_ENGINE 0x20
-#define NV40_RAMFC_ACQUIRE_VALUE 0x24
-#define NV40_RAMFC_ACQUIRE_TIMESTAMP 0x28
-#define NV40_RAMFC_ACQUIRE_TIMEOUT 0x2C
-#define NV40_RAMFC_SEMAPHORE 0x30
-#define NV40_RAMFC_DMA_SUBROUTINE 0x34
-#define NV40_RAMFC_GRCTX_INSTANCE /* guess */ 0x38
-#define NV40_RAMFC_DMA_TIMESLICE 0x3C
-#define NV40_RAMFC_UNK_40 0x40
-#define NV40_RAMFC_UNK_44 0x44
-#define NV40_RAMFC_UNK_48 0x48
-#define NV40_RAMFC_UNK_4C 0x4C
-#define NV40_RAMFC_UNK_50 0x50
-
+++ /dev/null
-/*
- * Copyright 2005 Stephane Marchesin
- * Copyright 2008 Stuart Bennett
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "drm_sarea.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-static int nouveau_init_card_mappings(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
-
- /* resource 0 is mmio regs */
- /* resource 1 is linear FB */
- /* resource 2 is RAMIN (mmio regs + 0x1000000) */
- /* resource 6 is bios */
-
- /* map the mmio regs */
- ret = drm_addmap(dev, drm_get_resource_start(dev, 0),
- drm_get_resource_len(dev, 0),
- _DRM_REGISTERS, _DRM_READ_ONLY, &dev_priv->mmio);
- if (ret) {
- DRM_ERROR("Unable to initialize the mmio mapping (%d). "
- "Please report your setup to " DRIVER_EMAIL "\n",
- ret);
- return -EINVAL;
- }
- DRM_DEBUG("regs mapped ok at 0x%lx\n", dev_priv->mmio->offset);
-
- /* map larger RAMIN aperture on NV40 cards */
- dev_priv->ramin = NULL;
- if (dev_priv->card_type >= NV_40) {
- int ramin_resource = 2;
- if (drm_get_resource_len(dev, ramin_resource) == 0)
- ramin_resource = 3;
-
- ret = drm_addmap(dev,
- drm_get_resource_start(dev, ramin_resource),
- drm_get_resource_len(dev, ramin_resource),
- _DRM_REGISTERS, _DRM_READ_ONLY,
- &dev_priv->ramin);
- if (ret) {
- DRM_ERROR("Failed to init RAMIN mapping, "
- "limited instance memory available\n");
- dev_priv->ramin = NULL;
- }
- }
-
- /* On older cards (or if the above failed), create a map covering
- * the BAR0 PRAMIN aperture */
- if (!dev_priv->ramin) {
- ret = drm_addmap(dev,
- drm_get_resource_start(dev, 0) + NV_RAMIN,
- (1*1024*1024),
- _DRM_REGISTERS, _DRM_READ_ONLY,
- &dev_priv->ramin);
- if (ret) {
- DRM_ERROR("Failed to map BAR0 PRAMIN: %d\n", ret);
- return ret;
- }
- }
-
- return 0;
-}
-
-static int nouveau_stub_init(struct drm_device *dev) { return 0; }
-static void nouveau_stub_takedown(struct drm_device *dev) {}
-
-static int nouveau_init_engine_ptrs(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
-
- switch (dev_priv->chipset & 0xf0) {
- case 0x00:
- engine->instmem.init = nv04_instmem_init;
- engine->instmem.takedown= nv04_instmem_takedown;
- engine->instmem.populate = nv04_instmem_populate;
- engine->instmem.clear = nv04_instmem_clear;
- engine->instmem.bind = nv04_instmem_bind;
- engine->instmem.unbind = nv04_instmem_unbind;
- engine->mc.init = nv04_mc_init;
- engine->mc.takedown = nv04_mc_takedown;
- engine->timer.init = nv04_timer_init;
- engine->timer.read = nv04_timer_read;
- engine->timer.takedown = nv04_timer_takedown;
- engine->fb.init = nv04_fb_init;
- engine->fb.takedown = nv04_fb_takedown;
- engine->graph.init = nv04_graph_init;
- engine->graph.takedown = nv04_graph_takedown;
- engine->graph.create_context = nv04_graph_create_context;
- engine->graph.destroy_context = nv04_graph_destroy_context;
- engine->graph.load_context = nv04_graph_load_context;
- engine->graph.save_context = nv04_graph_save_context;
- engine->fifo.channels = 16;
- engine->fifo.init = nouveau_fifo_init;
- engine->fifo.takedown = nouveau_stub_takedown;
- engine->fifo.channel_id = nv04_fifo_channel_id;
- engine->fifo.create_context = nv04_fifo_create_context;
- engine->fifo.destroy_context = nv04_fifo_destroy_context;
- engine->fifo.load_context = nv04_fifo_load_context;
- engine->fifo.save_context = nv04_fifo_save_context;
- break;
- case 0x10:
- engine->instmem.init = nv04_instmem_init;
- engine->instmem.takedown= nv04_instmem_takedown;
- engine->instmem.populate = nv04_instmem_populate;
- engine->instmem.clear = nv04_instmem_clear;
- engine->instmem.bind = nv04_instmem_bind;
- engine->instmem.unbind = nv04_instmem_unbind;
- engine->mc.init = nv04_mc_init;
- engine->mc.takedown = nv04_mc_takedown;
- engine->timer.init = nv04_timer_init;
- engine->timer.read = nv04_timer_read;
- engine->timer.takedown = nv04_timer_takedown;
- engine->fb.init = nv10_fb_init;
- engine->fb.takedown = nv10_fb_takedown;
- engine->graph.init = nv10_graph_init;
- engine->graph.takedown = nv10_graph_takedown;
- engine->graph.create_context = nv10_graph_create_context;
- engine->graph.destroy_context = nv10_graph_destroy_context;
- engine->graph.load_context = nv10_graph_load_context;
- engine->graph.save_context = nv10_graph_save_context;
- engine->fifo.channels = 32;
- engine->fifo.init = nouveau_fifo_init;
- engine->fifo.takedown = nouveau_stub_takedown;
- engine->fifo.channel_id = nv10_fifo_channel_id;
- engine->fifo.create_context = nv10_fifo_create_context;
- engine->fifo.destroy_context = nv10_fifo_destroy_context;
- engine->fifo.load_context = nv10_fifo_load_context;
- engine->fifo.save_context = nv10_fifo_save_context;
- break;
- case 0x20:
- engine->instmem.init = nv04_instmem_init;
- engine->instmem.takedown= nv04_instmem_takedown;
- engine->instmem.populate = nv04_instmem_populate;
- engine->instmem.clear = nv04_instmem_clear;
- engine->instmem.bind = nv04_instmem_bind;
- engine->instmem.unbind = nv04_instmem_unbind;
- engine->mc.init = nv04_mc_init;
- engine->mc.takedown = nv04_mc_takedown;
- engine->timer.init = nv04_timer_init;
- engine->timer.read = nv04_timer_read;
- engine->timer.takedown = nv04_timer_takedown;
- engine->fb.init = nv10_fb_init;
- engine->fb.takedown = nv10_fb_takedown;
- engine->graph.init = nv20_graph_init;
- engine->graph.takedown = nv20_graph_takedown;
- engine->graph.create_context = nv20_graph_create_context;
- engine->graph.destroy_context = nv20_graph_destroy_context;
- engine->graph.load_context = nv20_graph_load_context;
- engine->graph.save_context = nv20_graph_save_context;
- engine->fifo.channels = 32;
- engine->fifo.init = nouveau_fifo_init;
- engine->fifo.takedown = nouveau_stub_takedown;
- engine->fifo.channel_id = nv10_fifo_channel_id;
- engine->fifo.create_context = nv10_fifo_create_context;
- engine->fifo.destroy_context = nv10_fifo_destroy_context;
- engine->fifo.load_context = nv10_fifo_load_context;
- engine->fifo.save_context = nv10_fifo_save_context;
- break;
- case 0x30:
- engine->instmem.init = nv04_instmem_init;
- engine->instmem.takedown= nv04_instmem_takedown;
- engine->instmem.populate = nv04_instmem_populate;
- engine->instmem.clear = nv04_instmem_clear;
- engine->instmem.bind = nv04_instmem_bind;
- engine->instmem.unbind = nv04_instmem_unbind;
- engine->mc.init = nv04_mc_init;
- engine->mc.takedown = nv04_mc_takedown;
- engine->timer.init = nv04_timer_init;
- engine->timer.read = nv04_timer_read;
- engine->timer.takedown = nv04_timer_takedown;
- engine->fb.init = nv10_fb_init;
- engine->fb.takedown = nv10_fb_takedown;
- engine->graph.init = nv30_graph_init;
- engine->graph.takedown = nv20_graph_takedown;
- engine->graph.create_context = nv20_graph_create_context;
- engine->graph.destroy_context = nv20_graph_destroy_context;
- engine->graph.load_context = nv20_graph_load_context;
- engine->graph.save_context = nv20_graph_save_context;
- engine->fifo.channels = 32;
- engine->fifo.init = nouveau_fifo_init;
- engine->fifo.takedown = nouveau_stub_takedown;
- engine->fifo.channel_id = nv10_fifo_channel_id;
- engine->fifo.create_context = nv10_fifo_create_context;
- engine->fifo.destroy_context = nv10_fifo_destroy_context;
- engine->fifo.load_context = nv10_fifo_load_context;
- engine->fifo.save_context = nv10_fifo_save_context;
- break;
- case 0x40:
- case 0x60:
- engine->instmem.init = nv04_instmem_init;
- engine->instmem.takedown= nv04_instmem_takedown;
- engine->instmem.populate = nv04_instmem_populate;
- engine->instmem.clear = nv04_instmem_clear;
- engine->instmem.bind = nv04_instmem_bind;
- engine->instmem.unbind = nv04_instmem_unbind;
- engine->mc.init = nv40_mc_init;
- engine->mc.takedown = nv40_mc_takedown;
- engine->timer.init = nv04_timer_init;
- engine->timer.read = nv04_timer_read;
- engine->timer.takedown = nv04_timer_takedown;
- engine->fb.init = nv40_fb_init;
- engine->fb.takedown = nv40_fb_takedown;
- engine->graph.init = nv40_graph_init;
- engine->graph.takedown = nv40_graph_takedown;
- engine->graph.create_context = nv40_graph_create_context;
- engine->graph.destroy_context = nv40_graph_destroy_context;
- engine->graph.load_context = nv40_graph_load_context;
- engine->graph.save_context = nv40_graph_save_context;
- engine->fifo.channels = 32;
- engine->fifo.init = nv40_fifo_init;
- engine->fifo.takedown = nouveau_stub_takedown;
- engine->fifo.channel_id = nv10_fifo_channel_id;
- engine->fifo.create_context = nv40_fifo_create_context;
- engine->fifo.destroy_context = nv40_fifo_destroy_context;
- engine->fifo.load_context = nv40_fifo_load_context;
- engine->fifo.save_context = nv40_fifo_save_context;
- break;
- case 0x50:
- case 0x80: /* gotta love NVIDIA's consistency.. */
- case 0x90:
- case 0xA0:
- engine->instmem.init = nv50_instmem_init;
- engine->instmem.takedown= nv50_instmem_takedown;
- engine->instmem.populate = nv50_instmem_populate;
- engine->instmem.clear = nv50_instmem_clear;
- engine->instmem.bind = nv50_instmem_bind;
- engine->instmem.unbind = nv50_instmem_unbind;
- engine->mc.init = nv50_mc_init;
- engine->mc.takedown = nv50_mc_takedown;
- engine->timer.init = nv04_timer_init;
- engine->timer.read = nv04_timer_read;
- engine->timer.takedown = nv04_timer_takedown;
- engine->fb.init = nouveau_stub_init;
- engine->fb.takedown = nouveau_stub_takedown;
- engine->graph.init = nv50_graph_init;
- engine->graph.takedown = nv50_graph_takedown;
- engine->graph.create_context = nv50_graph_create_context;
- engine->graph.destroy_context = nv50_graph_destroy_context;
- engine->graph.load_context = nv50_graph_load_context;
- engine->graph.save_context = nv50_graph_save_context;
- engine->fifo.channels = 128;
- engine->fifo.init = nv50_fifo_init;
- engine->fifo.takedown = nv50_fifo_takedown;
- engine->fifo.channel_id = nv50_fifo_channel_id;
- engine->fifo.create_context = nv50_fifo_create_context;
- engine->fifo.destroy_context = nv50_fifo_destroy_context;
- engine->fifo.load_context = nv50_fifo_load_context;
- engine->fifo.save_context = nv50_fifo_save_context;
- break;
- default:
- DRM_ERROR("NV%02x unsupported\n", dev_priv->chipset);
- return 1;
- }
-
- return 0;
-}
-
-int
-nouveau_card_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine;
- int ret;
-
- DRM_DEBUG("prev state = %d\n", dev_priv->init_state);
-
- if (dev_priv->init_state == NOUVEAU_CARD_INIT_DONE)
- return 0;
- dev_priv->ttm = 0;
-
- /* Determine exact chipset we're running on */
- if (dev_priv->card_type < NV_10)
- dev_priv->chipset = dev_priv->card_type;
- else
- dev_priv->chipset =
- (NV_READ(NV03_PMC_BOOT_0) & 0x0ff00000) >> 20;
-
- /* Initialise internal driver API hooks */
- ret = nouveau_init_engine_ptrs(dev);
- if (ret) return ret;
- engine = &dev_priv->Engine;
- dev_priv->init_state = NOUVEAU_CARD_INIT_FAILED;
-
- ret = nouveau_gpuobj_early_init(dev);
- if (ret) return ret;
-
- /* Initialise instance memory, must happen before mem_init so we
- * know exactly how much VRAM we're able to use for "normal"
- * purposes.
- */
- ret = engine->instmem.init(dev);
- if (ret) return ret;
-
- /* Setup the memory manager */
- if (dev_priv->ttm) {
- ret = nouveau_mem_init_ttm(dev);
- if (ret) return ret;
- } else {
- ret = nouveau_mem_init(dev);
- if (ret) return ret;
- }
-
- ret = nouveau_gpuobj_init(dev);
- if (ret) return ret;
-
- /* Parse BIOS tables / Run init tables? */
-
- /* PMC */
- ret = engine->mc.init(dev);
- if (ret) return ret;
-
- /* PTIMER */
- ret = engine->timer.init(dev);
- if (ret) return ret;
-
- /* PFB */
- ret = engine->fb.init(dev);
- if (ret) return ret;
-
- /* PGRAPH */
- ret = engine->graph.init(dev);
- if (ret) return ret;
-
- /* PFIFO */
- ret = engine->fifo.init(dev);
- if (ret) return ret;
-
- /* this call irq_preinstall, register irq handler and
- * call irq_postinstall
- */
- ret = drm_irq_install(dev);
- if (ret) return ret;
-
- /* what about PVIDEO/PCRTC/PRAMDAC etc? */
-
- ret = nouveau_dma_channel_init(dev);
- if (ret) return ret;
-
- ret = nouveau_backlight_init(dev);
- if (ret)
- DRM_ERROR("Error code %d when trying to register backlight\n",
- ret);
-
- dev_priv->init_state = NOUVEAU_CARD_INIT_DONE;
- return 0;
-}
-
-static void nouveau_card_takedown(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
-
- DRM_DEBUG("prev state = %d\n", dev_priv->init_state);
-
- if (dev_priv->init_state != NOUVEAU_CARD_INIT_DOWN) {
- nouveau_backlight_exit(dev);
-
- nouveau_dma_channel_takedown(dev);
-
- engine->fifo.takedown(dev);
- engine->graph.takedown(dev);
- engine->fb.takedown(dev);
- engine->timer.takedown(dev);
- engine->mc.takedown(dev);
-
- nouveau_sgdma_nottm_hack_takedown(dev);
- nouveau_sgdma_takedown(dev);
-
- nouveau_gpuobj_takedown(dev);
- nouveau_gpuobj_del(dev, &dev_priv->vm_vram_pt);
-
- nouveau_mem_close(dev);
- engine->instmem.takedown(dev);
-
- drm_irq_uninstall(dev);
-
- nouveau_gpuobj_late_takedown(dev);
-
- dev_priv->init_state = NOUVEAU_CARD_INIT_DOWN;
- }
-}
-
-/* here a client dies, release the stuff that was allocated for its
- * file_priv */
-void nouveau_preclose(struct drm_device *dev, struct drm_file *file_priv)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- nouveau_fifo_cleanup(dev, file_priv);
- nouveau_mem_release(file_priv,dev_priv->fb_heap);
- nouveau_mem_release(file_priv,dev_priv->agp_heap);
- nouveau_mem_release(file_priv,dev_priv->pci_heap);
-}
-
-/* first module load, setup the mmio/fb mapping */
-int nouveau_firstopen(struct drm_device *dev)
-{
-#if defined(__powerpc__)
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct device_node *dn;
-#endif
- int ret;
- /* Map any PCI resources we need on the card */
- ret = nouveau_init_card_mappings(dev);
- if (ret) return ret;
-
-#if defined(__powerpc__)
- /* Put the card in BE mode if it's not */
- if (NV_READ(NV03_PMC_BOOT_1))
- NV_WRITE(NV03_PMC_BOOT_1,0x00000001);
-
- DRM_MEMORYBARRIER();
-#endif
-
-#if defined(__linux__) && defined(__powerpc__)
- /* if we have an OF card, copy vbios to RAMIN */
- dn = pci_device_to_OF_node(dev->pdev);
- if (dn)
- {
- int size;
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
- const uint32_t *bios = of_get_property(dn, "NVDA,BMP", &size);
-#else
- const uint32_t *bios = get_property(dn, "NVDA,BMP", &size);
-#endif
- if (bios)
- {
- int i;
- for(i=0;i<size;i+=4)
- NV_WI32(i, bios[i/4]);
- DRM_INFO("OF bios successfully copied (%d bytes)\n",size);
- }
- else
- DRM_INFO("Unable to get the OF bios\n");
- }
- else
- DRM_INFO("Unable to get the OF node\n");
-#endif
- return 0;
-}
-
-#define NV40_CHIPSET_MASK 0x00000baf
-#define NV44_CHIPSET_MASK 0x00005450
-
-int nouveau_load(struct drm_device *dev, unsigned long flags)
-{
- struct drm_nouveau_private *dev_priv;
- void __iomem *regs;
- uint32_t reg0,reg1;
- uint8_t architecture = 0;
-
- dev_priv = drm_calloc(1, sizeof(*dev_priv), DRM_MEM_DRIVER);
- if (!dev_priv)
- return -ENOMEM;
-
- dev_priv->flags = flags & NOUVEAU_FLAGS;
- dev_priv->init_state = NOUVEAU_CARD_INIT_DOWN;
-
- DRM_DEBUG("vendor: 0x%X device: 0x%X class: 0x%X\n", dev->pci_vendor, dev->pci_device, dev->pdev->class);
-
- /* Time to determine the card architecture */
- regs = ioremap_nocache(pci_resource_start(dev->pdev, 0), 0x8);
- if (!regs) {
- DRM_ERROR("Could not ioremap to determine register\n");
- return -ENOMEM;
- }
-
- reg0 = readl(regs+NV03_PMC_BOOT_0);
- reg1 = readl(regs+NV03_PMC_BOOT_1);
-#if defined(__powerpc__)
- if (reg1)
- reg0=__swab32(reg0);
-#endif
-
- /* We're dealing with >=NV10 */
- if ((reg0 & 0x0f000000) > 0 ) {
- /* Bit 27-20 contain the architecture in hex */
- architecture = (reg0 & 0xff00000) >> 20;
- /* NV04 or NV05 */
- } else if ((reg0 & 0xff00fff0) == 0x20004000) {
- architecture = 0x04;
- }
-
- iounmap(regs);
-
- if (architecture >= 0x80) {
- dev_priv->card_type = NV_50;
- } else if (architecture >= 0x60) {
- /* FIXME we need to figure out who's who for NV6x */
- dev_priv->card_type = NV_44;
- } else if (architecture >= 0x50) {
- dev_priv->card_type = NV_50;
- } else if (architecture >= 0x40) {
- uint8_t subarch = architecture & 0xf;
- /* Selection criteria borrowed from NV40EXA */
- if (NV40_CHIPSET_MASK & (1 << subarch)) {
- dev_priv->card_type = NV_40;
- } else if (NV44_CHIPSET_MASK & (1 << subarch)) {
- dev_priv->card_type = NV_44;
- } else {
- dev_priv->card_type = NV_UNKNOWN;
- }
- } else if (architecture >= 0x30) {
- dev_priv->card_type = NV_30;
- } else if (architecture >= 0x20) {
- dev_priv->card_type = NV_20;
- } else if (architecture >= 0x17) {
- dev_priv->card_type = NV_17;
- } else if (architecture >= 0x11) {
- dev_priv->card_type = NV_11;
- } else if (architecture >= 0x10) {
- dev_priv->card_type = NV_10;
- } else if (architecture >= 0x04) {
- dev_priv->card_type = NV_04;
- } else {
- dev_priv->card_type = NV_UNKNOWN;
- }
-
- DRM_INFO("Detected an NV%d generation card (0x%08x)\n", dev_priv->card_type,reg0);
-
- if (dev_priv->card_type == NV_UNKNOWN) {
- return -EINVAL;
- }
-
- /* Special flags */
- if (dev->pci_device == 0x01a0) {
- dev_priv->flags |= NV_NFORCE;
- } else if (dev->pci_device == 0x01f0) {
- dev_priv->flags |= NV_NFORCE2;
- }
-
- dev->dev_private = (void *)dev_priv;
-
- return 0;
-}
-
-void nouveau_lastclose(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- /* In the case of an error dev_priv may not be be allocated yet */
- if (dev_priv && dev_priv->card_type) {
- nouveau_card_takedown(dev);
-
- if(dev_priv->fb_mtrr>0)
- {
- drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1),nouveau_mem_fb_amount(dev), DRM_MTRR_WC);
- dev_priv->fb_mtrr=0;
- }
- }
-}
-
-int nouveau_unload(struct drm_device *dev)
-{
- drm_free(dev->dev_private, sizeof(*dev->dev_private), DRM_MEM_DRIVER);
- dev->dev_private = NULL;
- return 0;
-}
-
-int
-nouveau_ioctl_card_init(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- return nouveau_card_init(dev);
-}
-
-int nouveau_ioctl_getparam(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_nouveau_getparam *getparam = data;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
-
- switch (getparam->param) {
- case NOUVEAU_GETPARAM_CHIPSET_ID:
- getparam->value = dev_priv->chipset;
- break;
- case NOUVEAU_GETPARAM_PCI_VENDOR:
- getparam->value=dev->pci_vendor;
- break;
- case NOUVEAU_GETPARAM_PCI_DEVICE:
- getparam->value=dev->pci_device;
- break;
- case NOUVEAU_GETPARAM_BUS_TYPE:
- if (drm_device_is_agp(dev))
- getparam->value=NV_AGP;
- else if (drm_device_is_pcie(dev))
- getparam->value=NV_PCIE;
- else
- getparam->value=NV_PCI;
- break;
- case NOUVEAU_GETPARAM_FB_PHYSICAL:
- getparam->value=dev_priv->fb_phys;
- break;
- case NOUVEAU_GETPARAM_AGP_PHYSICAL:
- getparam->value=dev_priv->gart_info.aper_base;
- break;
- case NOUVEAU_GETPARAM_PCI_PHYSICAL:
- if ( dev -> sg )
- getparam->value=(unsigned long)dev->sg->virtual;
- else
- {
- DRM_ERROR("Requested PCIGART address, while no PCIGART was created\n");
- return -EINVAL;
- }
- break;
- case NOUVEAU_GETPARAM_FB_SIZE:
- getparam->value=dev_priv->fb_available_size;
- break;
- case NOUVEAU_GETPARAM_AGP_SIZE:
- getparam->value=dev_priv->gart_info.aper_size;
- break;
- case NOUVEAU_GETPARAM_MM_ENABLED:
- getparam->value = 0;
- break;
- case NOUVEAU_GETPARAM_VM_VRAM_BASE:
- if (dev_priv->card_type >= NV_50)
- getparam->value = 0x20000000;
- else
- getparam->value = 0;
- break;
- default:
- DRM_ERROR("unknown parameter %lld\n", getparam->param);
- return -EINVAL;
- }
-
- return 0;
-}
-
-int nouveau_ioctl_setparam(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct drm_nouveau_setparam *setparam = data;
-
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
-
- switch (setparam->param) {
- case NOUVEAU_SETPARAM_CMDBUF_LOCATION:
- switch (setparam->value) {
- case NOUVEAU_MEM_AGP:
- case NOUVEAU_MEM_FB:
- case NOUVEAU_MEM_PCI:
- case NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI_ACCEPTABLE:
- break;
- default:
- DRM_ERROR("invalid CMDBUF_LOCATION value=%lld\n",
- setparam->value);
- return -EINVAL;
- }
- dev_priv->config.cmdbuf.location = setparam->value;
- break;
- case NOUVEAU_SETPARAM_CMDBUF_SIZE:
- dev_priv->config.cmdbuf.size = setparam->value;
- break;
- default:
- DRM_ERROR("unknown parameter %lld\n", setparam->param);
- return -EINVAL;
- }
-
- return 0;
-}
-
-/* waits for idle */
-void nouveau_wait_for_idle(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv=dev->dev_private;
- switch(dev_priv->card_type) {
- case NV_50:
- break;
- default: {
- /* This stuff is more or less a copy of what is seen
- * in nv28 kmmio dump.
- */
- uint64_t started = dev_priv->Engine.timer.read(dev);
- uint64_t stopped = started;
- uint32_t status;
- do {
- uint32_t pmc_e = NV_READ(NV03_PMC_ENABLE);
- (void)pmc_e;
- status = NV_READ(NV04_PGRAPH_STATUS);
- if (!status)
- break;
- stopped = dev_priv->Engine.timer.read(dev);
- /* It'll never wrap anyway... */
- } while (stopped - started < 1000000000ULL);
- if (status)
- DRM_ERROR("timed out with status 0x%08x\n",
- status);
- }
- }
-}
-
-static int nouveau_suspend(struct drm_device *dev)
-{
- struct mem_block *p;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_suspend_resume *susres = &dev_priv->susres;
- struct nouveau_engine *engine = &dev_priv->Engine;
- struct nouveau_channel *current_fifo;
- int i;
-
- if (dev_priv->card_type >= NV_50) {
- DRM_DEBUG("Suspend not supported for NV50+\n");
- return -ENODEV;
- }
-
- drm_free(susres->ramin_copy, susres->ramin_size, DRM_MEM_DRIVER);
- susres->ramin_size = 0;
- list_for_each(p, dev_priv->ramin_heap)
- if (p->file_priv && (p->start + p->size) > susres->ramin_size)
- susres->ramin_size = p->start + p->size;
- if (!(susres->ramin_copy = drm_alloc(susres->ramin_size, DRM_MEM_DRIVER))) {
- DRM_ERROR("Couldn't alloc RAMIN backing for suspend\n");
- return -ENOMEM;
- }
-
- for (i = 0; i < engine->fifo.channels; i++) {
- uint64_t t_start = engine->timer.read(dev);
-
- if (dev_priv->fifos[i] == NULL)
- continue;
-
- /* Give the channel a chance to idle, wait 2s (hopefully) */
- while (!nouveau_channel_idle(dev_priv->fifos[i]))
- if (engine->timer.read(dev) - t_start > 2000000000ULL) {
- DRM_ERROR("Failed to idle channel %d before"
- "suspend.", dev_priv->fifos[i]->id);
- return -EBUSY;
- }
- }
- nouveau_wait_for_idle(dev);
-
- NV_WRITE(NV04_PGRAPH_FIFO, 0);
- /* disable the fifo caches */
- NV_WRITE(NV03_PFIFO_CACHES, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH,
- NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH) & ~1);
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000000);
-
- susres->fifo_mode = NV_READ(NV04_PFIFO_MODE);
-
- if (dev_priv->card_type >= NV_10) {
- susres->graph_state = NV_READ(NV10_PGRAPH_STATE);
- susres->graph_ctx_control = NV_READ(NV10_PGRAPH_CTX_CONTROL);
- } else {
- susres->graph_state = NV_READ(NV04_PGRAPH_STATE);
- susres->graph_ctx_control = NV_READ(NV04_PGRAPH_CTX_CONTROL);
- }
-
- current_fifo = dev_priv->fifos[engine->fifo.channel_id(dev)];
- /* channel may have been deleted but no replacement yet loaded */
- if (current_fifo) {
- engine->fifo.save_context(current_fifo);
- engine->graph.save_context(current_fifo);
- }
- nouveau_wait_for_idle(dev);
-
- for (i = 0; i < susres->ramin_size / 4; i++)
- susres->ramin_copy[i] = NV_RI32(i << 2);
-
- /* reenable the fifo caches */
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH,
- NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH) | 1);
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000001);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000001);
- NV_WRITE(NV03_PFIFO_CACHES, 0x00000001);
- NV_WRITE(NV04_PGRAPH_FIFO, 1);
-
- return 0;
-}
-
-static int nouveau_resume(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_suspend_resume *susres = &dev_priv->susres;
- struct nouveau_engine *engine = &dev_priv->Engine;
- int i;
-
- if (!susres->ramin_copy)
- return -EINVAL;
-
- DRM_DEBUG("Doing resume\n");
-
- if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
- struct drm_agp_info info;
- struct drm_agp_mode mode;
-
- /* agp bridge drivers don't re-enable agp on resume. lame. */
- if ((i = drm_agp_info(dev, &info))) {
- DRM_ERROR("Unable to get AGP info: %d\n", i);
- return i;
- }
- mode.mode = info.mode;
- if ((i = drm_agp_enable(dev, mode))) {
- DRM_ERROR("Unable to enable AGP: %d\n", i);
- return i;
- }
- }
-
- for (i = 0; i < susres->ramin_size / 4; i++)
- NV_WI32(i << 2, susres->ramin_copy[i]);
-
- engine->mc.init(dev);
- engine->timer.init(dev);
- engine->fb.init(dev);
- engine->graph.init(dev);
- engine->fifo.init(dev);
-
- NV_WRITE(NV04_PGRAPH_FIFO, 0);
- /* disable the fifo caches */
- NV_WRITE(NV03_PFIFO_CACHES, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH,
- NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH) & ~1);
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000000);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000000);
-
- /* PMC power cycling PFIFO in init clobbers some of the stuff stored in
- * PRAMIN (such as NV04_PFIFO_CACHE1_DMA_INSTANCE). this is unhelpful
- */
- for (i = 0; i < susres->ramin_size / 4; i++)
- NV_WI32(i << 2, susres->ramin_copy[i]);
-
- engine->fifo.load_context(dev_priv->fifos[0]);
- NV_WRITE(NV04_PFIFO_MODE, susres->fifo_mode);
-
- engine->graph.load_context(dev_priv->fifos[0]);
- nouveau_wait_for_idle(dev);
-
- if (dev_priv->card_type >= NV_10) {
- NV_WRITE(NV10_PGRAPH_STATE, susres->graph_state);
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, susres->graph_ctx_control);
- } else {
- NV_WRITE(NV04_PGRAPH_STATE, susres->graph_state);
- NV_WRITE(NV04_PGRAPH_CTX_CONTROL, susres->graph_ctx_control);
- }
-
- /* reenable the fifo caches */
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH,
- NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH) | 1);
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000001);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000001);
- NV_WRITE(NV03_PFIFO_CACHES, 0x00000001);
- NV_WRITE(NV04_PGRAPH_FIFO, 0x1);
-
- if (dev->irq_enabled)
- nouveau_irq_postinstall(dev);
-
- drm_free(susres->ramin_copy, susres->ramin_size, DRM_MEM_DRIVER);
- susres->ramin_copy = NULL;
- susres->ramin_size = 0;
-
- return 0;
-}
-
-int nouveau_ioctl_suspend(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
-
- return nouveau_suspend(dev);
-}
-
-int nouveau_ioctl_resume(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
-
- return nouveau_resume(dev);
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Arthur Huillet.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/*
- * Authors:
- * Arthur Huillet <arthur.huillet AT free DOT fr>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_reg.h"
-
-/*TODO: add a "card_type" attribute*/
-typedef struct{
- uint32_t oclass; /* object class for this software method */
- uint32_t mthd; /* method number */
- void (*method_code)(struct drm_device *dev, uint32_t oclass, uint32_t mthd); /* pointer to the function that does the work */
- } nouveau_software_method_t;
-
-
- /* This function handles the NV04 setcontext software methods.
-One function for all because they are very similar.*/
-static void nouveau_NV04_setcontext_sw_method(struct drm_device *dev, uint32_t oclass, uint32_t mthd) {
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t inst_loc = NV_READ(NV04_PGRAPH_CTX_SWITCH4) & 0xFFFF;
- uint32_t value_to_set = 0, bit_to_set = 0;
-
- switch ( oclass ) {
- case 0x4a:
- switch ( mthd ) {
- case 0x188 :
- case 0x18c :
- bit_to_set = 0;
- break;
- case 0x198 :
- bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/
- break;
- case 0x2fc :
- bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; /*PATCH_CONFIG = NV04_PGRAPH_TRAPPED_DATA*/
- break;
- default : ;
- };
- break;
- case 0x5c:
- switch ( mthd ) {
- case 0x184:
- bit_to_set = 1 << 13; /*USER_CLIP_ENABLE*/
- break;
- case 0x188:
- case 0x18c:
- bit_to_set = 0;
- break;
- case 0x198:
- bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/
- break;
- case 0x2fc :
- bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; /*PATCH_CONFIG = NV04_PGRAPH_TRAPPED_DATA*/
- break;
- };
- break;
- case 0x5f:
- switch ( mthd ) {
- case 0x184 :
- bit_to_set = 1 << 12; /*CHROMA_KEY_ENABLE*/
- break;
- case 0x188 :
- bit_to_set = 1 << 13; /*USER_CLIP_ENABLE*/
- break;
- case 0x18c :
- case 0x190 :
- bit_to_set = 0;
- break;
- case 0x19c :
- bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/
- break;
- case 0x2fc :
- bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; /*PATCH_CONFIG = NV04_PGRAPH_TRAPPED_DATA*/
- break;
- };
- break;
- case 0x61:
- switch ( mthd ) {
- case 0x188 :
- bit_to_set = 1 << 13; /*USER_CLIP_ENABLE*/
- break;
- case 0x18c :
- case 0x190 :
- bit_to_set = 0;
- break;
- case 0x19c :
- bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/
- break;
- case 0x2fc :
- bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; /*PATCH_CONFIG = NV04_PGRAPH_TRAPPED_DATA*/
- break;
- };
- break;
- case 0x77:
- switch ( mthd ) {
- case 0x198 :
- bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/
- break;
- case 0x304 :
- bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; //PATCH_CONFIG
- break;
- };
- break;
- default :;
- };
-
- value_to_set = (NV_READ(0x00700000 | inst_loc << 4))| bit_to_set;
-
- /*RAMIN*/
- nouveau_wait_for_idle(dev);
- NV_WRITE(0x00700000 | inst_loc << 4, value_to_set);
-
- /*DRM_DEBUG("CTX_SWITCH1 value is %#x\n", NV_READ(NV04_PGRAPH_CTX_SWITCH1));*/
- NV_WRITE(NV04_PGRAPH_CTX_SWITCH1, value_to_set);
-
- /*DRM_DEBUG("CTX_CACHE1 + xxx value is %#x\n", NV_READ(NV04_PGRAPH_CTX_CACHE1 + (((NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7) << 2)));*/
- NV_WRITE(NV04_PGRAPH_CTX_CACHE1 + (((NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7) << 2), value_to_set);
-}
-
- nouveau_software_method_t nouveau_sw_methods[] = {
- /*NV04 context software methods*/
- { 0x4a, 0x188, nouveau_NV04_setcontext_sw_method },
- { 0x4a, 0x18c, nouveau_NV04_setcontext_sw_method },
- { 0x4a, 0x198, nouveau_NV04_setcontext_sw_method },
- { 0x4a, 0x2fc, nouveau_NV04_setcontext_sw_method },
- { 0x5c, 0x184, nouveau_NV04_setcontext_sw_method },
- { 0x5c, 0x188, nouveau_NV04_setcontext_sw_method },
- { 0x5c, 0x18c, nouveau_NV04_setcontext_sw_method },
- { 0x5c, 0x198, nouveau_NV04_setcontext_sw_method },
- { 0x5c, 0x2fc, nouveau_NV04_setcontext_sw_method },
- { 0x5f, 0x184, nouveau_NV04_setcontext_sw_method },
- { 0x5f, 0x188, nouveau_NV04_setcontext_sw_method },
- { 0x5f, 0x18c, nouveau_NV04_setcontext_sw_method },
- { 0x5f, 0x190, nouveau_NV04_setcontext_sw_method },
- { 0x5f, 0x19c, nouveau_NV04_setcontext_sw_method },
- { 0x5f, 0x2fc, nouveau_NV04_setcontext_sw_method },
- { 0x61, 0x188, nouveau_NV04_setcontext_sw_method },
- { 0x61, 0x18c, nouveau_NV04_setcontext_sw_method },
- { 0x61, 0x190, nouveau_NV04_setcontext_sw_method },
- { 0x61, 0x19c, nouveau_NV04_setcontext_sw_method },
- { 0x61, 0x2fc, nouveau_NV04_setcontext_sw_method },
- { 0x77, 0x198, nouveau_NV04_setcontext_sw_method },
- { 0x77, 0x304, nouveau_NV04_setcontext_sw_method },
- /*terminator*/
- { 0x0, 0x0, NULL, },
- };
-
- int nouveau_sw_method_execute(struct drm_device *dev, uint32_t oclass, uint32_t method) {
- int i = 0;
- while ( nouveau_sw_methods[ i ] . method_code != NULL )
- {
- if ( nouveau_sw_methods[ i ] . oclass == oclass && nouveau_sw_methods[ i ] . mthd == method )
- {
- nouveau_sw_methods[ i ] . method_code(dev, oclass, method);
- return 0;
- }
- i ++;
- }
-
- return 1;
- }
+++ /dev/null
-/*
- * Copyright (C) 2007 Arthur Huillet.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/*
- * Authors:
- * Arthur Huillet <arthur.huillet AT free DOT fr>
- */
-
-int nouveau_sw_method_execute(struct drm_device *dev, uint32_t oclass, uint32_t method); /* execute the given software method, returns 0 on success */
+++ /dev/null
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-int
-nv04_fb_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- /* This is what the DDX did for NV_ARCH_04, but a mmio-trace shows
- * nvidia reading PFB_CFG_0, then writing back its original value.
- * (which was 0x701114 in this case)
- */
- NV_WRITE(NV04_PFB_CFG0, 0x1114);
-
- return 0;
-}
-
-void
-nv04_fb_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-
-#define RAMFC_WR(offset,val) INSTANCE_WR(chan->ramfc->gpuobj, \
- NV04_RAMFC_##offset/4, (val))
-#define RAMFC_RD(offset) INSTANCE_RD(chan->ramfc->gpuobj, \
- NV04_RAMFC_##offset/4)
-#define NV04_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV04_RAMFC__SIZE))
-#define NV04_RAMFC__SIZE 32
-
-int
-nv04_fifo_channel_id(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- return (NV_READ(NV03_PFIFO_CACHE1_PUSH1) &
- NV03_PFIFO_CACHE1_PUSH1_CHID_MASK);
-}
-
-int
-nv04_fifo_create_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
-
- if ((ret = nouveau_gpuobj_new_fake(dev, NV04_RAMFC(chan->id), ~0,
- NV04_RAMFC__SIZE,
- NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ZERO_FREE,
- NULL, &chan->ramfc)))
- return ret;
-
- /* Setup initial state */
- RAMFC_WR(DMA_PUT, chan->pushbuf_base);
- RAMFC_WR(DMA_GET, chan->pushbuf_base);
- RAMFC_WR(DMA_INSTANCE, chan->pushbuf->instance >> 4);
- RAMFC_WR(DMA_FETCH, (NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
- NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |
- NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |
-#ifdef __BIG_ENDIAN
- NV_PFIFO_CACHE1_BIG_ENDIAN |
-#endif
- 0));
-
- /* enable the fifo dma operation */
- NV_WRITE(NV04_PFIFO_MODE,NV_READ(NV04_PFIFO_MODE) | (1<<chan->id));
- return 0;
-}
-
-void
-nv04_fifo_destroy_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<<chan->id));
-
- nouveau_gpuobj_ref_del(dev, &chan->ramfc);
-}
-
-int
-nv04_fifo_load_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t tmp;
-
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH1,
- NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id);
-
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET, RAMFC_RD(DMA_GET));
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT, RAMFC_RD(DMA_PUT));
-
- tmp = RAMFC_RD(DMA_INSTANCE);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE, tmp & 0xFFFF);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_DCOUNT, tmp >> 16);
-
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE, RAMFC_RD(DMA_STATE));
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_FETCH, RAMFC_RD(DMA_FETCH));
- NV_WRITE(NV04_PFIFO_CACHE1_ENGINE, RAMFC_RD(ENGINE));
- NV_WRITE(NV04_PFIFO_CACHE1_PULL1, RAMFC_RD(PULL1_ENGINE));
-
- /* Reset NV04_PFIFO_CACHE1_DMA_CTL_AT_INFO to INVALID */
- tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_CTL) & ~(1<<31);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_CTL, tmp);
-
- return 0;
-}
-
-int
-nv04_fifo_save_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t tmp;
-
- RAMFC_WR(DMA_PUT, NV_READ(NV04_PFIFO_CACHE1_DMA_PUT));
- RAMFC_WR(DMA_GET, NV_READ(NV04_PFIFO_CACHE1_DMA_GET));
-
- tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_DCOUNT) << 16;
- tmp |= NV_READ(NV04_PFIFO_CACHE1_DMA_INSTANCE);
- RAMFC_WR(DMA_INSTANCE, tmp);
-
- RAMFC_WR(DMA_STATE, NV_READ(NV04_PFIFO_CACHE1_DMA_STATE));
- RAMFC_WR(DMA_FETCH, NV_READ(NV04_PFIFO_CACHE1_DMA_FETCH));
- RAMFC_WR(ENGINE, NV_READ(NV04_PFIFO_CACHE1_ENGINE));
- RAMFC_WR(PULL1_ENGINE, NV_READ(NV04_PFIFO_CACHE1_PULL1));
-
- return 0;
-}
+++ /dev/null
-/*
- * Copyright 2007 Stephane Marchesin
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drm.h"
-#include "nouveau_drv.h"
-
-static uint32_t nv04_graph_ctx_regs [] = {
- NV04_PGRAPH_CTX_SWITCH1,
- NV04_PGRAPH_CTX_SWITCH2,
- NV04_PGRAPH_CTX_SWITCH3,
- NV04_PGRAPH_CTX_SWITCH4,
- NV04_PGRAPH_CTX_CACHE1,
- NV04_PGRAPH_CTX_CACHE2,
- NV04_PGRAPH_CTX_CACHE3,
- NV04_PGRAPH_CTX_CACHE4,
- 0x00400184,
- 0x004001a4,
- 0x004001c4,
- 0x004001e4,
- 0x00400188,
- 0x004001a8,
- 0x004001c8,
- 0x004001e8,
- 0x0040018c,
- 0x004001ac,
- 0x004001cc,
- 0x004001ec,
- 0x00400190,
- 0x004001b0,
- 0x004001d0,
- 0x004001f0,
- 0x00400194,
- 0x004001b4,
- 0x004001d4,
- 0x004001f4,
- 0x00400198,
- 0x004001b8,
- 0x004001d8,
- 0x004001f8,
- 0x0040019c,
- 0x004001bc,
- 0x004001dc,
- 0x004001fc,
- 0x00400174,
- NV04_PGRAPH_DMA_START_0,
- NV04_PGRAPH_DMA_START_1,
- NV04_PGRAPH_DMA_LENGTH,
- NV04_PGRAPH_DMA_MISC,
- NV04_PGRAPH_DMA_PITCH,
- NV04_PGRAPH_BOFFSET0,
- NV04_PGRAPH_BBASE0,
- NV04_PGRAPH_BLIMIT0,
- NV04_PGRAPH_BOFFSET1,
- NV04_PGRAPH_BBASE1,
- NV04_PGRAPH_BLIMIT1,
- NV04_PGRAPH_BOFFSET2,
- NV04_PGRAPH_BBASE2,
- NV04_PGRAPH_BLIMIT2,
- NV04_PGRAPH_BOFFSET3,
- NV04_PGRAPH_BBASE3,
- NV04_PGRAPH_BLIMIT3,
- NV04_PGRAPH_BOFFSET4,
- NV04_PGRAPH_BBASE4,
- NV04_PGRAPH_BLIMIT4,
- NV04_PGRAPH_BOFFSET5,
- NV04_PGRAPH_BBASE5,
- NV04_PGRAPH_BLIMIT5,
- NV04_PGRAPH_BPITCH0,
- NV04_PGRAPH_BPITCH1,
- NV04_PGRAPH_BPITCH2,
- NV04_PGRAPH_BPITCH3,
- NV04_PGRAPH_BPITCH4,
- NV04_PGRAPH_SURFACE,
- NV04_PGRAPH_STATE,
- NV04_PGRAPH_BSWIZZLE2,
- NV04_PGRAPH_BSWIZZLE5,
- NV04_PGRAPH_BPIXEL,
- NV04_PGRAPH_NOTIFY,
- NV04_PGRAPH_PATT_COLOR0,
- NV04_PGRAPH_PATT_COLOR1,
- NV04_PGRAPH_PATT_COLORRAM+0x00,
- NV04_PGRAPH_PATT_COLORRAM+0x01,
- NV04_PGRAPH_PATT_COLORRAM+0x02,
- NV04_PGRAPH_PATT_COLORRAM+0x03,
- NV04_PGRAPH_PATT_COLORRAM+0x04,
- NV04_PGRAPH_PATT_COLORRAM+0x05,
- NV04_PGRAPH_PATT_COLORRAM+0x06,
- NV04_PGRAPH_PATT_COLORRAM+0x07,
- NV04_PGRAPH_PATT_COLORRAM+0x08,
- NV04_PGRAPH_PATT_COLORRAM+0x09,
- NV04_PGRAPH_PATT_COLORRAM+0x0A,
- NV04_PGRAPH_PATT_COLORRAM+0x0B,
- NV04_PGRAPH_PATT_COLORRAM+0x0C,
- NV04_PGRAPH_PATT_COLORRAM+0x0D,
- NV04_PGRAPH_PATT_COLORRAM+0x0E,
- NV04_PGRAPH_PATT_COLORRAM+0x0F,
- NV04_PGRAPH_PATT_COLORRAM+0x10,
- NV04_PGRAPH_PATT_COLORRAM+0x11,
- NV04_PGRAPH_PATT_COLORRAM+0x12,
- NV04_PGRAPH_PATT_COLORRAM+0x13,
- NV04_PGRAPH_PATT_COLORRAM+0x14,
- NV04_PGRAPH_PATT_COLORRAM+0x15,
- NV04_PGRAPH_PATT_COLORRAM+0x16,
- NV04_PGRAPH_PATT_COLORRAM+0x17,
- NV04_PGRAPH_PATT_COLORRAM+0x18,
- NV04_PGRAPH_PATT_COLORRAM+0x19,
- NV04_PGRAPH_PATT_COLORRAM+0x1A,
- NV04_PGRAPH_PATT_COLORRAM+0x1B,
- NV04_PGRAPH_PATT_COLORRAM+0x1C,
- NV04_PGRAPH_PATT_COLORRAM+0x1D,
- NV04_PGRAPH_PATT_COLORRAM+0x1E,
- NV04_PGRAPH_PATT_COLORRAM+0x1F,
- NV04_PGRAPH_PATT_COLORRAM+0x20,
- NV04_PGRAPH_PATT_COLORRAM+0x21,
- NV04_PGRAPH_PATT_COLORRAM+0x22,
- NV04_PGRAPH_PATT_COLORRAM+0x23,
- NV04_PGRAPH_PATT_COLORRAM+0x24,
- NV04_PGRAPH_PATT_COLORRAM+0x25,
- NV04_PGRAPH_PATT_COLORRAM+0x26,
- NV04_PGRAPH_PATT_COLORRAM+0x27,
- NV04_PGRAPH_PATT_COLORRAM+0x28,
- NV04_PGRAPH_PATT_COLORRAM+0x29,
- NV04_PGRAPH_PATT_COLORRAM+0x2A,
- NV04_PGRAPH_PATT_COLORRAM+0x2B,
- NV04_PGRAPH_PATT_COLORRAM+0x2C,
- NV04_PGRAPH_PATT_COLORRAM+0x2D,
- NV04_PGRAPH_PATT_COLORRAM+0x2E,
- NV04_PGRAPH_PATT_COLORRAM+0x2F,
- NV04_PGRAPH_PATT_COLORRAM+0x30,
- NV04_PGRAPH_PATT_COLORRAM+0x31,
- NV04_PGRAPH_PATT_COLORRAM+0x32,
- NV04_PGRAPH_PATT_COLORRAM+0x33,
- NV04_PGRAPH_PATT_COLORRAM+0x34,
- NV04_PGRAPH_PATT_COLORRAM+0x35,
- NV04_PGRAPH_PATT_COLORRAM+0x36,
- NV04_PGRAPH_PATT_COLORRAM+0x37,
- NV04_PGRAPH_PATT_COLORRAM+0x38,
- NV04_PGRAPH_PATT_COLORRAM+0x39,
- NV04_PGRAPH_PATT_COLORRAM+0x3A,
- NV04_PGRAPH_PATT_COLORRAM+0x3B,
- NV04_PGRAPH_PATT_COLORRAM+0x3C,
- NV04_PGRAPH_PATT_COLORRAM+0x3D,
- NV04_PGRAPH_PATT_COLORRAM+0x3E,
- NV04_PGRAPH_PATT_COLORRAM+0x3F,
- NV04_PGRAPH_PATTERN,
- 0x0040080c,
- NV04_PGRAPH_PATTERN_SHAPE,
- 0x00400600,
- NV04_PGRAPH_ROP3,
- NV04_PGRAPH_CHROMA,
- NV04_PGRAPH_BETA_AND,
- NV04_PGRAPH_BETA_PREMULT,
- NV04_PGRAPH_CONTROL0,
- NV04_PGRAPH_CONTROL1,
- NV04_PGRAPH_CONTROL2,
- NV04_PGRAPH_BLEND,
- NV04_PGRAPH_STORED_FMT,
- NV04_PGRAPH_SOURCE_COLOR,
- 0x00400560,
- 0x00400568,
- 0x00400564,
- 0x0040056c,
- 0x00400400,
- 0x00400480,
- 0x00400404,
- 0x00400484,
- 0x00400408,
- 0x00400488,
- 0x0040040c,
- 0x0040048c,
- 0x00400410,
- 0x00400490,
- 0x00400414,
- 0x00400494,
- 0x00400418,
- 0x00400498,
- 0x0040041c,
- 0x0040049c,
- 0x00400420,
- 0x004004a0,
- 0x00400424,
- 0x004004a4,
- 0x00400428,
- 0x004004a8,
- 0x0040042c,
- 0x004004ac,
- 0x00400430,
- 0x004004b0,
- 0x00400434,
- 0x004004b4,
- 0x00400438,
- 0x004004b8,
- 0x0040043c,
- 0x004004bc,
- 0x00400440,
- 0x004004c0,
- 0x00400444,
- 0x004004c4,
- 0x00400448,
- 0x004004c8,
- 0x0040044c,
- 0x004004cc,
- 0x00400450,
- 0x004004d0,
- 0x00400454,
- 0x004004d4,
- 0x00400458,
- 0x004004d8,
- 0x0040045c,
- 0x004004dc,
- 0x00400460,
- 0x004004e0,
- 0x00400464,
- 0x004004e4,
- 0x00400468,
- 0x004004e8,
- 0x0040046c,
- 0x004004ec,
- 0x00400470,
- 0x004004f0,
- 0x00400474,
- 0x004004f4,
- 0x00400478,
- 0x004004f8,
- 0x0040047c,
- 0x004004fc,
- 0x0040053c,
- 0x00400544,
- 0x00400540,
- 0x00400548,
- 0x00400560,
- 0x00400568,
- 0x00400564,
- 0x0040056c,
- 0x00400534,
- 0x00400538,
- 0x00400514,
- 0x00400518,
- 0x0040051c,
- 0x00400520,
- 0x00400524,
- 0x00400528,
- 0x0040052c,
- 0x00400530,
- 0x00400d00,
- 0x00400d40,
- 0x00400d80,
- 0x00400d04,
- 0x00400d44,
- 0x00400d84,
- 0x00400d08,
- 0x00400d48,
- 0x00400d88,
- 0x00400d0c,
- 0x00400d4c,
- 0x00400d8c,
- 0x00400d10,
- 0x00400d50,
- 0x00400d90,
- 0x00400d14,
- 0x00400d54,
- 0x00400d94,
- 0x00400d18,
- 0x00400d58,
- 0x00400d98,
- 0x00400d1c,
- 0x00400d5c,
- 0x00400d9c,
- 0x00400d20,
- 0x00400d60,
- 0x00400da0,
- 0x00400d24,
- 0x00400d64,
- 0x00400da4,
- 0x00400d28,
- 0x00400d68,
- 0x00400da8,
- 0x00400d2c,
- 0x00400d6c,
- 0x00400dac,
- 0x00400d30,
- 0x00400d70,
- 0x00400db0,
- 0x00400d34,
- 0x00400d74,
- 0x00400db4,
- 0x00400d38,
- 0x00400d78,
- 0x00400db8,
- 0x00400d3c,
- 0x00400d7c,
- 0x00400dbc,
- 0x00400590,
- 0x00400594,
- 0x00400598,
- 0x0040059c,
- 0x004005a8,
- 0x004005ac,
- 0x004005b0,
- 0x004005b4,
- 0x004005c0,
- 0x004005c4,
- 0x004005c8,
- 0x004005cc,
- 0x004005d0,
- 0x004005d4,
- 0x004005d8,
- 0x004005dc,
- 0x004005e0,
- NV04_PGRAPH_PASSTHRU_0,
- NV04_PGRAPH_PASSTHRU_1,
- NV04_PGRAPH_PASSTHRU_2,
- NV04_PGRAPH_DVD_COLORFMT,
- NV04_PGRAPH_SCALED_FORMAT,
- NV04_PGRAPH_MISC24_0,
- NV04_PGRAPH_MISC24_1,
- NV04_PGRAPH_MISC24_2,
- 0x00400500,
- 0x00400504,
- NV04_PGRAPH_VALID1,
- NV04_PGRAPH_VALID2
-
-
-};
-
-struct graph_state {
- int nv04[sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0])];
-};
-
-void nouveau_nv04_context_switch(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- struct nouveau_channel *next, *last;
- int chid;
-
- if (!dev) {
- DRM_DEBUG("Invalid drm_device\n");
- return;
- }
- dev_priv = dev->dev_private;
- if (!dev_priv) {
- DRM_DEBUG("Invalid drm_nouveau_private\n");
- return;
- }
- if (!dev_priv->fifos) {
- DRM_DEBUG("Invalid drm_nouveau_private->fifos\n");
- return;
- }
-
- chid = engine->fifo.channel_id(dev);
- next = dev_priv->fifos[chid];
-
- if (!next) {
- DRM_DEBUG("Invalid next channel\n");
- return;
- }
-
- chid = (NV_READ(NV04_PGRAPH_CTX_USER) >> 24) & (engine->fifo.channels - 1);
- last = dev_priv->fifos[chid];
-
- if (!last) {
- DRM_DEBUG("WARNING: Invalid last channel, switch to %x\n",
- next->id);
- } else {
- DRM_INFO("NV: PGRAPH context switch interrupt channel %x -> %x\n",
- last->id, next->id);
- }
-
-/* NV_WRITE(NV03_PFIFO_CACHES, 0x0);
- NV_WRITE(NV04_PFIFO_CACHE0_PULL0, 0x0);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x0);*/
- NV_WRITE(NV04_PGRAPH_FIFO,0x0);
-
- if (last)
- nv04_graph_save_context(last);
-
- nouveau_wait_for_idle(dev);
-
- NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10000000);
- NV_WRITE(NV04_PGRAPH_CTX_USER, (NV_READ(NV04_PGRAPH_CTX_USER) & 0xffffff) | (0x0f << 24));
-
- nouveau_wait_for_idle(dev);
-
- nv04_graph_load_context(next);
-
- NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10010100);
- NV_WRITE(NV04_PGRAPH_CTX_USER, next->id << 24);
- NV_WRITE(NV04_PGRAPH_FFINTFC_ST2, NV_READ(NV04_PGRAPH_FFINTFC_ST2)&0x000FFFFF);
-
-/* NV_WRITE(NV04_PGRAPH_FIFO,0x0);
- NV_WRITE(NV04_PFIFO_CACHE0_PULL0, 0x0);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x1);
- NV_WRITE(NV03_PFIFO_CACHES, 0x1);*/
- NV_WRITE(NV04_PGRAPH_FIFO,0x1);
-}
-
-int nv04_graph_create_context(struct nouveau_channel *chan) {
- struct graph_state* pgraph_ctx;
- DRM_DEBUG("nv04_graph_context_create %d\n", chan->id);
-
- chan->pgraph_ctx = pgraph_ctx = drm_calloc(1, sizeof(*pgraph_ctx),
- DRM_MEM_DRIVER);
-
- if (pgraph_ctx == NULL)
- return -ENOMEM;
-
- //dev_priv->fifos[channel].pgraph_ctx_user = channel << 24;
- pgraph_ctx->nv04[0] = 0x0001ffff;
- /* is it really needed ??? */
- //dev_priv->fifos[channel].pgraph_ctx[1] = NV_READ(NV_PGRAPH_DEBUG_4);
- //dev_priv->fifos[channel].pgraph_ctx[2] = NV_READ(0x004006b0);
-
- return 0;
-}
-
-void nv04_graph_destroy_context(struct nouveau_channel *chan)
-{
- struct graph_state* pgraph_ctx = chan->pgraph_ctx;
-
- drm_free(pgraph_ctx, sizeof(*pgraph_ctx), DRM_MEM_DRIVER);
- chan->pgraph_ctx = NULL;
-}
-
-int nv04_graph_load_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = chan->pgraph_ctx;
- int i;
-
- for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
- NV_WRITE(nv04_graph_ctx_regs[i], pgraph_ctx->nv04[i]);
-
- return 0;
-}
-
-int nv04_graph_save_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = chan->pgraph_ctx;
- int i;
-
- for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
- pgraph_ctx->nv04[i] = NV_READ(nv04_graph_ctx_regs[i]);
-
- return 0;
-}
-
-int nv04_graph_init(struct drm_device *dev) {
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) &
- ~NV_PMC_ENABLE_PGRAPH);
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) |
- NV_PMC_ENABLE_PGRAPH);
-
- /* Enable PGRAPH interrupts */
- NV_WRITE(NV03_PGRAPH_INTR, 0xFFFFFFFF);
- NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
-
- NV_WRITE(NV04_PGRAPH_VALID1, 0);
- NV_WRITE(NV04_PGRAPH_VALID2, 0);
- /*NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x000001FF);
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x001FFFFF);*/
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x1231c000);
- /*1231C000 blob, 001 haiku*/
- //*V_WRITE(NV04_PGRAPH_DEBUG_1, 0xf2d91100);*/
- NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x72111100);
- /*0x72111100 blob , 01 haiku*/
- /*NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x11d5f870);*/
- NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x11d5f071);
- /*haiku same*/
-
- /*NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xfad4ff31);*/
- NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xf0d4ff31);
- /*haiku and blob 10d4*/
-
- NV_WRITE(NV04_PGRAPH_STATE , 0xFFFFFFFF);
- NV_WRITE(NV04_PGRAPH_CTX_CONTROL , 0x10010100);
- NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001);
-
- /* These don't belong here, they're part of a per-channel context */
- NV_WRITE(NV04_PGRAPH_PATTERN_SHAPE, 0x00000000);
- NV_WRITE(NV04_PGRAPH_BETA_AND , 0xFFFFFFFF);
-
- return 0;
-}
-
-void nv04_graph_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-
-static void
-nv04_instmem_determine_amount(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- /* Figure out how much instance memory we need */
- if (dev_priv->card_type >= NV_40) {
- /* We'll want more instance memory than this on some NV4x cards.
- * There's a 16MB aperture to play with that maps onto the end
- * of vram. For now, only reserve a small piece until we know
- * more about what each chipset requires.
- */
- dev_priv->ramin_rsvd_vram = (1*1024* 1024);
- } else {
- /*XXX: what *are* the limits on <NV40 cards?
- */
- dev_priv->ramin_rsvd_vram = (512*1024);
- }
- DRM_DEBUG("RAMIN size: %dKiB\n", dev_priv->ramin_rsvd_vram>>10);
-
- /* Clear all of it, except the BIOS image that's in the first 64KiB */
- for (i=(64*1024); i<dev_priv->ramin_rsvd_vram; i+=4)
- NV_WI32(i, 0x00000000);
-}
-
-static void
-nv04_instmem_configure_fixed_tables(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
-
- /* FIFO hash table (RAMHT)
- * use 4k hash table at RAMIN+0x10000
- * TODO: extend the hash table
- */
- dev_priv->ramht_offset = 0x10000;
- dev_priv->ramht_bits = 9;
- dev_priv->ramht_size = (1 << dev_priv->ramht_bits); /* nr entries */
- dev_priv->ramht_size *= 8; /* 2 32-bit values per entry in RAMHT */
- DRM_DEBUG("RAMHT offset=0x%x, size=%d\n", dev_priv->ramht_offset,
- dev_priv->ramht_size);
-
- /* FIFO runout table (RAMRO) - 512k at 0x11200 */
- dev_priv->ramro_offset = 0x11200;
- dev_priv->ramro_size = 512;
- DRM_DEBUG("RAMRO offset=0x%x, size=%d\n", dev_priv->ramro_offset,
- dev_priv->ramro_size);
-
- /* FIFO context table (RAMFC)
- * NV40 : Not sure exactly how to position RAMFC on some cards,
- * 0x30002 seems to position it at RAMIN+0x20000 on these
- * cards. RAMFC is 4kb (32 fifos, 128byte entries).
- * Others: Position RAMFC at RAMIN+0x11400
- */
- switch(dev_priv->card_type)
- {
- case NV_40:
- case NV_44:
- dev_priv->ramfc_offset = 0x20000;
- dev_priv->ramfc_size = engine->fifo.channels *
- nouveau_fifo_ctx_size(dev);
- break;
- case NV_30:
- case NV_20:
- case NV_17:
- case NV_11:
- case NV_10:
- case NV_04:
- default:
- dev_priv->ramfc_offset = 0x11400;
- dev_priv->ramfc_size = engine->fifo.channels *
- nouveau_fifo_ctx_size(dev);
- break;
- }
- DRM_DEBUG("RAMFC offset=0x%x, size=%d\n", dev_priv->ramfc_offset,
- dev_priv->ramfc_size);
-}
-
-int nv04_instmem_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t offset;
- int ret = 0;
-
- nv04_instmem_determine_amount(dev);
- nv04_instmem_configure_fixed_tables(dev);
-
- /* Create a heap to manage RAMIN allocations, we don't allocate
- * the space that was reserved for RAMHT/FC/RO.
- */
- offset = dev_priv->ramfc_offset + dev_priv->ramfc_size;
-
- /* On my NV4E, there's *something* clobbering the 16KiB just after
- * where we setup these fixed tables. No idea what it is just yet,
- * so reserve this space on all NV4X cards for now.
- */
- if (dev_priv->card_type >= NV_40)
- offset += 16*1024;
-
- ret = nouveau_mem_init_heap(&dev_priv->ramin_heap,
- offset, dev_priv->ramin_rsvd_vram - offset);
- if (ret) {
- dev_priv->ramin_heap = NULL;
- DRM_ERROR("Failed to init RAMIN heap\n");
- }
-
- return ret;
-}
-
-void
-nv04_instmem_takedown(struct drm_device *dev)
-{
-}
-
-int
-nv04_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, uint32_t *sz)
-{
- if (gpuobj->im_backing)
- return -EINVAL;
-
- return 0;
-}
-
-void
-nv04_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- if (gpuobj && gpuobj->im_backing) {
- if (gpuobj->im_bound)
- dev_priv->Engine.instmem.unbind(dev, gpuobj);
- gpuobj->im_backing = NULL;
- }
-}
-
-int
-nv04_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
-{
- if (!gpuobj->im_pramin || gpuobj->im_bound)
- return -EINVAL;
-
- gpuobj->im_bound = 1;
- return 0;
-}
-
-int
-nv04_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
-{
- if (gpuobj->im_bound == 0)
- return -EINVAL;
-
- gpuobj->im_bound = 0;
- return 0;
-}
+++ /dev/null
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-int
-nv04_mc_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- /* Power up everything, resetting each individual unit will
- * be done later if needed.
- */
- NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF);
-
- return 0;
-}
-
-void
-nv04_mc_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-int
-nv04_timer_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- NV_WRITE(NV04_PTIMER_INTR_EN_0, 0x00000000);
- NV_WRITE(NV04_PTIMER_INTR_0, 0xFFFFFFFF);
-
- /* Just use the pre-existing values when possible for now; these regs
- * are not written in nv (driver writer missed a /4 on the address), and
- * writing 8 and 3 to the correct regs breaks the timings on the LVDS
- * hardware sequencing microcode.
- * A correct solution (involving calculations with the GPU PLL) can
- * be done when kernel modesetting lands
- */
- if (!NV_READ(NV04_PTIMER_NUMERATOR) || !NV_READ(NV04_PTIMER_DENOMINATOR)) {
- NV_WRITE(NV04_PTIMER_NUMERATOR, 0x00000008);
- NV_WRITE(NV04_PTIMER_DENOMINATOR, 0x00000003);
- }
-
- return 0;
-}
-
-uint64_t
-nv04_timer_read(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t low;
- /* From kmmio dumps on nv28 this looks like how the blob does this.
- * It reads the high dword twice, before and after.
- * The only explanation seems to be that the 64-bit timer counter
- * advances between high and low dword reads and may corrupt the
- * result. Not confirmed.
- */
- uint32_t high2 = NV_READ(NV04_PTIMER_TIME_1);
- uint32_t high1;
- do {
- high1 = high2;
- low = NV_READ(NV04_PTIMER_TIME_0);
- high2 = NV_READ(NV04_PTIMER_TIME_1);
- } while(high1 != high2);
- return (((uint64_t)high2) << 32) | (uint64_t)low;
-}
-
-void
-nv04_timer_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-int
-nv10_fb_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t fb_bar_size;
- int i;
-
- fb_bar_size = drm_get_resource_len(dev, 0) - 1;
- for (i=0; i<NV10_PFB_TILE__SIZE; i++) {
- NV_WRITE(NV10_PFB_TILE(i), 0);
- NV_WRITE(NV10_PFB_TLIMIT(i), fb_bar_size);
- }
-
- return 0;
-}
-
-void
-nv10_fb_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-
-
-#define RAMFC_WR(offset,val) INSTANCE_WR(chan->ramfc->gpuobj, \
- NV10_RAMFC_##offset/4, (val))
-#define RAMFC_RD(offset) INSTANCE_RD(chan->ramfc->gpuobj, \
- NV10_RAMFC_##offset/4)
-#define NV10_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV10_RAMFC__SIZE))
-#define NV10_RAMFC__SIZE ((dev_priv->chipset) >= 0x17 ? 64 : 32)
-
-int
-nv10_fifo_channel_id(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- return (NV_READ(NV03_PFIFO_CACHE1_PUSH1) &
- NV10_PFIFO_CACHE1_PUSH1_CHID_MASK);
-}
-
-int
-nv10_fifo_create_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
-
- if ((ret = nouveau_gpuobj_new_fake(dev, NV10_RAMFC(chan->id), ~0,
- NV10_RAMFC__SIZE,
- NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ZERO_FREE,
- NULL, &chan->ramfc)))
- return ret;
-
- /* Fill entries that are seen filled in dumps of nvidia driver just
- * after channel's is put into DMA mode
- */
- RAMFC_WR(DMA_PUT , chan->pushbuf_base);
- RAMFC_WR(DMA_GET , chan->pushbuf_base);
- RAMFC_WR(DMA_INSTANCE , chan->pushbuf->instance >> 4);
- RAMFC_WR(DMA_FETCH , NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
- NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |
- NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |
-#ifdef __BIG_ENDIAN
- NV_PFIFO_CACHE1_BIG_ENDIAN |
-#endif
- 0);
-
- /* enable the fifo dma operation */
- NV_WRITE(NV04_PFIFO_MODE,NV_READ(NV04_PFIFO_MODE)|(1<<chan->id));
- return 0;
-}
-
-void
-nv10_fifo_destroy_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<<chan->id));
-
- nouveau_gpuobj_ref_del(dev, &chan->ramfc);
-}
-
-int
-nv10_fifo_load_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t tmp;
-
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH1,
- NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id);
-
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET , RAMFC_RD(DMA_GET));
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT , RAMFC_RD(DMA_PUT));
- NV_WRITE(NV10_PFIFO_CACHE1_REF_CNT , RAMFC_RD(REF_CNT));
-
- tmp = RAMFC_RD(DMA_INSTANCE);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE , tmp & 0xFFFF);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_DCOUNT , tmp >> 16);
-
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE , RAMFC_RD(DMA_STATE));
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_FETCH , RAMFC_RD(DMA_FETCH));
- NV_WRITE(NV04_PFIFO_CACHE1_ENGINE , RAMFC_RD(ENGINE));
- NV_WRITE(NV04_PFIFO_CACHE1_PULL1 , RAMFC_RD(PULL1_ENGINE));
-
- if (dev_priv->chipset >= 0x17) {
- NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_VALUE,
- RAMFC_RD(ACQUIRE_VALUE));
- NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP,
- RAMFC_RD(ACQUIRE_TIMESTAMP));
- NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT,
- RAMFC_RD(ACQUIRE_TIMEOUT));
- NV_WRITE(NV10_PFIFO_CACHE1_SEMAPHORE,
- RAMFC_RD(SEMAPHORE));
- NV_WRITE(NV10_PFIFO_CACHE1_DMA_SUBROUTINE,
- RAMFC_RD(DMA_SUBROUTINE));
- }
-
- /* Reset NV04_PFIFO_CACHE1_DMA_CTL_AT_INFO to INVALID */
- tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_CTL) & ~(1<<31);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_CTL, tmp);
-
- return 0;
-}
-
-int
-nv10_fifo_save_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t tmp;
-
- RAMFC_WR(DMA_PUT , NV_READ(NV04_PFIFO_CACHE1_DMA_PUT));
- RAMFC_WR(DMA_GET , NV_READ(NV04_PFIFO_CACHE1_DMA_GET));
- RAMFC_WR(REF_CNT , NV_READ(NV10_PFIFO_CACHE1_REF_CNT));
-
- tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_INSTANCE) & 0xFFFF;
- tmp |= (NV_READ(NV04_PFIFO_CACHE1_DMA_DCOUNT) << 16);
- RAMFC_WR(DMA_INSTANCE , tmp);
-
- RAMFC_WR(DMA_STATE , NV_READ(NV04_PFIFO_CACHE1_DMA_STATE));
- RAMFC_WR(DMA_FETCH , NV_READ(NV04_PFIFO_CACHE1_DMA_FETCH));
- RAMFC_WR(ENGINE , NV_READ(NV04_PFIFO_CACHE1_ENGINE));
- RAMFC_WR(PULL1_ENGINE , NV_READ(NV04_PFIFO_CACHE1_PULL1));
-
- if (dev_priv->chipset >= 0x17) {
- RAMFC_WR(ACQUIRE_VALUE,
- NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_VALUE));
- RAMFC_WR(ACQUIRE_TIMESTAMP,
- NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP));
- RAMFC_WR(ACQUIRE_TIMEOUT,
- NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT));
- RAMFC_WR(SEMAPHORE,
- NV_READ(NV10_PFIFO_CACHE1_SEMAPHORE));
- RAMFC_WR(DMA_SUBROUTINE,
- NV_READ(NV04_PFIFO_CACHE1_DMA_GET));
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Copyright 2007 Matthieu CASTET <castet.matthieu@free.fr>
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drm.h"
-#include "nouveau_drv.h"
-
-#define NV10_FIFO_NUMBER 32
-
-struct pipe_state {
- uint32_t pipe_0x0000[0x040/4];
- uint32_t pipe_0x0040[0x010/4];
- uint32_t pipe_0x0200[0x0c0/4];
- uint32_t pipe_0x4400[0x080/4];
- uint32_t pipe_0x6400[0x3b0/4];
- uint32_t pipe_0x6800[0x2f0/4];
- uint32_t pipe_0x6c00[0x030/4];
- uint32_t pipe_0x7000[0x130/4];
- uint32_t pipe_0x7400[0x0c0/4];
- uint32_t pipe_0x7800[0x0c0/4];
-};
-
-static int nv10_graph_ctx_regs [] = {
-NV10_PGRAPH_CTX_SWITCH1,
-NV10_PGRAPH_CTX_SWITCH2,
-NV10_PGRAPH_CTX_SWITCH3,
-NV10_PGRAPH_CTX_SWITCH4,
-NV10_PGRAPH_CTX_SWITCH5,
-NV10_PGRAPH_CTX_CACHE1, /* 8 values from 0x400160 to 0x40017c */
-NV10_PGRAPH_CTX_CACHE2, /* 8 values from 0x400180 to 0x40019c */
-NV10_PGRAPH_CTX_CACHE3, /* 8 values from 0x4001a0 to 0x4001bc */
-NV10_PGRAPH_CTX_CACHE4, /* 8 values from 0x4001c0 to 0x4001dc */
-NV10_PGRAPH_CTX_CACHE5, /* 8 values from 0x4001e0 to 0x4001fc */
-0x00400164,
-0x00400184,
-0x004001a4,
-0x004001c4,
-0x004001e4,
-0x00400168,
-0x00400188,
-0x004001a8,
-0x004001c8,
-0x004001e8,
-0x0040016c,
-0x0040018c,
-0x004001ac,
-0x004001cc,
-0x004001ec,
-0x00400170,
-0x00400190,
-0x004001b0,
-0x004001d0,
-0x004001f0,
-0x00400174,
-0x00400194,
-0x004001b4,
-0x004001d4,
-0x004001f4,
-0x00400178,
-0x00400198,
-0x004001b8,
-0x004001d8,
-0x004001f8,
-0x0040017c,
-0x0040019c,
-0x004001bc,
-0x004001dc,
-0x004001fc,
-NV10_PGRAPH_CTX_USER,
-NV04_PGRAPH_DMA_START_0,
-NV04_PGRAPH_DMA_START_1,
-NV04_PGRAPH_DMA_LENGTH,
-NV04_PGRAPH_DMA_MISC,
-NV10_PGRAPH_DMA_PITCH,
-NV04_PGRAPH_BOFFSET0,
-NV04_PGRAPH_BBASE0,
-NV04_PGRAPH_BLIMIT0,
-NV04_PGRAPH_BOFFSET1,
-NV04_PGRAPH_BBASE1,
-NV04_PGRAPH_BLIMIT1,
-NV04_PGRAPH_BOFFSET2,
-NV04_PGRAPH_BBASE2,
-NV04_PGRAPH_BLIMIT2,
-NV04_PGRAPH_BOFFSET3,
-NV04_PGRAPH_BBASE3,
-NV04_PGRAPH_BLIMIT3,
-NV04_PGRAPH_BOFFSET4,
-NV04_PGRAPH_BBASE4,
-NV04_PGRAPH_BLIMIT4,
-NV04_PGRAPH_BOFFSET5,
-NV04_PGRAPH_BBASE5,
-NV04_PGRAPH_BLIMIT5,
-NV04_PGRAPH_BPITCH0,
-NV04_PGRAPH_BPITCH1,
-NV04_PGRAPH_BPITCH2,
-NV04_PGRAPH_BPITCH3,
-NV04_PGRAPH_BPITCH4,
-NV10_PGRAPH_SURFACE,
-NV10_PGRAPH_STATE,
-NV04_PGRAPH_BSWIZZLE2,
-NV04_PGRAPH_BSWIZZLE5,
-NV04_PGRAPH_BPIXEL,
-NV10_PGRAPH_NOTIFY,
-NV04_PGRAPH_PATT_COLOR0,
-NV04_PGRAPH_PATT_COLOR1,
-NV04_PGRAPH_PATT_COLORRAM, /* 64 values from 0x400900 to 0x4009fc */
-0x00400904,
-0x00400908,
-0x0040090c,
-0x00400910,
-0x00400914,
-0x00400918,
-0x0040091c,
-0x00400920,
-0x00400924,
-0x00400928,
-0x0040092c,
-0x00400930,
-0x00400934,
-0x00400938,
-0x0040093c,
-0x00400940,
-0x00400944,
-0x00400948,
-0x0040094c,
-0x00400950,
-0x00400954,
-0x00400958,
-0x0040095c,
-0x00400960,
-0x00400964,
-0x00400968,
-0x0040096c,
-0x00400970,
-0x00400974,
-0x00400978,
-0x0040097c,
-0x00400980,
-0x00400984,
-0x00400988,
-0x0040098c,
-0x00400990,
-0x00400994,
-0x00400998,
-0x0040099c,
-0x004009a0,
-0x004009a4,
-0x004009a8,
-0x004009ac,
-0x004009b0,
-0x004009b4,
-0x004009b8,
-0x004009bc,
-0x004009c0,
-0x004009c4,
-0x004009c8,
-0x004009cc,
-0x004009d0,
-0x004009d4,
-0x004009d8,
-0x004009dc,
-0x004009e0,
-0x004009e4,
-0x004009e8,
-0x004009ec,
-0x004009f0,
-0x004009f4,
-0x004009f8,
-0x004009fc,
-NV04_PGRAPH_PATTERN, /* 2 values from 0x400808 to 0x40080c */
-0x0040080c,
-NV04_PGRAPH_PATTERN_SHAPE,
-NV03_PGRAPH_MONO_COLOR0,
-NV04_PGRAPH_ROP3,
-NV04_PGRAPH_CHROMA,
-NV04_PGRAPH_BETA_AND,
-NV04_PGRAPH_BETA_PREMULT,
-0x00400e70,
-0x00400e74,
-0x00400e78,
-0x00400e7c,
-0x00400e80,
-0x00400e84,
-0x00400e88,
-0x00400e8c,
-0x00400ea0,
-0x00400ea4,
-0x00400ea8,
-0x00400e90,
-0x00400e94,
-0x00400e98,
-0x00400e9c,
-NV10_PGRAPH_WINDOWCLIP_HORIZONTAL, /* 8 values from 0x400f00 to 0x400f1c */
-NV10_PGRAPH_WINDOWCLIP_VERTICAL, /* 8 values from 0x400f20 to 0x400f3c */
-0x00400f04,
-0x00400f24,
-0x00400f08,
-0x00400f28,
-0x00400f0c,
-0x00400f2c,
-0x00400f10,
-0x00400f30,
-0x00400f14,
-0x00400f34,
-0x00400f18,
-0x00400f38,
-0x00400f1c,
-0x00400f3c,
-NV10_PGRAPH_XFMODE0,
-NV10_PGRAPH_XFMODE1,
-NV10_PGRAPH_GLOBALSTATE0,
-NV10_PGRAPH_GLOBALSTATE1,
-NV04_PGRAPH_STORED_FMT,
-NV04_PGRAPH_SOURCE_COLOR,
-NV03_PGRAPH_ABS_X_RAM, /* 32 values from 0x400400 to 0x40047c */
-NV03_PGRAPH_ABS_Y_RAM, /* 32 values from 0x400480 to 0x4004fc */
-0x00400404,
-0x00400484,
-0x00400408,
-0x00400488,
-0x0040040c,
-0x0040048c,
-0x00400410,
-0x00400490,
-0x00400414,
-0x00400494,
-0x00400418,
-0x00400498,
-0x0040041c,
-0x0040049c,
-0x00400420,
-0x004004a0,
-0x00400424,
-0x004004a4,
-0x00400428,
-0x004004a8,
-0x0040042c,
-0x004004ac,
-0x00400430,
-0x004004b0,
-0x00400434,
-0x004004b4,
-0x00400438,
-0x004004b8,
-0x0040043c,
-0x004004bc,
-0x00400440,
-0x004004c0,
-0x00400444,
-0x004004c4,
-0x00400448,
-0x004004c8,
-0x0040044c,
-0x004004cc,
-0x00400450,
-0x004004d0,
-0x00400454,
-0x004004d4,
-0x00400458,
-0x004004d8,
-0x0040045c,
-0x004004dc,
-0x00400460,
-0x004004e0,
-0x00400464,
-0x004004e4,
-0x00400468,
-0x004004e8,
-0x0040046c,
-0x004004ec,
-0x00400470,
-0x004004f0,
-0x00400474,
-0x004004f4,
-0x00400478,
-0x004004f8,
-0x0040047c,
-0x004004fc,
-NV03_PGRAPH_ABS_UCLIP_XMIN,
-NV03_PGRAPH_ABS_UCLIP_XMAX,
-NV03_PGRAPH_ABS_UCLIP_YMIN,
-NV03_PGRAPH_ABS_UCLIP_YMAX,
-0x00400550,
-0x00400558,
-0x00400554,
-0x0040055c,
-NV03_PGRAPH_ABS_UCLIPA_XMIN,
-NV03_PGRAPH_ABS_UCLIPA_XMAX,
-NV03_PGRAPH_ABS_UCLIPA_YMIN,
-NV03_PGRAPH_ABS_UCLIPA_YMAX,
-NV03_PGRAPH_ABS_ICLIP_XMAX,
-NV03_PGRAPH_ABS_ICLIP_YMAX,
-NV03_PGRAPH_XY_LOGIC_MISC0,
-NV03_PGRAPH_XY_LOGIC_MISC1,
-NV03_PGRAPH_XY_LOGIC_MISC2,
-NV03_PGRAPH_XY_LOGIC_MISC3,
-NV03_PGRAPH_CLIPX_0,
-NV03_PGRAPH_CLIPX_1,
-NV03_PGRAPH_CLIPY_0,
-NV03_PGRAPH_CLIPY_1,
-NV10_PGRAPH_COMBINER0_IN_ALPHA,
-NV10_PGRAPH_COMBINER1_IN_ALPHA,
-NV10_PGRAPH_COMBINER0_IN_RGB,
-NV10_PGRAPH_COMBINER1_IN_RGB,
-NV10_PGRAPH_COMBINER_COLOR0,
-NV10_PGRAPH_COMBINER_COLOR1,
-NV10_PGRAPH_COMBINER0_OUT_ALPHA,
-NV10_PGRAPH_COMBINER1_OUT_ALPHA,
-NV10_PGRAPH_COMBINER0_OUT_RGB,
-NV10_PGRAPH_COMBINER1_OUT_RGB,
-NV10_PGRAPH_COMBINER_FINAL0,
-NV10_PGRAPH_COMBINER_FINAL1,
-0x00400e00,
-0x00400e04,
-0x00400e08,
-0x00400e0c,
-0x00400e10,
-0x00400e14,
-0x00400e18,
-0x00400e1c,
-0x00400e20,
-0x00400e24,
-0x00400e28,
-0x00400e2c,
-0x00400e30,
-0x00400e34,
-0x00400e38,
-0x00400e3c,
-NV04_PGRAPH_PASSTHRU_0,
-NV04_PGRAPH_PASSTHRU_1,
-NV04_PGRAPH_PASSTHRU_2,
-NV10_PGRAPH_DIMX_TEXTURE,
-NV10_PGRAPH_WDIMX_TEXTURE,
-NV10_PGRAPH_DVD_COLORFMT,
-NV10_PGRAPH_SCALED_FORMAT,
-NV04_PGRAPH_MISC24_0,
-NV04_PGRAPH_MISC24_1,
-NV04_PGRAPH_MISC24_2,
-NV03_PGRAPH_X_MISC,
-NV03_PGRAPH_Y_MISC,
-NV04_PGRAPH_VALID1,
-NV04_PGRAPH_VALID2,
-};
-
-static int nv17_graph_ctx_regs [] = {
-NV10_PGRAPH_DEBUG_4,
-0x004006b0,
-0x00400eac,
-0x00400eb0,
-0x00400eb4,
-0x00400eb8,
-0x00400ebc,
-0x00400ec0,
-0x00400ec4,
-0x00400ec8,
-0x00400ecc,
-0x00400ed0,
-0x00400ed4,
-0x00400ed8,
-0x00400edc,
-0x00400ee0,
-0x00400a00,
-0x00400a04,
-};
-
-struct graph_state {
- int nv10[sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0])];
- int nv17[sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0])];
- struct pipe_state pipe_state;
-};
-
-static void nv10_graph_save_pipe(struct nouveau_channel *chan) {
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = chan->pgraph_ctx;
- struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state;
- int i;
-#define PIPE_SAVE(addr) \
- do { \
- NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, addr); \
- for (i=0; i < sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]); i++) \
- fifo_pipe_state->pipe_##addr[i] = NV_READ(NV10_PGRAPH_PIPE_DATA); \
- } while (0)
-
- PIPE_SAVE(0x4400);
- PIPE_SAVE(0x0200);
- PIPE_SAVE(0x6400);
- PIPE_SAVE(0x6800);
- PIPE_SAVE(0x6c00);
- PIPE_SAVE(0x7000);
- PIPE_SAVE(0x7400);
- PIPE_SAVE(0x7800);
- PIPE_SAVE(0x0040);
- PIPE_SAVE(0x0000);
-
-#undef PIPE_SAVE
-}
-
-static void nv10_graph_load_pipe(struct nouveau_channel *chan) {
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = chan->pgraph_ctx;
- struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state;
- int i;
- uint32_t xfmode0, xfmode1;
-#define PIPE_RESTORE(addr) \
- do { \
- NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, addr); \
- for (i=0; i < sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]); i++) \
- NV_WRITE(NV10_PGRAPH_PIPE_DATA, fifo_pipe_state->pipe_##addr[i]); \
- } while (0)
-
-
- nouveau_wait_for_idle(dev);
- /* XXX check haiku comments */
- xfmode0 = NV_READ(NV10_PGRAPH_XFMODE0);
- xfmode1 = NV_READ(NV10_PGRAPH_XFMODE1);
- NV_WRITE(NV10_PGRAPH_XFMODE0, 0x10000000);
- NV_WRITE(NV10_PGRAPH_XFMODE1, 0x00000000);
- NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0);
- for (i = 0; i < 4; i++)
- NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);
- for (i = 0; i < 4; i++)
- NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);
-
- NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0);
- for (i = 0; i < 3; i++)
- NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);
-
- NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80);
- for (i = 0; i < 3; i++)
- NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);
-
- NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000040);
- NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000008);
-
-
- PIPE_RESTORE(0x0200);
- nouveau_wait_for_idle(dev);
-
- /* restore XFMODE */
- NV_WRITE(NV10_PGRAPH_XFMODE0, xfmode0);
- NV_WRITE(NV10_PGRAPH_XFMODE1, xfmode1);
- PIPE_RESTORE(0x6400);
- PIPE_RESTORE(0x6800);
- PIPE_RESTORE(0x6c00);
- PIPE_RESTORE(0x7000);
- PIPE_RESTORE(0x7400);
- PIPE_RESTORE(0x7800);
- PIPE_RESTORE(0x4400);
- PIPE_RESTORE(0x0000);
- PIPE_RESTORE(0x0040);
- nouveau_wait_for_idle(dev);
-
-#undef PIPE_RESTORE
-}
-
-static void nv10_graph_create_pipe(struct nouveau_channel *chan) {
- struct graph_state* pgraph_ctx = chan->pgraph_ctx;
- struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state;
- uint32_t *fifo_pipe_state_addr;
- int i;
-#define PIPE_INIT(addr) \
- do { \
- fifo_pipe_state_addr = fifo_pipe_state->pipe_##addr; \
- } while (0)
-#define PIPE_INIT_END(addr) \
- do { \
- if (fifo_pipe_state_addr != \
- sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]) + fifo_pipe_state->pipe_##addr) \
- DRM_ERROR("incomplete pipe init for 0x%x : %p/%p\n", addr, fifo_pipe_state_addr, \
- sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]) + fifo_pipe_state->pipe_##addr); \
- } while (0)
-#define NV_WRITE_PIPE_INIT(value) *(fifo_pipe_state_addr++) = value
-
- PIPE_INIT(0x0200);
- for (i = 0; i < 48; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- PIPE_INIT_END(0x0200);
-
- PIPE_INIT(0x6400);
- for (i = 0; i < 211; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x3f800000);
- NV_WRITE_PIPE_INIT(0x40000000);
- NV_WRITE_PIPE_INIT(0x40000000);
- NV_WRITE_PIPE_INIT(0x40000000);
- NV_WRITE_PIPE_INIT(0x40000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x3f800000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x3f000000);
- NV_WRITE_PIPE_INIT(0x3f000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x3f800000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x3f800000);
- NV_WRITE_PIPE_INIT(0x3f800000);
- NV_WRITE_PIPE_INIT(0x3f800000);
- NV_WRITE_PIPE_INIT(0x3f800000);
- PIPE_INIT_END(0x6400);
-
- PIPE_INIT(0x6800);
- for (i = 0; i < 162; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x3f800000);
- for (i = 0; i < 25; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- PIPE_INIT_END(0x6800);
-
- PIPE_INIT(0x6c00);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0xbf800000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- PIPE_INIT_END(0x6c00);
-
- PIPE_INIT(0x7000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x7149f2ca);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x7149f2ca);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x7149f2ca);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x7149f2ca);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x7149f2ca);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x7149f2ca);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x7149f2ca);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x00000000);
- NV_WRITE_PIPE_INIT(0x7149f2ca);
- for (i = 0; i < 35; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- PIPE_INIT_END(0x7000);
-
- PIPE_INIT(0x7400);
- for (i = 0; i < 48; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- PIPE_INIT_END(0x7400);
-
- PIPE_INIT(0x7800);
- for (i = 0; i < 48; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- PIPE_INIT_END(0x7800);
-
- PIPE_INIT(0x4400);
- for (i = 0; i < 32; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- PIPE_INIT_END(0x4400);
-
- PIPE_INIT(0x0000);
- for (i = 0; i < 16; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- PIPE_INIT_END(0x0000);
-
- PIPE_INIT(0x0040);
- for (i = 0; i < 4; i++)
- NV_WRITE_PIPE_INIT(0x00000000);
- PIPE_INIT_END(0x0040);
-
-#undef PIPE_INIT
-#undef PIPE_INIT_END
-#undef NV_WRITE_PIPE_INIT
-}
-
-static int nv10_graph_ctx_regs_find_offset(struct drm_device *dev, int reg)
-{
- int i;
- for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++) {
- if (nv10_graph_ctx_regs[i] == reg)
- return i;
- }
- DRM_ERROR("unknow offset nv10_ctx_regs %d\n", reg);
- return -1;
-}
-
-static int nv17_graph_ctx_regs_find_offset(struct drm_device *dev, int reg)
-{
- int i;
- for (i = 0; i < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++) {
- if (nv17_graph_ctx_regs[i] == reg)
- return i;
- }
- DRM_ERROR("unknow offset nv17_ctx_regs %d\n", reg);
- return -1;
-}
-
-int nv10_graph_load_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = chan->pgraph_ctx;
- int i;
-
- for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++)
- NV_WRITE(nv10_graph_ctx_regs[i], pgraph_ctx->nv10[i]);
- if (dev_priv->chipset>=0x17) {
- for (i = 0; i < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++)
- NV_WRITE(nv17_graph_ctx_regs[i], pgraph_ctx->nv17[i]);
- }
-
- nv10_graph_load_pipe(chan);
-
- return 0;
-}
-
-int nv10_graph_save_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = chan->pgraph_ctx;
- int i;
-
- for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++)
- pgraph_ctx->nv10[i] = NV_READ(nv10_graph_ctx_regs[i]);
- if (dev_priv->chipset>=0x17) {
- for (i = 0; i < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++)
- pgraph_ctx->nv17[i] = NV_READ(nv17_graph_ctx_regs[i]);
- }
-
- nv10_graph_save_pipe(chan);
-
- return 0;
-}
-
-void nouveau_nv10_context_switch(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv;
- struct nouveau_engine *engine;
- struct nouveau_channel *next, *last;
- int chid;
-
- if (!dev) {
- DRM_DEBUG("Invalid drm_device\n");
- return;
- }
- dev_priv = dev->dev_private;
- if (!dev_priv) {
- DRM_DEBUG("Invalid drm_nouveau_private\n");
- return;
- }
- if (!dev_priv->fifos) {
- DRM_DEBUG("Invalid drm_nouveau_private->fifos\n");
- return;
- }
- engine = &dev_priv->Engine;
-
- chid = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 20) &
- (engine->fifo.channels - 1);
- next = dev_priv->fifos[chid];
-
- if (!next) {
- DRM_ERROR("Invalid next channel\n");
- return;
- }
-
- chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) &
- (engine->fifo.channels - 1);
- last = dev_priv->fifos[chid];
-
- if (!last) {
- DRM_INFO("WARNING: Invalid last channel, switch to %x\n",
- next->id);
- } else {
- DRM_DEBUG("NV: PGRAPH context switch interrupt channel %x -> %x\n",
- last->id, next->id);
- }
-
- NV_WRITE(NV04_PGRAPH_FIFO,0x0);
- if (last) {
- nouveau_wait_for_idle(dev);
- nv10_graph_save_context(last);
- }
-
- nouveau_wait_for_idle(dev);
-
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10000000);
-
- nouveau_wait_for_idle(dev);
-
- nv10_graph_load_context(next);
-
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100);
- NV_WRITE(NV10_PGRAPH_FFINTFC_ST2, NV_READ(NV10_PGRAPH_FFINTFC_ST2)&0xCFFFFFFF);
- NV_WRITE(NV04_PGRAPH_FIFO,0x1);
-}
-
-#define NV_WRITE_CTX(reg, val) do { \
- int offset = nv10_graph_ctx_regs_find_offset(dev, reg); \
- if (offset > 0) \
- pgraph_ctx->nv10[offset] = val; \
- } while (0)
-
-#define NV17_WRITE_CTX(reg, val) do { \
- int offset = nv17_graph_ctx_regs_find_offset(dev, reg); \
- if (offset > 0) \
- pgraph_ctx->nv17[offset] = val; \
- } while (0)
-
-int nv10_graph_create_context(struct nouveau_channel *chan) {
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx;
-
- DRM_DEBUG("nv10_graph_context_create %d\n", chan->id);
-
- chan->pgraph_ctx = pgraph_ctx = drm_calloc(1, sizeof(*pgraph_ctx),
- DRM_MEM_DRIVER);
-
- if (pgraph_ctx == NULL)
- return -ENOMEM;
-
- /* mmio trace suggest that should be done in ddx with methods/objects */
-#if 0
- uint32_t tmp, vramsz;
- /* per channel init from ddx */
- tmp = NV_READ(NV10_PGRAPH_SURFACE) & 0x0007ff00;
- /*XXX the original ddx code, does this in 2 steps :
- * tmp = NV_READ(NV10_PGRAPH_SURFACE) & 0x0007ff00;
- * NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
- * tmp = NV_READ(NV10_PGRAPH_SURFACE) | 0x00020100;
- * NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
- */
- tmp |= 0x00020100;
- NV_WRITE_CTX(NV10_PGRAPH_SURFACE, tmp);
-
- vramsz = drm_get_resource_len(dev, 0) - 1;
- NV_WRITE_CTX(NV04_PGRAPH_BOFFSET0, 0);
- NV_WRITE_CTX(NV04_PGRAPH_BOFFSET1, 0);
- NV_WRITE_CTX(NV04_PGRAPH_BLIMIT0 , vramsz);
- NV_WRITE_CTX(NV04_PGRAPH_BLIMIT1 , vramsz);
-
- NV_WRITE_CTX(NV04_PGRAPH_PATTERN_SHAPE, 0x00000000);
- NV_WRITE_CTX(NV04_PGRAPH_BETA_AND , 0xFFFFFFFF);
-
- NV_WRITE_CTX(NV03_PGRAPH_ABS_UCLIP_XMIN, 0);
- NV_WRITE_CTX(NV03_PGRAPH_ABS_UCLIP_YMIN, 0);
- NV_WRITE_CTX(NV03_PGRAPH_ABS_UCLIP_XMAX, 0x7fff);
- NV_WRITE_CTX(NV03_PGRAPH_ABS_UCLIP_YMAX, 0x7fff);
-#endif
-
- NV_WRITE_CTX(0x00400e88, 0x08000000);
- NV_WRITE_CTX(0x00400e9c, 0x4b7fffff);
- NV_WRITE_CTX(NV03_PGRAPH_XY_LOGIC_MISC0, 0x0001ffff);
- NV_WRITE_CTX(0x00400e10, 0x00001000);
- NV_WRITE_CTX(0x00400e14, 0x00001000);
- NV_WRITE_CTX(0x00400e30, 0x00080008);
- NV_WRITE_CTX(0x00400e34, 0x00080008);
- if (dev_priv->chipset>=0x17) {
- /* is it really needed ??? */
- NV17_WRITE_CTX(NV10_PGRAPH_DEBUG_4, NV_READ(NV10_PGRAPH_DEBUG_4));
- NV17_WRITE_CTX(0x004006b0, NV_READ(0x004006b0));
- NV17_WRITE_CTX(0x00400eac, 0x0fff0000);
- NV17_WRITE_CTX(0x00400eb0, 0x0fff0000);
- NV17_WRITE_CTX(0x00400ec0, 0x00000080);
- NV17_WRITE_CTX(0x00400ed0, 0x00000080);
- }
- NV_WRITE_CTX(NV10_PGRAPH_CTX_USER, chan->id << 24);
-
- nv10_graph_create_pipe(chan);
- return 0;
-}
-
-void nv10_graph_destroy_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_engine *engine = &dev_priv->Engine;
- struct graph_state* pgraph_ctx = chan->pgraph_ctx;
- int chid;
-
- drm_free(pgraph_ctx, sizeof(*pgraph_ctx), DRM_MEM_DRIVER);
- chan->pgraph_ctx = NULL;
-
- chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (engine->fifo.channels - 1);
-
- /* This code seems to corrupt the 3D pipe, but blob seems to do similar things ????
- */
-#if 0
- /* does this avoid a potential context switch while we are written graph
- * reg, or we should mask graph interrupt ???
- */
- NV_WRITE(NV04_PGRAPH_FIFO,0x0);
- if (chid == chan->id) {
- DRM_INFO("cleanning a channel with graph in current context\n");
- nouveau_wait_for_idle(dev);
- DRM_INFO("reseting current graph context\n");
- /* can't be call here because of dynamic mem alloc */
- //nv10_graph_create_context(chan);
- nv10_graph_load_context(chan);
- }
- NV_WRITE(NV04_PGRAPH_FIFO, 0x1);
-#else
- if (chid == chan->id) {
- DRM_INFO("cleanning a channel with graph in current context\n");
- }
-#endif
-}
-
-int nv10_graph_init(struct drm_device *dev) {
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) &
- ~NV_PMC_ENABLE_PGRAPH);
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) |
- NV_PMC_ENABLE_PGRAPH);
-
- NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF);
- NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
-
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF);
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000);
- NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x00118700);
- //NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x24E00810); /* 0x25f92ad9 */
- NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x25f92ad9);
- NV_WRITE(NV04_PGRAPH_DEBUG_3, 0x55DE0830 |
- (1<<29) |
- (1<<31));
- if (dev_priv->chipset>=0x17) {
- NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x1f000000);
- NV_WRITE(0x004006b0, 0x40000020);
- }
- else
- NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00000000);
-
- /* copy tile info from PFB */
- for (i=0; i<NV10_PFB_TILE__SIZE; i++) {
- NV_WRITE(NV10_PGRAPH_TILE(i), NV_READ(NV10_PFB_TILE(i)));
- NV_WRITE(NV10_PGRAPH_TLIMIT(i), NV_READ(NV10_PFB_TLIMIT(i)));
- NV_WRITE(NV10_PGRAPH_TSIZE(i), NV_READ(NV10_PFB_TSIZE(i)));
- NV_WRITE(NV10_PGRAPH_TSTATUS(i), NV_READ(NV10_PFB_TSTATUS(i)));
- }
-
- NV_WRITE(NV10_PGRAPH_CTX_SWITCH1, 0x00000000);
- NV_WRITE(NV10_PGRAPH_CTX_SWITCH2, 0x00000000);
- NV_WRITE(NV10_PGRAPH_CTX_SWITCH3, 0x00000000);
- NV_WRITE(NV10_PGRAPH_CTX_SWITCH4, 0x00000000);
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100);
- NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF);
- NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001);
-
- return 0;
-}
-
-void nv10_graph_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-/*
- * NV20
- * -----
- * There are 3 families :
- * NV20 is 0x10de:0x020*
- * NV25/28 is 0x10de:0x025* / 0x10de:0x028*
- * NV2A is 0x10de:0x02A0
- *
- * NV30
- * -----
- * There are 3 families :
- * NV30/31 is 0x10de:0x030* / 0x10de:0x031*
- * NV34 is 0x10de:0x032*
- * NV35/36 is 0x10de:0x033* / 0x10de:0x034*
- *
- * Not seen in the wild, no dumps (probably NV35) :
- * NV37 is 0x10de:0x00fc, 0x10de:0x00fd
- * NV38 is 0x10de:0x0333, 0x10de:0x00fe
- *
- */
-
-#define NV20_GRCTX_SIZE (3580*4)
-#define NV25_GRCTX_SIZE (3529*4)
-#define NV2A_GRCTX_SIZE (3500*4)
-
-#define NV30_31_GRCTX_SIZE (24392)
-#define NV34_GRCTX_SIZE (18140)
-#define NV35_36_GRCTX_SIZE (22396)
-
-static void nv20_graph_context_init(struct drm_device *dev,
- struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-/*
-write32 #1 block at +0x00740adc NV_PRAMIN+0x40adc of 3369 (0xd29) elements:
-+0x00740adc: ffff0000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740afc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740b1c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740b3c: 00000000 0fff0000 0fff0000 00000000 00000000 00000000 00000000 00000000
-+0x00740b5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740b7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740b9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740bbc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740bdc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740bfc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-
-+0x00740c1c: 00000101 00000000 00000000 00000000 00000000 00000111 00000000 00000000
-+0x00740c3c: 00000000 00000000 00000000 44400000 00000000 00000000 00000000 00000000
-+0x00740c5c: 00000000 00000000 00000000 00000000 00000000 00000000 00030303 00030303
-+0x00740c7c: 00030303 00030303 00000000 00000000 00000000 00000000 00080000 00080000
-+0x00740c9c: 00080000 00080000 00000000 00000000 01012000 01012000 01012000 01012000
-+0x00740cbc: 000105b8 000105b8 000105b8 000105b8 00080008 00080008 00080008 00080008
-+0x00740cdc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740cfc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000
-+0x00740d1c: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000
-+0x00740d3c: 00000000 00000000 4b7fffff 00000000 00000000 00000000 00000000 00000000
-
-+0x00740d5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740d7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740d9c: 00000001 00000000 00004000 00000000 00000000 00000001 00000000 00040000
-+0x00740dbc: 00010000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740ddc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-...
-*/
- INSTANCE_WR(ctx, (0x33c/4)+0, 0xffff0000);
- INSTANCE_WR(ctx, (0x33c/4)+25, 0x0fff0000);
- INSTANCE_WR(ctx, (0x33c/4)+26, 0x0fff0000);
- INSTANCE_WR(ctx, (0x33c/4)+80, 0x00000101);
- INSTANCE_WR(ctx, (0x33c/4)+85, 0x00000111);
- INSTANCE_WR(ctx, (0x33c/4)+91, 0x44400000);
- for (i = 0; i < 4; ++i)
- INSTANCE_WR(ctx, (0x33c/4)+102+i, 0x00030303);
- for (i = 0; i < 4; ++i)
- INSTANCE_WR(ctx, (0x33c/4)+110+i, 0x00080000);
- for (i = 0; i < 4; ++i)
- INSTANCE_WR(ctx, (0x33c/4)+116+i, 0x01012000);
- for (i = 0; i < 4; ++i)
- INSTANCE_WR(ctx, (0x33c/4)+120+i, 0x000105b8);
- for (i = 0; i < 4; ++i)
- INSTANCE_WR(ctx, (0x33c/4)+124+i, 0x00080008);
- for (i = 0; i < 16; ++i)
- INSTANCE_WR(ctx, (0x33c/4)+136+i, 0x07ff0000);
- INSTANCE_WR(ctx, (0x33c/4)+154, 0x4b7fffff);
- INSTANCE_WR(ctx, (0x33c/4)+176, 0x00000001);
- INSTANCE_WR(ctx, (0x33c/4)+178, 0x00004000);
- INSTANCE_WR(ctx, (0x33c/4)+181, 0x00000001);
- INSTANCE_WR(ctx, (0x33c/4)+183, 0x00040000);
- INSTANCE_WR(ctx, (0x33c/4)+184, 0x00010000);
-
-/*
-...
-+0x0074239c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x007423bc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x007423dc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x007423fc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-...
-+0x00742bdc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x00742bfc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x00742c1c: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x00742c3c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-...
-*/
- for (i = 0; i < 0x880; i += 0x10) {
- INSTANCE_WR(ctx, ((0x1c1c + i)/4)+0, 0x10700ff9);
- INSTANCE_WR(ctx, ((0x1c1c + i)/4)+1, 0x0436086c);
- INSTANCE_WR(ctx, ((0x1c1c + i)/4)+2, 0x000c001b);
- }
-
-/*
-write32 #1 block at +0x00742fbc NV_PRAMIN+0x42fbc of 4 (0x4) elements:
-+0x00742fbc: 3f800000 00000000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x281c/4), 0x3f800000);
-
-/*
-write32 #1 block at +0x00742ffc NV_PRAMIN+0x42ffc of 12 (0xc) elements:
-+0x00742ffc: 40000000 3f800000 3f000000 00000000 40000000 3f800000 00000000 bf800000
-+0x0074301c: 00000000 bf800000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x285c/4)+0, 0x40000000);
- INSTANCE_WR(ctx, (0x285c/4)+1, 0x3f800000);
- INSTANCE_WR(ctx, (0x285c/4)+2, 0x3f000000);
- INSTANCE_WR(ctx, (0x285c/4)+4, 0x40000000);
- INSTANCE_WR(ctx, (0x285c/4)+5, 0x3f800000);
- INSTANCE_WR(ctx, (0x285c/4)+7, 0xbf800000);
- INSTANCE_WR(ctx, (0x285c/4)+9, 0xbf800000);
-
-/*
-write32 #1 block at +0x00742fcc NV_PRAMIN+0x42fcc of 4 (0x4) elements:
-+0x00742fcc: 00000000 3f800000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x282c/4)+1, 0x3f800000);
-
-/*
-write32 #1 block at +0x0074302c NV_PRAMIN+0x4302c of 4 (0x4) elements:
-+0x0074302c: 00000000 00000000 00000000 00000000
-write32 #1 block at +0x00743c9c NV_PRAMIN+0x43c9c of 4 (0x4) elements:
-+0x00743c9c: 00000000 00000000 00000000 00000000
-write32 #1 block at +0x00743c3c NV_PRAMIN+0x43c3c of 8 (0x8) elements:
-+0x00743c3c: 00000000 00000000 000fe000 00000000 00000000 00000000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x349c/4)+2, 0x000fe000);
-
-/*
-write32 #1 block at +0x00743c6c NV_PRAMIN+0x43c6c of 4 (0x4) elements:
-+0x00743c6c: 00000000 00000000 00000000 00000000
-write32 #1 block at +0x00743ccc NV_PRAMIN+0x43ccc of 4 (0x4) elements:
-+0x00743ccc: 00000000 000003f8 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x352c/4)+1, 0x000003f8);
-
-/* write32 #1 NV_PRAMIN+0x43ce0 <- 0x002fe000 */
- INSTANCE_WR(ctx, 0x3540/4, 0x002fe000);
-
-/*
-write32 #1 block at +0x00743cfc NV_PRAMIN+0x43cfc of 8 (0x8) elements:
-+0x00743cfc: 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c
-*/
- for (i = 0; i < 8; ++i)
- INSTANCE_WR(ctx, (0x355c/4)+i, 0x001c527c);
-}
-
-static void nv2a_graph_context_init(struct drm_device *dev,
- struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x33c/4, 0xffff0000);
- for(i = 0x3a0; i< 0x3a8; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x47c/4, 0x00000101);
- INSTANCE_WR(ctx, 0x490/4, 0x00000111);
- INSTANCE_WR(ctx, 0x4a8/4, 0x44400000);
- for(i = 0x4d4; i< 0x4e4; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00030303);
- for(i = 0x4f4; i< 0x504; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00080000);
- for(i = 0x50c; i< 0x51c; i += 4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for(i = 0x51c; i< 0x52c; i += 4)
- INSTANCE_WR(ctx, i/4, 0x000105b8);
- for(i = 0x52c; i< 0x53c; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for(i = 0x55c; i< 0x59c; i += 4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x5a4/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x5fc/4, 0x00000001);
- INSTANCE_WR(ctx, 0x604/4, 0x00004000);
- INSTANCE_WR(ctx, 0x610/4, 0x00000001);
- INSTANCE_WR(ctx, 0x618/4, 0x00040000);
- INSTANCE_WR(ctx, 0x61c/4, 0x00010000);
-
- for (i=0x1a9c; i <= 0x22fc/4; i += 32) {
- INSTANCE_WR(ctx, i/4 , 0x10700ff9);
- INSTANCE_WR(ctx, i/4 + 1, 0x0436086c);
- INSTANCE_WR(ctx, i/4 + 2, 0x000c001b);
- }
-
- INSTANCE_WR(ctx, 0x269c/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x26b0/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x26dc/4, 0x40000000);
- INSTANCE_WR(ctx, 0x26e0/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x26e4/4, 0x3f000000);
- INSTANCE_WR(ctx, 0x26ec/4, 0x40000000);
- INSTANCE_WR(ctx, 0x26f0/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x26f8/4, 0xbf800000);
- INSTANCE_WR(ctx, 0x2700/4, 0xbf800000);
- INSTANCE_WR(ctx, 0x3024/4, 0x000fe000);
- INSTANCE_WR(ctx, 0x30a0/4, 0x000003f8);
- INSTANCE_WR(ctx, 0x33fc/4, 0x002fe000);
- for(i = 0x341c; i< 0x343c; i += 4)
- INSTANCE_WR(ctx, i/4, 0x001c527c);
-}
-
-static void nv25_graph_context_init(struct drm_device *dev,
- struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-/*
-write32 #1 block at +0x00740a7c NV_PRAMIN.GRCTX0+0x35c of 173 (0xad) elements:
-+0x00740a7c: ffff0000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740a9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740abc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740adc: 00000000 0fff0000 0fff0000 00000000 00000000 00000000 00000000 00000000
-+0x00740afc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740b1c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740b3c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740b5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-
-+0x00740b7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740b9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740bbc: 00000101 00000000 00000000 00000000 00000000 00000111 00000000 00000000
-+0x00740bdc: 00000000 00000000 00000000 00000080 ffff0000 00000001 00000000 00000000
-+0x00740bfc: 00000000 00000000 44400000 00000000 00000000 00000000 00000000 00000000
-+0x00740c1c: 4b800000 00000000 00000000 00000000 00000000 00030303 00030303 00030303
-+0x00740c3c: 00030303 00000000 00000000 00000000 00000000 00080000 00080000 00080000
-+0x00740c5c: 00080000 00000000 00000000 01012000 01012000 01012000 01012000 000105b8
-
-+0x00740c7c: 000105b8 000105b8 000105b8 00080008 00080008 00080008 00080008 00000000
-+0x00740c9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 07ff0000
-+0x00740cbc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000
-+0x00740cdc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 00000000
-+0x00740cfc: 00000000 4b7fffff 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740d1c: 00000000 00000000 00000000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x35c/4)+0, 0xffff0000);
- INSTANCE_WR(ctx, (0x35c/4)+25, 0x0fff0000);
- INSTANCE_WR(ctx, (0x35c/4)+26, 0x0fff0000);
- INSTANCE_WR(ctx, (0x35c/4)+80, 0x00000101);
- INSTANCE_WR(ctx, (0x35c/4)+85, 0x00000111);
- INSTANCE_WR(ctx, (0x35c/4)+91, 0x00000080);
- INSTANCE_WR(ctx, (0x35c/4)+92, 0xffff0000);
- INSTANCE_WR(ctx, (0x35c/4)+93, 0x00000001);
- INSTANCE_WR(ctx, (0x35c/4)+98, 0x44400000);
- INSTANCE_WR(ctx, (0x35c/4)+104, 0x4b800000);
- INSTANCE_WR(ctx, (0x35c/4)+109, 0x00030303);
- INSTANCE_WR(ctx, (0x35c/4)+110, 0x00030303);
- INSTANCE_WR(ctx, (0x35c/4)+111, 0x00030303);
- INSTANCE_WR(ctx, (0x35c/4)+112, 0x00030303);
- INSTANCE_WR(ctx, (0x35c/4)+117, 0x00080000);
- INSTANCE_WR(ctx, (0x35c/4)+118, 0x00080000);
- INSTANCE_WR(ctx, (0x35c/4)+119, 0x00080000);
- INSTANCE_WR(ctx, (0x35c/4)+120, 0x00080000);
- INSTANCE_WR(ctx, (0x35c/4)+123, 0x01012000);
- INSTANCE_WR(ctx, (0x35c/4)+124, 0x01012000);
- INSTANCE_WR(ctx, (0x35c/4)+125, 0x01012000);
- INSTANCE_WR(ctx, (0x35c/4)+126, 0x01012000);
- INSTANCE_WR(ctx, (0x35c/4)+127, 0x000105b8);
- INSTANCE_WR(ctx, (0x35c/4)+128, 0x000105b8);
- INSTANCE_WR(ctx, (0x35c/4)+129, 0x000105b8);
- INSTANCE_WR(ctx, (0x35c/4)+130, 0x000105b8);
- INSTANCE_WR(ctx, (0x35c/4)+131, 0x00080008);
- INSTANCE_WR(ctx, (0x35c/4)+132, 0x00080008);
- INSTANCE_WR(ctx, (0x35c/4)+133, 0x00080008);
- INSTANCE_WR(ctx, (0x35c/4)+134, 0x00080008);
- for (i=0; i<16; ++i)
- INSTANCE_WR(ctx, (0x35c/4)+143+i, 0x07ff0000);
- INSTANCE_WR(ctx, (0x35c/4)+161, 0x4b7fffff);
-
-/*
-write32 #1 block at +0x00740d34 NV_PRAMIN.GRCTX0+0x614 of 3136 (0xc40) elements:
-+0x00740d34: 00000000 00000000 00000000 00000080 30201000 70605040 b0a09080 f0e0d0c0
-+0x00740d54: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00740d74: 00000000 00000000 00000000 00000000 00000001 00000000 00004000 00000000
-+0x00740d94: 00000000 00000001 00000000 00040000 00010000 00000000 00000000 00000000
-+0x00740db4: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-...
-+0x00742214: 00000000 00000000 00000000 00000000 10700ff9 0436086c 000c001b 00000000
-+0x00742234: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x00742254: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x00742274: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-...
-+0x00742a34: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x00742a54: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x00742a74: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
-+0x00742a94: 10700ff9 0436086c 000c001b 00000000 00000000 00000000 00000000 00000000
-+0x00742ab4: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-+0x00742ad4: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x614/4)+3, 0x00000080);
- INSTANCE_WR(ctx, (0x614/4)+4, 0x30201000);
- INSTANCE_WR(ctx, (0x614/4)+5, 0x70605040);
- INSTANCE_WR(ctx, (0x614/4)+6, 0xb0a09080);
- INSTANCE_WR(ctx, (0x614/4)+7, 0xf0e0d0c0);
- INSTANCE_WR(ctx, (0x614/4)+20, 0x00000001);
- INSTANCE_WR(ctx, (0x614/4)+22, 0x00004000);
- INSTANCE_WR(ctx, (0x614/4)+25, 0x00000001);
- INSTANCE_WR(ctx, (0x614/4)+27, 0x00040000);
- INSTANCE_WR(ctx, (0x614/4)+28, 0x00010000);
- for (i=0; i < 0x880/4; i+=4) {
- INSTANCE_WR(ctx, (0x1b04/4)+i+0, 0x10700ff9);
- INSTANCE_WR(ctx, (0x1b04/4)+i+1, 0x0436086c);
- INSTANCE_WR(ctx, (0x1b04/4)+i+2, 0x000c001b);
- }
-
-/*
-write32 #1 block at +0x00742e24 NV_PRAMIN.GRCTX0+0x2704 of 4 (0x4) elements:
-+0x00742e24: 3f800000 00000000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x2704/4), 0x3f800000);
-
-/*
-write32 #1 block at +0x00742e64 NV_PRAMIN.GRCTX0+0x2744 of 12 (0xc) elements:
-+0x00742e64: 40000000 3f800000 3f000000 00000000 40000000 3f800000 00000000 bf800000
-+0x00742e84: 00000000 bf800000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x2744/4)+0, 0x40000000);
- INSTANCE_WR(ctx, (0x2744/4)+1, 0x3f800000);
- INSTANCE_WR(ctx, (0x2744/4)+2, 0x3f000000);
- INSTANCE_WR(ctx, (0x2744/4)+4, 0x40000000);
- INSTANCE_WR(ctx, (0x2744/4)+5, 0x3f800000);
- INSTANCE_WR(ctx, (0x2744/4)+7, 0xbf800000);
- INSTANCE_WR(ctx, (0x2744/4)+9, 0xbf800000);
-
-/*
-write32 #1 block at +0x00742e34 NV_PRAMIN.GRCTX0+0x2714 of 4 (0x4) elements:
-+0x00742e34: 00000000 3f800000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x2714/4)+1, 0x3f800000);
-
-/*
-write32 #1 block at +0x00742e94 NV_PRAMIN.GRCTX0+0x2774 of 4 (0x4) elements:
-+0x00742e94: 00000000 00000000 00000000 00000000
-write32 #1 block at +0x00743804 NV_PRAMIN.GRCTX0+0x30e4 of 4 (0x4) elements:
-+0x00743804: 00000000 00000000 00000000 00000000
-write32 #1 block at +0x007437a4 NV_PRAMIN.GRCTX0+0x3084 of 8 (0x8) elements:
-+0x007437a4: 00000000 00000000 000fe000 00000000 00000000 00000000 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x3084/4)+2, 0x000fe000);
-
-/*
-write32 #1 block at +0x007437d4 NV_PRAMIN.GRCTX0+0x30b4 of 4 (0x4) elements:
-+0x007437d4: 00000000 00000000 00000000 00000000
-write32 #1 block at +0x00743824 NV_PRAMIN.GRCTX0+0x3104 of 4 (0x4) elements:
-+0x00743824: 00000000 000003f8 00000000 00000000
-*/
- INSTANCE_WR(ctx, (0x3104/4)+1, 0x000003f8);
-
-/* write32 #1 NV_PRAMIN.GRCTX0+0x3468 <- 0x002fe000 */
- INSTANCE_WR(ctx, 0x3468/4, 0x002fe000);
-
-/*
-write32 #1 block at +0x00743ba4 NV_PRAMIN.GRCTX0+0x3484 of 8 (0x8) elements:
-+0x00743ba4: 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c
-*/
- for (i=0; i<8; ++i)
- INSTANCE_WR(ctx, (0x3484/4)+i, 0x001c527c);
-}
-
-static void nv30_31_graph_context_init(struct drm_device *dev,
- struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x410/4, 0x00000101);
- INSTANCE_WR(ctx, 0x424/4, 0x00000111);
- INSTANCE_WR(ctx, 0x428/4, 0x00000060);
- INSTANCE_WR(ctx, 0x444/4, 0x00000080);
- INSTANCE_WR(ctx, 0x448/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x44c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x460/4, 0x44400000);
- INSTANCE_WR(ctx, 0x48c/4, 0xffff0000);
- for(i = 0x4e0; i< 0x4e8; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x4ec/4, 0x00011100);
- for(i = 0x508; i< 0x548; i += 4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x550/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x58c/4, 0x00000080);
- INSTANCE_WR(ctx, 0x590/4, 0x30201000);
- INSTANCE_WR(ctx, 0x594/4, 0x70605040);
- INSTANCE_WR(ctx, 0x598/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x59c/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x5b0/4, 0xb0000000);
- for(i = 0x600; i< 0x640; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00010588);
- for(i = 0x640; i< 0x680; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00030303);
- for(i = 0x6c0; i< 0x700; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0008aae4);
- for(i = 0x700; i< 0x740; i += 4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for(i = 0x740; i< 0x780; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x85c/4, 0x00040000);
- INSTANCE_WR(ctx, 0x860/4, 0x00010000);
- for(i = 0x864; i< 0x874; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00040004);
- for(i = 0x1f18; i<= 0x3088 ; i+= 16) {
- INSTANCE_WR(ctx, i/4 + 0, 0x10700ff9);
- INSTANCE_WR(ctx, i/4 + 1, 0x0436086c);
- INSTANCE_WR(ctx, i/4 + 2, 0x000c001b);
- }
- for(i = 0x30b8; i< 0x30c8; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x344c/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x3808/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x381c/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x3848/4, 0x40000000);
- INSTANCE_WR(ctx, 0x384c/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x3850/4, 0x3f000000);
- INSTANCE_WR(ctx, 0x3858/4, 0x40000000);
- INSTANCE_WR(ctx, 0x385c/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x3864/4, 0xbf800000);
- INSTANCE_WR(ctx, 0x386c/4, 0xbf800000);
-}
-
-static void nv34_graph_context_init(struct drm_device *dev,
- struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x40c/4, 0x01000101);
- INSTANCE_WR(ctx, 0x420/4, 0x00000111);
- INSTANCE_WR(ctx, 0x424/4, 0x00000060);
- INSTANCE_WR(ctx, 0x440/4, 0x00000080);
- INSTANCE_WR(ctx, 0x444/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x448/4, 0x00000001);
- INSTANCE_WR(ctx, 0x45c/4, 0x44400000);
- INSTANCE_WR(ctx, 0x480/4, 0xffff0000);
- for(i = 0x4d4; i< 0x4dc; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x4e0/4, 0x00011100);
- for(i = 0x4fc; i< 0x53c; i += 4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x544/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x57c/4, 0x00000080);
- INSTANCE_WR(ctx, 0x580/4, 0x30201000);
- INSTANCE_WR(ctx, 0x584/4, 0x70605040);
- INSTANCE_WR(ctx, 0x588/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x58c/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x5a0/4, 0xb0000000);
- for(i = 0x5f0; i< 0x630; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00010588);
- for(i = 0x630; i< 0x670; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00030303);
- for(i = 0x6b0; i< 0x6f0; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0008aae4);
- for(i = 0x6f0; i< 0x730; i += 4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for(i = 0x730; i< 0x770; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x850/4, 0x00040000);
- INSTANCE_WR(ctx, 0x854/4, 0x00010000);
- for(i = 0x858; i< 0x868; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00040004);
- for(i = 0x15ac; i<= 0x271c ; i+= 16) {
- INSTANCE_WR(ctx, i/4 + 0, 0x10700ff9);
- INSTANCE_WR(ctx, i/4 + 1, 0x0436086c);
- INSTANCE_WR(ctx, i/4 + 2, 0x000c001b);
- }
- for(i = 0x274c; i< 0x275c; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x2ae0/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x2e9c/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x2eb0/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x2edc/4, 0x40000000);
- INSTANCE_WR(ctx, 0x2ee0/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x2ee4/4, 0x3f000000);
- INSTANCE_WR(ctx, 0x2eec/4, 0x40000000);
- INSTANCE_WR(ctx, 0x2ef0/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x2ef8/4, 0xbf800000);
- INSTANCE_WR(ctx, 0x2f00/4, 0xbf800000);
-}
-
-static void nv35_36_graph_context_init(struct drm_device *dev,
- struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x40c/4, 0x00000101);
- INSTANCE_WR(ctx, 0x420/4, 0x00000111);
- INSTANCE_WR(ctx, 0x424/4, 0x00000060);
- INSTANCE_WR(ctx, 0x440/4, 0x00000080);
- INSTANCE_WR(ctx, 0x444/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x448/4, 0x00000001);
- INSTANCE_WR(ctx, 0x45c/4, 0x44400000);
- INSTANCE_WR(ctx, 0x488/4, 0xffff0000);
- for(i = 0x4dc; i< 0x4e4; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x4e8/4, 0x00011100);
- for(i = 0x504; i< 0x544; i += 4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x54c/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x588/4, 0x00000080);
- INSTANCE_WR(ctx, 0x58c/4, 0x30201000);
- INSTANCE_WR(ctx, 0x590/4, 0x70605040);
- INSTANCE_WR(ctx, 0x594/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x598/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x5ac/4, 0xb0000000);
- for(i = 0x604; i< 0x644; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00010588);
- for(i = 0x644; i< 0x684; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00030303);
- for(i = 0x6c4; i< 0x704; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0008aae4);
- for(i = 0x704; i< 0x744; i += 4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for(i = 0x744; i< 0x784; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x860/4, 0x00040000);
- INSTANCE_WR(ctx, 0x864/4, 0x00010000);
- for(i = 0x868; i< 0x878; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00040004);
- for(i = 0x1f1c; i<= 0x308c ; i+= 16) {
- INSTANCE_WR(ctx, i/4 + 0, 0x10700ff9);
- INSTANCE_WR(ctx, i/4 + 1, 0x0436086c);
- INSTANCE_WR(ctx, i/4 + 2, 0x000c001b);
- }
- for(i = 0x30bc; i< 0x30cc; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x3450/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x380c/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x3820/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x384c/4, 0x40000000);
- INSTANCE_WR(ctx, 0x3850/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x3854/4, 0x3f000000);
- INSTANCE_WR(ctx, 0x385c/4, 0x40000000);
- INSTANCE_WR(ctx, 0x3860/4, 0x3f800000);
- INSTANCE_WR(ctx, 0x3868/4, 0xbf800000);
- INSTANCE_WR(ctx, 0x3870/4, 0xbf800000);
-}
-
-int nv20_graph_create_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *);
- unsigned int ctx_size;
- unsigned int idoffs = 0x28/4;
- int ret;
-
- switch (dev_priv->chipset) {
- case 0x20:
- ctx_size = NV20_GRCTX_SIZE;
- ctx_init = nv20_graph_context_init;
- idoffs = 0;
- break;
- case 0x25:
- case 0x28:
- ctx_size = NV25_GRCTX_SIZE;
- ctx_init = nv25_graph_context_init;
- break;
- case 0x2a:
- ctx_size = NV2A_GRCTX_SIZE;
- ctx_init = nv2a_graph_context_init;
- idoffs = 0;
- break;
- case 0x30:
- case 0x31:
- ctx_size = NV30_31_GRCTX_SIZE;
- ctx_init = nv30_31_graph_context_init;
- break;
- case 0x34:
- ctx_size = NV34_GRCTX_SIZE;
- ctx_init = nv34_graph_context_init;
- break;
- case 0x35:
- case 0x36:
- ctx_size = NV35_36_GRCTX_SIZE;
- ctx_init = nv35_36_graph_context_init;
- break;
- default:
- ctx_size = 0;
- ctx_init = nv35_36_graph_context_init;
- DRM_ERROR("Please contact the devs if you want your NV%x"
- " card to work\n", dev_priv->chipset);
- return -ENOSYS;
- break;
- }
-
- if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, ctx_size, 16,
- NVOBJ_FLAG_ZERO_ALLOC,
- &chan->ramin_grctx)))
- return ret;
-
- /* Initialise default context values */
- ctx_init(dev, chan->ramin_grctx->gpuobj);
-
- /* nv20: INSTANCE_WR(chan->ramin_grctx->gpuobj, 10, chan->id<<24); */
- INSTANCE_WR(chan->ramin_grctx->gpuobj, idoffs, (chan->id<<24)|0x1);
- /* CTX_USER */
-
- INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id,
- chan->ramin_grctx->instance >> 4);
-
- return 0;
-}
-
-void nv20_graph_destroy_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- if (chan->ramin_grctx)
- nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx);
-
- INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id, 0);
-}
-
-int nv20_graph_load_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t inst;
-
- if (!chan->ramin_grctx)
- return -EINVAL;
- inst = chan->ramin_grctx->instance >> 4;
-
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_XFER,
- NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD);
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100);
-
- nouveau_wait_for_idle(dev);
- return 0;
-}
-
-int nv20_graph_save_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t inst;
-
- if (!chan->ramin_grctx)
- return -EINVAL;
- inst = chan->ramin_grctx->instance >> 4;
-
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_XFER,
- NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE);
-
- nouveau_wait_for_idle(dev);
- return 0;
-}
-
-static void nv20_graph_rdi(struct drm_device *dev) {
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i, writecount = 32;
- uint32_t rdi_index = 0x2c80000;
-
- if (dev_priv->chipset == 0x20) {
- rdi_index = 0x3d0000;
- writecount = 15;
- }
-
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, rdi_index);
- for (i = 0; i < writecount; i++)
- NV_WRITE(NV10_PGRAPH_RDI_DATA, 0);
-
- nouveau_wait_for_idle(dev);
-}
-
-int nv20_graph_init(struct drm_device *dev) {
- struct drm_nouveau_private *dev_priv =
- (struct drm_nouveau_private *)dev->dev_private;
- uint32_t tmp, vramsz;
- int ret, i;
-
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) &
- ~NV_PMC_ENABLE_PGRAPH);
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) |
- NV_PMC_ENABLE_PGRAPH);
-
- if (!dev_priv->ctx_table) {
- /* Create Context Pointer Table */
- dev_priv->ctx_table_size = 32 * 4;
- if ((ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0,
- dev_priv->ctx_table_size, 16,
- NVOBJ_FLAG_ZERO_ALLOC,
- &dev_priv->ctx_table)))
- return ret;
- }
-
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_TABLE,
- dev_priv->ctx_table->instance >> 4);
-
- nv20_graph_rdi(dev);
-
- NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF);
- NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
-
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF);
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000);
- NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x00118700);
- NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xF3CE0475); /* 0x4 = auto ctx switch */
- NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00000000);
- NV_WRITE(0x40009C , 0x00000040);
-
- if (dev_priv->chipset >= 0x25) {
- NV_WRITE(0x400890, 0x00080000);
- NV_WRITE(0x400610, 0x304B1FB6);
- NV_WRITE(0x400B80, 0x18B82880);
- NV_WRITE(0x400B84, 0x44000000);
- NV_WRITE(0x400098, 0x40000080);
- NV_WRITE(0x400B88, 0x000000ff);
- } else {
- NV_WRITE(0x400880, 0x00080000); /* 0x0008c7df */
- NV_WRITE(0x400094, 0x00000005);
- NV_WRITE(0x400B80, 0x45CAA208); /* 0x45eae20e */
- NV_WRITE(0x400B84, 0x24000000);
- NV_WRITE(0x400098, 0x00000040);
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00E00038);
- NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00000030);
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00E10038);
- NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00000030);
- }
-
- /* copy tile info from PFB */
- for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
- NV_WRITE(0x00400904 + i*0x10, NV_READ(NV10_PFB_TLIMIT(i)));
- /* which is NV40_PGRAPH_TLIMIT0(i) ?? */
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0030+i*4);
- NV_WRITE(NV10_PGRAPH_RDI_DATA, NV_READ(NV10_PFB_TLIMIT(i)));
- NV_WRITE(0x00400908 + i*0x10, NV_READ(NV10_PFB_TSIZE(i)));
- /* which is NV40_PGRAPH_TSIZE0(i) ?? */
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0050+i*4);
- NV_WRITE(NV10_PGRAPH_RDI_DATA, NV_READ(NV10_PFB_TSIZE(i)));
- NV_WRITE(0x00400900 + i*0x10, NV_READ(NV10_PFB_TILE(i)));
- /* which is NV40_PGRAPH_TILE0(i) ?? */
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0010+i*4);
- NV_WRITE(NV10_PGRAPH_RDI_DATA, NV_READ(NV10_PFB_TILE(i)));
- }
- for (i = 0; i < 8; i++) {
- NV_WRITE(0x400980+i*4, NV_READ(0x100300+i*4));
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0090+i*4);
- NV_WRITE(NV10_PGRAPH_RDI_DATA, NV_READ(0x100300+i*4));
- }
- NV_WRITE(0x4009a0, NV_READ(0x100324));
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA000C);
- NV_WRITE(NV10_PGRAPH_RDI_DATA, NV_READ(0x100324));
-
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10000100);
- NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF);
- NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001);
-
- tmp = NV_READ(NV10_PGRAPH_SURFACE) & 0x0007ff00;
- NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
- tmp = NV_READ(NV10_PGRAPH_SURFACE) | 0x00020100;
- NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
-
- /* begin RAM config */
- vramsz = drm_get_resource_len(dev, 0) - 1;
- NV_WRITE(0x4009A4, NV_READ(NV04_PFB_CFG0));
- NV_WRITE(0x4009A8, NV_READ(NV04_PFB_CFG1));
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0000);
- NV_WRITE(NV10_PGRAPH_RDI_DATA , NV_READ(NV04_PFB_CFG0));
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0004);
- NV_WRITE(NV10_PGRAPH_RDI_DATA , NV_READ(NV04_PFB_CFG1));
- NV_WRITE(0x400820, 0);
- NV_WRITE(0x400824, 0);
- NV_WRITE(0x400864, vramsz-1);
- NV_WRITE(0x400868, vramsz-1);
-
- /* interesting.. the below overwrites some of the tile setup above.. */
- NV_WRITE(0x400B20, 0x00000000);
- NV_WRITE(0x400B04, 0xFFFFFFFF);
-
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_XMIN, 0);
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_YMIN, 0);
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_XMAX, 0x7fff);
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_YMAX, 0x7fff);
-
- return 0;
-}
-
-void nv20_graph_takedown(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- nouveau_gpuobj_ref_del(dev, &dev_priv->ctx_table);
-}
-
-int nv30_graph_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-// uint32_t vramsz, tmp;
- int ret, i;
-
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) &
- ~NV_PMC_ENABLE_PGRAPH);
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) |
- NV_PMC_ENABLE_PGRAPH);
-
- if (!dev_priv->ctx_table) {
- /* Create Context Pointer Table */
- dev_priv->ctx_table_size = 32 * 4;
- if ((ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0,
- dev_priv->ctx_table_size, 16,
- NVOBJ_FLAG_ZERO_ALLOC,
- &dev_priv->ctx_table)))
- return ret;
- }
-
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_TABLE,
- dev_priv->ctx_table->instance >> 4);
-
- NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF);
- NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
-
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF);
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000);
- NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x401287c0);
- NV_WRITE(0x400890, 0x01b463ff);
- NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xf2de0475);
- NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00008000);
- NV_WRITE(NV04_PGRAPH_LIMIT_VIOL_PIX, 0xf04bdff6);
- NV_WRITE(0x400B80, 0x1003d888);
- NV_WRITE(0x400B84, 0x0c000000);
- NV_WRITE(0x400098, 0x00000000);
- NV_WRITE(0x40009C, 0x0005ad00);
- NV_WRITE(0x400B88, 0x62ff00ff); // suspiciously like PGRAPH_DEBUG_2
- NV_WRITE(0x4000a0, 0x00000000);
- NV_WRITE(0x4000a4, 0x00000008);
- NV_WRITE(0x4008a8, 0xb784a400);
- NV_WRITE(0x400ba0, 0x002f8685);
- NV_WRITE(0x400ba4, 0x00231f3f);
- NV_WRITE(0x4008a4, 0x40000020);
-
- if (dev_priv->chipset == 0x34) {
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0004);
- NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00200201);
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0008);
- NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00000008);
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0000);
- NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00000032);
- NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00E00004);
- NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00000002);
- }
-
- NV_WRITE(0x4000c0, 0x00000016);
-
- /* copy tile info from PFB */
- for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
- NV_WRITE(0x00400904 + i*0x10, NV_READ(NV10_PFB_TLIMIT(i)));
- /* which is NV40_PGRAPH_TLIMIT0(i) ?? */
- NV_WRITE(0x00400908 + i*0x10, NV_READ(NV10_PFB_TSIZE(i)));
- /* which is NV40_PGRAPH_TSIZE0(i) ?? */
- NV_WRITE(0x00400900 + i*0x10, NV_READ(NV10_PFB_TILE(i)));
- /* which is NV40_PGRAPH_TILE0(i) ?? */
- }
-
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10000100);
- NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF);
- NV_WRITE(0x0040075c , 0x00000001);
- NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001);
-
- /* begin RAM config */
-// vramsz = drm_get_resource_len(dev, 0) - 1;
- NV_WRITE(0x4009A4, NV_READ(NV04_PFB_CFG0));
- NV_WRITE(0x4009A8, NV_READ(NV04_PFB_CFG1));
- if (dev_priv->chipset != 0x34) {
- NV_WRITE(0x400750, 0x00EA0000);
- NV_WRITE(0x400754, NV_READ(NV04_PFB_CFG0));
- NV_WRITE(0x400750, 0x00EA0004);
- NV_WRITE(0x400754, NV_READ(NV04_PFB_CFG1));
- }
-
-#if 0
- NV_WRITE(0x400820, 0);
- NV_WRITE(0x400824, 0);
- NV_WRITE(0x400864, vramsz-1);
- NV_WRITE(0x400868, vramsz-1);
-
- NV_WRITE(0x400B20, 0x00000000);
- NV_WRITE(0x400B04, 0xFFFFFFFF);
-
- /* per-context state, doesn't belong here */
- tmp = NV_READ(NV10_PGRAPH_SURFACE) & 0x0007ff00;
- NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
- tmp = NV_READ(NV10_PGRAPH_SURFACE) | 0x00020100;
- NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
-
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_XMIN, 0);
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_YMIN, 0);
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_XMAX, 0x7fff);
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_YMAX, 0x7fff);
-#endif
-
- return 0;
-}
+++ /dev/null
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-int
-nv40_fb_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t fb_bar_size, tmp;
- int num_tiles;
- int i;
-
- /* This is strictly a NV4x register (don't know about NV5x). */
- /* The blob sets these to all kinds of values, and they mess up our setup. */
- /* I got value 0x52802 instead. For some cards the blob even sets it back to 0x1. */
- /* Note: the blob doesn't read this value, so i'm pretty sure this is safe for all cards. */
- /* Any idea what this is? */
- NV_WRITE(NV40_PFB_UNK_800, 0x1);
-
- switch (dev_priv->chipset) {
- case 0x40:
- case 0x45:
- tmp = NV_READ(NV10_PFB_CLOSE_PAGE2);
- NV_WRITE(NV10_PFB_CLOSE_PAGE2, tmp & ~(1<<15));
- num_tiles = NV10_PFB_TILE__SIZE;
- break;
- case 0x46: /* G72 */
- case 0x47: /* G70 */
- case 0x49: /* G71 */
- case 0x4b: /* G73 */
- case 0x4c: /* C51 (G7X version) */
- num_tiles = NV40_PFB_TILE__SIZE_1;
- break;
- default:
- num_tiles = NV40_PFB_TILE__SIZE_0;
- break;
- }
-
- fb_bar_size = drm_get_resource_len(dev, 0) - 1;
- switch (dev_priv->chipset) {
- case 0x40:
- for (i=0; i<num_tiles; i++) {
- NV_WRITE(NV10_PFB_TILE(i), 0);
- NV_WRITE(NV10_PFB_TLIMIT(i), fb_bar_size);
- }
- break;
- default:
- for (i=0; i<num_tiles; i++) {
- NV_WRITE(NV40_PFB_TILE(i), 0);
- NV_WRITE(NV40_PFB_TLIMIT(i), fb_bar_size);
- }
- break;
- }
-
- return 0;
-}
-
-void
-nv40_fb_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-
-#define RAMFC_WR(offset,val) INSTANCE_WR(chan->ramfc->gpuobj, \
- NV40_RAMFC_##offset/4, (val))
-#define RAMFC_RD(offset) INSTANCE_RD(chan->ramfc->gpuobj, \
- NV40_RAMFC_##offset/4)
-#define NV40_RAMFC(c) (dev_priv->ramfc_offset + ((c)*NV40_RAMFC__SIZE))
-#define NV40_RAMFC__SIZE 128
-
-int
-nv40_fifo_create_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
-
- if ((ret = nouveau_gpuobj_new_fake(dev, NV40_RAMFC(chan->id), ~0,
- NV40_RAMFC__SIZE,
- NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ZERO_FREE,
- NULL, &chan->ramfc)))
- return ret;
-
- /* Fill entries that are seen filled in dumps of nvidia driver just
- * after channel's is put into DMA mode
- */
- RAMFC_WR(DMA_PUT , chan->pushbuf_base);
- RAMFC_WR(DMA_GET , chan->pushbuf_base);
- RAMFC_WR(DMA_INSTANCE , chan->pushbuf->instance >> 4);
- RAMFC_WR(DMA_FETCH , NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
- NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |
- NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |
-#ifdef __BIG_ENDIAN
- NV_PFIFO_CACHE1_BIG_ENDIAN |
-#endif
- 0x30000000 /* no idea.. */);
- RAMFC_WR(DMA_SUBROUTINE, 0);
- RAMFC_WR(GRCTX_INSTANCE, chan->ramin_grctx->instance >> 4);
- RAMFC_WR(DMA_TIMESLICE , 0x0001FFFF);
-
- /* enable the fifo dma operation */
- NV_WRITE(NV04_PFIFO_MODE,NV_READ(NV04_PFIFO_MODE)|(1<<chan->id));
- return 0;
-}
-
-void
-nv40_fifo_destroy_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<<chan->id));
-
- if (chan->ramfc)
- nouveau_gpuobj_ref_del(dev, &chan->ramfc);
-}
-
-int
-nv40_fifo_load_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t tmp, tmp2;
-
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET , RAMFC_RD(DMA_GET));
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT , RAMFC_RD(DMA_PUT));
- NV_WRITE(NV10_PFIFO_CACHE1_REF_CNT , RAMFC_RD(REF_CNT));
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE , RAMFC_RD(DMA_INSTANCE));
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_DCOUNT , RAMFC_RD(DMA_DCOUNT));
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE , RAMFC_RD(DMA_STATE));
-
- /* No idea what 0x2058 is.. */
- tmp = RAMFC_RD(DMA_FETCH);
- tmp2 = NV_READ(0x2058) & 0xFFF;
- tmp2 |= (tmp & 0x30000000);
- NV_WRITE(0x2058, tmp2);
- tmp &= ~0x30000000;
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_FETCH , tmp);
-
- NV_WRITE(NV04_PFIFO_CACHE1_ENGINE , RAMFC_RD(ENGINE));
- NV_WRITE(NV04_PFIFO_CACHE1_PULL1 , RAMFC_RD(PULL1_ENGINE));
- NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_VALUE , RAMFC_RD(ACQUIRE_VALUE));
- NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP, RAMFC_RD(ACQUIRE_TIMESTAMP));
- NV_WRITE(NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT , RAMFC_RD(ACQUIRE_TIMEOUT));
- NV_WRITE(NV10_PFIFO_CACHE1_SEMAPHORE , RAMFC_RD(SEMAPHORE));
- NV_WRITE(NV10_PFIFO_CACHE1_DMA_SUBROUTINE , RAMFC_RD(DMA_SUBROUTINE));
- NV_WRITE(NV40_PFIFO_GRCTX_INSTANCE , RAMFC_RD(GRCTX_INSTANCE));
- NV_WRITE(0x32e4, RAMFC_RD(UNK_40));
- /* NVIDIA does this next line twice... */
- NV_WRITE(0x32e8, RAMFC_RD(UNK_44));
- NV_WRITE(0x2088, RAMFC_RD(UNK_4C));
- NV_WRITE(0x3300, RAMFC_RD(UNK_50));
-
- /* not sure what part is PUT, and which is GET.. never seen a non-zero
- * value appear in a mmio-trace yet..
- */
-#if 0
- tmp = NV_READ(UNK_84);
- NV_WRITE(NV_PFIFO_CACHE1_GET, tmp ???);
- NV_WRITE(NV_PFIFO_CACHE1_PUT, tmp ???);
-#endif
-
- /* Don't clobber the TIMEOUT_ENABLED flag when restoring from RAMFC */
- tmp = NV_READ(NV04_PFIFO_DMA_TIMESLICE) & ~0x1FFFF;
- tmp |= RAMFC_RD(DMA_TIMESLICE) & 0x1FFFF;
- NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, tmp);
-
- /* Set channel active, and in DMA mode */
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH1,
- NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id);
-
- /* Reset DMA_CTL_AT_INFO to INVALID */
- tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_CTL) & ~(1<<31);
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_CTL, tmp);
-
- return 0;
-}
-
-int
-nv40_fifo_save_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t tmp;
-
- RAMFC_WR(DMA_PUT , NV_READ(NV04_PFIFO_CACHE1_DMA_PUT));
- RAMFC_WR(DMA_GET , NV_READ(NV04_PFIFO_CACHE1_DMA_GET));
- RAMFC_WR(REF_CNT , NV_READ(NV10_PFIFO_CACHE1_REF_CNT));
- RAMFC_WR(DMA_INSTANCE , NV_READ(NV04_PFIFO_CACHE1_DMA_INSTANCE));
- RAMFC_WR(DMA_DCOUNT , NV_READ(NV04_PFIFO_CACHE1_DMA_DCOUNT));
- RAMFC_WR(DMA_STATE , NV_READ(NV04_PFIFO_CACHE1_DMA_STATE));
-
- tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_FETCH);
- tmp |= NV_READ(0x2058) & 0x30000000;
- RAMFC_WR(DMA_FETCH , tmp);
-
- RAMFC_WR(ENGINE , NV_READ(NV04_PFIFO_CACHE1_ENGINE));
- RAMFC_WR(PULL1_ENGINE , NV_READ(NV04_PFIFO_CACHE1_PULL1));
- RAMFC_WR(ACQUIRE_VALUE , NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_VALUE));
- tmp = NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP);
- RAMFC_WR(ACQUIRE_TIMESTAMP, tmp);
- RAMFC_WR(ACQUIRE_TIMEOUT , NV_READ(NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT));
- RAMFC_WR(SEMAPHORE , NV_READ(NV10_PFIFO_CACHE1_SEMAPHORE));
-
- /* NVIDIA read 0x3228 first, then write DMA_GET here.. maybe something
- * more involved depending on the value of 0x3228?
- */
- RAMFC_WR(DMA_SUBROUTINE , NV_READ(NV04_PFIFO_CACHE1_DMA_GET));
-
- RAMFC_WR(GRCTX_INSTANCE , NV_READ(NV40_PFIFO_GRCTX_INSTANCE));
-
- /* No idea what the below is for exactly, ripped from a mmio-trace */
- RAMFC_WR(UNK_40 , NV_READ(NV40_PFIFO_UNK32E4));
-
- /* NVIDIA do this next line twice.. bug? */
- RAMFC_WR(UNK_44 , NV_READ(0x32e8));
- RAMFC_WR(UNK_4C , NV_READ(0x2088));
- RAMFC_WR(UNK_50 , NV_READ(0x3300));
-
-#if 0 /* no real idea which is PUT/GET in UNK_48.. */
- tmp = NV_READ(NV04_PFIFO_CACHE1_GET);
- tmp |= (NV_READ(NV04_PFIFO_CACHE1_PUT) << 16);
- RAMFC_WR(UNK_48 , tmp);
-#endif
-
- return 0;
-}
-
-int
-nv40_fifo_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int ret;
-
- if ((ret = nouveau_fifo_init(dev)))
- return ret;
-
- NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, 0x2101ffff);
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-
-/*TODO: deciper what each offset in the context represents. The below
- * contexts are taken from dumps just after the 3D object is
- * created.
- */
-static void
-nv40_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- /* Always has the "instance address" of itself at offset 0 */
- INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start);
- /* unknown */
- INSTANCE_WR(ctx, 0x00024/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00028/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00030/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0011c/4, 0x20010001);
- INSTANCE_WR(ctx, 0x00120/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x00128/4, 0x02008821);
- INSTANCE_WR(ctx, 0x0016c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00170/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00174/4, 0x00000040);
- INSTANCE_WR(ctx, 0x0017c/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00180/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00184/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00188/4, 0x80000000);
- INSTANCE_WR(ctx, 0x0018c/4, 0x80000000);
- INSTANCE_WR(ctx, 0x0019c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x001a0/4, 0x80000000);
- INSTANCE_WR(ctx, 0x001b0/4, 0x80000000);
- INSTANCE_WR(ctx, 0x001c0/4, 0x80000000);
- INSTANCE_WR(ctx, 0x001d0/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x00340/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00350/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00354/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00358/4, 0x55555555);
- INSTANCE_WR(ctx, 0x0035c/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00388/4, 0x00000008);
- INSTANCE_WR(ctx, 0x0039c/4, 0x00000010);
- INSTANCE_WR(ctx, 0x00480/4, 0x00000100);
- INSTANCE_WR(ctx, 0x00494/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00498/4, 0x00080060);
- INSTANCE_WR(ctx, 0x004b4/4, 0x00000080);
- INSTANCE_WR(ctx, 0x004b8/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x004bc/4, 0x00000001);
- INSTANCE_WR(ctx, 0x004d0/4, 0x46400000);
- INSTANCE_WR(ctx, 0x004ec/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x004f8/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x004fc/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00504/4, 0x00011100);
- for (i=0x00520; i<=0x0055c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x00568/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x00594/4, 0x30201000);
- INSTANCE_WR(ctx, 0x00598/4, 0x70605040);
- INSTANCE_WR(ctx, 0x0059c/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x005a0/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x005b4/4, 0x40100000);
- INSTANCE_WR(ctx, 0x005cc/4, 0x00000004);
- INSTANCE_WR(ctx, 0x005d8/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0060c/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x00610/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x00614/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x00618/4, 0x00000098);
- INSTANCE_WR(ctx, 0x00628/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x0062c/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x00630/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00640/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x0067c/4, 0x00ffff00);
- /* 0x680-0x6BC - NV30_TCL_PRIMITIVE_3D_TX_ADDRESS_UNIT(0-15) */
- /* 0x6C0-0x6FC - NV30_TCL_PRIMITIVE_3D_TX_FORMAT_UNIT(0-15) */
- for (i=0x006C0; i<=0x006fc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- /* 0x700-0x73C - NV30_TCL_PRIMITIVE_3D_TX_WRAP_UNIT(0-15) */
- for (i=0x00700; i<=0x0073c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- /* 0x740-0x77C - NV30_TCL_PRIMITIVE_3D_TX_ENABLE_UNIT(0-15) */
- /* 0x780-0x7BC - NV30_TCL_PRIMITIVE_3D_TX_SWIZZLE_UNIT(0-15) */
- for (i=0x00780; i<=0x007bc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- /* 0x7C0-0x7FC - NV30_TCL_PRIMITIVE_3D_TX_FILTER_UNIT(0-15) */
- for (i=0x007c0; i<=0x007fc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- /* 0x800-0x83C - NV30_TCL_PRIMITIVE_3D_TX_XY_DIM_UNIT(0-15) */
- for (i=0x00800; i<=0x0083c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- /* 0x840-0x87C - NV30_TCL_PRIMITIVE_3D_TX_UNK07_UNIT(0-15) */
- /* 0x880-0x8BC - NV30_TCL_PRIMITIVE_3D_TX_DEPTH_UNIT(0-15) */
- for (i=0x00880; i<=0x008bc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- /* unknown */
- for (i=0x00910; i<=0x0091c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0001bc80);
- for (i=0x00920; i<=0x0092c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000202);
- for (i=0x00940; i<=0x0094c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- for (i=0x00960; i<=0x0096c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x00980/4, 0x00000002);
- INSTANCE_WR(ctx, 0x009b4/4, 0x00000001);
- INSTANCE_WR(ctx, 0x009c0/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x009c4/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x009c8/4, 0x60103f00);
- INSTANCE_WR(ctx, 0x009d4/4, 0x00020000);
- INSTANCE_WR(ctx, 0x00a08/4, 0x00008100);
- INSTANCE_WR(ctx, 0x00aac/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00af0/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00af8/4, 0x80800001);
- INSTANCE_WR(ctx, 0x00bcc/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00bf8/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00bfc/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c00/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c04/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c08/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c0c/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c44/4, 0x00000001);
- for (i=0x03008; i<=0x03080; i+=8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x05288; i<=0x08570; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x08628; i<=0x08e18; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x0bd28; i<=0x0f010; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x0f0c8; i<=0x0f8b8; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x127c8; i<=0x15ab0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x15b68; i<=0x16358; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x19268; i<=0x1c550; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x1c608; i<=0x1cdf8; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x1fd08; i<=0x22ff0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x230a8; i<=0x23898; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x267a8; i<=0x29a90; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x29b48; i<=0x2a338; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-}
-
-static void
-nv41_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start);
- INSTANCE_WR(ctx, 0x00000024/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00000028/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00000030/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0000011c/4, 0x20010001);
- INSTANCE_WR(ctx, 0x00000120/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x00000128/4, 0x02008821);
- for (i = 0x00000178; i <= 0x00000180; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00000188/4, 0x00000040);
- for (i = 0x00000194; i <= 0x000001b0; i += 4)
- INSTANCE_WR(ctx, i/4, 0x80000000);
- INSTANCE_WR(ctx, 0x000001d0/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x00000340/4, 0x00040000);
- for (i = 0x00000350; i <= 0x0000035c; i += 4)
- INSTANCE_WR(ctx, i/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00000388/4, 0x00000008);
- INSTANCE_WR(ctx, 0x0000039c/4, 0x00001010);
- INSTANCE_WR(ctx, 0x000003cc/4, 0x00000111);
- INSTANCE_WR(ctx, 0x000003d0/4, 0x00080060);
- INSTANCE_WR(ctx, 0x000003ec/4, 0x00000080);
- INSTANCE_WR(ctx, 0x000003f0/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x000003f4/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00000408/4, 0x46400000);
- INSTANCE_WR(ctx, 0x00000418/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x00000424/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00000428/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00000430/4, 0x00011100);
- for (i = 0x0000044c; i <= 0x00000488; i += 4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x00000494/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x000004bc/4, 0x30201000);
- INSTANCE_WR(ctx, 0x000004c0/4, 0x70605040);
- INSTANCE_WR(ctx, 0x000004c4/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x000004c8/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x000004dc/4, 0x40100000);
- INSTANCE_WR(ctx, 0x000004f8/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0000052c/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x00000530/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x00000534/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x00000538/4, 0x00000098);
- INSTANCE_WR(ctx, 0x00000548/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x0000054c/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x00000550/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00000560/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x00000598/4, 0x00ffff00);
- for (i = 0x000005dc; i <= 0x00000618; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- for (i = 0x0000061c; i <= 0x00000658; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- for (i = 0x0000069c; i <= 0x000006d8; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- for (i = 0x000006dc; i <= 0x00000718; i += 4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for (i = 0x0000071c; i <= 0x00000758; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for (i = 0x0000079c; i <= 0x000007d8; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- for (i = 0x0000082c; i <= 0x00000838; i += 4)
- INSTANCE_WR(ctx, i/4, 0x0001bc80);
- for (i = 0x0000083c; i <= 0x00000848; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00000202);
- for (i = 0x0000085c; i <= 0x00000868; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- for (i = 0x0000087c; i <= 0x00000888; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x0000089c/4, 0x00000002);
- INSTANCE_WR(ctx, 0x000008d0/4, 0x00000021);
- INSTANCE_WR(ctx, 0x000008d4/4, 0x030c30c3);
- INSTANCE_WR(ctx, 0x000008e0/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x000008e4/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x000008e8/4, 0x20103f00);
- INSTANCE_WR(ctx, 0x000008f4/4, 0x00020000);
- INSTANCE_WR(ctx, 0x0000092c/4, 0x00008100);
- INSTANCE_WR(ctx, 0x000009b8/4, 0x00000001);
- INSTANCE_WR(ctx, 0x000009fc/4, 0x00001001);
- INSTANCE_WR(ctx, 0x00000a04/4, 0x00000003);
- INSTANCE_WR(ctx, 0x00000a08/4, 0x00888001);
- INSTANCE_WR(ctx, 0x00000aac/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00000ab8/4, 0x0000ffff);
- for (i = 0x00000ad4; i <= 0x00000ae4; i += 4)
- INSTANCE_WR(ctx, i/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00000ae8/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00000b20/4, 0x00000001);
- for (i = 0x00002ee8; i <= 0x00002f60; i += 8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i = 0x00005168; i <= 0x00007358; i += 24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i = 0x00007368; i <= 0x00007758; i += 16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i = 0x0000a068; i <= 0x0000c258; i += 24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i = 0x0000c268; i <= 0x0000c658; i += 16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i = 0x0000ef68; i <= 0x00011158; i += 24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i = 0x00011168; i <= 0x00011558; i += 16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i = 0x00013e68; i <= 0x00016058; i += 24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i = 0x00016068; i <= 0x00016458; i += 16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-};
-
-static void
-nv43_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start);
- INSTANCE_WR(ctx, 0x00024/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00028/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00030/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0011c/4, 0x20010001);
- INSTANCE_WR(ctx, 0x00120/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x00128/4, 0x02008821);
- INSTANCE_WR(ctx, 0x00178/4, 0x00000040);
- INSTANCE_WR(ctx, 0x0017c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00180/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00188/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00194/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00198/4, 0x80000000);
- INSTANCE_WR(ctx, 0x0019c/4, 0x80000000);
- INSTANCE_WR(ctx, 0x001a0/4, 0x80000000);
- INSTANCE_WR(ctx, 0x001a4/4, 0x80000000);
- INSTANCE_WR(ctx, 0x001a8/4, 0x80000000);
- INSTANCE_WR(ctx, 0x001ac/4, 0x80000000);
- INSTANCE_WR(ctx, 0x001b0/4, 0x80000000);
- INSTANCE_WR(ctx, 0x001d0/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x00340/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00350/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00354/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00358/4, 0x55555555);
- INSTANCE_WR(ctx, 0x0035c/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00388/4, 0x00000008);
- INSTANCE_WR(ctx, 0x0039c/4, 0x00001010);
- INSTANCE_WR(ctx, 0x003cc/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003d0/4, 0x00080060);
- INSTANCE_WR(ctx, 0x003ec/4, 0x00000080);
- INSTANCE_WR(ctx, 0x003f0/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x003f4/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00408/4, 0x46400000);
- INSTANCE_WR(ctx, 0x00418/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x00424/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00428/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00430/4, 0x00011100);
- for (i=0x0044c; i<=0x00488; i+=4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x00494/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x004bc/4, 0x30201000);
- INSTANCE_WR(ctx, 0x004c0/4, 0x70605040);
- INSTANCE_WR(ctx, 0x004c4/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x004c8/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x004dc/4, 0x40100000);
- INSTANCE_WR(ctx, 0x004f8/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0052c/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x00530/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x00534/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x00538/4, 0x00000098);
- INSTANCE_WR(ctx, 0x00548/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x0054c/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x00550/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00560/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x00598/4, 0x00ffff00);
- for (i=0x005dc; i<=0x00618; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- for (i=0x0061c; i<=0x00658; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- for (i=0x0069c; i<=0x006d8; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- for (i=0x006dc; i<=0x00718; i+=4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for (i=0x0071c; i<=0x00758; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for (i=0x0079c; i<=0x007d8; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- for (i=0x0082c; i<=0x00838; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0001bc80);
- for (i=0x0083c; i<=0x00848; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000202);
- for (i=0x0085c; i<=0x00868; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- for (i=0x0087c; i<=0x00888; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x0089c/4, 0x00000002);
- INSTANCE_WR(ctx, 0x008d0/4, 0x00000021);
- INSTANCE_WR(ctx, 0x008d4/4, 0x030c30c3);
- INSTANCE_WR(ctx, 0x008e0/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x008e4/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x008e8/4, 0x0c103f00);
- INSTANCE_WR(ctx, 0x008f4/4, 0x00020000);
- INSTANCE_WR(ctx, 0x0092c/4, 0x00008100);
- INSTANCE_WR(ctx, 0x009b8/4, 0x00000001);
- INSTANCE_WR(ctx, 0x009fc/4, 0x00001001);
- INSTANCE_WR(ctx, 0x00a04/4, 0x00000003);
- INSTANCE_WR(ctx, 0x00a08/4, 0x00888001);
- INSTANCE_WR(ctx, 0x00a8c/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00a98/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00ab4/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00ab8/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00abc/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00ac0/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00af8/4, 0x00000001);
- for (i=0x02ec0; i<=0x02f38; i+=8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x04c80; i<=0x06e70; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x06e80; i<=0x07270; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x096c0; i<=0x0b8b0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x0b8c0; i<=0x0bcb0; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x0e100; i<=0x102f0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x10300; i<=0x106f0; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-};
-
-static void
-nv46_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start);
- INSTANCE_WR(ctx, 0x00040/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00044/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0004c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00138/4, 0x20010001);
- INSTANCE_WR(ctx, 0x0013c/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x00144/4, 0x02008821);
- INSTANCE_WR(ctx, 0x00174/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00178/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0017c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00180/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00184/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00188/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0018c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00190/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00194/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00198/4, 0x00000040);
- INSTANCE_WR(ctx, 0x0019c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x001a4/4, 0x00000040);
- INSTANCE_WR(ctx, 0x001ec/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x0035c/4, 0x00040000);
- INSTANCE_WR(ctx, 0x0036c/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00370/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00374/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00378/4, 0x55555555);
- INSTANCE_WR(ctx, 0x003a4/4, 0x00000008);
- INSTANCE_WR(ctx, 0x003b8/4, 0x00003010);
- INSTANCE_WR(ctx, 0x003dc/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003e0/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003e4/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003e8/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003ec/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003f0/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003f4/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003f8/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003fc/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00400/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00404/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00408/4, 0x00000111);
- INSTANCE_WR(ctx, 0x0040c/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00410/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00414/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00418/4, 0x00000111);
- INSTANCE_WR(ctx, 0x004b0/4, 0x00000111);
- INSTANCE_WR(ctx, 0x004b4/4, 0x00080060);
- INSTANCE_WR(ctx, 0x004d0/4, 0x00000080);
- INSTANCE_WR(ctx, 0x004d4/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x004d8/4, 0x00000001);
- INSTANCE_WR(ctx, 0x004ec/4, 0x46400000);
- INSTANCE_WR(ctx, 0x004fc/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x00500/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00504/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00508/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0050c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00510/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00514/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00518/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0051c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00520/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00524/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00528/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0052c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00530/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00534/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00538/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0053c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00550/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00554/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x0055c/4, 0x00011100);
- for (i=0x00578; i<0x005b4; i+=4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005c0/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x005e8/4, 0x30201000);
- INSTANCE_WR(ctx, 0x005ec/4, 0x70605040);
- INSTANCE_WR(ctx, 0x005f0/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x005f4/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x00608/4, 0x40100000);
- INSTANCE_WR(ctx, 0x00624/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00658/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x0065c/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x00660/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x00664/4, 0x00000098);
- INSTANCE_WR(ctx, 0x00674/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00678/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x0067c/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0068c/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x006c8/4, 0x00ffff00);
- for (i=0x0070c; i<=0x00748; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- for (i=0x0074c; i<=0x00788; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- for (i=0x007cc; i<=0x00808; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- for (i=0x0080c; i<=0x00848; i+=4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for (i=0x0084c; i<=0x00888; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for (i=0x008cc; i<=0x00908; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- for (i=0x0095c; i<=0x00968; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0001bc80);
- for (i=0x0096c; i<=0x00978; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000202);
- for (i=0x0098c; i<=0x00998; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- for (i=0x009ac; i<=0x009b8; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x009cc/4, 0x00000002);
- INSTANCE_WR(ctx, 0x00a00/4, 0x00000421);
- INSTANCE_WR(ctx, 0x00a04/4, 0x030c30c3);
- INSTANCE_WR(ctx, 0x00a08/4, 0x00011001);
- INSTANCE_WR(ctx, 0x00a14/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x00a18/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x00a1c/4, 0x0c103f00);
- INSTANCE_WR(ctx, 0x00a28/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00a60/4, 0x00008100);
- INSTANCE_WR(ctx, 0x00aec/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00b30/4, 0x00001001);
- INSTANCE_WR(ctx, 0x00b38/4, 0x00000003);
- INSTANCE_WR(ctx, 0x00b3c/4, 0x00888001);
- INSTANCE_WR(ctx, 0x00bc0/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00bcc/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00be8/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00bec/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00bf0/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00bf4/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00c2c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00c30/4, 0x08e00001);
- INSTANCE_WR(ctx, 0x00c34/4, 0x000e3000);
- for (i=0x017f8; i<=0x01870; i+=8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x035b8; i<=0x057a8; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x057b8; i<=0x05ba8; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x07f38; i<=0x0a128; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x0a138; i<=0x0a528; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x0c8b8; i<=0x0eaa8; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x0eab8; i<=0x0eea8; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-}
-
-/* This may only work on 7800 AGP cards, will include a warning */
-static void
-nv47_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x00000000/4, ctx->im_pramin->start);
- INSTANCE_WR(ctx, 0x00000024/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00000028/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00000030/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0000011c/4, 0x20010001);
- INSTANCE_WR(ctx, 0x00000120/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x00000128/4, 0x02008821);
- INSTANCE_WR(ctx, 0x00000178/4, 0x00000040);
- INSTANCE_WR(ctx, 0x0000017c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00000180/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00000188/4, 0x00000040);
- for (i=0x00000194; i<=0x000001b0; i+=4)
- INSTANCE_WR(ctx, i/4, 0x80000000);
- INSTANCE_WR(ctx, 0x000001d0/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x00000340/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00000350/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00000354/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00000358/4, 0x55555555);
- INSTANCE_WR(ctx, 0x0000035c/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00000388/4, 0x00000008);
- INSTANCE_WR(ctx, 0x0000039c/4, 0x00001010);
- for (i=0x000003c0; i<=0x000003fc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00000454/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00000458/4, 0x00080060);
- INSTANCE_WR(ctx, 0x00000474/4, 0x00000080);
- INSTANCE_WR(ctx, 0x00000478/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x0000047c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00000490/4, 0x46400000);
- INSTANCE_WR(ctx, 0x000004a0/4, 0xffff0000);
- for (i=0x000004a4; i<=0x000004e0; i+=4)
- INSTANCE_WR(ctx, i/4, 0x88888888);
- INSTANCE_WR(ctx, 0x000004f4/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x000004f8/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00000500/4, 0x00011100);
- for (i=0x0000051c; i<=0x00000558; i+=4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x00000564/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x0000058c/4, 0x30201000);
- INSTANCE_WR(ctx, 0x00000590/4, 0x70605040);
- INSTANCE_WR(ctx, 0x00000594/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x00000598/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x000005ac/4, 0x40100000);
- INSTANCE_WR(ctx, 0x000005c8/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x000005fc/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x00000600/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x00000604/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x00000608/4, 0x00000098);
- INSTANCE_WR(ctx, 0x00000618/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x0000061c/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x00000620/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00000630/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x0000066c/4, 0x00ffff00);
- for (i=0x000006b0; i<=0x000006ec; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- for (i=0x000006f0; i<=0x0000072c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- for (i=0x00000770; i<=0x000007ac; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- for (i=0x000007b0; i<=0x000007ec; i+=4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for (i=0x000007f0; i<=0x0000082c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for (i=0x00000870; i<=0x000008ac; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- INSTANCE_WR(ctx, 0x00000900/4, 0x0001bc80);
- INSTANCE_WR(ctx, 0x00000904/4, 0x0001bc80);
- INSTANCE_WR(ctx, 0x00000908/4, 0x0001bc80);
- INSTANCE_WR(ctx, 0x0000090c/4, 0x0001bc80);
- INSTANCE_WR(ctx, 0x00000910/4, 0x00000202);
- INSTANCE_WR(ctx, 0x00000914/4, 0x00000202);
- INSTANCE_WR(ctx, 0x00000918/4, 0x00000202);
- INSTANCE_WR(ctx, 0x0000091c/4, 0x00000202);
- for (i=0x00000930; i<=0x0000095c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- INSTANCE_WR(ctx, 0x00000970/4, 0x00000002);
- INSTANCE_WR(ctx, 0x000009a4/4, 0x00000021);
- INSTANCE_WR(ctx, 0x000009a8/4, 0x030c30c3);
- INSTANCE_WR(ctx, 0x000009b4/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x000009b8/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x000009bc/4, 0x40103f00);
- INSTANCE_WR(ctx, 0x000009c8/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00000a00/4, 0x00008100);
- INSTANCE_WR(ctx, 0x00000a8c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00000ad0/4, 0x00001001);
- INSTANCE_WR(ctx, 0x00000adc/4, 0x00000003);
- INSTANCE_WR(ctx, 0x00000ae0/4, 0x00888001);
- for (i=0x00000b10; i<=0x00000b8c; i+=4)
- INSTANCE_WR(ctx, i/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00000bb4/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00000bc0/4, 0x0000ffff);
- for (i=0x00000bdc; i<=0x00000bf8; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00000bfc/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00000c34/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00000c38/4, 0x08e00001);
- INSTANCE_WR(ctx, 0x00000c3c/4, 0x000e3000);
- for (i=0x00003000; i<=0x00003078; i+=8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x00004dc0; i<=0x00006fb0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x00006fc0; i<=0x000073b0; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x00009800; i<=0x0000b9f0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x0000ba00; i<=0x00010430; i+=24)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x00010440; i<=0x00010830; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x00012c80; i<=0x00014e70; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x00014e80; i<=0x00015270; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x000176c0; i<=0x000198b0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x000198c0; i<=0x00019cb0; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x0001c100; i<=0x0001e2f0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x0001e300; i<=0x0001e6f0; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-}
-
-static void
-nv49_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start);
- INSTANCE_WR(ctx, 0x00004/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00008/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x0000c/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00010/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00014/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00018/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x0001c/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00020/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x000c4/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x000c8/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x000d0/4, 0x00000001);
- INSTANCE_WR(ctx, 0x001bc/4, 0x20010001);
- INSTANCE_WR(ctx, 0x001c0/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x001c8/4, 0x02008821);
- INSTANCE_WR(ctx, 0x00218/4, 0x00000040);
- INSTANCE_WR(ctx, 0x0021c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00220/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00228/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00234/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00238/4, 0x80000000);
- INSTANCE_WR(ctx, 0x0023c/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00240/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00244/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00248/4, 0x80000000);
- INSTANCE_WR(ctx, 0x0024c/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00250/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00270/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x003e0/4, 0x00040000);
- INSTANCE_WR(ctx, 0x003f0/4, 0x55555555);
- INSTANCE_WR(ctx, 0x003f4/4, 0x55555555);
- INSTANCE_WR(ctx, 0x003f8/4, 0x55555555);
- INSTANCE_WR(ctx, 0x003fc/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00428/4, 0x00000008);
- INSTANCE_WR(ctx, 0x0043c/4, 0x00001010);
- INSTANCE_WR(ctx, 0x00460/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00464/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00468/4, 0x00000111);
- INSTANCE_WR(ctx, 0x0046c/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00470/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00474/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00478/4, 0x00000111);
- INSTANCE_WR(ctx, 0x0047c/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00480/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00484/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00488/4, 0x00000111);
- INSTANCE_WR(ctx, 0x0048c/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00490/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00494/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00498/4, 0x00000111);
- INSTANCE_WR(ctx, 0x0049c/4, 0x00000111);
- INSTANCE_WR(ctx, 0x004f4/4, 0x00000111);
- INSTANCE_WR(ctx, 0x004f8/4, 0x00080060);
- INSTANCE_WR(ctx, 0x00514/4, 0x00000080);
- INSTANCE_WR(ctx, 0x00518/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x0051c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00530/4, 0x46400000);
- INSTANCE_WR(ctx, 0x00540/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x00544/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00548/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0054c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00550/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00554/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00558/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0055c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00560/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00564/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00568/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0056c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00570/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00574/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00578/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0057c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00580/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00594/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00598/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x005a0/4, 0x00011100);
- INSTANCE_WR(ctx, 0x005bc/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005c0/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005c4/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005c8/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005cc/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005d0/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005d4/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005d8/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005dc/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005e0/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005e4/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005e8/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005ec/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005f0/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005f4/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005f8/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x00604/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x0062c/4, 0x30201000);
- INSTANCE_WR(ctx, 0x00630/4, 0x70605040);
- INSTANCE_WR(ctx, 0x00634/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x00638/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x0064c/4, 0x40100000);
- INSTANCE_WR(ctx, 0x00668/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0069c/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x006a0/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x006a4/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x006a8/4, 0x00000098);
- INSTANCE_WR(ctx, 0x006b8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x006bc/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x006c0/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x006d0/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x0070c/4, 0x00ffff00);
- for (i=0x00750; i<=0x0078c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- for (i=0x00790; i<=0x007cc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- for (i=0x00810; i<=0x0084c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- for (i=0x00850; i<=0x0088c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for (i=0x00890; i<=0x008cc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for (i=0x00910; i<=0x0094c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- for (i=0x009a0; i<=0x009ac; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0001bc80);
- for (i=0x009b0; i<=0x009bc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000202);
- for (i=0x009d0; i<=0x009dc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- for (i=0x009f0; i<=0x009fc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x00a10/4, 0x00000002);
- INSTANCE_WR(ctx, 0x00a44/4, 0x00000421);
- INSTANCE_WR(ctx, 0x00a48/4, 0x030c30c3);
- INSTANCE_WR(ctx, 0x00a54/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x00a58/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x00a5c/4, 0x20103f00);
- INSTANCE_WR(ctx, 0x00a68/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00aa0/4, 0x00008100);
- INSTANCE_WR(ctx, 0x00b2c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00b70/4, 0x00001001);
- INSTANCE_WR(ctx, 0x00b7c/4, 0x00000003);
- INSTANCE_WR(ctx, 0x00b80/4, 0x00888001);
- INSTANCE_WR(ctx, 0x00bb0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bb4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bb8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bbc/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bc0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bc4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bc8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bcc/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bd0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bd4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bd8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bdc/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00be0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00be4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00be8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bec/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bf0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bf4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bf8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bfc/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c00/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c04/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c08/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c0c/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c10/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c14/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c18/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c1c/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c20/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c24/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c28/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c2c/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c54/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00c60/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00c7c/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c80/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c84/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c88/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c8c/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c90/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c94/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c98/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c9c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00cd4/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00cd8/4, 0x08e00001);
- INSTANCE_WR(ctx, 0x00cdc/4, 0x000e3000);
- for(i=0x030a0; i<=0x03118; i+=8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x098a0; i<=0x0ba90; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x0baa0; i<=0x0be90; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x0e2e0; i<=0x0fff0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x10008; i<=0x104d0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x104e0; i<=0x108d0; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x12d20; i<=0x14f10; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x14f20; i<=0x15310; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x17760; i<=0x19950; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x19960; i<=0x19d50; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x1c1a0; i<=0x1e390; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x1e3a0; i<=0x1e790; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x20be0; i<=0x22dd0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x22de0; i<=0x231d0; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-}
-
-static void
-nv4a_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start);
- INSTANCE_WR(ctx, 0x00024/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00028/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00030/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0011c/4, 0x20010001);
- INSTANCE_WR(ctx, 0x00120/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x00128/4, 0x02008821);
- INSTANCE_WR(ctx, 0x00158/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0015c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00160/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00164/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00168/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0016c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00170/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00174/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00178/4, 0x00000040);
- INSTANCE_WR(ctx, 0x0017c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00180/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00188/4, 0x00000040);
- INSTANCE_WR(ctx, 0x001d0/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x00340/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00350/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00354/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00358/4, 0x55555555);
- INSTANCE_WR(ctx, 0x0035c/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00388/4, 0x00000008);
- INSTANCE_WR(ctx, 0x0039c/4, 0x00003010);
- INSTANCE_WR(ctx, 0x003cc/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003d0/4, 0x00080060);
- INSTANCE_WR(ctx, 0x003ec/4, 0x00000080);
- INSTANCE_WR(ctx, 0x003f0/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x003f4/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00408/4, 0x46400000);
- INSTANCE_WR(ctx, 0x00418/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x00424/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00428/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00430/4, 0x00011100);
- for (i=0x0044c; i<=0x00488; i+=4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x00494/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x004bc/4, 0x30201000);
- INSTANCE_WR(ctx, 0x004c0/4, 0x70605040);
- INSTANCE_WR(ctx, 0x004c4/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x004c8/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x004dc/4, 0x40100000);
- INSTANCE_WR(ctx, 0x004f8/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0052c/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x00530/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x00534/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x00538/4, 0x00000098);
- INSTANCE_WR(ctx, 0x00548/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x0054c/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x00550/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0055c/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x00594/4, 0x00ffff00);
- for (i=0x005d8; i<=0x00614; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- for (i=0x00618; i<=0x00654; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- for (i=0x00698; i<=0x006d4; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- for (i=0x006d8; i<=0x00714; i+=4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for (i=0x00718; i<=0x00754; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for (i=0x00798; i<=0x007d4; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- for (i=0x00828; i<=0x00834; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0001bc80);
- for (i=0x00838; i<=0x00844; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000202);
- for (i=0x00858; i<=0x00864; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- for (i=0x00878; i<=0x00884; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x00898/4, 0x00000002);
- INSTANCE_WR(ctx, 0x008cc/4, 0x00000021);
- INSTANCE_WR(ctx, 0x008d0/4, 0x030c30c3);
- INSTANCE_WR(ctx, 0x008d4/4, 0x00011001);
- INSTANCE_WR(ctx, 0x008e0/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x008e4/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x008e8/4, 0x0c103f00);
- INSTANCE_WR(ctx, 0x008f4/4, 0x00040000);
- INSTANCE_WR(ctx, 0x0092c/4, 0x00008100);
- INSTANCE_WR(ctx, 0x009b8/4, 0x00000001);
- INSTANCE_WR(ctx, 0x009fc/4, 0x00001001);
- INSTANCE_WR(ctx, 0x00a04/4, 0x00000003);
- INSTANCE_WR(ctx, 0x00a08/4, 0x00888001);
- INSTANCE_WR(ctx, 0x00a8c/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00a98/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00ab4/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00ab8/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00abc/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00ac0/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00af8/4, 0x00000001);
- for (i=0x016c0; i<=0x01738; i+=8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x03840; i<=0x05670; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x05680; i<=0x05a70; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x07e00; i<=0x09ff0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x0a000; i<=0x0a3f0; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x0c780; i<=0x0e970; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x0e980; i<=0x0ed70; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-}
-
-static void
-nv4b_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start);
- INSTANCE_WR(ctx, 0x00004/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00008/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x0000c/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00010/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00014/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00018/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x0001c/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x00020/4, 0x0000c040);
- INSTANCE_WR(ctx, 0x000c4/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x000c8/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x000d0/4, 0x00000001);
- INSTANCE_WR(ctx, 0x001bc/4, 0x20010001);
- INSTANCE_WR(ctx, 0x001c0/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x001c8/4, 0x02008821);
- INSTANCE_WR(ctx, 0x00218/4, 0x00000040);
- INSTANCE_WR(ctx, 0x0021c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00220/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00228/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00234/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00238/4, 0x80000000);
- INSTANCE_WR(ctx, 0x0023c/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00240/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00244/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00248/4, 0x80000000);
- INSTANCE_WR(ctx, 0x0024c/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00250/4, 0x80000000);
- INSTANCE_WR(ctx, 0x00270/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x003e0/4, 0x00040000);
- INSTANCE_WR(ctx, 0x003f0/4, 0x55555555);
- INSTANCE_WR(ctx, 0x003f4/4, 0x55555555);
- INSTANCE_WR(ctx, 0x003f8/4, 0x55555555);
- INSTANCE_WR(ctx, 0x003fc/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00428/4, 0x00000008);
- INSTANCE_WR(ctx, 0x0043c/4, 0x00001010);
- INSTANCE_WR(ctx, 0x00460/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00464/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00468/4, 0x00000111);
- INSTANCE_WR(ctx, 0x0046c/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00470/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00474/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00478/4, 0x00000111);
- INSTANCE_WR(ctx, 0x0047c/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00480/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00484/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00488/4, 0x00000111);
- INSTANCE_WR(ctx, 0x0048c/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00490/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00494/4, 0x00000111);
- INSTANCE_WR(ctx, 0x00498/4, 0x00000111);
- INSTANCE_WR(ctx, 0x0049c/4, 0x00000111);
- INSTANCE_WR(ctx, 0x004f4/4, 0x00000111);
- INSTANCE_WR(ctx, 0x004f8/4, 0x00080060);
- INSTANCE_WR(ctx, 0x00514/4, 0x00000080);
- INSTANCE_WR(ctx, 0x00518/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x0051c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00530/4, 0x46400000);
- INSTANCE_WR(ctx, 0x00540/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x00544/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00548/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0054c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00550/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00554/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00558/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0055c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00560/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00564/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00568/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0056c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00570/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00574/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00578/4, 0x88888888);
- INSTANCE_WR(ctx, 0x0057c/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00580/4, 0x88888888);
- INSTANCE_WR(ctx, 0x00594/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00598/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x005a0/4, 0x00011100);
- INSTANCE_WR(ctx, 0x005bc/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005c0/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005c4/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005c8/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005cc/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005d0/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005d4/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005d8/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005dc/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005e0/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005e4/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005e8/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005ec/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005f0/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005f4/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x005f8/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x00604/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x0062c/4, 0x30201000);
- INSTANCE_WR(ctx, 0x00630/4, 0x70605040);
- INSTANCE_WR(ctx, 0x00634/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x00638/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x0064c/4, 0x40100000);
- INSTANCE_WR(ctx, 0x00668/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0069c/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x006a0/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x006a4/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x006a8/4, 0x00000098);
- INSTANCE_WR(ctx, 0x006b8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x006bc/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x006c0/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x006d0/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x0070c/4, 0x00ffff00);
- for (i=0x00750; i<=0x0078c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- for (i=0x00790; i<=0x007cc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- for (i=0x00810; i<=0x0084c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- for (i=0x00850; i<=0x0088c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for (i=0x00890; i<=0x008cc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for (i=0x00910; i<=0x0094c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- for (i=0x009a0; i<=0x009ac; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0001bc80);
- for (i=0x009b0; i<=0x009bc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000202);
- for (i=0x009d0; i<=0x009dc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- for (i=0x009f0; i<=0x009fc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x00a10/4, 0x00000002);
- INSTANCE_WR(ctx, 0x00a44/4, 0x00000421);
- INSTANCE_WR(ctx, 0x00a48/4, 0x030c30c3);
- INSTANCE_WR(ctx, 0x00a54/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x00a58/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x00a5c/4, 0x20103f00);
- INSTANCE_WR(ctx, 0x00a68/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00aa0/4, 0x00008100);
- INSTANCE_WR(ctx, 0x00b2c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00b70/4, 0x00001001);
- INSTANCE_WR(ctx, 0x00b7c/4, 0x00000003);
- INSTANCE_WR(ctx, 0x00b80/4, 0x00888001);
- INSTANCE_WR(ctx, 0x00bb0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bb4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bb8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bbc/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bc0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bc4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bc8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bcc/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bd0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bd4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bd8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bdc/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00be0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00be4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00be8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bec/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bf0/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bf4/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bf8/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00bfc/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c00/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c04/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c08/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c0c/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c10/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c14/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c18/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c1c/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c20/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c24/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c28/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c2c/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00c54/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00c60/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00c7c/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c80/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c84/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c88/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c8c/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c90/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c94/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c98/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00c9c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00cd4/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00cd8/4, 0x08e00001);
- INSTANCE_WR(ctx, 0x00cdc/4, 0x000e3000);
- for(i=0x030a0; i<=0x03118; i+=8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x098a0; i<=0x0ba90; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x0baa0; i<=0x0be90; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x0e2e0; i<=0x0fff0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x10008; i<=0x104d0; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x104e0; i<=0x108d0; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x12d20; i<=0x14f10; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x14f20; i<=0x15310; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for(i=0x17760; i<=0x19950; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for(i=0x19960; i<=0x19d50; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-}
-
-static void
-nv4c_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start);
- INSTANCE_WR(ctx, 0x00024/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00028/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00030/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0011c/4, 0x20010001);
- INSTANCE_WR(ctx, 0x00120/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x00128/4, 0x02008821);
- INSTANCE_WR(ctx, 0x00158/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0015c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00160/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00164/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00168/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0016c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00170/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00174/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00178/4, 0x00000040);
- INSTANCE_WR(ctx, 0x0017c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00180/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00188/4, 0x00000040);
- INSTANCE_WR(ctx, 0x001d0/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x00340/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00350/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00354/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00358/4, 0x55555555);
- INSTANCE_WR(ctx, 0x0035c/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00388/4, 0x00000008);
- INSTANCE_WR(ctx, 0x0039c/4, 0x00001010);
- INSTANCE_WR(ctx, 0x003d0/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003d4/4, 0x00080060);
- INSTANCE_WR(ctx, 0x003f0/4, 0x00000080);
- INSTANCE_WR(ctx, 0x003f4/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x003f8/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0040c/4, 0x46400000);
- INSTANCE_WR(ctx, 0x0041c/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x00428/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x0042c/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00434/4, 0x00011100);
- for (i=0x00450; i<0x0048c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x00498/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x004c0/4, 0x30201000);
- INSTANCE_WR(ctx, 0x004c4/4, 0x70605040);
- INSTANCE_WR(ctx, 0x004c8/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x004cc/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x004e0/4, 0x40100000);
- INSTANCE_WR(ctx, 0x004fc/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00530/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x00534/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x00538/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x0053c/4, 0x00000098);
- INSTANCE_WR(ctx, 0x0054c/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x00550/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x00554/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00564/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x0059c/4, 0x00ffff00);
- for (i=0x005e0; i<=0x0061c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- for (i=0x00620; i<=0x0065c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- for (i=0x006a0; i<=0x006dc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- for (i=0x006e0; i<=0x0071c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for (i=0x00720; i<=0x0075c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for (i=0x007a0; i<=0x007dc; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- for (i=0x00830; i<=0x0083c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0001bc80);
- for (i=0x00840; i<=0x0084c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000202);
- for (i=0x00860; i<=0x0086c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- for (i=0x00880; i<=0x0088c; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x008a0/4, 0x00000002);
- INSTANCE_WR(ctx, 0x008d4/4, 0x00000020);
- INSTANCE_WR(ctx, 0x008d8/4, 0x030c30c3);
- INSTANCE_WR(ctx, 0x008dc/4, 0x00011001);
- INSTANCE_WR(ctx, 0x008e8/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x008ec/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x008f0/4, 0x0c103f00);
- INSTANCE_WR(ctx, 0x008fc/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00934/4, 0x00008100);
- INSTANCE_WR(ctx, 0x009c0/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00a04/4, 0x00001001);
- INSTANCE_WR(ctx, 0x00a0c/4, 0x00000003);
- INSTANCE_WR(ctx, 0x00a10/4, 0x00888001);
- INSTANCE_WR(ctx, 0x00a74/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00a80/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00a9c/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00aa0/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00ad8/4, 0x00000001);
- for (i=0x016a0; i<0x01718; i+=8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x03460; i<0x05650; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x05660; i<0x05a50; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-}
-
-static void
-nv4e_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i;
-
- INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start);
- INSTANCE_WR(ctx, 0x00024/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00028/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00030/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0011c/4, 0x20010001);
- INSTANCE_WR(ctx, 0x00120/4, 0x0f73ef00);
- INSTANCE_WR(ctx, 0x00128/4, 0x02008821);
- INSTANCE_WR(ctx, 0x00158/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0015c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00160/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00164/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00168/4, 0x00000001);
- INSTANCE_WR(ctx, 0x0016c/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00170/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00174/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00178/4, 0x00000040);
- INSTANCE_WR(ctx, 0x0017c/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00180/4, 0x00000040);
- INSTANCE_WR(ctx, 0x00188/4, 0x00000040);
- INSTANCE_WR(ctx, 0x001d0/4, 0x0b0b0b0c);
- INSTANCE_WR(ctx, 0x00340/4, 0x00040000);
- INSTANCE_WR(ctx, 0x00350/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00354/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00358/4, 0x55555555);
- INSTANCE_WR(ctx, 0x0035c/4, 0x55555555);
- INSTANCE_WR(ctx, 0x00388/4, 0x00000008);
- INSTANCE_WR(ctx, 0x0039c/4, 0x00001010);
- INSTANCE_WR(ctx, 0x003cc/4, 0x00000111);
- INSTANCE_WR(ctx, 0x003d0/4, 0x00080060);
- INSTANCE_WR(ctx, 0x003ec/4, 0x00000080);
- INSTANCE_WR(ctx, 0x003f0/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x003f4/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00408/4, 0x46400000);
- INSTANCE_WR(ctx, 0x00418/4, 0xffff0000);
- INSTANCE_WR(ctx, 0x00424/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00428/4, 0x0fff0000);
- INSTANCE_WR(ctx, 0x00430/4, 0x00011100);
- for (i=0x0044c; i<=0x00488; i+=4)
- INSTANCE_WR(ctx, i/4, 0x07ff0000);
- INSTANCE_WR(ctx, 0x00494/4, 0x4b7fffff);
- INSTANCE_WR(ctx, 0x004bc/4, 0x30201000);
- INSTANCE_WR(ctx, 0x004c0/4, 0x70605040);
- INSTANCE_WR(ctx, 0x004c4/4, 0xb8a89888);
- INSTANCE_WR(ctx, 0x004c8/4, 0xf8e8d8c8);
- INSTANCE_WR(ctx, 0x004dc/4, 0x40100000);
- INSTANCE_WR(ctx, 0x004f8/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0052c/4, 0x435185d6);
- INSTANCE_WR(ctx, 0x00530/4, 0x2155b699);
- INSTANCE_WR(ctx, 0x00534/4, 0xfedcba98);
- INSTANCE_WR(ctx, 0x00538/4, 0x00000098);
- INSTANCE_WR(ctx, 0x00548/4, 0xffffffff);
- INSTANCE_WR(ctx, 0x0054c/4, 0x00ff7000);
- INSTANCE_WR(ctx, 0x00550/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x0055c/4, 0x00ff0000);
- INSTANCE_WR(ctx, 0x00594/4, 0x00ffff00);
- for (i=0x005d8; i<=0x00614; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00018488);
- for (i=0x00618; i<=0x00654; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00028202);
- for (i=0x00698; i<=0x006d4; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0000aae4);
- for (i=0x006d8; i<=0x00714; i+=4)
- INSTANCE_WR(ctx, i/4, 0x01012000);
- for (i=0x00718; i<=0x00754; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- for (i=0x00798; i<=0x007d4; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00100008);
- for (i=0x00828; i<=0x00834; i+=4)
- INSTANCE_WR(ctx, i/4, 0x0001bc80);
- for (i=0x00838; i<=0x00844; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000202);
- for (i=0x00858; i<=0x00864; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00000008);
- for (i=0x00878; i<=0x00884; i+=4)
- INSTANCE_WR(ctx, i/4, 0x00080008);
- INSTANCE_WR(ctx, 0x00898/4, 0x00000002);
- INSTANCE_WR(ctx, 0x008cc/4, 0x00000020);
- INSTANCE_WR(ctx, 0x008d0/4, 0x030c30c3);
- INSTANCE_WR(ctx, 0x008d4/4, 0x00011001);
- INSTANCE_WR(ctx, 0x008e0/4, 0x3e020200);
- INSTANCE_WR(ctx, 0x008e4/4, 0x00ffffff);
- INSTANCE_WR(ctx, 0x008e8/4, 0x0c103f00);
- INSTANCE_WR(ctx, 0x008f4/4, 0x00040000);
- INSTANCE_WR(ctx, 0x0092c/4, 0x00008100);
- INSTANCE_WR(ctx, 0x009b8/4, 0x00000001);
- INSTANCE_WR(ctx, 0x009fc/4, 0x00001001);
- INSTANCE_WR(ctx, 0x00a04/4, 0x00000003);
- INSTANCE_WR(ctx, 0x00a08/4, 0x00888001);
- INSTANCE_WR(ctx, 0x00a6c/4, 0x00000005);
- INSTANCE_WR(ctx, 0x00a78/4, 0x0000ffff);
- INSTANCE_WR(ctx, 0x00a94/4, 0x00005555);
- INSTANCE_WR(ctx, 0x00a98/4, 0x00000001);
- INSTANCE_WR(ctx, 0x00aa4/4, 0x00000001);
- for (i=0x01668; i<=0x016e0; i+=8)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
- for (i=0x03428; i<=0x05618; i+=24)
- INSTANCE_WR(ctx, i/4, 0x00000001);
- for (i=0x05628; i<=0x05a18; i+=16)
- INSTANCE_WR(ctx, i/4, 0x3f800000);
-}
-
-int
-nv40_graph_create_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *);
- int ret;
-
- /* These functions populate the graphics context with a whole heap
- * of default state. All these functions are very similar, with
- * a minimal amount of chipset-specific changes. However, as we're
- * currently dependant on the context programs used by the NVIDIA
- * binary driver these functions must match the layout expected by
- * them. Hopefully at some point this will all change.
- */
- switch (dev_priv->chipset) {
- case 0x40:
- ctx_init = nv40_graph_context_init;
- break;
- case 0x41:
- case 0x42:
- ctx_init = nv41_graph_context_init;
- break;
- case 0x43:
- ctx_init = nv43_graph_context_init;
- break;
- case 0x46:
- ctx_init = nv46_graph_context_init;
- break;
- case 0x47:
- ctx_init = nv47_graph_context_init;
- break;
- case 0x49:
- ctx_init = nv49_graph_context_init;
- break;
- case 0x44:
- case 0x4a:
- ctx_init = nv4a_graph_context_init;
- break;
- case 0x4b:
- ctx_init = nv4b_graph_context_init;
- break;
- case 0x4c:
- case 0x67:
- ctx_init = nv4c_graph_context_init;
- break;
- case 0x4e:
- ctx_init = nv4e_graph_context_init;
- break;
- default:
- ctx_init = nv40_graph_context_init;
- break;
- }
-
- /* Allocate a 175KiB block of PRAMIN to store the context. This
- * is massive overkill for a lot of chipsets, but it should be safe
- * until we're able to implement this properly (will happen at more
- * or less the same time we're able to write our own context programs.
- */
- if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 175*1024, 16,
- NVOBJ_FLAG_ZERO_ALLOC,
- &chan->ramin_grctx)))
- return ret;
-
- /* Initialise default context values */
- ctx_init(dev, chan->ramin_grctx->gpuobj);
-
- return 0;
-}
-
-void
-nv40_graph_destroy_context(struct nouveau_channel *chan)
-{
- nouveau_gpuobj_ref_del(chan->dev, &chan->ramin_grctx);
-}
-
-static int
-nv40_graph_transfer_context(struct drm_device *dev, uint32_t inst, int save)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t old_cp, tv = 1000, tmp;
- int i;
-
- old_cp = NV_READ(NV20_PGRAPH_CHANNEL_CTX_POINTER);
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
-
- tmp = NV_READ(NV40_PGRAPH_CTXCTL_0310);
- tmp |= save ? NV40_PGRAPH_CTXCTL_0310_XFER_SAVE :
- NV40_PGRAPH_CTXCTL_0310_XFER_LOAD;
- NV_WRITE(NV40_PGRAPH_CTXCTL_0310, tmp);
-
- tmp = NV_READ(NV40_PGRAPH_CTXCTL_0304);
- tmp |= NV40_PGRAPH_CTXCTL_0304_XFER_CTX;
- NV_WRITE(NV40_PGRAPH_CTXCTL_0304, tmp);
-
- nouveau_wait_for_idle(dev);
-
- for (i = 0; i < tv; i++) {
- if (NV_READ(NV40_PGRAPH_CTXCTL_030C) == 0)
- break;
- }
-
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, old_cp);
-
- if (i == tv) {
- uint32_t ucstat = NV_READ(NV40_PGRAPH_CTXCTL_UCODE_STAT);
- DRM_ERROR("Failed: Instance=0x%08x Save=%d\n", inst, save);
- DRM_ERROR("IP: 0x%02x, Opcode: 0x%08x\n",
- ucstat >> NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_SHIFT,
- ucstat & NV40_PGRAPH_CTXCTL_UCODE_STAT_OP_MASK);
- DRM_ERROR("0x40030C = 0x%08x\n",
- NV_READ(NV40_PGRAPH_CTXCTL_030C));
- return -EBUSY;
- }
-
- return 0;
-}
-
-/* Save current context (from PGRAPH) into the channel's context */
-int
-nv40_graph_save_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- uint32_t inst;
-
- if (!chan->ramin_grctx)
- return -EINVAL;
- inst = chan->ramin_grctx->instance >> 4;
-
- return nv40_graph_transfer_context(dev, inst, 1);
-}
-
-/* Restore the context for a specific channel into PGRAPH */
-int
-nv40_graph_load_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t inst;
- int ret;
-
- if (!chan->ramin_grctx)
- return -EINVAL;
- inst = chan->ramin_grctx->instance >> 4;
-
- ret = nv40_graph_transfer_context(dev, inst, 0);
- if (ret)
- return ret;
-
- /* 0x40032C, no idea of it's exact function. Could simply be a
- * record of the currently active PGRAPH context. It's currently
- * unknown as to what bit 24 does. The nv ddx has it set, so we will
- * set it here too.
- */
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
- NV_WRITE(NV40_PGRAPH_CTXCTL_CUR,
- (inst & NV40_PGRAPH_CTXCTL_CUR_INST_MASK) |
- NV40_PGRAPH_CTXCTL_CUR_LOADED);
- /* 0x32E0 records the instance address of the active FIFO's PGRAPH
- * context. If at any time this doesn't match 0x40032C, you will
- * recieve PGRAPH_INTR_CONTEXT_SWITCH
- */
- NV_WRITE(NV40_PFIFO_GRCTX_INSTANCE, inst);
- return 0;
-}
-
-/* These blocks of "magic numbers" are actually a microcode that the GPU uses
- * to control how graphics contexts get saved and restored between PRAMIN
- * and PGRAPH during a context switch. We're currently using values seen
- * in mmio-traces of the binary driver.
- */
-static uint32_t nv40_ctx_prog[] = {
- 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
- 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00408f65, 0x00409406,
- 0x0040a268, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
- 0x004014e6, 0x007000a0, 0x00401a84, 0x00700082, 0x00600001, 0x00500061,
- 0x00600002, 0x00401b68, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d,
- 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
- 0x001041c9, 0x0010c1dc, 0x00110205, 0x0011420a, 0x00114210, 0x00110216,
- 0x0012421b, 0x00120270, 0x001242c0, 0x00200040, 0x00100280, 0x00128100,
- 0x00128120, 0x00128143, 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029,
- 0x00110400, 0x00104d10, 0x00500060, 0x00403b87, 0x0060000d, 0x004076e6,
- 0x002000f0, 0x0060000a, 0x00200045, 0x00100620, 0x00108668, 0x0011466b,
- 0x00120682, 0x0011068b, 0x00168691, 0x0010c6ae, 0x001206b4, 0x0020002a,
- 0x001006c4, 0x001246f0, 0x002000c0, 0x00100700, 0x0010c3d7, 0x001043e1,
- 0x00500060, 0x00405600, 0x00405684, 0x00600003, 0x00500067, 0x00600008,
- 0x00500060, 0x00700082, 0x0020026c, 0x0060000a, 0x00104800, 0x00104901,
- 0x00120920, 0x00200035, 0x00100940, 0x00148a00, 0x00104a14, 0x00200038,
- 0x00100b00, 0x00138d00, 0x00104e00, 0x0012d600, 0x00105c00, 0x00104f06,
- 0x0020031a, 0x0060000a, 0x00300000, 0x00200680, 0x00406c00, 0x00200684,
- 0x00800001, 0x00200b62, 0x0060000a, 0x0020a0b0, 0x0040728a, 0x00201b68,
- 0x00800041, 0x00407684, 0x00203e60, 0x00800002, 0x00408700, 0x00600006,
- 0x00700003, 0x004080e6, 0x00700080, 0x0020031a, 0x0060000a, 0x00200004,
- 0x00800001, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x0040a284,
- 0x00700002, 0x00600004, 0x0040a268, 0x00700000, 0x00200000, 0x0060000a,
- 0x00106002, 0x00700080, 0x00400a84, 0x00700002, 0x00400a68, 0x00500060,
- 0x00600007, 0x00409388, 0x0060000f, 0x00000000, 0x00500060, 0x00200000,
- 0x0060000a, 0x00700000, 0x00106001, 0x00700083, 0x00910880, 0x00901ffe,
- 0x00940400, 0x00200020, 0x0060000b, 0x00500069, 0x0060000c, 0x00401b68,
- 0x0040a406, 0x0040a505, 0x00600009, 0x00700005, 0x00700006, 0x0060000e,
- ~0
-};
-
-static uint32_t nv41_ctx_prog[] = {
- 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
- 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00408f65, 0x00409306,
- 0x0040a068, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042,
- 0x00200001, 0x0060000a, 0x00700000, 0x001040c5, 0x00401826, 0x00401968,
- 0x0060000d, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
- 0x004020e6, 0x007000a0, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d,
- 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
- 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e,
- 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143,
- 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10,
- 0x001046ec, 0x00500060, 0x00404087, 0x0060000d, 0x004079e6, 0x002000f1,
- 0x0060000a, 0x00148653, 0x00104668, 0x0010c66d, 0x00120682, 0x0011068b,
- 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6,
- 0x00200020, 0x001006cc, 0x001046ed, 0x001246f0, 0x002000c0, 0x00100700,
- 0x0010c3d7, 0x001043e1, 0x00500060, 0x00200233, 0x0060000a, 0x00104800,
- 0x00108901, 0x00124920, 0x0020001f, 0x00100940, 0x00140965, 0x00148a00,
- 0x00108a14, 0x00200020, 0x00100b00, 0x00134b2c, 0x0010cd00, 0x0010cd04,
- 0x00114d08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00, 0x00104f06,
- 0x002002d2, 0x0060000a, 0x00300000, 0x00200680, 0x00407200, 0x00200684,
- 0x00800001, 0x00200b1a, 0x0060000a, 0x00206380, 0x0040788a, 0x00201480,
- 0x00800041, 0x00408900, 0x00600006, 0x004085e6, 0x00700080, 0x0020007a,
- 0x0060000a, 0x00104280, 0x002002d2, 0x0060000a, 0x00200004, 0x00800001,
- 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x0040a068, 0x00700000,
- 0x00200000, 0x0060000a, 0x00106002, 0x00700080, 0x00400a68, 0x00500060,
- 0x00600007, 0x00409388, 0x0060000f, 0x00500060, 0x00200000, 0x0060000a,
- 0x00700000, 0x00106001, 0x00910880, 0x00901ffe, 0x00940400, 0x00200020,
- 0x0060000b, 0x00500069, 0x0060000c, 0x00402168, 0x0040a206, 0x0040a305,
- 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0
-};
-
-static uint32_t nv43_ctx_prog[] = {
- 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
- 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409565, 0x00409a06,
- 0x0040a868, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
- 0x004014e6, 0x007000a0, 0x00401a84, 0x00700082, 0x00600001, 0x00500061,
- 0x00600002, 0x00401b68, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d,
- 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
- 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e,
- 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143,
- 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10,
- 0x001046ec, 0x00500060, 0x00403a87, 0x0060000d, 0x00407ce6, 0x002000f1,
- 0x0060000a, 0x00148653, 0x00104668, 0x0010c66d, 0x00120682, 0x0011068b,
- 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6,
- 0x00200020, 0x001006cc, 0x001046ed, 0x001246f0, 0x002000c0, 0x00100700,
- 0x0010c3d7, 0x001043e1, 0x00500060, 0x00405800, 0x00405884, 0x00600003,
- 0x00500067, 0x00600008, 0x00500060, 0x00700082, 0x00200233, 0x0060000a,
- 0x00104800, 0x00108901, 0x00124920, 0x0020001f, 0x00100940, 0x00140965,
- 0x00148a00, 0x00108a14, 0x00160b00, 0x00134b2c, 0x0010cd00, 0x0010cd04,
- 0x0010cd08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00, 0x00104f06,
- 0x002002c8, 0x0060000a, 0x00300000, 0x00200680, 0x00407200, 0x00200684,
- 0x00800001, 0x00200b10, 0x0060000a, 0x00203870, 0x0040788a, 0x00201350,
- 0x00800041, 0x00407c84, 0x00201560, 0x00800002, 0x00408d00, 0x00600006,
- 0x00700003, 0x004086e6, 0x00700080, 0x002002c8, 0x0060000a, 0x00200004,
- 0x00800001, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x0040a884,
- 0x00700002, 0x00600004, 0x0040a868, 0x00700000, 0x00200000, 0x0060000a,
- 0x00106002, 0x00700080, 0x00400a84, 0x00700002, 0x00400a68, 0x00500060,
- 0x00600007, 0x00409988, 0x0060000f, 0x00000000, 0x00500060, 0x00200000,
- 0x0060000a, 0x00700000, 0x00106001, 0x00700083, 0x00910880, 0x00901ffe,
- 0x00940400, 0x00200020, 0x0060000b, 0x00500069, 0x0060000c, 0x00401b68,
- 0x0040aa06, 0x0040ab05, 0x00600009, 0x00700005, 0x00700006, 0x0060000e,
- ~0
-};
-
-static uint32_t nv44_ctx_prog[] = {
- 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
- 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409a65, 0x00409f06,
- 0x0040ac68, 0x0040248f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042,
- 0x001041c6, 0x00104040, 0x00200001, 0x0060000a, 0x00700000, 0x001040c5,
- 0x00402320, 0x00402321, 0x00402322, 0x00402324, 0x00402326, 0x0040232b,
- 0x001040c5, 0x00402328, 0x001040c5, 0x00402320, 0x00402468, 0x0060000d,
- 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, 0x00402be6,
- 0x007000a0, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d, 0x00110158,
- 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4, 0x001041c9,
- 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e, 0x001242c0,
- 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143, 0x0011415f,
- 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10, 0x001046ec,
- 0x00500060, 0x00404b87, 0x0060000d, 0x004084e6, 0x002000f1, 0x0060000a,
- 0x00148653, 0x00104668, 0x0010c66d, 0x00120682, 0x0011068b, 0x00168691,
- 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6, 0x001646cc,
- 0x001186e6, 0x001046ed, 0x001246f0, 0x002000c0, 0x00100700, 0x0010c3d7,
- 0x001043e1, 0x00500060, 0x00200232, 0x0060000a, 0x00104800, 0x00108901,
- 0x00104910, 0x00124920, 0x0020001f, 0x00100940, 0x00140965, 0x00148a00,
- 0x00108a14, 0x00160b00, 0x00134b2c, 0x0010cd00, 0x0010cd04, 0x0010cd08,
- 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00, 0x00104f06, 0x002002c8,
- 0x0060000a, 0x00300000, 0x00200080, 0x00407d00, 0x00200084, 0x00800001,
- 0x00200510, 0x0060000a, 0x002037e0, 0x0040838a, 0x00201320, 0x00800029,
- 0x00409400, 0x00600006, 0x004090e6, 0x00700080, 0x0020007a, 0x0060000a,
- 0x00104280, 0x002002c8, 0x0060000a, 0x00200004, 0x00800001, 0x00700000,
- 0x00200000, 0x0060000a, 0x00106002, 0x0040ac68, 0x00700000, 0x00200000,
- 0x0060000a, 0x00106002, 0x00700080, 0x00400a68, 0x00500060, 0x00600007,
- 0x00409e88, 0x0060000f, 0x00000000, 0x00500060, 0x00200000, 0x0060000a,
- 0x00700000, 0x00106001, 0x00910880, 0x00901ffe, 0x01940000, 0x00200020,
- 0x0060000b, 0x00500069, 0x0060000c, 0x00402c68, 0x0040ae06, 0x0040af05,
- 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0
-};
-
-static uint32_t nv46_ctx_prog[] = {
- 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
- 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00408f65, 0x00409306,
- 0x0040a068, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042,
- 0x00200001, 0x0060000a, 0x00700000, 0x001040c5, 0x00401826, 0x00401968,
- 0x0060000d, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
- 0x004020e6, 0x007000a0, 0x00500060, 0x00200008, 0x0060000a, 0x0011814d,
- 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
- 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e,
- 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143,
- 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10,
- 0x00500060, 0x00403f87, 0x0060000d, 0x004079e6, 0x002000f7, 0x0060000a,
- 0x00200045, 0x00100620, 0x00104668, 0x0017466d, 0x0011068b, 0x00168691,
- 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6, 0x00200022,
- 0x001006cc, 0x001246f0, 0x002000c0, 0x00100700, 0x0010c3d7, 0x001043e1,
- 0x00500060, 0x0020027f, 0x0060000a, 0x00104800, 0x00108901, 0x00104910,
- 0x00124920, 0x0020001f, 0x00100940, 0x00140965, 0x00148a00, 0x00108a14,
- 0x00160b00, 0x00134b2c, 0x0010cd00, 0x0010cd04, 0x0010cd08, 0x00104d80,
- 0x00104e00, 0x0012d600, 0x00105c00, 0x00104f06, 0x00105406, 0x00105709,
- 0x00200316, 0x0060000a, 0x00300000, 0x00200080, 0x00407200, 0x00200084,
- 0x00800001, 0x0020055e, 0x0060000a, 0x002037e0, 0x0040788a, 0x00201320,
- 0x00800029, 0x00408900, 0x00600006, 0x004085e6, 0x00700080, 0x00200081,
- 0x0060000a, 0x00104280, 0x00200316, 0x0060000a, 0x00200004, 0x00800001,
- 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x0040a068, 0x00700000,
- 0x00200000, 0x0060000a, 0x00106002, 0x00700080, 0x00400a68, 0x00500060,
- 0x00600007, 0x00409388, 0x0060000f, 0x00500060, 0x00200000, 0x0060000a,
- 0x00700000, 0x00106001, 0x00910880, 0x00901ffe, 0x01940000, 0x00200020,
- 0x0060000b, 0x00500069, 0x0060000c, 0x00402168, 0x0040a206, 0x0040a305,
- 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0
-};
-
-static uint32_t nv47_ctx_prog[] = {
- 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
- 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409265, 0x00409606,
- 0x0040a368, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042,
- 0x00200001, 0x0060000a, 0x00700000, 0x001040c5, 0x00401826, 0x00401968,
- 0x0060000d, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
- 0x004020e6, 0x007000a0, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d,
- 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
- 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e,
- 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143,
- 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d12,
- 0x00500060, 0x00403f87, 0x0060000d, 0x00407ce6, 0x002000f0, 0x0060000a,
- 0x00200020, 0x00100620, 0x00154650, 0x00104668, 0x0017466d, 0x0011068b,
- 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6,
- 0x00200022, 0x001006cc, 0x001246f0, 0x002000c0, 0x00100700, 0x0010c3d7,
- 0x001043e1, 0x00500060, 0x00200268, 0x0060000a, 0x00104800, 0x00108901,
- 0x00124920, 0x0020001f, 0x00100940, 0x00140965, 0x00144a00, 0x00104a19,
- 0x0010ca1c, 0x00110b00, 0x00200028, 0x00100b08, 0x00134c2e, 0x0010cd00,
- 0x0010cd04, 0x00120d08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00,
- 0x00104f06, 0x00105406, 0x00105709, 0x00200318, 0x0060000a, 0x00300000,
- 0x00200680, 0x00407500, 0x00200684, 0x00800001, 0x00200b60, 0x0060000a,
- 0x00209540, 0x00407b8a, 0x00201350, 0x00800041, 0x00408c00, 0x00600006,
- 0x004088e6, 0x00700080, 0x0020007a, 0x0060000a, 0x00104280, 0x00200318,
- 0x0060000a, 0x00200004, 0x00800001, 0x00700000, 0x00200000, 0x0060000a,
- 0x00106002, 0x0040a368, 0x00700000, 0x00200000, 0x0060000a, 0x00106002,
- 0x00700080, 0x00400a68, 0x00500060, 0x00600007, 0x00409688, 0x0060000f,
- 0x00500060, 0x00200000, 0x0060000a, 0x00700000, 0x00106001, 0x0091a880,
- 0x00901ffe, 0x10940000, 0x00200020, 0x0060000b, 0x00500069, 0x0060000c,
- 0x00402168, 0x0040a506, 0x0040a605, 0x00600009, 0x00700005, 0x00700006,
- 0x0060000e, ~0
-};
-
-//this is used for nv49 and nv4b
-static uint32_t nv49_4b_ctx_prog[] ={
- 0x00400564, 0x00400505, 0x00408165, 0x00408206, 0x00409e68, 0x00200020,
- 0x0060000a, 0x00700080, 0x00104042, 0x00200020, 0x0060000a, 0x00700000,
- 0x001040c5, 0x00400f26, 0x00401068, 0x0060000d, 0x0070008f, 0x0070000e,
- 0x00408d68, 0x004015e6, 0x007000a0, 0x00700080, 0x0040180f, 0x00700000,
- 0x00200029, 0x0060000a, 0x0011814d, 0x00110158, 0x00105401, 0x0020003a,
- 0x00100051, 0x001040c5, 0x0010c1c4, 0x001041c9, 0x0010c1dc, 0x00150210,
- 0x0012c225, 0x00108238, 0x0010823e, 0x001242c0, 0x00200040, 0x00100280,
- 0x00128100, 0x00128120, 0x00128143, 0x0011415f, 0x0010815c, 0x0010c140,
- 0x00104029, 0x00110400, 0x00104d12, 0x00500060, 0x004071e6, 0x00200118,
- 0x0060000a, 0x00200020, 0x00100620, 0x00154650, 0x00104668, 0x0017466d,
- 0x0011068b, 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4,
- 0x001146c6, 0x00200022, 0x001006cc, 0x001246f0, 0x002000c0, 0x00100700,
- 0x0010c3d7, 0x001043e1, 0x00500060, 0x00200290, 0x0060000a, 0x00104800,
- 0x00108901, 0x00124920, 0x0020001f, 0x00100940, 0x00140965, 0x00144a00,
- 0x00104a19, 0x0010ca1c, 0x00110b00, 0x00200028, 0x00100b08, 0x00134c2e,
- 0x0010cd00, 0x0010cd04, 0x00120d08, 0x00104d80, 0x00104e00, 0x0012d600,
- 0x00105c00, 0x00104f06, 0x00105406, 0x00105709, 0x00200340, 0x0060000a,
- 0x00300000, 0x00200680, 0x00406a0f, 0x00200684, 0x00800001, 0x00200b88,
- 0x0060000a, 0x00209540, 0x0040708a, 0x00201350, 0x00800041, 0x00407c0f,
- 0x00600006, 0x00407ce6, 0x00700080, 0x002000a2, 0x0060000a, 0x00104280,
- 0x00200340, 0x0060000a, 0x00200004, 0x00800001, 0x0070008e, 0x00408d68,
- 0x0040020f, 0x00600006, 0x00409e68, 0x00600007, 0x0070000f, 0x0070000e,
- 0x00408d68, 0x0091a880, 0x00901ffe, 0x10940000, 0x00200020, 0x0060000b,
- 0x00500069, 0x0060000c, 0x00401568, 0x00700000, 0x00200001, 0x0040910e,
- 0x00200021, 0x0060000a, 0x00409b0d, 0x00104a40, 0x00104a50, 0x00104a60,
- 0x00104a70, 0x00104a80, 0x00104a90, 0x00104aa0, 0x00104ab0, 0x00407e0e,
- 0x0040130f, 0x00408568, 0x0040a006, 0x0040a105, 0x00600009, 0x00700005,
- 0x00700006, 0x0060000e, ~0
-};
-
-
-static uint32_t nv4a_ctx_prog[] = {
- 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
- 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409965, 0x00409e06,
- 0x0040ac68, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
- 0x004014e6, 0x007000a0, 0x00401a84, 0x00700082, 0x00600001, 0x00500061,
- 0x00600002, 0x00401b68, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d,
- 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
- 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e,
- 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143,
- 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10,
- 0x001046ec, 0x00500060, 0x00403a87, 0x0060000d, 0x00407de6, 0x002000f1,
- 0x0060000a, 0x00148653, 0x00104668, 0x0010c66d, 0x00120682, 0x0011068b,
- 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6,
- 0x001646cc, 0x001186e6, 0x001046ed, 0x001246f0, 0x002000c0, 0x00100700,
- 0x0010c3d7, 0x001043e1, 0x00500060, 0x00405800, 0x00405884, 0x00600003,
- 0x00500067, 0x00600008, 0x00500060, 0x00700082, 0x00200232, 0x0060000a,
- 0x00104800, 0x00108901, 0x00104910, 0x00124920, 0x0020001f, 0x00100940,
- 0x00140965, 0x00148a00, 0x00108a14, 0x00160b00, 0x00134b2c, 0x0010cd00,
- 0x0010cd04, 0x0010cd08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00,
- 0x00104f06, 0x002002c8, 0x0060000a, 0x00300000, 0x00200080, 0x00407300,
- 0x00200084, 0x00800001, 0x00200510, 0x0060000a, 0x002037e0, 0x0040798a,
- 0x00201320, 0x00800029, 0x00407d84, 0x00201560, 0x00800002, 0x00409100,
- 0x00600006, 0x00700003, 0x00408ae6, 0x00700080, 0x0020007a, 0x0060000a,
- 0x00104280, 0x002002c8, 0x0060000a, 0x00200004, 0x00800001, 0x00700000,
- 0x00200000, 0x0060000a, 0x00106002, 0x0040ac84, 0x00700002, 0x00600004,
- 0x0040ac68, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x00700080,
- 0x00400a84, 0x00700002, 0x00400a68, 0x00500060, 0x00600007, 0x00409d88,
- 0x0060000f, 0x00000000, 0x00500060, 0x00200000, 0x0060000a, 0x00700000,
- 0x00106001, 0x00700083, 0x00910880, 0x00901ffe, 0x01940000, 0x00200020,
- 0x0060000b, 0x00500069, 0x0060000c, 0x00401b68, 0x0040ae06, 0x0040af05,
- 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0
-};
-
-static uint32_t nv4c_ctx_prog[] = {
- 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
- 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409065, 0x00409406,
- 0x0040a168, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042,
- 0x00200001, 0x0060000a, 0x00700000, 0x001040c5, 0x00401826, 0x00401968,
- 0x0060000d, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
- 0x004020e6, 0x007000a0, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d,
- 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
- 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e,
- 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143,
- 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10,
- 0x0010427e, 0x001046ec, 0x00500060, 0x00404187, 0x0060000d, 0x00407ae6,
- 0x002000f2, 0x0060000a, 0x00148653, 0x00104668, 0x0010c66d, 0x00120682,
- 0x0011068b, 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4,
- 0x001146c6, 0x00200020, 0x001006cc, 0x001046ed, 0x001246f0, 0x002000c0,
- 0x00100700, 0x0010c3d7, 0x001043e1, 0x00500060, 0x00200234, 0x0060000a,
- 0x00104800, 0x00108901, 0x00104910, 0x00124920, 0x0020001f, 0x00100940,
- 0x00140965, 0x00148a00, 0x00108a14, 0x00140b00, 0x00134b2c, 0x0010cd00,
- 0x0010cd04, 0x00104d08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00,
- 0x00104f06, 0x002002c0, 0x0060000a, 0x00300000, 0x00200080, 0x00407300,
- 0x00200084, 0x00800001, 0x00200508, 0x0060000a, 0x00201320, 0x0040798a,
- 0xfffffaf8, 0x00800029, 0x00408a00, 0x00600006, 0x004086e6, 0x00700080,
- 0x0020007a, 0x0060000a, 0x00104280, 0x002002c0, 0x0060000a, 0x00200004,
- 0x00800001, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x0040a168,
- 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x00700080, 0x00400a68,
- 0x00500060, 0x00600007, 0x00409488, 0x0060000f, 0x00500060, 0x00200000,
- 0x0060000a, 0x00700000, 0x00106001, 0x00910880, 0x00901ffe, 0x01940000,
- 0x00200020, 0x0060000b, 0x00500069, 0x0060000c, 0x00402168, 0x0040a306,
- 0x0040a405, 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0
-};
-
-static uint32_t nv4e_ctx_prog[] = {
- 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
- 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409565, 0x00409a06,
- 0x0040a868, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
- 0x004014e6, 0x007000a0, 0x00401a84, 0x00700082, 0x00600001, 0x00500061,
- 0x00600002, 0x00401b68, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d,
- 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
- 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e,
- 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143,
- 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10,
- 0x001046ec, 0x00500060, 0x00403a87, 0x0060000d, 0x00407ce6, 0x002000f1,
- 0x0060000a, 0x00148653, 0x00104668, 0x0010c66d, 0x00120682, 0x0011068b,
- 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6,
- 0x001646cc, 0x001186e6, 0x001046ed, 0x001246f0, 0x002000c0, 0x00100700,
- 0x0010c3d7, 0x001043e1, 0x00500060, 0x00405800, 0x00405884, 0x00600003,
- 0x00500067, 0x00600008, 0x00500060, 0x00700082, 0x00200232, 0x0060000a,
- 0x00104800, 0x00108901, 0x00104910, 0x00124920, 0x0020001f, 0x00100940,
- 0x00140965, 0x00148a00, 0x00108a14, 0x00140b00, 0x00134b2c, 0x0010cd00,
- 0x0010cd04, 0x00104d08, 0x00104d80, 0x00104e00, 0x00105c00, 0x00104f06,
- 0x002002b2, 0x0060000a, 0x00300000, 0x00200080, 0x00407200, 0x00200084,
- 0x00800001, 0x002004fa, 0x0060000a, 0x00201320, 0x0040788a, 0xfffffb06,
- 0x00800029, 0x00407c84, 0x00200b20, 0x00800002, 0x00408d00, 0x00600006,
- 0x00700003, 0x004086e6, 0x00700080, 0x002002b2, 0x0060000a, 0x00200004,
- 0x00800001, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x0040a884,
- 0x00700002, 0x00600004, 0x0040a868, 0x00700000, 0x00200000, 0x0060000a,
- 0x00106002, 0x00700080, 0x00400a84, 0x00700002, 0x00400a68, 0x00500060,
- 0x00600007, 0x00409988, 0x0060000f, 0x00000000, 0x00500060, 0x00200000,
- 0x0060000a, 0x00700000, 0x00106001, 0x00700083, 0x00910880, 0x00901ffe,
- 0x01940000, 0x00200020, 0x0060000b, 0x00500069, 0x0060000c, 0x00401b68,
- 0x0040aa06, 0x0040ab05, 0x00600009, 0x00700005, 0x00700006, 0x0060000e,
- ~0
-};
-
-/*
- * G70 0x47
- * G71 0x49
- * NV45 0x48
- * G72[M] 0x46
- * G73 0x4b
- * C51_G7X 0x4c
- * C51 0x4e
- */
-int
-nv40_graph_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv =
- (struct drm_nouveau_private *)dev->dev_private;
- uint32_t *ctx_prog;
- uint32_t vramsz, tmp;
- int i, j;
-
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) &
- ~NV_PMC_ENABLE_PGRAPH);
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) |
- NV_PMC_ENABLE_PGRAPH);
-
- switch (dev_priv->chipset) {
- case 0x40: ctx_prog = nv40_ctx_prog; break;
- case 0x41:
- case 0x42: ctx_prog = nv41_ctx_prog; break;
- case 0x43: ctx_prog = nv43_ctx_prog; break;
- case 0x44: ctx_prog = nv44_ctx_prog; break;
- case 0x46: ctx_prog = nv46_ctx_prog; break;
- case 0x47: ctx_prog = nv47_ctx_prog; break;
- case 0x49: ctx_prog = nv49_4b_ctx_prog; break;
- case 0x4a: ctx_prog = nv4a_ctx_prog; break;
- case 0x4b: ctx_prog = nv49_4b_ctx_prog; break;
- case 0x4c:
- case 0x67: ctx_prog = nv4c_ctx_prog; break;
- case 0x4e: ctx_prog = nv4e_ctx_prog; break;
- default:
- DRM_ERROR("Context program for 0x%02x unavailable\n",
- dev_priv->chipset);
- return -EINVAL;
- }
-
- /* Load the context program onto the card */
- DRM_DEBUG("Loading context program\n");
-
- i = 0;
- NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
- while (ctx_prog[i] != ~0) {
- NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_DATA, ctx_prog[i]);
- i++;
- }
-
- /* No context present currently */
- NV_WRITE(NV40_PGRAPH_CTXCTL_CUR, 0x00000000);
-
- NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF);
- NV_WRITE(NV40_PGRAPH_INTR_EN, 0xFFFFFFFF);
-
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF);
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000);
- NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x401287c0);
- NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xe0de8055);
- NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00008000);
- NV_WRITE(NV04_PGRAPH_LIMIT_VIOL_PIX, 0x00be3c5f);
-
- NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100);
- NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF);
- NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001);
-
- j = NV_READ(0x1540) & 0xff;
- if (j) {
- for (i=0; !(j&1); j>>=1, i++);
- NV_WRITE(0x405000, i);
- }
-
- if (dev_priv->chipset == 0x40) {
- NV_WRITE(0x4009b0, 0x83280fff);
- NV_WRITE(0x4009b4, 0x000000a0);
- } else {
- NV_WRITE(0x400820, 0x83280eff);
- NV_WRITE(0x400824, 0x000000a0);
- }
-
- switch (dev_priv->chipset) {
- case 0x40:
- case 0x45:
- NV_WRITE(0x4009b8, 0x0078e366);
- NV_WRITE(0x4009bc, 0x0000014c);
- break;
- case 0x41:
- case 0x42: /* pciid also 0x00Cx */
-// case 0x0120: //XXX (pciid)
- NV_WRITE(0x400828, 0x007596ff);
- NV_WRITE(0x40082c, 0x00000108);
- break;
- case 0x43:
- NV_WRITE(0x400828, 0x0072cb77);
- NV_WRITE(0x40082c, 0x00000108);
- break;
- case 0x44:
- case 0x46: /* G72 */
- case 0x4a:
- case 0x4c: /* G7x-based C51 */
- case 0x4e:
- NV_WRITE(0x400860, 0);
- NV_WRITE(0x400864, 0);
- break;
- case 0x47: /* G70 */
- case 0x49: /* G71 */
- case 0x4b: /* G73 */
- NV_WRITE(0x400828, 0x07830610);
- NV_WRITE(0x40082c, 0x0000016A);
- break;
- default:
- break;
- }
-
- NV_WRITE(0x400b38, 0x2ffff800);
- NV_WRITE(0x400b3c, 0x00006000);
-
- /* copy tile info from PFB */
- switch (dev_priv->chipset) {
- case 0x40: /* vanilla NV40 */
- for (i=0; i<NV10_PFB_TILE__SIZE; i++) {
- tmp = NV_READ(NV10_PFB_TILE(i));
- NV_WRITE(NV40_PGRAPH_TILE0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TILE1(i), tmp);
- tmp = NV_READ(NV10_PFB_TLIMIT(i));
- NV_WRITE(NV40_PGRAPH_TLIMIT0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TLIMIT1(i), tmp);
- tmp = NV_READ(NV10_PFB_TSIZE(i));
- NV_WRITE(NV40_PGRAPH_TSIZE0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TSIZE1(i), tmp);
- tmp = NV_READ(NV10_PFB_TSTATUS(i));
- NV_WRITE(NV40_PGRAPH_TSTATUS0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TSTATUS1(i), tmp);
- }
- break;
- case 0x44:
- case 0x4a:
- case 0x4e: /* NV44-based cores don't have 0x406900? */
- for (i=0; i<NV40_PFB_TILE__SIZE_0; i++) {
- tmp = NV_READ(NV40_PFB_TILE(i));
- NV_WRITE(NV40_PGRAPH_TILE0(i), tmp);
- tmp = NV_READ(NV40_PFB_TLIMIT(i));
- NV_WRITE(NV40_PGRAPH_TLIMIT0(i), tmp);
- tmp = NV_READ(NV40_PFB_TSIZE(i));
- NV_WRITE(NV40_PGRAPH_TSIZE0(i), tmp);
- tmp = NV_READ(NV40_PFB_TSTATUS(i));
- NV_WRITE(NV40_PGRAPH_TSTATUS0(i), tmp);
- }
- break;
- case 0x46:
- case 0x47:
- case 0x49:
- case 0x4b: /* G7X-based cores */
- for (i=0; i<NV40_PFB_TILE__SIZE_1; i++) {
- tmp = NV_READ(NV40_PFB_TILE(i));
- NV_WRITE(NV47_PGRAPH_TILE0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TILE1(i), tmp);
- tmp = NV_READ(NV40_PFB_TLIMIT(i));
- NV_WRITE(NV47_PGRAPH_TLIMIT0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TLIMIT1(i), tmp);
- tmp = NV_READ(NV40_PFB_TSIZE(i));
- NV_WRITE(NV47_PGRAPH_TSIZE0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TSIZE1(i), tmp);
- tmp = NV_READ(NV40_PFB_TSTATUS(i));
- NV_WRITE(NV47_PGRAPH_TSTATUS0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TSTATUS1(i), tmp);
- }
- break;
- default: /* everything else */
- for (i=0; i<NV40_PFB_TILE__SIZE_0; i++) {
- tmp = NV_READ(NV40_PFB_TILE(i));
- NV_WRITE(NV40_PGRAPH_TILE0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TILE1(i), tmp);
- tmp = NV_READ(NV40_PFB_TLIMIT(i));
- NV_WRITE(NV40_PGRAPH_TLIMIT0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TLIMIT1(i), tmp);
- tmp = NV_READ(NV40_PFB_TSIZE(i));
- NV_WRITE(NV40_PGRAPH_TSIZE0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TSIZE1(i), tmp);
- tmp = NV_READ(NV40_PFB_TSTATUS(i));
- NV_WRITE(NV40_PGRAPH_TSTATUS0(i), tmp);
- NV_WRITE(NV40_PGRAPH_TSTATUS1(i), tmp);
- }
- break;
- }
-
- /* begin RAM config */
- vramsz = drm_get_resource_len(dev, 0) - 1;
- switch (dev_priv->chipset) {
- case 0x40:
- NV_WRITE(0x4009A4, NV_READ(NV04_PFB_CFG0));
- NV_WRITE(0x4009A8, NV_READ(NV04_PFB_CFG1));
- NV_WRITE(0x4069A4, NV_READ(NV04_PFB_CFG0));
- NV_WRITE(0x4069A8, NV_READ(NV04_PFB_CFG1));
- NV_WRITE(0x400820, 0);
- NV_WRITE(0x400824, 0);
- NV_WRITE(0x400864, vramsz);
- NV_WRITE(0x400868, vramsz);
- break;
- default:
- switch (dev_priv->chipset) {
- case 0x46:
- case 0x47:
- case 0x49:
- case 0x4b:
- NV_WRITE(0x400DF0, NV_READ(NV04_PFB_CFG0));
- NV_WRITE(0x400DF4, NV_READ(NV04_PFB_CFG1));
- break;
- default:
- NV_WRITE(0x4009F0, NV_READ(NV04_PFB_CFG0));
- NV_WRITE(0x4009F4, NV_READ(NV04_PFB_CFG1));
- break;
- }
- NV_WRITE(0x4069F0, NV_READ(NV04_PFB_CFG0));
- NV_WRITE(0x4069F4, NV_READ(NV04_PFB_CFG1));
- NV_WRITE(0x400840, 0);
- NV_WRITE(0x400844, 0);
- NV_WRITE(0x4008A0, vramsz);
- NV_WRITE(0x4008A4, vramsz);
- break;
- }
-
- /* per-context state, doesn't belong here */
- NV_WRITE(0x400B20, 0x00000000);
- NV_WRITE(0x400B04, 0xFFFFFFFF);
-
- tmp = NV_READ(NV10_PGRAPH_SURFACE) & 0x0007ff00;
- NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
- tmp = NV_READ(NV10_PGRAPH_SURFACE) | 0x00020100;
- NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
-
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_XMIN, 0);
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_YMIN, 0);
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_XMAX, 0x7fff);
- NV_WRITE(NV03_PGRAPH_ABS_UCLIP_YMAX, 0x7fff);
-
- return 0;
-}
-
-void nv40_graph_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nouveau_drm.h"
-
-int
-nv40_mc_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t tmp;
-
- /* Power up everything, resetting each individual unit will
- * be done later if needed.
- */
- NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF);
-
- switch (dev_priv->chipset) {
- case 0x44:
- case 0x46: /* G72 */
- case 0x4e:
- case 0x4c: /* C51_G7X */
- tmp = NV_READ(NV10_PFB_CSTATUS);
- NV_WRITE(NV40_PMC_1700, tmp);
- NV_WRITE(NV40_PMC_1704, 0);
- NV_WRITE(NV40_PMC_1708, 0);
- NV_WRITE(NV40_PMC_170C, tmp);
- break;
- default:
- break;
- }
-
- return 0;
-}
-
-void
-nv40_mc_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-
-struct nv50_fifo_priv {
- struct nouveau_gpuobj_ref *thingo[2];
- int cur_thingo;
-};
-
-#define IS_G80 ((dev_priv->chipset & 0xf0) == 0x50)
-
-static void
-nv50_fifo_init_thingo(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nv50_fifo_priv *priv = dev_priv->Engine.fifo.priv;
- struct nouveau_gpuobj_ref *cur;
- int i, nr;
-
- DRM_DEBUG("\n");
-
- cur = priv->thingo[priv->cur_thingo];
- priv->cur_thingo = !priv->cur_thingo;
-
- /* We never schedule channel 0 or 127 */
- for (i = 1, nr = 0; i < 127; i++) {
- if (dev_priv->fifos[i]) {
- INSTANCE_WR(cur->gpuobj, nr++, i);
- }
- }
- NV_WRITE(0x32f4, cur->instance >> 12);
- NV_WRITE(0x32ec, nr);
- NV_WRITE(0x2500, 0x101);
-}
-
-static int
-nv50_fifo_channel_enable(struct drm_device *dev, int channel, int nt)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_channel *chan = dev_priv->fifos[channel];
- uint32_t inst;
-
- DRM_DEBUG("ch%d\n", channel);
-
- if (!chan->ramfc)
- return -EINVAL;
-
- if (IS_G80) inst = chan->ramfc->instance >> 12;
- else inst = chan->ramfc->instance >> 8;
- NV_WRITE(NV50_PFIFO_CTX_TABLE(channel),
- inst | NV50_PFIFO_CTX_TABLE_CHANNEL_ENABLED);
-
- if (!nt) nv50_fifo_init_thingo(dev);
- return 0;
-}
-
-static void
-nv50_fifo_channel_disable(struct drm_device *dev, int channel, int nt)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t inst;
-
- DRM_DEBUG("ch%d, nt=%d\n", channel, nt);
-
- if (IS_G80) inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G80;
- else inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G84;
- NV_WRITE(NV50_PFIFO_CTX_TABLE(channel), inst);
-
- if (!nt) nv50_fifo_init_thingo(dev);
-}
-
-static void
-nv50_fifo_init_reset(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t pmc_e = NV_PMC_ENABLE_PFIFO;
-
- DRM_DEBUG("\n");
-
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & ~pmc_e);
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | pmc_e);
-}
-
-static void
-nv50_fifo_init_intr(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- NV_WRITE(NV03_PFIFO_INTR_0, 0xFFFFFFFF);
- NV_WRITE(NV03_PFIFO_INTR_EN_0, 0xFFFFFFFF);
-}
-
-static void
-nv50_fifo_init_context_table(struct drm_device *dev)
-{
- int i;
-
- DRM_DEBUG("\n");
-
- for (i = 0; i < NV50_PFIFO_CTX_TABLE__SIZE; i++)
- nv50_fifo_channel_disable(dev, i, 1);
- nv50_fifo_init_thingo(dev);
-}
-
-static void
-nv50_fifo_init_regs__nv(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- NV_WRITE(0x250c, 0x6f3cfc34);
-}
-
-static void
-nv50_fifo_init_regs(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- NV_WRITE(0x2500, 0);
- NV_WRITE(0x3250, 0);
- NV_WRITE(0x3220, 0);
- NV_WRITE(0x3204, 0);
- NV_WRITE(0x3210, 0);
- NV_WRITE(0x3270, 0);
-
- /* Enable dummy channels setup by nv50_instmem.c */
- nv50_fifo_channel_enable(dev, 0, 1);
- nv50_fifo_channel_enable(dev, 127, 1);
-}
-
-int
-nv50_fifo_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nv50_fifo_priv *priv;
- int ret;
-
- DRM_DEBUG("\n");
-
- priv = drm_calloc(1, sizeof(*priv), DRM_MEM_DRIVER);
- if (!priv)
- return -ENOMEM;
- dev_priv->Engine.fifo.priv = priv;
-
- nv50_fifo_init_reset(dev);
- nv50_fifo_init_intr(dev);
-
- ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000,
- NVOBJ_FLAG_ZERO_ALLOC, &priv->thingo[0]);
- if (ret) {
- DRM_ERROR("error creating thingo0: %d\n", ret);
- return ret;
- }
-
- ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000,
- NVOBJ_FLAG_ZERO_ALLOC, &priv->thingo[1]);
- if (ret) {
- DRM_ERROR("error creating thingo1: %d\n", ret);
- return ret;
- }
-
- nv50_fifo_init_context_table(dev);
- nv50_fifo_init_regs__nv(dev);
- nv50_fifo_init_regs(dev);
-
- return 0;
-}
-
-void
-nv50_fifo_takedown(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nv50_fifo_priv *priv = dev_priv->Engine.fifo.priv;
-
- DRM_DEBUG("\n");
-
- if (!priv)
- return;
-
- nouveau_gpuobj_ref_del(dev, &priv->thingo[0]);
- nouveau_gpuobj_ref_del(dev, &priv->thingo[1]);
-
- dev_priv->Engine.fifo.priv = NULL;
- drm_free(priv, sizeof(*priv), DRM_MEM_DRIVER);
-}
-
-int
-nv50_fifo_channel_id(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- return (NV_READ(NV03_PFIFO_CACHE1_PUSH1) &
- NV50_PFIFO_CACHE1_PUSH1_CHID_MASK);
-}
-
-int
-nv50_fifo_create_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *ramfc = NULL;
- int ret;
-
- DRM_DEBUG("ch%d\n", chan->id);
-
- if (IS_G80) {
- uint32_t ramfc_offset = chan->ramin->gpuobj->im_pramin->start;
- uint32_t vram_offset = chan->ramin->gpuobj->im_backing->start;
- ret = nouveau_gpuobj_new_fake(dev, ramfc_offset, vram_offset,
- 0x100, NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ZERO_FREE, &ramfc,
- &chan->ramfc);
- if (ret)
- return ret;
- } else {
- ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 0x100, 256,
- NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ZERO_FREE,
- &chan->ramfc);
- if (ret)
- return ret;
- ramfc = chan->ramfc->gpuobj;
- }
-
- INSTANCE_WR(ramfc, 0x48/4, chan->pushbuf->instance >> 4);
- INSTANCE_WR(ramfc, 0x80/4, (0xc << 24) | (chan->ramht->instance >> 4));
- INSTANCE_WR(ramfc, 0x3c/4, 0x000f0078); /* fetch? */
- INSTANCE_WR(ramfc, 0x44/4, 0x2101ffff);
- INSTANCE_WR(ramfc, 0x60/4, 0x7fffffff);
- INSTANCE_WR(ramfc, 0x10/4, 0x00000000);
- INSTANCE_WR(ramfc, 0x08/4, 0x00000000);
- INSTANCE_WR(ramfc, 0x40/4, 0x00000000);
- INSTANCE_WR(ramfc, 0x50/4, 0x2039b2e0);
- INSTANCE_WR(ramfc, 0x54/4, 0x000f0000);
- INSTANCE_WR(ramfc, 0x7c/4, 0x30000001);
- INSTANCE_WR(ramfc, 0x78/4, 0x00000000);
- INSTANCE_WR(ramfc, 0x4c/4, chan->pushbuf_mem->size - 1);
-
- if (!IS_G80) {
- INSTANCE_WR(chan->ramin->gpuobj, 0, chan->id);
- INSTANCE_WR(chan->ramin->gpuobj, 1, chan->ramfc->instance >> 8);
-
- INSTANCE_WR(ramfc, 0x88/4, 0x3d520); /* some vram addy >> 10 */
- INSTANCE_WR(ramfc, 0x98/4, chan->ramin->instance >> 12);
- }
-
- ret = nv50_fifo_channel_enable(dev, chan->id, 0);
- if (ret) {
- DRM_ERROR("error enabling ch%d: %d\n", chan->id, ret);
- nouveau_gpuobj_ref_del(dev, &chan->ramfc);
- return ret;
- }
-
- return 0;
-}
-
-void
-nv50_fifo_destroy_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("ch%d\n", chan->id);
-
- nv50_fifo_channel_disable(dev, chan->id, 0);
-
- /* Dummy channel, also used on ch 127 */
- if (chan->id == 0)
- nv50_fifo_channel_disable(dev, 127, 0);
-
- if ((NV_READ(NV03_PFIFO_CACHE1_PUSH1) & 0xffff) == chan->id)
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, 127);
-
- nouveau_gpuobj_ref_del(dev, &chan->ramfc);
-}
-
-int
-nv50_fifo_load_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *ramfc = chan->ramfc->gpuobj;
-
- DRM_DEBUG("ch%d\n", chan->id);
-
- /*XXX: incomplete, only touches the regs that NV does */
-
- NV_WRITE(0x3244, 0);
- NV_WRITE(0x3240, 0);
-
- NV_WRITE(0x3224, INSTANCE_RD(ramfc, 0x3c/4));
- NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE, INSTANCE_RD(ramfc, 0x48/4));
- NV_WRITE(0x3234, INSTANCE_RD(ramfc, 0x4c/4));
- NV_WRITE(0x3254, 1);
- NV_WRITE(NV03_PFIFO_RAMHT, INSTANCE_RD(ramfc, 0x80/4));
-
- if (!IS_G80) {
- NV_WRITE(0x340c, INSTANCE_RD(ramfc, 0x88/4));
- NV_WRITE(0x3410, INSTANCE_RD(ramfc, 0x98/4));
- }
-
- NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16));
- return 0;
-}
-
-int
-nv50_fifo_save_context(struct nouveau_channel *chan)
-{
- DRM_DEBUG("ch%d\n", chan->id);
- DRM_ERROR("stub!\n");
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include "nv50_grctx.h"
-
-#define IS_G80 ((dev_priv->chipset & 0xf0) == 0x50)
-
-static void
-nv50_graph_init_reset(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t pmc_e = NV_PMC_ENABLE_PGRAPH | (1 << 21);
-
- DRM_DEBUG("\n");
-
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & ~pmc_e);
- NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | pmc_e);
-}
-
-static void
-nv50_graph_init_intr(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
- NV_WRITE(NV03_PGRAPH_INTR, 0xffffffff);
- NV_WRITE(0x400138, 0xffffffff);
- NV_WRITE(NV40_PGRAPH_INTR_EN, 0xffffffff);
-}
-
-static void
-nv50_graph_init_regs__nv(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- NV_WRITE(0x400804, 0xc0000000);
- NV_WRITE(0x406800, 0xc0000000);
- NV_WRITE(0x400c04, 0xc0000000);
- NV_WRITE(0x401804, 0xc0000000);
- NV_WRITE(0x405018, 0xc0000000);
- NV_WRITE(0x402000, 0xc0000000);
-
- NV_WRITE(0x400108, 0xffffffff);
-
- NV_WRITE(0x400824, 0x00004000);
- NV_WRITE(0x400500, 0x00010001);
-}
-
-static void
-nv50_graph_init_regs(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- NV_WRITE(NV04_PGRAPH_DEBUG_3, (1<<2) /* HW_CONTEXT_SWITCH_ENABLED */);
- NV_WRITE(0x402ca8, 0x800);
-}
-
-static int
-nv50_graph_init_ctxctl(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t *voodoo = NULL;
-
- DRM_DEBUG("\n");
-
- switch (dev_priv->chipset) {
- case 0x50:
- voodoo = nv50_ctxprog;
- break;
- case 0x84:
- voodoo = nv84_ctxprog;
- break;
- case 0x86:
- voodoo = nv86_ctxprog;
- break;
- case 0x92:
- voodoo = nv92_ctxprog;
- break;
- case 0x94:
- case 0x96:
- voodoo = nv94_ctxprog;
- break;
- case 0x98:
- voodoo = nv98_ctxprog;
- break;
- case 0xa0:
- voodoo = nva0_ctxprog;
- break;
- case 0xaa:
- voodoo = nvaa_ctxprog;
- break;
- default:
- DRM_ERROR("no ctxprog for chipset NV%02x\n", dev_priv->chipset);
- return -EINVAL;
- }
-
- NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
- while (*voodoo != ~0) {
- NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_DATA, *voodoo);
- voodoo++;
- }
-
- NV_WRITE(0x400320, 4);
- NV_WRITE(NV40_PGRAPH_CTXCTL_CUR, 0);
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, 0);
-
- return 0;
-}
-
-int
-nv50_graph_init(struct drm_device *dev)
-{
- int ret;
-
- DRM_DEBUG("\n");
-
- nv50_graph_init_reset(dev);
- nv50_graph_init_intr(dev);
- nv50_graph_init_regs__nv(dev);
- nv50_graph_init_regs(dev);
-
- ret = nv50_graph_init_ctxctl(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
-void
-nv50_graph_takedown(struct drm_device *dev)
-{
- DRM_DEBUG("\n");
-}
-
-int
-nv50_graph_create_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
- struct nouveau_gpuobj *ctx;
- struct nouveau_engine *engine = &dev_priv->Engine;
- uint32_t *ctxvals = NULL;
- int grctx_size = 0x70000, hdr;
- int ret;
-
- DRM_DEBUG("ch%d\n", chan->id);
-
- ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, grctx_size, 0x1000,
- NVOBJ_FLAG_ZERO_ALLOC |
- NVOBJ_FLAG_ZERO_FREE, &chan->ramin_grctx);
- if (ret)
- return ret;
- ctx = chan->ramin_grctx->gpuobj;
-
- hdr = IS_G80 ? 0x200 : 0x20;
- INSTANCE_WR(ramin, (hdr + 0x00)/4, 0x00190002);
- INSTANCE_WR(ramin, (hdr + 0x04)/4, chan->ramin_grctx->instance +
- grctx_size - 1);
- INSTANCE_WR(ramin, (hdr + 0x08)/4, chan->ramin_grctx->instance);
- INSTANCE_WR(ramin, (hdr + 0x0c)/4, 0);
- INSTANCE_WR(ramin, (hdr + 0x10)/4, 0);
- INSTANCE_WR(ramin, (hdr + 0x14)/4, 0x00010000);
-
- switch (dev_priv->chipset) {
- case 0x50:
- ctxvals = nv50_ctxvals;
- break;
- case 0x84:
- ctxvals = nv84_ctxvals;
- break;
- case 0x86:
- ctxvals = nv86_ctxvals;
- break;
- case 0x92:
- ctxvals = nv92_ctxvals;
- break;
- case 0x94:
- ctxvals = nv94_ctxvals;
- break;
- case 0x96:
- ctxvals = nv96_ctxvals;
- break;
- case 0x98:
- ctxvals = nv98_ctxvals;
- break;
- case 0xa0:
- ctxvals = nva0_ctxvals;
- break;
- case 0xaa:
- ctxvals = nvaa_ctxvals;
- break;
- default:
- break;
- }
-
- if (ctxvals) {
- int pos = 0;
-
- while (*ctxvals) {
- int cnt = *ctxvals++;
-
- while (cnt--)
- INSTANCE_WR(ctx, pos++, *ctxvals);
- ctxvals++;
- }
- } else {
- /* This is complete crack, it accidently used to make at
- * least some G8x cards work partially somehow, though there's
- * no good reason why - and it stopped working as the rest
- * of the code got off the drugs..
- */
- ret = engine->graph.load_context(chan);
- if (ret) {
- DRM_ERROR("Error hacking up context: %d\n", ret);
- return ret;
- }
- }
-
- INSTANCE_WR(ctx, 0x00000/4, chan->ramin->instance >> 12);
- if ((dev_priv->chipset & 0xf0) == 0xa0)
- INSTANCE_WR(ctx, 0x00004/4, 0x00000002);
- else
- INSTANCE_WR(ctx, 0x0011c/4, 0x00000002);
-
- return 0;
-}
-
-void
-nv50_graph_destroy_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i, hdr;
-
- DRM_DEBUG("ch%d\n", chan->id);
-
- hdr = IS_G80 ? 0x200 : 0x20;
- for (i=hdr; i<hdr+24; i+=4)
- INSTANCE_WR(chan->ramin->gpuobj, i/4, 0);
-
- nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx);
-}
-
-static int
-nv50_graph_transfer_context(struct drm_device *dev, uint32_t inst, int save)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t old_cp, tv = 20000;
- int i;
-
- DRM_DEBUG("inst=0x%08x, save=%d\n", inst, save);
-
- old_cp = NV_READ(NV20_PGRAPH_CHANNEL_CTX_POINTER);
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
- NV_WRITE(0x400824, NV_READ(0x400824) |
- (save ? NV40_PGRAPH_CTXCTL_0310_XFER_SAVE :
- NV40_PGRAPH_CTXCTL_0310_XFER_LOAD));
- NV_WRITE(NV40_PGRAPH_CTXCTL_0304, NV40_PGRAPH_CTXCTL_0304_XFER_CTX);
-
- for (i = 0; i < tv; i++) {
- if (NV_READ(NV40_PGRAPH_CTXCTL_030C) == 0)
- break;
- }
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, old_cp);
-
- if (i == tv) {
- DRM_ERROR("failed: inst=0x%08x save=%d\n", inst, save);
- DRM_ERROR("0x40030C = 0x%08x\n",
- NV_READ(NV40_PGRAPH_CTXCTL_030C));
- return -EBUSY;
- }
-
- return 0;
-}
-
-int
-nv50_graph_load_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t inst = chan->ramin->instance >> 12;
- int ret; (void)ret;
-
- DRM_DEBUG("ch%d\n", chan->id);
-
-#if 0
- if ((ret = nv50_graph_transfer_context(dev, inst, 0)))
- return ret;
-#endif
-
- NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
- NV_WRITE(0x400320, 4);
- NV_WRITE(NV40_PGRAPH_CTXCTL_CUR, inst | (1<<31));
-
- return 0;
-}
-
-int
-nv50_graph_save_context(struct nouveau_channel *chan)
-{
- struct drm_device *dev = chan->dev;
- uint32_t inst = chan->ramin->instance >> 12;
-
- DRM_DEBUG("ch%d\n", chan->id);
-
- return nv50_graph_transfer_context(dev, inst, 1);
-}
+++ /dev/null
-#ifndef __NV50_GRCTX_H__
-#define __NV50_GRCTX_H__
-
-static uint32_t nv50_ctxprog[] = {
- 0x0070008e, 0x0070009c, 0x00200020, 0x00600008, 0x0050004c, 0x00400e89,
- 0x00200000, 0x00600007, 0x00300000, 0x00c000ff, 0x00200000, 0x008000ff,
- 0x00700009, 0x0041874d, 0x00401e44, 0x00401e05, 0x00401e0d, 0x00416306,
- 0x00600005, 0x004015c5, 0x00600011, 0x00401c0b, 0x0090ffff, 0x0091ffff,
- 0x00200020, 0x00600008, 0x0050004c, 0x00600009, 0x00416345, 0x00417e4d,
- 0x0070009d, 0x004022cf, 0x0070009f, 0x0050009f, 0x00401fc0, 0x00200080,
- 0x00600008, 0x00401f4f, 0x00401fc0, 0x004025cc, 0x00700081, 0x00200000,
- 0x00600006, 0x00700000, 0x00111bfc, 0x00700083, 0x00300000, 0x00215900,
- 0x00600007, 0x00c00b01, 0x0020001c, 0x00800001, 0x005000cb, 0x00c000ff,
- 0x00700080, 0x00700083, 0x00200047, 0x00600006, 0x0011020a, 0x002005c0,
- 0x00600007, 0x00300000, 0x00c000ff, 0x00c800ff, 0x00416e07, 0x00202627,
- 0x008000ff, 0x0040458c, 0x005000cb, 0x00a0023f, 0x00200040, 0x00600006,
- 0x0070000f, 0x00170202, 0x0011020a, 0x00200032, 0x0010020d, 0x001b0242,
- 0x00120302, 0x00140402, 0x00180500, 0x00130509, 0x00150550, 0x00110605,
- 0x001e0607, 0x00110700, 0x00110900, 0x00110902, 0x00110a00, 0x00160b02,
- 0x00110b28, 0x00140b2b, 0x00110c01, 0x00111400, 0x00111405, 0x00111407,
- 0x00111409, 0x0011140b, 0x002000ea, 0x00101500, 0x00406d0f, 0x00406d4b,
- 0x00213700, 0x00600007, 0x00200440, 0x008800ff, 0x0070008f, 0x00406d8c,
- 0x005000cb, 0x00000000, 0x001118f8, 0x0020002b, 0x00101a05, 0x00131c00,
- 0x00111c04, 0x00141c20, 0x00111c25, 0x00131c40, 0x00111c44, 0x00141c60,
- 0x00111c65, 0x00131c80, 0x00111c84, 0x00141ca0, 0x00111ca5, 0x00131cc0,
- 0x00111cc4, 0x00141ce0, 0x00111ce5, 0x00131d00, 0x00111d04, 0x00141d20,
- 0x00111d25, 0x00131d40, 0x00111d44, 0x00141d60, 0x00111d65, 0x00131f00,
- 0x00191f40, 0x0040a7e0, 0x00200217, 0x00600006, 0x00200044, 0x00102080,
- 0x001120c6, 0x001520c9, 0x001920d0, 0x00122100, 0x00122103, 0x00162200,
- 0x00409f0f, 0x00409f4b, 0x00213700, 0x00600007, 0x00200440, 0x008800ff,
- 0x0070008f, 0x00409f8c, 0x005000cb, 0x00000000, 0x00122207, 0x00112280,
- 0x00112300, 0x00112302, 0x00122380, 0x0011238b, 0x00192394, 0x0040b9e1,
- 0x00200285, 0x00600006, 0x00200044, 0x00102480, 0x001124c6, 0x001524c9,
- 0x001924d0, 0x00122500, 0x00122503, 0x00162600, 0x00122607, 0x00112680,
- 0x00112700, 0x00112702, 0x00122780, 0x0011278b, 0x00192794, 0x0040d5e2,
- 0x002002f3, 0x00600006, 0x00200044, 0x00102880, 0x001128c6, 0x001528c9,
- 0x0040c90f, 0x0040c94b, 0x00213700, 0x00600007, 0x00200440, 0x008800ff,
- 0x0070008f, 0x0040c98c, 0x005000cb, 0x00000000, 0x001928d0, 0x00122900,
- 0x00122903, 0x00162a00, 0x00122a07, 0x00112a80, 0x00112b00, 0x00112b02,
- 0x00122b80, 0x00112b8b, 0x00192b94, 0x0040e7e3, 0x00200361, 0x00600006,
- 0x00200044, 0x00102c80, 0x00112cc6, 0x00152cc9, 0x00192cd0, 0x00122d00,
- 0x00122d03, 0x00162e00, 0x00122e07, 0x00112e80, 0x00112f00, 0x00112f02,
- 0x00122f80, 0x00112f8b, 0x00192f94, 0x004103e4, 0x002003cf, 0x00600006,
- 0x00200044, 0x00103080, 0x0040f50f, 0x0040f54b, 0x00213700, 0x00600007,
- 0x00200440, 0x008800ff, 0x0070008f, 0x0040f58c, 0x005000cb, 0x00000000,
- 0x001130c6, 0x001530c9, 0x001930d0, 0x00123100, 0x00123103, 0x00163200,
- 0x00123207, 0x00113280, 0x00113300, 0x00113302, 0x00123380, 0x0011338b,
- 0x00193394, 0x004115e5, 0x0020043d, 0x00600006, 0x00200044, 0x00103480,
- 0x001134c6, 0x001534c9, 0x001934d0, 0x00123500, 0x00123503, 0x00163600,
- 0x00123607, 0x00113680, 0x00113700, 0x00113702, 0x00123780, 0x0011378b,
- 0x00193794, 0x004131e6, 0x002004ab, 0x00600006, 0x00200044, 0x00103880,
- 0x0041230f, 0x0041234b, 0x00213700, 0x00600007, 0x00200440, 0x008800ff,
- 0x0070008f, 0x0041238c, 0x005000cb, 0x00000000, 0x001138c6, 0x001538c9,
- 0x001938d0, 0x00123900, 0x00123903, 0x00163a00, 0x00123a07, 0x00113a80,
- 0x00113b00, 0x00113b02, 0x00123b80, 0x00113b8b, 0x00193b94, 0x004143e7,
- 0x00200519, 0x00600006, 0x00200044, 0x00103c80, 0x00113cc6, 0x00153cc9,
- 0x00193cd0, 0x00123d00, 0x00123d03, 0x00163e00, 0x00123e07, 0x00113e80,
- 0x00113f00, 0x00113f02, 0x00123f80, 0x00113f8b, 0x00193f94, 0x00000000,
- 0x00414a0f, 0x005000cb, 0x00213700, 0x00600007, 0x00200440, 0x008800ff,
- 0x005000cb, 0x00414d87, 0x0060000a, 0x00000000, 0x00415c00, 0x007000a0,
- 0x00700080, 0x002005c0, 0x00600007, 0x00200004, 0x00c000ff, 0x008000ff,
- 0x005000cb, 0x00700000, 0x00200000, 0x00600006, 0x00111bfe, 0x00417e4d,
- 0x00700000, 0x00200000, 0x00600006, 0x00111bfe, 0x00700080, 0x0070001d,
- 0x0040114d, 0x00700081, 0x00600004, 0x0050004a, 0x00416888, 0x0060000b,
- 0x00200000, 0x00600006, 0x00700000, 0x00417e0b, 0x00111bfd, 0x0040374d,
- 0x00202627, 0x008000fd, 0x005000cb, 0x00c00002, 0x002005c0, 0x00600007,
- 0x0020015f, 0x00800002, 0x005000cb, 0x00c01802, 0x002024c8, 0x00800002,
- 0x005000cb, 0x0040434d, 0x0060000b, 0x00417c4d, 0x00700001, 0x00700003,
- 0x00418206, 0x00418305, 0x0060000d, 0x00700005, 0x0070000d, 0x00700006,
- 0x0070000b, 0x0070000e, 0x0070001c, 0x0060000c, ~0
-};
-
-static uint32_t nv50_ctxvals[] = {
- 0x0043, 0x00000000,
- 0x0001, 0x00000030,
- 0x0004, 0x00000000,
- 0x0001, 0xff400040,
- 0x0001, 0xfff00080,
- 0x0001, 0xfff70090,
- 0x0001, 0xffe806a8,
- 0x0001, 0x00000002,
- 0x0028, 0x00000000,
- 0x0001, 0x00000003,
- 0x0001, 0x00001000,
- 0x000e, 0x00000000,
- 0x0001, 0x0000fe0c,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x000a, 0x00000000,
- 0x0001, 0x0001fd87,
- 0x0004, 0x00000000,
- 0x0001, 0x00001018,
- 0x0001, 0x000000ff,
- 0x000d, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x0001005f,
- 0x0001, 0x00000000,
- 0x0001, 0x00000600,
- 0x0001, 0x00000006,
- 0x0004, 0x00000000,
- 0x0001, 0x000000ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000400,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00300080,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0005, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0001, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x00000000,
- 0x0003, 0x00000001,
- 0x0001, 0x00000004,
- 0x0003, 0x00000001,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0001, 0x00000007,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x0000000a,
- 0x0003, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000100,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0001, 0x00000004,
- 0x0005, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000003,
- 0x0006, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000008,
- 0x0001, 0x00000014,
- 0x0001, 0x00000026,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000002,
- 0x0001, 0x00000003,
- 0x0001, 0x00000004,
- 0x0001, 0x00000005,
- 0x0001, 0x00000006,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0001, 0x000000cf,
- 0x000a, 0x00000000,
- 0x0001, 0x00000080,
- 0x0002, 0x00000004,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000012,
- 0x0001, 0x00000010,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000002,
- 0x0001, 0x00000004,
- 0x0002, 0x00000000,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000014,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00001000,
- 0x0001, 0x00000000,
- 0x0005, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000200,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0002, 0x000000cf,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000f80,
- 0x0011, 0x00000000,
- 0x0001, 0x007f0080,
- 0x000e, 0x00000000,
- 0x0001, 0x007f0080,
- 0x0008, 0x00000000,
- 0x0001, 0x1b74f820,
- 0x0001, 0x89058001,
- 0x0002, 0x00000000,
- 0x0001, 0x027c10fa,
- 0x0001, 0x000000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x1b74f820,
- 0x0001, 0x89058001,
- 0x0002, 0x00000000,
- 0x0001, 0x027c10fa,
- 0x0001, 0x000000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x1b74f820,
- 0x0001, 0x89058001,
- 0x0002, 0x00000000,
- 0x0001, 0x027c10fa,
- 0x0001, 0x000000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x1b74f820,
- 0x0001, 0x89058001,
- 0x0002, 0x00000000,
- 0x0001, 0x027c10fa,
- 0x0001, 0x000000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x1b74f820,
- 0x0001, 0x89058001,
- 0x0002, 0x00000000,
- 0x0001, 0x027c10fa,
- 0x0001, 0x000000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x1b74f820,
- 0x0001, 0x89058001,
- 0x0002, 0x00000000,
- 0x0001, 0x027c10fa,
- 0x0001, 0x000000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x00010040,
- 0x0001, 0x00000000,
- 0x0001, 0x00000022,
- 0x0002, 0x00000000,
- 0x0001, 0x00010040,
- 0x0001, 0x00000022,
- 0x0005, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00080000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x00000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00080000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x00000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00007070,
- 0x0002, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0001, 0x00008000,
- 0x0001, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000040,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x00007fff,
- 0x0002, 0x00000000,
- 0x0001, 0x000003ff,
- 0x0002, 0x00000003,
- 0x0001, 0x000001ff,
- 0x0001, 0x0000001f,
- 0x0002, 0x0000000f,
- 0x0001, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00080000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x00000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00080000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x00000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00007070,
- 0x0002, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0001, 0x00008000,
- 0x0001, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000040,
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- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x00007fff,
- 0x0002, 0x00000000,
- 0x0001, 0x000003ff,
- 0x0002, 0x00000003,
- 0x0001, 0x000001ff,
- 0x0001, 0x0000001f,
- 0x0002, 0x0000000f,
- 0x0001, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00080000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x00000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00080000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
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- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x00000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00007070,
- 0x0002, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0001, 0x00008000,
- 0x0001, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000040,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x00007fff,
- 0x0002, 0x00000000,
- 0x0001, 0x000003ff,
- 0x0002, 0x00000003,
- 0x0001, 0x000001ff,
- 0x0001, 0x0000001f,
- 0x0002, 0x0000000f,
- 0x0001, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
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- 0x0001, 0x00080000,
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- 0x0001, 0x00000000,
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- 0x0001, 0x00160000,
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- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
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- 0x0001, 0x000000bf,
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- 0x0001, 0x00000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00007070,
- 0x0002, 0x00000000,
- 0x0001, 0x0003ffff,
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- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0001, 0x00008000,
- 0x0001, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000040,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x00007fff,
- 0x0002, 0x00000000,
- 0x0001, 0x000003ff,
- 0x0002, 0x00000003,
- 0x0001, 0x000001ff,
- 0x0001, 0x0000001f,
- 0x0002, 0x0000000f,
- 0x0001, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00080000,
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- 0x0001, 0x000000bf,
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- 0x0001, 0x0003ffff,
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- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0001, 0x00008000,
- 0x0001, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000040,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
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- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
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- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
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- 0x0001, 0x00000003,
- 0x0001, 0x00008000,
- 0x0001, 0x00000000,
- 0x0001, 0x00039e00,
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- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0001, 0x00008000,
- 0x0001, 0x00000000,
- 0x0001, 0x00039e00,
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- 0x0001, 0x00000040,
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- 0x0001, 0x00141210,
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- 0x0001, 0x00000001,
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- 0x0001, 0x00008000,
- 0x0001, 0x00000000,
- 0x0001, 0x00039e00,
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- 0x0018, 0x00000000,
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- 0x0014, 0x00000000,
- 0x0004, 0x00000004,
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- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
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- 0x0001, 0x00000001,
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- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
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- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
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- 0x0001, 0x00000001,
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- 0x0001, 0x00003e60,
- 0x000f, 0x00000000,
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- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
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- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
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- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x000f, 0x00000000,
- 0x0001, 0x00000003,
- 0x001f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0008, 0x00000000,
- 0x0008, 0x00000080,
- 0x0008, 0x80007004,
- 0x0008, 0x04000400,
- 0x0008, 0x00001000,
- 0x0010, 0x00000000,
- 0x0008, 0x00000001,
- 0x0010, 0x00000000,
- 0x0010, 0x00001000,
- 0x0008, 0x00000001,
- 0x0008, 0x00000000,
- 0x0008, 0x00000004,
- 0x0008, 0x00000002,
- 0x0058, 0x00000000,
- 0x0008, 0x00000080,
- 0x0008, 0x80007004,
- 0x0008, 0x04000400,
- 0x0008, 0x00001000,
- 0x0010, 0x00000000,
- 0x0008, 0x00000001,
- 0x0010, 0x00000000,
- 0x0010, 0x00001000,
- 0x0008, 0x00000001,
- 0x0008, 0x00000000,
- 0x0008, 0x00000004,
- 0x0008, 0x00000002,
- 0x0050, 0x00000000,
- 0x0008, 0x08100c12,
- 0x0030, 0x00000000,
- 0x0020, 0x0000ffff,
- 0x0008, 0x00000001,
- 0x0010, 0x00010001,
- 0x0008, 0x00000001,
- 0x0008, 0x00000000,
- 0x0008, 0x0001fe21,
- 0x0028, 0x00000000,
- 0x0008, 0x08100c12,
- 0x0008, 0x00000004,
- 0x0008, 0x00000000,
- 0x0008, 0x00000002,
- 0x0008, 0x00000011,
- 0x0040, 0x00000000,
- 0x0008, 0x0fac6881,
- 0x0020, 0x00000000,
- 0x0008, 0x00000004,
- 0x0048, 0x00000000,
- 0x0008, 0x00000002,
- 0x0010, 0x00000001,
- 0x0008, 0x00000002,
- 0x0018, 0x00000001,
- 0x0008, 0x00000000,
- 0x0008, 0x00000004,
- 0x1d00, 0x00000000,
- 0x0008, 0x00000011,
- 0x0008, 0x00000000,
- 0x0008, 0x00000001,
- 0x0000
-};
-
-static uint32_t nv84_ctxprog[] = {
- 0x0070008e, 0x0070009c, 0x00200020, 0x00600008, 0x0050004c, 0x00400e89,
- 0x00200000, 0x00600007, 0x00300000, 0x00c000ff, 0x00200000, 0x008000ff,
- 0x00700009, 0x0041634d, 0x00402944, 0x00402905, 0x0040290d, 0x00413e06,
- 0x00600005, 0x004015c5, 0x00600011, 0x0040270b, 0x004021c5, 0x00700000,
- 0x00700081, 0x00600004, 0x0050004a, 0x00216f40, 0x00600007, 0x00c02801,
- 0x0020002e, 0x00800001, 0x005000cb, 0x0090ffff, 0x0091ffff, 0x00200020,
- 0x00600008, 0x0050004c, 0x00600009, 0x00413e45, 0x0041594d, 0x0070009d,
- 0x00402dcf, 0x0070009f, 0x0050009f, 0x00402ac0, 0x00200200, 0x00600008,
- 0x00402a4f, 0x00402ac0, 0x004030cc, 0x00700081, 0x00200000, 0x00600006,
- 0x00700000, 0x00111bfc, 0x00700083, 0x00300000, 0x00216f40, 0x00600007,
- 0x00c00b01, 0x0020001e, 0x00800001, 0x005000cb, 0x00c000ff, 0x00700080,
- 0x00700083, 0x00200047, 0x00600006, 0x0011020a, 0x00200480, 0x00600007,
- 0x00300000, 0x00c000ff, 0x00c800ff, 0x00414907, 0x00202916, 0x008000ff,
- 0x0040508c, 0x005000cb, 0x00a0023f, 0x00200040, 0x00600006, 0x0070000f,
- 0x00170202, 0x0011020a, 0x00200032, 0x0010020d, 0x001c0242, 0x00120302,
- 0x00140402, 0x00180500, 0x00130509, 0x00150550, 0x00110605, 0x0020000f,
- 0x00100607, 0x00110700, 0x00110900, 0x00120902, 0x00110a00, 0x00160b02,
- 0x00120b28, 0x00140b2b, 0x00110c01, 0x00111400, 0x00111405, 0x00111407,
- 0x00111409, 0x0011140b, 0x002000cb, 0x00101500, 0x0040790f, 0x0040794b,
- 0x00214d40, 0x00600007, 0x0020043e, 0x008800ff, 0x0070008f, 0x0040798c,
- 0x005000cb, 0x00000000, 0x0020002b, 0x00101a05, 0x00131c00, 0x00121c04,
- 0x00141c20, 0x00111c25, 0x00131c40, 0x00121c44, 0x00141c60, 0x00111c65,
- 0x00131c80, 0x00121c84, 0x00141ca0, 0x00111ca5, 0x00131cc0, 0x00121cc4,
- 0x00141ce0, 0x00111ce5, 0x00131f00, 0x00191f40, 0x0040a1e0, 0x002001ed,
- 0x00600006, 0x00200044, 0x00102080, 0x001120c6, 0x001520c9, 0x001920d0,
- 0x00122100, 0x00122103, 0x00162200, 0x00122207, 0x00112280, 0x00112300,
- 0x00112302, 0x00122380, 0x0011238b, 0x00112394, 0x0011239c, 0x0040bee1,
- 0x00200254, 0x00600006, 0x00200044, 0x00102480, 0x0040af0f, 0x0040af4b,
- 0x00214d40, 0x00600007, 0x0020043e, 0x008800ff, 0x0070008f, 0x0040af8c,
- 0x005000cb, 0x00000000, 0x001124c6, 0x001524c9, 0x001924d0, 0x00122500,
- 0x00122503, 0x00162600, 0x00122607, 0x00112680, 0x00112700, 0x00112702,
- 0x00122780, 0x0011278b, 0x00112794, 0x0011279c, 0x0040d1e2, 0x002002bb,
- 0x00600006, 0x00200044, 0x00102880, 0x001128c6, 0x001528c9, 0x001928d0,
- 0x00122900, 0x00122903, 0x00162a00, 0x00122a07, 0x00112a80, 0x00112b00,
- 0x00112b02, 0x00122b80, 0x00112b8b, 0x00112b94, 0x00112b9c, 0x0040eee3,
- 0x00200322, 0x00600006, 0x00200044, 0x00102c80, 0x0040df0f, 0x0040df4b,
- 0x00214d40, 0x00600007, 0x0020043e, 0x008800ff, 0x0070008f, 0x0040df8c,
- 0x005000cb, 0x00000000, 0x00112cc6, 0x00152cc9, 0x00192cd0, 0x00122d00,
- 0x00122d03, 0x00162e00, 0x00122e07, 0x00112e80, 0x00112f00, 0x00112f02,
- 0x00122f80, 0x00112f8b, 0x00112f94, 0x00112f9c, 0x004101e4, 0x00200389,
- 0x00600006, 0x00200044, 0x00103080, 0x001130c6, 0x001530c9, 0x001930d0,
- 0x00123100, 0x00123103, 0x00163200, 0x00123207, 0x00113280, 0x00113300,
- 0x00113302, 0x00123380, 0x0011338b, 0x00113394, 0x0011339c, 0x00411ee5,
- 0x002003f0, 0x00600006, 0x00200044, 0x00103480, 0x00410f0f, 0x00410f4b,
- 0x00214d40, 0x00600007, 0x0020043e, 0x008800ff, 0x0070008f, 0x00410f8c,
- 0x005000cb, 0x00000000, 0x001134c6, 0x001534c9, 0x001934d0, 0x00123500,
- 0x00123503, 0x00163600, 0x00123607, 0x00113680, 0x00113700, 0x00113702,
- 0x00123780, 0x0011378b, 0x00113794, 0x0011379c, 0x00000000, 0x0041250f,
- 0x005000cb, 0x00214d40, 0x00600007, 0x0020043e, 0x008800ff, 0x005000cb,
- 0x00412887, 0x0060000a, 0x00000000, 0x00413700, 0x007000a0, 0x00700080,
- 0x00200480, 0x00600007, 0x00200004, 0x00c000ff, 0x008000ff, 0x005000cb,
- 0x00700000, 0x00200000, 0x00600006, 0x00111bfe, 0x0041594d, 0x00700000,
- 0x00200000, 0x00600006, 0x00111bfe, 0x00700080, 0x0070001d, 0x0040114d,
- 0x00700081, 0x00600004, 0x0050004a, 0x00414388, 0x0060000b, 0x00200000,
- 0x00600006, 0x00700000, 0x0041590b, 0x00111bfd, 0x0040424d, 0x00202916,
- 0x008000fd, 0x005000cb, 0x00c00002, 0x00200480, 0x00600007, 0x00200160,
- 0x00800002, 0x005000cb, 0x00c01802, 0x002027b6, 0x00800002, 0x005000cb,
- 0x00404e4d, 0x0060000b, 0x0041574d, 0x00700001, 0x005000cf, 0x00700003,
- 0x00415e06, 0x00415f05, 0x0060000d, 0x00700005, 0x0070000d, 0x00700006,
- 0x0070000b, 0x0070000e, 0x0070001c, 0x0060000c, ~0
-};
-
-static uint32_t nv84_ctxvals[] = {
- 0x0043, 0x00000000,
- 0x0001, 0x00000030,
- 0x0008, 0x00000000,
- 0x0001, 0x00000002,
- 0x0028, 0x00000000,
- 0x0001, 0x00000003,
- 0x0001, 0x00001000,
- 0x000f, 0x00000000,
- 0x0001, 0x0000fe0c,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x000a, 0x00000000,
- 0x0001, 0x00000187,
- 0x0004, 0x00000000,
- 0x0001, 0x00001018,
- 0x0001, 0x000000ff,
- 0x000e, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x044d00df,
- 0x0001, 0x00000000,
- 0x0001, 0x00000600,
- 0x0005, 0x00000000,
- 0x0001, 0x01000000,
- 0x0001, 0x000000ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000400,
- 0x0005, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x000e0080,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0005, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0001, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x00000000,
- 0x0003, 0x00000001,
- 0x0001, 0x00000004,
- 0x0003, 0x00000001,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0001, 0x00000007,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000000,
- 0x0001, 0x00000008,
- 0x0001, 0x00000014,
- 0x0001, 0x00000000,
- 0x0001, 0x00000029,
- 0x0001, 0x00000027,
- 0x0001, 0x00000026,
- 0x0001, 0x00000008,
- 0x0001, 0x00000004,
- 0x0001, 0x00000027,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000002,
- 0x0001, 0x00000003,
- 0x0001, 0x00000004,
- 0x0001, 0x00000005,
- 0x0001, 0x00000006,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0001, 0x000000cf,
- 0x000b, 0x00000000,
- 0x0001, 0x00000080,
- 0x0002, 0x00000004,
- 0x0001, 0x00000003,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000012,
- 0x0001, 0x00000010,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000002,
- 0x0001, 0x00000004,
- 0x0002, 0x00000000,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0009, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000014,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00001000,
- 0x0001, 0x00000e00,
- 0x0001, 0x00001000,
- 0x0001, 0x00001e00,
- 0x0001, 0x00000000,
- 0x0005, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000200,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0002, 0x000000cf,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000f80,
- 0x0011, 0x00000000,
- 0x0001, 0x007f0080,
- 0x000e, 0x00000000,
- 0x0001, 0x007f0080,
- 0x0008, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x00010040,
- 0x0001, 0x00000000,
- 0x0001, 0x00000022,
- 0x0002, 0x00000000,
- 0x0001, 0x00010040,
- 0x0001, 0x00000022,
- 0x0005, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05100202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x0003, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05100202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x0003, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05100202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x0003, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x00880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
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- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x0017, 0x00000000,
- 0x0001, 0x00000003,
- 0x0027, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0008, 0x00000000,
- 0x0001, 0x00000080,
- 0x0006, 0x00000000,
- 0x0001, 0x00000080,
- 0x0001, 0x80007004,
- 0x0006, 0x00000000,
- 0x0001, 0x80007004,
- 0x0001, 0x04000400,
- 0x0006, 0x00000000,
- 0x0001, 0x04000400,
- 0x0001, 0x00001000,
- 0x0006, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0001, 0x00000001,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0001, 0x00000001,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000002,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0058, 0x00000000,
- 0x0001, 0x00000080,
- 0x0006, 0x00000000,
- 0x0001, 0x00000080,
- 0x0001, 0x80007004,
- 0x0006, 0x00000000,
- 0x0001, 0x80007004,
- 0x0001, 0x04000400,
- 0x0006, 0x00000000,
- 0x0001, 0x04000400,
- 0x0001, 0x00001000,
- 0x0006, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0001, 0x00000001,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0001, 0x00000001,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000002,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0050, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0006, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0030, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0001, 0x00000001,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00010001,
- 0x0006, 0x00000000,
- 0x0002, 0x00010001,
- 0x0006, 0x00000000,
- 0x0001, 0x00010001,
- 0x0001, 0x00000001,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x0006, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x0028, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0006, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000004,
- 0x0008, 0x00000000,
- 0x0001, 0x00000002,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000011,
- 0x0006, 0x00000000,
- 0x0001, 0x00000011,
- 0x0040, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0006, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0020, 0x00000000,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000004,
- 0x0048, 0x00000000,
- 0x0001, 0x00000002,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000002,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000004,
- 0x1d10, 0x00000000,
- 0x0001, 0x00000011,
- 0x0006, 0x00000000,
- 0x0001, 0x00000011,
- 0x0008, 0x00000000,
- 0x0001, 0x00000001,
- 0x0006, 0x00000000,
- 0x0001, 0x00000001,
- 0x0000
-};
-
-static uint32_t nv86_ctxprog[] = {
- 0x0070008e, 0x0070009c, 0x00200020, 0x00600008, 0x0050004c, 0x00400e89,
- 0x00200000, 0x00600007, 0x00300000, 0x00c000ff, 0x00200000, 0x008000ff,
- 0x00700009, 0x0040dd4d, 0x00402944, 0x00402905, 0x0040290d, 0x0040b906,
- 0x00600005, 0x004015c5, 0x00600011, 0x0040270b, 0x004021c5, 0x00700000,
- 0x00700081, 0x00600004, 0x0050004a, 0x00216d80, 0x00600007, 0x00c02801,
- 0x0020002e, 0x00800001, 0x005000cb, 0x0090ffff, 0x0091ffff, 0x00200020,
- 0x00600008, 0x0050004c, 0x00600009, 0x0040b945, 0x0040d44d, 0x0070009d,
- 0x00402dcf, 0x0070009f, 0x0050009f, 0x00402ac0, 0x00200200, 0x00600008,
- 0x00402a4f, 0x00402ac0, 0x004030cc, 0x00700081, 0x00200000, 0x00600006,
- 0x00700000, 0x00111bfc, 0x00700083, 0x00300000, 0x00216d80, 0x00600007,
- 0x00c00b01, 0x0020001e, 0x00800001, 0x005000cb, 0x00c000ff, 0x00700080,
- 0x00700083, 0x00200047, 0x00600006, 0x0011020a, 0x00200280, 0x00600007,
- 0x00300000, 0x00c000ff, 0x00c800ff, 0x0040c407, 0x00202916, 0x008000ff,
- 0x0040508c, 0x005000cb, 0x00a0023f, 0x00200040, 0x00600006, 0x0070000f,
- 0x00170202, 0x0011020a, 0x00200032, 0x0010020d, 0x001c0242, 0x00120302,
- 0x00140402, 0x00180500, 0x00130509, 0x00150550, 0x00110605, 0x0020000f,
- 0x00100607, 0x00110700, 0x00110900, 0x00120902, 0x00110a00, 0x00160b02,
- 0x00120b28, 0x00140b2b, 0x00110c01, 0x00111400, 0x00111405, 0x00111407,
- 0x00111409, 0x0011140b, 0x002000cb, 0x00101500, 0x0040790f, 0x0040794b,
- 0x00214b40, 0x00600007, 0x00200442, 0x008800ff, 0x0070008f, 0x0040798c,
- 0x005000cb, 0x00000000, 0x0020002b, 0x00101a05, 0x00131c00, 0x00121c04,
- 0x00141c20, 0x00111c25, 0x00131c40, 0x00121c44, 0x00141c60, 0x00111c65,
- 0x00131f00, 0x00191f40, 0x004099e0, 0x002001d9, 0x00600006, 0x00200044,
- 0x00102080, 0x001120c6, 0x001520c9, 0x001920d0, 0x00122100, 0x00122103,
- 0x00162200, 0x00122207, 0x00112280, 0x00112300, 0x00112302, 0x00122380,
- 0x0011238b, 0x00112394, 0x0011239c, 0x00000000, 0x0040a00f, 0x005000cb,
- 0x00214b40, 0x00600007, 0x00200442, 0x008800ff, 0x005000cb, 0x0040a387,
- 0x0060000a, 0x00000000, 0x0040b200, 0x007000a0, 0x00700080, 0x00200280,
- 0x00600007, 0x00200004, 0x00c000ff, 0x008000ff, 0x005000cb, 0x00700000,
- 0x00200000, 0x00600006, 0x00111bfe, 0x0040d44d, 0x00700000, 0x00200000,
- 0x00600006, 0x00111bfe, 0x00700080, 0x0070001d, 0x0040114d, 0x00700081,
- 0x00600004, 0x0050004a, 0x0040be88, 0x0060000b, 0x00200000, 0x00600006,
- 0x00700000, 0x0040d40b, 0x00111bfd, 0x0040424d, 0x00202916, 0x008000fd,
- 0x005000cb, 0x00c00002, 0x00200280, 0x00600007, 0x00200160, 0x00800002,
- 0x005000cb, 0x00c01802, 0x002027b6, 0x00800002, 0x005000cb, 0x00404e4d,
- 0x0060000b, 0x0040d24d, 0x00700001, 0x00700003, 0x0040d806, 0x0040d905,
- 0x0060000d, 0x00700005, 0x0070000d, 0x00700006, 0x0070000b, 0x0070000e,
- 0x0060000c, ~0
-};
-
-static uint32_t nv86_ctxvals[] = {
- 0x0043, 0x00000000,
- 0x0001, 0x00000030,
- 0x0031, 0x00000000,
- 0x0001, 0x00000003,
- 0x0001, 0x00001000,
- 0x000f, 0x00000000,
- 0x0001, 0x0000fe0c,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x000a, 0x00000000,
- 0x0001, 0x00000187,
- 0x0004, 0x00000000,
- 0x0001, 0x00001018,
- 0x0001, 0x000000ff,
- 0x000e, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x044d00df,
- 0x0001, 0x00000000,
- 0x0001, 0x00000600,
- 0x0005, 0x00000000,
- 0x0001, 0x01000000,
- 0x0001, 0x000000ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000400,
- 0x0005, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000080,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0005, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0001, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x00000000,
- 0x0003, 0x00000001,
- 0x0001, 0x00000004,
- 0x0003, 0x00000001,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0001, 0x00000007,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000000,
- 0x0001, 0x00000008,
- 0x0001, 0x00000014,
- 0x0001, 0x00000000,
- 0x0001, 0x00000029,
- 0x0001, 0x00000027,
- 0x0001, 0x00000026,
- 0x0001, 0x00000008,
- 0x0001, 0x00000004,
- 0x0001, 0x00000027,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000002,
- 0x0001, 0x00000003,
- 0x0001, 0x00000004,
- 0x0001, 0x00000005,
- 0x0001, 0x00000006,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0001, 0x000000cf,
- 0x000b, 0x00000000,
- 0x0001, 0x00000080,
- 0x0002, 0x00000004,
- 0x0001, 0x00000003,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000012,
- 0x0001, 0x00000010,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000002,
- 0x0001, 0x00000004,
- 0x0002, 0x00000000,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0009, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000014,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00001000,
- 0x0001, 0x00000e00,
- 0x0001, 0x00001000,
- 0x0001, 0x00001e00,
- 0x0001, 0x00000000,
- 0x0005, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000200,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0002, 0x000000cf,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000f80,
- 0x0011, 0x00000000,
- 0x0001, 0x007f0080,
- 0x000e, 0x00000000,
- 0x0001, 0x007f0080,
- 0x0008, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x00010040,
- 0x0001, 0x00000000,
- 0x0001, 0x00000022,
- 0x0002, 0x00000000,
- 0x0001, 0x00010040,
- 0x0001, 0x00000022,
- 0x0005, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x008c0000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x008c0000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x004f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0014, 0x00000000,
- 0x0001, 0x0000000f,
- 0x0021, 0x00000000,
- 0x0001, 0x00000002,
- 0x0005, 0x00000000,
- 0x0001, 0x00000020,
- 0x0009, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x0067, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x0000001a,
- 0x0001, 0x00000000,
- 0x0001, 0x00000010,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00608080,
- 0x000e, 0x00000000,
- 0x0001, 0x00000001,
- 0x0018, 0x00000000,
- 0x0001, 0x00000004,
- 0x000e, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000400,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000300,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00001001,
- 0x0001, 0x00000080,
- 0x0006, 0x00000000,
- 0x0001, 0x00000015,
- 0x0001, 0x00001e00,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000008,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x000d, 0x00000000,
- 0x0001, 0x000007ff,
- 0x0039, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0015, 0x00000000,
- 0x0001, 0x0000000f,
- 0x0089, 0x00000000,
- 0x0001, 0x00000010,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x03020100,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x0007, 0x00000000,
- 0x0001, 0x00001e00,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0027, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x001f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x00cf, 0x00000000,
- 0x0001, 0x00000010,
- 0x000f, 0x00000000,
- 0x0001, 0x0000003f,
- 0x0037, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0067, 0x00000000,
- 0x0001, 0x00000011,
- 0x003f, 0x00000000,
- 0x0001, 0x0000000f,
- 0x003f, 0x00000000,
- 0x0001, 0x00000011,
- 0x0037, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x000f, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x00af, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
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- 0x000f, 0x00000000,
- 0x0001, 0x00000026,
- 0x001f, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0127, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0007, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0017, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x933d, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x000f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000f, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0017, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000027,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x1e0f, 0x00000000,
- 0x0001, 0x00000001,
- 0x00b7, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0067, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x001f, 0x00000000,
- 0x0001, 0x00000080,
- 0x000f, 0x00000000,
- 0x0001, 0x0000003f,
- 0x0057, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0047, 0x00000000,
- 0x0001, 0x00000004,
- 0x001f, 0x00000000,
- 0x0001, 0x00000004,
- 0x008f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00001001,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0107, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x0017, 0x00000000,
- 0x0001, 0x00000003,
- 0x0000
-};
-
-static uint32_t nv92_ctxprog[] = {
- 0x0070008E, 0x0070009C, 0x00200020, 0x00600008, 0x0050004C, 0x00400E89,
- 0x00200000, 0x00600007, 0x00300000, 0x00C000FF, 0x00200000, 0x008000FF,
- 0x00700009, 0x0041924D, 0x00402944, 0x00402905, 0x0040290D, 0x00416E06,
- 0x00600005, 0x004015C5, 0x00600011, 0x0040270B, 0x004021C5, 0x00700000,
- 0x00700081, 0x00600004, 0x0050004A, 0x00219600, 0x00600007, 0x00C02701,
- 0x0020002E, 0x00800001, 0x005000CB, 0x0090FFFF, 0x0091FFFF, 0x00200020,
- 0x00600008, 0x0050004C, 0x00600009, 0x00416E45, 0x0041894D, 0x0070009D,
- 0x00402DCF, 0x0070009F, 0x0050009F, 0x00402AC0, 0x00200080, 0x00600008,
- 0x00402A4F, 0x00402AC0, 0x004030CC, 0x00700081, 0x00200000, 0x00600006,
- 0x00700000, 0x00111BFC, 0x00700083, 0x00300000, 0x00219600, 0x00600007,
- 0x00C00A01, 0x0020001E, 0x00800001, 0x005000CB, 0x00C000FF, 0x00700080,
- 0x00700083, 0x00200047, 0x00600006, 0x0011020A, 0x00200540, 0x00600007,
- 0x00300000, 0x00C000FF, 0x00C800FF, 0x00417907, 0x00202DD2, 0x008000FF,
- 0x0040508C, 0x005000CB, 0x00A0023F, 0x00200040, 0x00600006, 0x0070000F,
- 0x00170202, 0x0011020A, 0x00200032, 0x0010020D, 0x001C0242, 0x00120302,
- 0x00140402, 0x00180500, 0x00130509, 0x00150550, 0x00110605, 0x0020000F,
- 0x00100607, 0x00110700, 0x00110900, 0x00120902, 0x00110A00, 0x00160B02,
- 0x00120B28, 0x00140B2B, 0x00110C01, 0x00111400, 0x00111405, 0x00111407,
- 0x00111409, 0x0011140B, 0x002000CB, 0x00101500, 0x0040790F, 0x0040794B,
- 0x00217400, 0x00600007, 0x0020043E, 0x008800FF, 0x0070008F, 0x0040798C,
- 0x005000CB, 0x00000000, 0x00141A05, 0x00131A0C, 0x00131C00, 0x00121C04,
- 0x00141C20, 0x00111C25, 0x00131C40, 0x00121C44, 0x00141C60, 0x00111C65,
- 0x00131C80, 0x00121C84, 0x00141CA0, 0x00111CA5, 0x00131CC0, 0x00121CC4,
- 0x00141CE0, 0x00111CE5, 0x00131F00, 0x00191F40, 0x0040A1E0, 0x002001C9,
- 0x00600006, 0x00200044, 0x00102080, 0x001120C6, 0x001520C9, 0x001920D0,
- 0x00122100, 0x00122103, 0x00162200, 0x00122207, 0x00112280, 0x00112300,
- 0x00112302, 0x00122380, 0x0011238B, 0x00112394, 0x0011239C, 0x0040BEE1,
- 0x00200230, 0x00600006, 0x00200044, 0x00102480, 0x0040AF0F, 0x0040AF4B,
- 0x00217400, 0x00600007, 0x0020043E, 0x008800FF, 0x0070008F, 0x0040AF8C,
- 0x005000CB, 0x00000000, 0x001124C6, 0x001524C9, 0x001924D0, 0x00122500,
- 0x00122503, 0x00162600, 0x00122607, 0x00112680, 0x00112700, 0x00112702,
- 0x00122780, 0x0011278B, 0x00112794, 0x0011279C, 0x0040D1E2, 0x00200297,
- 0x00600006, 0x00200044, 0x00102880, 0x001128C6, 0x001528C9, 0x001928D0,
- 0x00122900, 0x00122903, 0x00162A00, 0x00122A07, 0x00112A80, 0x00112B00,
- 0x00112B02, 0x00122B80, 0x00112B8B, 0x00112B94, 0x00112B9C, 0x0040EEE3,
- 0x002002FE, 0x00600006, 0x00200044, 0x00102C80, 0x0040DF0F, 0x0040DF4B,
- 0x00217400, 0x00600007, 0x0020043E, 0x008800FF, 0x0070008F, 0x0040DF8C,
- 0x005000CB, 0x00000000, 0x00112CC6, 0x00152CC9, 0x00192CD0, 0x00122D00,
- 0x00122D03, 0x00162E00, 0x00122E07, 0x00112E80, 0x00112F00, 0x00112F02,
- 0x00122F80, 0x00112F8B, 0x00112F94, 0x00112F9C, 0x004101E4, 0x00200365,
- 0x00600006, 0x00200044, 0x00103080, 0x001130C6, 0x001530C9, 0x001930D0,
- 0x00123100, 0x00123103, 0x00163200, 0x00123207, 0x00113280, 0x00113300,
- 0x00113302, 0x00123380, 0x0011338B, 0x00113394, 0x0011339C, 0x00411EE5,
- 0x002003CC, 0x00600006, 0x00200044, 0x00103480, 0x00410F0F, 0x00410F4B,
- 0x00217400, 0x00600007, 0x0020043E, 0x008800FF, 0x0070008F, 0x00410F8C,
- 0x005000CB, 0x00000000, 0x001134C6, 0x001534C9, 0x001934D0, 0x00123500,
- 0x00123503, 0x00163600, 0x00123607, 0x00113680, 0x00113700, 0x00113702,
- 0x00123780, 0x0011378B, 0x00113794, 0x0011379C, 0x004131E6, 0x00200433,
- 0x00600006, 0x00200044, 0x00103880, 0x001138C6, 0x001538C9, 0x001938D0,
- 0x00123900, 0x00123903, 0x00163A00, 0x00123A07, 0x00113A80, 0x00113B00,
- 0x00113B02, 0x00123B80, 0x00113B8B, 0x00113B94, 0x00113B9C, 0x00414EE7,
- 0x0020049A, 0x00600006, 0x00200044, 0x00103C80, 0x00413F0F, 0x00413F4B,
- 0x00217400, 0x00600007, 0x0020043E, 0x008800FF, 0x0070008F, 0x00413F8C,
- 0x005000CB, 0x00000000, 0x00113CC6, 0x00153CC9, 0x00193CD0, 0x00123D00,
- 0x00123D03, 0x00163E00, 0x00123E07, 0x00113E80, 0x00113F00, 0x00113F02,
- 0x00123F80, 0x00113F8B, 0x00113F94, 0x00113F9C, 0x00000000, 0x0041550F,
- 0x005000CB, 0x00217400, 0x00600007, 0x0020043E, 0x008800FF, 0x005000CB,
- 0x00415887, 0x0060000A, 0x00000000, 0x00416700, 0x007000A0, 0x00700080,
- 0x00200540, 0x00600007, 0x00200004, 0x00C000FF, 0x008000FF, 0x005000CB,
- 0x00700000, 0x00200000, 0x00600006, 0x00111BFE, 0x0041894D, 0x00700000,
- 0x00200000, 0x00600006, 0x00111BFE, 0x00700080, 0x0070001D, 0x0040114D,
- 0x00700081, 0x00600004, 0x0050004A, 0x00417388, 0x0060000B, 0x00200000,
- 0x00600006, 0x00700000, 0x0041890B, 0x00111BFD, 0x0040424D, 0x00202DD2,
- 0x008000FD, 0x005000CB, 0x00C00002, 0x00200540, 0x00600007, 0x00200160,
- 0x00800002, 0x005000CB, 0x00C01802, 0x00202C72, 0x00800002, 0x005000CB,
- 0x00404E4D, 0x0060000B, 0x0041874D, 0x00700001, 0x00700003, 0x00418D06,
- 0x00418E05, 0x0060000D, 0x00700005, 0x0070000D, 0x00700006, 0x0070000B,
- 0x0070000E, 0x0070001C, 0x0060000C, ~0
-};
-
-static uint32_t nv92_ctxvals[] = {
- 0x0043, 0x00000000,
- 0x0001, 0x00000030,
- 0x0031, 0x00000000,
- 0x0001, 0x00000003,
- 0x0001, 0x00001000,
- 0x000f, 0x00000000,
- 0x0001, 0x0000fe0c,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x000a, 0x00000000,
- 0x0001, 0x00000187,
- 0x0004, 0x00000000,
- 0x0001, 0x00001018,
- 0x0001, 0x000000ff,
- 0x000e, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x042500df,
- 0x0001, 0x00000000,
- 0x0001, 0x00000600,
- 0x0005, 0x00000000,
- 0x0001, 0x01000000,
- 0x0001, 0x000000ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000400,
- 0x0005, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000080,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0005, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0001, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x00000000,
- 0x0003, 0x00000001,
- 0x0001, 0x00000004,
- 0x0003, 0x00000001,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0001, 0x00000007,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000000,
- 0x0001, 0x00000008,
- 0x0001, 0x00000014,
- 0x0001, 0x00000000,
- 0x0001, 0x00000029,
- 0x0001, 0x00000027,
- 0x0001, 0x00000026,
- 0x0001, 0x00000008,
- 0x0001, 0x00000004,
- 0x0001, 0x00000027,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000002,
- 0x0001, 0x00000003,
- 0x0001, 0x00000004,
- 0x0001, 0x00000005,
- 0x0001, 0x00000006,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0001, 0x000000cf,
- 0x000b, 0x00000000,
- 0x0001, 0x00000080,
- 0x0002, 0x00000004,
- 0x0001, 0x00000003,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000012,
- 0x0001, 0x00000010,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000002,
- 0x0001, 0x00000004,
- 0x0002, 0x00000000,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0009, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000014,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00001000,
- 0x0001, 0x00000e00,
- 0x0001, 0x00001000,
- 0x0001, 0x00001e00,
- 0x0001, 0x00000000,
- 0x0005, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000200,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0002, 0x000000cf,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001f80,
- 0x0005, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x00390040,
- 0x0001, 0x00000000,
- 0x0001, 0x00000022,
- 0x0002, 0x00000000,
- 0x0001, 0x00390040,
- 0x0001, 0x00000022,
- 0x0005, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x118c0000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x118c0000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x0003, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x118c0000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x118c0000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x0003, 0x00000000,
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- 0x0004, 0x00000004,
- 0x0004, 0x00000000,
- 0x0004, 0x00608080,
- 0x0024, 0x00000000,
- 0x0004, 0x00000004,
- 0x0014, 0x00000000,
- 0x0004, 0x00000004,
- 0x0004, 0x00000000,
- 0x0004, 0x00000004,
- 0x0004, 0x00000000,
- 0x0004, 0x00000080,
- 0x0004, 0x00000000,
- 0x0004, 0x00000004,
- 0x010a, 0x00000000,
- 0x0001, 0x00000088,
- 0x0007, 0x00000000,
- 0x0001, 0x00000088,
- 0x0011, 0x00000000,
- 0x0004, 0x00000004,
- 0x0002, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000000,
- 0x0004, 0x00000080,
- 0x0004, 0x00000000,
- 0x0004, 0x00000004,
- 0x0004, 0x00000000,
- 0x0004, 0x03020100,
- 0x0004, 0x00000000,
- 0x0004, 0x00000003,
- 0x0004, 0x00000000,
- 0x0004, 0x00000004,
- 0x0024, 0x00000000,
- 0x0004, 0x00000004,
- 0x0004, 0x00000000,
- 0x0004, 0x00000003,
- 0x001c, 0x00000000,
- 0x0004, 0x00000004,
- 0x0042, 0x00000000,
- 0x0001, 0x00000026,
- 0x0017, 0x00000000,
- 0x0001, 0x3f800000,
- 0x001f, 0x00000000,
- 0x0001, 0x0000001a,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x0147, 0x00000000,
- 0x0001, 0x00000052,
- 0x000f, 0x00000000,
- 0x0001, 0x00000026,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x0000001a,
- 0x0017, 0x00000000,
- 0x0001, 0x00ffff00,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00080c14,
- 0x000f, 0x00000000,
- 0x0001, 0x000007ff,
- 0x02c5, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x4749, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000027,
- 0x000f, 0x00000000,
- 0x0001, 0x00000026,
- 0x001f, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0127, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0007, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0017, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x0281, 0x00000000,
- 0x0004, 0x00000004,
- 0x0004, 0x00000000,
- 0x0004, 0x00000003,
- 0x008c, 0x00000000,
- 0x0004, 0x0000000f,
- 0x005c, 0x00000000,
- 0x0004, 0x00000004,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0044, 0x00000000,
- 0x0004, 0x00000001,
- 0x001c, 0x00000000,
- 0x0004, 0x00000001,
- 0x002c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0064, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000002,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000002,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x00000011,
- 0x003c, 0x00000000,
- 0x0004, 0x0fac6881,
- 0x0014, 0x00000000,
- 0x0004, 0x00000004,
- 0x001c, 0x00000000,
- 0x0004, 0x00000011,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x000000cf,
- 0x0004, 0x00000000,
- 0x0004, 0x000000cf,
- 0x0004, 0x00000000,
- 0x0004, 0x000000cf,
- 0x0054, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000002,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000002,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000011,
- 0x003c, 0x00000000,
- 0x0004, 0x0fac6881,
- 0x0004, 0x00000000,
- 0x0004, 0x0000000f,
- 0x003c, 0x00000000,
- 0x0004, 0x001ffe67,
- 0x0014, 0x00000000,
- 0x0004, 0x00000011,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x001c, 0x00000000,
- 0x0004, 0x00000004,
- 0x002c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0024, 0x00000000,
- 0x0004, 0x00000011,
- 0x003c, 0x00000000,
- 0x0004, 0x0fac6881,
- 0x001c, 0x00000000,
- 0x0004, 0x00000011,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x000007ff,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0154, 0x00000000,
- 0x0004, 0x00000008,
- 0x0004, 0x00000000,
- 0x0004, 0x00000008,
- 0x0004, 0x00000000,
- 0x0004, 0x00000008,
- 0x0004, 0x00000000,
- 0x0004, 0x00000008,
- 0x0004, 0x00000000,
- 0x0004, 0x00000008,
- 0x0004, 0x00000000,
- 0x0004, 0x00000008,
- 0x0004, 0x00000000,
- 0x0004, 0x00000008,
- 0x0004, 0x00000000,
- 0x0004, 0x00000008,
- 0x0004, 0x00000000,
- 0x0004, 0x00000011,
- 0x003c, 0x00000000,
- 0x0004, 0x0fac6881,
- 0x0004, 0x00000000,
- 0x0004, 0x00000400,
- 0x0004, 0x00000000,
- 0x0004, 0x00000400,
- 0x0004, 0x00000000,
- 0x0004, 0x00000400,
- 0x0004, 0x00000000,
- 0x0004, 0x00000400,
- 0x0004, 0x00000000,
- 0x0004, 0x00000400,
- 0x0004, 0x00000000,
- 0x0004, 0x00000400,
- 0x0004, 0x00000000,
- 0x0004, 0x00000400,
- 0x0004, 0x00000000,
- 0x0004, 0x00000400,
- 0x0004, 0x00000000,
- 0x0004, 0x00000300,
- 0x0004, 0x00000000,
- 0x0004, 0x00000300,
- 0x0004, 0x00000000,
- 0x0004, 0x00000300,
- 0x0004, 0x00000000,
- 0x0004, 0x00000300,
- 0x0004, 0x00000000,
- 0x0004, 0x00000300,
- 0x0004, 0x00000000,
- 0x0004, 0x00000300,
- 0x0004, 0x00000000,
- 0x0004, 0x00000300,
- 0x0004, 0x00000000,
- 0x0004, 0x00000300,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x0000000f,
- 0x003c, 0x00000000,
- 0x0004, 0x00000020,
- 0x0004, 0x00000000,
- 0x0004, 0x00000011,
- 0x0004, 0x00000000,
- 0x0004, 0x00000100,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0014, 0x00000000,
- 0x0004, 0x00000040,
- 0x0004, 0x00000000,
- 0x0004, 0x00000100,
- 0x000c, 0x00000000,
- 0x0004, 0x00000003,
- 0x0024, 0x00000000,
- 0x0004, 0x001ffe67,
- 0x001c, 0x00000000,
- 0x0004, 0x00000002,
- 0x0004, 0x00000000,
- 0x0004, 0x0fac6881,
- 0x004c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0024, 0x00000000,
- 0x0004, 0x00000004,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000400,
- 0x0004, 0x00000000,
- 0x0004, 0x00000300,
- 0x0004, 0x00000000,
- 0x0004, 0x00001001,
- 0x001c, 0x00000000,
- 0x0004, 0x00000011,
- 0x003c, 0x00000000,
- 0x0004, 0x0fac6881,
- 0x0004, 0x00000000,
- 0x0004, 0x0000000f,
- 0x00bc, 0x00000000,
- 0x0004, 0x001ffe67,
- 0x001c, 0x00000000,
- 0x0004, 0x00000011,
- 0x0014, 0x00000000,
- 0x0004, 0x00000004,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x001c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0024, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x001c, 0x00000000,
- 0x0004, 0x2a712488,
- 0x000c, 0x00000000,
- 0x0004, 0x4085c000,
- 0x0004, 0x00000000,
- 0x0004, 0x00000040,
- 0x0004, 0x00000000,
- 0x0004, 0x00000100,
- 0x0004, 0x00000000,
- 0x0004, 0x00010100,
- 0x0004, 0x00000000,
- 0x0004, 0x02800000,
- 0x0094, 0x00000000,
- 0x0004, 0x04e3bfdf,
- 0x0004, 0x00000000,
- 0x0004, 0x04e3bfdf,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x00ffff00,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0014, 0x00000000,
- 0x0004, 0x00ffff00,
- 0x0044, 0x00000000,
- 0x0004, 0x00000001,
- 0x000c, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x30201000,
- 0x0004, 0x00000000,
- 0x0004, 0x70605040,
- 0x0004, 0x00000000,
- 0x0004, 0xb8a89888,
- 0x0004, 0x00000000,
- 0x0004, 0xf8e8d8c8,
- 0x000c, 0x00000000,
- 0x0004, 0x0000001a,
- 0x8958, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x000f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000f, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0017, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000027,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x1e0f, 0x00000000,
- 0x0001, 0x00000001,
- 0x00b7, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0067, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x001f, 0x00000000,
- 0x0001, 0x00000080,
- 0x000f, 0x00000000,
- 0x0001, 0x0000003f,
- 0x0057, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0047, 0x00000000,
- 0x0001, 0x00000004,
- 0x001f, 0x00000000,
- 0x0001, 0x00000004,
- 0x008f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00001001,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0107, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x0017, 0x00000000,
- 0x0001, 0x00000003,
- 0x0047, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0008, 0x00000000,
- 0x0008, 0x00000080,
- 0x0008, 0x80007004,
- 0x0008, 0x04000400,
- 0x0008, 0x00001000,
- 0x0010, 0x00000000,
- 0x0008, 0x00000001,
- 0x0010, 0x00000000,
- 0x0008, 0x00000001,
- 0x0008, 0x00000000,
- 0x0008, 0x00000004,
- 0x0008, 0x00000002,
- 0x0058, 0x00000000,
- 0x0008, 0x00000080,
- 0x0008, 0x80007004,
- 0x0008, 0x04000400,
- 0x0008, 0x00001000,
- 0x0010, 0x00000000,
- 0x0008, 0x00000001,
- 0x0010, 0x00000000,
- 0x0008, 0x00000001,
- 0x0008, 0x00000000,
- 0x0008, 0x00000004,
- 0x0008, 0x00000002,
- 0x0050, 0x00000000,
- 0x0008, 0x08100c12,
- 0x0030, 0x00000000,
- 0x0020, 0x0000ffff,
- 0x0008, 0x00000001,
- 0x0010, 0x00010001,
- 0x0008, 0x00000001,
- 0x0008, 0x00000000,
- 0x0008, 0x0001fe21,
- 0x0028, 0x00000000,
- 0x0008, 0x08100c12,
- 0x0008, 0x00000004,
- 0x0008, 0x00000000,
- 0x0008, 0x00000002,
- 0x0008, 0x00000011,
- 0x0040, 0x00000000,
- 0x0008, 0x0fac6881,
- 0x0020, 0x00000000,
- 0x0008, 0x00000004,
- 0x0048, 0x00000000,
- 0x0008, 0x00000002,
- 0x0010, 0x00000001,
- 0x0008, 0x00000002,
- 0x0018, 0x00000001,
- 0x0008, 0x00000000,
- 0x0008, 0x00000004,
- 0x1d10, 0x00000000,
- 0x0008, 0x00000011,
- 0x0008, 0x00000000,
- 0x0008, 0x00000001,
- 0x0000
-};
-
-static unsigned nv96_ctxvals[] = {
- 0x0043, 0x00000000,
- 0x0001, 0x00000030,
- 0x0008, 0x00000000,
- 0x0001, 0x00000002,
- 0x0028, 0x00000000,
- 0x0001, 0x00000003,
- 0x0001, 0x00001000,
- 0x000f, 0x00000000,
- 0x0001, 0x0000fe0c,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x000a, 0x00000000,
- 0x0001, 0x00000187,
- 0x0004, 0x00000000,
- 0x0001, 0x00001018,
- 0x0001, 0x000000ff,
- 0x000e, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x042500df,
- 0x0001, 0x00000000,
- 0x0001, 0x00000600,
- 0x0005, 0x00000000,
- 0x0001, 0x01000000,
- 0x0001, 0x000000ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000400,
- 0x0005, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000080,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0005, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0001, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x00000000,
- 0x0003, 0x00000001,
- 0x0001, 0x00000004,
- 0x0003, 0x00000001,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0001, 0x00000007,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000000,
- 0x0001, 0x00000008,
- 0x0001, 0x00000014,
- 0x0001, 0x00000000,
- 0x0001, 0x00000029,
- 0x0001, 0x00000027,
- 0x0001, 0x00000026,
- 0x0001, 0x00000008,
- 0x0001, 0x00000004,
- 0x0001, 0x00000027,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000002,
- 0x0001, 0x00000003,
- 0x0001, 0x00000004,
- 0x0001, 0x00000005,
- 0x0001, 0x00000006,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0001, 0x000000cf,
- 0x000b, 0x00000000,
- 0x0001, 0x00000080,
- 0x0002, 0x00000004,
- 0x0001, 0x00000003,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000012,
- 0x0001, 0x00000010,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000002,
- 0x0001, 0x00000004,
- 0x0002, 0x00000000,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0009, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000014,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00001000,
- 0x0001, 0x00000e00,
- 0x0001, 0x00001000,
- 0x0001, 0x00001e00,
- 0x0001, 0x00000000,
- 0x0005, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000200,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0002, 0x000000cf,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001f80,
- 0x0005, 0x00000000,
- 0x0001, 0x3b74f821,
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- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0127, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0007, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0017, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x62a1, 0x00000000,
- 0x0002, 0x00000004,
- 0x0006, 0x00000000,
- 0x0002, 0x00000003,
- 0x008e, 0x00000000,
- 0x0002, 0x0000000f,
- 0x005e, 0x00000000,
- 0x0002, 0x00000004,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0046, 0x00000000,
- 0x0002, 0x00000001,
- 0x001e, 0x00000000,
- 0x0002, 0x00000001,
- 0x002e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0066, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000002,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000002,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000011,
- 0x003e, 0x00000000,
- 0x0002, 0x0fac6881,
- 0x0016, 0x00000000,
- 0x0002, 0x00000004,
- 0x001e, 0x00000000,
- 0x0002, 0x00000011,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x000000cf,
- 0x0006, 0x00000000,
- 0x0002, 0x000000cf,
- 0x0006, 0x00000000,
- 0x0002, 0x000000cf,
- 0x0056, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000002,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000002,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000011,
- 0x003e, 0x00000000,
- 0x0002, 0x0fac6881,
- 0x0006, 0x00000000,
- 0x0002, 0x0000000f,
- 0x003e, 0x00000000,
- 0x0002, 0x001ffe67,
- 0x0016, 0x00000000,
- 0x0002, 0x00000011,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x001e, 0x00000000,
- 0x0002, 0x00000004,
- 0x002e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0026, 0x00000000,
- 0x0002, 0x00000011,
- 0x003e, 0x00000000,
- 0x0002, 0x0fac6881,
- 0x001e, 0x00000000,
- 0x0002, 0x00000011,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x000007ff,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0156, 0x00000000,
- 0x0002, 0x00000008,
- 0x0006, 0x00000000,
- 0x0002, 0x00000008,
- 0x0006, 0x00000000,
- 0x0002, 0x00000008,
- 0x0006, 0x00000000,
- 0x0002, 0x00000008,
- 0x0006, 0x00000000,
- 0x0002, 0x00000008,
- 0x0006, 0x00000000,
- 0x0002, 0x00000008,
- 0x0006, 0x00000000,
- 0x0002, 0x00000008,
- 0x0006, 0x00000000,
- 0x0002, 0x00000008,
- 0x0006, 0x00000000,
- 0x0002, 0x00000011,
- 0x003e, 0x00000000,
- 0x0002, 0x0fac6881,
- 0x0006, 0x00000000,
- 0x0002, 0x00000400,
- 0x0006, 0x00000000,
- 0x0002, 0x00000400,
- 0x0006, 0x00000000,
- 0x0002, 0x00000400,
- 0x0006, 0x00000000,
- 0x0002, 0x00000400,
- 0x0006, 0x00000000,
- 0x0002, 0x00000400,
- 0x0006, 0x00000000,
- 0x0002, 0x00000400,
- 0x0006, 0x00000000,
- 0x0002, 0x00000400,
- 0x0006, 0x00000000,
- 0x0002, 0x00000400,
- 0x0006, 0x00000000,
- 0x0002, 0x00000300,
- 0x0006, 0x00000000,
- 0x0002, 0x00000300,
- 0x0006, 0x00000000,
- 0x0002, 0x00000300,
- 0x0006, 0x00000000,
- 0x0002, 0x00000300,
- 0x0006, 0x00000000,
- 0x0002, 0x00000300,
- 0x0006, 0x00000000,
- 0x0002, 0x00000300,
- 0x0006, 0x00000000,
- 0x0002, 0x00000300,
- 0x0006, 0x00000000,
- 0x0002, 0x00000300,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x0000000f,
- 0x003e, 0x00000000,
- 0x0002, 0x00000020,
- 0x0006, 0x00000000,
- 0x0002, 0x00000011,
- 0x0006, 0x00000000,
- 0x0002, 0x00000100,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0016, 0x00000000,
- 0x0002, 0x00000040,
- 0x0006, 0x00000000,
- 0x0002, 0x00000100,
- 0x000e, 0x00000000,
- 0x0002, 0x00000003,
- 0x0026, 0x00000000,
- 0x0002, 0x001ffe67,
- 0x001e, 0x00000000,
- 0x0002, 0x00000002,
- 0x0006, 0x00000000,
- 0x0002, 0x0fac6881,
- 0x004e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0026, 0x00000000,
- 0x0002, 0x00000004,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000400,
- 0x0006, 0x00000000,
- 0x0002, 0x00000300,
- 0x0006, 0x00000000,
- 0x0002, 0x00001001,
- 0x001e, 0x00000000,
- 0x0002, 0x00000011,
- 0x003e, 0x00000000,
- 0x0002, 0x0fac6881,
- 0x0006, 0x00000000,
- 0x0002, 0x0000000f,
- 0x00be, 0x00000000,
- 0x0002, 0x001ffe67,
- 0x001e, 0x00000000,
- 0x0002, 0x00000011,
- 0x0016, 0x00000000,
- 0x0002, 0x00000004,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x001e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0026, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x001e, 0x00000000,
- 0x0002, 0x2a712488,
- 0x000e, 0x00000000,
- 0x0002, 0x4085c000,
- 0x0006, 0x00000000,
- 0x0002, 0x00000040,
- 0x0006, 0x00000000,
- 0x0002, 0x00000100,
- 0x0006, 0x00000000,
- 0x0002, 0x00010100,
- 0x0006, 0x00000000,
- 0x0002, 0x02800000,
- 0x0096, 0x00000000,
- 0x0002, 0x04e3bfdf,
- 0x0006, 0x00000000,
- 0x0002, 0x04e3bfdf,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00ffff00,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0016, 0x00000000,
- 0x0002, 0x00ffff00,
- 0x0046, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x30201000,
- 0x0006, 0x00000000,
- 0x0002, 0x70605040,
- 0x0006, 0x00000000,
- 0x0002, 0xb8a89888,
- 0x0006, 0x00000000,
- 0x0002, 0xf8e8d8c8,
- 0x000e, 0x00000000,
- 0x0002, 0x0000001a,
- 0x295a, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x000f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000f, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0017, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000027,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x1e0f, 0x00000000,
- 0x0001, 0x00000001,
- 0x00b7, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0067, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x001f, 0x00000000,
- 0x0001, 0x00000080,
- 0x000f, 0x00000000,
- 0x0001, 0x0000003f,
- 0x0057, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0047, 0x00000000,
- 0x0001, 0x00000004,
- 0x001f, 0x00000000,
- 0x0001, 0x00000004,
- 0x008f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00001001,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0107, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x0017, 0x00000000,
- 0x0001, 0x00000003,
- 0x0047, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0008, 0x00000000,
- 0x0003, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x00000080,
- 0x0003, 0x80007004,
- 0x0004, 0x00000000,
- 0x0001, 0x80007004,
- 0x0003, 0x04000400,
- 0x0004, 0x00000000,
- 0x0001, 0x04000400,
- 0x0003, 0x00001000,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0058, 0x00000000,
- 0x0003, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x00000080,
- 0x0003, 0x80007004,
- 0x0004, 0x00000000,
- 0x0001, 0x80007004,
- 0x0003, 0x04000400,
- 0x0004, 0x00000000,
- 0x0001, 0x04000400,
- 0x0003, 0x00001000,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0050, 0x00000000,
- 0x0003, 0x08100c12,
- 0x0004, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0030, 0x00000000,
- 0x0003, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00010001,
- 0x0004, 0x00000000,
- 0x0004, 0x00010001,
- 0x0004, 0x00000000,
- 0x0001, 0x00010001,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x0001fe21,
- 0x0004, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x0028, 0x00000000,
- 0x0003, 0x08100c12,
- 0x0004, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0008, 0x00000000,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0003, 0x00000011,
- 0x0004, 0x00000000,
- 0x0001, 0x00000011,
- 0x0040, 0x00000000,
- 0x0003, 0x0fac6881,
- 0x0004, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0020, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0048, 0x00000000,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x1d18, 0x00000000,
- 0x0003, 0x00000011,
- 0x0004, 0x00000000,
- 0x0001, 0x00000011,
- 0x0008, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0000
-};
-
-static uint32_t nv98_ctxprog[] = {
- 0x0070008e, 0x0070009c, 0x00200020, 0x00600008, 0x0050004c, 0x00400e89,
- 0x00200000, 0x00600007, 0x00300000, 0x00c000ff, 0x00200000, 0x008000ff,
- 0x00700009, 0x0040d94d, 0x00402944, 0x00402905, 0x0040290d, 0x0040b506,
- 0x00600005, 0x004015c5, 0x00600011, 0x0040270b, 0x004021c5, 0x00700000,
- 0x00700081, 0x00600004, 0x0050004a, 0x00216c40, 0x00600007, 0x00c02701,
- 0x0020002e, 0x00800001, 0x005000cb, 0x0090ffff, 0x0091ffff, 0x00200020,
- 0x00600008, 0x0050004c, 0x00600009, 0x0040b545, 0x0040d04d, 0x0070009d,
- 0x00402dcf, 0x0070009f, 0x0050009f, 0x00402ac0, 0x00200080, 0x00600008,
- 0x00402a4f, 0x00402ac0, 0x004030cc, 0x00700081, 0x00200000, 0x00600006,
- 0x00700000, 0x00111bfc, 0x00700083, 0x00300000, 0x00216c40, 0x00600007,
- 0x00c00a01, 0x0020001e, 0x00800001, 0x005000cb, 0x00c000ff, 0x00700080,
- 0x00700083, 0x00200047, 0x00600006, 0x0011020a, 0x00200240, 0x00600007,
- 0x00300000, 0x00c000ff, 0x00c800ff, 0x0040c007, 0x00202912, 0x008000ff,
- 0x0040508c, 0x005000cb, 0x00a0023f, 0x00200040, 0x00600006, 0x0070000f,
- 0x00170202, 0x0011020a, 0x00200032, 0x0010020d, 0x001c0242, 0x00120302,
- 0x00140402, 0x00180500, 0x00130509, 0x00150550, 0x00110605, 0x0020000f,
- 0x00100607, 0x00110700, 0x00110900, 0x00120902, 0x00110a00, 0x00160b02,
- 0x00120b28, 0x00140b2b, 0x00110c01, 0x00111400, 0x00111405, 0x00111407,
- 0x00111409, 0x0011140b, 0x002000cc, 0x00101500, 0x0040790f, 0x0040794b,
- 0x00214b00, 0x00600007, 0x00200425, 0x008800ff, 0x0070008f, 0x0040798c,
- 0x005000cb, 0x00000000, 0x00141a05, 0x00131a0c, 0x00131c00, 0x00121c04,
- 0x00141c20, 0x00111c25, 0x00131f00, 0x00191f40, 0x004095e0, 0x002001ac,
- 0x00600006, 0x00200044, 0x00102080, 0x001120c6, 0x001520c9, 0x001920d0,
- 0x00122100, 0x00122103, 0x00162200, 0x00122207, 0x00112280, 0x00112300,
- 0x00112302, 0x00122380, 0x0011238b, 0x00112394, 0x0011239c, 0x00000000,
- 0x00409c0f, 0x005000cb, 0x00214b00, 0x00600007, 0x00200425, 0x008800ff,
- 0x005000cb, 0x00409f87, 0x0060000a, 0x00000000, 0x0040ae00, 0x007000a0,
- 0x00700080, 0x00200240, 0x00600007, 0x00200004, 0x00c000ff, 0x008000ff,
- 0x005000cb, 0x00700000, 0x00200000, 0x00600006, 0x00111bfe, 0x0040d04d,
- 0x00700000, 0x00200000, 0x00600006, 0x00111bfe, 0x00700080, 0x0070001d,
- 0x0040114d, 0x00700081, 0x00600004, 0x0050004a, 0x0040ba88, 0x0060000b,
- 0x00200000, 0x00600006, 0x00700000, 0x0040d00b, 0x00111bfd, 0x0040424d,
- 0x00202912, 0x008000fd, 0x005000cb, 0x00c00002, 0x00200240, 0x00600007,
- 0x00200160, 0x00800002, 0x005000cb, 0x00c01802, 0x002027b2, 0x00800002,
- 0x005000cb, 0x00404e4d, 0x0060000b, 0x0040ce4d, 0x00700001, 0x00700003,
- 0x0040d406, 0x0040d505, 0x0060000d, 0x00700005, 0x0070000d, 0x00700006,
- 0x0070000b, 0x0070000e, 0x0070001c, 0x0060000c, ~0
-};
-
-static unsigned nv98_ctxvals[] = {
- 0x0001, 0x00007f3c,
- 0x0042, 0x00000000,
- 0x0001, 0x00000030,
- 0x0008, 0x00000000,
- 0x0001, 0x00000002,
- 0x0028, 0x00000000,
- 0x0001, 0x00000003,
- 0x0001, 0x00001000,
- 0x000f, 0x00000000,
- 0x0001, 0x0000fe0c,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x000a, 0x00000000,
- 0x0001, 0x00000187,
- 0x0004, 0x00000000,
- 0x0001, 0x00001018,
- 0x0001, 0x000000ff,
- 0x000e, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x042500df,
- 0x0001, 0x00000000,
- 0x0001, 0x00000600,
- 0x0005, 0x00000000,
- 0x0001, 0x01000000,
- 0x0001, 0x000000ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000400,
- 0x0005, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000080,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0005, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0001, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x00000000,
- 0x0003, 0x00000001,
- 0x0001, 0x00000004,
- 0x0003, 0x00000001,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0001, 0x00000007,
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- 0x0005, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000000,
- 0x0001, 0x00000300,
- 0x0005, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000000,
- 0x0001, 0x00000300,
- 0x0005, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0005, 0x00000000,
- 0x0001, 0x000007ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x0000000f,
- 0x0005, 0x00000000,
- 0x0001, 0x00000102,
- 0x0039, 0x00000000,
- 0x0001, 0x00000020,
- 0x0007, 0x00000000,
- 0x0001, 0x00000011,
- 0x0007, 0x00000000,
- 0x0001, 0x00000100,
- 0x0005, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0005, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0009, 0x00000000,
- 0x0001, 0x00000040,
- 0x0007, 0x00000000,
- 0x0001, 0x00000100,
- 0x000f, 0x00000000,
- 0x0001, 0x00000003,
- 0x0027, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x001f, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x004f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0027, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000400,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00001001,
- 0x001f, 0x00000000,
- 0x0001, 0x00000011,
- 0x003f, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0007, 0x00000000,
- 0x0001, 0x0000000f,
- 0x0015, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0017, 0x00000000,
- 0x0001, 0x00000804,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000010,
- 0x0027, 0x00000000,
- 0x0001, 0x00000804,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x0000001a,
- 0x0007, 0x00000000,
- 0x0001, 0x0000007f,
- 0x0009, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x0005, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00080c14,
- 0x000f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0001, 0x00000000,
- 0x0001, 0x00000011,
- 0x0005, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0009, 0x00000000,
- 0x0001, 0x00000004,
- 0x0005, 0x00000000,
- 0x0001, 0x00000010,
- 0x0009, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000d, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0009, 0x00000000,
- 0x0001, 0x00000001,
- 0x0027, 0x00000000,
- 0x0001, 0x00000001,
- 0x0005, 0x00000000,
- 0x0001, 0x000007ff,
- 0x0007, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x001f, 0x00000000,
- 0x0001, 0x2a712488,
- 0x000f, 0x00000000,
- 0x0001, 0x4085c000,
- 0x0007, 0x00000000,
- 0x0001, 0x00000040,
- 0x0007, 0x00000000,
- 0x0001, 0x00000100,
- 0x0007, 0x00000000,
- 0x0001, 0x00010100,
- 0x0007, 0x00000000,
- 0x0001, 0x02800000,
- 0x0097, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0007, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00ffff00,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0017, 0x00000000,
- 0x0001, 0x00ffff00,
- 0x0047, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x30201000,
- 0x0007, 0x00000000,
- 0x0001, 0x70605040,
- 0x0007, 0x00000000,
- 0x0001, 0xb8a89888,
- 0x0007, 0x00000000,
- 0x0001, 0xf8e8d8c8,
- 0x000f, 0x00000000,
- 0x0001, 0x0000001a,
- 0x0015, 0x00000000,
- 0x0001, 0x00000001,
- 0x0017, 0x00000000,
- 0x0001, 0x00000010,
- 0x01c7, 0x00000000,
- 0x0001, 0x00000088,
- 0x0007, 0x00000000,
- 0x0001, 0x00000088,
- 0x0017, 0x00000000,
- 0x0001, 0x00000004,
- 0x00b7, 0x00000000,
- 0x0001, 0x00000026,
- 0x0017, 0x00000000,
- 0x0001, 0x3f800000,
- 0x001f, 0x00000000,
- 0x0001, 0x0000001a,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x0147, 0x00000000,
- 0x0001, 0x00000052,
- 0x000f, 0x00000000,
- 0x0001, 0x00000026,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x0000001a,
- 0x0017, 0x00000000,
- 0x0001, 0x00ffff00,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00080c14,
- 0x000f, 0x00000000,
- 0x0001, 0x000007ff,
- 0x2a17, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000027,
- 0x000f, 0x00000000,
- 0x0001, 0x00000026,
- 0x001f, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0127, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0007, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0017, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x931d, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x000f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000f, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0017, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000027,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x1e0f, 0x00000000,
- 0x0001, 0x00000001,
- 0x00b7, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0067, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x001f, 0x00000000,
- 0x0001, 0x00000080,
- 0x000f, 0x00000000,
- 0x0001, 0x0000003f,
- 0x0057, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0047, 0x00000000,
- 0x0001, 0x00000004,
- 0x001f, 0x00000000,
- 0x0001, 0x00000004,
- 0x008f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00001001,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0107, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x0017, 0x00000000,
- 0x0001, 0x00000003,
- 0x0047, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x80007004,
- 0x0007, 0x00000000,
- 0x0001, 0x04000400,
- 0x0007, 0x00000000,
- 0x0001, 0x00001000,
- 0x0017, 0x00000000,
- 0x0001, 0x00000e00,
- 0x0007, 0x00000000,
- 0x0001, 0x00001e00,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0057, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0037, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00010001,
- 0x0007, 0x00000000,
- 0x0001, 0x00010001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x002f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000011,
- 0x0047, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0027, 0x00000000,
- 0x0001, 0x00000004,
- 0x004f, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x1cff, 0x00000000,
- 0x0001, 0x00000011,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0000
-};
-
-static uint32_t nva0_ctxprog[] = {
- 0x0070009c, 0x00300000, 0x00452c09, 0x00402d09, 0x00412051, 0x00400a44,
- 0x00400a05, 0x00400a0d, 0x0070008e, 0x0040124d, 0x0070009d, 0x00453b4d,
- 0x00700097, 0x00453c21, 0x004446a1, 0x0044914d, 0x00449d4d, 0x0070001d,
- 0x00401806, 0x00600005, 0x00444445, 0x0044308b, 0x00401845, 0x0040234d,
- 0x00700081, 0x00401ccf, 0x0070009f, 0x0050009f, 0x0045174d, 0x00700017,
- 0x0040230b, 0x0044984d, 0x00453d21, 0x004456a1, 0x007000a0, 0x00700001,
- 0x00700003, 0x00402706, 0x00402805, 0x0060000d, 0x00700005, 0x0070000d,
- 0x00700006, 0x00700002, 0x0070000b, 0x0070000e, 0x0070001c, 0x0060000c,
- 0x00000000, 0x0090ffff, 0x0091ffff, 0x00450f4d, 0x00600009, 0x0048004d,
- 0x00700096, 0x00403acf, 0x0070009f, 0x0050009f, 0x00412051, 0x004036c0,
- 0x00200080, 0x00600008, 0x0040364f, 0x004036c0, 0x00403ecc, 0x00403651,
- 0x00700016, 0x0048004d, 0x00600011, 0x0048004d, 0x0044364d, 0x0070008e,
- 0x00700081, 0x00448b4d, 0x0044984d, 0x00700083, 0x00300000, 0x00217c80,
- 0x00600007, 0x00c00a01, 0x00200022, 0x00800001, 0x005000cb, 0x00c000ff,
- 0x00445e4d, 0x0048004d, 0x00450908, 0x00448e4d, 0x0044a64d, 0x00445e4d,
- 0x00451d4d, 0x0044914d, 0x00449d4d, 0x0048004d, 0x00700083, 0x00453e4d,
- 0x00a0023f, 0x00200040, 0x00600006, 0x0045374d, 0x0044a84d, 0x0020022b,
- 0x0044ef60, 0x002002ba, 0x00300001, 0x0044ef61, 0x00200349, 0x00300002,
- 0x0044ef62, 0x002003d8, 0x00300003, 0x0044ef63, 0x00200467, 0x00300004,
- 0x0044ef64, 0x002004f6, 0x00300005, 0x0044ef65, 0x00200585, 0x00300006,
- 0x0044ef66, 0x00200614, 0x00300007, 0x0044ef67, 0x002006a3, 0x00300008,
- 0x0044ef68, 0x00200732, 0x00300009, 0x0044ef69, 0x00200800, 0x0038ffff,
- 0x0045044d, 0x00300000, 0x005000cb, 0x0045564d, 0x005000cb, 0x00450b07,
- 0x0048004d, 0x0044944d, 0x00111bfc, 0x0048004d, 0x0044944d, 0x00111bfd,
- 0x0048004d, 0x0044944d, 0x00111bfe, 0x0048004d, 0x00200000, 0x00700000,
- 0x00600006, 0x0048004d, 0x00200001, 0x00600006, 0x0045374d, 0x0011020a,
- 0x0048004d, 0x00300000, 0x00c3ffff, 0x00200000, 0x00600007, 0x00700000,
- 0x00200008, 0x008000ff, 0x005000cb, 0x0048004d, 0x00000000, 0x0048004d,
- 0x00000000, 0x00170202, 0x00200032, 0x0010020d, 0x001e0242, 0x001102c0,
- 0x00120302, 0x00150402, 0x00180500, 0x00130509, 0x00150550, 0x00110605,
- 0x00200013, 0x00100607, 0x00110700, 0x00110900, 0x00120902, 0x00110a00,
- 0x00160b02, 0x00120b28, 0x00140b2b, 0x00110c01, 0x00110d01, 0x00111400,
- 0x00111405, 0x00111407, 0x00111409, 0x0011140b, 0x002000d4, 0x00101500,
- 0x00141a05, 0x00131a0c, 0x00131c00, 0x00131c04, 0x00141c20, 0x00131c25,
- 0x00131c40, 0x00131c44, 0x00141c60, 0x00131c65, 0x00131c80, 0x00131c84,
- 0x00141ca0, 0x00131ca5, 0x00131cc0, 0x00131cc4, 0x00141ce0, 0x00131ce5,
- 0x00131d00, 0x00131d04, 0x00141d20, 0x00131d25, 0x00131d40, 0x00131d44,
- 0x00141d60, 0x00131d65, 0x00131d80, 0x00131d84, 0x00141da0, 0x00131da5,
- 0x00131dc0, 0x00131dc4, 0x00141de0, 0x00131de5, 0x00131f00, 0x00131f04,
- 0x00111f08, 0x00111f0b, 0x00200015, 0x00101f40, 0x0048004d, 0x00600006,
- 0x0045564d, 0x00112020, 0x00112022, 0x00200060, 0x00102040, 0x001520c0,
- 0x001120c8, 0x001420ca, 0x001b20cf, 0x00122100, 0x00122103, 0x00162140,
- 0x00122147, 0x00122153, 0x001121a0, 0x001221c0, 0x001121cb, 0x001121d4,
- 0x001521d8, 0x0048004d, 0x00000000, 0x00700000, 0x00600006, 0x0045374d,
- 0x0048004d, 0x0060000b, 0x0048004d, 0x0060000a, 0x0048004d, 0x0060000b,
- 0x00410d4d, 0x00200020, 0x00600008, 0x0050004c, 0x0048004d, 0x002003e8,
- 0x00600008, 0x0050004c, 0x0048004d, 0x00600004, 0x0050004a, 0x0048004d,
- 0x00c000ff, 0x00c800ff, 0x0048004d, 0x00c000ff, 0x00c800ff, 0x0048004d,
- 0x00700016, 0x0070008e, 0x00700082, 0x00500041, 0x0045134d, 0x00700095,
- 0x005000d1, 0x00600016, 0x00500052, 0x00700002, 0x00700015, 0x0040284d,
- 0x0070008e, 0x00450f4d, 0x00200000, 0x00600007, 0x00300000, 0x00c000ff,
- 0x00200000, 0x008000ff, 0x00700009, 0x0070000e, 0x0048004d, 0x00700080,
- 0x00480017, 0x00700000, 0x0048004d, 0x0048004d, 0x0048004d, 0x0048004d,
- 0x0070008e, 0x00450f4d, 0x00700083, 0x00451a4d, 0x0045474d, 0x0070000f,
- 0x0041468c, 0x005000cb, 0x0048004d, 0x00200800, 0x00600007, 0x00454b87,
- 0x0048004d, 0x00000000, 0x0020216c, 0x0045374d, 0x008000ff, 0x0048004d,
- 0x00211380, 0x00600007, 0x00200d20, 0x0045374d, 0x008800ff, 0x0048004d,
- 0x0048000f, 0x0048004b, 0x0045504d, 0x0070008f, 0x0048008c, 0x005000cb,
- 0x0048004d, ~0
-};
-
-static unsigned nva0_ctxvals[] = {
- 0x0001, 0x00007f30,
- 0x0042, 0x00000000,
- 0x0001, 0x00000030,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0028, 0x00000000,
- 0x0001, 0x00000003,
- 0x0001, 0x00001000,
- 0x0012, 0x00000000,
- 0x0001, 0x0000fe0c,
- 0x0005, 0x00000000,
- 0x0001, 0x00001000,
- 0x000a, 0x00000000,
- 0x0001, 0x00000187,
- 0x0004, 0x00000000,
- 0x0001, 0x00001018,
- 0x0001, 0x000000ff,
- 0x0012, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x042500df,
- 0x0001, 0x00000000,
- 0x0001, 0x00000600,
- 0x0005, 0x00000000,
- 0x0001, 0x01000000,
- 0x0001, 0x000000ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000800,
- 0x0005, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x000e0080,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0005, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0001, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x00000000,
- 0x0003, 0x00000001,
- 0x0001, 0x00000004,
- 0x0003, 0x00000001,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0001, 0x00000007,
- 0x0003, 0x00000001,
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- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0001, 0x00000001,
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- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
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- 0x0001, 0x00000008,
- 0x0001, 0x00000004,
- 0x0001, 0x00000027,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000002,
- 0x0001, 0x00000003,
- 0x0001, 0x00000004,
- 0x0001, 0x00000005,
- 0x0001, 0x00000006,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0001, 0x000000cf,
- 0x000b, 0x00000000,
- 0x0001, 0x00000080,
- 0x0002, 0x00000004,
- 0x0001, 0x00000003,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000012,
- 0x0001, 0x00000010,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000001,
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- 0x0001, 0x00000002,
- 0x0001, 0x00000004,
- 0x0003, 0x00000000,
- 0x0001, 0x003fffff,
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- 0x0002, 0x00000001,
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- 0x0001, 0x00000000,
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- 0x0001, 0x00000014,
- 0x0001, 0x00000001,
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- 0x0001, 0x00000001,
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- 0x0001, 0x00000e00,
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- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
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- 0x0017, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000027,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x15c6, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000027,
- 0x000f, 0x00000000,
- 0x0001, 0x00000026,
- 0x0800, 0x00000000,
- 0x0001, 0x00000001,
- 0x00b7, 0x00000000,
- 0x0001, 0x08100c12,
- 0x002d, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0008, 0x00000000,
- 0x0003, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x00000080,
- 0x0003, 0x80007004,
- 0x0004, 0x00000000,
- 0x0001, 0x80007004,
- 0x0003, 0x04000400,
- 0x0004, 0x00000000,
- 0x0001, 0x04000400,
- 0x0003, 0x000000c0,
- 0x0004, 0x00000000,
- 0x0001, 0x000000c0,
- 0x0003, 0x00001000,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0068, 0x00000000,
- 0x0003, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x00000080,
- 0x0003, 0x80007004,
- 0x0004, 0x00000000,
- 0x0001, 0x80007004,
- 0x0003, 0x04000400,
- 0x0004, 0x00000000,
- 0x0001, 0x04000400,
- 0x0003, 0x000000c0,
- 0x0004, 0x00000000,
- 0x0001, 0x000000c0,
- 0x0003, 0x00001000,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0068, 0x00000000,
- 0x0003, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x00000080,
- 0x0003, 0x80007004,
- 0x0004, 0x00000000,
- 0x0001, 0x80007004,
- 0x0003, 0x04000400,
- 0x0004, 0x00000000,
- 0x0001, 0x04000400,
- 0x0003, 0x000000c0,
- 0x0004, 0x00000000,
- 0x0001, 0x000000c0,
- 0x0003, 0x00001000,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0060, 0x00000000,
- 0x0003, 0x08100c12,
- 0x0004, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0008, 0x00000000,
- 0x0003, 0x0001fe21,
- 0x0004, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x0028, 0x00000000,
- 0x0003, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00010001,
- 0x0004, 0x00000000,
- 0x0004, 0x00010001,
- 0x0004, 0x00000000,
- 0x0001, 0x00010001,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x0001fe21,
- 0x0004, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x0028, 0x00000000,
- 0x0003, 0x08100c12,
- 0x0004, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0008, 0x00000000,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0003, 0x00000011,
- 0x0004, 0x00000000,
- 0x0001, 0x00000011,
- 0x0040, 0x00000000,
- 0x0003, 0x0fac6881,
- 0x0004, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0020, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0048, 0x00000000,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x1d18, 0x00000000,
- 0x0003, 0x00000011,
- 0x0004, 0x00000000,
- 0x0001, 0x00000011,
- 0x0008, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0170, 0x00000000,
- 0x0003, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x00000080,
- 0x0003, 0x80007004,
- 0x0004, 0x00000000,
- 0x0001, 0x80007004,
- 0x0003, 0x04000400,
- 0x0004, 0x00000000,
- 0x0001, 0x04000400,
- 0x0003, 0x000000c0,
- 0x0004, 0x00000000,
- 0x0001, 0x000000c0,
- 0x0003, 0x00001000,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0068, 0x00000000,
- 0x0003, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x00000080,
- 0x0003, 0x80007004,
- 0x0004, 0x00000000,
- 0x0001, 0x80007004,
- 0x0003, 0x04000400,
- 0x0004, 0x00000000,
- 0x0001, 0x04000400,
- 0x0003, 0x000000c0,
- 0x0004, 0x00000000,
- 0x0001, 0x000000c0,
- 0x0003, 0x00001000,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0068, 0x00000000,
- 0x0003, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x00000080,
- 0x0003, 0x80007004,
- 0x0004, 0x00000000,
- 0x0001, 0x80007004,
- 0x0003, 0x04000400,
- 0x0004, 0x00000000,
- 0x0001, 0x04000400,
- 0x0003, 0x000000c0,
- 0x0004, 0x00000000,
- 0x0001, 0x000000c0,
- 0x0003, 0x00001000,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0060, 0x00000000,
- 0x0003, 0x08100c12,
- 0x0004, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0008, 0x00000000,
- 0x0003, 0x0001fe21,
- 0x0004, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x0028, 0x00000000,
- 0x0003, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0004, 0x0000ffff,
- 0x0004, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00010001,
- 0x0004, 0x00000000,
- 0x0004, 0x00010001,
- 0x0004, 0x00000000,
- 0x0001, 0x00010001,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x0001fe21,
- 0x0004, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x0028, 0x00000000,
- 0x0003, 0x08100c12,
- 0x0004, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0008, 0x00000000,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0003, 0x00000011,
- 0x0004, 0x00000000,
- 0x0001, 0x00000011,
- 0x0040, 0x00000000,
- 0x0003, 0x0fac6881,
- 0x0004, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0020, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0048, 0x00000000,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00000002,
- 0x0004, 0x00000000,
- 0x0001, 0x00000002,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0004, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0008, 0x00000000,
- 0x0003, 0x00000004,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x1d18, 0x00000000,
- 0x0003, 0x00000011,
- 0x0004, 0x00000000,
- 0x0001, 0x00000011,
- 0x0008, 0x00000000,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0171, 0x00000000,
- 0x0002, 0x00000080,
- 0x0006, 0x00000000,
- 0x0002, 0x80007004,
- 0x0006, 0x00000000,
- 0x0002, 0x04000400,
- 0x0006, 0x00000000,
- 0x0002, 0x000000c0,
- 0x0006, 0x00000000,
- 0x0002, 0x00001000,
- 0x0016, 0x00000000,
- 0x0002, 0x00000001,
- 0x0016, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000004,
- 0x0006, 0x00000000,
- 0x0002, 0x00000002,
- 0x006e, 0x00000000,
- 0x0002, 0x00000080,
- 0x0006, 0x00000000,
- 0x0002, 0x80007004,
- 0x0006, 0x00000000,
- 0x0002, 0x04000400,
- 0x0006, 0x00000000,
- 0x0002, 0x000000c0,
- 0x0006, 0x00000000,
- 0x0002, 0x00001000,
- 0x0016, 0x00000000,
- 0x0002, 0x00000001,
- 0x0016, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000004,
- 0x0006, 0x00000000,
- 0x0002, 0x00000002,
- 0x006e, 0x00000000,
- 0x0002, 0x00000080,
- 0x0006, 0x00000000,
- 0x0002, 0x80007004,
- 0x0006, 0x00000000,
- 0x0002, 0x04000400,
- 0x0006, 0x00000000,
- 0x0002, 0x000000c0,
- 0x0006, 0x00000000,
- 0x0002, 0x00001000,
- 0x0016, 0x00000000,
- 0x0002, 0x00000001,
- 0x0016, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000004,
- 0x0006, 0x00000000,
- 0x0002, 0x00000002,
- 0x0066, 0x00000000,
- 0x0002, 0x08100c12,
- 0x000e, 0x00000000,
- 0x0002, 0x0001fe21,
- 0x002e, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x0000ffff,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00010001,
- 0x0006, 0x00000000,
- 0x0002, 0x00010001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x0001fe21,
- 0x002e, 0x00000000,
- 0x0002, 0x08100c12,
- 0x0006, 0x00000000,
- 0x0002, 0x00000004,
- 0x000e, 0x00000000,
- 0x0002, 0x00000002,
- 0x0006, 0x00000000,
- 0x0002, 0x00000011,
- 0x0046, 0x00000000,
- 0x0002, 0x0fac6881,
- 0x0026, 0x00000000,
- 0x0002, 0x00000004,
- 0x004e, 0x00000000,
- 0x0002, 0x00000002,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000002,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x0006, 0x00000000,
- 0x0002, 0x00000001,
- 0x000e, 0x00000000,
- 0x0002, 0x00000004,
- 0x1d1e, 0x00000000,
- 0x0002, 0x00000011,
- 0x000e, 0x00000000,
- 0x0002, 0x00000001,
- 0x0000
-};
-
-static uint32_t nvaa_ctxprog[] = {
- 0x0070009c, 0x00300000, 0x0044f109, 0x00402d09, 0x0040e551, 0x00400a44,
- 0x00400a05, 0x00400a0d, 0x0070008e, 0x0040124d, 0x0070009d, 0x0045004d,
- 0x00700097, 0x00450121, 0x004446a1, 0x0044764d, 0x0044824d, 0x0070001d,
- 0x00401806, 0x00600005, 0x00444445, 0x0044308b, 0x00401845, 0x0040234d,
- 0x00700081, 0x00401ccf, 0x0070009f, 0x0050009f, 0x0044dc4d, 0x00700017,
- 0x0040230b, 0x00447d4d, 0x00450221, 0x004456a1, 0x007000a0, 0x00700001,
- 0x00700003, 0x00402706, 0x00402805, 0x0060000d, 0x00700005, 0x0070000d,
- 0x00700006, 0x00700002, 0x0070000b, 0x0070000e, 0x0070001c, 0x0060000c,
- 0x00000000, 0x0090ffff, 0x0091ffff, 0x0044d44d, 0x00600009, 0x0048004d,
- 0x00700096, 0x00403acf, 0x0070009f, 0x0050009f, 0x0040e551, 0x004036c0,
- 0x00200080, 0x00600008, 0x0040364f, 0x004036c0, 0x00403ecc, 0x00403651,
- 0x00700016, 0x0048004d, 0x00600011, 0x0048004d, 0x0044364d, 0x0070008e,
- 0x00700081, 0x0044704d, 0x00447d4d, 0x00700083, 0x00300000, 0x00212740,
- 0x00600007, 0x00c00b01, 0x00200022, 0x00800001, 0x005000cb, 0x00c000ff,
- 0x00445e4d, 0x0048004d, 0x0044ce08, 0x0044734d, 0x00448b4d, 0x00445e4d,
- 0x0044e24d, 0x0044764d, 0x0044824d, 0x0048004d, 0x00700083, 0x0045034d,
- 0x00a0023f, 0x00200040, 0x00600006, 0x0044fc4d, 0x00448d4d, 0x002001d0,
- 0x0044b860, 0x00200280, 0x0038ffff, 0x0044cc4d, 0x00300000, 0x005000cb,
- 0x00451c4d, 0x005000cb, 0x0044d007, 0x0048004d, 0x0044794d, 0x00111bfc,
- 0x0048004d, 0x0044794d, 0x00111bfd, 0x0048004d, 0x0044794d, 0x00111bfe,
- 0x0048004d, 0x00200000, 0x00700000, 0x00600006, 0x0048004d, 0x00200001,
- 0x00600006, 0x0044fc4d, 0x0011020a, 0x0048004d, 0x00300000, 0x00c3ffff,
- 0x00200000, 0x00600007, 0x00700000, 0x00200008, 0x008000ff, 0x005000cb,
- 0x0048004d, 0x00000000, 0x0048004d, 0x00000000, 0x00170202, 0x00200032,
- 0x0010020d, 0x001e0242, 0x001102c0, 0x00120302, 0x00150402, 0x00180500,
- 0x00130509, 0x00150550, 0x00110605, 0x00200013, 0x00100607, 0x00110700,
- 0x00110900, 0x00120902, 0x00110a00, 0x00160b02, 0x00120b28, 0x00140b2b,
- 0x00110c01, 0x00110d01, 0x00111400, 0x00111405, 0x00111407, 0x00111409,
- 0x0011140b, 0x002000d4, 0x00101500, 0x00141a05, 0x00131a0c, 0x00131c00,
- 0x00131c04, 0x00141c20, 0x00131c25, 0x00131f00, 0x00131f04, 0x00111f08,
- 0x00111f0b, 0x00200015, 0x00101f40, 0x0048004d, 0x00600006, 0x00451c4d,
- 0x00112020, 0x00112022, 0x00200085, 0x00102040, 0x001120c8, 0x001420ca,
- 0x001b20cf, 0x00122100, 0x00122103, 0x00162140, 0x00122147, 0x00122153,
- 0x001121a0, 0x001221c0, 0x001121cb, 0x001121d4, 0x001521d8, 0x0048004d,
- 0x00000000, 0x0048004d, 0x0060000b, 0x0048004d, 0x0060000a, 0x0048004d,
- 0x0060000b, 0x0040d24d, 0x00200020, 0x00600008, 0x0050004c, 0x0048004d,
- 0x002003e8, 0x00600008, 0x0050004c, 0x0048004d, 0x00600004, 0x0050004a,
- 0x0048004d, 0x00c000ff, 0x00c800ff, 0x0048004d, 0x00c000ff, 0x00c800ff,
- 0x0048004d, 0x00700016, 0x0070008e, 0x00700082, 0x00500041, 0x0044d84d,
- 0x00700095, 0x005000d1, 0x00600016, 0x00500052, 0x00700002, 0x00700015,
- 0x0040284d, 0x0070008e, 0x0044d44d, 0x00200000, 0x00600007, 0x00300000,
- 0x00c000ff, 0x00200000, 0x008000ff, 0x00700009, 0x0070000e, 0x0048004d,
- 0x00700080, 0x00480017, 0x00700000, 0x0048004d, 0x0048004d, 0x0048004d,
- 0x0048004d, 0x0070008e, 0x0044d44d, 0x00700083, 0x0044df4d, 0x00450c4d,
- 0x0070000f, 0x00410b8c, 0x005000cb, 0x0048004d, 0x00200280, 0x00600007,
- 0x00452307, 0x00451187, 0x0048004d, 0x00000000, 0x00202070, 0x0044fc4d,
- 0x008000ff, 0x0048004d, 0x00210600, 0x00600007, 0x00200428, 0x0044fc4d,
- 0x008800ff, 0x0048004d, 0x0048000f, 0x0048004b, 0x0045164d, 0x0070008f,
- 0x0048008c, 0x005000cb, 0x0048004d, 0x00202070, 0x0044fc4d, 0x008000fd,
- 0x005000cb, 0x00c00002, 0x00200280, 0x00600007, 0x00200161, 0x0044fc4d,
- 0x00800002, 0x005000cb, 0x00c00002, 0x00201f0e, 0x0044fc4d, 0x00800002,
- 0x005000cb, 0x0048004d, ~0
-};
-
-static uint32_t nvaa_ctxvals[] = {
- 0x0043, 0x00000000,
- 0x0001, 0x00000030,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0028, 0x00000000,
- 0x0001, 0x00000003,
- 0x0001, 0x00001000,
- 0x0012, 0x00000000,
- 0x0001, 0x0000fe0c,
- 0x0005, 0x00000000,
- 0x0001, 0x00001000,
- 0x000a, 0x00000000,
- 0x0001, 0x00000187,
- 0x0004, 0x00000000,
- 0x0001, 0x00001018,
- 0x0001, 0x000000ff,
- 0x0012, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x042500df,
- 0x0001, 0x00000000,
- 0x0001, 0x00000600,
- 0x0005, 0x00000000,
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- 0x0001, 0x00000400,
- 0x0007, 0x00000000,
- 0x0001, 0x00000400,
- 0x0007, 0x00000000,
- 0x0001, 0x00000400,
- 0x0007, 0x00000000,
- 0x0001, 0x00000400,
- 0x0007, 0x00000000,
- 0x0001, 0x00000400,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x0000000f,
- 0x003f, 0x00000000,
- 0x0001, 0x00000020,
- 0x0007, 0x00000000,
- 0x0001, 0x00000011,
- 0x0007, 0x00000000,
- 0x0001, 0x00000100,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0017, 0x00000000,
- 0x0001, 0x00000040,
- 0x0007, 0x00000000,
- 0x0001, 0x00000100,
- 0x000f, 0x00000000,
- 0x0001, 0x00000003,
- 0x0027, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x001f, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x004f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0027, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000400,
- 0x0007, 0x00000000,
- 0x0001, 0x00000300,
- 0x0007, 0x00000000,
- 0x0001, 0x00001001,
- 0x001f, 0x00000000,
- 0x0001, 0x00000011,
- 0x003f, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0007, 0x00000000,
- 0x0001, 0x0000000f,
- 0x00bf, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0007, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x001f, 0x00000000,
- 0x0001, 0x00000011,
- 0x0017, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x001f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0027, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0027, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x0057, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000011,
- 0x003f, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0007, 0x00000000,
- 0x0001, 0x0000000f,
- 0x003f, 0x00000000,
- 0x0001, 0x00000011,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x005f, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0007, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00ffff00,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0017, 0x00000000,
- 0x0001, 0x00ffff00,
- 0x0047, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x30201000,
- 0x0007, 0x00000000,
- 0x0001, 0x70605040,
- 0x0007, 0x00000000,
- 0x0001, 0xb8a89888,
- 0x0007, 0x00000000,
- 0x0001, 0xf8e8d8c8,
- 0x000f, 0x00000000,
- 0x0001, 0x0000001a,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x00a7, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x03020100,
- 0x0027, 0x00000000,
- 0x0001, 0x00000004,
- 0x0017, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x00001e00,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0127, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x03020100,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x0007, 0x00000000,
- 0x0001, 0x00001e00,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0027, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x001f, 0x00000000,
- 0x0001, 0x00000004,
- 0x03d1, 0x00000000,
- 0x0001, 0x00000021,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000100,
- 0x0007, 0x00000000,
- 0x0001, 0x00000100,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000100,
- 0x0007, 0x00000000,
- 0x0001, 0x00000100,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0c75, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x010a, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000027,
- 0x000f, 0x00000000,
- 0x0001, 0x00000026,
- 0x24f9, 0x00000000,
- 0x0001, 0x0000000f,
- 0x0440, 0x00000000,
- 0x0001, 0x003fffff,
- 0x0017, 0x00000000,
- 0x0001, 0x00001fff,
- 0x1383, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0127, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0007, 0x00000000,
- 0x0001, 0x04e3bfdf,
- 0x0017, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x0007, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0027, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0027, 0x00000000,
- 0x0001, 0x00000100,
- 0x0017, 0x00000000,
- 0x0001, 0x00010001,
- 0x000f, 0x00000000,
- 0x0001, 0x00010001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00010001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x032f, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0037, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x0000001a,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x0097, 0x00000000,
- 0x0001, 0x00ffff00,
- 0x0037, 0x00000000,
- 0x0001, 0x0000000f,
- 0x003f, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0007, 0x00000000,
- 0x0001, 0x00000011,
- 0x007f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x0017, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x0007, 0x00000000,
- 0x0001, 0x04000000,
- 0x001f, 0x00000000,
- 0x0001, 0x00000005,
- 0x0007, 0x00000000,
- 0x0001, 0x00000052,
- 0x0027, 0x00000000,
- 0x0001, 0x00000001,
- 0x0087, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x0137, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000005,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x001f, 0x00000000,
- 0x0001, 0x00ffff00,
- 0x0007, 0x00000000,
- 0x0001, 0x0000001a,
- 0x000f, 0x00000000,
- 0x0001, 0x00000003,
- 0x01e7, 0x00000000,
- 0x0001, 0x00000102,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0047, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x000007ff,
- 0x000f, 0x00000000,
- 0x0001, 0x00000102,
- 0x004f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x6ee1, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000003,
- 0x000f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000f, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00080c14,
- 0x0017, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000027,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x1e0f, 0x00000000,
- 0x0001, 0x00000001,
- 0x00b7, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000d, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000f, 0x00000000,
- 0x0001, 0x00000080,
- 0x0007, 0x00000000,
- 0x0001, 0x80007004,
- 0x0007, 0x00000000,
- 0x0001, 0x04000400,
- 0x0007, 0x00000000,
- 0x0001, 0x000000c0,
- 0x0007, 0x00000000,
- 0x0001, 0x00001000,
- 0x0017, 0x00000000,
- 0x0001, 0x00000e00,
- 0x0007, 0x00000000,
- 0x0001, 0x00001e00,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x005f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x000f, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x002f, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x0000ffff,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00010001,
- 0x0007, 0x00000000,
- 0x0001, 0x00010001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x0001fe21,
- 0x002f, 0x00000000,
- 0x0001, 0x08100c12,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000011,
- 0x0047, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x0027, 0x00000000,
- 0x0001, 0x00000004,
- 0x004f, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x1cff, 0x00000000,
- 0x0001, 0x00000011,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0000
-};
-
-static uint32_t nv94_ctxprog[] = {
- 0x0070008e, 0x0070009c, 0x00200020, 0x00600008, 0x0050004c, 0x00400e89,
- 0x00200000, 0x00600007, 0x00300000, 0x00c000ff, 0x00200000, 0x008000ff,
- 0x00700009, 0x0041324d, 0x00402944, 0x00402905, 0x0040290d, 0x00410e06,
- 0x00600005, 0x004015c5, 0x00600011, 0x0040270b, 0x004021c5, 0x00700000,
- 0x00700081, 0x00600004, 0x0050004a, 0x00219440, 0x00600007, 0x00c02701,
- 0x0020002e, 0x00800001, 0x005000cb, 0x0090ffff, 0x0091ffff, 0x00200020,
- 0x00600008, 0x0050004c, 0x00600009, 0x00410e45, 0x0041294d, 0x0070009d,
- 0x00402dcf, 0x0070009f, 0x0050009f, 0x00402ac0, 0x00200080, 0x00600008,
- 0x00402a4f, 0x00402ac0, 0x004030cc, 0x00700081, 0x00200000, 0x00600006,
- 0x00700000, 0x00111bfc, 0x00700083, 0x00300000, 0x00219440, 0x00600007,
- 0x00c00a01, 0x0020001e, 0x00800001, 0x005000cb, 0x00c000ff, 0x00700080,
- 0x00700083, 0x00200047, 0x00600006, 0x0011020a, 0x00200380, 0x00600007,
- 0x00300000, 0x00c000ff, 0x00c800ff, 0x00411907, 0x00202dd2, 0x008000ff,
- 0x0040508c, 0x005000cb, 0x00a0023f, 0x00200040, 0x00600006, 0x0070000f,
- 0x00170202, 0x0011020a, 0x00200032, 0x0010020d, 0x001c0242, 0x00120302,
- 0x00140402, 0x00180500, 0x00130509, 0x00150550, 0x00110605, 0x0020000f,
- 0x00100607, 0x00110700, 0x00110900, 0x00120902, 0x00110a00, 0x00160b02,
- 0x00120b28, 0x00140b2b, 0x00110c01, 0x00111400, 0x00111405, 0x00111407,
- 0x00111409, 0x0011140b, 0x002000cc, 0x00101500, 0x0040790f, 0x0040794b,
- 0x00217240, 0x00600007, 0x0020043f, 0x008800ff, 0x0070008f, 0x0040798c,
- 0x005000cb, 0x00000000, 0x00141a05, 0x00131a0c, 0x00131c00, 0x00121c04,
- 0x00141c20, 0x00111c25, 0x00131c40, 0x00121c44, 0x00141c60, 0x00111c65,
- 0x00131c80, 0x00121c84, 0x00141ca0, 0x00111ca5, 0x00131cc0, 0x00121cc4,
- 0x00141ce0, 0x00111ce5, 0x00131f00, 0x00191f40, 0x0040a1e0, 0x002001ca,
- 0x00600006, 0x00200044, 0x00102080, 0x001120c6, 0x001520c9, 0x001920d0,
- 0x00122100, 0x00122103, 0x00162200, 0x00122207, 0x00112280, 0x00112300,
- 0x00112302, 0x00122380, 0x0011238b, 0x00112394, 0x0011239c, 0x0040bee1,
- 0x00200231, 0x00600006, 0x00200044, 0x00102480, 0x0040af0f, 0x0040af4b,
- 0x00217240, 0x00600007, 0x0020043f, 0x008800ff, 0x0070008f, 0x0040af8c,
- 0x005000cb, 0x00000000, 0x001124c6, 0x001524c9, 0x001924d0, 0x00122500,
- 0x00122503, 0x00162600, 0x00122607, 0x00112680, 0x00112700, 0x00112702,
- 0x00122780, 0x0011278b, 0x00112794, 0x0011279c, 0x0040d1e2, 0x00200298,
- 0x00600006, 0x00200044, 0x00102880, 0x001128c6, 0x001528c9, 0x001928d0,
- 0x00122900, 0x00122903, 0x00162a00, 0x00122a07, 0x00112a80, 0x00112b00,
- 0x00112b02, 0x00122b80, 0x00112b8b, 0x00112b94, 0x00112b9c, 0x0040eee3,
- 0x002002ff, 0x00600006, 0x00200044, 0x00102c80, 0x0040df0f, 0x0040df4b,
- 0x00217240, 0x00600007, 0x0020043f, 0x008800ff, 0x0070008f, 0x0040df8c,
- 0x005000cb, 0x00000000, 0x00112cc6, 0x00152cc9, 0x00192cd0, 0x00122d00,
- 0x00122d03, 0x00162e00, 0x00122e07, 0x00112e80, 0x00112f00, 0x00112f02,
- 0x00122f80, 0x00112f8b, 0x00112f94, 0x00112f9c, 0x00000000, 0x0040f50f,
- 0x005000cb, 0x00217240, 0x00600007, 0x0020043f, 0x008800ff, 0x005000cb,
- 0x0040f887, 0x0060000a, 0x00000000, 0x00410700, 0x007000a0, 0x00700080,
- 0x00200380, 0x00600007, 0x00200004, 0x00c000ff, 0x008000ff, 0x005000cb,
- 0x00700000, 0x00200000, 0x00600006, 0x00111bfe, 0x0041294d, 0x00700000,
- 0x00200000, 0x00600006, 0x00111bfe, 0x00700080, 0x0070001d, 0x0040114d,
- 0x00700081, 0x00600004, 0x0050004a, 0x00411388, 0x0060000b, 0x00200000,
- 0x00600006, 0x00700000, 0x0041290b, 0x00111bfd, 0x0040424d, 0x00202dd2,
- 0x008000fd, 0x005000cb, 0x00c00002, 0x00200380, 0x00600007, 0x00200160,
- 0x00800002, 0x005000cb, 0x00c01802, 0x00202c72, 0x00800002, 0x005000cb,
- 0x00404e4d, 0x0060000b, 0x0041274d, 0x00700001, 0x00700003, 0x00412d06,
- 0x00412e05, 0x0060000d, 0x00700005, 0x0070000d, 0x00700006, 0x0070000b,
- 0x0070000e, 0x0070001c, 0x0060000c, ~0
-};
-
-static unsigned nv94_ctxvals[] = {
- 0x0043, 0x00000000,
- 0x0001, 0x00000030,
- 0x0008, 0x00000000,
- 0x0001, 0x00000002,
- 0x0028, 0x00000000,
- 0x0001, 0x00000003,
- 0x0001, 0x00001000,
- 0x000f, 0x00000000,
- 0x0001, 0x0000fe0c,
- 0x0004, 0x00000000,
- 0x0001, 0x00001000,
- 0x000a, 0x00000000,
- 0x0001, 0x00000187,
- 0x0004, 0x00000000,
- 0x0001, 0x00001018,
- 0x0001, 0x000000ff,
- 0x000e, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x044d00df,
- 0x0001, 0x00000000,
- 0x0001, 0x00000600,
- 0x0005, 0x00000000,
- 0x0001, 0x01000000,
- 0x0001, 0x000000ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000400,
- 0x0005, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000080,
- 0x0001, 0x00000004,
- 0x0006, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0005, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0001, 0x00000000,
- 0x0002, 0x00000001,
- 0x0001, 0x00000000,
- 0x0003, 0x00000001,
- 0x0001, 0x00000004,
- 0x0003, 0x00000001,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0001, 0x00000007,
- 0x0003, 0x00000001,
- 0x0004, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0001, 0x00000001,
- 0x0001, 0x00000100,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000100,
- 0x0004, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0004, 0x00000000,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000000,
- 0x0001, 0x00000008,
- 0x0001, 0x00000014,
- 0x0001, 0x00000000,
- 0x0001, 0x00000029,
- 0x0001, 0x00000027,
- 0x0001, 0x00000026,
- 0x0001, 0x00000008,
- 0x0001, 0x00000004,
- 0x0001, 0x00000027,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000002,
- 0x0001, 0x00000003,
- 0x0001, 0x00000004,
- 0x0001, 0x00000005,
- 0x0001, 0x00000006,
- 0x0001, 0x00000007,
- 0x0001, 0x00000001,
- 0x0010, 0x00000000,
- 0x0001, 0x000000cf,
- 0x000b, 0x00000000,
- 0x0001, 0x00000080,
- 0x0002, 0x00000004,
- 0x0001, 0x00000003,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000012,
- 0x0001, 0x00000010,
- 0x0001, 0x0000000c,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000002,
- 0x0001, 0x00000004,
- 0x0002, 0x00000000,
- 0x0001, 0x003fffff,
- 0x0001, 0x00001fff,
- 0x0009, 0x00000000,
- 0x0001, 0x00000004,
- 0x0001, 0x00000014,
- 0x0001, 0x00000001,
- 0x0002, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00001000,
- 0x0001, 0x00000e00,
- 0x0001, 0x00001000,
- 0x0001, 0x00001e00,
- 0x0001, 0x00000000,
- 0x0005, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x00000200,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0002, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000070,
- 0x0001, 0x00000080,
- 0x0003, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0003, 0x00000000,
- 0x0001, 0x000000cf,
- 0x0001, 0x00000000,
- 0x0001, 0x00000002,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0002, 0x000000cf,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001f80,
- 0x0005, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x3b74f821,
- 0x0001, 0x89058001,
- 0x0001, 0x00000000,
- 0x0001, 0x00001000,
- 0x0001, 0x0000001f,
- 0x0001, 0x027c10fa,
- 0x0001, 0x400000c0,
- 0x0001, 0xb7892080,
- 0x0002, 0x00000000,
- 0x0001, 0x00390040,
- 0x0001, 0x00000000,
- 0x0001, 0x00000022,
- 0x0002, 0x00000000,
- 0x0001, 0x00390040,
- 0x0001, 0x00000022,
- 0x0005, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x10880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x10880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x0003, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x10880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x10880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x0003, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x10880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x10880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x0003, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x10880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0008, 0x00000000,
- 0x0001, 0x01800000,
- 0x0001, 0x00160000,
- 0x0001, 0x01800000,
- 0x0003, 0x00000000,
- 0x0001, 0x0003ffff,
- 0x0001, 0x10880000,
- 0x0008, 0x00000000,
- 0x0001, 0x00010401,
- 0x0001, 0x00000000,
- 0x0001, 0x00000078,
- 0x0001, 0x00000000,
- 0x0001, 0x000000bf,
- 0x0001, 0x00000000,
- 0x0001, 0x00001210,
- 0x0001, 0x08000080,
- 0x0009, 0x00000000,
- 0x0001, 0x00027070,
- 0x0002, 0x00000000,
- 0x0001, 0x03ffffff,
- 0x0005, 0x00000000,
- 0x0001, 0x00120407,
- 0x0001, 0x05091507,
- 0x0001, 0x05010202,
- 0x0001, 0x00030201,
- 0x0006, 0x00000000,
- 0x0001, 0x00000040,
- 0x0001, 0x0d0c0b0a,
- 0x0001, 0x00141210,
- 0x0001, 0x000001f0,
- 0x0001, 0x00000001,
- 0x0001, 0x00000003,
- 0x0002, 0x00000000,
- 0x0001, 0x00039e00,
- 0x0001, 0x00000100,
- 0x0001, 0x00003800,
- 0x0001, 0x00404040,
- 0x0001, 0x0000ff0a,
- 0x0001, 0x00000000,
- 0x0001, 0x0077f005,
- 0x0001, 0x003f7fff,
- 0x0029, 0x00000000,
- 0x0002, 0x00000004,
- 0x0013, 0x00000000,
- 0x0001, 0x0000000f,
- 0x0021, 0x00000000,
- 0x0001, 0x00000002,
- 0x0005, 0x00000000,
- 0x0001, 0x00000020,
- 0x0009, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x0067, 0x00000000,
- 0x0001, 0x00000001,
- 0x0002, 0x00000004,
- 0x0003, 0x00000000,
- 0x0001, 0x0000001a,
- 0x0001, 0x00000000,
- 0x0001, 0x00000010,
- 0x0002, 0x00000004,
- 0x0006, 0x00000000,
- 0x0002, 0x00608080,
- 0x000d, 0x00000000,
- 0x0001, 0x00000001,
- 0x0018, 0x00000000,
- 0x0002, 0x00000004,
- 0x0016, 0x00000000,
- 0x0002, 0x00000004,
- 0x0005, 0x00000000,
- 0x0001, 0x00000002,
- 0x0002, 0x00000004,
- 0x0006, 0x00000000,
- 0x0002, 0x00000080,
- 0x0006, 0x00000000,
- 0x0002, 0x00000004,
- 0x000b, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000004,
- 0x000f, 0x00000000,
- 0x0001, 0x00000004,
- 0x0007, 0x00000000,
- 0x0001, 0x00000008,
- 0x0009, 0x00000000,
- 0x0001, 0x00000001,
- 0x0005, 0x00000000,
- 0x0001, 0x000007ff,
- 0x0001, 0x00000000,
- 0x0001, 0x00000010,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0055, 0x00000000,
- 0x0001, 0x0000000f,
- 0x0049, 0x00000000,
- 0x0001, 0x00000010,
- 0x0038, 0x00000000,
- 0x0002, 0x00000004,
- 0x0006, 0x00000000,
- 0x0002, 0x00000080,
- 0x0006, 0x00000000,
- 0x0002, 0x00000004,
- 0x0006, 0x00000000,
- 0x0002, 0x03020100,
- 0x0006, 0x00000000,
- 0x0002, 0x00000003,
- 0x0006, 0x00000000,
- 0x0002, 0x00000004,
- 0x0025, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0002, 0x00000004,
- 0x0005, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0002, 0x00000003,
- 0x0005, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0002, 0x00000004,
- 0x0005, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x00cf, 0x00000000,
- 0x0001, 0x00000010,
- 0x000f, 0x00000000,
- 0x0001, 0x0000003f,
- 0x0037, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x0067, 0x00000000,
- 0x0001, 0x00000011,
- 0x003f, 0x00000000,
- 0x0001, 0x0000000f,
- 0x003f, 0x00000000,
- 0x0001, 0x00000011,
- 0x0037, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x000f, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x00af, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x001f, 0x00000000,
- 0x0001, 0x00000011,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x031f, 0x00000000,
- 0x0001, 0x00000002,
- 0x000f, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x0067, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000010,
- 0x0017, 0x00000000,
- 0x0001, 0x00000001,
- 0x0037, 0x00000000,
- 0x0001, 0x00000002,
- 0x0047, 0x00000000,
- 0x0001, 0x00000001,
- 0x0005, 0x00000000,
- 0x0001, 0x0000000f,
- 0x0001, 0x00000000,
- 0x0001, 0x00000010,
- 0x000d, 0x00000000,
- 0x0001, 0x00000001,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x009f, 0x00000000,
- 0x0001, 0x00000010,
- 0x0087, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x0007, 0x00000000,
- 0x0001, 0x3f800000,
- 0x00cf, 0x00000000,
- 0x0001, 0x00000010,
- 0x000f, 0x00000000,
- 0x0001, 0x0000003f,
- 0x0037, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x00000001,
- 0x000d, 0x00000000,
- 0x0001, 0x0000000f,
- 0x0001, 0x00000000,
- 0x0001, 0x00000001,
- 0x0067, 0x00000000,
- 0x0001, 0x00000011,
- 0x003f, 0x00000000,
- 0x0001, 0x0000000f,
- 0x003f, 0x00000000,
- 0x0001, 0x00000011,
- 0x0037, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x000f, 0x00000000,
- 0x0001, 0x001ffe67,
- 0x000f, 0x00000000,
- 0x0001, 0x0fac6881,
- 0x00af, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000002,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
- 0x0007, 0x00000000,
- 0x0001, 0x00000001,
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-};
-
-#endif
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-
-typedef struct {
- uint32_t save1700[5]; /* 0x1700->0x1710 */
-
- struct nouveau_gpuobj_ref *pramin_pt;
- struct nouveau_gpuobj_ref *pramin_bar;
-} nv50_instmem_priv;
-
-#define NV50_INSTMEM_PAGE_SHIFT 12
-#define NV50_INSTMEM_PAGE_SIZE (1 << NV50_INSTMEM_PAGE_SHIFT)
-#define NV50_INSTMEM_PT_SIZE(a) (((a) >> 12) << 3)
-
-/*NOTE: - Assumes 0x1700 already covers the correct MiB of PRAMIN
- */
-#define BAR0_WI32(g,o,v) do { \
- uint32_t offset; \
- if ((g)->im_backing) { \
- offset = (g)->im_backing->start; \
- } else { \
- offset = chan->ramin->gpuobj->im_backing->start; \
- offset += (g)->im_pramin->start; \
- } \
- offset += (o); \
- NV_WRITE(NV_RAMIN + (offset & 0xfffff), (v)); \
-} while(0)
-
-int
-nv50_instmem_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_channel *chan;
- uint32_t c_offset, c_size, c_ramfc, c_vmpd, c_base, pt_size;
- nv50_instmem_priv *priv;
- int ret, i;
- uint32_t v;
-
- priv = drm_calloc(1, sizeof(*priv), DRM_MEM_DRIVER);
- if (!priv)
- return -ENOMEM;
- dev_priv->Engine.instmem.priv = priv;
-
- /* Save state, will restore at takedown. */
- for (i = 0x1700; i <= 0x1710; i+=4)
- priv->save1700[(i-0x1700)/4] = NV_READ(i);
-
- /* Reserve the last MiB of VRAM, we should probably try to avoid
- * setting up the below tables over the top of the VBIOS image at
- * some point.
- */
- dev_priv->ramin_rsvd_vram = 1 << 20;
- c_offset = nouveau_mem_fb_amount(dev) - dev_priv->ramin_rsvd_vram;
- c_size = 128 << 10;
- c_vmpd = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x1400 : 0x200;
- c_ramfc = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x0 : 0x20;
- c_base = c_vmpd + 0x4000;
- pt_size = NV50_INSTMEM_PT_SIZE(dev_priv->ramin->size);
-
- DRM_DEBUG(" Rsvd VRAM base: 0x%08x\n", c_offset);
- DRM_DEBUG(" VBIOS image: 0x%08x\n", (NV_READ(0x619f04)&~0xff)<<8);
- DRM_DEBUG(" Aperture size: %d MiB\n",
- (uint32_t)dev_priv->ramin->size >> 20);
- DRM_DEBUG(" PT size: %d KiB\n", pt_size >> 10);
-
- NV_WRITE(NV50_PUNK_BAR0_PRAMIN, (c_offset >> 16));
-
- /* Create a fake channel, and use it as our "dummy" channels 0/127.
- * The main reason for creating a channel is so we can use the gpuobj
- * code. However, it's probably worth noting that NVIDIA also setup
- * their channels 0/127 with the same values they configure here.
- * So, there may be some other reason for doing this.
- *
- * Have to create the entire channel manually, as the real channel
- * creation code assumes we have PRAMIN access, and we don't until
- * we're done here.
- */
- chan = drm_calloc(1, sizeof(*chan), DRM_MEM_DRIVER);
- if (!chan)
- return -ENOMEM;
- chan->id = 0;
- chan->dev = dev;
- chan->file_priv = (struct drm_file *)-2;
- dev_priv->fifos[0] = dev_priv->fifos[127] = chan;
-
- /* Channel's PRAMIN object + heap */
- if ((ret = nouveau_gpuobj_new_fake(dev, 0, c_offset, 128<<10, 0,
- NULL, &chan->ramin)))
- return ret;
-
- if (nouveau_mem_init_heap(&chan->ramin_heap, c_base, c_size - c_base))
- return -ENOMEM;
-
- /* RAMFC + zero channel's PRAMIN up to start of VM pagedir */
- if ((ret = nouveau_gpuobj_new_fake(dev, c_ramfc, c_offset + c_ramfc,
- 0x4000, 0, NULL, &chan->ramfc)))
- return ret;
-
- for (i = 0; i < c_vmpd; i += 4)
- BAR0_WI32(chan->ramin->gpuobj, i, 0);
-
- /* VM page directory */
- if ((ret = nouveau_gpuobj_new_fake(dev, c_vmpd, c_offset + c_vmpd,
- 0x4000, 0, &chan->vm_pd, NULL)))
- return ret;
- for (i = 0; i < 0x4000; i += 8) {
- BAR0_WI32(chan->vm_pd, i + 0x00, 0x00000000);
- BAR0_WI32(chan->vm_pd, i + 0x04, 0x00000000);
- }
-
- /* PRAMIN page table, cheat and map into VM at 0x0000000000.
- * We map the entire fake channel into the start of the PRAMIN BAR
- */
- if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pt_size, 0x1000,
- 0, &priv->pramin_pt)))
- return ret;
-
- for (i = 0, v = c_offset; i < pt_size; i+=8, v+=0x1000) {
- if (v < (c_offset + c_size))
- BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, v | 1);
- else
- BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, 0x00000009);
- BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000);
- }
-
- BAR0_WI32(chan->vm_pd, 0x00, priv->pramin_pt->instance | 0x63);
- BAR0_WI32(chan->vm_pd, 0x04, 0x00000000);
-
- /* DMA object for PRAMIN BAR */
- if ((ret = nouveau_gpuobj_new_ref(dev, chan, chan, 0, 6*4, 16, 0,
- &priv->pramin_bar)))
- return ret;
- BAR0_WI32(priv->pramin_bar->gpuobj, 0x00, 0x7fc00000);
- BAR0_WI32(priv->pramin_bar->gpuobj, 0x04, dev_priv->ramin->size - 1);
- BAR0_WI32(priv->pramin_bar->gpuobj, 0x08, 0x00000000);
- BAR0_WI32(priv->pramin_bar->gpuobj, 0x0c, 0x00000000);
- BAR0_WI32(priv->pramin_bar->gpuobj, 0x10, 0x00000000);
- BAR0_WI32(priv->pramin_bar->gpuobj, 0x14, 0x00000000);
-
- /* Poke the relevant regs, and pray it works :) */
- NV_WRITE(NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12));
- NV_WRITE(NV50_PUNK_UNK1710, 0);
- NV_WRITE(NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12) |
- NV50_PUNK_BAR_CFG_BASE_VALID);
- NV_WRITE(NV50_PUNK_BAR1_CTXDMA, 0);
- NV_WRITE(NV50_PUNK_BAR3_CTXDMA, (priv->pramin_bar->instance >> 4) |
- NV50_PUNK_BAR3_CTXDMA_VALID);
-
- /* Assume that praying isn't enough, check that we can re-read the
- * entire fake channel back from the PRAMIN BAR */
- for (i = 0; i < c_size; i+=4) {
- if (NV_READ(NV_RAMIN + i) != NV_RI32(i)) {
- DRM_ERROR("Error reading back PRAMIN at 0x%08x\n", i);
- return -EINVAL;
- }
- }
-
- /* Global PRAMIN heap */
- if (nouveau_mem_init_heap(&dev_priv->ramin_heap,
- c_size, dev_priv->ramin->size - c_size)) {
- dev_priv->ramin_heap = NULL;
- DRM_ERROR("Failed to init RAMIN heap\n");
- }
-
- /*XXX: incorrect, but needed to make hash func "work" */
- dev_priv->ramht_offset = 0x10000;
- dev_priv->ramht_bits = 9;
- dev_priv->ramht_size = (1 << dev_priv->ramht_bits);
- return 0;
-}
-
-void
-nv50_instmem_takedown(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- nv50_instmem_priv *priv = dev_priv->Engine.instmem.priv;
- struct nouveau_channel *chan = dev_priv->fifos[0];
- int i;
-
- DRM_DEBUG("\n");
-
- if (!priv)
- return;
-
- /* Restore state from before init */
- for (i = 0x1700; i <= 0x1710; i+=4)
- NV_WRITE(i, priv->save1700[(i-0x1700)/4]);
-
- nouveau_gpuobj_ref_del(dev, &priv->pramin_bar);
- nouveau_gpuobj_ref_del(dev, &priv->pramin_pt);
-
- /* Destroy dummy channel */
- if (chan) {
- nouveau_gpuobj_del(dev, &chan->vm_pd);
- nouveau_gpuobj_ref_del(dev, &chan->ramfc);
- nouveau_gpuobj_ref_del(dev, &chan->ramin);
- nouveau_mem_takedown(&chan->ramin_heap);
-
- dev_priv->fifos[0] = dev_priv->fifos[127] = NULL;
- drm_free(chan, sizeof(*chan), DRM_MEM_DRIVER);
- }
-
- dev_priv->Engine.instmem.priv = NULL;
- drm_free(priv, sizeof(*priv), DRM_MEM_DRIVER);
-}
-
-int
-nv50_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, uint32_t *sz)
-{
- if (gpuobj->im_backing)
- return -EINVAL;
-
- *sz = (*sz + (NV50_INSTMEM_PAGE_SIZE-1)) & ~(NV50_INSTMEM_PAGE_SIZE-1);
- if (*sz == 0)
- return -EINVAL;
-
- gpuobj->im_backing = nouveau_mem_alloc(dev, NV50_INSTMEM_PAGE_SIZE,
- *sz, NOUVEAU_MEM_FB |
- NOUVEAU_MEM_NOVM,
- (struct drm_file *)-2);
- if (!gpuobj->im_backing) {
- DRM_ERROR("Couldn't allocate vram to back PRAMIN pages\n");
- return -ENOMEM;
- }
-
- return 0;
-}
-
-void
-nv50_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- if (gpuobj && gpuobj->im_backing) {
- if (gpuobj->im_bound)
- dev_priv->Engine.instmem.unbind(dev, gpuobj);
- nouveau_mem_free(dev, gpuobj->im_backing);
- gpuobj->im_backing = NULL;
- }
-}
-
-int
-nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- nv50_instmem_priv *priv = dev_priv->Engine.instmem.priv;
- uint32_t pte, pte_end, vram;
-
- if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound)
- return -EINVAL;
-
- DRM_DEBUG("st=0x%0llx sz=0x%0llx\n",
- gpuobj->im_pramin->start, gpuobj->im_pramin->size);
-
- pte = (gpuobj->im_pramin->start >> 12) << 3;
- pte_end = ((gpuobj->im_pramin->size >> 12) << 3) + pte;
- vram = gpuobj->im_backing->start;
-
- DRM_DEBUG("pramin=0x%llx, pte=%d, pte_end=%d\n",
- gpuobj->im_pramin->start, pte, pte_end);
- DRM_DEBUG("first vram page: 0x%llx\n",
- gpuobj->im_backing->start);
-
- while (pte < pte_end) {
- INSTANCE_WR(priv->pramin_pt->gpuobj, (pte + 0)/4, vram | 1);
- INSTANCE_WR(priv->pramin_pt->gpuobj, (pte + 4)/4, 0x00000000);
-
- pte += 8;
- vram += NV50_INSTMEM_PAGE_SIZE;
- }
-
- NV_WRITE(0x070000, 0x00000001);
- while(NV_READ(0x070000) & 1);
- NV_WRITE(0x100c80, 0x00040001);
- while(NV_READ(0x100c80) & 1);
- NV_WRITE(0x100c80, 0x00060001);
- while(NV_READ(0x100c80) & 1);
-
- gpuobj->im_bound = 1;
- return 0;
-}
-
-int
-nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- nv50_instmem_priv *priv = dev_priv->Engine.instmem.priv;
- uint32_t pte, pte_end;
-
- if (gpuobj->im_bound == 0)
- return -EINVAL;
-
- pte = (gpuobj->im_pramin->start >> 12) << 3;
- pte_end = ((gpuobj->im_pramin->size >> 12) << 3) + pte;
- while (pte < pte_end) {
- INSTANCE_WR(priv->pramin_pt->gpuobj, (pte + 0)/4, 0x00000009);
- INSTANCE_WR(priv->pramin_pt->gpuobj, (pte + 4)/4, 0x00000000);
- pte += 8;
- }
-
- gpuobj->im_bound = 0;
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-
-int
-nv50_mc_init(struct drm_device *dev)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
-
- NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF);
-
- return 0;
-}
-
-void nv50_mc_takedown(struct drm_device *dev)
-{
-}
+++ /dev/null
-/* r128_cce.c -- ATI Rage 128 driver -*- linux-c -*-
- * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com
- */
-/*
- * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "r128_drm.h"
-#include "r128_drv.h"
-
-#define R128_FIFO_DEBUG 0
-
-/* CCE microcode (from ATI) */
-static u32 r128_cce_microcode[] = {
- 0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0,
- 1617039951, 0, 774592877, 0, 1987540286, 0, 2307490946U, 0,
- 599558925, 0, 589505315, 0, 596487092, 0, 589505315, 1,
- 11544576, 1, 206848, 1, 311296, 1, 198656, 2, 912273422, 11,
- 262144, 0, 0, 1, 33559837, 1, 7438, 1, 14809, 1, 6615, 12, 28,
- 1, 6614, 12, 28, 2, 23, 11, 18874368, 0, 16790922, 1, 409600, 9,
- 30, 1, 147854772, 16, 420483072, 3, 8192, 0, 10240, 1, 198656,
- 1, 15630, 1, 51200, 10, 34858, 9, 42, 1, 33559823, 2, 10276, 1,
- 15717, 1, 15718, 2, 43, 1, 15936948, 1, 570480831, 1, 14715071,
- 12, 322123831, 1, 33953125, 12, 55, 1, 33559908, 1, 15718, 2,
- 46, 4, 2099258, 1, 526336, 1, 442623, 4, 4194365, 1, 509952, 1,
- 459007, 3, 0, 12, 92, 2, 46, 12, 176, 1, 15734, 1, 206848, 1,
- 18432, 1, 133120, 1, 100670734, 1, 149504, 1, 165888, 1,
- 15975928, 1, 1048576, 6, 3145806, 1, 15715, 16, 2150645232U, 2,
- 268449859, 2, 10307, 12, 176, 1, 15734, 1, 15735, 1, 15630, 1,
- 15631, 1, 5253120, 6, 3145810, 16, 2150645232U, 1, 15864, 2, 82,
- 1, 343310, 1, 1064207, 2, 3145813, 1, 15728, 1, 7817, 1, 15729,
- 3, 15730, 12, 92, 2, 98, 1, 16168, 1, 16167, 1, 16002, 1, 16008,
- 1, 15974, 1, 15975, 1, 15990, 1, 15976, 1, 15977, 1, 15980, 0,
- 15981, 1, 10240, 1, 5253120, 1, 15720, 1, 198656, 6, 110, 1,
- 180224, 1, 103824738, 2, 112, 2, 3145839, 0, 536885440, 1,
- 114880, 14, 125, 12, 206975, 1, 33559995, 12, 198784, 0,
- 33570236, 1, 15803, 0, 15804, 3, 294912, 1, 294912, 3, 442370,
- 1, 11544576, 0, 811612160, 1, 12593152, 1, 11536384, 1,
- 14024704, 7, 310382726, 0, 10240, 1, 14796, 1, 14797, 1, 14793,
- 1, 14794, 0, 14795, 1, 268679168, 1, 9437184, 1, 268449792, 1,
- 198656, 1, 9452827, 1, 1075854602, 1, 1075854603, 1, 557056, 1,
- 114880, 14, 159, 12, 198784, 1, 1109409213, 12, 198783, 1,
- 1107312059, 12, 198784, 1, 1109409212, 2, 162, 1, 1075854781, 1,
- 1073757627, 1, 1075854780, 1, 540672, 1, 10485760, 6, 3145894,
- 16, 274741248, 9, 168, 3, 4194304, 3, 4209949, 0, 0, 0, 256, 14,
- 174, 1, 114857, 1, 33560007, 12, 176, 0, 10240, 1, 114858, 1,
- 33560018, 1, 114857, 3, 33560007, 1, 16008, 1, 114874, 1,
- 33560360, 1, 114875, 1, 33560154, 0, 15963, 0, 256, 0, 4096, 1,
- 409611, 9, 188, 0, 10240, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-static int R128_READ_PLL(struct drm_device * dev, int addr)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
-
- R128_WRITE8(R128_CLOCK_CNTL_INDEX, addr & 0x1f);
- return R128_READ(R128_CLOCK_CNTL_DATA);
-}
-
-#if R128_FIFO_DEBUG
-static void r128_status(drm_r128_private_t * dev_priv)
-{
- printk("GUI_STAT = 0x%08x\n",
- (unsigned int)R128_READ(R128_GUI_STAT));
- printk("PM4_STAT = 0x%08x\n",
- (unsigned int)R128_READ(R128_PM4_STAT));
- printk("PM4_BUFFER_DL_WPTR = 0x%08x\n",
- (unsigned int)R128_READ(R128_PM4_BUFFER_DL_WPTR));
- printk("PM4_BUFFER_DL_RPTR = 0x%08x\n",
- (unsigned int)R128_READ(R128_PM4_BUFFER_DL_RPTR));
- printk("PM4_MICRO_CNTL = 0x%08x\n",
- (unsigned int)R128_READ(R128_PM4_MICRO_CNTL));
- printk("PM4_BUFFER_CNTL = 0x%08x\n",
- (unsigned int)R128_READ(R128_PM4_BUFFER_CNTL));
-}
-#endif
-
-/* ================================================================
- * Engine, FIFO control
- */
-
-static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv)
-{
- u32 tmp;
- int i;
-
- tmp = R128_READ(R128_PC_NGUI_CTLSTAT) | R128_PC_FLUSH_ALL;
- R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp);
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) {
- return 0;
- }
- DRM_UDELAY(1);
- }
-
-#if R128_FIFO_DEBUG
- DRM_ERROR("failed!\n");
-#endif
- return -EBUSY;
-}
-
-static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries)
-{
- int i;
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- int slots = R128_READ(R128_GUI_STAT) & R128_GUI_FIFOCNT_MASK;
- if (slots >= entries)
- return 0;
- DRM_UDELAY(1);
- }
-
-#if R128_FIFO_DEBUG
- DRM_ERROR("failed!\n");
-#endif
- return -EBUSY;
-}
-
-static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv)
-{
- int i, ret;
-
- ret = r128_do_wait_for_fifo(dev_priv, 64);
- if (ret)
- return ret;
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- if (!(R128_READ(R128_GUI_STAT) & R128_GUI_ACTIVE)) {
- r128_do_pixcache_flush(dev_priv);
- return 0;
- }
- DRM_UDELAY(1);
- }
-
-#if R128_FIFO_DEBUG
- DRM_ERROR("failed!\n");
-#endif
- return -EBUSY;
-}
-
-/* ================================================================
- * CCE control, initialization
- */
-
-/* Load the microcode for the CCE */
-static void r128_cce_load_microcode(drm_r128_private_t * dev_priv)
-{
- int i;
-
- DRM_DEBUG("\n");
-
- r128_do_wait_for_idle(dev_priv);
-
- R128_WRITE(R128_PM4_MICROCODE_ADDR, 0);
- for (i = 0; i < 256; i++) {
- R128_WRITE(R128_PM4_MICROCODE_DATAH, r128_cce_microcode[i * 2]);
- R128_WRITE(R128_PM4_MICROCODE_DATAL,
- r128_cce_microcode[i * 2 + 1]);
- }
-}
-
-/* Flush any pending commands to the CCE. This should only be used just
- * prior to a wait for idle, as it informs the engine that the command
- * stream is ending.
- */
-static void r128_do_cce_flush(drm_r128_private_t * dev_priv)
-{
- u32 tmp;
-
- tmp = R128_READ(R128_PM4_BUFFER_DL_WPTR) | R128_PM4_BUFFER_DL_DONE;
- R128_WRITE(R128_PM4_BUFFER_DL_WPTR, tmp);
-}
-
-/* Wait for the CCE to go idle.
- */
-int r128_do_cce_idle(drm_r128_private_t * dev_priv)
-{
- int i;
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- if (GET_RING_HEAD(dev_priv) == dev_priv->ring.tail) {
- int pm4stat = R128_READ(R128_PM4_STAT);
- if (((pm4stat & R128_PM4_FIFOCNT_MASK) >=
- dev_priv->cce_fifo_size) &&
- !(pm4stat & (R128_PM4_BUSY |
- R128_PM4_GUI_ACTIVE))) {
- return r128_do_pixcache_flush(dev_priv);
- }
- }
- DRM_UDELAY(1);
- }
-
-#if R128_FIFO_DEBUG
- DRM_ERROR("failed!\n");
- r128_status(dev_priv);
-#endif
- return -EBUSY;
-}
-
-/* Start the Concurrent Command Engine.
- */
-static void r128_do_cce_start(drm_r128_private_t * dev_priv)
-{
- r128_do_wait_for_idle(dev_priv);
-
- R128_WRITE(R128_PM4_BUFFER_CNTL,
- dev_priv->cce_mode | dev_priv->ring.size_l2qw
- | R128_PM4_BUFFER_CNTL_NOUPDATE);
- R128_READ(R128_PM4_BUFFER_ADDR); /* as per the sample code */
- R128_WRITE(R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN);
-
- dev_priv->cce_running = 1;
-}
-
-/* Reset the Concurrent Command Engine. This will not flush any pending
- * commands, so you must wait for the CCE command stream to complete
- * before calling this routine.
- */
-static void r128_do_cce_reset(drm_r128_private_t * dev_priv)
-{
- R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0);
- R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0);
- dev_priv->ring.tail = 0;
-}
-
-/* Stop the Concurrent Command Engine. This will not flush any pending
- * commands, so you must flush the command stream and wait for the CCE
- * to go idle before calling this routine.
- */
-static void r128_do_cce_stop(drm_r128_private_t * dev_priv)
-{
- R128_WRITE(R128_PM4_MICRO_CNTL, 0);
- R128_WRITE(R128_PM4_BUFFER_CNTL,
- R128_PM4_NONPM4 | R128_PM4_BUFFER_CNTL_NOUPDATE);
-
- dev_priv->cce_running = 0;
-}
-
-/* Reset the engine. This will stop the CCE if it is running.
- */
-static int r128_do_engine_reset(struct drm_device * dev)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- u32 clock_cntl_index, mclk_cntl, gen_reset_cntl;
-
- r128_do_pixcache_flush(dev_priv);
-
- clock_cntl_index = R128_READ(R128_CLOCK_CNTL_INDEX);
- mclk_cntl = R128_READ_PLL(dev, R128_MCLK_CNTL);
-
- R128_WRITE_PLL(R128_MCLK_CNTL,
- mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP);
-
- gen_reset_cntl = R128_READ(R128_GEN_RESET_CNTL);
-
- /* Taken from the sample code - do not change */
- R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl | R128_SOFT_RESET_GUI);
- R128_READ(R128_GEN_RESET_CNTL);
- R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl & ~R128_SOFT_RESET_GUI);
- R128_READ(R128_GEN_RESET_CNTL);
-
- R128_WRITE_PLL(R128_MCLK_CNTL, mclk_cntl);
- R128_WRITE(R128_CLOCK_CNTL_INDEX, clock_cntl_index);
- R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl);
-
- /* Reset the CCE ring */
- r128_do_cce_reset(dev_priv);
-
- /* The CCE is no longer running after an engine reset */
- dev_priv->cce_running = 0;
-
- /* Reset any pending vertex, indirect buffers */
- r128_freelist_reset(dev);
-
- return 0;
-}
-
-static void r128_cce_init_ring_buffer(struct drm_device * dev,
- drm_r128_private_t * dev_priv)
-{
- u32 ring_start;
- u32 tmp;
-
- DRM_DEBUG("\n");
-
- /* The manual (p. 2) says this address is in "VM space". This
- * means it's an offset from the start of AGP space.
- */
-#if __OS_HAS_AGP
- if (!dev_priv->is_pci)
- ring_start = dev_priv->cce_ring->offset - dev->agp->base;
- else
-#endif
- ring_start = dev_priv->cce_ring->offset -
- (unsigned long)dev->sg->virtual;
-
- R128_WRITE(R128_PM4_BUFFER_OFFSET, ring_start | R128_AGP_OFFSET);
-
- R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0);
- R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0);
-
- /* Set watermark control */
- R128_WRITE(R128_PM4_BUFFER_WM_CNTL,
- ((R128_WATERMARK_L / 4) << R128_WMA_SHIFT)
- | ((R128_WATERMARK_M / 4) << R128_WMB_SHIFT)
- | ((R128_WATERMARK_N / 4) << R128_WMC_SHIFT)
- | ((R128_WATERMARK_K / 64) << R128_WB_WM_SHIFT));
-
- /* Force read. Why? Because it's in the examples... */
- R128_READ(R128_PM4_BUFFER_ADDR);
-
- /* Turn on bus mastering */
- tmp = R128_READ(R128_BUS_CNTL) & ~R128_BUS_MASTER_DIS;
- R128_WRITE(R128_BUS_CNTL, tmp);
-}
-
-static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
-{
- drm_r128_private_t *dev_priv;
-
- DRM_DEBUG("\n");
-
- dev_priv = drm_alloc(sizeof(drm_r128_private_t), DRM_MEM_DRIVER);
- if (dev_priv == NULL)
- return -ENOMEM;
-
- memset(dev_priv, 0, sizeof(drm_r128_private_t));
-
- dev_priv->is_pci = init->is_pci;
-
- if (dev_priv->is_pci && !dev->sg) {
- DRM_ERROR("PCI GART memory not allocated!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -EINVAL;
- }
-
- dev_priv->usec_timeout = init->usec_timeout;
- if (dev_priv->usec_timeout < 1 ||
- dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT) {
- DRM_DEBUG("TIMEOUT problem!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -EINVAL;
- }
-
- dev_priv->cce_mode = init->cce_mode;
-
- /* GH: Simple idle check.
- */
- atomic_set(&dev_priv->idle_count, 0);
-
- /* We don't support anything other than bus-mastering ring mode,
- * but the ring can be in either AGP or PCI space for the ring
- * read pointer.
- */
- if ((init->cce_mode != R128_PM4_192BM) &&
- (init->cce_mode != R128_PM4_128BM_64INDBM) &&
- (init->cce_mode != R128_PM4_64BM_128INDBM) &&
- (init->cce_mode != R128_PM4_64BM_64VCBM_64INDBM)) {
- DRM_DEBUG("Bad cce_mode!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -EINVAL;
- }
-
- switch (init->cce_mode) {
- case R128_PM4_NONPM4:
- dev_priv->cce_fifo_size = 0;
- break;
- case R128_PM4_192PIO:
- case R128_PM4_192BM:
- dev_priv->cce_fifo_size = 192;
- break;
- case R128_PM4_128PIO_64INDBM:
- case R128_PM4_128BM_64INDBM:
- dev_priv->cce_fifo_size = 128;
- break;
- case R128_PM4_64PIO_128INDBM:
- case R128_PM4_64BM_128INDBM:
- case R128_PM4_64PIO_64VCBM_64INDBM:
- case R128_PM4_64BM_64VCBM_64INDBM:
- case R128_PM4_64PIO_64VCPIO_64INDPIO:
- dev_priv->cce_fifo_size = 64;
- break;
- }
-
- switch (init->fb_bpp) {
- case 16:
- dev_priv->color_fmt = R128_DATATYPE_RGB565;
- break;
- case 32:
- default:
- dev_priv->color_fmt = R128_DATATYPE_ARGB8888;
- break;
- }
- dev_priv->front_offset = init->front_offset;
- dev_priv->front_pitch = init->front_pitch;
- dev_priv->back_offset = init->back_offset;
- dev_priv->back_pitch = init->back_pitch;
-
- switch (init->depth_bpp) {
- case 16:
- dev_priv->depth_fmt = R128_DATATYPE_RGB565;
- break;
- case 24:
- case 32:
- default:
- dev_priv->depth_fmt = R128_DATATYPE_ARGB8888;
- break;
- }
- dev_priv->depth_offset = init->depth_offset;
- dev_priv->depth_pitch = init->depth_pitch;
- dev_priv->span_offset = init->span_offset;
-
- dev_priv->front_pitch_offset_c = (((dev_priv->front_pitch / 8) << 21) |
- (dev_priv->front_offset >> 5));
- dev_priv->back_pitch_offset_c = (((dev_priv->back_pitch / 8) << 21) |
- (dev_priv->back_offset >> 5));
- dev_priv->depth_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) |
- (dev_priv->depth_offset >> 5) |
- R128_DST_TILE);
- dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) |
- (dev_priv->span_offset >> 5));
-
- dev_priv->sarea = drm_getsarea(dev);
- if (!dev_priv->sarea) {
- DRM_ERROR("could not find sarea!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -EINVAL;
- }
-
- dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
- if (!dev_priv->mmio) {
- DRM_ERROR("could not find mmio region!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -EINVAL;
- }
- dev_priv->cce_ring = drm_core_findmap(dev, init->ring_offset);
- if (!dev_priv->cce_ring) {
- DRM_ERROR("could not find cce ring region!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -EINVAL;
- }
- dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset);
- if (!dev_priv->ring_rptr) {
- DRM_ERROR("could not find ring read pointer!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -EINVAL;
- }
- dev->agp_buffer_token = init->buffers_offset;
- dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
- if (!dev->agp_buffer_map) {
- DRM_ERROR("could not find dma buffer region!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -EINVAL;
- }
-
- if (!dev_priv->is_pci) {
- dev_priv->agp_textures =
- drm_core_findmap(dev, init->agp_textures_offset);
- if (!dev_priv->agp_textures) {
- DRM_ERROR("could not find agp texture region!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -EINVAL;
- }
- }
-
- dev_priv->sarea_priv =
- (drm_r128_sarea_t *) ((u8 *) dev_priv->sarea->handle +
- init->sarea_priv_offset);
-
-#if __OS_HAS_AGP
- if (!dev_priv->is_pci) {
- drm_core_ioremap(dev_priv->cce_ring, dev);
- drm_core_ioremap(dev_priv->ring_rptr, dev);
- drm_core_ioremap(dev->agp_buffer_map, dev);
- if (!dev_priv->cce_ring->handle ||
- !dev_priv->ring_rptr->handle ||
- !dev->agp_buffer_map->handle) {
- DRM_ERROR("Could not ioremap agp regions!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -ENOMEM;
- }
- } else
-#endif
- {
- dev_priv->cce_ring->handle = (void *)dev_priv->cce_ring->offset;
- dev_priv->ring_rptr->handle =
- (void *)dev_priv->ring_rptr->offset;
- dev->agp_buffer_map->handle =
- (void *)dev->agp_buffer_map->offset;
- }
-
-#if __OS_HAS_AGP
- if (!dev_priv->is_pci)
- dev_priv->cce_buffers_offset = dev->agp->base;
- else
-#endif
- dev_priv->cce_buffers_offset = (unsigned long)dev->sg->virtual;
-
- dev_priv->ring.start = (u32 *) dev_priv->cce_ring->handle;
- dev_priv->ring.end = ((u32 *) dev_priv->cce_ring->handle
- + init->ring_size / sizeof(u32));
- dev_priv->ring.size = init->ring_size;
- dev_priv->ring.size_l2qw = drm_order(init->ring_size / 8);
-
- dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;
-
- dev_priv->ring.high_mark = 128;
-
- dev_priv->sarea_priv->last_frame = 0;
- R128_WRITE(R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
-
- dev_priv->sarea_priv->last_dispatch = 0;
- R128_WRITE(R128_LAST_DISPATCH_REG, dev_priv->sarea_priv->last_dispatch);
-
-#if __OS_HAS_AGP
- if (dev_priv->is_pci) {
-#endif
- dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
- dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN;
- dev_priv->gart_info.table_size = R128_PCIGART_TABLE_SIZE;
- dev_priv->gart_info.addr = NULL;
- dev_priv->gart_info.bus_addr = 0;
- dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCI;
- if (!drm_ati_pcigart_init(dev, &dev_priv->gart_info)) {
- DRM_ERROR("failed to init PCI GART!\n");
- dev->dev_private = (void *)dev_priv;
- r128_do_cleanup_cce(dev);
- return -ENOMEM;
- }
- R128_WRITE(R128_PCI_GART_PAGE, dev_priv->gart_info.bus_addr);
-#if __OS_HAS_AGP
- }
-#endif
-
- r128_cce_init_ring_buffer(dev, dev_priv);
- r128_cce_load_microcode(dev_priv);
-
- dev->dev_private = (void *)dev_priv;
-
- r128_do_engine_reset(dev);
-
- return 0;
-}
-
-int r128_do_cleanup_cce(struct drm_device * dev)
-{
-
- /* Make sure interrupts are disabled here because the uninstall ioctl
- * may not have been called from userspace and after dev_private
- * is freed, it's too late.
- */
- if (dev->irq_enabled)
- drm_irq_uninstall(dev);
-
- if (dev->dev_private) {
- drm_r128_private_t *dev_priv = dev->dev_private;
-
-#if __OS_HAS_AGP
- if (!dev_priv->is_pci) {
- if (dev_priv->cce_ring != NULL)
- drm_core_ioremapfree(dev_priv->cce_ring, dev);
- if (dev_priv->ring_rptr != NULL)
- drm_core_ioremapfree(dev_priv->ring_rptr, dev);
- if (dev->agp_buffer_map != NULL) {
- drm_core_ioremapfree(dev->agp_buffer_map, dev);
- dev->agp_buffer_map = NULL;
- }
- } else
-#endif
- {
- if (dev_priv->gart_info.bus_addr)
- if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
- DRM_ERROR("failed to cleanup PCI GART!\n");
- }
-
- drm_free(dev->dev_private, sizeof(drm_r128_private_t),
- DRM_MEM_DRIVER);
- dev->dev_private = NULL;
- }
-
- return 0;
-}
-
-int r128_cce_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_init_t *init = data;
-
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- switch (init->func) {
- case R128_INIT_CCE:
- return r128_do_init_cce(dev, init);
- case R128_CLEANUP_CCE:
- return r128_do_cleanup_cce(dev);
- }
-
- return -EINVAL;
-}
-
-int r128_cce_start(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4) {
- DRM_DEBUG("while CCE running\n");
- return 0;
- }
-
- r128_do_cce_start(dev_priv);
-
- return 0;
-}
-
-/* Stop the CCE. The engine must have been idled before calling this
- * routine.
- */
-int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_cce_stop_t *stop = data;
- int ret;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- /* Flush any pending CCE commands. This ensures any outstanding
- * commands are exectuted by the engine before we turn it off.
- */
- if (stop->flush) {
- r128_do_cce_flush(dev_priv);
- }
-
- /* If we fail to make the engine go idle, we return an error
- * code so that the DRM ioctl wrapper can try again.
- */
- if (stop->idle) {
- ret = r128_do_cce_idle(dev_priv);
- if (ret)
- return ret;
- }
-
- /* Finally, we can turn off the CCE. If the engine isn't idle,
- * we will get some dropped triangles as they won't be fully
- * rendered before the CCE is shut down.
- */
- r128_do_cce_stop(dev_priv);
-
- /* Reset the engine */
- r128_do_engine_reset(dev);
-
- return 0;
-}
-
-/* Just reset the CCE ring. Called as part of an X Server engine reset.
- */
-int r128_cce_reset(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_DEBUG("called before init done\n");
- return -EINVAL;
- }
-
- r128_do_cce_reset(dev_priv);
-
- /* The CCE is no longer running after an engine reset */
- dev_priv->cce_running = 0;
-
- return 0;
-}
-
-int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (dev_priv->cce_running) {
- r128_do_cce_flush(dev_priv);
- }
-
- return r128_do_cce_idle(dev_priv);
-}
-
-int r128_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- return r128_do_engine_reset(dev);
-}
-
-int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- return -EINVAL;
-}
-
-/* ================================================================
- * Freelist management
- */
-#define R128_BUFFER_USED 0xffffffff
-#define R128_BUFFER_FREE 0
-
-#if 0
-static int r128_freelist_init(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_r128_private_t *dev_priv = dev->dev_private;
- struct drm_buf *buf;
- drm_r128_buf_priv_t *buf_priv;
- drm_r128_freelist_t *entry;
- int i;
-
- dev_priv->head = drm_alloc(sizeof(drm_r128_freelist_t), DRM_MEM_DRIVER);
- if (dev_priv->head == NULL)
- return -ENOMEM;
-
- memset(dev_priv->head, 0, sizeof(drm_r128_freelist_t));
- dev_priv->head->age = R128_BUFFER_USED;
-
- for (i = 0; i < dma->buf_count; i++) {
- buf = dma->buflist[i];
- buf_priv = buf->dev_private;
-
- entry = drm_alloc(sizeof(drm_r128_freelist_t), DRM_MEM_DRIVER);
- if (!entry)
- return -ENOMEM;
-
- entry->age = R128_BUFFER_FREE;
- entry->buf = buf;
- entry->prev = dev_priv->head;
- entry->next = dev_priv->head->next;
- if (!entry->next)
- dev_priv->tail = entry;
-
- buf_priv->discard = 0;
- buf_priv->dispatched = 0;
- buf_priv->list_entry = entry;
-
- dev_priv->head->next = entry;
-
- if (dev_priv->head->next)
- dev_priv->head->next->prev = entry;
- }
-
- return 0;
-
-}
-#endif
-
-static struct drm_buf *r128_freelist_get(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_buf_priv_t *buf_priv;
- struct drm_buf *buf;
- int i, t;
-
- /* FIXME: Optimize -- use freelist code */
-
- for (i = 0; i < dma->buf_count; i++) {
- buf = dma->buflist[i];
- buf_priv = buf->dev_private;
- if (buf->file_priv == 0)
- return buf;
- }
-
- for (t = 0; t < dev_priv->usec_timeout; t++) {
- u32 done_age = R128_READ(R128_LAST_DISPATCH_REG);
-
- for (i = 0; i < dma->buf_count; i++) {
- buf = dma->buflist[i];
- buf_priv = buf->dev_private;
- if (buf->pending && buf_priv->age <= done_age) {
- /* The buffer has been processed, so it
- * can now be used.
- */
- buf->pending = 0;
- return buf;
- }
- }
- DRM_UDELAY(1);
- }
-
- DRM_DEBUG("returning NULL!\n");
- return NULL;
-}
-
-void r128_freelist_reset(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
- int i;
-
- for (i = 0; i < dma->buf_count; i++) {
- struct drm_buf *buf = dma->buflist[i];
- drm_r128_buf_priv_t *buf_priv = buf->dev_private;
- buf_priv->age = 0;
- }
-}
-
-/* ================================================================
- * CCE command submission
- */
-
-int r128_wait_ring(drm_r128_private_t * dev_priv, int n)
-{
- drm_r128_ring_buffer_t *ring = &dev_priv->ring;
- int i;
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- r128_update_ring_snapshot(dev_priv);
- if (ring->space >= n)
- return 0;
- DRM_UDELAY(1);
- }
-
- /* FIXME: This is being ignored... */
- DRM_ERROR("failed!\n");
- return -EBUSY;
-}
-
-static int r128_cce_get_buffers(struct drm_device * dev,
- struct drm_file *file_priv,
- struct drm_dma * d)
-{
- int i;
- struct drm_buf *buf;
-
- for (i = d->granted_count; i < d->request_count; i++) {
- buf = r128_freelist_get(dev);
- if (!buf)
- return -EAGAIN;
-
- buf->file_priv = file_priv;
-
- if (DRM_COPY_TO_USER(&d->request_indices[i], &buf->idx,
- sizeof(buf->idx)))
- return -EFAULT;
- if (DRM_COPY_TO_USER(&d->request_sizes[i], &buf->total,
- sizeof(buf->total)))
- return -EFAULT;
-
- d->granted_count++;
- }
- return 0;
-}
-
-int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- int ret = 0;
- struct drm_dma *d = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- /* Please don't send us buffers.
- */
- if (d->send_count != 0) {
- DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
- DRM_CURRENTPID, d->send_count);
- return -EINVAL;
- }
-
- /* We'll send you buffers.
- */
- if (d->request_count < 0 || d->request_count > dma->buf_count) {
- DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
- DRM_CURRENTPID, d->request_count, dma->buf_count);
- return -EINVAL;
- }
-
- d->granted_count = 0;
-
- if (d->request_count) {
- ret = r128_cce_get_buffers(dev, file_priv, d);
- }
-
- return ret;
-}
+++ /dev/null
-/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
- * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com
- */
-/*
- * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- */
-
-#ifndef __R128_DRM_H__
-#define __R128_DRM_H__
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the X server file (r128_sarea.h)
- */
-#ifndef __R128_SAREA_DEFINES__
-#define __R128_SAREA_DEFINES__
-
-/* What needs to be changed for the current vertex buffer?
- */
-#define R128_UPLOAD_CONTEXT 0x001
-#define R128_UPLOAD_SETUP 0x002
-#define R128_UPLOAD_TEX0 0x004
-#define R128_UPLOAD_TEX1 0x008
-#define R128_UPLOAD_TEX0IMAGES 0x010
-#define R128_UPLOAD_TEX1IMAGES 0x020
-#define R128_UPLOAD_CORE 0x040
-#define R128_UPLOAD_MASKS 0x080
-#define R128_UPLOAD_WINDOW 0x100
-#define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
-#define R128_REQUIRE_QUIESCENCE 0x400
-#define R128_UPLOAD_ALL 0x7ff
-
-#define R128_FRONT 0x1
-#define R128_BACK 0x2
-#define R128_DEPTH 0x4
-
-/* Primitive types
- */
-#define R128_POINTS 0x1
-#define R128_LINES 0x2
-#define R128_LINE_STRIP 0x3
-#define R128_TRIANGLES 0x4
-#define R128_TRIANGLE_FAN 0x5
-#define R128_TRIANGLE_STRIP 0x6
-
-/* Vertex/indirect buffer size
- */
-#define R128_BUFFER_SIZE 16384
-
-/* Byte offsets for indirect buffer data
- */
-#define R128_INDEX_PRIM_OFFSET 20
-#define R128_HOSTDATA_BLIT_OFFSET 32
-
-/* Keep these small for testing.
- */
-#define R128_NR_SAREA_CLIPRECTS 12
-
-/* There are 2 heaps (local/AGP). Each region within a heap is a
- * minimum of 64k, and there are at most 64 of them per heap.
- */
-#define R128_LOCAL_TEX_HEAP 0
-#define R128_AGP_TEX_HEAP 1
-#define R128_NR_TEX_HEAPS 2
-#define R128_NR_TEX_REGIONS 64
-#define R128_LOG_TEX_GRANULARITY 16
-
-#define R128_NR_CONTEXT_REGS 12
-
-#define R128_MAX_TEXTURE_LEVELS 11
-#define R128_MAX_TEXTURE_UNITS 2
-
-#endif /* __R128_SAREA_DEFINES__ */
-
-typedef struct {
- /* Context state - can be written in one large chunk */
- unsigned int dst_pitch_offset_c;
- unsigned int dp_gui_master_cntl_c;
- unsigned int sc_top_left_c;
- unsigned int sc_bottom_right_c;
- unsigned int z_offset_c;
- unsigned int z_pitch_c;
- unsigned int z_sten_cntl_c;
- unsigned int tex_cntl_c;
- unsigned int misc_3d_state_cntl_reg;
- unsigned int texture_clr_cmp_clr_c;
- unsigned int texture_clr_cmp_msk_c;
- unsigned int fog_color_c;
-
- /* Texture state */
- unsigned int tex_size_pitch_c;
- unsigned int constant_color_c;
-
- /* Setup state */
- unsigned int pm4_vc_fpu_setup;
- unsigned int setup_cntl;
-
- /* Mask state */
- unsigned int dp_write_mask;
- unsigned int sten_ref_mask_c;
- unsigned int plane_3d_mask_c;
-
- /* Window state */
- unsigned int window_xy_offset;
-
- /* Core state */
- unsigned int scale_3d_cntl;
-} drm_r128_context_regs_t;
-
-/* Setup registers for each texture unit
- */
-typedef struct {
- unsigned int tex_cntl;
- unsigned int tex_combine_cntl;
- unsigned int tex_size_pitch;
- unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
- unsigned int tex_border_color;
-} drm_r128_texture_regs_t;
-
-typedef struct drm_r128_sarea {
- /* The channel for communication of state information to the kernel
- * on firing a vertex buffer.
- */
- drm_r128_context_regs_t context_state;
- drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
- unsigned int dirty;
- unsigned int vertsize;
- unsigned int vc_format;
-
- /* The current cliprects, or a subset thereof.
- */
- struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
- unsigned int nbox;
-
- /* Counters for client-side throttling of rendering clients.
- */
- unsigned int last_frame;
- unsigned int last_dispatch;
-
- struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
- unsigned int tex_age[R128_NR_TEX_HEAPS];
- int ctx_owner;
- int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */
- int pfCurrentPage; /* which buffer is being displayed? */
-} drm_r128_sarea_t;
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (xf86drmR128.h)
- */
-
-/* Rage 128 specific ioctls
- * The device specific ioctl range is 0x40 to 0x79.
- */
-#define DRM_R128_INIT 0x00
-#define DRM_R128_CCE_START 0x01
-#define DRM_R128_CCE_STOP 0x02
-#define DRM_R128_CCE_RESET 0x03
-#define DRM_R128_CCE_IDLE 0x04
-/* 0x05 not used */
-#define DRM_R128_RESET 0x06
-#define DRM_R128_SWAP 0x07
-#define DRM_R128_CLEAR 0x08
-#define DRM_R128_VERTEX 0x09
-#define DRM_R128_INDICES 0x0a
-#define DRM_R128_BLIT 0x0b
-#define DRM_R128_DEPTH 0x0c
-#define DRM_R128_STIPPLE 0x0d
-/* 0x0e not used */
-#define DRM_R128_INDIRECT 0x0f
-#define DRM_R128_FULLSCREEN 0x10
-#define DRM_R128_CLEAR2 0x11
-#define DRM_R128_GETPARAM 0x12
-#define DRM_R128_FLIP 0x13
-
-#define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
-#define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START)
-#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
-#define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
-#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
-/* 0x05 not used */
-#define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET)
-#define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP)
-#define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
-#define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
-#define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
-#define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
-#define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
-#define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
-/* 0x0e not used */
-#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
-#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
-#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
-#define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
-#define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP)
-
-typedef struct drm_r128_init {
- enum {
- R128_INIT_CCE = 0x01,
- R128_CLEANUP_CCE = 0x02
- } func;
- unsigned long sarea_priv_offset;
- int is_pci;
- int cce_mode;
- int cce_secure;
- int ring_size;
- int usec_timeout;
-
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
- unsigned int span_offset;
-
- unsigned long fb_offset;
- unsigned long mmio_offset;
- unsigned long ring_offset;
- unsigned long ring_rptr_offset;
- unsigned long buffers_offset;
- unsigned long agp_textures_offset;
-} drm_r128_init_t;
-
-typedef struct drm_r128_cce_stop {
- int flush;
- int idle;
-} drm_r128_cce_stop_t;
-
-typedef struct drm_r128_clear {
- unsigned int flags;
- unsigned int clear_color;
- unsigned int clear_depth;
- unsigned int color_mask;
- unsigned int depth_mask;
-} drm_r128_clear_t;
-
-typedef struct drm_r128_vertex {
- int prim;
- int idx; /* Index of vertex buffer */
- int count; /* Number of vertices in buffer */
- int discard; /* Client finished with buffer? */
-} drm_r128_vertex_t;
-
-typedef struct drm_r128_indices {
- int prim;
- int idx;
- int start;
- int end;
- int discard; /* Client finished with buffer? */
-} drm_r128_indices_t;
-
-typedef struct drm_r128_blit {
- int idx;
- int pitch;
- int offset;
- int format;
- unsigned short x, y;
- unsigned short width, height;
-} drm_r128_blit_t;
-
-typedef struct drm_r128_depth {
- enum {
- R128_WRITE_SPAN = 0x01,
- R128_WRITE_PIXELS = 0x02,
- R128_READ_SPAN = 0x03,
- R128_READ_PIXELS = 0x04
- } func;
- int n;
- int __user *x;
- int __user *y;
- unsigned int __user *buffer;
- unsigned char __user *mask;
-} drm_r128_depth_t;
-
-typedef struct drm_r128_stipple {
- unsigned int __user *mask;
-} drm_r128_stipple_t;
-
-typedef struct drm_r128_indirect {
- int idx;
- int start;
- int end;
- int discard;
-} drm_r128_indirect_t;
-
-typedef struct drm_r128_fullscreen {
- enum {
- R128_INIT_FULLSCREEN = 0x01,
- R128_CLEANUP_FULLSCREEN = 0x02
- } func;
-} drm_r128_fullscreen_t;
-
-/* 2.3: An ioctl to get parameters that aren't available to the 3d
- * client any other way.
- */
-#define R128_PARAM_IRQ_NR 1
-
-typedef struct drm_r128_getparam {
- int param;
- void __user *value;
-} drm_r128_getparam_t;
-
-#endif
+++ /dev/null
-/* r128_drv.h -- Private header for r128 driver -*- linux-c -*-
- * Created: Mon Dec 13 09:51:11 1999 by faith@precisioninsight.com
- */
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Rickard E. (Rik) Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- * Michel D�zer <daenzerm@student.ethz.ch>
- */
-
-#ifndef __R128_DRV_H__
-#define __R128_DRV_H__
-
-/* General customization:
- */
-#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
-
-#define DRIVER_NAME "r128"
-#define DRIVER_DESC "ATI Rage 128"
-#define DRIVER_DATE "20030725"
-
-/* Interface history:
- *
- * ?? - ??
- * 2.4 - Add support for ycbcr textures (no new ioctls)
- * 2.5 - Add FLIP ioctl, disable FULLSCREEN.
- */
-#define DRIVER_MAJOR 2
-#define DRIVER_MINOR 5
-#define DRIVER_PATCHLEVEL 0
-
-#define GET_RING_HEAD(dev_priv) R128_READ( R128_PM4_BUFFER_DL_RPTR )
-
-typedef struct drm_r128_freelist {
- unsigned int age;
- struct drm_buf *buf;
- struct drm_r128_freelist *next;
- struct drm_r128_freelist *prev;
-} drm_r128_freelist_t;
-
-typedef struct drm_r128_ring_buffer {
- u32 *start;
- u32 *end;
- int size;
- int size_l2qw;
-
- u32 tail;
- u32 tail_mask;
- int space;
-
- int high_mark;
-} drm_r128_ring_buffer_t;
-
-typedef struct drm_r128_private {
- drm_r128_ring_buffer_t ring;
- drm_r128_sarea_t *sarea_priv;
-
- int cce_mode;
- int cce_fifo_size;
- int cce_running;
-
- drm_r128_freelist_t *head;
- drm_r128_freelist_t *tail;
-
- int usec_timeout;
- int is_pci;
- unsigned long cce_buffers_offset;
-
- atomic_t idle_count;
-
- int page_flipping;
- int current_page;
- u32 crtc_offset;
- u32 crtc_offset_cntl;
-
- atomic_t vbl_received;
-
- u32 color_fmt;
- unsigned int front_offset;
- unsigned int front_pitch;
- unsigned int back_offset;
- unsigned int back_pitch;
-
- u32 depth_fmt;
- unsigned int depth_offset;
- unsigned int depth_pitch;
- unsigned int span_offset;
-
- u32 front_pitch_offset_c;
- u32 back_pitch_offset_c;
- u32 depth_pitch_offset_c;
- u32 span_pitch_offset_c;
-
- drm_local_map_t *sarea;
- drm_local_map_t *mmio;
- drm_local_map_t *cce_ring;
- drm_local_map_t *ring_rptr;
- drm_local_map_t *agp_textures;
- struct drm_ati_pcigart_info gart_info;
-} drm_r128_private_t;
-
-typedef struct drm_r128_buf_priv {
- u32 age;
- int prim;
- int discard;
- int dispatched;
- drm_r128_freelist_t *list_entry;
-} drm_r128_buf_priv_t;
-
-extern struct drm_ioctl_desc r128_ioctls[];
-extern int r128_max_ioctl;
-
- /* r128_cce.c */
-extern int r128_cce_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int r128_cce_start(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int r128_cce_reset(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int r128_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
-
-extern void r128_freelist_reset(struct drm_device * dev);
-
-extern int r128_wait_ring(drm_r128_private_t * dev_priv, int n);
-
-extern int r128_do_cce_idle(drm_r128_private_t * dev_priv);
-extern int r128_do_cleanup_cce(struct drm_device * dev);
-
-extern int r128_enable_vblank(struct drm_device *dev, int crtc);
-extern void r128_disable_vblank(struct drm_device *dev, int crtc);
-extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc);
-extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS);
-extern void r128_driver_irq_preinstall(struct drm_device * dev);
-extern int r128_driver_irq_postinstall(struct drm_device * dev);
-extern void r128_driver_irq_uninstall(struct drm_device * dev);
-extern void r128_driver_lastclose(struct drm_device * dev);
-extern int r128_driver_load(struct drm_device * dev, unsigned long flags);
-extern void r128_driver_preclose(struct drm_device * dev,
- struct drm_file *file_priv);
-
-extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg);
-
-/* Register definitions, register access macros and drmAddMap constants
- * for Rage 128 kernel driver.
- */
-
-#define R128_AUX_SC_CNTL 0x1660
-# define R128_AUX1_SC_EN (1 << 0)
-# define R128_AUX1_SC_MODE_OR (0 << 1)
-# define R128_AUX1_SC_MODE_NAND (1 << 1)
-# define R128_AUX2_SC_EN (1 << 2)
-# define R128_AUX2_SC_MODE_OR (0 << 3)
-# define R128_AUX2_SC_MODE_NAND (1 << 3)
-# define R128_AUX3_SC_EN (1 << 4)
-# define R128_AUX3_SC_MODE_OR (0 << 5)
-# define R128_AUX3_SC_MODE_NAND (1 << 5)
-#define R128_AUX1_SC_LEFT 0x1664
-#define R128_AUX1_SC_RIGHT 0x1668
-#define R128_AUX1_SC_TOP 0x166c
-#define R128_AUX1_SC_BOTTOM 0x1670
-#define R128_AUX2_SC_LEFT 0x1674
-#define R128_AUX2_SC_RIGHT 0x1678
-#define R128_AUX2_SC_TOP 0x167c
-#define R128_AUX2_SC_BOTTOM 0x1680
-#define R128_AUX3_SC_LEFT 0x1684
-#define R128_AUX3_SC_RIGHT 0x1688
-#define R128_AUX3_SC_TOP 0x168c
-#define R128_AUX3_SC_BOTTOM 0x1690
-
-#define R128_BRUSH_DATA0 0x1480
-#define R128_BUS_CNTL 0x0030
-# define R128_BUS_MASTER_DIS (1 << 6)
-
-#define R128_CLOCK_CNTL_INDEX 0x0008
-#define R128_CLOCK_CNTL_DATA 0x000c
-# define R128_PLL_WR_EN (1 << 7)
-#define R128_CONSTANT_COLOR_C 0x1d34
-#define R128_CRTC_OFFSET 0x0224
-#define R128_CRTC_OFFSET_CNTL 0x0228
-# define R128_CRTC_OFFSET_FLIP_CNTL (1 << 16)
-
-#define R128_DP_GUI_MASTER_CNTL 0x146c
-# define R128_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
-# define R128_GMC_DST_PITCH_OFFSET_CNTL (1 << 1)
-# define R128_GMC_BRUSH_SOLID_COLOR (13 << 4)
-# define R128_GMC_BRUSH_NONE (15 << 4)
-# define R128_GMC_DST_16BPP (4 << 8)
-# define R128_GMC_DST_24BPP (5 << 8)
-# define R128_GMC_DST_32BPP (6 << 8)
-# define R128_GMC_DST_DATATYPE_SHIFT 8
-# define R128_GMC_SRC_DATATYPE_COLOR (3 << 12)
-# define R128_DP_SRC_SOURCE_MEMORY (2 << 24)
-# define R128_DP_SRC_SOURCE_HOST_DATA (3 << 24)
-# define R128_GMC_CLR_CMP_CNTL_DIS (1 << 28)
-# define R128_GMC_AUX_CLIP_DIS (1 << 29)
-# define R128_GMC_WR_MSK_DIS (1 << 30)
-# define R128_ROP3_S 0x00cc0000
-# define R128_ROP3_P 0x00f00000
-#define R128_DP_WRITE_MASK 0x16cc
-#define R128_DST_PITCH_OFFSET_C 0x1c80
-# define R128_DST_TILE (1 << 31)
-
-#define R128_GEN_INT_CNTL 0x0040
-# define R128_CRTC_VBLANK_INT_EN (1 << 0)
-#define R128_GEN_INT_STATUS 0x0044
-# define R128_CRTC_VBLANK_INT (1 << 0)
-# define R128_CRTC_VBLANK_INT_AK (1 << 0)
-#define R128_GEN_RESET_CNTL 0x00f0
-# define R128_SOFT_RESET_GUI (1 << 0)
-
-#define R128_GUI_SCRATCH_REG0 0x15e0
-#define R128_GUI_SCRATCH_REG1 0x15e4
-#define R128_GUI_SCRATCH_REG2 0x15e8
-#define R128_GUI_SCRATCH_REG3 0x15ec
-#define R128_GUI_SCRATCH_REG4 0x15f0
-#define R128_GUI_SCRATCH_REG5 0x15f4
-
-#define R128_GUI_STAT 0x1740
-# define R128_GUI_FIFOCNT_MASK 0x0fff
-# define R128_GUI_ACTIVE (1 << 31)
-
-#define R128_MCLK_CNTL 0x000f
-# define R128_FORCE_GCP (1 << 16)
-# define R128_FORCE_PIPE3D_CP (1 << 17)
-# define R128_FORCE_RCP (1 << 18)
-
-#define R128_PC_GUI_CTLSTAT 0x1748
-#define R128_PC_NGUI_CTLSTAT 0x0184
-# define R128_PC_FLUSH_GUI (3 << 0)
-# define R128_PC_RI_GUI (1 << 2)
-# define R128_PC_FLUSH_ALL 0x00ff
-# define R128_PC_BUSY (1 << 31)
-
-#define R128_PCI_GART_PAGE 0x017c
-#define R128_PRIM_TEX_CNTL_C 0x1cb0
-
-#define R128_SCALE_3D_CNTL 0x1a00
-#define R128_SEC_TEX_CNTL_C 0x1d00
-#define R128_SEC_TEXTURE_BORDER_COLOR_C 0x1d3c
-#define R128_SETUP_CNTL 0x1bc4
-#define R128_STEN_REF_MASK_C 0x1d40
-
-#define R128_TEX_CNTL_C 0x1c9c
-# define R128_TEX_CACHE_FLUSH (1 << 23)
-
-#define R128_WAIT_UNTIL 0x1720
-# define R128_EVENT_CRTC_OFFSET (1 << 0)
-#define R128_WINDOW_XY_OFFSET 0x1bcc
-
-/* CCE registers
- */
-#define R128_PM4_BUFFER_OFFSET 0x0700
-#define R128_PM4_BUFFER_CNTL 0x0704
-# define R128_PM4_MASK (15 << 28)
-# define R128_PM4_NONPM4 (0 << 28)
-# define R128_PM4_192PIO (1 << 28)
-# define R128_PM4_192BM (2 << 28)
-# define R128_PM4_128PIO_64INDBM (3 << 28)
-# define R128_PM4_128BM_64INDBM (4 << 28)
-# define R128_PM4_64PIO_128INDBM (5 << 28)
-# define R128_PM4_64BM_128INDBM (6 << 28)
-# define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28)
-# define R128_PM4_64BM_64VCBM_64INDBM (8 << 28)
-# define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28)
-# define R128_PM4_BUFFER_CNTL_NOUPDATE (1 << 27)
-
-#define R128_PM4_BUFFER_WM_CNTL 0x0708
-# define R128_WMA_SHIFT 0
-# define R128_WMB_SHIFT 8
-# define R128_WMC_SHIFT 16
-# define R128_WB_WM_SHIFT 24
-
-#define R128_PM4_BUFFER_DL_RPTR_ADDR 0x070c
-#define R128_PM4_BUFFER_DL_RPTR 0x0710
-#define R128_PM4_BUFFER_DL_WPTR 0x0714
-# define R128_PM4_BUFFER_DL_DONE (1 << 31)
-
-#define R128_PM4_VC_FPU_SETUP 0x071c
-
-#define R128_PM4_IW_INDOFF 0x0738
-#define R128_PM4_IW_INDSIZE 0x073c
-
-#define R128_PM4_STAT 0x07b8
-# define R128_PM4_FIFOCNT_MASK 0x0fff
-# define R128_PM4_BUSY (1 << 16)
-# define R128_PM4_GUI_ACTIVE (1 << 31)
-
-#define R128_PM4_MICROCODE_ADDR 0x07d4
-#define R128_PM4_MICROCODE_RADDR 0x07d8
-#define R128_PM4_MICROCODE_DATAH 0x07dc
-#define R128_PM4_MICROCODE_DATAL 0x07e0
-
-#define R128_PM4_BUFFER_ADDR 0x07f0
-#define R128_PM4_MICRO_CNTL 0x07fc
-# define R128_PM4_MICRO_FREERUN (1 << 30)
-
-#define R128_PM4_FIFO_DATA_EVEN 0x1000
-#define R128_PM4_FIFO_DATA_ODD 0x1004
-
-/* CCE command packets
- */
-#define R128_CCE_PACKET0 0x00000000
-#define R128_CCE_PACKET1 0x40000000
-#define R128_CCE_PACKET2 0x80000000
-#define R128_CCE_PACKET3 0xC0000000
-# define R128_CNTL_HOSTDATA_BLT 0x00009400
-# define R128_CNTL_PAINT_MULTI 0x00009A00
-# define R128_CNTL_BITBLT_MULTI 0x00009B00
-# define R128_3D_RNDR_GEN_INDX_PRIM 0x00002300
-
-#define R128_CCE_PACKET_MASK 0xC0000000
-#define R128_CCE_PACKET_COUNT_MASK 0x3fff0000
-#define R128_CCE_PACKET0_REG_MASK 0x000007ff
-#define R128_CCE_PACKET1_REG0_MASK 0x000007ff
-#define R128_CCE_PACKET1_REG1_MASK 0x003ff800
-
-#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE 0x00000000
-#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT 0x00000001
-#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE 0x00000002
-#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE 0x00000003
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 0x00000007
-#define R128_CCE_VC_CNTL_PRIM_WALK_IND 0x00000010
-#define R128_CCE_VC_CNTL_PRIM_WALK_LIST 0x00000020
-#define R128_CCE_VC_CNTL_PRIM_WALK_RING 0x00000030
-#define R128_CCE_VC_CNTL_NUM_SHIFT 16
-
-#define R128_DATATYPE_VQ 0
-#define R128_DATATYPE_CI4 1
-#define R128_DATATYPE_CI8 2
-#define R128_DATATYPE_ARGB1555 3
-#define R128_DATATYPE_RGB565 4
-#define R128_DATATYPE_RGB888 5
-#define R128_DATATYPE_ARGB8888 6
-#define R128_DATATYPE_RGB332 7
-#define R128_DATATYPE_Y8 8
-#define R128_DATATYPE_RGB8 9
-#define R128_DATATYPE_CI16 10
-#define R128_DATATYPE_YVYU422 11
-#define R128_DATATYPE_VYUY422 12
-#define R128_DATATYPE_AYUV444 14
-#define R128_DATATYPE_ARGB4444 15
-
-/* Constants */
-#define R128_AGP_OFFSET 0x02000000
-
-#define R128_WATERMARK_L 16
-#define R128_WATERMARK_M 8
-#define R128_WATERMARK_N 8
-#define R128_WATERMARK_K 128
-
-#define R128_MAX_USEC_TIMEOUT 100000 /* 100 ms */
-
-#define R128_LAST_FRAME_REG R128_GUI_SCRATCH_REG0
-#define R128_LAST_DISPATCH_REG R128_GUI_SCRATCH_REG1
-#define R128_MAX_VB_AGE 0x7fffffff
-#define R128_MAX_VB_VERTS (0xffff)
-
-#define R128_RING_HIGH_MARK 128
-
-#define R128_PERFORMANCE_BOXES 0
-
-#define R128_PCIGART_TABLE_SIZE 32768
-
-#define R128_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
-#define R128_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
-#define R128_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) )
-#define R128_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) )
-
-#define R128_WRITE_PLL(addr,val) \
-do { \
- R128_WRITE8(R128_CLOCK_CNTL_INDEX, \
- ((addr) & 0x1f) | R128_PLL_WR_EN); \
- R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
-} while (0)
-
-#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \
- ((n) << 16) | ((reg) >> 2))
-#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \
- (((reg1) >> 2) << 11) | ((reg0) >> 2))
-#define CCE_PACKET2() (R128_CCE_PACKET2)
-#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \
- (pkt) | ((n) << 16))
-
-static __inline__ void r128_update_ring_snapshot(drm_r128_private_t * dev_priv)
-{
- drm_r128_ring_buffer_t *ring = &dev_priv->ring;
- ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32);
- if (ring->space <= 0)
- ring->space += ring->size;
-}
-
-/* ================================================================
- * Misc helper macros
- */
-
-#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \
-do { \
- drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \
- if ( ring->space < ring->high_mark ) { \
- for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \
- r128_update_ring_snapshot( dev_priv ); \
- if ( ring->space >= ring->high_mark ) \
- goto __ring_space_done; \
- DRM_UDELAY(1); \
- } \
- DRM_ERROR( "ring space check failed!\n" ); \
- return -EBUSY; \
- } \
- __ring_space_done: \
- ; \
-} while (0)
-
-#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \
-do { \
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
- if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \
- int __ret = r128_do_cce_idle( dev_priv ); \
- if ( __ret ) return __ret; \
- sarea_priv->last_dispatch = 0; \
- r128_freelist_reset( dev ); \
- } \
-} while (0)
-
-#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \
- OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \
- OUT_RING( R128_EVENT_CRTC_OFFSET ); \
-} while (0)
-
-/* ================================================================
- * Ring control
- */
-
-#define R128_VERBOSE 0
-
-#define RING_LOCALS \
- int write, _nr; unsigned int tail_mask; volatile u32 *ring;
-
-#define BEGIN_RING( n ) do { \
- if ( R128_VERBOSE ) { \
- DRM_INFO( "BEGIN_RING( %d )\n", (n)); \
- } \
- if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
- COMMIT_RING(); \
- r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \
- } \
- _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \
- ring = dev_priv->ring.start; \
- write = dev_priv->ring.tail; \
- tail_mask = dev_priv->ring.tail_mask; \
-} while (0)
-
-/* You can set this to zero if you want. If the card locks up, you'll
- * need to keep this set. It works around a bug in early revs of the
- * Rage 128 chipset, where the CCE would read 32 dwords past the end of
- * the ring buffer before wrapping around.
- */
-#define R128_BROKEN_CCE 1
-
-#define ADVANCE_RING() do { \
- if ( R128_VERBOSE ) { \
- DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \
- write, dev_priv->ring.tail ); \
- } \
- if ( R128_BROKEN_CCE && write < 32 ) { \
- memcpy( dev_priv->ring.end, \
- dev_priv->ring.start, \
- write * sizeof(u32) ); \
- } \
- if (((dev_priv->ring.tail + _nr) & tail_mask) != write) { \
- DRM_ERROR( \
- "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \
- ((dev_priv->ring.tail + _nr) & tail_mask), \
- write, __LINE__); \
- } else \
- dev_priv->ring.tail = write; \
-} while (0)
-
-#define COMMIT_RING() do { \
- if ( R128_VERBOSE ) { \
- DRM_INFO( "COMMIT_RING() tail=0x%06x\n", \
- dev_priv->ring.tail ); \
- } \
- DRM_MEMORYBARRIER(); \
- R128_WRITE( R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail ); \
- R128_READ( R128_PM4_BUFFER_DL_WPTR ); \
-} while (0)
-
-#define OUT_RING( x ) do { \
- if ( R128_VERBOSE ) { \
- DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \
- (unsigned int)(x), write ); \
- } \
- ring[write++] = cpu_to_le32( x ); \
- write &= tail_mask; \
-} while (0)
-
-#endif /* __R128_DRV_H__ */
+++ /dev/null
-/* r128_irq.c -- IRQ handling for radeon -*- linux-c -*- */
-/*
- * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
- *
- * The Weather Channel (TM) funded Tungsten Graphics to develop the
- * initial release of the Radeon 8500 driver under the XFree86 license.
- * This notice must be preserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
- * Eric Anholt <anholt@FreeBSD.org>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "r128_drm.h"
-#include "r128_drv.h"
-
-u32 r128_get_vblank_counter(struct drm_device *dev, int crtc)
-{
- const drm_r128_private_t *dev_priv = dev->dev_private;
-
- if (crtc != 0)
- return 0;
-
- return atomic_read(&dev_priv->vbl_received);
-}
-
-irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS)
-{
- struct drm_device *dev = (struct drm_device *) arg;
- drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
- int status;
-
- status = R128_READ(R128_GEN_INT_STATUS);
-
- /* VBLANK interrupt */
- if (status & R128_CRTC_VBLANK_INT) {
- R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK);
- atomic_inc(&dev_priv->vbl_received);
- drm_handle_vblank(dev, 0);
- return IRQ_HANDLED;
- }
- return IRQ_NONE;
-}
-
-int r128_enable_vblank(struct drm_device *dev, int crtc)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
-
- if (crtc != 0) {
- DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc);
- return -EINVAL;
- }
-
- R128_WRITE(R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN);
- return 0;
-}
-
-void r128_disable_vblank(struct drm_device *dev, int crtc)
-{
- if (crtc != 0)
- DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc);
-
- /*
- * FIXME: implement proper interrupt disable by using the vblank
- * counter register (if available)
- *
- * R128_WRITE(R128_GEN_INT_CNTL,
- * R128_READ(R128_GEN_INT_CNTL) & ~R128_CRTC_VBLANK_INT_EN);
- */
-}
-
-void r128_driver_irq_preinstall(struct drm_device * dev)
-{
- drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
-
- /* Disable *all* interrupts */
- R128_WRITE(R128_GEN_INT_CNTL, 0);
- /* Clear vblank bit if it's already high */
- R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK);
-}
-
-int r128_driver_irq_postinstall(struct drm_device * dev)
-{
- return 0;
-}
-
-void r128_driver_irq_uninstall(struct drm_device * dev)
-{
- drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
- if (!dev_priv)
- return;
-
- /* Disable *all* interrupts */
- R128_WRITE(R128_GEN_INT_CNTL, 0);
-}
+++ /dev/null
-/* r128_state.c -- State support for r128 -*- linux-c -*-
- * Created: Thu Jan 27 02:53:43 2000 by gareth@valinux.com
- */
-/*
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "r128_drm.h"
-#include "r128_drv.h"
-
-/* ================================================================
- * CCE hardware state programming functions
- */
-
-static void r128_emit_clip_rects(drm_r128_private_t * dev_priv,
- struct drm_clip_rect * boxes, int count)
-{
- u32 aux_sc_cntl = 0x00000000;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING((count < 3 ? count : 3) * 5 + 2);
-
- if (count >= 1) {
- OUT_RING(CCE_PACKET0(R128_AUX1_SC_LEFT, 3));
- OUT_RING(boxes[0].x1);
- OUT_RING(boxes[0].x2 - 1);
- OUT_RING(boxes[0].y1);
- OUT_RING(boxes[0].y2 - 1);
-
- aux_sc_cntl |= (R128_AUX1_SC_EN | R128_AUX1_SC_MODE_OR);
- }
- if (count >= 2) {
- OUT_RING(CCE_PACKET0(R128_AUX2_SC_LEFT, 3));
- OUT_RING(boxes[1].x1);
- OUT_RING(boxes[1].x2 - 1);
- OUT_RING(boxes[1].y1);
- OUT_RING(boxes[1].y2 - 1);
-
- aux_sc_cntl |= (R128_AUX2_SC_EN | R128_AUX2_SC_MODE_OR);
- }
- if (count >= 3) {
- OUT_RING(CCE_PACKET0(R128_AUX3_SC_LEFT, 3));
- OUT_RING(boxes[2].x1);
- OUT_RING(boxes[2].x2 - 1);
- OUT_RING(boxes[2].y1);
- OUT_RING(boxes[2].y2 - 1);
-
- aux_sc_cntl |= (R128_AUX3_SC_EN | R128_AUX3_SC_MODE_OR);
- }
-
- OUT_RING(CCE_PACKET0(R128_AUX_SC_CNTL, 0));
- OUT_RING(aux_sc_cntl);
-
- ADVANCE_RING();
-}
-
-static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv)
-{
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_SCALE_3D_CNTL, 0));
- OUT_RING(ctx->scale_3d_cntl);
-
- ADVANCE_RING();
-}
-
-static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv)
-{
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(13);
-
- OUT_RING(CCE_PACKET0(R128_DST_PITCH_OFFSET_C, 11));
- OUT_RING(ctx->dst_pitch_offset_c);
- OUT_RING(ctx->dp_gui_master_cntl_c);
- OUT_RING(ctx->sc_top_left_c);
- OUT_RING(ctx->sc_bottom_right_c);
- OUT_RING(ctx->z_offset_c);
- OUT_RING(ctx->z_pitch_c);
- OUT_RING(ctx->z_sten_cntl_c);
- OUT_RING(ctx->tex_cntl_c);
- OUT_RING(ctx->misc_3d_state_cntl_reg);
- OUT_RING(ctx->texture_clr_cmp_clr_c);
- OUT_RING(ctx->texture_clr_cmp_msk_c);
- OUT_RING(ctx->fog_color_c);
-
- ADVANCE_RING();
-}
-
-static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv)
-{
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(3);
-
- OUT_RING(CCE_PACKET1(R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP));
- OUT_RING(ctx->setup_cntl);
- OUT_RING(ctx->pm4_vc_fpu_setup);
-
- ADVANCE_RING();
-}
-
-static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv)
-{
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(5);
-
- OUT_RING(CCE_PACKET0(R128_DP_WRITE_MASK, 0));
- OUT_RING(ctx->dp_write_mask);
-
- OUT_RING(CCE_PACKET0(R128_STEN_REF_MASK_C, 1));
- OUT_RING(ctx->sten_ref_mask_c);
- OUT_RING(ctx->plane_3d_mask_c);
-
- ADVANCE_RING();
-}
-
-static __inline__ void r128_emit_window(drm_r128_private_t * dev_priv)
-{
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_WINDOW_XY_OFFSET, 0));
- OUT_RING(ctx->window_xy_offset);
-
- ADVANCE_RING();
-}
-
-static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv)
-{
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
- drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0];
- int i;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(7 + R128_MAX_TEXTURE_LEVELS);
-
- OUT_RING(CCE_PACKET0(R128_PRIM_TEX_CNTL_C,
- 2 + R128_MAX_TEXTURE_LEVELS));
- OUT_RING(tex->tex_cntl);
- OUT_RING(tex->tex_combine_cntl);
- OUT_RING(ctx->tex_size_pitch_c);
- for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) {
- OUT_RING(tex->tex_offset[i]);
- }
-
- OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1));
- OUT_RING(ctx->constant_color_c);
- OUT_RING(tex->tex_border_color);
-
- ADVANCE_RING();
-}
-
-static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv)
-{
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1];
- int i;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(5 + R128_MAX_TEXTURE_LEVELS);
-
- OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS));
- OUT_RING(tex->tex_cntl);
- OUT_RING(tex->tex_combine_cntl);
- for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) {
- OUT_RING(tex->tex_offset[i]);
- }
-
- OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0));
- OUT_RING(tex->tex_border_color);
-
- ADVANCE_RING();
-}
-
-static void r128_emit_state(drm_r128_private_t * dev_priv)
-{
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- unsigned int dirty = sarea_priv->dirty;
-
- DRM_DEBUG("dirty=0x%08x\n", dirty);
-
- if (dirty & R128_UPLOAD_CORE) {
- r128_emit_core(dev_priv);
- sarea_priv->dirty &= ~R128_UPLOAD_CORE;
- }
-
- if (dirty & R128_UPLOAD_CONTEXT) {
- r128_emit_context(dev_priv);
- sarea_priv->dirty &= ~R128_UPLOAD_CONTEXT;
- }
-
- if (dirty & R128_UPLOAD_SETUP) {
- r128_emit_setup(dev_priv);
- sarea_priv->dirty &= ~R128_UPLOAD_SETUP;
- }
-
- if (dirty & R128_UPLOAD_MASKS) {
- r128_emit_masks(dev_priv);
- sarea_priv->dirty &= ~R128_UPLOAD_MASKS;
- }
-
- if (dirty & R128_UPLOAD_WINDOW) {
- r128_emit_window(dev_priv);
- sarea_priv->dirty &= ~R128_UPLOAD_WINDOW;
- }
-
- if (dirty & R128_UPLOAD_TEX0) {
- r128_emit_tex0(dev_priv);
- sarea_priv->dirty &= ~R128_UPLOAD_TEX0;
- }
-
- if (dirty & R128_UPLOAD_TEX1) {
- r128_emit_tex1(dev_priv);
- sarea_priv->dirty &= ~R128_UPLOAD_TEX1;
- }
-
- /* Turn off the texture cache flushing */
- sarea_priv->context_state.tex_cntl_c &= ~R128_TEX_CACHE_FLUSH;
-
- sarea_priv->dirty &= ~R128_REQUIRE_QUIESCENCE;
-}
-
-#if R128_PERFORMANCE_BOXES
-/* ================================================================
- * Performance monitoring functions
- */
-
-static void r128_clear_box(drm_r128_private_t * dev_priv,
- int x, int y, int w, int h, int r, int g, int b)
-{
- u32 pitch, offset;
- u32 fb_bpp, color;
- RING_LOCALS;
-
- switch (dev_priv->fb_bpp) {
- case 16:
- fb_bpp = R128_GMC_DST_16BPP;
- color = (((r & 0xf8) << 8) |
- ((g & 0xfc) << 3) | ((b & 0xf8) >> 3));
- break;
- case 24:
- fb_bpp = R128_GMC_DST_24BPP;
- color = ((r << 16) | (g << 8) | b);
- break;
- case 32:
- fb_bpp = R128_GMC_DST_32BPP;
- color = (((0xff) << 24) | (r << 16) | (g << 8) | b);
- break;
- default:
- return;
- }
-
- offset = dev_priv->back_offset;
- pitch = dev_priv->back_pitch >> 3;
-
- BEGIN_RING(6);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
- OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_SOLID_COLOR |
- fb_bpp |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_P |
- R128_GMC_CLR_CMP_CNTL_DIS | R128_GMC_AUX_CLIP_DIS);
-
- OUT_RING((pitch << 21) | (offset >> 5));
- OUT_RING(color);
-
- OUT_RING((x << 16) | y);
- OUT_RING((w << 16) | h);
-
- ADVANCE_RING();
-}
-
-static void r128_cce_performance_boxes(drm_r128_private_t * dev_priv)
-{
- if (atomic_read(&dev_priv->idle_count) == 0) {
- r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0);
- } else {
- atomic_set(&dev_priv->idle_count, 0);
- }
-}
-
-#endif
-
-/* ================================================================
- * CCE command dispatch functions
- */
-
-static void r128_print_dirty(const char *msg, unsigned int flags)
-{
- DRM_INFO("%s: (0x%x) %s%s%s%s%s%s%s%s%s\n",
- msg,
- flags,
- (flags & R128_UPLOAD_CORE) ? "core, " : "",
- (flags & R128_UPLOAD_CONTEXT) ? "context, " : "",
- (flags & R128_UPLOAD_SETUP) ? "setup, " : "",
- (flags & R128_UPLOAD_TEX0) ? "tex0, " : "",
- (flags & R128_UPLOAD_TEX1) ? "tex1, " : "",
- (flags & R128_UPLOAD_MASKS) ? "masks, " : "",
- (flags & R128_UPLOAD_WINDOW) ? "window, " : "",
- (flags & R128_UPLOAD_CLIPRECTS) ? "cliprects, " : "",
- (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "");
-}
-
-static void r128_cce_dispatch_clear(struct drm_device * dev,
- drm_r128_clear_t * clear)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int nbox = sarea_priv->nbox;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- unsigned int flags = clear->flags;
- int i;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- if (dev_priv->page_flipping && dev_priv->current_page == 1) {
- unsigned int tmp = flags;
-
- flags &= ~(R128_FRONT | R128_BACK);
- if (tmp & R128_FRONT)
- flags |= R128_BACK;
- if (tmp & R128_BACK)
- flags |= R128_FRONT;
- }
-
- for (i = 0; i < nbox; i++) {
- int x = pbox[i].x1;
- int y = pbox[i].y1;
- int w = pbox[i].x2 - x;
- int h = pbox[i].y2 - y;
-
- DRM_DEBUG("dispatch clear %d,%d-%d,%d flags 0x%x\n",
- pbox[i].x1, pbox[i].y1, pbox[i].x2,
- pbox[i].y2, flags);
-
- if (flags & (R128_FRONT | R128_BACK)) {
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_DP_WRITE_MASK, 0));
- OUT_RING(clear->color_mask);
-
- ADVANCE_RING();
- }
-
- if (flags & R128_FRONT) {
- BEGIN_RING(6);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
- OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->color_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_P |
- R128_GMC_CLR_CMP_CNTL_DIS |
- R128_GMC_AUX_CLIP_DIS);
-
- OUT_RING(dev_priv->front_pitch_offset_c);
- OUT_RING(clear->clear_color);
-
- OUT_RING((x << 16) | y);
- OUT_RING((w << 16) | h);
-
- ADVANCE_RING();
- }
-
- if (flags & R128_BACK) {
- BEGIN_RING(6);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
- OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->color_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_P |
- R128_GMC_CLR_CMP_CNTL_DIS |
- R128_GMC_AUX_CLIP_DIS);
-
- OUT_RING(dev_priv->back_pitch_offset_c);
- OUT_RING(clear->clear_color);
-
- OUT_RING((x << 16) | y);
- OUT_RING((w << 16) | h);
-
- ADVANCE_RING();
- }
-
- if (flags & R128_DEPTH) {
- BEGIN_RING(6);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
- OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->depth_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_P |
- R128_GMC_CLR_CMP_CNTL_DIS |
- R128_GMC_AUX_CLIP_DIS | R128_GMC_WR_MSK_DIS);
-
- OUT_RING(dev_priv->depth_pitch_offset_c);
- OUT_RING(clear->clear_depth);
-
- OUT_RING((x << 16) | y);
- OUT_RING((w << 16) | h);
-
- ADVANCE_RING();
- }
- }
-}
-
-static void r128_cce_dispatch_swap(struct drm_device * dev)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int nbox = sarea_priv->nbox;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- int i;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
-#if R128_PERFORMANCE_BOXES
- /* Do some trivial performance monitoring...
- */
- r128_cce_performance_boxes(dev_priv);
-#endif
-
- for (i = 0; i < nbox; i++) {
- int x = pbox[i].x1;
- int y = pbox[i].y1;
- int w = pbox[i].x2 - x;
- int h = pbox[i].y2 - y;
-
- BEGIN_RING(7);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5));
- OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL |
- R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_NONE |
- (dev_priv->color_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_S |
- R128_DP_SRC_SOURCE_MEMORY |
- R128_GMC_CLR_CMP_CNTL_DIS |
- R128_GMC_AUX_CLIP_DIS | R128_GMC_WR_MSK_DIS);
-
- /* Make this work even if front & back are flipped:
- */
- if (dev_priv->current_page == 0) {
- OUT_RING(dev_priv->back_pitch_offset_c);
- OUT_RING(dev_priv->front_pitch_offset_c);
- } else {
- OUT_RING(dev_priv->front_pitch_offset_c);
- OUT_RING(dev_priv->back_pitch_offset_c);
- }
-
- OUT_RING((x << 16) | y);
- OUT_RING((x << 16) | y);
- OUT_RING((w << 16) | h);
-
- ADVANCE_RING();
- }
-
- /* Increment the frame counter. The client-side 3D driver must
- * throttle the framerate by waiting for this value before
- * performing the swapbuffer ioctl.
- */
- dev_priv->sarea_priv->last_frame++;
-
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_LAST_FRAME_REG, 0));
- OUT_RING(dev_priv->sarea_priv->last_frame);
-
- ADVANCE_RING();
-}
-
-static void r128_cce_dispatch_flip(struct drm_device * dev)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- RING_LOCALS;
- DRM_DEBUG("page=%d pfCurrentPage=%d\n",
- dev_priv->current_page, dev_priv->sarea_priv->pfCurrentPage);
-
-#if R128_PERFORMANCE_BOXES
- /* Do some trivial performance monitoring...
- */
- r128_cce_performance_boxes(dev_priv);
-#endif
-
- BEGIN_RING(4);
-
- R128_WAIT_UNTIL_PAGE_FLIPPED();
- OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0));
-
- if (dev_priv->current_page == 0) {
- OUT_RING(dev_priv->back_offset);
- } else {
- OUT_RING(dev_priv->front_offset);
- }
-
- ADVANCE_RING();
-
- /* Increment the frame counter. The client-side 3D driver must
- * throttle the framerate by waiting for this value before
- * performing the swapbuffer ioctl.
- */
- dev_priv->sarea_priv->last_frame++;
- dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page =
- 1 - dev_priv->current_page;
-
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_LAST_FRAME_REG, 0));
- OUT_RING(dev_priv->sarea_priv->last_frame);
-
- ADVANCE_RING();
-}
-
-static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_buf_priv_t *buf_priv = buf->dev_private;
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int format = sarea_priv->vc_format;
- int offset = buf->bus_address;
- int size = buf->used;
- int prim = buf_priv->prim;
- int i = 0;
- RING_LOCALS;
- DRM_DEBUG("buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox);
-
- if (0)
- r128_print_dirty("dispatch_vertex", sarea_priv->dirty);
-
- if (buf->used) {
- buf_priv->dispatched = 1;
-
- if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) {
- r128_emit_state(dev_priv);
- }
-
- do {
- /* Emit the next set of up to three cliprects */
- if (i < sarea_priv->nbox) {
- r128_emit_clip_rects(dev_priv,
- &sarea_priv->boxes[i],
- sarea_priv->nbox - i);
- }
-
- /* Emit the vertex buffer rendering commands */
- BEGIN_RING(5);
-
- OUT_RING(CCE_PACKET3(R128_3D_RNDR_GEN_INDX_PRIM, 3));
- OUT_RING(offset);
- OUT_RING(size);
- OUT_RING(format);
- OUT_RING(prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST |
- (size << R128_CCE_VC_CNTL_NUM_SHIFT));
-
- ADVANCE_RING();
-
- i += 3;
- } while (i < sarea_priv->nbox);
- }
-
- if (buf_priv->discard) {
- buf_priv->age = dev_priv->sarea_priv->last_dispatch;
-
- /* Emit the vertex buffer age */
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0));
- OUT_RING(buf_priv->age);
-
- ADVANCE_RING();
-
- buf->pending = 1;
- buf->used = 0;
- /* FIXME: Check dispatched field */
- buf_priv->dispatched = 0;
- }
-
- dev_priv->sarea_priv->last_dispatch++;
-
- sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS;
- sarea_priv->nbox = 0;
-}
-
-static void r128_cce_dispatch_indirect(struct drm_device * dev,
- struct drm_buf * buf, int start, int end)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_buf_priv_t *buf_priv = buf->dev_private;
- RING_LOCALS;
- DRM_DEBUG("indirect: buf=%d s=0x%x e=0x%x\n", buf->idx, start, end);
-
- if (start != end) {
- int offset = buf->bus_address + start;
- int dwords = (end - start + 3) / sizeof(u32);
-
- /* Indirect buffer data must be an even number of
- * dwords, so if we've been given an odd number we must
- * pad the data with a Type-2 CCE packet.
- */
- if (dwords & 1) {
- u32 *data = (u32 *)
- ((char *)dev->agp_buffer_map->handle
- + buf->offset + start);
- data[dwords++] = cpu_to_le32(R128_CCE_PACKET2);
- }
-
- buf_priv->dispatched = 1;
-
- /* Fire off the indirect buffer */
- BEGIN_RING(3);
-
- OUT_RING(CCE_PACKET0(R128_PM4_IW_INDOFF, 1));
- OUT_RING(offset);
- OUT_RING(dwords);
-
- ADVANCE_RING();
- }
-
- if (buf_priv->discard) {
- buf_priv->age = dev_priv->sarea_priv->last_dispatch;
-
- /* Emit the indirect buffer age */
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0));
- OUT_RING(buf_priv->age);
-
- ADVANCE_RING();
-
- buf->pending = 1;
- buf->used = 0;
- /* FIXME: Check dispatched field */
- buf_priv->dispatched = 0;
- }
-
- dev_priv->sarea_priv->last_dispatch++;
-}
-
-static void r128_cce_dispatch_indices(struct drm_device * dev,
- struct drm_buf * buf,
- int start, int end, int count)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_buf_priv_t *buf_priv = buf->dev_private;
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int format = sarea_priv->vc_format;
- int offset = dev->agp_buffer_map->offset - dev_priv->cce_buffers_offset;
- int prim = buf_priv->prim;
- u32 *data;
- int dwords;
- int i = 0;
- RING_LOCALS;
- DRM_DEBUG("indices: s=%d e=%d c=%d\n", start, end, count);
-
- if (0)
- r128_print_dirty("dispatch_indices", sarea_priv->dirty);
-
- if (start != end) {
- buf_priv->dispatched = 1;
-
- if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) {
- r128_emit_state(dev_priv);
- }
-
- dwords = (end - start + 3) / sizeof(u32);
-
- data = (u32 *) ((char *)dev->agp_buffer_map->handle
- + buf->offset + start);
-
- data[0] = cpu_to_le32(CCE_PACKET3(R128_3D_RNDR_GEN_INDX_PRIM,
- dwords - 2));
-
- data[1] = cpu_to_le32(offset);
- data[2] = cpu_to_le32(R128_MAX_VB_VERTS);
- data[3] = cpu_to_le32(format);
- data[4] = cpu_to_le32((prim | R128_CCE_VC_CNTL_PRIM_WALK_IND |
- (count << 16)));
-
- if (count & 0x1) {
-#ifdef __LITTLE_ENDIAN
- data[dwords - 1] &= 0x0000ffff;
-#else
- data[dwords - 1] &= 0xffff0000;
-#endif
- }
-
- do {
- /* Emit the next set of up to three cliprects */
- if (i < sarea_priv->nbox) {
- r128_emit_clip_rects(dev_priv,
- &sarea_priv->boxes[i],
- sarea_priv->nbox - i);
- }
-
- r128_cce_dispatch_indirect(dev, buf, start, end);
-
- i += 3;
- } while (i < sarea_priv->nbox);
- }
-
- if (buf_priv->discard) {
- buf_priv->age = dev_priv->sarea_priv->last_dispatch;
-
- /* Emit the vertex buffer age */
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0));
- OUT_RING(buf_priv->age);
-
- ADVANCE_RING();
-
- buf->pending = 1;
- /* FIXME: Check dispatched field */
- buf_priv->dispatched = 0;
- }
-
- dev_priv->sarea_priv->last_dispatch++;
-
- sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS;
- sarea_priv->nbox = 0;
-}
-
-static int r128_cce_dispatch_blit(struct drm_device * dev,
- struct drm_file *file_priv,
- drm_r128_blit_t * blit)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_r128_buf_priv_t *buf_priv;
- u32 *data;
- int dword_shift, dwords;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- /* The compiler won't optimize away a division by a variable,
- * even if the only legal values are powers of two. Thus, we'll
- * use a shift instead.
- */
- switch (blit->format) {
- case R128_DATATYPE_ARGB8888:
- dword_shift = 0;
- break;
- case R128_DATATYPE_ARGB1555:
- case R128_DATATYPE_RGB565:
- case R128_DATATYPE_ARGB4444:
- case R128_DATATYPE_YVYU422:
- case R128_DATATYPE_VYUY422:
- dword_shift = 1;
- break;
- case R128_DATATYPE_CI8:
- case R128_DATATYPE_RGB8:
- dword_shift = 2;
- break;
- default:
- DRM_ERROR("invalid blit format %d\n", blit->format);
- return -EINVAL;
- }
-
- /* Flush the pixel cache, and mark the contents as Read Invalid.
- * This ensures no pixel data gets mixed up with the texture
- * data from the host data blit, otherwise part of the texture
- * image may be corrupted.
- */
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_PC_GUI_CTLSTAT, 0));
- OUT_RING(R128_PC_RI_GUI | R128_PC_FLUSH_GUI);
-
- ADVANCE_RING();
-
- /* Dispatch the indirect buffer.
- */
- buf = dma->buflist[blit->idx];
- buf_priv = buf->dev_private;
-
- if (buf->file_priv != file_priv) {
- DRM_ERROR("process %d using buffer owned by %p\n",
- DRM_CURRENTPID, buf->file_priv);
- return -EINVAL;
- }
- if (buf->pending) {
- DRM_ERROR("sending pending buffer %d\n", blit->idx);
- return -EINVAL;
- }
-
- buf_priv->discard = 1;
-
- dwords = (blit->width * blit->height) >> dword_shift;
-
- data = (u32 *) ((char *)dev->agp_buffer_map->handle + buf->offset);
-
- data[0] = cpu_to_le32(CCE_PACKET3(R128_CNTL_HOSTDATA_BLT, dwords + 6));
- data[1] = cpu_to_le32((R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_NONE |
- (blit->format << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_S |
- R128_DP_SRC_SOURCE_HOST_DATA |
- R128_GMC_CLR_CMP_CNTL_DIS |
- R128_GMC_AUX_CLIP_DIS | R128_GMC_WR_MSK_DIS));
-
- data[2] = cpu_to_le32((blit->pitch << 21) | (blit->offset >> 5));
- data[3] = cpu_to_le32(0xffffffff);
- data[4] = cpu_to_le32(0xffffffff);
- data[5] = cpu_to_le32((blit->y << 16) | blit->x);
- data[6] = cpu_to_le32((blit->height << 16) | blit->width);
- data[7] = cpu_to_le32(dwords);
-
- buf->used = (dwords + 8) * sizeof(u32);
-
- r128_cce_dispatch_indirect(dev, buf, 0, buf->used);
-
- /* Flush the pixel cache after the blit completes. This ensures
- * the texture data is written out to memory before rendering
- * continues.
- */
- BEGIN_RING(2);
-
- OUT_RING(CCE_PACKET0(R128_PC_GUI_CTLSTAT, 0));
- OUT_RING(R128_PC_FLUSH_GUI);
-
- ADVANCE_RING();
-
- return 0;
-}
-
-/* ================================================================
- * Tiled depth buffer management
- *
- * FIXME: These should all set the destination write mask for when we
- * have hardware stencil support.
- */
-
-static int r128_cce_dispatch_write_span(struct drm_device * dev,
- drm_r128_depth_t * depth)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- int count, x, y;
- u32 *buffer;
- u8 *mask;
- int i, buffer_size, mask_size;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- count = depth->n;
- if (count > 4096 || count <= 0)
- return -EMSGSIZE;
-
- if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) {
- return -EFAULT;
- }
- if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
- return -EFAULT;
- }
-
- buffer_size = depth->n * sizeof(u32);
- buffer = drm_alloc(buffer_size, DRM_MEM_BUFS);
- if (buffer == NULL)
- return -ENOMEM;
- if (DRM_COPY_FROM_USER(buffer, depth->buffer, buffer_size)) {
- drm_free(buffer, buffer_size, DRM_MEM_BUFS);
- return -EFAULT;
- }
-
- mask_size = depth->n * sizeof(u8);
- if (depth->mask) {
- mask = drm_alloc(mask_size, DRM_MEM_BUFS);
- if (mask == NULL) {
- drm_free(buffer, buffer_size, DRM_MEM_BUFS);
- return -ENOMEM;
- }
- if (DRM_COPY_FROM_USER(mask, depth->mask, mask_size)) {
- drm_free(buffer, buffer_size, DRM_MEM_BUFS);
- drm_free(mask, mask_size, DRM_MEM_BUFS);
- return -EFAULT;
- }
-
- for (i = 0; i < count; i++, x++) {
- if (mask[i]) {
- BEGIN_RING(6);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
- OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->depth_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_P |
- R128_GMC_CLR_CMP_CNTL_DIS |
- R128_GMC_WR_MSK_DIS);
-
- OUT_RING(dev_priv->depth_pitch_offset_c);
- OUT_RING(buffer[i]);
-
- OUT_RING((x << 16) | y);
- OUT_RING((1 << 16) | 1);
-
- ADVANCE_RING();
- }
- }
-
- drm_free(mask, mask_size, DRM_MEM_BUFS);
- } else {
- for (i = 0; i < count; i++, x++) {
- BEGIN_RING(6);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
- OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->depth_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_P |
- R128_GMC_CLR_CMP_CNTL_DIS |
- R128_GMC_WR_MSK_DIS);
-
- OUT_RING(dev_priv->depth_pitch_offset_c);
- OUT_RING(buffer[i]);
-
- OUT_RING((x << 16) | y);
- OUT_RING((1 << 16) | 1);
-
- ADVANCE_RING();
- }
- }
-
- drm_free(buffer, buffer_size, DRM_MEM_BUFS);
-
- return 0;
-}
-
-static int r128_cce_dispatch_write_pixels(struct drm_device * dev,
- drm_r128_depth_t * depth)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- int count, *x, *y;
- u32 *buffer;
- u8 *mask;
- int i, xbuf_size, ybuf_size, buffer_size, mask_size;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- count = depth->n;
- if (count > 4096 || count <= 0)
- return -EMSGSIZE;
-
- xbuf_size = count * sizeof(*x);
- ybuf_size = count * sizeof(*y);
- x = drm_alloc(xbuf_size, DRM_MEM_BUFS);
- if (x == NULL) {
- return -ENOMEM;
- }
- y = drm_alloc(ybuf_size, DRM_MEM_BUFS);
- if (y == NULL) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- return -ENOMEM;
- }
- if (DRM_COPY_FROM_USER(x, depth->x, xbuf_size)) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
- return -EFAULT;
- }
- if (DRM_COPY_FROM_USER(y, depth->y, xbuf_size)) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
- return -EFAULT;
- }
-
- buffer_size = depth->n * sizeof(u32);
- buffer = drm_alloc(buffer_size, DRM_MEM_BUFS);
- if (buffer == NULL) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
- return -ENOMEM;
- }
- if (DRM_COPY_FROM_USER(buffer, depth->buffer, buffer_size)) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
- drm_free(buffer, buffer_size, DRM_MEM_BUFS);
- return -EFAULT;
- }
-
- if (depth->mask) {
- mask_size = depth->n * sizeof(u8);
- mask = drm_alloc(mask_size, DRM_MEM_BUFS);
- if (mask == NULL) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
- drm_free(buffer, buffer_size, DRM_MEM_BUFS);
- return -ENOMEM;
- }
- if (DRM_COPY_FROM_USER(mask, depth->mask, mask_size)) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
- drm_free(buffer, buffer_size, DRM_MEM_BUFS);
- drm_free(mask, mask_size, DRM_MEM_BUFS);
- return -EFAULT;
- }
-
- for (i = 0; i < count; i++) {
- if (mask[i]) {
- BEGIN_RING(6);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
- OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->depth_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_P |
- R128_GMC_CLR_CMP_CNTL_DIS |
- R128_GMC_WR_MSK_DIS);
-
- OUT_RING(dev_priv->depth_pitch_offset_c);
- OUT_RING(buffer[i]);
-
- OUT_RING((x[i] << 16) | y[i]);
- OUT_RING((1 << 16) | 1);
-
- ADVANCE_RING();
- }
- }
-
- drm_free(mask, mask_size, DRM_MEM_BUFS);
- } else {
- for (i = 0; i < count; i++) {
- BEGIN_RING(6);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
- OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->depth_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_P |
- R128_GMC_CLR_CMP_CNTL_DIS |
- R128_GMC_WR_MSK_DIS);
-
- OUT_RING(dev_priv->depth_pitch_offset_c);
- OUT_RING(buffer[i]);
-
- OUT_RING((x[i] << 16) | y[i]);
- OUT_RING((1 << 16) | 1);
-
- ADVANCE_RING();
- }
- }
-
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
- drm_free(buffer, buffer_size, DRM_MEM_BUFS);
-
- return 0;
-}
-
-static int r128_cce_dispatch_read_span(struct drm_device * dev,
- drm_r128_depth_t * depth)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- int count, x, y;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- count = depth->n;
- if (count > 4096 || count <= 0)
- return -EMSGSIZE;
-
- if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) {
- return -EFAULT;
- }
- if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
- return -EFAULT;
- }
-
- BEGIN_RING(7);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5));
- OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL |
- R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_NONE |
- (dev_priv->depth_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_S |
- R128_DP_SRC_SOURCE_MEMORY |
- R128_GMC_CLR_CMP_CNTL_DIS | R128_GMC_WR_MSK_DIS);
-
- OUT_RING(dev_priv->depth_pitch_offset_c);
- OUT_RING(dev_priv->span_pitch_offset_c);
-
- OUT_RING((x << 16) | y);
- OUT_RING((0 << 16) | 0);
- OUT_RING((count << 16) | 1);
-
- ADVANCE_RING();
-
- return 0;
-}
-
-static int r128_cce_dispatch_read_pixels(struct drm_device * dev,
- drm_r128_depth_t * depth)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- int count, *x, *y;
- int i, xbuf_size, ybuf_size;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- count = depth->n;
- if (count > 4096 || count <= 0)
- return -EMSGSIZE;
-
- if (count > dev_priv->depth_pitch) {
- count = dev_priv->depth_pitch;
- }
-
- xbuf_size = count * sizeof(*x);
- ybuf_size = count * sizeof(*y);
- x = drm_alloc(xbuf_size, DRM_MEM_BUFS);
- if (x == NULL) {
- return -ENOMEM;
- }
- y = drm_alloc(ybuf_size, DRM_MEM_BUFS);
- if (y == NULL) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- return -ENOMEM;
- }
- if (DRM_COPY_FROM_USER(x, depth->x, xbuf_size)) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
- return -EFAULT;
- }
- if (DRM_COPY_FROM_USER(y, depth->y, ybuf_size)) {
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
- return -EFAULT;
- }
-
- for (i = 0; i < count; i++) {
- BEGIN_RING(7);
-
- OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5));
- OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL |
- R128_GMC_DST_PITCH_OFFSET_CNTL |
- R128_GMC_BRUSH_NONE |
- (dev_priv->depth_fmt << 8) |
- R128_GMC_SRC_DATATYPE_COLOR |
- R128_ROP3_S |
- R128_DP_SRC_SOURCE_MEMORY |
- R128_GMC_CLR_CMP_CNTL_DIS | R128_GMC_WR_MSK_DIS);
-
- OUT_RING(dev_priv->depth_pitch_offset_c);
- OUT_RING(dev_priv->span_pitch_offset_c);
-
- OUT_RING((x[i] << 16) | y[i]);
- OUT_RING((i << 16) | 0);
- OUT_RING((1 << 16) | 1);
-
- ADVANCE_RING();
- }
-
- drm_free(x, xbuf_size, DRM_MEM_BUFS);
- drm_free(y, ybuf_size, DRM_MEM_BUFS);
-
- return 0;
-}
-
-/* ================================================================
- * Polygon stipple
- */
-
-static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- int i;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(33);
-
- OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31));
- for (i = 0; i < 32; i++) {
- OUT_RING(stipple[i]);
- }
-
- ADVANCE_RING();
-}
-
-/* ================================================================
- * IOCTL functions
- */
-
-static int r128_cce_clear(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_r128_clear_t *clear = data;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
-
- if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
-
- r128_cce_dispatch_clear(dev, clear);
- COMMIT_RING();
-
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->dirty |= R128_UPLOAD_CONTEXT | R128_UPLOAD_MASKS;
-
- return 0;
-}
-
-static int r128_do_init_pageflip(struct drm_device * dev)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- dev_priv->crtc_offset = R128_READ(R128_CRTC_OFFSET);
- dev_priv->crtc_offset_cntl = R128_READ(R128_CRTC_OFFSET_CNTL);
-
- R128_WRITE(R128_CRTC_OFFSET, dev_priv->front_offset);
- R128_WRITE(R128_CRTC_OFFSET_CNTL,
- dev_priv->crtc_offset_cntl | R128_CRTC_OFFSET_FLIP_CNTL);
-
- dev_priv->page_flipping = 1;
- dev_priv->current_page = 0;
- dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page;
-
- return 0;
-}
-
-static int r128_do_cleanup_pageflip(struct drm_device * dev)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- R128_WRITE(R128_CRTC_OFFSET, dev_priv->crtc_offset);
- R128_WRITE(R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl);
-
- if (dev_priv->current_page != 0) {
- r128_cce_dispatch_flip(dev);
- COMMIT_RING();
- }
-
- dev_priv->page_flipping = 0;
- return 0;
-}
-
-/* Swapping and flipping are different operations, need different ioctls.
- * They can & should be intermixed to support multiple 3d windows.
- */
-
-static int r128_cce_flip(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
-
- if (!dev_priv->page_flipping)
- r128_do_init_pageflip(dev);
-
- r128_cce_dispatch_flip(dev);
-
- COMMIT_RING();
- return 0;
-}
-
-static int r128_cce_swap(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
-
- if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
-
- r128_cce_dispatch_swap(dev);
- dev_priv->sarea_priv->dirty |= (R128_UPLOAD_CONTEXT |
- R128_UPLOAD_MASKS);
-
- COMMIT_RING();
- return 0;
-}
-
-static int r128_cce_vertex(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_r128_buf_priv_t *buf_priv;
- drm_r128_vertex_t *vertex = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("pid=%d index=%d count=%d discard=%d\n",
- DRM_CURRENTPID, vertex->idx, vertex->count, vertex->discard);
-
- if (vertex->idx < 0 || vertex->idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- vertex->idx, dma->buf_count - 1);
- return -EINVAL;
- }
- if (vertex->prim < 0 ||
- vertex->prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2) {
- DRM_ERROR("buffer prim %d\n", vertex->prim);
- return -EINVAL;
- }
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- buf = dma->buflist[vertex->idx];
- buf_priv = buf->dev_private;
-
- if (buf->file_priv != file_priv) {
- DRM_ERROR("process %d using buffer owned by %p\n",
- DRM_CURRENTPID, buf->file_priv);
- return -EINVAL;
- }
- if (buf->pending) {
- DRM_ERROR("sending pending buffer %d\n", vertex->idx);
- return -EINVAL;
- }
-
- buf->used = vertex->count;
- buf_priv->prim = vertex->prim;
- buf_priv->discard = vertex->discard;
-
- r128_cce_dispatch_vertex(dev, buf);
-
- COMMIT_RING();
- return 0;
-}
-
-static int r128_cce_indices(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_r128_buf_priv_t *buf_priv;
- drm_r128_indices_t *elts = data;
- int count;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("pid=%d buf=%d s=%d e=%d d=%d\n", DRM_CURRENTPID,
- elts->idx, elts->start, elts->end, elts->discard);
-
- if (elts->idx < 0 || elts->idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- elts->idx, dma->buf_count - 1);
- return -EINVAL;
- }
- if (elts->prim < 0 ||
- elts->prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2) {
- DRM_ERROR("buffer prim %d\n", elts->prim);
- return -EINVAL;
- }
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- buf = dma->buflist[elts->idx];
- buf_priv = buf->dev_private;
-
- if (buf->file_priv != file_priv) {
- DRM_ERROR("process %d using buffer owned by %p\n",
- DRM_CURRENTPID, buf->file_priv);
- return -EINVAL;
- }
- if (buf->pending) {
- DRM_ERROR("sending pending buffer %d\n", elts->idx);
- return -EINVAL;
- }
-
- count = (elts->end - elts->start) / sizeof(u16);
- elts->start -= R128_INDEX_PRIM_OFFSET;
-
- if (elts->start & 0x7) {
- DRM_ERROR("misaligned buffer 0x%x\n", elts->start);
- return -EINVAL;
- }
- if (elts->start < buf->used) {
- DRM_ERROR("no header 0x%x - 0x%x\n", elts->start, buf->used);
- return -EINVAL;
- }
-
- buf->used = elts->end;
- buf_priv->prim = elts->prim;
- buf_priv->discard = elts->discard;
-
- r128_cce_dispatch_indices(dev, buf, elts->start, elts->end, count);
-
- COMMIT_RING();
- return 0;
-}
-
-static int r128_cce_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_blit_t *blit = data;
- int ret;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- DRM_DEBUG("pid=%d index=%d\n", DRM_CURRENTPID, blit->idx);
-
- if (blit->idx < 0 || blit->idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- blit->idx, dma->buf_count - 1);
- return -EINVAL;
- }
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- ret = r128_cce_dispatch_blit(dev, file_priv, blit);
-
- COMMIT_RING();
- return ret;
-}
-
-static int r128_cce_depth(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_depth_t *depth = data;
- int ret;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
-
- ret = -EINVAL;
- switch (depth->func) {
- case R128_WRITE_SPAN:
- ret = r128_cce_dispatch_write_span(dev, depth);
- break;
- case R128_WRITE_PIXELS:
- ret = r128_cce_dispatch_write_pixels(dev, depth);
- break;
- case R128_READ_SPAN:
- ret = r128_cce_dispatch_read_span(dev, depth);
- break;
- case R128_READ_PIXELS:
- ret = r128_cce_dispatch_read_pixels(dev, depth);
- break;
- }
-
- COMMIT_RING();
- return ret;
-}
-
-static int r128_cce_stipple(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_stipple_t *stipple = data;
- u32 mask[32];
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (DRM_COPY_FROM_USER(&mask, stipple->mask, 32 * sizeof(u32)))
- return -EFAULT;
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
-
- r128_cce_dispatch_stipple(dev, mask);
-
- COMMIT_RING();
- return 0;
-}
-
-static int r128_cce_indirect(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_r128_buf_priv_t *buf_priv;
- drm_r128_indirect_t *indirect = data;
-#if 0
- RING_LOCALS;
-#endif
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("idx=%d s=%d e=%d d=%d\n",
- indirect->idx, indirect->start, indirect->end,
- indirect->discard);
-
- if (indirect->idx < 0 || indirect->idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- indirect->idx, dma->buf_count - 1);
- return -EINVAL;
- }
-
- buf = dma->buflist[indirect->idx];
- buf_priv = buf->dev_private;
-
- if (buf->file_priv != file_priv) {
- DRM_ERROR("process %d using buffer owned by %p\n",
- DRM_CURRENTPID, buf->file_priv);
- return -EINVAL;
- }
- if (buf->pending) {
- DRM_ERROR("sending pending buffer %d\n", indirect->idx);
- return -EINVAL;
- }
-
- if (indirect->start < buf->used) {
- DRM_ERROR("reusing indirect: start=0x%x actual=0x%x\n",
- indirect->start, buf->used);
- return -EINVAL;
- }
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- buf->used = indirect->end;
- buf_priv->discard = indirect->discard;
-
-#if 0
- /* Wait for the 3D stream to idle before the indirect buffer
- * containing 2D acceleration commands is processed.
- */
- BEGIN_RING(2);
- RADEON_WAIT_UNTIL_3D_IDLE();
- ADVANCE_RING();
-#endif
-
- /* Dispatch the indirect buffer full of commands from the
- * X server. This is insecure and is thus only available to
- * privileged clients.
- */
- r128_cce_dispatch_indirect(dev, buf, indirect->start, indirect->end);
-
- COMMIT_RING();
- return 0;
-}
-
-static int r128_getparam(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_r128_private_t *dev_priv = dev->dev_private;
- drm_r128_getparam_t *param = data;
- int value;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
-
- switch (param->param) {
- case R128_PARAM_IRQ_NR:
- value = dev->irq;
- break;
- default:
- return -EINVAL;
- }
-
- if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
- DRM_ERROR("copy_to_user\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-void r128_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
-{
- if (dev->dev_private) {
- drm_r128_private_t *dev_priv = dev->dev_private;
- if (dev_priv->page_flipping) {
- r128_do_cleanup_pageflip(dev);
- }
- }
-}
-
-void r128_driver_lastclose(struct drm_device * dev)
-{
- r128_do_cleanup_cce(dev);
-}
-
-struct drm_ioctl_desc r128_ioctls[] = {
- DRM_IOCTL_DEF(DRM_R128_INIT, r128_cce_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_R128_CCE_START, r128_cce_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_R128_CCE_STOP, r128_cce_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_R128_CCE_RESET, r128_cce_reset, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_R128_CCE_IDLE, r128_cce_idle, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_RESET, r128_engine_reset, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_FULLSCREEN, r128_fullscreen, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_SWAP, r128_cce_swap, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_FLIP, r128_cce_flip, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_CLEAR, r128_cce_clear, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_VERTEX, r128_cce_vertex, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_INDICES, r128_cce_indices, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_BLIT, r128_cce_blit, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_DEPTH, r128_cce_depth, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_STIPPLE, r128_cce_stipple, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_R128_INDIRECT, r128_cce_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_R128_GETPARAM, r128_getparam, DRM_AUTH),
-};
-
-int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls);
+++ /dev/null
-/* r300_cmdbuf.c -- Command buffer emission for R300 -*- linux-c -*-
- *
- * Copyright (C) The Weather Channel, Inc. 2002.
- * Copyright (C) 2004 Nicolai Haehnle.
- * All Rights Reserved.
- *
- * The Weather Channel (TM) funded Tungsten Graphics to develop the
- * initial release of the Radeon 8500 driver under the XFree86 license.
- * This notice must be preserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Nicolai Haehnle <prefect_@gmx.net>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "radeon_drm.h"
-#include "radeon_drv.h"
-#include "r300_reg.h"
-
-#define R300_SIMULTANEOUS_CLIPRECTS 4
-
-/* Values for R300_RE_CLIPRECT_CNTL depending on the number of cliprects
- */
-static const int r300_cliprect_cntl[4] = {
- 0xAAAA,
- 0xEEEE,
- 0xFEFE,
- 0xFFFE
-};
-
-/**
- * Emit up to R300_SIMULTANEOUS_CLIPRECTS cliprects from the given command
- * buffer, starting with index n.
- */
-static int r300_emit_cliprects(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf, int n)
-{
- struct drm_clip_rect box;
- int nr;
- int i;
- RING_LOCALS;
-
- nr = cmdbuf->nbox - n;
- if (nr > R300_SIMULTANEOUS_CLIPRECTS)
- nr = R300_SIMULTANEOUS_CLIPRECTS;
-
- DRM_DEBUG("%i cliprects\n", nr);
-
- if (nr) {
- BEGIN_RING(6 + nr * 2);
- OUT_RING(CP_PACKET0(R300_RE_CLIPRECT_TL_0, nr * 2 - 1));
-
- for (i = 0; i < nr; ++i) {
- if (DRM_COPY_FROM_USER_UNCHECKED
- (&box, &cmdbuf->boxes[n + i], sizeof(box))) {
- DRM_ERROR("copy cliprect faulted\n");
- return -EFAULT;
- }
-
- box.x2--; /* Hardware expects inclusive bottom-right corner */
- box.y2--;
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
- box.x1 = (box.x1) &
- R300_CLIPRECT_MASK;
- box.y1 = (box.y1) &
- R300_CLIPRECT_MASK;
- box.x2 = (box.x2) &
- R300_CLIPRECT_MASK;
- box.y2 = (box.y2) &
- R300_CLIPRECT_MASK;
- } else {
- box.x1 = (box.x1 + R300_CLIPRECT_OFFSET) &
- R300_CLIPRECT_MASK;
- box.y1 = (box.y1 + R300_CLIPRECT_OFFSET) &
- R300_CLIPRECT_MASK;
- box.x2 = (box.x2 + R300_CLIPRECT_OFFSET) &
- R300_CLIPRECT_MASK;
- box.y2 = (box.y2 + R300_CLIPRECT_OFFSET) &
- R300_CLIPRECT_MASK;
- }
-
- OUT_RING((box.x1 << R300_CLIPRECT_X_SHIFT) |
- (box.y1 << R300_CLIPRECT_Y_SHIFT));
- OUT_RING((box.x2 << R300_CLIPRECT_X_SHIFT) |
- (box.y2 << R300_CLIPRECT_Y_SHIFT));
-
- }
-
- OUT_RING_REG(R300_RE_CLIPRECT_CNTL, r300_cliprect_cntl[nr - 1]);
-
- /* TODO/SECURITY: Force scissors to a safe value, otherwise the
- * client might be able to trample over memory.
- * The impact should be very limited, but I'd rather be safe than
- * sorry.
- */
- OUT_RING(CP_PACKET0(R300_RE_SCISSORS_TL, 1));
- OUT_RING(0);
- OUT_RING(R300_SCISSORS_X_MASK | R300_SCISSORS_Y_MASK);
- ADVANCE_RING();
- } else {
- /* Why we allow zero cliprect rendering:
- * There are some commands in a command buffer that must be submitted
- * even when there are no cliprects, e.g. DMA buffer discard
- * or state setting (though state setting could be avoided by
- * simulating a loss of context).
- *
- * Now since the cmdbuf interface is so chaotic right now (and is
- * bound to remain that way for a bit until things settle down),
- * it is basically impossible to filter out the commands that are
- * necessary and those that aren't.
- *
- * So I choose the safe way and don't do any filtering at all;
- * instead, I simply set up the engine so that all rendering
- * can't produce any fragments.
- */
- BEGIN_RING(2);
- OUT_RING_REG(R300_RE_CLIPRECT_CNTL, 0);
- ADVANCE_RING();
- }
-
- /* flus cache and wait idle clean after cliprect change */
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
- OUT_RING(R300_RB3D_DC_FLUSH);
- ADVANCE_RING();
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0));
- OUT_RING(RADEON_WAIT_3D_IDLECLEAN);
- ADVANCE_RING();
- /* set flush flag */
- dev_priv->track_flush |= RADEON_FLUSH_EMITED;
-
- return 0;
-}
-
-static u8 r300_reg_flags[0x10000 >> 2];
-
-void r300_init_reg_flags(struct drm_device *dev)
-{
- int i;
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- memset(r300_reg_flags, 0, 0x10000 >> 2);
-#define ADD_RANGE_MARK(reg, count,mark) \
- for(i=((reg)>>2);i<((reg)>>2)+(count);i++)\
- r300_reg_flags[i]|=(mark);
-
-#define MARK_SAFE 1
-#define MARK_CHECK_OFFSET 2
-
-#define ADD_RANGE(reg, count) ADD_RANGE_MARK(reg, count, MARK_SAFE)
-
- /* these match cmducs() command in r300_driver/r300/r300_cmdbuf.c */
- ADD_RANGE(R300_SE_VPORT_XSCALE, 6);
- ADD_RANGE(R300_VAP_CNTL, 1);
- ADD_RANGE(R300_SE_VTE_CNTL, 2);
- ADD_RANGE(0x2134, 2);
- ADD_RANGE(R300_VAP_CNTL_STATUS, 1);
- ADD_RANGE(R300_VAP_INPUT_CNTL_0, 2);
- ADD_RANGE(0x21DC, 1);
- ADD_RANGE(R300_VAP_UNKNOWN_221C, 1);
- ADD_RANGE(R300_VAP_CLIP_X_0, 4);
- ADD_RANGE(R300_VAP_PVS_STATE_FLUSH_REG, 1);
- ADD_RANGE(R300_VAP_UNKNOWN_2288, 1);
- ADD_RANGE(R300_VAP_OUTPUT_VTX_FMT_0, 2);
- ADD_RANGE(R300_VAP_PVS_CNTL_1, 3);
- ADD_RANGE(R300_GB_ENABLE, 1);
- ADD_RANGE(R300_GB_MSPOS0, 5);
- ADD_RANGE(R300_TX_INVALTAGS, 1);
- ADD_RANGE(R300_TX_ENABLE, 1);
- ADD_RANGE(0x4200, 4);
- ADD_RANGE(0x4214, 1);
- ADD_RANGE(R300_RE_POINTSIZE, 1);
- ADD_RANGE(0x4230, 3);
- ADD_RANGE(R300_RE_LINE_CNT, 1);
- ADD_RANGE(R300_RE_UNK4238, 1);
- ADD_RANGE(0x4260, 3);
- ADD_RANGE(R300_RE_SHADE, 4);
- ADD_RANGE(R300_RE_POLYGON_MODE, 5);
- ADD_RANGE(R300_RE_ZBIAS_CNTL, 1);
- ADD_RANGE(R300_RE_ZBIAS_T_FACTOR, 4);
- ADD_RANGE(R300_RE_OCCLUSION_CNTL, 1);
- ADD_RANGE(R300_RE_CULL_CNTL, 1);
- ADD_RANGE(0x42C0, 2);
- ADD_RANGE(R300_RS_CNTL_0, 2);
-
- ADD_RANGE(R300_SC_HYPERZ, 2);
- ADD_RANGE(0x43E8, 1);
-
- ADD_RANGE(0x46A4, 5);
-
- ADD_RANGE(R300_RE_FOG_STATE, 1);
- ADD_RANGE(R300_FOG_COLOR_R, 3);
- ADD_RANGE(R300_PP_ALPHA_TEST, 2);
- ADD_RANGE(0x4BD8, 1);
- ADD_RANGE(R300_PFS_PARAM_0_X, 64);
- ADD_RANGE(0x4E00, 1);
- ADD_RANGE(R300_RB3D_CBLEND, 2);
- ADD_RANGE(R300_RB3D_COLORMASK, 1);
- ADD_RANGE(R300_RB3D_BLEND_COLOR, 3);
- ADD_RANGE_MARK(R300_RB3D_COLOROFFSET0, 1, MARK_CHECK_OFFSET); /* check offset */
- ADD_RANGE(R300_RB3D_COLORPITCH0, 1);
- ADD_RANGE(0x4E50, 9);
- ADD_RANGE(0x4E88, 1);
- ADD_RANGE(0x4EA0, 2);
- ADD_RANGE(R300_ZB_CNTL, 3);
- ADD_RANGE(R300_ZB_FORMAT, 4);
- ADD_RANGE_MARK(R300_ZB_DEPTHOFFSET, 1, MARK_CHECK_OFFSET); /* check offset */
- ADD_RANGE(R300_ZB_DEPTHPITCH, 1);
- ADD_RANGE(R300_ZB_DEPTHCLEARVALUE, 1);
- ADD_RANGE(R300_ZB_ZMASK_OFFSET, 13);
-
- ADD_RANGE(R300_TX_FILTER_0, 16);
- ADD_RANGE(R300_TX_FILTER1_0, 16);
- ADD_RANGE(R300_TX_SIZE_0, 16);
- ADD_RANGE(R300_TX_FORMAT_0, 16);
- ADD_RANGE(R300_TX_PITCH_0, 16);
- /* Texture offset is dangerous and needs more checking */
- ADD_RANGE_MARK(R300_TX_OFFSET_0, 16, MARK_CHECK_OFFSET);
- ADD_RANGE(R300_TX_CHROMA_KEY_0, 16);
- ADD_RANGE(R300_TX_BORDER_COLOR_0, 16);
-
- /* Sporadic registers used as primitives are emitted */
- ADD_RANGE(R300_ZB_ZCACHE_CTLSTAT, 1);
- ADD_RANGE(R300_RB3D_DSTCACHE_CTLSTAT, 1);
- ADD_RANGE(R300_VAP_INPUT_ROUTE_0_0, 8);
- ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8);
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
- ADD_RANGE(R500_VAP_INDEX_OFFSET, 1);
- ADD_RANGE(R500_US_CONFIG, 2);
- ADD_RANGE(R500_US_CODE_ADDR, 3);
- ADD_RANGE(R500_US_FC_CTRL, 1);
- ADD_RANGE(R500_RS_IP_0, 16);
- ADD_RANGE(R500_RS_INST_0, 16);
- ADD_RANGE(R500_RB3D_COLOR_CLEAR_VALUE_AR, 2);
- ADD_RANGE(R500_RB3D_CONSTANT_COLOR_AR, 2);
- ADD_RANGE(R500_ZB_FIFO_SIZE, 2);
- } else {
- ADD_RANGE(R300_PFS_CNTL_0, 3);
- ADD_RANGE(R300_PFS_NODE_0, 4);
- ADD_RANGE(R300_PFS_TEXI_0, 64);
- ADD_RANGE(R300_PFS_INSTR0_0, 64);
- ADD_RANGE(R300_PFS_INSTR1_0, 64);
- ADD_RANGE(R300_PFS_INSTR2_0, 64);
- ADD_RANGE(R300_PFS_INSTR3_0, 64);
- ADD_RANGE(R300_RS_INTERP_0, 8);
- ADD_RANGE(R300_RS_ROUTE_0, 8);
-
- }
-}
-
-static __inline__ int r300_check_range(unsigned reg, int count)
-{
- int i;
- if (reg & ~0xffff)
- return -1;
- for (i = (reg >> 2); i < (reg >> 2) + count; i++)
- if (r300_reg_flags[i] != MARK_SAFE)
- return 1;
- return 0;
-}
-
-static __inline__ int r300_emit_carefully_checked_packet0(drm_radeon_private_t *
- dev_priv,
- drm_radeon_kcmd_buffer_t
- * cmdbuf,
- drm_r300_cmd_header_t
- header)
-{
- int reg;
- int sz;
- int i;
- int values[64];
- RING_LOCALS;
-
- sz = header.packet0.count;
- reg = (header.packet0.reghi << 8) | header.packet0.reglo;
-
- if ((sz > 64) || (sz < 0)) {
- DRM_ERROR
- ("Cannot emit more than 64 values at a time (reg=%04x sz=%d)\n",
- reg, sz);
- return -EINVAL;
- }
- for (i = 0; i < sz; i++) {
- values[i] = ((int *)cmdbuf->buf)[i];
- switch (r300_reg_flags[(reg >> 2) + i]) {
- case MARK_SAFE:
- break;
- case MARK_CHECK_OFFSET:
- if (!radeon_check_offset(dev_priv, (u32) values[i])) {
- DRM_ERROR
- ("Offset failed range check (reg=%04x sz=%d)\n",
- reg, sz);
- return -EINVAL;
- }
- break;
- default:
- DRM_ERROR("Register %04x failed check as flag=%02x\n",
- reg + i * 4, r300_reg_flags[(reg >> 2) + i]);
- return -EINVAL;
- }
- }
-
- BEGIN_RING(1 + sz);
- OUT_RING(CP_PACKET0(reg, sz - 1));
- OUT_RING_TABLE(values, sz);
- ADVANCE_RING();
-
- cmdbuf->buf += sz * 4;
- cmdbuf->bufsz -= sz * 4;
-
- return 0;
-}
-
-/**
- * Emits a packet0 setting arbitrary registers.
- * Called by r300_do_cp_cmdbuf.
- *
- * Note that checks are performed on contents and addresses of the registers
- */
-static __inline__ int r300_emit_packet0(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf,
- drm_r300_cmd_header_t header)
-{
- int reg;
- int sz;
- RING_LOCALS;
-
- sz = header.packet0.count;
- reg = (header.packet0.reghi << 8) | header.packet0.reglo;
-
- DRM_DEBUG("R300_CMD_PACKET0: reg %04x, sz %d\n", reg, sz);
- if (!sz)
- return 0;
-
- if (sz * 4 > cmdbuf->bufsz)
- return -EINVAL;
-
- if (reg + sz * 4 >= 0x10000) {
- DRM_ERROR("No such registers in hardware reg=%04x sz=%d\n", reg,
- sz);
- return -EINVAL;
- }
-
- if (r300_check_range(reg, sz)) {
- /* go and check everything */
- return r300_emit_carefully_checked_packet0(dev_priv, cmdbuf,
- header);
- }
- /* the rest of the data is safe to emit, whatever the values the user passed */
-
- BEGIN_RING(1 + sz);
- OUT_RING(CP_PACKET0(reg, sz - 1));
- OUT_RING_TABLE((int *)cmdbuf->buf, sz);
- ADVANCE_RING();
-
- cmdbuf->buf += sz * 4;
- cmdbuf->bufsz -= sz * 4;
-
- return 0;
-}
-
-/**
- * Uploads user-supplied vertex program instructions or parameters onto
- * the graphics card.
- * Called by r300_do_cp_cmdbuf.
- */
-static __inline__ int r300_emit_vpu(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf,
- drm_r300_cmd_header_t header)
-{
- int sz;
- int addr;
- RING_LOCALS;
-
- sz = header.vpu.count;
- addr = (header.vpu.adrhi << 8) | header.vpu.adrlo;
-
- if (!sz)
- return 0;
- if (sz * 16 > cmdbuf->bufsz)
- return -EINVAL;
-
- /* VAP is very sensitive so we purge cache before we program it
- * and we also flush its state before & after */
- BEGIN_RING(6);
- OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
- OUT_RING(R300_RB3D_DC_FLUSH);
- OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0));
- OUT_RING(RADEON_WAIT_3D_IDLECLEAN);
- OUT_RING(CP_PACKET0(R300_VAP_PVS_STATE_FLUSH_REG, 0));
- OUT_RING(0);
- ADVANCE_RING();
- /* set flush flag */
- dev_priv->track_flush |= RADEON_FLUSH_EMITED;
-
- BEGIN_RING(3 + sz * 4);
- OUT_RING_REG(R300_VAP_PVS_UPLOAD_ADDRESS, addr);
- OUT_RING(CP_PACKET0_TABLE(R300_VAP_PVS_UPLOAD_DATA, sz * 4 - 1));
- OUT_RING_TABLE((int *)cmdbuf->buf, sz * 4);
- ADVANCE_RING();
-
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(R300_VAP_PVS_STATE_FLUSH_REG, 0));
- OUT_RING(0);
- ADVANCE_RING();
-
- cmdbuf->buf += sz * 16;
- cmdbuf->bufsz -= sz * 16;
-
- return 0;
-}
-
-/**
- * Emit a clear packet from userspace.
- * Called by r300_emit_packet3.
- */
-static __inline__ int r300_emit_clear(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- RING_LOCALS;
-
- if (8 * 4 > cmdbuf->bufsz)
- return -EINVAL;
-
- BEGIN_RING(10);
- OUT_RING(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8));
- OUT_RING(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING |
- (1 << R300_PRIM_NUM_VERTICES_SHIFT));
- OUT_RING_TABLE((int *)cmdbuf->buf, 8);
- ADVANCE_RING();
-
- BEGIN_RING(4);
- OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
- OUT_RING(R300_RB3D_DC_FLUSH);
- OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0));
- OUT_RING(RADEON_WAIT_3D_IDLECLEAN);
- ADVANCE_RING();
- /* set flush flag */
- dev_priv->track_flush |= RADEON_FLUSH_EMITED;
-
- cmdbuf->buf += 8 * 4;
- cmdbuf->bufsz -= 8 * 4;
-
- return 0;
-}
-
-static __inline__ int r300_emit_3d_load_vbpntr(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf,
- u32 header)
-{
- int count, i, k;
-#define MAX_ARRAY_PACKET 64
- u32 payload[MAX_ARRAY_PACKET];
- u32 narrays;
- RING_LOCALS;
-
- count = (header >> 16) & 0x3fff;
-
- if ((count + 1) > MAX_ARRAY_PACKET) {
- DRM_ERROR("Too large payload in 3D_LOAD_VBPNTR (count=%d)\n",
- count);
- return -EINVAL;
- }
- memset(payload, 0, MAX_ARRAY_PACKET * 4);
- memcpy(payload, cmdbuf->buf + 4, (count + 1) * 4);
-
- /* carefully check packet contents */
-
- narrays = payload[0];
- k = 0;
- i = 1;
- while ((k < narrays) && (i < (count + 1))) {
- i++; /* skip attribute field */
- if (!radeon_check_offset(dev_priv, payload[i])) {
- DRM_ERROR
- ("Offset failed range check (k=%d i=%d) while processing 3D_LOAD_VBPNTR packet.\n",
- k, i);
- return -EINVAL;
- }
- k++;
- i++;
- if (k == narrays)
- break;
- /* have one more to process, they come in pairs */
- if (!radeon_check_offset(dev_priv, payload[i])) {
- DRM_ERROR
- ("Offset failed range check (k=%d i=%d) while processing 3D_LOAD_VBPNTR packet.\n",
- k, i);
- return -EINVAL;
- }
- k++;
- i++;
- }
- /* do the counts match what we expect ? */
- if ((k != narrays) || (i != (count + 1))) {
- DRM_ERROR
- ("Malformed 3D_LOAD_VBPNTR packet (k=%d i=%d narrays=%d count+1=%d).\n",
- k, i, narrays, count + 1);
- return -EINVAL;
- }
-
- /* all clear, output packet */
-
- BEGIN_RING(count + 2);
- OUT_RING(header);
- OUT_RING_TABLE(payload, count + 1);
- ADVANCE_RING();
-
- cmdbuf->buf += (count + 2) * 4;
- cmdbuf->bufsz -= (count + 2) * 4;
-
- return 0;
-}
-
-static __inline__ int r300_emit_bitblt_multi(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- u32 *cmd = (u32 *) cmdbuf->buf;
- int count, ret;
- RING_LOCALS;
-
- count=(cmd[0]>>16) & 0x3fff;
-
- if (cmd[0] & 0x8000) {
- u32 offset;
-
- if (cmd[1] & (RADEON_GMC_SRC_PITCH_OFFSET_CNTL
- | RADEON_GMC_DST_PITCH_OFFSET_CNTL)) {
- offset = cmd[2] << 10;
- ret = !radeon_check_offset(dev_priv, offset);
- if (ret) {
- DRM_ERROR("Invalid bitblt first offset is %08X\n", offset);
- return -EINVAL;
- }
- }
-
- if ((cmd[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL) &&
- (cmd[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL)) {
- offset = cmd[3] << 10;
- ret = !radeon_check_offset(dev_priv, offset);
- if (ret) {
- DRM_ERROR("Invalid bitblt second offset is %08X\n", offset);
- return -EINVAL;
- }
-
- }
- }
-
- BEGIN_RING(count+2);
- OUT_RING(cmd[0]);
- OUT_RING_TABLE((int *)(cmdbuf->buf + 4), count + 1);
- ADVANCE_RING();
-
- cmdbuf->buf += (count+2)*4;
- cmdbuf->bufsz -= (count+2)*4;
-
- return 0;
-}
-
-static __inline__ int r300_emit_draw_indx_2(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- u32 *cmd;
- int count;
- int expected_count;
- RING_LOCALS;
-
- cmd = (u32 *) cmdbuf->buf;
- count = (cmd[0]>>16) & 0x3fff;
- expected_count = cmd[1] >> 16;
- if (!(cmd[1] & R300_VAP_VF_CNTL__INDEX_SIZE_32bit))
- expected_count = (expected_count+1)/2;
-
- if (count && count != expected_count) {
- DRM_ERROR("3D_DRAW_INDX_2: packet size %i, expected %i\n",
- count, expected_count);
- return -EINVAL;
- }
-
- BEGIN_RING(count+2);
- OUT_RING(cmd[0]);
- OUT_RING_TABLE((int *)(cmdbuf->buf + 4), count + 1);
- ADVANCE_RING();
-
- cmdbuf->buf += (count+2)*4;
- cmdbuf->bufsz -= (count+2)*4;
-
- if (!count) {
- drm_r300_cmd_header_t header;
-
- if (cmdbuf->bufsz < 4*4 + sizeof(header)) {
- DRM_ERROR("3D_DRAW_INDX_2: expect subsequent INDX_BUFFER, but stream is too short.\n");
- return -EINVAL;
- }
-
- header.u = *(unsigned int *)cmdbuf->buf;
-
- cmdbuf->buf += sizeof(header);
- cmdbuf->bufsz -= sizeof(header);
- cmd = (u32 *) cmdbuf->buf;
-
- if (header.header.cmd_type != R300_CMD_PACKET3 ||
- header.packet3.packet != R300_CMD_PACKET3_RAW ||
- cmd[0] != CP_PACKET3(RADEON_CP_INDX_BUFFER, 2)) {
- DRM_ERROR("3D_DRAW_INDX_2: expect subsequent INDX_BUFFER.\n");
- return -EINVAL;
- }
-
- if ((cmd[1] & 0x8000ffff) != 0x80000810) {
- DRM_ERROR("Invalid indx_buffer reg address %08X\n", cmd[1]);
- return -EINVAL;
- }
- if (!radeon_check_offset(dev_priv, cmd[2])) {
- DRM_ERROR("Invalid indx_buffer offset is %08X\n", cmd[2]);
- return -EINVAL;
- }
- if (cmd[3] != expected_count) {
- DRM_ERROR("INDX_BUFFER: buffer size %i, expected %i\n",
- cmd[3], expected_count);
- return -EINVAL;
- }
-
- BEGIN_RING(4);
- OUT_RING(cmd[0]);
- OUT_RING_TABLE((int *)(cmdbuf->buf + 4), 3);
- ADVANCE_RING();
-
- cmdbuf->buf += 4*4;
- cmdbuf->bufsz -= 4*4;
- }
-
- return 0;
-}
-
-static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- u32 header;
- int count;
- RING_LOCALS;
-
- if (4 > cmdbuf->bufsz)
- return -EINVAL;
-
- /* Fixme !! This simply emits a packet without much checking.
- We need to be smarter. */
-
- /* obtain first word - actual packet3 header */
- header = *(u32 *) cmdbuf->buf;
-
- /* Is it packet 3 ? */
- if ((header >> 30) != 0x3) {
- DRM_ERROR("Not a packet3 header (0x%08x)\n", header);
- return -EINVAL;
- }
-
- count = (header >> 16) & 0x3fff;
-
- /* Check again now that we know how much data to expect */
- if ((count + 2) * 4 > cmdbuf->bufsz) {
- DRM_ERROR
- ("Expected packet3 of length %d but have only %d bytes left\n",
- (count + 2) * 4, cmdbuf->bufsz);
- return -EINVAL;
- }
-
- /* Is it a packet type we know about ? */
- switch (header & 0xff00) {
- case RADEON_3D_LOAD_VBPNTR: /* load vertex array pointers */
- return r300_emit_3d_load_vbpntr(dev_priv, cmdbuf, header);
-
- case RADEON_CNTL_BITBLT_MULTI:
- return r300_emit_bitblt_multi(dev_priv, cmdbuf);
-
- case RADEON_CP_INDX_BUFFER:
- DRM_ERROR("packet3 INDX_BUFFER without preceding 3D_DRAW_INDX_2 is illegal.\n");
- return -EINVAL;
- case RADEON_CP_3D_DRAW_IMMD_2:
- /* triggers drawing using in-packet vertex data */
- case RADEON_CP_3D_DRAW_VBUF_2:
- /* triggers drawing of vertex buffers setup elsewhere */
- dev_priv->track_flush &= ~(RADEON_FLUSH_EMITED |
- RADEON_PURGE_EMITED);
- break;
- case RADEON_CP_3D_DRAW_INDX_2:
- /* triggers drawing using indices to vertex buffer */
- /* whenever we send vertex we clear flush & purge */
- dev_priv->track_flush &= ~(RADEON_FLUSH_EMITED |
- RADEON_PURGE_EMITED);
- return r300_emit_draw_indx_2(dev_priv, cmdbuf);
- case RADEON_WAIT_FOR_IDLE:
- case RADEON_CP_NOP:
- /* these packets are safe */
- break;
- default:
- DRM_ERROR("Unknown packet3 header (0x%08x)\n", header);
- return -EINVAL;
- }
-
- BEGIN_RING(count + 2);
- OUT_RING(header);
- OUT_RING_TABLE((int *)(cmdbuf->buf + 4), count + 1);
- ADVANCE_RING();
-
- cmdbuf->buf += (count + 2) * 4;
- cmdbuf->bufsz -= (count + 2) * 4;
-
- return 0;
-}
-
-/**
- * Emit a rendering packet3 from userspace.
- * Called by r300_do_cp_cmdbuf.
- */
-static __inline__ int r300_emit_packet3(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf,
- drm_r300_cmd_header_t header)
-{
- int n;
- int ret;
- char *orig_buf = cmdbuf->buf;
- int orig_bufsz = cmdbuf->bufsz;
-
- /* This is a do-while-loop so that we run the interior at least once,
- * even if cmdbuf->nbox is 0. Compare r300_emit_cliprects for rationale.
- */
- n = 0;
- do {
- if (cmdbuf->nbox > R300_SIMULTANEOUS_CLIPRECTS) {
- ret = r300_emit_cliprects(dev_priv, cmdbuf, n);
- if (ret)
- return ret;
-
- cmdbuf->buf = orig_buf;
- cmdbuf->bufsz = orig_bufsz;
- }
-
- switch (header.packet3.packet) {
- case R300_CMD_PACKET3_CLEAR:
- DRM_DEBUG("R300_CMD_PACKET3_CLEAR\n");
- ret = r300_emit_clear(dev_priv, cmdbuf);
- if (ret) {
- DRM_ERROR("r300_emit_clear failed\n");
- return ret;
- }
- break;
-
- case R300_CMD_PACKET3_RAW:
- DRM_DEBUG("R300_CMD_PACKET3_RAW\n");
- ret = r300_emit_raw_packet3(dev_priv, cmdbuf);
- if (ret) {
- DRM_ERROR("r300_emit_raw_packet3 failed\n");
- return ret;
- }
- break;
-
- default:
- DRM_ERROR("bad packet3 type %i at %p\n",
- header.packet3.packet,
- cmdbuf->buf - sizeof(header));
- return -EINVAL;
- }
-
- n += R300_SIMULTANEOUS_CLIPRECTS;
- } while (n < cmdbuf->nbox);
-
- return 0;
-}
-
-/* Some of the R300 chips seem to be extremely touchy about the two registers
- * that are configured in r300_pacify.
- * Among the worst offenders seems to be the R300 ND (0x4E44): When userspace
- * sends a command buffer that contains only state setting commands and a
- * vertex program/parameter upload sequence, this will eventually lead to a
- * lockup, unless the sequence is bracketed by calls to r300_pacify.
- * So we should take great care to *always* call r300_pacify before
- * *anything* 3D related, and again afterwards. This is what the
- * call bracket in r300_do_cp_cmdbuf is for.
- */
-
-/**
- * Emit the sequence to pacify R300.
- */
-static __inline__ void r300_pacify(drm_radeon_private_t *dev_priv)
-{
- uint32_t cache_z, cache_3d, cache_2d;
- RING_LOCALS;
-
- cache_z = R300_ZC_FLUSH;
- cache_2d = R300_RB2D_DC_FLUSH;
- cache_3d = R300_RB3D_DC_FLUSH;
- if (!(dev_priv->track_flush & RADEON_PURGE_EMITED)) {
- /* we can purge, primitive where draw since last purge */
- cache_z |= R300_ZC_FREE;
- cache_2d |= R300_RB2D_DC_FREE;
- cache_3d |= R300_RB3D_DC_FREE;
- }
-
- /* flush & purge zbuffer */
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(R300_ZB_ZCACHE_CTLSTAT, 0));
- OUT_RING(cache_z);
- ADVANCE_RING();
- /* flush & purge 3d */
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
- OUT_RING(cache_3d);
- ADVANCE_RING();
- /* flush & purge texture */
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(R300_TX_INVALTAGS, 0));
- OUT_RING(0);
- ADVANCE_RING();
- /* FIXME: is this one really needed ? */
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(R300_RB3D_AARESOLVE_CTL, 0));
- OUT_RING(0);
- ADVANCE_RING();
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0));
- OUT_RING(RADEON_WAIT_3D_IDLECLEAN);
- ADVANCE_RING();
- /* flush & purge 2d through E2 as RB2D will trigger lockup */
- BEGIN_RING(4);
- OUT_RING(CP_PACKET0(R300_DSTCACHE_CTLSTAT, 0));
- OUT_RING(cache_2d);
- OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0));
- OUT_RING(RADEON_WAIT_2D_IDLECLEAN |
- RADEON_WAIT_HOST_IDLECLEAN);
- ADVANCE_RING();
- /* set flush & purge flags */
- dev_priv->track_flush |= RADEON_FLUSH_EMITED | RADEON_PURGE_EMITED;
-}
-
-/**
- * Called by r300_do_cp_cmdbuf to update the internal buffer age and state.
- * The actual age emit is done by r300_do_cp_cmdbuf, which is why you must
- * be careful about how this function is called.
- */
-static void r300_discard_buffer(struct drm_device * dev, struct drm_buf * buf)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
-
- buf_priv->age = ++dev_priv->sarea_priv->last_dispatch;
- buf->pending = 1;
- buf->used = 0;
-}
-
-static void r300_cmd_wait(drm_radeon_private_t * dev_priv,
- drm_r300_cmd_header_t header)
-{
- u32 wait_until;
- RING_LOCALS;
-
- if (!header.wait.flags)
- return;
-
- wait_until = 0;
-
- switch(header.wait.flags) {
- case R300_WAIT_2D:
- wait_until = RADEON_WAIT_2D_IDLE;
- break;
- case R300_WAIT_3D:
- wait_until = RADEON_WAIT_3D_IDLE;
- break;
- case R300_NEW_WAIT_2D_3D:
- wait_until = RADEON_WAIT_2D_IDLE|RADEON_WAIT_3D_IDLE;
- break;
- case R300_NEW_WAIT_2D_2D_CLEAN:
- wait_until = RADEON_WAIT_2D_IDLE|RADEON_WAIT_2D_IDLECLEAN;
- break;
- case R300_NEW_WAIT_3D_3D_CLEAN:
- wait_until = RADEON_WAIT_3D_IDLE|RADEON_WAIT_3D_IDLECLEAN;
- break;
- case R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN:
- wait_until = RADEON_WAIT_2D_IDLE|RADEON_WAIT_2D_IDLECLEAN;
- wait_until |= RADEON_WAIT_3D_IDLE|RADEON_WAIT_3D_IDLECLEAN;
- break;
- default:
- return;
- }
-
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0));
- OUT_RING(wait_until);
- ADVANCE_RING();
-}
-
-static int r300_scratch(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf,
- drm_r300_cmd_header_t header)
-{
- u32 *ref_age_base;
- u32 i, buf_idx, h_pending;
- RING_LOCALS;
-
- if (cmdbuf->bufsz < sizeof(uint64_t) + header.scratch.n_bufs * sizeof(buf_idx) ) {
- return -EINVAL;
- }
-
- if (header.scratch.reg >= 5) {
- return -EINVAL;
- }
-
- dev_priv->scratch_ages[header.scratch.reg] ++;
-
- ref_age_base = (u32 *)(unsigned long)*((uint64_t *)cmdbuf->buf);
-
- cmdbuf->buf += sizeof(uint64_t);
- cmdbuf->bufsz -= sizeof(uint64_t);
-
- for (i=0; i < header.scratch.n_bufs; i++) {
- buf_idx = *(u32 *)cmdbuf->buf;
- buf_idx *= 2; /* 8 bytes per buf */
-
- if (DRM_COPY_TO_USER(ref_age_base + buf_idx, &dev_priv->scratch_ages[header.scratch.reg], sizeof(u32))) {
- return -EINVAL;
- }
-
- if (DRM_COPY_FROM_USER(&h_pending, ref_age_base + buf_idx + 1, sizeof(u32))) {
- return -EINVAL;
- }
-
- if (h_pending == 0) {
- return -EINVAL;
- }
-
- h_pending--;
-
- if (DRM_COPY_TO_USER(ref_age_base + buf_idx + 1, &h_pending, sizeof(u32))) {
- return -EINVAL;
- }
-
- cmdbuf->buf += sizeof(buf_idx);
- cmdbuf->bufsz -= sizeof(buf_idx);
- }
-
- BEGIN_RING(2);
- OUT_RING( CP_PACKET0( RADEON_SCRATCH_REG0 + header.scratch.reg * 4, 0 ) );
- OUT_RING( dev_priv->scratch_ages[header.scratch.reg] );
- ADVANCE_RING();
-
- return 0;
-}
-
-/**
- * Uploads user-supplied vertex program instructions or parameters onto
- * the graphics card.
- * Called by r300_do_cp_cmdbuf.
- */
-static __inline__ int r300_emit_r500fp(drm_radeon_private_t *dev_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf,
- drm_r300_cmd_header_t header)
-{
- int sz;
- int addr;
- int type;
- int clamp;
- int stride;
- RING_LOCALS;
-
- sz = header.r500fp.count;
- /* address is 9 bits 0 - 8, bit 1 of flags is part of address */
- addr = ((header.r500fp.adrhi_flags & 1) << 8) | header.r500fp.adrlo;
-
- type = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_TYPE);
- clamp = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_CLAMP);
-
- addr |= (type << 16);
- addr |= (clamp << 17);
-
- stride = type ? 4 : 6;
-
- DRM_DEBUG("r500fp %d %d type: %d\n", sz, addr, type);
- if (!sz)
- return 0;
- if (sz * stride * 4 > cmdbuf->bufsz)
- return -EINVAL;
-
- BEGIN_RING(3 + sz * stride);
- OUT_RING_REG(R500_GA_US_VECTOR_INDEX, addr);
- OUT_RING(CP_PACKET0_TABLE(R500_GA_US_VECTOR_DATA, sz * stride - 1));
- OUT_RING_TABLE((int *)cmdbuf->buf, sz * stride);
-
- ADVANCE_RING();
-
- cmdbuf->buf += sz * stride * 4;
- cmdbuf->bufsz -= sz * stride * 4;
-
- return 0;
-}
-
-
-/**
- * Parses and validates a user-supplied command buffer and emits appropriate
- * commands on the DMA ring buffer.
- * Called by the ioctl handler function radeon_cp_cmdbuf.
- */
-int r300_do_cp_cmdbuf(struct drm_device *dev,
- struct drm_file *file_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf = NULL;
- int emit_dispatch_age = 0;
- int ret = 0;
-
- DRM_DEBUG("\n");
-
- /* pacify */
- r300_pacify(dev_priv);
-
- if (cmdbuf->nbox <= R300_SIMULTANEOUS_CLIPRECTS) {
- ret = r300_emit_cliprects(dev_priv, cmdbuf, 0);
- if (ret)
- goto cleanup;
- }
-
- while (cmdbuf->bufsz >= sizeof(drm_r300_cmd_header_t)) {
- int idx;
- drm_r300_cmd_header_t header;
-
- header.u = *(unsigned int *)cmdbuf->buf;
-
- cmdbuf->buf += sizeof(header);
- cmdbuf->bufsz -= sizeof(header);
-
- switch (header.header.cmd_type) {
- case R300_CMD_PACKET0:
- ret = r300_emit_packet0(dev_priv, cmdbuf, header);
- if (ret) {
- DRM_ERROR("r300_emit_packet0 failed\n");
- goto cleanup;
- }
- break;
-
- case R300_CMD_VPU:
- DRM_DEBUG("R300_CMD_VPU\n");
- ret = r300_emit_vpu(dev_priv, cmdbuf, header);
- if (ret) {
- DRM_ERROR("r300_emit_vpu failed\n");
- goto cleanup;
- }
- break;
-
- case R300_CMD_PACKET3:
- DRM_DEBUG("R300_CMD_PACKET3\n");
- ret = r300_emit_packet3(dev_priv, cmdbuf, header);
- if (ret) {
- DRM_ERROR("r300_emit_packet3 failed\n");
- goto cleanup;
- }
- break;
-
- case R300_CMD_END3D:
- DRM_DEBUG("R300_CMD_END3D\n");
- /* TODO:
- Ideally userspace driver should not need to issue this call,
- i.e. the drm driver should issue it automatically and prevent
- lockups.
-
- In practice, we do not understand why this call is needed and what
- it does (except for some vague guesses that it has to do with cache
- coherence) and so the user space driver does it.
-
- Once we are sure which uses prevent lockups the code could be moved
- into the kernel and the userspace driver will not
- need to use this command.
-
- Note that issuing this command does not hurt anything
- except, possibly, performance */
- r300_pacify(dev_priv);
- break;
-
- case R300_CMD_CP_DELAY:
- /* simple enough, we can do it here */
- DRM_DEBUG("R300_CMD_CP_DELAY\n");
- {
- int i;
- RING_LOCALS;
-
- BEGIN_RING(header.delay.count);
- for (i = 0; i < header.delay.count; i++)
- OUT_RING(RADEON_CP_PACKET2);
- ADVANCE_RING();
- }
- break;
-
- case R300_CMD_DMA_DISCARD:
- DRM_DEBUG("RADEON_CMD_DMA_DISCARD\n");
- idx = header.dma.buf_idx;
- if (idx < 0 || idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- idx, dma->buf_count - 1);
- ret = -EINVAL;
- goto cleanup;
- }
-
- buf = dma->buflist[idx];
- if (buf->file_priv != file_priv || buf->pending) {
- DRM_ERROR("bad buffer %p %p %d\n",
- buf->file_priv, file_priv,
- buf->pending);
- ret = -EINVAL;
- goto cleanup;
- }
-
- emit_dispatch_age = 1;
- r300_discard_buffer(dev, buf);
- break;
-
- case R300_CMD_WAIT:
- DRM_DEBUG("R300_CMD_WAIT\n");
- r300_cmd_wait(dev_priv, header);
- break;
-
- case R300_CMD_SCRATCH:
- DRM_DEBUG("R300_CMD_SCRATCH\n");
- ret = r300_scratch(dev_priv, cmdbuf, header);
- if (ret) {
- DRM_ERROR("r300_scratch failed\n");
- goto cleanup;
- }
- break;
-
- case R300_CMD_R500FP:
- if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV515) {
- DRM_ERROR("Calling r500 command on r300 card\n");
- ret = -EINVAL;
- goto cleanup;
- }
- DRM_DEBUG("R300_CMD_R500FP\n");
- ret = r300_emit_r500fp(dev_priv, cmdbuf, header);
- if (ret) {
- DRM_ERROR("r300_emit_r500fp failed\n");
- goto cleanup;
- }
- break;
- default:
- DRM_ERROR("bad cmd_type %i at %p\n",
- header.header.cmd_type,
- cmdbuf->buf - sizeof(header));
- ret = -EINVAL;
- goto cleanup;
- }
- }
-
- DRM_DEBUG("END\n");
-
- cleanup:
- r300_pacify(dev_priv);
-
- /* We emit the vertex buffer age here, outside the pacifier "brackets"
- * for two reasons:
- * (1) This may coalesce multiple age emissions into a single one and
- * (2) more importantly, some chips lock up hard when scratch registers
- * are written inside the pacifier bracket.
- */
- if (emit_dispatch_age) {
- RING_LOCALS;
-
- /* Emit the vertex buffer age */
- BEGIN_RING(2);
- RADEON_DISPATCH_AGE(dev_priv->sarea_priv->last_dispatch);
- ADVANCE_RING();
- }
-
- COMMIT_RING();
-
- return ret;
-}
+++ /dev/null
-/**************************************************************************
-
-Copyright (C) 2004-2005 Nicolai Haehnle et al.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/* *INDENT-OFF* */
-
-#ifndef _R300_REG_H
-#define _R300_REG_H
-
-#define R300_MC_INIT_MISC_LAT_TIMER 0x180
-# define R300_MC_MISC__MC_CPR_INIT_LAT_SHIFT 0
-# define R300_MC_MISC__MC_VF_INIT_LAT_SHIFT 4
-# define R300_MC_MISC__MC_DISP0R_INIT_LAT_SHIFT 8
-# define R300_MC_MISC__MC_DISP1R_INIT_LAT_SHIFT 12
-# define R300_MC_MISC__MC_FIXED_INIT_LAT_SHIFT 16
-# define R300_MC_MISC__MC_E2R_INIT_LAT_SHIFT 20
-# define R300_MC_MISC__MC_SAME_PAGE_PRIO_SHIFT 24
-# define R300_MC_MISC__MC_GLOBW_INIT_LAT_SHIFT 28
-
-
-#define R300_MC_INIT_GFX_LAT_TIMER 0x154
-# define R300_MC_MISC__MC_G3D0R_INIT_LAT_SHIFT 0
-# define R300_MC_MISC__MC_G3D1R_INIT_LAT_SHIFT 4
-# define R300_MC_MISC__MC_G3D2R_INIT_LAT_SHIFT 8
-# define R300_MC_MISC__MC_G3D3R_INIT_LAT_SHIFT 12
-# define R300_MC_MISC__MC_TX0R_INIT_LAT_SHIFT 16
-# define R300_MC_MISC__MC_TX1R_INIT_LAT_SHIFT 20
-# define R300_MC_MISC__MC_GLOBR_INIT_LAT_SHIFT 24
-# define R300_MC_MISC__MC_GLOBW_FULL_LAT_SHIFT 28
-
-/*
- * This file contains registers and constants for the R300. They have been
- * found mostly by examining command buffers captured using glxtest, as well
- * as by extrapolating some known registers and constants from the R200.
- * I am fairly certain that they are correct unless stated otherwise
- * in comments.
- */
-
-#define R300_SE_VPORT_XSCALE 0x1D98
-#define R300_SE_VPORT_XOFFSET 0x1D9C
-#define R300_SE_VPORT_YSCALE 0x1DA0
-#define R300_SE_VPORT_YOFFSET 0x1DA4
-#define R300_SE_VPORT_ZSCALE 0x1DA8
-#define R300_SE_VPORT_ZOFFSET 0x1DAC
-
-
-/*
- * Vertex Array Processing (VAP) Control
- * Stolen from r200 code from Christoph Brill (It's a guess!)
- */
-#define R300_VAP_CNTL 0x2080
-
-/* This register is written directly and also starts data section
- * in many 3d CP_PACKET3's
- */
-#define R300_VAP_VF_CNTL 0x2084
-# define R300_VAP_VF_CNTL__PRIM_TYPE__SHIFT 0
-# define R300_VAP_VF_CNTL__PRIM_NONE (0<<0)
-# define R300_VAP_VF_CNTL__PRIM_POINTS (1<<0)
-# define R300_VAP_VF_CNTL__PRIM_LINES (2<<0)
-# define R300_VAP_VF_CNTL__PRIM_LINE_STRIP (3<<0)
-# define R300_VAP_VF_CNTL__PRIM_TRIANGLES (4<<0)
-# define R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN (5<<0)
-# define R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP (6<<0)
-# define R300_VAP_VF_CNTL__PRIM_LINE_LOOP (12<<0)
-# define R300_VAP_VF_CNTL__PRIM_QUADS (13<<0)
-# define R300_VAP_VF_CNTL__PRIM_QUAD_STRIP (14<<0)
-# define R300_VAP_VF_CNTL__PRIM_POLYGON (15<<0)
-
-# define R300_VAP_VF_CNTL__PRIM_WALK__SHIFT 4
- /* State based - direct writes to registers trigger vertex
- generation */
-# define R300_VAP_VF_CNTL__PRIM_WALK_STATE_BASED (0<<4)
-# define R300_VAP_VF_CNTL__PRIM_WALK_INDICES (1<<4)
-# define R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST (2<<4)
-# define R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED (3<<4)
-
- /* I don't think I saw these three used.. */
-# define R300_VAP_VF_CNTL__COLOR_ORDER__SHIFT 6
-# define R300_VAP_VF_CNTL__TCL_OUTPUT_CTL_ENA__SHIFT 9
-# define R300_VAP_VF_CNTL__PROG_STREAM_ENA__SHIFT 10
-
- /* index size - when not set the indices are assumed to be 16 bit */
-# define R300_VAP_VF_CNTL__INDEX_SIZE_32bit (1<<11)
- /* number of vertices */
-# define R300_VAP_VF_CNTL__NUM_VERTICES__SHIFT 16
-
-/* BEGIN: Wild guesses */
-#define R300_VAP_OUTPUT_VTX_FMT_0 0x2090
-# define R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT (1<<0)
-# define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT (1<<1)
-# define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT (1<<2) /* GUESS */
-# define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT (1<<3) /* GUESS */
-# define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT (1<<4) /* GUESS */
-# define R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT (1<<16) /* GUESS */
-
-#define R300_VAP_OUTPUT_VTX_FMT_1 0x2094
- /* each of the following is 3 bits wide, specifies number
- of components */
-# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0
-# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3
-# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6
-# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT 9
-# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT 12
-# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15
-# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18
-# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21
-/* END: Wild guesses */
-
-#define R300_SE_VTE_CNTL 0x20b0
-# define R300_VPORT_X_SCALE_ENA 0x00000001
-# define R300_VPORT_X_OFFSET_ENA 0x00000002
-# define R300_VPORT_Y_SCALE_ENA 0x00000004
-# define R300_VPORT_Y_OFFSET_ENA 0x00000008
-# define R300_VPORT_Z_SCALE_ENA 0x00000010
-# define R300_VPORT_Z_OFFSET_ENA 0x00000020
-# define R300_VTX_XY_FMT 0x00000100
-# define R300_VTX_Z_FMT 0x00000200
-# define R300_VTX_W0_FMT 0x00000400
-# define R300_VTX_W0_NORMALIZE 0x00000800
-# define R300_VTX_ST_DENORMALIZED 0x00001000
-
-/* BEGIN: Vertex data assembly - lots of uncertainties */
-
-/* gap */
-
-#define R300_VAP_CNTL_STATUS 0x2140
-# define R300_VC_NO_SWAP (0 << 0)
-# define R300_VC_16BIT_SWAP (1 << 0)
-# define R300_VC_32BIT_SWAP (2 << 0)
-# define R300_VAP_TCL_BYPASS (1 << 8)
-
-/* gap */
-
-/* Where do we get our vertex data?
- *
- * Vertex data either comes either from immediate mode registers or from
- * vertex arrays.
- * There appears to be no mixed mode (though we can force the pitch of
- * vertex arrays to 0, effectively reusing the same element over and over
- * again).
- *
- * Immediate mode is controlled by the INPUT_CNTL registers. I am not sure
- * if these registers influence vertex array processing.
- *
- * Vertex arrays are controlled via the 3D_LOAD_VBPNTR packet3.
- *
- * In both cases, vertex attributes are then passed through INPUT_ROUTE.
- *
- * Beginning with INPUT_ROUTE_0_0 is a list of WORDs that route vertex data
- * into the vertex processor's input registers.
- * The first word routes the first input, the second word the second, etc.
- * The corresponding input is routed into the register with the given index.
- * The list is ended by a word with INPUT_ROUTE_END set.
- *
- * Always set COMPONENTS_4 in immediate mode.
- */
-
-#define R300_VAP_INPUT_ROUTE_0_0 0x2150
-# define R300_INPUT_ROUTE_COMPONENTS_1 (0 << 0)
-# define R300_INPUT_ROUTE_COMPONENTS_2 (1 << 0)
-# define R300_INPUT_ROUTE_COMPONENTS_3 (2 << 0)
-# define R300_INPUT_ROUTE_COMPONENTS_4 (3 << 0)
-# define R300_INPUT_ROUTE_COMPONENTS_RGBA (4 << 0) /* GUESS */
-# define R300_VAP_INPUT_ROUTE_IDX_SHIFT 8
-# define R300_VAP_INPUT_ROUTE_IDX_MASK (31 << 8) /* GUESS */
-# define R300_VAP_INPUT_ROUTE_END (1 << 13)
-# define R300_INPUT_ROUTE_IMMEDIATE_MODE (0 << 14) /* GUESS */
-# define R300_INPUT_ROUTE_FLOAT (1 << 14) /* GUESS */
-# define R300_INPUT_ROUTE_UNSIGNED_BYTE (2 << 14) /* GUESS */
-# define R300_INPUT_ROUTE_FLOAT_COLOR (3 << 14) /* GUESS */
-#define R300_VAP_INPUT_ROUTE_0_1 0x2154
-#define R300_VAP_INPUT_ROUTE_0_2 0x2158
-#define R300_VAP_INPUT_ROUTE_0_3 0x215C
-#define R300_VAP_INPUT_ROUTE_0_4 0x2160
-#define R300_VAP_INPUT_ROUTE_0_5 0x2164
-#define R300_VAP_INPUT_ROUTE_0_6 0x2168
-#define R300_VAP_INPUT_ROUTE_0_7 0x216C
-
-/* gap */
-
-/* Notes:
- * - always set up to produce at least two attributes:
- * if vertex program uses only position, fglrx will set normal, too
- * - INPUT_CNTL_0_COLOR and INPUT_CNTL_COLOR bits are always equal.
- */
-#define R300_VAP_INPUT_CNTL_0 0x2180
-# define R300_INPUT_CNTL_0_COLOR 0x00000001
-#define R300_VAP_INPUT_CNTL_1 0x2184
-# define R300_INPUT_CNTL_POS 0x00000001
-# define R300_INPUT_CNTL_NORMAL 0x00000002
-# define R300_INPUT_CNTL_COLOR 0x00000004
-# define R300_INPUT_CNTL_TC0 0x00000400
-# define R300_INPUT_CNTL_TC1 0x00000800
-# define R300_INPUT_CNTL_TC2 0x00001000 /* GUESS */
-# define R300_INPUT_CNTL_TC3 0x00002000 /* GUESS */
-# define R300_INPUT_CNTL_TC4 0x00004000 /* GUESS */
-# define R300_INPUT_CNTL_TC5 0x00008000 /* GUESS */
-# define R300_INPUT_CNTL_TC6 0x00010000 /* GUESS */
-# define R300_INPUT_CNTL_TC7 0x00020000 /* GUESS */
-
-/* gap */
-
-/* Words parallel to INPUT_ROUTE_0; All words that are active in INPUT_ROUTE_0
- * are set to a swizzling bit pattern, other words are 0.
- *
- * In immediate mode, the pattern is always set to xyzw. In vertex array
- * mode, the swizzling pattern is e.g. used to set zw components in texture
- * coordinates with only tweo components.
- */
-#define R300_VAP_INPUT_ROUTE_1_0 0x21E0
-# define R300_INPUT_ROUTE_SELECT_X 0
-# define R300_INPUT_ROUTE_SELECT_Y 1
-# define R300_INPUT_ROUTE_SELECT_Z 2
-# define R300_INPUT_ROUTE_SELECT_W 3
-# define R300_INPUT_ROUTE_SELECT_ZERO 4
-# define R300_INPUT_ROUTE_SELECT_ONE 5
-# define R300_INPUT_ROUTE_SELECT_MASK 7
-# define R300_INPUT_ROUTE_X_SHIFT 0
-# define R300_INPUT_ROUTE_Y_SHIFT 3
-# define R300_INPUT_ROUTE_Z_SHIFT 6
-# define R300_INPUT_ROUTE_W_SHIFT 9
-# define R300_INPUT_ROUTE_ENABLE (15 << 12)
-#define R300_VAP_INPUT_ROUTE_1_1 0x21E4
-#define R300_VAP_INPUT_ROUTE_1_2 0x21E8
-#define R300_VAP_INPUT_ROUTE_1_3 0x21EC
-#define R300_VAP_INPUT_ROUTE_1_4 0x21F0
-#define R300_VAP_INPUT_ROUTE_1_5 0x21F4
-#define R300_VAP_INPUT_ROUTE_1_6 0x21F8
-#define R300_VAP_INPUT_ROUTE_1_7 0x21FC
-
-/* END: Vertex data assembly */
-
-/* gap */
-
-/* BEGIN: Upload vertex program and data */
-
-/*
- * The programmable vertex shader unit has a memory bank of unknown size
- * that can be written to in 16 byte units by writing the address into
- * UPLOAD_ADDRESS, followed by data in UPLOAD_DATA (multiples of 4 DWORDs).
- *
- * Pointers into the memory bank are always in multiples of 16 bytes.
- *
- * The memory bank is divided into areas with fixed meaning.
- *
- * Starting at address UPLOAD_PROGRAM: Vertex program instructions.
- * Native limits reported by drivers from ATI suggest size 256 (i.e. 4KB),
- * whereas the difference between known addresses suggests size 512.
- *
- * Starting at address UPLOAD_PARAMETERS: Vertex program parameters.
- * Native reported limits and the VPI layout suggest size 256, whereas
- * difference between known addresses suggests size 512.
- *
- * At address UPLOAD_POINTSIZE is a vector (0, 0, ps, 0), where ps is the
- * floating point pointsize. The exact purpose of this state is uncertain,
- * as there is also the R300_RE_POINTSIZE register.
- *
- * Multiple vertex programs and parameter sets can be loaded at once,
- * which could explain the size discrepancy.
- */
-#define R300_VAP_PVS_UPLOAD_ADDRESS 0x2200
-# define R300_PVS_UPLOAD_PROGRAM 0x00000000
-# define R300_PVS_UPLOAD_PARAMETERS 0x00000200
-# define R300_PVS_UPLOAD_POINTSIZE 0x00000406
-
-/* gap */
-
-#define R300_VAP_PVS_UPLOAD_DATA 0x2208
-
-/* END: Upload vertex program and data */
-
-/* gap */
-
-/* I do not know the purpose of this register. However, I do know that
- * it is set to 221C_CLEAR for clear operations and to 221C_NORMAL
- * for normal rendering.
- */
-#define R300_VAP_UNKNOWN_221C 0x221C
-# define R300_221C_NORMAL 0x00000000
-# define R300_221C_CLEAR 0x0001C000
-
-/* These seem to be per-pixel and per-vertex X and Y clipping planes. The first
- * plane is per-pixel and the second plane is per-vertex.
- *
- * This was determined by experimentation alone but I believe it is correct.
- *
- * These registers are called X_QUAD0_1_FL to X_QUAD0_4_FL by glxtest.
- */
-#define R300_VAP_CLIP_X_0 0x2220
-#define R300_VAP_CLIP_X_1 0x2224
-#define R300_VAP_CLIP_Y_0 0x2228
-#define R300_VAP_CLIP_Y_1 0x2230
-
-/* gap */
-
-/* Sometimes, END_OF_PKT and 0x2284=0 are the only commands sent between
- * rendering commands and overwriting vertex program parameters.
- * Therefore, I suspect writing zero to 0x2284 synchronizes the engine and
- * avoids bugs caused by still running shaders reading bad data from memory.
- */
-#define R300_VAP_PVS_STATE_FLUSH_REG 0x2284
-
-/* Absolutely no clue what this register is about. */
-#define R300_VAP_UNKNOWN_2288 0x2288
-# define R300_2288_R300 0x00750000 /* -- nh */
-# define R300_2288_RV350 0x0000FFFF /* -- Vladimir */
-
-/* gap */
-
-/* Addresses are relative to the vertex program instruction area of the
- * memory bank. PROGRAM_END points to the last instruction of the active
- * program
- *
- * The meaning of the two UNKNOWN fields is obviously not known. However,
- * experiments so far have shown that both *must* point to an instruction
- * inside the vertex program, otherwise the GPU locks up.
- *
- * fglrx usually sets CNTL_3_UNKNOWN to the end of the program and
- * R300_PVS_CNTL_1_POS_END_SHIFT points to instruction where last write to
- * position takes place.
- *
- * Most likely this is used to ignore rest of the program in cases
- * where group of verts arent visible. For some reason this "section"
- * is sometimes accepted other instruction that have no relationship with
- * position calculations.
- */
-#define R300_VAP_PVS_CNTL_1 0x22D0
-# define R300_PVS_CNTL_1_PROGRAM_START_SHIFT 0
-# define R300_PVS_CNTL_1_POS_END_SHIFT 10
-# define R300_PVS_CNTL_1_PROGRAM_END_SHIFT 20
-/* Addresses are relative the the vertex program parameters area. */
-#define R300_VAP_PVS_CNTL_2 0x22D4
-# define R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
-# define R300_PVS_CNTL_2_PARAM_COUNT_SHIFT 16
-#define R300_VAP_PVS_CNTL_3 0x22D8
-# define R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT 10
-# define R300_PVS_CNTL_3_PROGRAM_UNKNOWN2_SHIFT 0
-
-/* The entire range from 0x2300 to 0x2AC inclusive seems to be used for
- * immediate vertices
- */
-#define R300_VAP_VTX_COLOR_R 0x2464
-#define R300_VAP_VTX_COLOR_G 0x2468
-#define R300_VAP_VTX_COLOR_B 0x246C
-#define R300_VAP_VTX_POS_0_X_1 0x2490 /* used for glVertex2*() */
-#define R300_VAP_VTX_POS_0_Y_1 0x2494
-#define R300_VAP_VTX_COLOR_PKD 0x249C /* RGBA */
-#define R300_VAP_VTX_POS_0_X_2 0x24A0 /* used for glVertex3*() */
-#define R300_VAP_VTX_POS_0_Y_2 0x24A4
-#define R300_VAP_VTX_POS_0_Z_2 0x24A8
-/* write 0 to indicate end of packet? */
-#define R300_VAP_VTX_END_OF_PKT 0x24AC
-
-/* gap */
-
-/* These are values from r300_reg/r300_reg.h - they are known to be correct
- * and are here so we can use one register file instead of several
- * - Vladimir
- */
-#define R300_GB_VAP_RASTER_VTX_FMT_0 0x4000
-# define R300_GB_VAP_RASTER_VTX_FMT_0__POS_PRESENT (1<<0)
-# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_0_PRESENT (1<<1)
-# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_1_PRESENT (1<<2)
-# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_2_PRESENT (1<<3)
-# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_3_PRESENT (1<<4)
-# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_SPACE (0xf<<5)
-# define R300_GB_VAP_RASTER_VTX_FMT_0__PT_SIZE_PRESENT (0x1<<16)
-
-#define R300_GB_VAP_RASTER_VTX_FMT_1 0x4004
- /* each of the following is 3 bits wide, specifies number
- of components */
-# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0
-# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3
-# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6
-# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT 9
-# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT 12
-# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15
-# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18
-# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21
-
-/* UNK30 seems to enables point to quad transformation on textures
- * (or something closely related to that).
- * This bit is rather fatal at the time being due to lackings at pixel
- * shader side
- */
-#define R300_GB_ENABLE 0x4008
-# define R300_GB_POINT_STUFF_ENABLE (1<<0)
-# define R300_GB_LINE_STUFF_ENABLE (1<<1)
-# define R300_GB_TRIANGLE_STUFF_ENABLE (1<<2)
-# define R300_GB_STENCIL_AUTO_ENABLE (1<<4)
-# define R300_GB_UNK31 (1<<31)
- /* each of the following is 2 bits wide */
-#define R300_GB_TEX_REPLICATE 0
-#define R300_GB_TEX_ST 1
-#define R300_GB_TEX_STR 2
-# define R300_GB_TEX0_SOURCE_SHIFT 16
-# define R300_GB_TEX1_SOURCE_SHIFT 18
-# define R300_GB_TEX2_SOURCE_SHIFT 20
-# define R300_GB_TEX3_SOURCE_SHIFT 22
-# define R300_GB_TEX4_SOURCE_SHIFT 24
-# define R300_GB_TEX5_SOURCE_SHIFT 26
-# define R300_GB_TEX6_SOURCE_SHIFT 28
-# define R300_GB_TEX7_SOURCE_SHIFT 30
-
-/* MSPOS - positions for multisample antialiasing (?) */
-#define R300_GB_MSPOS0 0x4010
- /* shifts - each of the fields is 4 bits */
-# define R300_GB_MSPOS0__MS_X0_SHIFT 0
-# define R300_GB_MSPOS0__MS_Y0_SHIFT 4
-# define R300_GB_MSPOS0__MS_X1_SHIFT 8
-# define R300_GB_MSPOS0__MS_Y1_SHIFT 12
-# define R300_GB_MSPOS0__MS_X2_SHIFT 16
-# define R300_GB_MSPOS0__MS_Y2_SHIFT 20
-# define R300_GB_MSPOS0__MSBD0_Y 24
-# define R300_GB_MSPOS0__MSBD0_X 28
-
-#define R300_GB_MSPOS1 0x4014
-# define R300_GB_MSPOS1__MS_X3_SHIFT 0
-# define R300_GB_MSPOS1__MS_Y3_SHIFT 4
-# define R300_GB_MSPOS1__MS_X4_SHIFT 8
-# define R300_GB_MSPOS1__MS_Y4_SHIFT 12
-# define R300_GB_MSPOS1__MS_X5_SHIFT 16
-# define R300_GB_MSPOS1__MS_Y5_SHIFT 20
-# define R300_GB_MSPOS1__MSBD1 24
-
-
-#define R300_GB_TILE_CONFIG 0x4018
-# define R300_GB_TILE_ENABLE (1<<0)
-# define R300_GB_TILE_PIPE_COUNT_RV300 0
-# define R300_GB_TILE_PIPE_COUNT_R300 (3<<1)
-# define R300_GB_TILE_PIPE_COUNT_R420 (7<<1)
-# define R300_GB_TILE_PIPE_COUNT_RV410 (3<<1)
-# define R300_GB_TILE_SIZE_8 0
-# define R300_GB_TILE_SIZE_16 (1<<4)
-# define R300_GB_TILE_SIZE_32 (2<<4)
-# define R300_GB_SUPER_SIZE_1 (0<<6)
-# define R300_GB_SUPER_SIZE_2 (1<<6)
-# define R300_GB_SUPER_SIZE_4 (2<<6)
-# define R300_GB_SUPER_SIZE_8 (3<<6)
-# define R300_GB_SUPER_SIZE_16 (4<<6)
-# define R300_GB_SUPER_SIZE_32 (5<<6)
-# define R300_GB_SUPER_SIZE_64 (6<<6)
-# define R300_GB_SUPER_SIZE_128 (7<<6)
-# define R300_GB_SUPER_X_SHIFT 9 /* 3 bits wide */
-# define R300_GB_SUPER_Y_SHIFT 12 /* 3 bits wide */
-# define R300_GB_SUPER_TILE_A 0
-# define R300_GB_SUPER_TILE_B (1<<15)
-# define R300_GB_SUBPIXEL_1_12 0
-# define R300_GB_SUBPIXEL_1_16 (1<<16)
-
-#define R300_GB_FIFO_SIZE 0x4024
- /* each of the following is 2 bits wide */
-#define R300_GB_FIFO_SIZE_32 0
-#define R300_GB_FIFO_SIZE_64 1
-#define R300_GB_FIFO_SIZE_128 2
-#define R300_GB_FIFO_SIZE_256 3
-# define R300_SC_IFIFO_SIZE_SHIFT 0
-# define R300_SC_TZFIFO_SIZE_SHIFT 2
-# define R300_SC_BFIFO_SIZE_SHIFT 4
-
-# define R300_US_OFIFO_SIZE_SHIFT 12
-# define R300_US_WFIFO_SIZE_SHIFT 14
- /* the following use the same constants as above, but meaning is
- is times 2 (i.e. instead of 32 words it means 64 */
-# define R300_RS_TFIFO_SIZE_SHIFT 6
-# define R300_RS_CFIFO_SIZE_SHIFT 8
-# define R300_US_RAM_SIZE_SHIFT 10
- /* watermarks, 3 bits wide */
-# define R300_RS_HIGHWATER_COL_SHIFT 16
-# define R300_RS_HIGHWATER_TEX_SHIFT 19
-# define R300_OFIFO_HIGHWATER_SHIFT 22 /* two bits only */
-# define R300_CUBE_FIFO_HIGHWATER_COL_SHIFT 24
-
-#define R300_GB_SELECT 0x401C
-# define R300_GB_FOG_SELECT_C0A 0
-# define R300_GB_FOG_SELECT_C1A 1
-# define R300_GB_FOG_SELECT_C2A 2
-# define R300_GB_FOG_SELECT_C3A 3
-# define R300_GB_FOG_SELECT_1_1_W 4
-# define R300_GB_FOG_SELECT_Z 5
-# define R300_GB_DEPTH_SELECT_Z 0
-# define R300_GB_DEPTH_SELECT_1_1_W (1<<3)
-# define R300_GB_W_SELECT_1_W 0
-# define R300_GB_W_SELECT_1 (1<<4)
-
-#define R300_GB_AA_CONFIG 0x4020
-# define R300_AA_DISABLE 0x00
-# define R300_AA_ENABLE 0x01
-# define R300_AA_SUBSAMPLES_2 0
-# define R300_AA_SUBSAMPLES_3 (1<<1)
-# define R300_AA_SUBSAMPLES_4 (2<<1)
-# define R300_AA_SUBSAMPLES_6 (3<<1)
-
-/* gap */
-
-/* Zero to flush caches. */
-#define R300_TX_INVALTAGS 0x4100
-#define R300_TX_FLUSH 0x0
-
-/* The upper enable bits are guessed, based on fglrx reported limits. */
-#define R300_TX_ENABLE 0x4104
-# define R300_TX_ENABLE_0 (1 << 0)
-# define R300_TX_ENABLE_1 (1 << 1)
-# define R300_TX_ENABLE_2 (1 << 2)
-# define R300_TX_ENABLE_3 (1 << 3)
-# define R300_TX_ENABLE_4 (1 << 4)
-# define R300_TX_ENABLE_5 (1 << 5)
-# define R300_TX_ENABLE_6 (1 << 6)
-# define R300_TX_ENABLE_7 (1 << 7)
-# define R300_TX_ENABLE_8 (1 << 8)
-# define R300_TX_ENABLE_9 (1 << 9)
-# define R300_TX_ENABLE_10 (1 << 10)
-# define R300_TX_ENABLE_11 (1 << 11)
-# define R300_TX_ENABLE_12 (1 << 12)
-# define R300_TX_ENABLE_13 (1 << 13)
-# define R300_TX_ENABLE_14 (1 << 14)
-# define R300_TX_ENABLE_15 (1 << 15)
-
-/* The pointsize is given in multiples of 6. The pointsize can be
- * enormous: Clear() renders a single point that fills the entire
- * framebuffer.
- */
-#define R300_RE_POINTSIZE 0x421C
-# define R300_POINTSIZE_Y_SHIFT 0
-# define R300_POINTSIZE_Y_MASK (0xFFFF << 0) /* GUESS */
-# define R300_POINTSIZE_X_SHIFT 16
-# define R300_POINTSIZE_X_MASK (0xFFFF << 16) /* GUESS */
-# define R300_POINTSIZE_MAX (R300_POINTSIZE_Y_MASK / 6)
-
-/* The line width is given in multiples of 6.
- * In default mode lines are classified as vertical lines.
- * HO: horizontal
- * VE: vertical or horizontal
- * HO & VE: no classification
- */
-#define R300_RE_LINE_CNT 0x4234
-# define R300_LINESIZE_SHIFT 0
-# define R300_LINESIZE_MASK (0xFFFF << 0) /* GUESS */
-# define R300_LINESIZE_MAX (R300_LINESIZE_MASK / 6)
-# define R300_LINE_CNT_HO (1 << 16)
-# define R300_LINE_CNT_VE (1 << 17)
-
-/* Some sort of scale or clamp value for texcoordless textures. */
-#define R300_RE_UNK4238 0x4238
-
-/* Something shade related */
-#define R300_RE_SHADE 0x4274
-
-#define R300_RE_SHADE_MODEL 0x4278
-# define R300_RE_SHADE_MODEL_SMOOTH 0x3aaaa
-# define R300_RE_SHADE_MODEL_FLAT 0x39595
-
-/* Dangerous */
-#define R300_RE_POLYGON_MODE 0x4288
-# define R300_PM_ENABLED (1 << 0)
-# define R300_PM_FRONT_POINT (0 << 0)
-# define R300_PM_BACK_POINT (0 << 0)
-# define R300_PM_FRONT_LINE (1 << 4)
-# define R300_PM_FRONT_FILL (1 << 5)
-# define R300_PM_BACK_LINE (1 << 7)
-# define R300_PM_BACK_FILL (1 << 8)
-
-/* Fog parameters */
-#define R300_RE_FOG_SCALE 0x4294
-#define R300_RE_FOG_START 0x4298
-
-/* Not sure why there are duplicate of factor and constant values.
- * My best guess so far is that there are seperate zbiases for test and write.
- * Ordering might be wrong.
- * Some of the tests indicate that fgl has a fallback implementation of zbias
- * via pixel shaders.
- */
-#define R300_RE_ZBIAS_CNTL 0x42A0 /* GUESS */
-#define R300_RE_ZBIAS_T_FACTOR 0x42A4
-#define R300_RE_ZBIAS_T_CONSTANT 0x42A8
-#define R300_RE_ZBIAS_W_FACTOR 0x42AC
-#define R300_RE_ZBIAS_W_CONSTANT 0x42B0
-
-/* This register needs to be set to (1<<1) for RV350 to correctly
- * perform depth test (see --vb-triangles in r300_demo)
- * Don't know about other chips. - Vladimir
- * This is set to 3 when GL_POLYGON_OFFSET_FILL is on.
- * My guess is that there are two bits for each zbias primitive
- * (FILL, LINE, POINT).
- * One to enable depth test and one for depth write.
- * Yet this doesnt explain why depth writes work ...
- */
-#define R300_RE_OCCLUSION_CNTL 0x42B4
-# define R300_OCCLUSION_ON (1<<1)
-
-#define R300_RE_CULL_CNTL 0x42B8
-# define R300_CULL_FRONT (1 << 0)
-# define R300_CULL_BACK (1 << 1)
-# define R300_FRONT_FACE_CCW (0 << 2)
-# define R300_FRONT_FACE_CW (1 << 2)
-
-
-/* BEGIN: Rasterization / Interpolators - many guesses */
-
-/* 0_UNKNOWN_18 has always been set except for clear operations.
- * TC_CNT is the number of incoming texture coordinate sets (i.e. it depends
- * on the vertex program, *not* the fragment program)
- */
-#define R300_RS_CNTL_0 0x4300
-# define R300_RS_CNTL_TC_CNT_SHIFT 2
-# define R300_RS_CNTL_TC_CNT_MASK (7 << 2)
- /* number of color interpolators used */
-# define R300_RS_CNTL_CI_CNT_SHIFT 7
-# define R300_RS_CNTL_0_UNKNOWN_18 (1 << 18)
- /* Guess: RS_CNTL_1 holds the index of the highest used RS_ROUTE_n
- register. */
-#define R300_RS_CNTL_1 0x4304
-
-/* gap */
-
-/* Only used for texture coordinates.
- * Use the source field to route texture coordinate input from the
- * vertex program to the desired interpolator. Note that the source
- * field is relative to the outputs the vertex program *actually*
- * writes. If a vertex program only writes texcoord[1], this will
- * be source index 0.
- * Set INTERP_USED on all interpolators that produce data used by
- * the fragment program. INTERP_USED looks like a swizzling mask,
- * but I haven't seen it used that way.
- *
- * Note: The _UNKNOWN constants are always set in their respective
- * register. I don't know if this is necessary.
- */
-#define R300_RS_INTERP_0 0x4310
-#define R300_RS_INTERP_1 0x4314
-# define R300_RS_INTERP_1_UNKNOWN 0x40
-#define R300_RS_INTERP_2 0x4318
-# define R300_RS_INTERP_2_UNKNOWN 0x80
-#define R300_RS_INTERP_3 0x431C
-# define R300_RS_INTERP_3_UNKNOWN 0xC0
-#define R300_RS_INTERP_4 0x4320
-#define R300_RS_INTERP_5 0x4324
-#define R300_RS_INTERP_6 0x4328
-#define R300_RS_INTERP_7 0x432C
-# define R300_RS_INTERP_SRC_SHIFT 2
-# define R300_RS_INTERP_SRC_MASK (7 << 2)
-# define R300_RS_INTERP_USED 0x00D10000
-
-/* These DWORDs control how vertex data is routed into fragment program
- * registers, after interpolators.
- */
-#define R300_RS_ROUTE_0 0x4330
-#define R300_RS_ROUTE_1 0x4334
-#define R300_RS_ROUTE_2 0x4338
-#define R300_RS_ROUTE_3 0x433C /* GUESS */
-#define R300_RS_ROUTE_4 0x4340 /* GUESS */
-#define R300_RS_ROUTE_5 0x4344 /* GUESS */
-#define R300_RS_ROUTE_6 0x4348 /* GUESS */
-#define R300_RS_ROUTE_7 0x434C /* GUESS */
-# define R300_RS_ROUTE_SOURCE_INTERP_0 0
-# define R300_RS_ROUTE_SOURCE_INTERP_1 1
-# define R300_RS_ROUTE_SOURCE_INTERP_2 2
-# define R300_RS_ROUTE_SOURCE_INTERP_3 3
-# define R300_RS_ROUTE_SOURCE_INTERP_4 4
-# define R300_RS_ROUTE_SOURCE_INTERP_5 5 /* GUESS */
-# define R300_RS_ROUTE_SOURCE_INTERP_6 6 /* GUESS */
-# define R300_RS_ROUTE_SOURCE_INTERP_7 7 /* GUESS */
-# define R300_RS_ROUTE_ENABLE (1 << 3) /* GUESS */
-# define R300_RS_ROUTE_DEST_SHIFT 6
-# define R300_RS_ROUTE_DEST_MASK (31 << 6) /* GUESS */
-
-/* Special handling for color: When the fragment program uses color,
- * the ROUTE_0_COLOR bit is set and ROUTE_0_COLOR_DEST contains the
- * color register index.
- *
- * Apperently you may set the R300_RS_ROUTE_0_COLOR bit, but not provide any
- * R300_RS_ROUTE_0_COLOR_DEST value; this setup is used for clearing the state.
- * See r300_ioctl.c:r300EmitClearState. I'm not sure if this setup is strictly
- * correct or not. - Oliver.
- */
-# define R300_RS_ROUTE_0_COLOR (1 << 14)
-# define R300_RS_ROUTE_0_COLOR_DEST_SHIFT 17
-# define R300_RS_ROUTE_0_COLOR_DEST_MASK (31 << 17) /* GUESS */
-/* As above, but for secondary color */
-# define R300_RS_ROUTE_1_COLOR1 (1 << 14)
-# define R300_RS_ROUTE_1_COLOR1_DEST_SHIFT 17
-# define R300_RS_ROUTE_1_COLOR1_DEST_MASK (31 << 17)
-# define R300_RS_ROUTE_1_UNKNOWN11 (1 << 11)
-/* END: Rasterization / Interpolators - many guesses */
-
-/* Hierarchical Z Enable */
-#define R300_SC_HYPERZ 0x43a4
-# define R300_SC_HYPERZ_DISABLE (0 << 0)
-# define R300_SC_HYPERZ_ENABLE (1 << 0)
-# define R300_SC_HYPERZ_MIN (0 << 1)
-# define R300_SC_HYPERZ_MAX (1 << 1)
-# define R300_SC_HYPERZ_ADJ_256 (0 << 2)
-# define R300_SC_HYPERZ_ADJ_128 (1 << 2)
-# define R300_SC_HYPERZ_ADJ_64 (2 << 2)
-# define R300_SC_HYPERZ_ADJ_32 (3 << 2)
-# define R300_SC_HYPERZ_ADJ_16 (4 << 2)
-# define R300_SC_HYPERZ_ADJ_8 (5 << 2)
-# define R300_SC_HYPERZ_ADJ_4 (6 << 2)
-# define R300_SC_HYPERZ_ADJ_2 (7 << 2)
-# define R300_SC_HYPERZ_HZ_Z0MIN_NO (0 << 5)
-# define R300_SC_HYPERZ_HZ_Z0MIN (1 << 5)
-# define R300_SC_HYPERZ_HZ_Z0MAX_NO (0 << 6)
-# define R300_SC_HYPERZ_HZ_Z0MAX (1 << 6)
-
-#define R300_SC_EDGERULE 0x43a8
-
-/* BEGIN: Scissors and cliprects */
-
-/* There are four clipping rectangles. Their corner coordinates are inclusive.
- * Every pixel is assigned a number from 0 and 15 by setting bits 0-3 depending
- * on whether the pixel is inside cliprects 0-3, respectively. For example,
- * if a pixel is inside cliprects 0 and 1, but outside 2 and 3, it is assigned
- * the number 3 (binary 0011).
- * Iff the bit corresponding to the pixel's number in RE_CLIPRECT_CNTL is set,
- * the pixel is rasterized.
- *
- * In addition to this, there is a scissors rectangle. Only pixels inside the
- * scissors rectangle are drawn. (coordinates are inclusive)
- *
- * For some reason, the top-left corner of the framebuffer is at (1440, 1440)
- * for the purpose of clipping and scissors.
- */
-#define R300_RE_CLIPRECT_TL_0 0x43B0
-#define R300_RE_CLIPRECT_BR_0 0x43B4
-#define R300_RE_CLIPRECT_TL_1 0x43B8
-#define R300_RE_CLIPRECT_BR_1 0x43BC
-#define R300_RE_CLIPRECT_TL_2 0x43C0
-#define R300_RE_CLIPRECT_BR_2 0x43C4
-#define R300_RE_CLIPRECT_TL_3 0x43C8
-#define R300_RE_CLIPRECT_BR_3 0x43CC
-# define R300_CLIPRECT_OFFSET 1440
-# define R300_CLIPRECT_MASK 0x1FFF
-# define R300_CLIPRECT_X_SHIFT 0
-# define R300_CLIPRECT_X_MASK (0x1FFF << 0)
-# define R300_CLIPRECT_Y_SHIFT 13
-# define R300_CLIPRECT_Y_MASK (0x1FFF << 13)
-#define R300_RE_CLIPRECT_CNTL 0x43D0
-# define R300_CLIP_OUT (1 << 0)
-# define R300_CLIP_0 (1 << 1)
-# define R300_CLIP_1 (1 << 2)
-# define R300_CLIP_10 (1 << 3)
-# define R300_CLIP_2 (1 << 4)
-# define R300_CLIP_20 (1 << 5)
-# define R300_CLIP_21 (1 << 6)
-# define R300_CLIP_210 (1 << 7)
-# define R300_CLIP_3 (1 << 8)
-# define R300_CLIP_30 (1 << 9)
-# define R300_CLIP_31 (1 << 10)
-# define R300_CLIP_310 (1 << 11)
-# define R300_CLIP_32 (1 << 12)
-# define R300_CLIP_320 (1 << 13)
-# define R300_CLIP_321 (1 << 14)
-# define R300_CLIP_3210 (1 << 15)
-
-/* gap */
-
-#define R300_RE_SCISSORS_TL 0x43E0
-#define R300_RE_SCISSORS_BR 0x43E4
-# define R300_SCISSORS_OFFSET 1440
-# define R300_SCISSORS_X_SHIFT 0
-# define R300_SCISSORS_X_MASK (0x1FFF << 0)
-# define R300_SCISSORS_Y_SHIFT 13
-# define R300_SCISSORS_Y_MASK (0x1FFF << 13)
-/* END: Scissors and cliprects */
-
-/* BEGIN: Texture specification */
-
-/*
- * The texture specification dwords are grouped by meaning and not by texture
- * unit. This means that e.g. the offset for texture image unit N is found in
- * register TX_OFFSET_0 + (4*N)
- */
-#define R300_TX_FILTER_0 0x4400
-# define R300_TX_REPEAT 0
-# define R300_TX_MIRRORED 1
-# define R300_TX_CLAMP 4
-# define R300_TX_CLAMP_TO_EDGE 2
-# define R300_TX_CLAMP_TO_BORDER 6
-# define R300_TX_WRAP_S_SHIFT 0
-# define R300_TX_WRAP_S_MASK (7 << 0)
-# define R300_TX_WRAP_T_SHIFT 3
-# define R300_TX_WRAP_T_MASK (7 << 3)
-# define R300_TX_WRAP_Q_SHIFT 6
-# define R300_TX_WRAP_Q_MASK (7 << 6)
-# define R300_TX_MAG_FILTER_NEAREST (1 << 9)
-# define R300_TX_MAG_FILTER_LINEAR (2 << 9)
-# define R300_TX_MAG_FILTER_MASK (3 << 9)
-# define R300_TX_MIN_FILTER_NEAREST (1 << 11)
-# define R300_TX_MIN_FILTER_LINEAR (2 << 11)
-# define R300_TX_MIN_FILTER_NEAREST_MIP_NEAREST (5 << 11)
-# define R300_TX_MIN_FILTER_NEAREST_MIP_LINEAR (9 << 11)
-# define R300_TX_MIN_FILTER_LINEAR_MIP_NEAREST (6 << 11)
-# define R300_TX_MIN_FILTER_LINEAR_MIP_LINEAR (10 << 11)
-
-/* NOTE: NEAREST doesnt seem to exist.
- * Im not seting MAG_FILTER_MASK and (3 << 11) on for all
- * anisotropy modes because that would void selected mag filter
- */
-# define R300_TX_MIN_FILTER_ANISO_NEAREST (0 << 13)
-# define R300_TX_MIN_FILTER_ANISO_LINEAR (0 << 13)
-# define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (1 << 13)
-# define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (2 << 13)
-# define R300_TX_MIN_FILTER_MASK ( (15 << 11) | (3 << 13) )
-# define R300_TX_MAX_ANISO_1_TO_1 (0 << 21)
-# define R300_TX_MAX_ANISO_2_TO_1 (2 << 21)
-# define R300_TX_MAX_ANISO_4_TO_1 (4 << 21)
-# define R300_TX_MAX_ANISO_8_TO_1 (6 << 21)
-# define R300_TX_MAX_ANISO_16_TO_1 (8 << 21)
-# define R300_TX_MAX_ANISO_MASK (14 << 21)
-
-#define R300_TX_FILTER1_0 0x4440
-# define R300_CHROMA_KEY_MODE_DISABLE 0
-# define R300_CHROMA_KEY_FORCE 1
-# define R300_CHROMA_KEY_BLEND 2
-# define R300_MC_ROUND_NORMAL (0<<2)
-# define R300_MC_ROUND_MPEG4 (1<<2)
-# define R300_LOD_BIAS_MASK 0x1fff
-# define R300_EDGE_ANISO_EDGE_DIAG (0<<13)
-# define R300_EDGE_ANISO_EDGE_ONLY (1<<13)
-# define R300_MC_COORD_TRUNCATE_DISABLE (0<<14)
-# define R300_MC_COORD_TRUNCATE_MPEG (1<<14)
-# define R300_TX_TRI_PERF_0_8 (0<<15)
-# define R300_TX_TRI_PERF_1_8 (1<<15)
-# define R300_TX_TRI_PERF_1_4 (2<<15)
-# define R300_TX_TRI_PERF_3_8 (3<<15)
-# define R300_ANISO_THRESHOLD_MASK (7<<17)
-
-#define R300_TX_SIZE_0 0x4480
-# define R300_TX_WIDTHMASK_SHIFT 0
-# define R300_TX_WIDTHMASK_MASK (2047 << 0)
-# define R300_TX_HEIGHTMASK_SHIFT 11
-# define R300_TX_HEIGHTMASK_MASK (2047 << 11)
-# define R300_TX_UNK23 (1 << 23)
-# define R300_TX_MAX_MIP_LEVEL_SHIFT 26
-# define R300_TX_MAX_MIP_LEVEL_MASK (0xf << 26)
-# define R300_TX_SIZE_PROJECTED (1<<30)
-# define R300_TX_SIZE_TXPITCH_EN (1<<31)
-#define R300_TX_FORMAT_0 0x44C0
- /* The interpretation of the format word by Wladimir van der Laan */
- /* The X, Y, Z and W refer to the layout of the components.
- They are given meanings as R, G, B and Alpha by the swizzle
- specification */
-# define R300_TX_FORMAT_X8 0x0
-# define R300_TX_FORMAT_X16 0x1
-# define R300_TX_FORMAT_Y4X4 0x2
-# define R300_TX_FORMAT_Y8X8 0x3
-# define R300_TX_FORMAT_Y16X16 0x4
-# define R300_TX_FORMAT_Z3Y3X2 0x5
-# define R300_TX_FORMAT_Z5Y6X5 0x6
-# define R300_TX_FORMAT_Z6Y5X5 0x7
-# define R300_TX_FORMAT_Z11Y11X10 0x8
-# define R300_TX_FORMAT_Z10Y11X11 0x9
-# define R300_TX_FORMAT_W4Z4Y4X4 0xA
-# define R300_TX_FORMAT_W1Z5Y5X5 0xB
-# define R300_TX_FORMAT_W8Z8Y8X8 0xC
-# define R300_TX_FORMAT_W2Z10Y10X10 0xD
-# define R300_TX_FORMAT_W16Z16Y16X16 0xE
-# define R300_TX_FORMAT_DXT1 0xF
-# define R300_TX_FORMAT_DXT3 0x10
-# define R300_TX_FORMAT_DXT5 0x11
-# define R300_TX_FORMAT_D3DMFT_CxV8U8 0x12 /* no swizzle */
-# define R300_TX_FORMAT_A8R8G8B8 0x13 /* no swizzle */
-# define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */
-# define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */
- /* 0x16 - some 16 bit green format.. ?? */
-# define R300_TX_FORMAT_UNK25 (1 << 25) /* no swizzle */
-# define R300_TX_FORMAT_CUBIC_MAP (1 << 26)
-
- /* gap */
- /* Floating point formats */
- /* Note - hardware supports both 16 and 32 bit floating point */
-# define R300_TX_FORMAT_FL_I16 0x18
-# define R300_TX_FORMAT_FL_I16A16 0x19
-# define R300_TX_FORMAT_FL_R16G16B16A16 0x1A
-# define R300_TX_FORMAT_FL_I32 0x1B
-# define R300_TX_FORMAT_FL_I32A32 0x1C
-# define R300_TX_FORMAT_FL_R32G32B32A32 0x1D
- /* alpha modes, convenience mostly */
- /* if you have alpha, pick constant appropriate to the
- number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */
-# define R300_TX_FORMAT_ALPHA_1CH 0x000
-# define R300_TX_FORMAT_ALPHA_2CH 0x200
-# define R300_TX_FORMAT_ALPHA_4CH 0x600
-# define R300_TX_FORMAT_ALPHA_NONE 0xA00
- /* Swizzling */
- /* constants */
-# define R300_TX_FORMAT_X 0
-# define R300_TX_FORMAT_Y 1
-# define R300_TX_FORMAT_Z 2
-# define R300_TX_FORMAT_W 3
-# define R300_TX_FORMAT_ZERO 4
-# define R300_TX_FORMAT_ONE 5
- /* 2.0*Z, everything above 1.0 is set to 0.0 */
-# define R300_TX_FORMAT_CUT_Z 6
- /* 2.0*W, everything above 1.0 is set to 0.0 */
-# define R300_TX_FORMAT_CUT_W 7
-
-# define R300_TX_FORMAT_B_SHIFT 18
-# define R300_TX_FORMAT_G_SHIFT 15
-# define R300_TX_FORMAT_R_SHIFT 12
-# define R300_TX_FORMAT_A_SHIFT 9
- /* Convenience macro to take care of layout and swizzling */
-# define R300_EASY_TX_FORMAT(B, G, R, A, FMT) ( \
- ((R300_TX_FORMAT_##B)<<R300_TX_FORMAT_B_SHIFT) \
- | ((R300_TX_FORMAT_##G)<<R300_TX_FORMAT_G_SHIFT) \
- | ((R300_TX_FORMAT_##R)<<R300_TX_FORMAT_R_SHIFT) \
- | ((R300_TX_FORMAT_##A)<<R300_TX_FORMAT_A_SHIFT) \
- | (R300_TX_FORMAT_##FMT) \
- )
- /* These can be ORed with result of R300_EASY_TX_FORMAT()
- We don't really know what they do. Take values from a
- constant color ? */
-# define R300_TX_FORMAT_CONST_X (1<<5)
-# define R300_TX_FORMAT_CONST_Y (2<<5)
-# define R300_TX_FORMAT_CONST_Z (4<<5)
-# define R300_TX_FORMAT_CONST_W (8<<5)
-
-# define R300_TX_FORMAT_YUV_MODE 0x00800000
-
-#define R300_TX_PITCH_0 0x4500 /* obvious missing in gap */
-#define R300_TX_OFFSET_0 0x4540
- /* BEGIN: Guess from R200 */
-# define R300_TXO_ENDIAN_NO_SWAP (0 << 0)
-# define R300_TXO_ENDIAN_BYTE_SWAP (1 << 0)
-# define R300_TXO_ENDIAN_WORD_SWAP (2 << 0)
-# define R300_TXO_ENDIAN_HALFDW_SWAP (3 << 0)
-# define R300_TXO_MACRO_TILE (1 << 2)
-# define R300_TXO_MICRO_TILE (1 << 3)
-# define R300_TXO_OFFSET_MASK 0xffffffe0
-# define R300_TXO_OFFSET_SHIFT 5
- /* END: Guess from R200 */
-
-/* 32 bit chroma key */
-#define R300_TX_CHROMA_KEY_0 0x4580
-/* ff00ff00 == { 0, 1.0, 0, 1.0 } */
-#define R300_TX_BORDER_COLOR_0 0x45C0
-
-/* END: Texture specification */
-
-/* BEGIN: Fragment program instruction set */
-
-/* Fragment programs are written directly into register space.
- * There are separate instruction streams for texture instructions and ALU
- * instructions.
- * In order to synchronize these streams, the program is divided into up
- * to 4 nodes. Each node begins with a number of TEX operations, followed
- * by a number of ALU operations.
- * The first node can have zero TEX ops, all subsequent nodes must have at
- * least
- * one TEX ops.
- * All nodes must have at least one ALU op.
- *
- * The index of the last node is stored in PFS_CNTL_0: A value of 0 means
- * 1 node, a value of 3 means 4 nodes.
- * The total amount of instructions is defined in PFS_CNTL_2. The offsets are
- * offsets into the respective instruction streams, while *_END points to the
- * last instruction relative to this offset.
- */
-#define R300_PFS_CNTL_0 0x4600
-# define R300_PFS_CNTL_LAST_NODES_SHIFT 0
-# define R300_PFS_CNTL_LAST_NODES_MASK (3 << 0)
-# define R300_PFS_CNTL_FIRST_NODE_HAS_TEX (1 << 3)
-#define R300_PFS_CNTL_1 0x4604
-/* There is an unshifted value here which has so far always been equal to the
- * index of the highest used temporary register.
- */
-#define R300_PFS_CNTL_2 0x4608
-# define R300_PFS_CNTL_ALU_OFFSET_SHIFT 0
-# define R300_PFS_CNTL_ALU_OFFSET_MASK (63 << 0)
-# define R300_PFS_CNTL_ALU_END_SHIFT 6
-# define R300_PFS_CNTL_ALU_END_MASK (63 << 6)
-# define R300_PFS_CNTL_TEX_OFFSET_SHIFT 12
-# define R300_PFS_CNTL_TEX_OFFSET_MASK (31 << 12) /* GUESS */
-# define R300_PFS_CNTL_TEX_END_SHIFT 18
-# define R300_PFS_CNTL_TEX_END_MASK (31 << 18) /* GUESS */
-
-/* gap */
-
-/* Nodes are stored backwards. The last active node is always stored in
- * PFS_NODE_3.
- * Example: In a 2-node program, NODE_0 and NODE_1 are set to 0. The
- * first node is stored in NODE_2, the second node is stored in NODE_3.
- *
- * Offsets are relative to the master offset from PFS_CNTL_2.
- */
-#define R300_PFS_NODE_0 0x4610
-#define R300_PFS_NODE_1 0x4614
-#define R300_PFS_NODE_2 0x4618
-#define R300_PFS_NODE_3 0x461C
-# define R300_PFS_NODE_ALU_OFFSET_SHIFT 0
-# define R300_PFS_NODE_ALU_OFFSET_MASK (63 << 0)
-# define R300_PFS_NODE_ALU_END_SHIFT 6
-# define R300_PFS_NODE_ALU_END_MASK (63 << 6)
-# define R300_PFS_NODE_TEX_OFFSET_SHIFT 12
-# define R300_PFS_NODE_TEX_OFFSET_MASK (31 << 12)
-# define R300_PFS_NODE_TEX_END_SHIFT 17
-# define R300_PFS_NODE_TEX_END_MASK (31 << 17)
-# define R300_PFS_NODE_OUTPUT_COLOR (1 << 22)
-# define R300_PFS_NODE_OUTPUT_DEPTH (1 << 23)
-
-/* TEX
- * As far as I can tell, texture instructions cannot write into output
- * registers directly. A subsequent ALU instruction is always necessary,
- * even if it's just MAD o0, r0, 1, 0
- */
-#define R300_PFS_TEXI_0 0x4620
-# define R300_FPITX_SRC_SHIFT 0
-# define R300_FPITX_SRC_MASK (31 << 0)
- /* GUESS */
-# define R300_FPITX_SRC_CONST (1 << 5)
-# define R300_FPITX_DST_SHIFT 6
-# define R300_FPITX_DST_MASK (31 << 6)
-# define R300_FPITX_IMAGE_SHIFT 11
- /* GUESS based on layout and native limits */
-# define R300_FPITX_IMAGE_MASK (15 << 11)
-/* Unsure if these are opcodes, or some kind of bitfield, but this is how
- * they were set when I checked
- */
-# define R300_FPITX_OPCODE_SHIFT 15
-# define R300_FPITX_OP_TEX 1
-# define R300_FPITX_OP_KIL 2
-# define R300_FPITX_OP_TXP 3
-# define R300_FPITX_OP_TXB 4
-# define R300_FPITX_OPCODE_MASK (7 << 15)
-
-/* ALU
- * The ALU instructions register blocks are enumerated according to the order
- * in which fglrx. I assume there is space for 64 instructions, since
- * each block has space for a maximum of 64 DWORDs, and this matches reported
- * native limits.
- *
- * The basic functional block seems to be one MAD for each color and alpha,
- * and an adder that adds all components after the MUL.
- * - ADD, MUL, MAD etc.: use MAD with appropriate neutral operands
- * - DP4: Use OUTC_DP4, OUTA_DP4
- * - DP3: Use OUTC_DP3, OUTA_DP4, appropriate alpha operands
- * - DPH: Use OUTC_DP4, OUTA_DP4, appropriate alpha operands
- * - CMPH: If ARG2 > 0.5, return ARG0, else return ARG1
- * - CMP: If ARG2 < 0, return ARG1, else return ARG0
- * - FLR: use FRC+MAD
- * - XPD: use MAD+MAD
- * - SGE, SLT: use MAD+CMP
- * - RSQ: use ABS modifier for argument
- * - Use OUTC_REPL_ALPHA to write results of an alpha-only operation
- * (e.g. RCP) into color register
- * - apparently, there's no quick DST operation
- * - fglrx set FPI2_UNKNOWN_31 on a "MAD fragment.color, tmp0, tmp1, tmp2"
- * - fglrx set FPI2_UNKNOWN_31 on a "MAX r2, r1, c0"
- * - fglrx once set FPI0_UNKNOWN_31 on a "FRC r1, r1"
- *
- * Operand selection
- * First stage selects three sources from the available registers and
- * constant parameters. This is defined in INSTR1 (color) and INSTR3 (alpha).
- * fglrx sorts the three source fields: Registers before constants,
- * lower indices before higher indices; I do not know whether this is
- * necessary.
- *
- * fglrx fills unused sources with "read constant 0"
- * According to specs, you cannot select more than two different constants.
- *
- * Second stage selects the operands from the sources. This is defined in
- * INSTR0 (color) and INSTR2 (alpha). You can also select the special constants
- * zero and one.
- * Swizzling and negation happens in this stage, as well.
- *
- * Important: Color and alpha seem to be mostly separate, i.e. their sources
- * selection appears to be fully independent (the register storage is probably
- * physically split into a color and an alpha section).
- * However (because of the apparent physical split), there is some interaction
- * WRT swizzling. If, for example, you want to load an R component into an
- * Alpha operand, this R component is taken from a *color* source, not from
- * an alpha source. The corresponding register doesn't even have to appear in
- * the alpha sources list. (I hope this all makes sense to you)
- *
- * Destination selection
- * The destination register index is in FPI1 (color) and FPI3 (alpha)
- * together with enable bits.
- * There are separate enable bits for writing into temporary registers
- * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
- * /DSTA_OUTPUT). You can write to both at once, or not write at all (the
- * same index must be used for both).
- *
- * Note: There is a special form for LRP
- * - Argument order is the same as in ARB_fragment_program.
- * - Operation is MAD
- * - ARG1 is set to ARGC_SRC1C_LRP/ARGC_SRC1A_LRP
- * - Set FPI0/FPI2_SPECIAL_LRP
- * Arbitrary LRP (including support for swizzling) requires vanilla MAD+MAD
- */
-#define R300_PFS_INSTR1_0 0x46C0
-# define R300_FPI1_SRC0C_SHIFT 0
-# define R300_FPI1_SRC0C_MASK (31 << 0)
-# define R300_FPI1_SRC0C_CONST (1 << 5)
-# define R300_FPI1_SRC1C_SHIFT 6
-# define R300_FPI1_SRC1C_MASK (31 << 6)
-# define R300_FPI1_SRC1C_CONST (1 << 11)
-# define R300_FPI1_SRC2C_SHIFT 12
-# define R300_FPI1_SRC2C_MASK (31 << 12)
-# define R300_FPI1_SRC2C_CONST (1 << 17)
-# define R300_FPI1_SRC_MASK 0x0003ffff
-# define R300_FPI1_DSTC_SHIFT 18
-# define R300_FPI1_DSTC_MASK (31 << 18)
-# define R300_FPI1_DSTC_REG_MASK_SHIFT 23
-# define R300_FPI1_DSTC_REG_X (1 << 23)
-# define R300_FPI1_DSTC_REG_Y (1 << 24)
-# define R300_FPI1_DSTC_REG_Z (1 << 25)
-# define R300_FPI1_DSTC_OUTPUT_MASK_SHIFT 26
-# define R300_FPI1_DSTC_OUTPUT_X (1 << 26)
-# define R300_FPI1_DSTC_OUTPUT_Y (1 << 27)
-# define R300_FPI1_DSTC_OUTPUT_Z (1 << 28)
-
-#define R300_PFS_INSTR3_0 0x47C0
-# define R300_FPI3_SRC0A_SHIFT 0
-# define R300_FPI3_SRC0A_MASK (31 << 0)
-# define R300_FPI3_SRC0A_CONST (1 << 5)
-# define R300_FPI3_SRC1A_SHIFT 6
-# define R300_FPI3_SRC1A_MASK (31 << 6)
-# define R300_FPI3_SRC1A_CONST (1 << 11)
-# define R300_FPI3_SRC2A_SHIFT 12
-# define R300_FPI3_SRC2A_MASK (31 << 12)
-# define R300_FPI3_SRC2A_CONST (1 << 17)
-# define R300_FPI3_SRC_MASK 0x0003ffff
-# define R300_FPI3_DSTA_SHIFT 18
-# define R300_FPI3_DSTA_MASK (31 << 18)
-# define R300_FPI3_DSTA_REG (1 << 23)
-# define R300_FPI3_DSTA_OUTPUT (1 << 24)
-# define R300_FPI3_DSTA_DEPTH (1 << 27)
-
-#define R300_PFS_INSTR0_0 0x48C0
-# define R300_FPI0_ARGC_SRC0C_XYZ 0
-# define R300_FPI0_ARGC_SRC0C_XXX 1
-# define R300_FPI0_ARGC_SRC0C_YYY 2
-# define R300_FPI0_ARGC_SRC0C_ZZZ 3
-# define R300_FPI0_ARGC_SRC1C_XYZ 4
-# define R300_FPI0_ARGC_SRC1C_XXX 5
-# define R300_FPI0_ARGC_SRC1C_YYY 6
-# define R300_FPI0_ARGC_SRC1C_ZZZ 7
-# define R300_FPI0_ARGC_SRC2C_XYZ 8
-# define R300_FPI0_ARGC_SRC2C_XXX 9
-# define R300_FPI0_ARGC_SRC2C_YYY 10
-# define R300_FPI0_ARGC_SRC2C_ZZZ 11
-# define R300_FPI0_ARGC_SRC0A 12
-# define R300_FPI0_ARGC_SRC1A 13
-# define R300_FPI0_ARGC_SRC2A 14
-# define R300_FPI0_ARGC_SRC1C_LRP 15
-# define R300_FPI0_ARGC_ZERO 20
-# define R300_FPI0_ARGC_ONE 21
- /* GUESS */
-# define R300_FPI0_ARGC_HALF 22
-# define R300_FPI0_ARGC_SRC0C_YZX 23
-# define R300_FPI0_ARGC_SRC1C_YZX 24
-# define R300_FPI0_ARGC_SRC2C_YZX 25
-# define R300_FPI0_ARGC_SRC0C_ZXY 26
-# define R300_FPI0_ARGC_SRC1C_ZXY 27
-# define R300_FPI0_ARGC_SRC2C_ZXY 28
-# define R300_FPI0_ARGC_SRC0CA_WZY 29
-# define R300_FPI0_ARGC_SRC1CA_WZY 30
-# define R300_FPI0_ARGC_SRC2CA_WZY 31
-
-# define R300_FPI0_ARG0C_SHIFT 0
-# define R300_FPI0_ARG0C_MASK (31 << 0)
-# define R300_FPI0_ARG0C_NEG (1 << 5)
-# define R300_FPI0_ARG0C_ABS (1 << 6)
-# define R300_FPI0_ARG1C_SHIFT 7
-# define R300_FPI0_ARG1C_MASK (31 << 7)
-# define R300_FPI0_ARG1C_NEG (1 << 12)
-# define R300_FPI0_ARG1C_ABS (1 << 13)
-# define R300_FPI0_ARG2C_SHIFT 14
-# define R300_FPI0_ARG2C_MASK (31 << 14)
-# define R300_FPI0_ARG2C_NEG (1 << 19)
-# define R300_FPI0_ARG2C_ABS (1 << 20)
-# define R300_FPI0_SPECIAL_LRP (1 << 21)
-# define R300_FPI0_OUTC_MAD (0 << 23)
-# define R300_FPI0_OUTC_DP3 (1 << 23)
-# define R300_FPI0_OUTC_DP4 (2 << 23)
-# define R300_FPI0_OUTC_MIN (4 << 23)
-# define R300_FPI0_OUTC_MAX (5 << 23)
-# define R300_FPI0_OUTC_CMPH (7 << 23)
-# define R300_FPI0_OUTC_CMP (8 << 23)
-# define R300_FPI0_OUTC_FRC (9 << 23)
-# define R300_FPI0_OUTC_REPL_ALPHA (10 << 23)
-# define R300_FPI0_OUTC_SAT (1 << 30)
-# define R300_FPI0_INSERT_NOP (1 << 31)
-
-#define R300_PFS_INSTR2_0 0x49C0
-# define R300_FPI2_ARGA_SRC0C_X 0
-# define R300_FPI2_ARGA_SRC0C_Y 1
-# define R300_FPI2_ARGA_SRC0C_Z 2
-# define R300_FPI2_ARGA_SRC1C_X 3
-# define R300_FPI2_ARGA_SRC1C_Y 4
-# define R300_FPI2_ARGA_SRC1C_Z 5
-# define R300_FPI2_ARGA_SRC2C_X 6
-# define R300_FPI2_ARGA_SRC2C_Y 7
-# define R300_FPI2_ARGA_SRC2C_Z 8
-# define R300_FPI2_ARGA_SRC0A 9
-# define R300_FPI2_ARGA_SRC1A 10
-# define R300_FPI2_ARGA_SRC2A 11
-# define R300_FPI2_ARGA_SRC1A_LRP 15
-# define R300_FPI2_ARGA_ZERO 16
-# define R300_FPI2_ARGA_ONE 17
- /* GUESS */
-# define R300_FPI2_ARGA_HALF 18
-# define R300_FPI2_ARG0A_SHIFT 0
-# define R300_FPI2_ARG0A_MASK (31 << 0)
-# define R300_FPI2_ARG0A_NEG (1 << 5)
- /* GUESS */
-# define R300_FPI2_ARG0A_ABS (1 << 6)
-# define R300_FPI2_ARG1A_SHIFT 7
-# define R300_FPI2_ARG1A_MASK (31 << 7)
-# define R300_FPI2_ARG1A_NEG (1 << 12)
- /* GUESS */
-# define R300_FPI2_ARG1A_ABS (1 << 13)
-# define R300_FPI2_ARG2A_SHIFT 14
-# define R300_FPI2_ARG2A_MASK (31 << 14)
-# define R300_FPI2_ARG2A_NEG (1 << 19)
- /* GUESS */
-# define R300_FPI2_ARG2A_ABS (1 << 20)
-# define R300_FPI2_SPECIAL_LRP (1 << 21)
-# define R300_FPI2_OUTA_MAD (0 << 23)
-# define R300_FPI2_OUTA_DP4 (1 << 23)
-# define R300_FPI2_OUTA_MIN (2 << 23)
-# define R300_FPI2_OUTA_MAX (3 << 23)
-# define R300_FPI2_OUTA_CMP (6 << 23)
-# define R300_FPI2_OUTA_FRC (7 << 23)
-# define R300_FPI2_OUTA_EX2 (8 << 23)
-# define R300_FPI2_OUTA_LG2 (9 << 23)
-# define R300_FPI2_OUTA_RCP (10 << 23)
-# define R300_FPI2_OUTA_RSQ (11 << 23)
-# define R300_FPI2_OUTA_SAT (1 << 30)
-# define R300_FPI2_UNKNOWN_31 (1 << 31)
-/* END: Fragment program instruction set */
-
-/* Fog state and color */
-#define R300_RE_FOG_STATE 0x4BC0
-# define R300_FOG_ENABLE (1 << 0)
-# define R300_FOG_MODE_LINEAR (0 << 1)
-# define R300_FOG_MODE_EXP (1 << 1)
-# define R300_FOG_MODE_EXP2 (2 << 1)
-# define R300_FOG_MODE_MASK (3 << 1)
-#define R300_FOG_COLOR_R 0x4BC8
-#define R300_FOG_COLOR_G 0x4BCC
-#define R300_FOG_COLOR_B 0x4BD0
-
-#define R300_PP_ALPHA_TEST 0x4BD4
-# define R300_REF_ALPHA_MASK 0x000000ff
-# define R300_ALPHA_TEST_FAIL (0 << 8)
-# define R300_ALPHA_TEST_LESS (1 << 8)
-# define R300_ALPHA_TEST_LEQUAL (3 << 8)
-# define R300_ALPHA_TEST_EQUAL (2 << 8)
-# define R300_ALPHA_TEST_GEQUAL (6 << 8)
-# define R300_ALPHA_TEST_GREATER (4 << 8)
-# define R300_ALPHA_TEST_NEQUAL (5 << 8)
-# define R300_ALPHA_TEST_PASS (7 << 8)
-# define R300_ALPHA_TEST_OP_MASK (7 << 8)
-# define R300_ALPHA_TEST_ENABLE (1 << 11)
-
-/* gap */
-
-/* Fragment program parameters in 7.16 floating point */
-#define R300_PFS_PARAM_0_X 0x4C00
-#define R300_PFS_PARAM_0_Y 0x4C04
-#define R300_PFS_PARAM_0_Z 0x4C08
-#define R300_PFS_PARAM_0_W 0x4C0C
-/* GUESS: PARAM_31 is last, based on native limits reported by fglrx */
-#define R300_PFS_PARAM_31_X 0x4DF0
-#define R300_PFS_PARAM_31_Y 0x4DF4
-#define R300_PFS_PARAM_31_Z 0x4DF8
-#define R300_PFS_PARAM_31_W 0x4DFC
-
-/* Notes:
- * - AFAIK fglrx always sets BLEND_UNKNOWN when blending is used in
- * the application
- * - AFAIK fglrx always sets BLEND_NO_SEPARATE when CBLEND and ABLEND
- * are set to the same
- * function (both registers are always set up completely in any case)
- * - Most blend flags are simply copied from R200 and not tested yet
- */
-#define R300_RB3D_CBLEND 0x4E04
-#define R300_RB3D_ABLEND 0x4E08
-/* the following only appear in CBLEND */
-# define R300_BLEND_ENABLE (1 << 0)
-# define R300_BLEND_UNKNOWN (3 << 1)
-# define R300_BLEND_NO_SEPARATE (1 << 3)
-/* the following are shared between CBLEND and ABLEND */
-# define R300_FCN_MASK (3 << 12)
-# define R300_COMB_FCN_ADD_CLAMP (0 << 12)
-# define R300_COMB_FCN_ADD_NOCLAMP (1 << 12)
-# define R300_COMB_FCN_SUB_CLAMP (2 << 12)
-# define R300_COMB_FCN_SUB_NOCLAMP (3 << 12)
-# define R300_COMB_FCN_MIN (4 << 12)
-# define R300_COMB_FCN_MAX (5 << 12)
-# define R300_COMB_FCN_RSUB_CLAMP (6 << 12)
-# define R300_COMB_FCN_RSUB_NOCLAMP (7 << 12)
-# define R300_BLEND_GL_ZERO (32)
-# define R300_BLEND_GL_ONE (33)
-# define R300_BLEND_GL_SRC_COLOR (34)
-# define R300_BLEND_GL_ONE_MINUS_SRC_COLOR (35)
-# define R300_BLEND_GL_DST_COLOR (36)
-# define R300_BLEND_GL_ONE_MINUS_DST_COLOR (37)
-# define R300_BLEND_GL_SRC_ALPHA (38)
-# define R300_BLEND_GL_ONE_MINUS_SRC_ALPHA (39)
-# define R300_BLEND_GL_DST_ALPHA (40)
-# define R300_BLEND_GL_ONE_MINUS_DST_ALPHA (41)
-# define R300_BLEND_GL_SRC_ALPHA_SATURATE (42)
-# define R300_BLEND_GL_CONST_COLOR (43)
-# define R300_BLEND_GL_ONE_MINUS_CONST_COLOR (44)
-# define R300_BLEND_GL_CONST_ALPHA (45)
-# define R300_BLEND_GL_ONE_MINUS_CONST_ALPHA (46)
-# define R300_BLEND_MASK (63)
-# define R300_SRC_BLEND_SHIFT (16)
-# define R300_DST_BLEND_SHIFT (24)
-#define R300_RB3D_BLEND_COLOR 0x4E10
-#define R300_RB3D_COLORMASK 0x4E0C
-# define R300_COLORMASK0_B (1<<0)
-# define R300_COLORMASK0_G (1<<1)
-# define R300_COLORMASK0_R (1<<2)
-# define R300_COLORMASK0_A (1<<3)
-
-/* gap */
-
-#define R300_RB3D_COLOROFFSET0 0x4E28
-# define R300_COLOROFFSET_MASK 0xFFFFFFF0 /* GUESS */
-#define R300_RB3D_COLOROFFSET1 0x4E2C /* GUESS */
-#define R300_RB3D_COLOROFFSET2 0x4E30 /* GUESS */
-#define R300_RB3D_COLOROFFSET3 0x4E34 /* GUESS */
-
-/* gap */
-
-/* Bit 16: Larger tiles
- * Bit 17: 4x2 tiles
- * Bit 18: Extremely weird tile like, but some pixels duplicated?
- */
-#define R300_RB3D_COLORPITCH0 0x4E38
-# define R300_COLORPITCH_MASK 0x00001FF8 /* GUESS */
-# define R300_COLOR_TILE_ENABLE (1 << 16) /* GUESS */
-# define R300_COLOR_MICROTILE_ENABLE (1 << 17) /* GUESS */
-# define R300_COLOR_ENDIAN_NO_SWAP (0 << 18) /* GUESS */
-# define R300_COLOR_ENDIAN_WORD_SWAP (1 << 18) /* GUESS */
-# define R300_COLOR_ENDIAN_DWORD_SWAP (2 << 18) /* GUESS */
-# define R300_COLOR_FORMAT_RGB565 (2 << 22)
-# define R300_COLOR_FORMAT_ARGB8888 (3 << 22)
-#define R300_RB3D_COLORPITCH1 0x4E3C /* GUESS */
-#define R300_RB3D_COLORPITCH2 0x4E40 /* GUESS */
-#define R300_RB3D_COLORPITCH3 0x4E44 /* GUESS */
-
-#define R300_RB3D_AARESOLVE_CTL 0x4E88
-/* gap */
-
-/* Guess by Vladimir.
- * Set to 0A before 3D operations, set to 02 afterwards.
- */
-/*#define R300_RB3D_DSTCACHE_CTLSTAT 0x4E4C*/
-# define R300_RB3D_DSTCACHE_UNKNOWN_02 0x00000002
-# define R300_RB3D_DSTCACHE_UNKNOWN_0A 0x0000000A
-
-/* gap */
-/* There seems to be no "write only" setting, so use Z-test = ALWAYS
- * for this.
- * Bit (1<<8) is the "test" bit. so plain write is 6 - vd
- */
-#define R300_ZB_CNTL 0x4F00
-# define R300_STENCIL_ENABLE (1 << 0)
-# define R300_Z_ENABLE (1 << 1)
-# define R300_Z_WRITE_ENABLE (1 << 2)
-# define R300_Z_SIGNED_COMPARE (1 << 3)
-# define R300_STENCIL_FRONT_BACK (1 << 4)
-
-#define R300_ZB_ZSTENCILCNTL 0x4f04
- /* functions */
-# define R300_ZS_NEVER 0
-# define R300_ZS_LESS 1
-# define R300_ZS_LEQUAL 2
-# define R300_ZS_EQUAL 3
-# define R300_ZS_GEQUAL 4
-# define R300_ZS_GREATER 5
-# define R300_ZS_NOTEQUAL 6
-# define R300_ZS_ALWAYS 7
-# define R300_ZS_MASK 7
- /* operations */
-# define R300_ZS_KEEP 0
-# define R300_ZS_ZERO 1
-# define R300_ZS_REPLACE 2
-# define R300_ZS_INCR 3
-# define R300_ZS_DECR 4
-# define R300_ZS_INVERT 5
-# define R300_ZS_INCR_WRAP 6
-# define R300_ZS_DECR_WRAP 7
-# define R300_Z_FUNC_SHIFT 0
- /* front and back refer to operations done for front
- and back faces, i.e. separate stencil function support */
-# define R300_S_FRONT_FUNC_SHIFT 3
-# define R300_S_FRONT_SFAIL_OP_SHIFT 6
-# define R300_S_FRONT_ZPASS_OP_SHIFT 9
-# define R300_S_FRONT_ZFAIL_OP_SHIFT 12
-# define R300_S_BACK_FUNC_SHIFT 15
-# define R300_S_BACK_SFAIL_OP_SHIFT 18
-# define R300_S_BACK_ZPASS_OP_SHIFT 21
-# define R300_S_BACK_ZFAIL_OP_SHIFT 24
-
-#define R300_ZB_STENCILREFMASK 0x4f08
-# define R300_STENCILREF_SHIFT 0
-# define R300_STENCILREF_MASK 0x000000ff
-# define R300_STENCILMASK_SHIFT 8
-# define R300_STENCILMASK_MASK 0x0000ff00
-# define R300_STENCILWRITEMASK_SHIFT 16
-# define R300_STENCILWRITEMASK_MASK 0x00ff0000
-
-/* gap */
-
-#define R300_ZB_FORMAT 0x4f10
-# define R300_DEPTHFORMAT_16BIT_INT_Z (0 << 0)
-# define R300_DEPTHFORMAT_16BIT_13E3 (1 << 0)
-# define R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL (2 << 0)
-/* reserved up to (15 << 0) */
-# define R300_INVERT_13E3_LEADING_ONES (0 << 4)
-# define R300_INVERT_13E3_LEADING_ZEROS (1 << 4)
-
-#define R300_ZB_ZTOP 0x4F14
-# define R300_ZTOP_DISABLE (0 << 0)
-# define R300_ZTOP_ENABLE (1 << 0)
-
-/* gap */
-
-#define R300_ZB_ZCACHE_CTLSTAT 0x4f18
-# define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_NO_EFFECT (0 << 0)
-# define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE (1 << 0)
-# define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_NO_EFFECT (0 << 1)
-# define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE (1 << 1)
-# define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_IDLE (0 << 31)
-# define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_BUSY (1 << 31)
-
-#define R300_ZB_BW_CNTL 0x4f1c
-# define R300_HIZ_DISABLE (0 << 0)
-# define R300_HIZ_ENABLE (1 << 0)
-# define R300_HIZ_MIN (0 << 1)
-# define R300_HIZ_MAX (1 << 1)
-# define R300_FAST_FILL_DISABLE (0 << 2)
-# define R300_FAST_FILL_ENABLE (1 << 2)
-# define R300_RD_COMP_DISABLE (0 << 3)
-# define R300_RD_COMP_ENABLE (1 << 3)
-# define R300_WR_COMP_DISABLE (0 << 4)
-# define R300_WR_COMP_ENABLE (1 << 4)
-# define R300_ZB_CB_CLEAR_RMW (0 << 5)
-# define R300_ZB_CB_CLEAR_CACHE_LINEAR (1 << 5)
-# define R300_FORCE_COMPRESSED_STENCIL_VALUE_DISABLE (0 << 6)
-# define R300_FORCE_COMPRESSED_STENCIL_VALUE_ENABLE (1 << 6)
-
-# define R500_ZEQUAL_OPTIMIZE_ENABLE (0 << 7)
-# define R500_ZEQUAL_OPTIMIZE_DISABLE (1 << 7)
-# define R500_SEQUAL_OPTIMIZE_ENABLE (0 << 8)
-# define R500_SEQUAL_OPTIMIZE_DISABLE (1 << 8)
-
-# define R500_BMASK_ENABLE (0 << 10)
-# define R500_BMASK_DISABLE (1 << 10)
-# define R500_HIZ_EQUAL_REJECT_DISABLE (0 << 11)
-# define R500_HIZ_EQUAL_REJECT_ENABLE (1 << 11)
-# define R500_HIZ_FP_EXP_BITS_DISABLE (0 << 12)
-# define R500_HIZ_FP_EXP_BITS_1 (1 << 12)
-# define R500_HIZ_FP_EXP_BITS_2 (2 << 12)
-# define R500_HIZ_FP_EXP_BITS_3 (3 << 12)
-# define R500_HIZ_FP_EXP_BITS_4 (4 << 12)
-# define R500_HIZ_FP_EXP_BITS_5 (5 << 12)
-# define R500_HIZ_FP_INVERT_LEADING_ONES (0 << 15)
-# define R500_HIZ_FP_INVERT_LEADING_ZEROS (1 << 15)
-# define R500_TILE_OVERWRITE_RECOMPRESSION_ENABLE (0 << 16)
-# define R500_TILE_OVERWRITE_RECOMPRESSION_DISABLE (1 << 16)
-# define R500_CONTIGUOUS_6XAA_SAMPLES_ENABLE (0 << 17)
-# define R500_CONTIGUOUS_6XAA_SAMPLES_DISABLE (1 << 17)
-# define R500_PEQ_PACKING_DISABLE (0 << 18)
-# define R500_PEQ_PACKING_ENABLE (1 << 18)
-# define R500_COVERED_PTR_MASKING_DISABLE (0 << 18)
-# define R500_COVERED_PTR_MASKING_ENABLE (1 << 18)
-
-
-/* gap */
-
-/* Z Buffer Address Offset.
- * Bits 31 to 5 are used for aligned Z buffer address offset for macro tiles.
- */
-#define R300_ZB_DEPTHOFFSET 0x4f20
-
-/* Z Buffer Pitch and Endian Control */
-#define R300_ZB_DEPTHPITCH 0x4f24
-# define R300_DEPTHPITCH_MASK 0x00003FFC
-# define R300_DEPTHMACROTILE_DISABLE (0 << 16)
-# define R300_DEPTHMACROTILE_ENABLE (1 << 16)
-# define R300_DEPTHMICROTILE_LINEAR (0 << 17)
-# define R300_DEPTHMICROTILE_TILED (1 << 17)
-# define R300_DEPTHMICROTILE_TILED_SQUARE (2 << 17)
-# define R300_DEPTHENDIAN_NO_SWAP (0 << 18)
-# define R300_DEPTHENDIAN_WORD_SWAP (1 << 18)
-# define R300_DEPTHENDIAN_DWORD_SWAP (2 << 18)
-# define R300_DEPTHENDIAN_HALF_DWORD_SWAP (3 << 18)
-
-/* Z Buffer Clear Value */
-#define R300_ZB_DEPTHCLEARVALUE 0x4f28
-
-#define R300_ZB_ZMASK_OFFSET 0x4f30
-#define R300_ZB_ZMASK_PITCH 0x4f34
-#define R300_ZB_ZMASK_WRINDEX 0x4f38
-#define R300_ZB_ZMASK_DWORD 0x4f3c
-#define R300_ZB_ZMASK_RDINDEX 0x4f40
-
-/* Hierarchical Z Memory Offset */
-#define R300_ZB_HIZ_OFFSET 0x4f44
-
-/* Hierarchical Z Write Index */
-#define R300_ZB_HIZ_WRINDEX 0x4f48
-
-/* Hierarchical Z Data */
-#define R300_ZB_HIZ_DWORD 0x4f4c
-
-/* Hierarchical Z Read Index */
-#define R300_ZB_HIZ_RDINDEX 0x4f50
-
-/* Hierarchical Z Pitch */
-#define R300_ZB_HIZ_PITCH 0x4f54
-
-/* Z Buffer Z Pass Counter Data */
-#define R300_ZB_ZPASS_DATA 0x4f58
-
-/* Z Buffer Z Pass Counter Address */
-#define R300_ZB_ZPASS_ADDR 0x4f5c
-
-/* Depth buffer X and Y coordinate offset */
-#define R300_ZB_DEPTHXY_OFFSET 0x4f60
-# define R300_DEPTHX_OFFSET_SHIFT 1
-# define R300_DEPTHX_OFFSET_MASK 0x000007FE
-# define R300_DEPTHY_OFFSET_SHIFT 17
-# define R300_DEPTHY_OFFSET_MASK 0x07FE0000
-
-/* Sets the fifo sizes */
-#define R500_ZB_FIFO_SIZE 0x4fd0
-# define R500_OP_FIFO_SIZE_FULL (0 << 0)
-# define R500_OP_FIFO_SIZE_HALF (1 << 0)
-# define R500_OP_FIFO_SIZE_QUATER (2 << 0)
-# define R500_OP_FIFO_SIZE_EIGTHS (4 << 0)
-
-/* Stencil Reference Value and Mask for backfacing quads */
-/* R300_ZB_STENCILREFMASK handles front face */
-#define R500_ZB_STENCILREFMASK_BF 0x4fd4
-# define R500_STENCILREF_SHIFT 0
-# define R500_STENCILREF_MASK 0x000000ff
-# define R500_STENCILMASK_SHIFT 8
-# define R500_STENCILMASK_MASK 0x0000ff00
-# define R500_STENCILWRITEMASK_SHIFT 16
-# define R500_STENCILWRITEMASK_MASK 0x00ff0000
-
-/* BEGIN: Vertex program instruction set */
-
-/* Every instruction is four dwords long:
- * DWORD 0: output and opcode
- * DWORD 1: first argument
- * DWORD 2: second argument
- * DWORD 3: third argument
- *
- * Notes:
- * - ABS r, a is implemented as MAX r, a, -a
- * - MOV is implemented as ADD to zero
- * - XPD is implemented as MUL + MAD
- * - FLR is implemented as FRC + ADD
- * - apparently, fglrx tries to schedule instructions so that there is at
- * least one instruction between the write to a temporary and the first
- * read from said temporary; however, violations of this scheduling are
- * allowed
- * - register indices seem to be unrelated with OpenGL aliasing to
- * conventional state
- * - only one attribute and one parameter can be loaded at a time; however,
- * the same attribute/parameter can be used for more than one argument
- * - the second software argument for POW is the third hardware argument
- * (no idea why)
- * - MAD with only temporaries as input seems to use VPI_OUT_SELECT_MAD_2
- *
- * There is some magic surrounding LIT:
- * The single argument is replicated across all three inputs, but swizzled:
- * First argument: xyzy
- * Second argument: xyzx
- * Third argument: xyzw
- * Whenever the result is used later in the fragment program, fglrx forces
- * x and w to be 1.0 in the input selection; I don't know whether this is
- * strictly necessary
- */
-#define R300_VPI_OUT_OP_DOT (1 << 0)
-#define R300_VPI_OUT_OP_MUL (2 << 0)
-#define R300_VPI_OUT_OP_ADD (3 << 0)
-#define R300_VPI_OUT_OP_MAD (4 << 0)
-#define R300_VPI_OUT_OP_DST (5 << 0)
-#define R300_VPI_OUT_OP_FRC (6 << 0)
-#define R300_VPI_OUT_OP_MAX (7 << 0)
-#define R300_VPI_OUT_OP_MIN (8 << 0)
-#define R300_VPI_OUT_OP_SGE (9 << 0)
-#define R300_VPI_OUT_OP_SLT (10 << 0)
- /* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, vector(scalar, vector) */
-#define R300_VPI_OUT_OP_UNK12 (12 << 0)
-#define R300_VPI_OUT_OP_ARL (13 << 0)
-#define R300_VPI_OUT_OP_EXP (65 << 0)
-#define R300_VPI_OUT_OP_LOG (66 << 0)
- /* Used in fog computations, scalar(scalar) */
-#define R300_VPI_OUT_OP_UNK67 (67 << 0)
-#define R300_VPI_OUT_OP_LIT (68 << 0)
-#define R300_VPI_OUT_OP_POW (69 << 0)
-#define R300_VPI_OUT_OP_RCP (70 << 0)
-#define R300_VPI_OUT_OP_RSQ (72 << 0)
- /* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, scalar(scalar) */
-#define R300_VPI_OUT_OP_UNK73 (73 << 0)
-#define R300_VPI_OUT_OP_EX2 (75 << 0)
-#define R300_VPI_OUT_OP_LG2 (76 << 0)
-#define R300_VPI_OUT_OP_MAD_2 (128 << 0)
- /* all temps, vector(scalar, vector, vector) */
-#define R300_VPI_OUT_OP_UNK129 (129 << 0)
-
-#define R300_VPI_OUT_REG_CLASS_TEMPORARY (0 << 8)
-#define R300_VPI_OUT_REG_CLASS_ADDR (1 << 8)
-#define R300_VPI_OUT_REG_CLASS_RESULT (2 << 8)
-#define R300_VPI_OUT_REG_CLASS_MASK (31 << 8)
-
-#define R300_VPI_OUT_REG_INDEX_SHIFT 13
- /* GUESS based on fglrx native limits */
-#define R300_VPI_OUT_REG_INDEX_MASK (31 << 13)
-
-#define R300_VPI_OUT_WRITE_X (1 << 20)
-#define R300_VPI_OUT_WRITE_Y (1 << 21)
-#define R300_VPI_OUT_WRITE_Z (1 << 22)
-#define R300_VPI_OUT_WRITE_W (1 << 23)
-
-#define R300_VPI_IN_REG_CLASS_TEMPORARY (0 << 0)
-#define R300_VPI_IN_REG_CLASS_ATTRIBUTE (1 << 0)
-#define R300_VPI_IN_REG_CLASS_PARAMETER (2 << 0)
-#define R300_VPI_IN_REG_CLASS_NONE (9 << 0)
-#define R300_VPI_IN_REG_CLASS_MASK (31 << 0)
-
-#define R300_VPI_IN_REG_INDEX_SHIFT 5
- /* GUESS based on fglrx native limits */
-#define R300_VPI_IN_REG_INDEX_MASK (255 << 5)
-
-/* The R300 can select components from the input register arbitrarily.
- * Use the following constants, shifted by the component shift you
- * want to select
- */
-#define R300_VPI_IN_SELECT_X 0
-#define R300_VPI_IN_SELECT_Y 1
-#define R300_VPI_IN_SELECT_Z 2
-#define R300_VPI_IN_SELECT_W 3
-#define R300_VPI_IN_SELECT_ZERO 4
-#define R300_VPI_IN_SELECT_ONE 5
-#define R300_VPI_IN_SELECT_MASK 7
-
-#define R300_VPI_IN_X_SHIFT 13
-#define R300_VPI_IN_Y_SHIFT 16
-#define R300_VPI_IN_Z_SHIFT 19
-#define R300_VPI_IN_W_SHIFT 22
-
-#define R300_VPI_IN_NEG_X (1 << 25)
-#define R300_VPI_IN_NEG_Y (1 << 26)
-#define R300_VPI_IN_NEG_Z (1 << 27)
-#define R300_VPI_IN_NEG_W (1 << 28)
-/* END: Vertex program instruction set */
-
-/* BEGIN: Packet 3 commands */
-
-/* A primitive emission dword. */
-#define R300_PRIM_TYPE_NONE (0 << 0)
-#define R300_PRIM_TYPE_POINT (1 << 0)
-#define R300_PRIM_TYPE_LINE (2 << 0)
-#define R300_PRIM_TYPE_LINE_STRIP (3 << 0)
-#define R300_PRIM_TYPE_TRI_LIST (4 << 0)
-#define R300_PRIM_TYPE_TRI_FAN (5 << 0)
-#define R300_PRIM_TYPE_TRI_STRIP (6 << 0)
-#define R300_PRIM_TYPE_TRI_TYPE2 (7 << 0)
-#define R300_PRIM_TYPE_RECT_LIST (8 << 0)
-#define R300_PRIM_TYPE_3VRT_POINT_LIST (9 << 0)
-#define R300_PRIM_TYPE_3VRT_LINE_LIST (10 << 0)
- /* GUESS (based on r200) */
-#define R300_PRIM_TYPE_POINT_SPRITES (11 << 0)
-#define R300_PRIM_TYPE_LINE_LOOP (12 << 0)
-#define R300_PRIM_TYPE_QUADS (13 << 0)
-#define R300_PRIM_TYPE_QUAD_STRIP (14 << 0)
-#define R300_PRIM_TYPE_POLYGON (15 << 0)
-#define R300_PRIM_TYPE_MASK 0xF
-#define R300_PRIM_WALK_IND (1 << 4)
-#define R300_PRIM_WALK_LIST (2 << 4)
-#define R300_PRIM_WALK_RING (3 << 4)
-#define R300_PRIM_WALK_MASK (3 << 4)
- /* GUESS (based on r200) */
-#define R300_PRIM_COLOR_ORDER_BGRA (0 << 6)
-#define R300_PRIM_COLOR_ORDER_RGBA (1 << 6)
-#define R300_PRIM_NUM_VERTICES_SHIFT 16
-#define R300_PRIM_NUM_VERTICES_MASK 0xffff
-
-/* Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR.
- * Two parameter dwords:
- * 0. The first parameter appears to be always 0
- * 1. The second parameter is a standard primitive emission dword.
- */
-#define R300_PACKET3_3D_DRAW_VBUF 0x00002800
-
-/* Specify the full set of vertex arrays as (address, stride).
- * The first parameter is the number of vertex arrays specified.
- * The rest of the command is a variable length list of blocks, where
- * each block is three dwords long and specifies two arrays.
- * The first dword of a block is split into two words, the lower significant
- * word refers to the first array, the more significant word to the second
- * array in the block.
- * The low byte of each word contains the size of an array entry in dwords,
- * the high byte contains the stride of the array.
- * The second dword of a block contains the pointer to the first array,
- * the third dword of a block contains the pointer to the second array.
- * Note that if the total number of arrays is odd, the third dword of
- * the last block is omitted.
- */
-#define R300_PACKET3_3D_LOAD_VBPNTR 0x00002F00
-
-#define R300_PACKET3_INDX_BUFFER 0x00003300
-# define R300_EB_UNK1_SHIFT 24
-# define R300_EB_UNK1 (0x80<<24)
-# define R300_EB_UNK2 0x0810
-#define R300_PACKET3_3D_DRAW_VBUF_2 0x00003400
-#define R300_PACKET3_3D_DRAW_INDX_2 0x00003600
-
-/* END: Packet 3 commands */
-
-
-/* Color formats for 2d packets
- */
-#define R300_CP_COLOR_FORMAT_CI8 2
-#define R300_CP_COLOR_FORMAT_ARGB1555 3
-#define R300_CP_COLOR_FORMAT_RGB565 4
-#define R300_CP_COLOR_FORMAT_ARGB8888 6
-#define R300_CP_COLOR_FORMAT_RGB332 7
-#define R300_CP_COLOR_FORMAT_RGB8 9
-#define R300_CP_COLOR_FORMAT_ARGB4444 15
-
-/*
- * CP type-3 packets
- */
-#define R300_CP_CMD_BITBLT_MULTI 0xC0009B00
-
-#define R500_VAP_INDEX_OFFSET 0x208c
-
-#define R500_GA_US_VECTOR_INDEX 0x4250
-#define R500_GA_US_VECTOR_DATA 0x4254
-
-#define R500_RS_IP_0 0x4074
-#define R500_RS_INST_0 0x4320
-
-#define R500_US_CONFIG 0x4600
-
-#define R500_US_FC_CTRL 0x4624
-#define R500_US_CODE_ADDR 0x4630
-
-#define R500_RB3D_COLOR_CLEAR_VALUE_AR 0x46c0
-#define R500_RB3D_CONSTANT_COLOR_AR 0x4ef8
-
-#endif /* _R300_REG_H */
-
-/* *INDENT-ON* */
+++ /dev/null
-/*
- * Copyright 2007 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/* this file is not used we just have it as a placeholder for future R600
- work */
-#if 0
-static const int ME_JUMP_TABLE_START = 1764;
-static const int ME_JUMP_TABLE_END = 1792;
-
-static const u32 R600_cp_microcode[][3]={
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0000ffff, 0x00284621, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00000000, 0x00e00000, 0x000 },
- { 0x00010000, 0xc0294620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x614 },
- { 0x00000000, 0x00600000, 0x5b2 },
- { 0x00000000, 0x00600000, 0x5c5 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000f00, 0x00281622, 0x000 },
- { 0x00000008, 0x00211625, 0x000 },
- { 0x00000020, 0x00203625, 0x000 },
- { 0x8d000000, 0x00204411, 0x000 },
- { 0x00000004, 0x002f0225, 0x000 },
- { 0x00000000, 0x0ce00000, 0x018 },
- { 0x00412000, 0x00404811, 0x019 },
- { 0x00422000, 0x00204811, 0x000 },
- { 0x8e000000, 0x00204411, 0x000 },
- { 0x00000031, 0x00204a2d, 0x000 },
- { 0x90000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x0000000c, 0x00211622, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000019, 0x00211a22, 0x000 },
- { 0x00000004, 0x00281a26, 0x000 },
- { 0x00000000, 0x002914c5, 0x000 },
- { 0x00000021, 0x00203625, 0x000 },
- { 0x00000000, 0x003a1402, 0x000 },
- { 0x00000016, 0x00211625, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x0000001d, 0x00200e2d, 0x000 },
- { 0xfffffffc, 0x00280e23, 0x000 },
- { 0x00000000, 0x002914a3, 0x000 },
- { 0x0000001d, 0x00203625, 0x000 },
- { 0x00008000, 0x00280e22, 0x000 },
- { 0x00000007, 0x00220e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x20000000, 0x00280e22, 0x000 },
- { 0x00000006, 0x00210e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x00000000, 0x00220222, 0x000 },
- { 0x00000000, 0x14e00000, 0x038 },
- { 0x00000000, 0x2ee00000, 0x035 },
- { 0x00000000, 0x2ce00000, 0x037 },
- { 0x00000000, 0x00400e2d, 0x039 },
- { 0x00000008, 0x00200e2d, 0x000 },
- { 0x00000009, 0x0040122d, 0x046 },
- { 0x00000001, 0x00400e2d, 0x039 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x03e },
- { 0x00000008, 0x00401c11, 0x041 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x0000000f, 0x00281e27, 0x000 },
- { 0x00000003, 0x00221e27, 0x000 },
- { 0x7fc00000, 0x00281a23, 0x000 },
- { 0x00000014, 0x00211a26, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000008, 0x00221a26, 0x000 },
- { 0x00000000, 0x00290cc7, 0x000 },
- { 0x00000030, 0x00203624, 0x000 },
- { 0x00007f00, 0x00281221, 0x000 },
- { 0x00001400, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x04b },
- { 0x00000001, 0x00290e23, 0x000 },
- { 0x00000010, 0x00203623, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfff80000, 0x00294a23, 0x000 },
- { 0x00000000, 0x003a2c02, 0x000 },
- { 0x00000002, 0x00220e2b, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x00000011, 0x00203623, 0x000 },
- { 0x00001fff, 0x00294a23, 0x000 },
- { 0x00000030, 0x00204a2d, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000032, 0x00200e2d, 0x000 },
- { 0x060a0200, 0x00294a23, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14e00000, 0x061 },
- { 0x00000000, 0x2ee00000, 0x05f },
- { 0x00000000, 0x2ce00000, 0x05e },
- { 0x00000000, 0x00400e2d, 0x062 },
- { 0x00000001, 0x00400e2d, 0x062 },
- { 0x0000000a, 0x00200e2d, 0x000 },
- { 0x0000000b, 0x0040122d, 0x06a },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x7fc00000, 0x00281623, 0x000 },
- { 0x00000014, 0x00211625, 0x000 },
- { 0x00000001, 0x00331625, 0x000 },
- { 0x80000000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00290ca3, 0x000 },
- { 0x3ffffc00, 0x00290e23, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x06d },
- { 0x00000100, 0x00401c11, 0x070 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x000000f0, 0x00281e27, 0x000 },
- { 0x00000004, 0x00221e27, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0xfffff0ff, 0x00281a30, 0x000 },
- { 0x0000a028, 0x00204411, 0x000 },
- { 0x00000000, 0x002948e6, 0x000 },
- { 0x0000a018, 0x00204411, 0x000 },
- { 0x3fffffff, 0x00284a23, 0x000 },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x0000002d, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a3, 0x000 },
- { 0x00000000, 0x0cc00000, 0x080 },
- { 0x0000002e, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a4, 0x000 },
- { 0x00000000, 0x0cc00000, 0x081 },
- { 0x00000000, 0x00400000, 0x087 },
- { 0x0000002d, 0x00203623, 0x000 },
- { 0x0000002e, 0x00203624, 0x000 },
- { 0x0000001d, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x087 },
- { 0x00000000, 0x00600000, 0x5ed },
- { 0x00000000, 0x00600000, 0x5e1 },
- { 0x00000002, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x08a },
- { 0x00000018, 0xc0403620, 0x090 },
- { 0x00000000, 0x2ee00000, 0x08e },
- { 0x00000000, 0x2ce00000, 0x08d },
- { 0x00000002, 0x00400e2d, 0x08f },
- { 0x00000003, 0x00400e2d, 0x08f },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000018, 0x00203623, 0x000 },
- { 0x00000003, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x095 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x09d },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x2ee00000, 0x09b },
- { 0x00000000, 0x2ce00000, 0x09a },
- { 0x00000002, 0x00400e2d, 0x09c },
- { 0x00000003, 0x00400e2d, 0x09c },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x003f0000, 0x00280e23, 0x000 },
- { 0x00000010, 0x00210e23, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x0000001e, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0a4 },
- { 0x0000001c, 0xc0203620, 0x000 },
- { 0x0000001f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0a7 },
- { 0x0000001b, 0xc0203620, 0x000 },
- { 0x00000008, 0x00210e2b, 0x000 },
- { 0x0000007f, 0x00280e23, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0db },
- { 0x00000000, 0x27000000, 0x000 },
- { 0x00000000, 0x00600000, 0x28c },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x0000000c, 0x00221e30, 0x000 },
- { 0x99800000, 0x00204411, 0x000 },
- { 0x00000004, 0x0020122d, 0x000 },
- { 0x00000008, 0x00221224, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00291ce4, 0x000 },
- { 0x00000000, 0x00604807, 0x128 },
- { 0x9b000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x9c000000, 0x00204411, 0x000 },
- { 0x00000000, 0x0033146f, 0x000 },
- { 0x00000001, 0x00333e23, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0x00203c05, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e007, 0x00204411, 0x000 },
- { 0x0000000f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0c5 },
- { 0x00f8ff08, 0x00204811, 0x000 },
- { 0x98000000, 0x00404811, 0x0d6 },
- { 0x000000f0, 0x00280e22, 0x000 },
- { 0x000000a0, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x0d4 },
- { 0x00000013, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0cf },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0ce },
- { 0x00003f00, 0x00400c11, 0x0d0 },
- { 0x00001f00, 0x00400c11, 0x0d0 },
- { 0x00000f00, 0x00200c11, 0x000 },
- { 0x00380009, 0x00294a23, 0x000 },
- { 0x3f000000, 0x00280e2b, 0x000 },
- { 0x00000002, 0x00220e23, 0x000 },
- { 0x00000007, 0x00494a23, 0x0d6 },
- { 0x00380f09, 0x00204811, 0x000 },
- { 0x68000007, 0x00204811, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000a202, 0x00204411, 0x000 },
- { 0x00ff0000, 0x00284a22, 0x000 },
- { 0x00000030, 0x00200e2d, 0x000 },
- { 0x0000002e, 0x0020122d, 0x000 },
- { 0x00000000, 0x002f0083, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0e3 },
- { 0x00000000, 0x00600000, 0x5e7 },
- { 0x00000000, 0x00400000, 0x0e4 },
- { 0x00000000, 0x00600000, 0x5ea },
- { 0x00000007, 0x0020222d, 0x000 },
- { 0x00000005, 0x00220e22, 0x000 },
- { 0x00100000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x000000ef, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x0000001d, 0x00200e2d, 0x000 },
- { 0x00000003, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x0f1 },
- { 0x0000000b, 0x00210228, 0x000 },
- { 0x00000000, 0x14c00000, 0x0f1 },
- { 0x00000400, 0x00292228, 0x000 },
- { 0x0000001a, 0x00203628, 0x000 },
- { 0x0000001c, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x0f6 },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000001e, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x104 },
- { 0x0000a30f, 0x00204411, 0x000 },
- { 0x00000013, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x0fd },
- { 0xffffffff, 0x00404811, 0x104 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x100 },
- { 0x0000ffff, 0x00404811, 0x104 },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x103 },
- { 0x000000ff, 0x00404811, 0x104 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0002c400, 0x00204411, 0x000 },
- { 0x0000001f, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x10b },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x00000019, 0x00203623, 0x000 },
- { 0x00000018, 0x40224a20, 0x000 },
- { 0x00000010, 0xc0424a20, 0x10d },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000019, 0x00203623, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000000a, 0x00201011, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x114 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00531224, 0x110 },
- { 0xffbfffff, 0x00283a2e, 0x000 },
- { 0x0000001b, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x127 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0x00000018, 0x00220e30, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e00e, 0x00204411, 0x000 },
- { 0x07f8ff08, 0x00204811, 0x000 },
- { 0x00000000, 0x00294a23, 0x000 },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x00800000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204806, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x614 },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x613 },
- { 0x00000004, 0x00404c11, 0x12e },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x2fe },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x19f },
- { 0x00000000, 0x00600000, 0x151 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40280620, 0x000 },
- { 0x00000010, 0xc0210a20, 0x000 },
- { 0x00000000, 0x00341461, 0x000 },
- { 0x00000000, 0x00741882, 0x2a4 },
- { 0x0001a1fd, 0x00604411, 0x2c9 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x138 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x2fe },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x19f },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x151 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0681a20, 0x2a4 },
- { 0x0001a1fd, 0x00604411, 0x2c9 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x149 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000001, 0x00300a2f, 0x000 },
- { 0x00000001, 0x00210a22, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600000, 0x17c },
- { 0x00000000, 0x00600000, 0x18d },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00202c08, 0x000 },
- { 0x00000000, 0x00202411, 0x000 },
- { 0x00000000, 0x00202811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000002, 0x00221e29, 0x000 },
- { 0x00000000, 0x007048eb, 0x189 },
- { 0x00000000, 0x00600000, 0x2a4 },
- { 0x00000001, 0x40330620, 0x000 },
- { 0x00000000, 0xc0302409, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x28c },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x173 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000001, 0x00530621, 0x16f },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0604800, 0x184 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000013, 0x0020062d, 0x000 },
- { 0x00000000, 0x0078042a, 0x2e4 },
- { 0x00000000, 0x00202809, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x165 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000210, 0x00600411, 0x2fe },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x181 },
- { 0x0000001b, 0xc0203620, 0x000 },
- { 0x0000001c, 0xc0203620, 0x000 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x46000000, 0x00600811, 0x19f },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x188 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00804811, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40281620, 0x000 },
- { 0x00000010, 0xc0811a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000008, 0x00221e30, 0x000 },
- { 0x00000032, 0x00201a2d, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfffbff09, 0x00204811, 0x000 },
- { 0x00000011, 0x0020222d, 0x000 },
- { 0x00001fff, 0x00294a28, 0x000 },
- { 0x00000006, 0x0020222d, 0x000 },
- { 0x00000000, 0x002920e8, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000100, 0x00201811, 0x000 },
- { 0x00000008, 0x00621e28, 0x128 },
- { 0x00000008, 0x00822228, 0x000 },
- { 0x0002c000, 0x00204411, 0x000 },
- { 0x0000001b, 0x00600e2d, 0x1aa },
- { 0x0000001c, 0x00600e2d, 0x1aa },
- { 0x0000c008, 0x00204411, 0x000 },
- { 0x0000001d, 0x00200e2d, 0x000 },
- { 0x00000000, 0x14c00000, 0x1a6 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x39000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00804802, 0x000 },
- { 0x00000020, 0x00202e2d, 0x000 },
- { 0x00000000, 0x003b0d63, 0x000 },
- { 0x00000008, 0x00224a23, 0x000 },
- { 0x00000010, 0x00224a23, 0x000 },
- { 0x00000018, 0x00224a23, 0x000 },
- { 0x00000000, 0x00804803, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x2fe },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x19f },
- { 0x00000007, 0x0021062f, 0x000 },
- { 0x00000019, 0x00200a2d, 0x000 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000ffff, 0x40282220, 0x000 },
- { 0x0000000f, 0x00262228, 0x000 },
- { 0x00000010, 0x40212620, 0x000 },
- { 0x0000000f, 0x00262629, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1cd },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000081, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000080, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1c9 },
- { 0x00000000, 0x00600000, 0x1d6 },
- { 0x00000001, 0x00531e27, 0x1c5 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000001f, 0x00280a22, 0x000 },
- { 0x0000001f, 0x00282a2a, 0x000 },
- { 0x00000001, 0x00530621, 0x1be },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000002, 0x00304a2f, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000001, 0x00301e2f, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x1d6 },
- { 0x00000001, 0x00531e27, 0x1d2 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x0000000f, 0x00260e23, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000000f, 0x00261224, 0x000 },
- { 0x00000000, 0x00201411, 0x000 },
- { 0x00000000, 0x00601811, 0x2a4 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022b, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1e5 },
- { 0x00000010, 0x00221628, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a29, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x0020480a, 0x000 },
- { 0x00000000, 0x00202c11, 0x000 },
- { 0x00000010, 0x00221623, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a24, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x00731503, 0x1f2 },
- { 0x00000000, 0x00201805, 0x000 },
- { 0x00000000, 0x00731524, 0x1f2 },
- { 0x00000000, 0x002d14c5, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00000000, 0x00202003, 0x000 },
- { 0x00000000, 0x00802404, 0x000 },
- { 0x0000000f, 0x00210225, 0x000 },
- { 0x00000000, 0x14c00000, 0x613 },
- { 0x00000000, 0x002b1405, 0x000 },
- { 0x00000001, 0x00901625, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x2fe },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x19f },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00294a22, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a21, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000ffff, 0x40281220, 0x000 },
- { 0x00000010, 0xc0211a20, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211620, 0x000 },
- { 0x00000000, 0x00741465, 0x2a4 },
- { 0x0001a1fd, 0x00604411, 0x2c9 },
- { 0x00000001, 0x00330621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0cc00000, 0x206 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x1ff },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x5c5 },
- { 0x00000000, 0x0040040f, 0x200 },
- { 0x00000000, 0x00600000, 0x5b2 },
- { 0x00000000, 0x00600000, 0x5c5 },
- { 0x00000210, 0x00600411, 0x2fe },
- { 0x00000000, 0x00600000, 0x18d },
- { 0x00000000, 0x00600000, 0x189 },
- { 0x00000000, 0x00600000, 0x2a4 },
- { 0x00000000, 0x00600000, 0x28c },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x21f },
- { 0x00000000, 0xc0404800, 0x21c },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x00600411, 0x2e4 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x5b2 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000018, 0x40210a20, 0x000 },
- { 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x235 },
- { 0x0000001a, 0x0020222d, 0x000 },
- { 0x00080101, 0x00292228, 0x000 },
- { 0x0000001a, 0x00203628, 0x000 },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x23a },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000010, 0x00600411, 0x2fe },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x19f },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00000000, 0x00600000, 0x265 },
- { 0x0000001d, 0x00201e2d, 0x000 },
- { 0x00000001, 0x00211e27, 0x000 },
- { 0x00000000, 0x14e00000, 0x253 },
- { 0x00000018, 0x00201e2d, 0x000 },
- { 0x0000ffff, 0x00281e27, 0x000 },
- { 0x00000000, 0x00341c27, 0x000 },
- { 0x00000000, 0x12c00000, 0x248 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e5, 0x000 },
- { 0x00000000, 0x08c00000, 0x24b },
- { 0x00000000, 0x00201407, 0x000 },
- { 0x00000018, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00211e27, 0x000 },
- { 0x00000000, 0x00341c47, 0x000 },
- { 0x00000000, 0x12c00000, 0x250 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x08c00000, 0x253 },
- { 0x00000000, 0x00201807, 0x000 },
- { 0x00000000, 0x00600000, 0x2aa },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000000, 0x00342023, 0x000 },
- { 0x00000000, 0x12c00000, 0x25b },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x25a },
- { 0x00000016, 0x00404811, 0x25f },
- { 0x00000018, 0x00404811, 0x25f },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x25e },
- { 0x00000017, 0x00404811, 0x25f },
- { 0x00000019, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00604411, 0x2d2 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x23f },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000010, 0x40210620, 0x000 },
- { 0x0000ffff, 0xc0280a20, 0x000 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0881a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x614 },
- { 0x00000000, 0x00600000, 0x5b2 },
- { 0x00000000, 0xc0600000, 0x28c },
- { 0x00000005, 0x00200a2d, 0x000 },
- { 0x00000008, 0x00220a22, 0x000 },
- { 0x00000034, 0x00201a2d, 0x000 },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00007000, 0x00281e27, 0x000 },
- { 0x00000000, 0x00311ce6, 0x000 },
- { 0x00000033, 0x00201a2d, 0x000 },
- { 0x0000000c, 0x00221a26, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x06e00000, 0x27b },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000034, 0x00203623, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00691ce2, 0x128 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x286 },
- { 0x00000001, 0x00333e2f, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000024, 0x00403627, 0x000 },
- { 0x0000000c, 0xc0220a20, 0x000 },
- { 0x00000032, 0x00203622, 0x000 },
- { 0x00000031, 0xc0403620, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000009, 0x00204811, 0x000 },
- { 0xa1000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000029, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce3, 0x000 },
- { 0x00000029, 0x00203627, 0x000 },
- { 0x0000002a, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce4, 0x000 },
- { 0x0000002a, 0x00203627, 0x000 },
- { 0x0000002b, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a3, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x0000002b, 0x00203627, 0x000 },
- { 0x0000002c, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x0000002c, 0x00803627, 0x000 },
- { 0x00000029, 0x00203623, 0x000 },
- { 0x0000002a, 0x00203624, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x0000002b, 0x00203627, 0x000 },
- { 0x00000000, 0x00311cc4, 0x000 },
- { 0x0000002c, 0x00803627, 0x000 },
- { 0x00000022, 0x00203627, 0x000 },
- { 0x00000023, 0x00203628, 0x000 },
- { 0x0000001d, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14c00000, 0x2c5 },
- { 0x00000000, 0x00400000, 0x2c2 },
- { 0x00000022, 0x00203627, 0x000 },
- { 0x00000023, 0x00203628, 0x000 },
- { 0x0000001d, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2c2 },
- { 0x00000003, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2c5 },
- { 0x0000002b, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e1, 0x000 },
- { 0x00000000, 0x02c00000, 0x2c5 },
- { 0x00000029, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a1, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2c5 },
- { 0x0000002c, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e2, 0x000 },
- { 0x00000000, 0x02c00000, 0x2c5 },
- { 0x0000002a, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2c5 },
- { 0x00000000, 0x00600000, 0x5ed },
- { 0x00000000, 0x00600000, 0x29e },
- { 0x00000000, 0x00400000, 0x2c7 },
- { 0x00000000, 0x00600000, 0x29e },
- { 0x00000000, 0x00600000, 0x5e4 },
- { 0x00000000, 0x00400000, 0x2c7 },
- { 0x00000000, 0x00600000, 0x290 },
- { 0x00000000, 0x00400000, 0x2c7 },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000023, 0x0080222d, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca1, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x003808c5, 0x000 },
- { 0x00000000, 0x00300841, 0x000 },
- { 0x00000001, 0x00220a22, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x0000001d, 0x0020222d, 0x000 },
- { 0x00000000, 0x14c00000, 0x301 },
- { 0xffffffef, 0x00280621, 0x000 },
- { 0x0000001a, 0x0020222d, 0x000 },
- { 0x0000f8e0, 0x00204411, 0x000 },
- { 0x00000000, 0x00294901, 0x000 },
- { 0x00000000, 0x00894901, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00804811, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x97000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00002257, 0x00204411, 0x000 },
- { 0x00000003, 0xc0484a20, 0x000 },
- { 0x0000225d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x5c5 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x00000001, 0x40304a20, 0x000 },
- { 0x00000002, 0xc0304a20, 0x000 },
- { 0x00000001, 0x00530a22, 0x334 },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000017, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x614 },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x33d },
- { 0x00000014, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x351 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000016, 0x00604811, 0x35e },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x355 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00404811, 0x349 },
- { 0x00000028, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x349 },
- { 0x00002104, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x00000035, 0x00203626, 0x000 },
- { 0x00000049, 0x00201811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0cc00000, 0x360 },
- { 0x00000035, 0x00801a2d, 0x000 },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x00000015, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x376 },
- { 0x0000001e, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x380 },
- { 0x00000020, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x38c },
- { 0x0000000f, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x398 },
- { 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x398 },
- { 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x39a },
- { 0x00000016, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x39f },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x08000000, 0x00290a22, 0x000 },
- { 0x00000003, 0x40210e20, 0x000 },
- { 0x0000000c, 0xc0211220, 0x000 },
- { 0x00080000, 0x00281224, 0x000 },
- { 0x00000014, 0xc0221620, 0x000 },
- { 0x00000000, 0x002914a4, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x002948a2, 0x000 },
- { 0x0000a1fe, 0x00204411, 0x000 },
- { 0x00000000, 0x00404803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000015, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x614 },
- { 0x00000015, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x382 },
- { 0x0000210e, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x614 },
- { 0x00000003, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x38e },
- { 0x00002108, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00404811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000006, 0x00404811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000016, 0x00604811, 0x35e },
- { 0x00000016, 0x00404811, 0x000 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x0000001d, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x3b9 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000017, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x614 },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x3ab },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0xbabecafe, 0x00204811, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000004, 0x00404811, 0x000 },
- { 0x00002170, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000a, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x3be },
- { 0x8c000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00003fff, 0x40280a20, 0x000 },
- { 0x80000000, 0x40280e20, 0x000 },
- { 0x40000000, 0xc0281220, 0x000 },
- { 0x00040000, 0x00694622, 0x614 },
- { 0x00000000, 0x00201410, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x3cc },
- { 0x00000000, 0xc0401800, 0x3cf },
- { 0x00003fff, 0xc0281a20, 0x000 },
- { 0x00040000, 0x00694626, 0x614 },
- { 0x00000000, 0x00201810, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x3d2 },
- { 0x00000000, 0xc0401c00, 0x3d5 },
- { 0x00003fff, 0xc0281e20, 0x000 },
- { 0x00040000, 0x00694627, 0x614 },
- { 0x00000000, 0x00201c10, 0x000 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0x002820c5, 0x000 },
- { 0x00000000, 0x004948e8, 0x000 },
- { 0xa5800000, 0x00200811, 0x000 },
- { 0x00002000, 0x00200c11, 0x000 },
- { 0x83000000, 0x00604411, 0x3fd },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x0000001f, 0xc0210220, 0x000 },
- { 0x00000000, 0x14c00000, 0x3e2 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0000ffff, 0xc0481220, 0x3ea },
- { 0xa7800000, 0x00200811, 0x000 },
- { 0x0000a000, 0x00200c11, 0x000 },
- { 0x83000000, 0x00604411, 0x3fd },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x83000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00304883, 0x000 },
- { 0x84000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1d000000, 0x000 },
- { 0x83000000, 0x00604411, 0x3fd },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0xa9800000, 0x00200811, 0x000 },
- { 0x0000c000, 0x00400c11, 0x3e5 },
- { 0xab800000, 0x00200811, 0x000 },
- { 0x0000f8e0, 0x00400c11, 0x3e5 },
- { 0xad800000, 0x00200811, 0x000 },
- { 0x0000f880, 0x00400c11, 0x3e5 },
- { 0xb3800000, 0x00200811, 0x000 },
- { 0x0000f3fc, 0x00400c11, 0x3e5 },
- { 0xaf800000, 0x00200811, 0x000 },
- { 0x0000e000, 0x00400c11, 0x3e5 },
- { 0xb1800000, 0x00200811, 0x000 },
- { 0x0000f000, 0x00400c11, 0x3e5 },
- { 0x83000000, 0x00204411, 0x000 },
- { 0x00002148, 0x00204811, 0x000 },
- { 0x84000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1d000000, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00182000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0018a000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0018c000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0018f8e0, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0018f880, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0018e000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0018f000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0018f3fc, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x86000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00404801, 0x000 },
- { 0x85000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00404801, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x614 },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000000, 0x00404c02, 0x42e },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x00000000, 0xc0201000, 0x000 },
- { 0x00000000, 0xc0201400, 0x000 },
- { 0x00000000, 0xc0201800, 0x000 },
- { 0x00000000, 0xc0201c00, 0x000 },
- { 0x00007f00, 0x00280a21, 0x000 },
- { 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x43c },
- { 0x00000000, 0xc0202000, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x00000010, 0x00280a23, 0x000 },
- { 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x444 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0x00694624, 0x614 },
- { 0x00000000, 0x00400000, 0x44d },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00000000, 0x1ac00000, 0x449 },
- { 0x9e000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x44c },
- { 0x00000000, 0x002824f0, 0x000 },
- { 0x00000007, 0x00280a23, 0x000 },
- { 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x454 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x04e00000, 0x46d },
- { 0x00000000, 0x00400000, 0x47a },
- { 0x00000002, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x459 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x02e00000, 0x46d },
- { 0x00000000, 0x00400000, 0x47a },
- { 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x45e },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x0ce00000, 0x46d },
- { 0x00000000, 0x00400000, 0x47a },
- { 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x463 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x0ae00000, 0x46d },
- { 0x00000000, 0x00400000, 0x47a },
- { 0x00000005, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x468 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x06e00000, 0x46d },
- { 0x00000000, 0x00400000, 0x47a },
- { 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x46d },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x08e00000, 0x46d },
- { 0x00000000, 0x00400000, 0x47a },
- { 0x00007f00, 0x00280a21, 0x000 },
- { 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x000 },
- { 0x00000008, 0x00210a23, 0x000 },
- { 0x00000000, 0x14c00000, 0x477 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x00000000, 0xc0204400, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00007f00, 0x00280a21, 0x000 },
- { 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x480 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0400000, 0x000 },
- { 0x00000000, 0x00404c08, 0x43c },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x00000011, 0x40211220, 0x000 },
- { 0x00000012, 0x40211620, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00210225, 0x000 },
- { 0x00000000, 0x14e00000, 0x48a },
- { 0x00040000, 0xc0494a20, 0x48b },
- { 0xfffbffff, 0xc0284a20, 0x000 },
- { 0x00000000, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x497 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x00210224, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000c, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x493 },
- { 0xa0000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000004, 0x00204811, 0x000 },
- { 0x0000216b, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204810, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000005, 0x00204811, 0x000 },
- { 0x0000216c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204810, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00400000, 0x491 },
- { 0x00000000, 0xc0210a20, 0x000 },
- { 0x00000000, 0x14c00000, 0x4ae },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1ac00000, 0x4a9 },
- { 0x9e000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x4ac },
- { 0x00000000, 0x00400000, 0x4b2 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0xc0294620, 0x000 },
- { 0x00000000, 0xc0600000, 0x614 },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x4b9 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x00000000, 0xc0204400, 0x000 },
- { 0x00000000, 0xc0404810, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x614 },
- { 0x00000000, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x4bb },
- { 0x00002180, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000003, 0x00333e2f, 0x000 },
- { 0x00000001, 0x00210221, 0x000 },
- { 0x00000000, 0x14e00000, 0x4eb },
- { 0x00000035, 0x00200a2d, 0x000 },
- { 0x00040000, 0x18e00c11, 0x4da },
- { 0x00000001, 0x00333e2f, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xd8c04800, 0x4ce },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000036, 0x0020122d, 0x000 },
- { 0x00000000, 0x00290c83, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000011, 0x00210224, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000000, 0x00400000, 0x491 },
- { 0x00000035, 0xc0203620, 0x000 },
- { 0x00000036, 0xc0403620, 0x000 },
- { 0x0000304a, 0x00204411, 0x000 },
- { 0xe0000000, 0xc0484a20, 0x000 },
- { 0x0000000f, 0x00210221, 0x000 },
- { 0x00000000, 0x14c00000, 0x4f2 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0xd9000000, 0x000 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000002, 0x00204811, 0x000 },
- { 0x000000ff, 0x00280e30, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x4f6 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0x14c00000, 0x50b },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000024, 0x00203623, 0x000 },
- { 0x00000034, 0x00203623, 0x000 },
- { 0x00000032, 0x00203623, 0x000 },
- { 0x00000031, 0x00203623, 0x000 },
- { 0x0000001d, 0x00203623, 0x000 },
- { 0x0000002d, 0x00203623, 0x000 },
- { 0x0000002e, 0x00203623, 0x000 },
- { 0x0000001b, 0x00203623, 0x000 },
- { 0x0000001c, 0x00203623, 0x000 },
- { 0xffffe000, 0x00200c11, 0x000 },
- { 0x00000029, 0x00203623, 0x000 },
- { 0x0000002a, 0x00203623, 0x000 },
- { 0x00001fff, 0x00200c11, 0x000 },
- { 0x0000002b, 0x00203623, 0x000 },
- { 0x0000002c, 0x00203623, 0x000 },
- { 0xf1ffffff, 0x00283a2e, 0x000 },
- { 0x0000001a, 0xc0220e20, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000033, 0x40203620, 0x000 },
- { 0x87000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1f4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x9d000000, 0x00204411, 0x000 },
- { 0x0000001f, 0x40214a20, 0x000 },
- { 0x96000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x00000000, 0xc0201000, 0x000 },
- { 0x0000001f, 0x00211624, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000025, 0x00203623, 0x000 },
- { 0x00000003, 0x00281e23, 0x000 },
- { 0x00000008, 0x00222223, 0x000 },
- { 0xfffff000, 0x00282228, 0x000 },
- { 0x00000000, 0x002920e8, 0x000 },
- { 0x00000027, 0x00203628, 0x000 },
- { 0x00000018, 0x00211e23, 0x000 },
- { 0x00000028, 0x00203627, 0x000 },
- { 0x00000002, 0x00221624, 0x000 },
- { 0x00000000, 0x003014a8, 0x000 },
- { 0x00000026, 0x00203625, 0x000 },
- { 0x00000003, 0x00211a24, 0x000 },
- { 0x10000000, 0x00281a26, 0x000 },
- { 0xefffffff, 0x00283a2e, 0x000 },
- { 0x00000000, 0x004938ce, 0x602 },
- { 0x00000001, 0x40280a20, 0x000 },
- { 0x00000006, 0x40280e20, 0x000 },
- { 0x00000300, 0xc0281220, 0x000 },
- { 0x00000008, 0x00211224, 0x000 },
- { 0x00000000, 0xc0201620, 0x000 },
- { 0x00000000, 0xc0201a20, 0x000 },
- { 0x00000000, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x541 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00002258, 0x00300a24, 0x000 },
- { 0x00040000, 0x00694622, 0x614 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00020000, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x549 },
- { 0x00000000, 0xc0201c10, 0x000 },
- { 0x00000000, 0xc0400000, 0x55b },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x549 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00002258, 0x00300a24, 0x000 },
- { 0x00040000, 0x00694622, 0x614 },
- { 0x00000000, 0xc0201c10, 0x000 },
- { 0x00000000, 0xc0400000, 0x55b },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x54d },
- { 0x00000000, 0xc0201c00, 0x000 },
- { 0x00000000, 0xc0400000, 0x55b },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x559 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1ac00000, 0x554 },
- { 0x9e000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x557 },
- { 0x00000000, 0x00401c10, 0x55b },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0400000, 0x000 },
- { 0x00000000, 0x0ee00000, 0x55d },
- { 0x00000000, 0x00600000, 0x5a4 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x56d },
- { 0x0000a2b7, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x614 },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x0000a2c4, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x56b },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000001, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x57d },
- { 0x0000a2bb, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x614 },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x0000a2c5, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x57b },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000002, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x58d },
- { 0x0000a2bf, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2be, 0x00604411, 0x614 },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x0000a2c6, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x58b },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x0000a2c3, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x614 },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x0000a2c7, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x599 },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x85000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x0000304a, 0x00204411, 0x000 },
- { 0x01000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00400000, 0x59f },
- { 0xa4000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0xc0600000, 0x5a4 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000005, 0x00204811, 0x000 },
- { 0x0000a1f4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x88000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0xff000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000002, 0x00804811, 0x000 },
- { 0x00000000, 0x0ee00000, 0x5b7 },
- { 0x00001000, 0x00200811, 0x000 },
- { 0x00000034, 0x00203622, 0x000 },
- { 0x00000000, 0x00600000, 0x5bb },
- { 0x00000000, 0x00600000, 0x5a4 },
- { 0x98000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00804811, 0x000 },
- { 0x00000000, 0xc0600000, 0x5bb },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000022, 0x00204811, 0x000 },
- { 0x89000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0xff000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000002, 0x00804811, 0x000 },
- { 0x0000217a, 0xc0204411, 0x000 },
- { 0x00000000, 0x00404811, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0xff000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000002, 0x00804811, 0x000 },
- { 0x00000000, 0x00600000, 0x5e1 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0xc0204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000016, 0x00604811, 0x35e },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x09800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x614 },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000004, 0x00404c11, 0x5dc },
- { 0x0000001d, 0x00201e2d, 0x000 },
- { 0x00000004, 0x00291e27, 0x000 },
- { 0x0000001d, 0x00803627, 0x000 },
- { 0x0000001d, 0x00201e2d, 0x000 },
- { 0xfffffffb, 0x00281e27, 0x000 },
- { 0x0000001d, 0x00803627, 0x000 },
- { 0x0000001d, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00291e27, 0x000 },
- { 0x0000001d, 0x00803627, 0x000 },
- { 0x0000001d, 0x00201e2d, 0x000 },
- { 0xfffffff7, 0x00281e27, 0x000 },
- { 0x0000001d, 0x00803627, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000016, 0x00604811, 0x35e },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x01800000, 0x00204811, 0x000 },
- { 0x00ffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004217f, 0x00604411, 0x614 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x613 },
- { 0x00000010, 0x00404c11, 0x5f9 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x38c00000, 0x000 },
- { 0x00000025, 0x00200a2d, 0x000 },
- { 0x00000026, 0x00200e2d, 0x000 },
- { 0x00000027, 0x0020122d, 0x000 },
- { 0x00000028, 0x0020162d, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000004, 0x00301224, 0x000 },
- { 0x00000000, 0x002f0064, 0x000 },
- { 0x00000000, 0x0cc00000, 0x612 },
- { 0x00000003, 0x00281a22, 0x000 },
- { 0x00000008, 0x00221222, 0x000 },
- { 0xfffff000, 0x00281224, 0x000 },
- { 0x00000000, 0x002910c4, 0x000 },
- { 0x00000027, 0x00403624, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x614 },
- { 0x9f000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x617 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x2fe },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x19f },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0xc0204411, 0x000 },
- { 0x00000029, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x0000002c, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000002a, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
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- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00404811, 0x000 },
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- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x013304ef, 0x059b0239, 0x000 },
- { 0x01b00159, 0x0425059b, 0x000 },
- { 0x021201f6, 0x02390142, 0x000 },
- { 0x0210022e, 0x0289022a, 0x000 },
- { 0x03c2059b, 0x059b059b, 0x000 },
- { 0x05cd05ce, 0x0308059b, 0x000 },
- { 0x059b05a0, 0x03090329, 0x000 },
- { 0x0313026b, 0x032b031d, 0x000 },
- { 0x059b059b, 0x059b059b, 0x000 },
- { 0x059b052c, 0x059b059b, 0x000 },
- { 0x03a5059b, 0x04a2032d, 0x000 },
- { 0x04810433, 0x0423059b, 0x000 },
- { 0x04bb04ed, 0x042704c8, 0x000 },
- { 0x043304f4, 0x033a0365, 0x000 },
- { 0x059b059b, 0x059b059b, 0x000 },
- { 0x059b059b, 0x059b059b, 0x000 },
- { 0x059b059b, 0x05b905a2, 0x000 },
- { 0x059b059b, 0x0007059b, 0x000 },
- { 0x059b059b, 0x059b059b, 0x000 },
- { 0x059b059b, 0x059b059b, 0x000 },
- { 0x03e303d8, 0x03f303f1, 0x000 },
- { 0x03f903f5, 0x03f703fb, 0x000 },
- { 0x04070403, 0x040f040b, 0x000 },
- { 0x04170413, 0x041f041b, 0x000 },
- { 0x059b059b, 0x059b059b, 0x000 },
- { 0x059b059b, 0x059b059b, 0x000 },
- { 0x059b059b, 0x059b059b, 0x000 },
- { 0x00020600, 0x06190006, 0x000 },
-};
-
-static const u32 R600_pfp_microcode[]={
-0xd40071,
-0xd40072,
-0xca0400,
-0xa00000,
-0x7e828b,
-0x800003,
-0xca0400,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d4,
-0xd5c01e,
-0xca0800,
-0x80001b,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000d,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000d,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800054,
-0xd40073,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800002,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800002,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b9,
-0xd4c01e,
-0xc6083e,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800002,
-0x062001,
-0xc6083e,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x80007a,
-0xd42013,
-0xc6083e,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008e,
-0x000000,
-0xc41432,
-0xc6183e,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800002,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xd40073,
-0xe4015e,
-0xd4001e,
-0x8001b9,
-0x062001,
-0x0a2001,
-0xd60074,
-0xc40836,
-0xc61040,
-0x988007,
-0xcc3835,
-0x95010f,
-0xd4001f,
-0xd46062,
-0x800002,
-0xd42062,
-0xcc1433,
-0x8401bc,
-0xd40070,
-0xd5401e,
-0x800002,
-0xee001e,
-0xca0c00,
-0xca1000,
-0xd4c01a,
-0x8401bc,
-0xd5001a,
-0xcc0443,
-0x35101f,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b9,
-0xd4006d,
-0x344401,
-0xcc0c44,
-0x98403a,
-0xcc2c46,
-0x958004,
-0xcc0445,
-0x8001b9,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f3,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f3,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f3,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f3,
-0xcc1003,
-0x988014,
-0xcc1047,
-0x9a8009,
-0xcc1448,
-0x9840da,
-0xd4006d,
-0xcc1844,
-0xd5001a,
-0xd5401a,
-0x8000cc,
-0xd5801a,
-0x96c0d3,
-0xd4006d,
-0x8001b9,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800002,
-0xec007f,
-0x9ac0ca,
-0xd4006d,
-0x8001b9,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b9,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809c,
-0xd4006d,
-0x98409a,
-0xd4006e,
-0xcc0847,
-0xcc0c48,
-0xcc1044,
-0xd4801a,
-0xd4c01a,
-0x800104,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d8,
-0xca0c00,
-0xd4401e,
-0x800002,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800002,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bc,
-0x000000,
-0x8401bc,
-0xd7806f,
-0x800002,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902af,
-0x7c738b,
-0x8401bc,
-0xd7806f,
-0x800002,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984296,
-0x000000,
-0x800164,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800002,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc1049,
-0x990004,
-0xd40071,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800002,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x95001f,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x7d8380,
-0xd5806f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0x8001b9,
-0xd60074,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800002,
-0xee001e,
-0x800002,
-0xee001f,
-0xd4001f,
-0x800002,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010174,
-0x02017b,
-0x030090,
-0x040080,
-0x050005,
-0x060040,
-0x070033,
-0x08012f,
-0x090047,
-0x0a0037,
-0x1001b7,
-0x1700a4,
-0x22013d,
-0x23014c,
-0x2000b5,
-0x240128,
-0x27004e,
-0x28006b,
-0x2a0061,
-0x2b0053,
-0x2f0066,
-0x320088,
-0x340182,
-0x3c0159,
-0x3f0073,
-0x41018f,
-0x440131,
-0x550176,
-0x56017d,
-0x60000c,
-0x610035,
-0x620039,
-0x630039,
-0x640039,
-0x650039,
-0x660039,
-0x670039,
-0x68003b,
-0x690042,
-0x6a0049,
-0x6b0049,
-0x6c0049,
-0x6d0049,
-0x6e0049,
-0x6f0049,
-0x7301b7,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-0x000007,
-};
-
-static const u32 RV610_cp_microcode[][3]={
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0000ffff, 0x00284621, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00000000, 0x00e00000, 0x000 },
- { 0x00010000, 0xc0294620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x00000000, 0x00600000, 0x631 },
- { 0x00000000, 0x00600000, 0x645 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000f00, 0x00281622, 0x000 },
- { 0x00000008, 0x00211625, 0x000 },
- { 0x00000018, 0x00203625, 0x000 },
- { 0x8d000000, 0x00204411, 0x000 },
- { 0x00000004, 0x002f0225, 0x000 },
- { 0x00000000, 0x0ce00000, 0x018 },
- { 0x00412000, 0x00404811, 0x019 },
- { 0x00422000, 0x00204811, 0x000 },
- { 0x8e000000, 0x00204411, 0x000 },
- { 0x00000028, 0x00204a2d, 0x000 },
- { 0x90000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x0000000c, 0x00211622, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000019, 0x00211a22, 0x000 },
- { 0x00000004, 0x00281a26, 0x000 },
- { 0x00000000, 0x002914c5, 0x000 },
- { 0x00000019, 0x00203625, 0x000 },
- { 0x00000000, 0x003a1402, 0x000 },
- { 0x00000016, 0x00211625, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0xfffffffc, 0x00280e23, 0x000 },
- { 0x00000000, 0x002914a3, 0x000 },
- { 0x00000017, 0x00203625, 0x000 },
- { 0x00008000, 0x00280e22, 0x000 },
- { 0x00000007, 0x00220e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x20000000, 0x00280e22, 0x000 },
- { 0x00000006, 0x00210e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x00000000, 0x00220222, 0x000 },
- { 0x00000000, 0x14e00000, 0x038 },
- { 0x00000000, 0x2ee00000, 0x035 },
- { 0x00000000, 0x2ce00000, 0x037 },
- { 0x00000000, 0x00400e2d, 0x039 },
- { 0x00000008, 0x00200e2d, 0x000 },
- { 0x00000009, 0x0040122d, 0x046 },
- { 0x00000001, 0x00400e2d, 0x039 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x03e },
- { 0x00000008, 0x00401c11, 0x041 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x0000000f, 0x00281e27, 0x000 },
- { 0x00000003, 0x00221e27, 0x000 },
- { 0x7fc00000, 0x00281a23, 0x000 },
- { 0x00000014, 0x00211a26, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000008, 0x00221a26, 0x000 },
- { 0x00000000, 0x00290cc7, 0x000 },
- { 0x00000027, 0x00203624, 0x000 },
- { 0x00007f00, 0x00281221, 0x000 },
- { 0x00001400, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x04b },
- { 0x00000001, 0x00290e23, 0x000 },
- { 0x0000000e, 0x00203623, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfff80000, 0x00294a23, 0x000 },
- { 0x00000000, 0x003a2c02, 0x000 },
- { 0x00000002, 0x00220e2b, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x0000000f, 0x00203623, 0x000 },
- { 0x00001fff, 0x00294a23, 0x000 },
- { 0x00000027, 0x00204a2d, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000029, 0x00200e2d, 0x000 },
- { 0x060a0200, 0x00294a23, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14e00000, 0x061 },
- { 0x00000000, 0x2ee00000, 0x05f },
- { 0x00000000, 0x2ce00000, 0x05e },
- { 0x00000000, 0x00400e2d, 0x062 },
- { 0x00000001, 0x00400e2d, 0x062 },
- { 0x0000000a, 0x00200e2d, 0x000 },
- { 0x0000000b, 0x0040122d, 0x06a },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x7fc00000, 0x00281623, 0x000 },
- { 0x00000014, 0x00211625, 0x000 },
- { 0x00000001, 0x00331625, 0x000 },
- { 0x80000000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00290ca3, 0x000 },
- { 0x3ffffc00, 0x00290e23, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x06d },
- { 0x00000100, 0x00401c11, 0x070 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x000000f0, 0x00281e27, 0x000 },
- { 0x00000004, 0x00221e27, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0xfffff0ff, 0x00281a30, 0x000 },
- { 0x0000a028, 0x00204411, 0x000 },
- { 0x00000000, 0x002948e6, 0x000 },
- { 0x0000a018, 0x00204411, 0x000 },
- { 0x3fffffff, 0x00284a23, 0x000 },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000030, 0x0020162d, 0x000 },
- { 0x00000002, 0x00291625, 0x000 },
- { 0x00000030, 0x00203625, 0x000 },
- { 0x00000025, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a3, 0x000 },
- { 0x00000000, 0x0cc00000, 0x083 },
- { 0x00000026, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a4, 0x000 },
- { 0x00000000, 0x0cc00000, 0x084 },
- { 0x00000000, 0x00400000, 0x08a },
- { 0x00000025, 0x00203623, 0x000 },
- { 0x00000026, 0x00203624, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x08a },
- { 0x00000000, 0x00600000, 0x668 },
- { 0x00000000, 0x00600000, 0x65c },
- { 0x00000002, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x08d },
- { 0x00000012, 0xc0403620, 0x093 },
- { 0x00000000, 0x2ee00000, 0x091 },
- { 0x00000000, 0x2ce00000, 0x090 },
- { 0x00000002, 0x00400e2d, 0x092 },
- { 0x00000003, 0x00400e2d, 0x092 },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000012, 0x00203623, 0x000 },
- { 0x00000003, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x098 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x0a0 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x2ee00000, 0x09e },
- { 0x00000000, 0x2ce00000, 0x09d },
- { 0x00000002, 0x00400e2d, 0x09f },
- { 0x00000003, 0x00400e2d, 0x09f },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x003f0000, 0x00280e23, 0x000 },
- { 0x00000010, 0x00210e23, 0x000 },
- { 0x00000011, 0x00203623, 0x000 },
- { 0x0000001e, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0a7 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x0000001f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0aa },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000008, 0x00210e2b, 0x000 },
- { 0x0000007f, 0x00280e23, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0e1 },
- { 0x00000000, 0x27000000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0b3 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x0000000c, 0x00221e30, 0x000 },
- { 0x99800000, 0x00204411, 0x000 },
- { 0x00000004, 0x0020122d, 0x000 },
- { 0x00000008, 0x00221224, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00291ce4, 0x000 },
- { 0x00000000, 0x00604807, 0x12f },
- { 0x9b000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x9c000000, 0x00204411, 0x000 },
- { 0x00000000, 0x0033146f, 0x000 },
- { 0x00000001, 0x00333e23, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0x00203c05, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e007, 0x00204411, 0x000 },
- { 0x0000000f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0cb },
- { 0x00f8ff08, 0x00204811, 0x000 },
- { 0x98000000, 0x00404811, 0x0dc },
- { 0x000000f0, 0x00280e22, 0x000 },
- { 0x000000a0, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x0da },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d5 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d4 },
- { 0x00003f00, 0x00400c11, 0x0d6 },
- { 0x00001f00, 0x00400c11, 0x0d6 },
- { 0x00000f00, 0x00200c11, 0x000 },
- { 0x00380009, 0x00294a23, 0x000 },
- { 0x3f000000, 0x00280e2b, 0x000 },
- { 0x00000002, 0x00220e23, 0x000 },
- { 0x00000007, 0x00494a23, 0x0dc },
- { 0x00380f09, 0x00204811, 0x000 },
- { 0x68000007, 0x00204811, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000a202, 0x00204411, 0x000 },
- { 0x00ff0000, 0x00280e22, 0x000 },
- { 0x00000080, 0x00294a23, 0x000 },
- { 0x00000027, 0x00200e2d, 0x000 },
- { 0x00000026, 0x0020122d, 0x000 },
- { 0x00000000, 0x002f0083, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0ea },
- { 0x00000000, 0x00600000, 0x662 },
- { 0x00000000, 0x00400000, 0x0eb },
- { 0x00000000, 0x00600000, 0x665 },
- { 0x00000007, 0x0020222d, 0x000 },
- { 0x00000005, 0x00220e22, 0x000 },
- { 0x00100000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x000000ef, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000003, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x0f8 },
- { 0x0000000b, 0x00210228, 0x000 },
- { 0x00000000, 0x14c00000, 0x0f8 },
- { 0x00000400, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000001c, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x0fd },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000001e, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x10b },
- { 0x0000a30f, 0x00204411, 0x000 },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x104 },
- { 0xffffffff, 0x00404811, 0x10b },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x107 },
- { 0x0000ffff, 0x00404811, 0x10b },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x10a },
- { 0x000000ff, 0x00404811, 0x10b },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0002c400, 0x00204411, 0x000 },
- { 0x0000001f, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x112 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000018, 0x40224a20, 0x000 },
- { 0x00000010, 0xc0424a20, 0x114 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000000a, 0x00201011, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x11b },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00531224, 0x117 },
- { 0xffbfffff, 0x00283a2e, 0x000 },
- { 0x0000001b, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x12e },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0x00000018, 0x00220e30, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e00e, 0x00204411, 0x000 },
- { 0x07f8ff08, 0x00204811, 0x000 },
- { 0x00000000, 0x00294a23, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x00800000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204806, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x68d },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x68c },
- { 0x00000004, 0x00404c11, 0x135 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x0000001c, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68d },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x13c },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40280620, 0x000 },
- { 0x00000010, 0xc0210a20, 0x000 },
- { 0x00000000, 0x00341461, 0x000 },
- { 0x00000000, 0x00741882, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x147 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0681a20, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x158 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000001, 0x00300a2f, 0x000 },
- { 0x00000001, 0x00210a22, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600000, 0x18f },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00202c08, 0x000 },
- { 0x00000000, 0x00202411, 0x000 },
- { 0x00000000, 0x00202811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000002, 0x00221e29, 0x000 },
- { 0x00000000, 0x007048eb, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000001, 0x40330620, 0x000 },
- { 0x00000000, 0xc0302409, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ae00000, 0x181 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x186 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x186 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000001, 0x00530621, 0x182 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0604800, 0x197 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000011, 0x0020062d, 0x000 },
- { 0x00000000, 0x0078042a, 0x2fb },
- { 0x00000000, 0x00202809, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x174 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x194 },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x46000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x19b },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00804811, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40281620, 0x000 },
- { 0x00000010, 0xc0811a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000008, 0x00221e30, 0x000 },
- { 0x00000029, 0x00201a2d, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfffbff09, 0x00204811, 0x000 },
- { 0x0000000f, 0x0020222d, 0x000 },
- { 0x00001fff, 0x00294a28, 0x000 },
- { 0x00000006, 0x0020222d, 0x000 },
- { 0x00000000, 0x002920e8, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000100, 0x00201811, 0x000 },
- { 0x00000008, 0x00621e28, 0x12f },
- { 0x00000008, 0x00822228, 0x000 },
- { 0x0002c000, 0x00204411, 0x000 },
- { 0x00000015, 0x00600e2d, 0x1bd },
- { 0x00000016, 0x00600e2d, 0x1bd },
- { 0x0000c008, 0x00204411, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000000, 0x14c00000, 0x1b9 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x39000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00804802, 0x000 },
- { 0x00000018, 0x00202e2d, 0x000 },
- { 0x00000000, 0x003b0d63, 0x000 },
- { 0x00000008, 0x00224a23, 0x000 },
- { 0x00000010, 0x00224a23, 0x000 },
- { 0x00000018, 0x00224a23, 0x000 },
- { 0x00000000, 0x00804803, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000007, 0x0021062f, 0x000 },
- { 0x00000013, 0x00200a2d, 0x000 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000ffff, 0x40282220, 0x000 },
- { 0x0000000f, 0x00262228, 0x000 },
- { 0x00000010, 0x40212620, 0x000 },
- { 0x0000000f, 0x00262629, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1e0 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000081, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000080, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1dc },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1d8 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000001f, 0x00280a22, 0x000 },
- { 0x0000001f, 0x00282a2a, 0x000 },
- { 0x00000001, 0x00530621, 0x1d1 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000002, 0x00304a2f, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000001, 0x00301e2f, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1e5 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x0000000f, 0x00260e23, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000000f, 0x00261224, 0x000 },
- { 0x00000000, 0x00201411, 0x000 },
- { 0x00000000, 0x00601811, 0x2bb },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022b, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1f8 },
- { 0x00000010, 0x00221628, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a29, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x0020480a, 0x000 },
- { 0x00000000, 0x00202c11, 0x000 },
- { 0x00000010, 0x00221623, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a24, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x00731503, 0x205 },
- { 0x00000000, 0x00201805, 0x000 },
- { 0x00000000, 0x00731524, 0x205 },
- { 0x00000000, 0x002d14c5, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00000000, 0x00202003, 0x000 },
- { 0x00000000, 0x00802404, 0x000 },
- { 0x0000000f, 0x00210225, 0x000 },
- { 0x00000000, 0x14c00000, 0x68c },
- { 0x00000000, 0x002b1405, 0x000 },
- { 0x00000001, 0x00901625, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00294a22, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a21, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000ffff, 0x40281220, 0x000 },
- { 0x00000010, 0xc0211a20, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211620, 0x000 },
- { 0x00000000, 0x00741465, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00000001, 0x00330621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0cc00000, 0x219 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x212 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x645 },
- { 0x00000000, 0x0040040f, 0x213 },
- { 0x00000000, 0x00600000, 0x631 },
- { 0x00000000, 0x00600000, 0x645 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00000000, 0x00600000, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ae00000, 0x232 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x236 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x236 },
- { 0x00000000, 0xc0404800, 0x233 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x00600411, 0x2fb },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x631 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000018, 0x40210a20, 0x000 },
- { 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x24c },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x00080101, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x251 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000010, 0x00600411, 0x315 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00000000, 0x00600000, 0x27c },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000001, 0x00211e27, 0x000 },
- { 0x00000000, 0x14e00000, 0x26a },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x0000ffff, 0x00281e27, 0x000 },
- { 0x00000000, 0x00341c27, 0x000 },
- { 0x00000000, 0x12c00000, 0x25f },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e5, 0x000 },
- { 0x00000000, 0x08c00000, 0x262 },
- { 0x00000000, 0x00201407, 0x000 },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00211e27, 0x000 },
- { 0x00000000, 0x00341c47, 0x000 },
- { 0x00000000, 0x12c00000, 0x267 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x08c00000, 0x26a },
- { 0x00000000, 0x00201807, 0x000 },
- { 0x00000000, 0x00600000, 0x2c1 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000000, 0x00342023, 0x000 },
- { 0x00000000, 0x12c00000, 0x272 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x271 },
- { 0x00000016, 0x00404811, 0x276 },
- { 0x00000018, 0x00404811, 0x276 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x275 },
- { 0x00000017, 0x00404811, 0x276 },
- { 0x00000019, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00604411, 0x2e9 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x256 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000010, 0x40210620, 0x000 },
- { 0x0000ffff, 0xc0280a20, 0x000 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0881a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x00000000, 0x00600000, 0x631 },
- { 0x00000000, 0xc0600000, 0x2a3 },
- { 0x00000005, 0x00200a2d, 0x000 },
- { 0x00000008, 0x00220a22, 0x000 },
- { 0x0000002b, 0x00201a2d, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00007000, 0x00281e27, 0x000 },
- { 0x00000000, 0x00311ce6, 0x000 },
- { 0x0000002a, 0x00201a2d, 0x000 },
- { 0x0000000c, 0x00221a26, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x06e00000, 0x292 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x0000002b, 0x00203623, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00691ce2, 0x12f },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x29d },
- { 0x00000001, 0x00333e2f, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000001c, 0x00403627, 0x000 },
- { 0x0000000c, 0xc0220a20, 0x000 },
- { 0x00000029, 0x00203622, 0x000 },
- { 0x00000028, 0xc0403620, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000009, 0x00204811, 0x000 },
- { 0xa1000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce3, 0x000 },
- { 0x00000021, 0x00203627, 0x000 },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce4, 0x000 },
- { 0x00000022, 0x00203627, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a3, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x00000021, 0x00203623, 0x000 },
- { 0x00000022, 0x00203624, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000000, 0x00311cc4, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14c00000, 0x2dc },
- { 0x00000000, 0x00400000, 0x2d9 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2d9 },
- { 0x00000003, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2dc },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e1, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a1, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e2, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000000, 0x00600000, 0x668 },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00600000, 0x65f },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2a7 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x0000001a, 0x00201e2d, 0x000 },
- { 0x0000001b, 0x0080222d, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca1, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x003808c5, 0x000 },
- { 0x00000000, 0x00300841, 0x000 },
- { 0x00000001, 0x00220a22, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000017, 0x0020222d, 0x000 },
- { 0x00000000, 0x14c00000, 0x318 },
- { 0xffffffef, 0x00280621, 0x000 },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x0000f8e0, 0x00204411, 0x000 },
- { 0x00000000, 0x00294901, 0x000 },
- { 0x00000000, 0x00894901, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00804811, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x97000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00002257, 0x00204411, 0x000 },
- { 0x00000003, 0xc0484a20, 0x000 },
- { 0x0000225d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x645 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x00000001, 0x40304a20, 0x000 },
- { 0x00000002, 0xc0304a20, 0x000 },
- { 0x00000001, 0x00530a22, 0x34b },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000018, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68d },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x354 },
- { 0x00000014, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x364 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00604802, 0x36e },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x36a },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35f },
- { 0x00000028, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5c0 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35f },
- { 0x0000002c, 0x00203626, 0x000 },
- { 0x00000049, 0x00201811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0cc00000, 0x370 },
- { 0x0000002c, 0x00801a2d, 0x000 },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x00000015, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x386 },
- { 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3b1 },
- { 0x00000016, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3b5 },
- { 0x00000020, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x39c },
- { 0x0000000f, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a8 },
- { 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a8 },
- { 0x0000001e, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x390 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x08000000, 0x00290a22, 0x000 },
- { 0x00000003, 0x40210e20, 0x000 },
- { 0x0000000c, 0xc0211220, 0x000 },
- { 0x00080000, 0x00281224, 0x000 },
- { 0x00000014, 0xc0221620, 0x000 },
- { 0x00000000, 0x002914a4, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x002948a2, 0x000 },
- { 0x0000a1fe, 0x00204411, 0x000 },
- { 0x00000000, 0x00404803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68d },
- { 0x00000015, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x392 },
- { 0x0000210e, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000017, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68d },
- { 0x00000003, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x39e },
- { 0x00002108, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
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- { 0x00000001, 0x00204811, 0x000 },
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- { 0xcafebabe, 0x00404811, 0x000 },
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- { 0x00000001, 0x00204811, 0x000 },
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- { 0x80000000, 0x40280e20, 0x000 },
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- { 0x00000001, 0x00204811, 0x000 },
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- { 0x00000000, 0xc0604800, 0x692 },
- { 0x00000000, 0x00400000, 0x4c7 },
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- { 0x00000001, 0x00204811, 0x000 },
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- { 0x00000000, 0xc0600000, 0x68d },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x4ce },
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- { 0x00000000, 0xc0204800, 0x000 },
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- { 0x00000000, 0xc0404810, 0x000 },
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- { 0x00000001, 0x00204811, 0x000 },
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- { 0x0000000e, 0x00204811, 0x000 },
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- { 0xefffffff, 0x00283a2e, 0x000 },
- { 0x00000000, 0x004938ce, 0x67b },
- { 0x00000001, 0x40280a20, 0x000 },
- { 0x00000006, 0x40280e20, 0x000 },
- { 0x00000300, 0xc0281220, 0x000 },
- { 0x00000008, 0x00211224, 0x000 },
- { 0x00000000, 0xc0201620, 0x000 },
- { 0x00000000, 0xc0201a20, 0x000 },
- { 0x00000000, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x566 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00002258, 0x00300a24, 0x000 },
- { 0x00040000, 0x00694622, 0x68d },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00020000, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x56e },
- { 0x00000000, 0xc0201c10, 0x000 },
- { 0x00000000, 0xc0400000, 0x57c },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x56e },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00002258, 0x00300a24, 0x000 },
- { 0x00040000, 0x00694622, 0x68d },
- { 0x00000000, 0xc0201c10, 0x000 },
- { 0x00000000, 0xc0400000, 0x57c },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x572 },
- { 0x00000000, 0xc0201c00, 0x000 },
- { 0x00000000, 0xc0400000, 0x57c },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x57a },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0604800, 0x692 },
- { 0x00000000, 0x00401c10, 0x57c },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0400000, 0x000 },
- { 0x00000000, 0x0ee00000, 0x57e },
- { 0x00000000, 0x00600000, 0x5c9 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x58f },
- { 0x0000a2b7, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x68d },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0000a2c4, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x58d },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000001, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5a0 },
- { 0x0000a2bb, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x68d },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0000a2c5, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x59e },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000002, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5b1 },
- { 0x0000a2bf, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2be, 0x00604411, 0x68d },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0000a2c6, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x5af },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x0000a2c3, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x68d },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0000a2c7, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x5be },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x85000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x0000304a, 0x00204411, 0x000 },
- { 0x01000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00400000, 0x5c4 },
- { 0xa4000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0xc0600000, 0x5c9 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000002c, 0x00203621, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0230, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5d0 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000030, 0x00403621, 0x5e3 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x5e3 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a092, 0x00604411, 0x68d },
- { 0x00000031, 0x00203630, 0x000 },
- { 0x0004a093, 0x00604411, 0x68d },
- { 0x00000032, 0x00203630, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x68d },
- { 0x00000033, 0x00203630, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x68d },
- { 0x00000034, 0x00203630, 0x000 },
- { 0x0004a2be, 0x00604411, 0x68d },
- { 0x00000035, 0x00203630, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x68d },
- { 0x00000036, 0x00203630, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000005, 0x00204811, 0x000 },
- { 0x0000a1f4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x88000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000001, 0x002f0230, 0x000 },
- { 0x00000000, 0x0ce00000, 0x62c },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x62c },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x605 },
- { 0x0000a092, 0x00204411, 0x000 },
- { 0x00000031, 0x00204a2d, 0x000 },
- { 0x0000a093, 0x00204411, 0x000 },
- { 0x00000032, 0x00204a2d, 0x000 },
- { 0x0000a2b6, 0x00204411, 0x000 },
- { 0x00000033, 0x00204a2d, 0x000 },
- { 0x0000a2ba, 0x00204411, 0x000 },
- { 0x00000034, 0x00204a2d, 0x000 },
- { 0x0000a2be, 0x00204411, 0x000 },
- { 0x00000035, 0x00204a2d, 0x000 },
- { 0x0000a2c2, 0x00204411, 0x000 },
- { 0x00000036, 0x00204a2d, 0x000 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x000001ff, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x62b },
- { 0x00000000, 0x00210221, 0x000 },
- { 0x00000000, 0x14c00000, 0x60e },
- { 0x0004a003, 0x00604411, 0x68d },
- { 0x0000a003, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x14c00000, 0x613 },
- { 0x0004a010, 0x00604411, 0x68d },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x62b },
- { 0x0004a011, 0x00604411, 0x68d },
- { 0x0000a011, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a012, 0x00604411, 0x68d },
- { 0x0000a012, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a013, 0x00604411, 0x68d },
- { 0x0000a013, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a014, 0x00604411, 0x68d },
- { 0x0000a014, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a015, 0x00604411, 0x68d },
- { 0x0000a015, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a016, 0x00604411, 0x68d },
- { 0x0000a016, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a017, 0x00604411, 0x68d },
- { 0x0000a017, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0000002c, 0x0080062d, 0x000 },
- { 0xff000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000002, 0x00804811, 0x000 },
- { 0x00000000, 0x0ee00000, 0x63d },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000002, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x63b },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x00001000, 0x00200811, 0x000 },
- { 0x0000002b, 0x00203622, 0x000 },
- { 0x00000000, 0x00600000, 0x641 },
- { 0x00000000, 0x00600000, 0x5c9 },
- { 0x98000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00804811, 0x000 },
- { 0x00000000, 0xc0600000, 0x641 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000022, 0x00204811, 0x000 },
- { 0x89000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00404811, 0x62d },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00404811, 0x62d },
- { 0x00000000, 0x00600000, 0x65c },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0xc0204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x09800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x68d },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000004, 0x00404c11, 0x656 },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000004, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffffb, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffff7, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x01800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004217f, 0x00604411, 0x68d },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x68c },
- { 0x00000010, 0x00404c11, 0x672 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x38c00000, 0x000 },
- { 0x0000001d, 0x00200a2d, 0x000 },
- { 0x0000001e, 0x00200e2d, 0x000 },
- { 0x0000001f, 0x0020122d, 0x000 },
- { 0x00000020, 0x0020162d, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000004, 0x00301224, 0x000 },
- { 0x00000000, 0x002f0064, 0x000 },
- { 0x00000000, 0x0cc00000, 0x68b },
- { 0x00000003, 0x00281a22, 0x000 },
- { 0x00000008, 0x00221222, 0x000 },
- { 0xfffff000, 0x00281224, 0x000 },
- { 0x00000000, 0x002910c4, 0x000 },
- { 0x0000001f, 0x00403624, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x68d },
- { 0x9f000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x690 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x692 },
- { 0x9e000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x695 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0xc0204411, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000024, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000022, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00404811, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x01420502, 0x05c00250, 0x000 },
- { 0x01c30168, 0x043f05c0, 0x000 },
- { 0x02250209, 0x02500151, 0x000 },
- { 0x02230245, 0x02a00241, 0x000 },
- { 0x03d705c0, 0x05c005c0, 0x000 },
- { 0x0649064a, 0x031f05c0, 0x000 },
- { 0x05c005c5, 0x03200340, 0x000 },
- { 0x032a0282, 0x03420334, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c00551, 0x05c005c0, 0x000 },
- { 0x03ba05c0, 0x04bb0344, 0x000 },
- { 0x049a0450, 0x043d05c0, 0x000 },
- { 0x04d005c0, 0x044104dd, 0x000 },
- { 0x04500507, 0x03510375, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c005c0, 0x063f05c7, 0x000 },
- { 0x05c005c0, 0x000705c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x03f803ed, 0x04080406, 0x000 },
- { 0x040e040a, 0x040c0410, 0x000 },
- { 0x041c0418, 0x04240420, 0x000 },
- { 0x042c0428, 0x04340430, 0x000 },
- { 0x05c005c0, 0x043805c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x00020679, 0x06970006, 0x000 },
-};
-
-static const u32 RV610_pfp_microcode[]={
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-
-static const u32 RV620_cp_microcode[][3]={
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0000ffff, 0x00284621, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00000000, 0x00e00000, 0x000 },
- { 0x00010000, 0xc0294620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x00000000, 0x00600000, 0x631 },
- { 0x00000000, 0x00600000, 0x645 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000f00, 0x00281622, 0x000 },
- { 0x00000008, 0x00211625, 0x000 },
- { 0x00000018, 0x00203625, 0x000 },
- { 0x8d000000, 0x00204411, 0x000 },
- { 0x00000004, 0x002f0225, 0x000 },
- { 0x00000000, 0x0ce00000, 0x018 },
- { 0x00412000, 0x00404811, 0x019 },
- { 0x00422000, 0x00204811, 0x000 },
- { 0x8e000000, 0x00204411, 0x000 },
- { 0x00000028, 0x00204a2d, 0x000 },
- { 0x90000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x0000000c, 0x00211622, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000019, 0x00211a22, 0x000 },
- { 0x00000004, 0x00281a26, 0x000 },
- { 0x00000000, 0x002914c5, 0x000 },
- { 0x00000019, 0x00203625, 0x000 },
- { 0x00000000, 0x003a1402, 0x000 },
- { 0x00000016, 0x00211625, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0xfffffffc, 0x00280e23, 0x000 },
- { 0x00000000, 0x002914a3, 0x000 },
- { 0x00000017, 0x00203625, 0x000 },
- { 0x00008000, 0x00280e22, 0x000 },
- { 0x00000007, 0x00220e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x20000000, 0x00280e22, 0x000 },
- { 0x00000006, 0x00210e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x00000000, 0x00220222, 0x000 },
- { 0x00000000, 0x14e00000, 0x038 },
- { 0x00000000, 0x2ee00000, 0x035 },
- { 0x00000000, 0x2ce00000, 0x037 },
- { 0x00000000, 0x00400e2d, 0x039 },
- { 0x00000008, 0x00200e2d, 0x000 },
- { 0x00000009, 0x0040122d, 0x046 },
- { 0x00000001, 0x00400e2d, 0x039 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x03e },
- { 0x00000008, 0x00401c11, 0x041 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x0000000f, 0x00281e27, 0x000 },
- { 0x00000003, 0x00221e27, 0x000 },
- { 0x7fc00000, 0x00281a23, 0x000 },
- { 0x00000014, 0x00211a26, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000008, 0x00221a26, 0x000 },
- { 0x00000000, 0x00290cc7, 0x000 },
- { 0x00000027, 0x00203624, 0x000 },
- { 0x00007f00, 0x00281221, 0x000 },
- { 0x00001400, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x04b },
- { 0x00000001, 0x00290e23, 0x000 },
- { 0x0000000e, 0x00203623, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfff80000, 0x00294a23, 0x000 },
- { 0x00000000, 0x003a2c02, 0x000 },
- { 0x00000002, 0x00220e2b, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x0000000f, 0x00203623, 0x000 },
- { 0x00001fff, 0x00294a23, 0x000 },
- { 0x00000027, 0x00204a2d, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000029, 0x00200e2d, 0x000 },
- { 0x060a0200, 0x00294a23, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14e00000, 0x061 },
- { 0x00000000, 0x2ee00000, 0x05f },
- { 0x00000000, 0x2ce00000, 0x05e },
- { 0x00000000, 0x00400e2d, 0x062 },
- { 0x00000001, 0x00400e2d, 0x062 },
- { 0x0000000a, 0x00200e2d, 0x000 },
- { 0x0000000b, 0x0040122d, 0x06a },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x7fc00000, 0x00281623, 0x000 },
- { 0x00000014, 0x00211625, 0x000 },
- { 0x00000001, 0x00331625, 0x000 },
- { 0x80000000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00290ca3, 0x000 },
- { 0x3ffffc00, 0x00290e23, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x06d },
- { 0x00000100, 0x00401c11, 0x070 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x000000f0, 0x00281e27, 0x000 },
- { 0x00000004, 0x00221e27, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0xfffff0ff, 0x00281a30, 0x000 },
- { 0x0000a028, 0x00204411, 0x000 },
- { 0x00000000, 0x002948e6, 0x000 },
- { 0x0000a018, 0x00204411, 0x000 },
- { 0x3fffffff, 0x00284a23, 0x000 },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000030, 0x0020162d, 0x000 },
- { 0x00000002, 0x00291625, 0x000 },
- { 0x00000030, 0x00203625, 0x000 },
- { 0x00000025, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a3, 0x000 },
- { 0x00000000, 0x0cc00000, 0x083 },
- { 0x00000026, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a4, 0x000 },
- { 0x00000000, 0x0cc00000, 0x084 },
- { 0x00000000, 0x00400000, 0x08a },
- { 0x00000025, 0x00203623, 0x000 },
- { 0x00000026, 0x00203624, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x08a },
- { 0x00000000, 0x00600000, 0x668 },
- { 0x00000000, 0x00600000, 0x65c },
- { 0x00000002, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x08d },
- { 0x00000012, 0xc0403620, 0x093 },
- { 0x00000000, 0x2ee00000, 0x091 },
- { 0x00000000, 0x2ce00000, 0x090 },
- { 0x00000002, 0x00400e2d, 0x092 },
- { 0x00000003, 0x00400e2d, 0x092 },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000012, 0x00203623, 0x000 },
- { 0x00000003, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x098 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x0a0 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x2ee00000, 0x09e },
- { 0x00000000, 0x2ce00000, 0x09d },
- { 0x00000002, 0x00400e2d, 0x09f },
- { 0x00000003, 0x00400e2d, 0x09f },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x003f0000, 0x00280e23, 0x000 },
- { 0x00000010, 0x00210e23, 0x000 },
- { 0x00000011, 0x00203623, 0x000 },
- { 0x0000001e, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0a7 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x0000001f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0aa },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000008, 0x00210e2b, 0x000 },
- { 0x0000007f, 0x00280e23, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0e1 },
- { 0x00000000, 0x27000000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0b3 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x0000000c, 0x00221e30, 0x000 },
- { 0x99800000, 0x00204411, 0x000 },
- { 0x00000004, 0x0020122d, 0x000 },
- { 0x00000008, 0x00221224, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00291ce4, 0x000 },
- { 0x00000000, 0x00604807, 0x12f },
- { 0x9b000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x9c000000, 0x00204411, 0x000 },
- { 0x00000000, 0x0033146f, 0x000 },
- { 0x00000001, 0x00333e23, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0x00203c05, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e007, 0x00204411, 0x000 },
- { 0x0000000f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0cb },
- { 0x00f8ff08, 0x00204811, 0x000 },
- { 0x98000000, 0x00404811, 0x0dc },
- { 0x000000f0, 0x00280e22, 0x000 },
- { 0x000000a0, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x0da },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d5 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d4 },
- { 0x00003f00, 0x00400c11, 0x0d6 },
- { 0x00001f00, 0x00400c11, 0x0d6 },
- { 0x00000f00, 0x00200c11, 0x000 },
- { 0x00380009, 0x00294a23, 0x000 },
- { 0x3f000000, 0x00280e2b, 0x000 },
- { 0x00000002, 0x00220e23, 0x000 },
- { 0x00000007, 0x00494a23, 0x0dc },
- { 0x00380f09, 0x00204811, 0x000 },
- { 0x68000007, 0x00204811, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000a202, 0x00204411, 0x000 },
- { 0x00ff0000, 0x00280e22, 0x000 },
- { 0x00000080, 0x00294a23, 0x000 },
- { 0x00000027, 0x00200e2d, 0x000 },
- { 0x00000026, 0x0020122d, 0x000 },
- { 0x00000000, 0x002f0083, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0ea },
- { 0x00000000, 0x00600000, 0x662 },
- { 0x00000000, 0x00400000, 0x0eb },
- { 0x00000000, 0x00600000, 0x665 },
- { 0x00000007, 0x0020222d, 0x000 },
- { 0x00000005, 0x00220e22, 0x000 },
- { 0x00100000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x000000ef, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000003, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x0f8 },
- { 0x0000000b, 0x00210228, 0x000 },
- { 0x00000000, 0x14c00000, 0x0f8 },
- { 0x00000400, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000001c, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x0fd },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000001e, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x10b },
- { 0x0000a30f, 0x00204411, 0x000 },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x104 },
- { 0xffffffff, 0x00404811, 0x10b },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x107 },
- { 0x0000ffff, 0x00404811, 0x10b },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x10a },
- { 0x000000ff, 0x00404811, 0x10b },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0002c400, 0x00204411, 0x000 },
- { 0x0000001f, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x112 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000018, 0x40224a20, 0x000 },
- { 0x00000010, 0xc0424a20, 0x114 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000000a, 0x00201011, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x11b },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00531224, 0x117 },
- { 0xffbfffff, 0x00283a2e, 0x000 },
- { 0x0000001b, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x12e },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0x00000018, 0x00220e30, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e00e, 0x00204411, 0x000 },
- { 0x07f8ff08, 0x00204811, 0x000 },
- { 0x00000000, 0x00294a23, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x00800000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204806, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x68d },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x68c },
- { 0x00000004, 0x00404c11, 0x135 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x0000001c, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68d },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x13c },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40280620, 0x000 },
- { 0x00000010, 0xc0210a20, 0x000 },
- { 0x00000000, 0x00341461, 0x000 },
- { 0x00000000, 0x00741882, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x147 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0681a20, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x158 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000001, 0x00300a2f, 0x000 },
- { 0x00000001, 0x00210a22, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600000, 0x18f },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00202c08, 0x000 },
- { 0x00000000, 0x00202411, 0x000 },
- { 0x00000000, 0x00202811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000002, 0x00221e29, 0x000 },
- { 0x00000000, 0x007048eb, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000001, 0x40330620, 0x000 },
- { 0x00000000, 0xc0302409, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ae00000, 0x181 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x186 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x186 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000001, 0x00530621, 0x182 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0604800, 0x197 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000011, 0x0020062d, 0x000 },
- { 0x00000000, 0x0078042a, 0x2fb },
- { 0x00000000, 0x00202809, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x174 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x194 },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x46000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x19b },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00804811, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40281620, 0x000 },
- { 0x00000010, 0xc0811a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000008, 0x00221e30, 0x000 },
- { 0x00000029, 0x00201a2d, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfffbff09, 0x00204811, 0x000 },
- { 0x0000000f, 0x0020222d, 0x000 },
- { 0x00001fff, 0x00294a28, 0x000 },
- { 0x00000006, 0x0020222d, 0x000 },
- { 0x00000000, 0x002920e8, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000100, 0x00201811, 0x000 },
- { 0x00000008, 0x00621e28, 0x12f },
- { 0x00000008, 0x00822228, 0x000 },
- { 0x0002c000, 0x00204411, 0x000 },
- { 0x00000015, 0x00600e2d, 0x1bd },
- { 0x00000016, 0x00600e2d, 0x1bd },
- { 0x0000c008, 0x00204411, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000000, 0x14c00000, 0x1b9 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x39000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00804802, 0x000 },
- { 0x00000018, 0x00202e2d, 0x000 },
- { 0x00000000, 0x003b0d63, 0x000 },
- { 0x00000008, 0x00224a23, 0x000 },
- { 0x00000010, 0x00224a23, 0x000 },
- { 0x00000018, 0x00224a23, 0x000 },
- { 0x00000000, 0x00804803, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000007, 0x0021062f, 0x000 },
- { 0x00000013, 0x00200a2d, 0x000 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000ffff, 0x40282220, 0x000 },
- { 0x0000000f, 0x00262228, 0x000 },
- { 0x00000010, 0x40212620, 0x000 },
- { 0x0000000f, 0x00262629, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1e0 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000081, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000080, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1dc },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1d8 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000001f, 0x00280a22, 0x000 },
- { 0x0000001f, 0x00282a2a, 0x000 },
- { 0x00000001, 0x00530621, 0x1d1 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000002, 0x00304a2f, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000001, 0x00301e2f, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1e5 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x0000000f, 0x00260e23, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000000f, 0x00261224, 0x000 },
- { 0x00000000, 0x00201411, 0x000 },
- { 0x00000000, 0x00601811, 0x2bb },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022b, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1f8 },
- { 0x00000010, 0x00221628, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a29, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x0020480a, 0x000 },
- { 0x00000000, 0x00202c11, 0x000 },
- { 0x00000010, 0x00221623, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a24, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x00731503, 0x205 },
- { 0x00000000, 0x00201805, 0x000 },
- { 0x00000000, 0x00731524, 0x205 },
- { 0x00000000, 0x002d14c5, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00000000, 0x00202003, 0x000 },
- { 0x00000000, 0x00802404, 0x000 },
- { 0x0000000f, 0x00210225, 0x000 },
- { 0x00000000, 0x14c00000, 0x68c },
- { 0x00000000, 0x002b1405, 0x000 },
- { 0x00000001, 0x00901625, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00294a22, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a21, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000ffff, 0x40281220, 0x000 },
- { 0x00000010, 0xc0211a20, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211620, 0x000 },
- { 0x00000000, 0x00741465, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00000001, 0x00330621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0cc00000, 0x219 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x212 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x645 },
- { 0x00000000, 0x0040040f, 0x213 },
- { 0x00000000, 0x00600000, 0x631 },
- { 0x00000000, 0x00600000, 0x645 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00000000, 0x00600000, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ae00000, 0x232 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x236 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x236 },
- { 0x00000000, 0xc0404800, 0x233 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x00600411, 0x2fb },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x631 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000018, 0x40210a20, 0x000 },
- { 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x24c },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x00080101, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x251 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000010, 0x00600411, 0x315 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00000000, 0x00600000, 0x27c },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000001, 0x00211e27, 0x000 },
- { 0x00000000, 0x14e00000, 0x26a },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x0000ffff, 0x00281e27, 0x000 },
- { 0x00000000, 0x00341c27, 0x000 },
- { 0x00000000, 0x12c00000, 0x25f },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e5, 0x000 },
- { 0x00000000, 0x08c00000, 0x262 },
- { 0x00000000, 0x00201407, 0x000 },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00211e27, 0x000 },
- { 0x00000000, 0x00341c47, 0x000 },
- { 0x00000000, 0x12c00000, 0x267 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x08c00000, 0x26a },
- { 0x00000000, 0x00201807, 0x000 },
- { 0x00000000, 0x00600000, 0x2c1 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000000, 0x00342023, 0x000 },
- { 0x00000000, 0x12c00000, 0x272 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x271 },
- { 0x00000016, 0x00404811, 0x276 },
- { 0x00000018, 0x00404811, 0x276 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x275 },
- { 0x00000017, 0x00404811, 0x276 },
- { 0x00000019, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00604411, 0x2e9 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x256 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000010, 0x40210620, 0x000 },
- { 0x0000ffff, 0xc0280a20, 0x000 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0881a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x00000000, 0x00600000, 0x631 },
- { 0x00000000, 0xc0600000, 0x2a3 },
- { 0x00000005, 0x00200a2d, 0x000 },
- { 0x00000008, 0x00220a22, 0x000 },
- { 0x0000002b, 0x00201a2d, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00007000, 0x00281e27, 0x000 },
- { 0x00000000, 0x00311ce6, 0x000 },
- { 0x0000002a, 0x00201a2d, 0x000 },
- { 0x0000000c, 0x00221a26, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x06e00000, 0x292 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x0000002b, 0x00203623, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00691ce2, 0x12f },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x29d },
- { 0x00000001, 0x00333e2f, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000001c, 0x00403627, 0x000 },
- { 0x0000000c, 0xc0220a20, 0x000 },
- { 0x00000029, 0x00203622, 0x000 },
- { 0x00000028, 0xc0403620, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000009, 0x00204811, 0x000 },
- { 0xa1000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce3, 0x000 },
- { 0x00000021, 0x00203627, 0x000 },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce4, 0x000 },
- { 0x00000022, 0x00203627, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a3, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x00000021, 0x00203623, 0x000 },
- { 0x00000022, 0x00203624, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000000, 0x00311cc4, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14c00000, 0x2dc },
- { 0x00000000, 0x00400000, 0x2d9 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2d9 },
- { 0x00000003, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2dc },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e1, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a1, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e2, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000000, 0x00600000, 0x668 },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00600000, 0x65f },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2a7 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x0000001a, 0x00201e2d, 0x000 },
- { 0x0000001b, 0x0080222d, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca1, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x003808c5, 0x000 },
- { 0x00000000, 0x00300841, 0x000 },
- { 0x00000001, 0x00220a22, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000017, 0x0020222d, 0x000 },
- { 0x00000000, 0x14c00000, 0x318 },
- { 0xffffffef, 0x00280621, 0x000 },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x0000f8e0, 0x00204411, 0x000 },
- { 0x00000000, 0x00294901, 0x000 },
- { 0x00000000, 0x00894901, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00804811, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x97000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00002257, 0x00204411, 0x000 },
- { 0x00000003, 0xc0484a20, 0x000 },
- { 0x0000225d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x645 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x00000001, 0x40304a20, 0x000 },
- { 0x00000002, 0xc0304a20, 0x000 },
- { 0x00000001, 0x00530a22, 0x34b },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000018, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68d },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x354 },
- { 0x00000014, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x364 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00604802, 0x36e },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x36a },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35f },
- { 0x00000028, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5c0 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35f },
- { 0x0000002c, 0x00203626, 0x000 },
- { 0x00000049, 0x00201811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0cc00000, 0x370 },
- { 0x0000002c, 0x00801a2d, 0x000 },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x00000015, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x386 },
- { 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3b1 },
- { 0x00000016, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3b5 },
- { 0x00000020, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x39c },
- { 0x0000000f, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a8 },
- { 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a8 },
- { 0x0000001e, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x390 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x08000000, 0x00290a22, 0x000 },
- { 0x00000003, 0x40210e20, 0x000 },
- { 0x0000000c, 0xc0211220, 0x000 },
- { 0x00080000, 0x00281224, 0x000 },
- { 0x00000014, 0xc0221620, 0x000 },
- { 0x00000000, 0x002914a4, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x002948a2, 0x000 },
- { 0x0000a1fe, 0x00204411, 0x000 },
- { 0x00000000, 0x00404803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68d },
- { 0x00000015, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x392 },
- { 0x0000210e, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000017, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68d },
- { 0x00000003, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x39e },
- { 0x00002108, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x80000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000010, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x3ae },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000006, 0x00404811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x0000001d, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x3ce },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000018, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68d },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x3c0 },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0xbabecafe, 0x00204811, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000004, 0x00404811, 0x000 },
- { 0x00002170, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000a, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x3d3 },
- { 0x8c000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00003fff, 0x40280a20, 0x000 },
- { 0x80000000, 0x40280e20, 0x000 },
- { 0x40000000, 0xc0281220, 0x000 },
- { 0x00040000, 0x00694622, 0x68d },
- { 0x00000000, 0x00201410, 0x000 },
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- { 0x00000000, 0x0cc00000, 0x3e1 },
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- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x58d },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000001, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5a0 },
- { 0x0000a2bb, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x68d },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0000a2c5, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x59e },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000002, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5b1 },
- { 0x0000a2bf, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2be, 0x00604411, 0x68d },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0000a2c6, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x5af },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x0000a2c3, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x68d },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0000a2c7, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x5be },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x85000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x0000304a, 0x00204411, 0x000 },
- { 0x01000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00400000, 0x5c4 },
- { 0xa4000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0xc0600000, 0x5c9 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000002c, 0x00203621, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0230, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5d0 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000030, 0x00403621, 0x5e3 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x5e3 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a092, 0x00604411, 0x68d },
- { 0x00000031, 0x00203630, 0x000 },
- { 0x0004a093, 0x00604411, 0x68d },
- { 0x00000032, 0x00203630, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x68d },
- { 0x00000033, 0x00203630, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x68d },
- { 0x00000034, 0x00203630, 0x000 },
- { 0x0004a2be, 0x00604411, 0x68d },
- { 0x00000035, 0x00203630, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x68d },
- { 0x00000036, 0x00203630, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000005, 0x00204811, 0x000 },
- { 0x0000a1f4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x88000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000001, 0x002f0230, 0x000 },
- { 0x00000000, 0x0ce00000, 0x62c },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x62c },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x605 },
- { 0x0000a092, 0x00204411, 0x000 },
- { 0x00000031, 0x00204a2d, 0x000 },
- { 0x0000a093, 0x00204411, 0x000 },
- { 0x00000032, 0x00204a2d, 0x000 },
- { 0x0000a2b6, 0x00204411, 0x000 },
- { 0x00000033, 0x00204a2d, 0x000 },
- { 0x0000a2ba, 0x00204411, 0x000 },
- { 0x00000034, 0x00204a2d, 0x000 },
- { 0x0000a2be, 0x00204411, 0x000 },
- { 0x00000035, 0x00204a2d, 0x000 },
- { 0x0000a2c2, 0x00204411, 0x000 },
- { 0x00000036, 0x00204a2d, 0x000 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x000001ff, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x62b },
- { 0x00000000, 0x00210221, 0x000 },
- { 0x00000000, 0x14c00000, 0x60e },
- { 0x0004a003, 0x00604411, 0x68d },
- { 0x0000a003, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x14c00000, 0x613 },
- { 0x0004a010, 0x00604411, 0x68d },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x62b },
- { 0x0004a011, 0x00604411, 0x68d },
- { 0x0000a011, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a012, 0x00604411, 0x68d },
- { 0x0000a012, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a013, 0x00604411, 0x68d },
- { 0x0000a013, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a014, 0x00604411, 0x68d },
- { 0x0000a014, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a015, 0x00604411, 0x68d },
- { 0x0000a015, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a016, 0x00604411, 0x68d },
- { 0x0000a016, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a017, 0x00604411, 0x68d },
- { 0x0000a017, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x0000002c, 0x0080062d, 0x000 },
- { 0xff000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000002, 0x00804811, 0x000 },
- { 0x00000000, 0x0ee00000, 0x63d },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000002, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x63b },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68d },
- { 0x00001000, 0x00200811, 0x000 },
- { 0x0000002b, 0x00203622, 0x000 },
- { 0x00000000, 0x00600000, 0x641 },
- { 0x00000000, 0x00600000, 0x5c9 },
- { 0x98000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00804811, 0x000 },
- { 0x00000000, 0xc0600000, 0x641 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000022, 0x00204811, 0x000 },
- { 0x89000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00404811, 0x62d },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00404811, 0x62d },
- { 0x00000000, 0x00600000, 0x65c },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0xc0204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x09800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x68d },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000004, 0x00404c11, 0x656 },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000004, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffffb, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffff7, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x01800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004217f, 0x00604411, 0x68d },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x68c },
- { 0x00000010, 0x00404c11, 0x672 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x38c00000, 0x000 },
- { 0x0000001d, 0x00200a2d, 0x000 },
- { 0x0000001e, 0x00200e2d, 0x000 },
- { 0x0000001f, 0x0020122d, 0x000 },
- { 0x00000020, 0x0020162d, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000004, 0x00301224, 0x000 },
- { 0x00000000, 0x002f0064, 0x000 },
- { 0x00000000, 0x0cc00000, 0x68b },
- { 0x00000003, 0x00281a22, 0x000 },
- { 0x00000008, 0x00221222, 0x000 },
- { 0xfffff000, 0x00281224, 0x000 },
- { 0x00000000, 0x002910c4, 0x000 },
- { 0x0000001f, 0x00403624, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x68d },
- { 0x9f000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x690 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x692 },
- { 0x9e000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x695 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0xc0204411, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000024, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000022, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00404811, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x01420502, 0x05c00250, 0x000 },
- { 0x01c30168, 0x043f05c0, 0x000 },
- { 0x02250209, 0x02500151, 0x000 },
- { 0x02230245, 0x02a00241, 0x000 },
- { 0x03d705c0, 0x05c005c0, 0x000 },
- { 0x0649064a, 0x031f05c0, 0x000 },
- { 0x05c005c5, 0x03200340, 0x000 },
- { 0x032a0282, 0x03420334, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c00551, 0x05c005c0, 0x000 },
- { 0x03ba05c0, 0x04bb0344, 0x000 },
- { 0x049a0450, 0x043d05c0, 0x000 },
- { 0x04d005c0, 0x044104dd, 0x000 },
- { 0x04500507, 0x03510375, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c005c0, 0x063f05c7, 0x000 },
- { 0x05c005c0, 0x000705c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x03f803ed, 0x04080406, 0x000 },
- { 0x040e040a, 0x040c0410, 0x000 },
- { 0x041c0418, 0x04240420, 0x000 },
- { 0x042c0428, 0x04340430, 0x000 },
- { 0x05c005c0, 0x043805c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x05c005c0, 0x05c005c0, 0x000 },
- { 0x00020679, 0x06970006, 0x000 },
-};
-
-static const u32 RV620_pfp_microcode[]={
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-
-static const u32 RV630_cp_microcode[][3]={
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0000ffff, 0x00284621, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00000000, 0x00e00000, 0x000 },
- { 0x00010000, 0xc0294620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x00000000, 0x00600000, 0x62e },
- { 0x00000000, 0x00600000, 0x642 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000f00, 0x00281622, 0x000 },
- { 0x00000008, 0x00211625, 0x000 },
- { 0x00000018, 0x00203625, 0x000 },
- { 0x8d000000, 0x00204411, 0x000 },
- { 0x00000004, 0x002f0225, 0x000 },
- { 0x00000000, 0x0ce00000, 0x018 },
- { 0x00412000, 0x00404811, 0x019 },
- { 0x00422000, 0x00204811, 0x000 },
- { 0x8e000000, 0x00204411, 0x000 },
- { 0x00000028, 0x00204a2d, 0x000 },
- { 0x90000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x0000000c, 0x00211622, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000019, 0x00211a22, 0x000 },
- { 0x00000004, 0x00281a26, 0x000 },
- { 0x00000000, 0x002914c5, 0x000 },
- { 0x00000019, 0x00203625, 0x000 },
- { 0x00000000, 0x003a1402, 0x000 },
- { 0x00000016, 0x00211625, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0xfffffffc, 0x00280e23, 0x000 },
- { 0x00000000, 0x002914a3, 0x000 },
- { 0x00000017, 0x00203625, 0x000 },
- { 0x00008000, 0x00280e22, 0x000 },
- { 0x00000007, 0x00220e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x20000000, 0x00280e22, 0x000 },
- { 0x00000006, 0x00210e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x00000000, 0x00220222, 0x000 },
- { 0x00000000, 0x14e00000, 0x038 },
- { 0x00000000, 0x2ee00000, 0x035 },
- { 0x00000000, 0x2ce00000, 0x037 },
- { 0x00000000, 0x00400e2d, 0x039 },
- { 0x00000008, 0x00200e2d, 0x000 },
- { 0x00000009, 0x0040122d, 0x046 },
- { 0x00000001, 0x00400e2d, 0x039 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x03e },
- { 0x00000008, 0x00401c11, 0x041 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x0000000f, 0x00281e27, 0x000 },
- { 0x00000003, 0x00221e27, 0x000 },
- { 0x7fc00000, 0x00281a23, 0x000 },
- { 0x00000014, 0x00211a26, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000008, 0x00221a26, 0x000 },
- { 0x00000000, 0x00290cc7, 0x000 },
- { 0x00000027, 0x00203624, 0x000 },
- { 0x00007f00, 0x00281221, 0x000 },
- { 0x00001400, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x04b },
- { 0x00000001, 0x00290e23, 0x000 },
- { 0x0000000e, 0x00203623, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfff80000, 0x00294a23, 0x000 },
- { 0x00000000, 0x003a2c02, 0x000 },
- { 0x00000002, 0x00220e2b, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x0000000f, 0x00203623, 0x000 },
- { 0x00001fff, 0x00294a23, 0x000 },
- { 0x00000027, 0x00204a2d, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000029, 0x00200e2d, 0x000 },
- { 0x060a0200, 0x00294a23, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14e00000, 0x061 },
- { 0x00000000, 0x2ee00000, 0x05f },
- { 0x00000000, 0x2ce00000, 0x05e },
- { 0x00000000, 0x00400e2d, 0x062 },
- { 0x00000001, 0x00400e2d, 0x062 },
- { 0x0000000a, 0x00200e2d, 0x000 },
- { 0x0000000b, 0x0040122d, 0x06a },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x7fc00000, 0x00281623, 0x000 },
- { 0x00000014, 0x00211625, 0x000 },
- { 0x00000001, 0x00331625, 0x000 },
- { 0x80000000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00290ca3, 0x000 },
- { 0x3ffffc00, 0x00290e23, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x06d },
- { 0x00000100, 0x00401c11, 0x070 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x000000f0, 0x00281e27, 0x000 },
- { 0x00000004, 0x00221e27, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0xfffff0ff, 0x00281a30, 0x000 },
- { 0x0000a028, 0x00204411, 0x000 },
- { 0x00000000, 0x002948e6, 0x000 },
- { 0x0000a018, 0x00204411, 0x000 },
- { 0x3fffffff, 0x00284a23, 0x000 },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000030, 0x0020162d, 0x000 },
- { 0x00000002, 0x00291625, 0x000 },
- { 0x00000030, 0x00203625, 0x000 },
- { 0x00000025, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a3, 0x000 },
- { 0x00000000, 0x0cc00000, 0x083 },
- { 0x00000026, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a4, 0x000 },
- { 0x00000000, 0x0cc00000, 0x084 },
- { 0x00000000, 0x00400000, 0x08a },
- { 0x00000025, 0x00203623, 0x000 },
- { 0x00000026, 0x00203624, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x08a },
- { 0x00000000, 0x00600000, 0x665 },
- { 0x00000000, 0x00600000, 0x659 },
- { 0x00000002, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x08d },
- { 0x00000012, 0xc0403620, 0x093 },
- { 0x00000000, 0x2ee00000, 0x091 },
- { 0x00000000, 0x2ce00000, 0x090 },
- { 0x00000002, 0x00400e2d, 0x092 },
- { 0x00000003, 0x00400e2d, 0x092 },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000012, 0x00203623, 0x000 },
- { 0x00000003, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x098 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x0a0 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x2ee00000, 0x09e },
- { 0x00000000, 0x2ce00000, 0x09d },
- { 0x00000002, 0x00400e2d, 0x09f },
- { 0x00000003, 0x00400e2d, 0x09f },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x003f0000, 0x00280e23, 0x000 },
- { 0x00000010, 0x00210e23, 0x000 },
- { 0x00000011, 0x00203623, 0x000 },
- { 0x0000001e, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0a7 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x0000001f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0aa },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000008, 0x00210e2b, 0x000 },
- { 0x0000007f, 0x00280e23, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0e1 },
- { 0x00000000, 0x27000000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0b3 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x0000000c, 0x00221e30, 0x000 },
- { 0x99800000, 0x00204411, 0x000 },
- { 0x00000004, 0x0020122d, 0x000 },
- { 0x00000008, 0x00221224, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00291ce4, 0x000 },
- { 0x00000000, 0x00604807, 0x12f },
- { 0x9b000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x9c000000, 0x00204411, 0x000 },
- { 0x00000000, 0x0033146f, 0x000 },
- { 0x00000001, 0x00333e23, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0x00203c05, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e007, 0x00204411, 0x000 },
- { 0x0000000f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0cb },
- { 0x00f8ff08, 0x00204811, 0x000 },
- { 0x98000000, 0x00404811, 0x0dc },
- { 0x000000f0, 0x00280e22, 0x000 },
- { 0x000000a0, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x0da },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d5 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d4 },
- { 0x00003f00, 0x00400c11, 0x0d6 },
- { 0x00001f00, 0x00400c11, 0x0d6 },
- { 0x00000f00, 0x00200c11, 0x000 },
- { 0x00380009, 0x00294a23, 0x000 },
- { 0x3f000000, 0x00280e2b, 0x000 },
- { 0x00000002, 0x00220e23, 0x000 },
- { 0x00000007, 0x00494a23, 0x0dc },
- { 0x00380f09, 0x00204811, 0x000 },
- { 0x68000007, 0x00204811, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000a202, 0x00204411, 0x000 },
- { 0x00ff0000, 0x00280e22, 0x000 },
- { 0x00000080, 0x00294a23, 0x000 },
- { 0x00000027, 0x00200e2d, 0x000 },
- { 0x00000026, 0x0020122d, 0x000 },
- { 0x00000000, 0x002f0083, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0ea },
- { 0x00000000, 0x00600000, 0x65f },
- { 0x00000000, 0x00400000, 0x0eb },
- { 0x00000000, 0x00600000, 0x662 },
- { 0x00000007, 0x0020222d, 0x000 },
- { 0x00000005, 0x00220e22, 0x000 },
- { 0x00100000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x000000ef, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000003, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x0f8 },
- { 0x0000000b, 0x00210228, 0x000 },
- { 0x00000000, 0x14c00000, 0x0f8 },
- { 0x00000400, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000001c, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x0fd },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000001e, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x10b },
- { 0x0000a30f, 0x00204411, 0x000 },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x104 },
- { 0xffffffff, 0x00404811, 0x10b },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x107 },
- { 0x0000ffff, 0x00404811, 0x10b },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x10a },
- { 0x000000ff, 0x00404811, 0x10b },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0002c400, 0x00204411, 0x000 },
- { 0x0000001f, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x112 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000018, 0x40224a20, 0x000 },
- { 0x00000010, 0xc0424a20, 0x114 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000000a, 0x00201011, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x11b },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00531224, 0x117 },
- { 0xffbfffff, 0x00283a2e, 0x000 },
- { 0x0000001b, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x12e },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0x00000018, 0x00220e30, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e00e, 0x00204411, 0x000 },
- { 0x07f8ff08, 0x00204811, 0x000 },
- { 0x00000000, 0x00294a23, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x00800000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204806, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x68a },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x689 },
- { 0x00000004, 0x00404c11, 0x135 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x0000001c, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x13c },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40280620, 0x000 },
- { 0x00000010, 0xc0210a20, 0x000 },
- { 0x00000000, 0x00341461, 0x000 },
- { 0x00000000, 0x00741882, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x147 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0681a20, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x158 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000001, 0x00300a2f, 0x000 },
- { 0x00000001, 0x00210a22, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600000, 0x18f },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00202c08, 0x000 },
- { 0x00000000, 0x00202411, 0x000 },
- { 0x00000000, 0x00202811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000002, 0x00221e29, 0x000 },
- { 0x00000000, 0x007048eb, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000001, 0x40330620, 0x000 },
- { 0x00000000, 0xc0302409, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ae00000, 0x181 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x186 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x186 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000001, 0x00530621, 0x182 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0604800, 0x197 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000011, 0x0020062d, 0x000 },
- { 0x00000000, 0x0078042a, 0x2fb },
- { 0x00000000, 0x00202809, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x174 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x194 },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x46000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x19b },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00804811, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40281620, 0x000 },
- { 0x00000010, 0xc0811a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000008, 0x00221e30, 0x000 },
- { 0x00000029, 0x00201a2d, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfffbff09, 0x00204811, 0x000 },
- { 0x0000000f, 0x0020222d, 0x000 },
- { 0x00001fff, 0x00294a28, 0x000 },
- { 0x00000006, 0x0020222d, 0x000 },
- { 0x00000000, 0x002920e8, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000100, 0x00201811, 0x000 },
- { 0x00000008, 0x00621e28, 0x12f },
- { 0x00000008, 0x00822228, 0x000 },
- { 0x0002c000, 0x00204411, 0x000 },
- { 0x00000015, 0x00600e2d, 0x1bd },
- { 0x00000016, 0x00600e2d, 0x1bd },
- { 0x0000c008, 0x00204411, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000000, 0x14c00000, 0x1b9 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x39000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00804802, 0x000 },
- { 0x00000018, 0x00202e2d, 0x000 },
- { 0x00000000, 0x003b0d63, 0x000 },
- { 0x00000008, 0x00224a23, 0x000 },
- { 0x00000010, 0x00224a23, 0x000 },
- { 0x00000018, 0x00224a23, 0x000 },
- { 0x00000000, 0x00804803, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000007, 0x0021062f, 0x000 },
- { 0x00000013, 0x00200a2d, 0x000 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000ffff, 0x40282220, 0x000 },
- { 0x0000000f, 0x00262228, 0x000 },
- { 0x00000010, 0x40212620, 0x000 },
- { 0x0000000f, 0x00262629, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1e0 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000081, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000080, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1dc },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1d8 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000001f, 0x00280a22, 0x000 },
- { 0x0000001f, 0x00282a2a, 0x000 },
- { 0x00000001, 0x00530621, 0x1d1 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000002, 0x00304a2f, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000001, 0x00301e2f, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1e5 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x0000000f, 0x00260e23, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000000f, 0x00261224, 0x000 },
- { 0x00000000, 0x00201411, 0x000 },
- { 0x00000000, 0x00601811, 0x2bb },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022b, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1f8 },
- { 0x00000010, 0x00221628, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a29, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x0020480a, 0x000 },
- { 0x00000000, 0x00202c11, 0x000 },
- { 0x00000010, 0x00221623, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a24, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x00731503, 0x205 },
- { 0x00000000, 0x00201805, 0x000 },
- { 0x00000000, 0x00731524, 0x205 },
- { 0x00000000, 0x002d14c5, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00000000, 0x00202003, 0x000 },
- { 0x00000000, 0x00802404, 0x000 },
- { 0x0000000f, 0x00210225, 0x000 },
- { 0x00000000, 0x14c00000, 0x689 },
- { 0x00000000, 0x002b1405, 0x000 },
- { 0x00000001, 0x00901625, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00294a22, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a21, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000ffff, 0x40281220, 0x000 },
- { 0x00000010, 0xc0211a20, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211620, 0x000 },
- { 0x00000000, 0x00741465, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00000001, 0x00330621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0cc00000, 0x219 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x212 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x642 },
- { 0x00000000, 0x0040040f, 0x213 },
- { 0x00000000, 0x00600000, 0x62e },
- { 0x00000000, 0x00600000, 0x642 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00000000, 0x00600000, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ae00000, 0x232 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x236 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x236 },
- { 0x00000000, 0xc0404800, 0x233 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x00600411, 0x2fb },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x62e },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000018, 0x40210a20, 0x000 },
- { 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x24c },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x00080101, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x251 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000010, 0x00600411, 0x315 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00000000, 0x00600000, 0x27c },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000001, 0x00211e27, 0x000 },
- { 0x00000000, 0x14e00000, 0x26a },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x0000ffff, 0x00281e27, 0x000 },
- { 0x00000000, 0x00341c27, 0x000 },
- { 0x00000000, 0x12c00000, 0x25f },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e5, 0x000 },
- { 0x00000000, 0x08c00000, 0x262 },
- { 0x00000000, 0x00201407, 0x000 },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00211e27, 0x000 },
- { 0x00000000, 0x00341c47, 0x000 },
- { 0x00000000, 0x12c00000, 0x267 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x08c00000, 0x26a },
- { 0x00000000, 0x00201807, 0x000 },
- { 0x00000000, 0x00600000, 0x2c1 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000000, 0x00342023, 0x000 },
- { 0x00000000, 0x12c00000, 0x272 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x271 },
- { 0x00000016, 0x00404811, 0x276 },
- { 0x00000018, 0x00404811, 0x276 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x275 },
- { 0x00000017, 0x00404811, 0x276 },
- { 0x00000019, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00604411, 0x2e9 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x256 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000010, 0x40210620, 0x000 },
- { 0x0000ffff, 0xc0280a20, 0x000 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0881a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x00000000, 0x00600000, 0x62e },
- { 0x00000000, 0xc0600000, 0x2a3 },
- { 0x00000005, 0x00200a2d, 0x000 },
- { 0x00000008, 0x00220a22, 0x000 },
- { 0x0000002b, 0x00201a2d, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00007000, 0x00281e27, 0x000 },
- { 0x00000000, 0x00311ce6, 0x000 },
- { 0x0000002a, 0x00201a2d, 0x000 },
- { 0x0000000c, 0x00221a26, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x06e00000, 0x292 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x0000002b, 0x00203623, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00691ce2, 0x12f },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x29d },
- { 0x00000001, 0x00333e2f, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000001c, 0x00403627, 0x000 },
- { 0x0000000c, 0xc0220a20, 0x000 },
- { 0x00000029, 0x00203622, 0x000 },
- { 0x00000028, 0xc0403620, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000009, 0x00204811, 0x000 },
- { 0xa1000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce3, 0x000 },
- { 0x00000021, 0x00203627, 0x000 },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce4, 0x000 },
- { 0x00000022, 0x00203627, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a3, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x00000021, 0x00203623, 0x000 },
- { 0x00000022, 0x00203624, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000000, 0x00311cc4, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14c00000, 0x2dc },
- { 0x00000000, 0x00400000, 0x2d9 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2d9 },
- { 0x00000003, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2dc },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e1, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a1, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e2, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000000, 0x00600000, 0x665 },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00600000, 0x65c },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2a7 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x0000001a, 0x00201e2d, 0x000 },
- { 0x0000001b, 0x0080222d, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca1, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x003808c5, 0x000 },
- { 0x00000000, 0x00300841, 0x000 },
- { 0x00000001, 0x00220a22, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000017, 0x0020222d, 0x000 },
- { 0x00000000, 0x14c00000, 0x318 },
- { 0xffffffef, 0x00280621, 0x000 },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x0000f8e0, 0x00204411, 0x000 },
- { 0x00000000, 0x00294901, 0x000 },
- { 0x00000000, 0x00894901, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00804811, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x97000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00002257, 0x00204411, 0x000 },
- { 0x00000003, 0xc0484a20, 0x000 },
- { 0x0000225d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x642 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x00000001, 0x40304a20, 0x000 },
- { 0x00000002, 0xc0304a20, 0x000 },
- { 0x00000001, 0x00530a22, 0x34b },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000018, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x354 },
- { 0x00000014, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x364 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00604802, 0x36e },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x36a },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35f },
- { 0x00000028, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5bd },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35f },
- { 0x0000002c, 0x00203626, 0x000 },
- { 0x00000049, 0x00201811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0cc00000, 0x370 },
- { 0x0000002c, 0x00801a2d, 0x000 },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x00000015, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x386 },
- { 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3b1 },
- { 0x00000016, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3b5 },
- { 0x00000020, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x39c },
- { 0x0000000f, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a8 },
- { 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a8 },
- { 0x0000001e, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x390 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x08000000, 0x00290a22, 0x000 },
- { 0x00000003, 0x40210e20, 0x000 },
- { 0x0000000c, 0xc0211220, 0x000 },
- { 0x00080000, 0x00281224, 0x000 },
- { 0x00000014, 0xc0221620, 0x000 },
- { 0x00000000, 0x002914a4, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x002948a2, 0x000 },
- { 0x0000a1fe, 0x00204411, 0x000 },
- { 0x00000000, 0x00404803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000015, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x392 },
- { 0x0000210e, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000017, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000003, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x39e },
- { 0x00002108, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x80000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000010, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x3ae },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000006, 0x00404811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x0000001d, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x3ce },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000018, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x3c0 },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0xbabecafe, 0x00204811, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000004, 0x00404811, 0x000 },
- { 0x00002170, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000a, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x3d3 },
- { 0x8c000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00003fff, 0x40280a20, 0x000 },
- { 0x80000000, 0x40280e20, 0x000 },
- { 0x40000000, 0xc0281220, 0x000 },
- { 0x00040000, 0x00694622, 0x68a },
- { 0x00000000, 0x00201410, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x3e1 },
- { 0x00000000, 0xc0401800, 0x3e4 },
- { 0x00003fff, 0xc0281a20, 0x000 },
- { 0x00040000, 0x00694626, 0x68a },
- { 0x00000000, 0x00201810, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x3e7 },
- { 0x00000000, 0xc0401c00, 0x3ea },
- { 0x00003fff, 0xc0281e20, 0x000 },
- { 0x00040000, 0x00694627, 0x68a },
- { 0x00000000, 0x00201c10, 0x000 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0x002820c5, 0x000 },
- { 0x00000000, 0x004948e8, 0x000 },
- { 0xa5800000, 0x00200811, 0x000 },
- { 0x00002000, 0x00200c11, 0x000 },
- { 0x83000000, 0x00604411, 0x412 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x0000001f, 0xc0210220, 0x000 },
- { 0x00000000, 0x14c00000, 0x3f7 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0000ffff, 0xc0481220, 0x3ff },
- { 0xa7800000, 0x00200811, 0x000 },
- { 0x0000a000, 0x00200c11, 0x000 },
- { 0x83000000, 0x00604411, 0x412 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x83000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00304883, 0x000 },
- { 0x84000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1d000000, 0x000 },
- { 0x83000000, 0x00604411, 0x412 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0xa9800000, 0x00200811, 0x000 },
- { 0x0000c000, 0x00400c11, 0x3fa },
- { 0xab800000, 0x00200811, 0x000 },
- { 0x0000f8e0, 0x00400c11, 0x3fa },
- { 0xad800000, 0x00200811, 0x000 },
- { 0x0000f880, 0x00400c11, 0x3fa },
- { 0xb3800000, 0x00200811, 0x000 },
- { 0x0000f3fc, 0x00400c11, 0x3fa },
- { 0xaf800000, 0x00200811, 0x000 },
- { 0x0000e000, 0x00400c11, 0x3fa },
- { 0xb1800000, 0x00200811, 0x000 },
- { 0x0000f000, 0x00400c11, 0x3fa },
- { 0x83000000, 0x00204411, 0x000 },
- { 0x00002148, 0x00204811, 0x000 },
- { 0x84000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1d000000, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x01182000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
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- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
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- { 0x00000000, 0x00400000, 0x463 },
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- { 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x46a },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x04e00000, 0x483 },
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- { 0x00000000, 0x002f00c9, 0x000 },
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- { 0x00000000, 0x14e00000, 0x4ad },
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- { 0x00000000, 0xc0604800, 0x68f },
- { 0x00000000, 0x00400000, 0x4c4 },
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- { 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0xc0294620, 0x000 },
- { 0x00000000, 0xc0600000, 0x68a },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x4cb },
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- { 0x00000000, 0xc0204800, 0x000 },
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- { 0x00000001, 0x00204811, 0x000 },
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- { 0x00000001, 0x00210221, 0x000 },
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- { 0x00000001, 0x00333e2f, 0x000 },
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- { 0xefffffff, 0x00283a2e, 0x000 },
- { 0x00000000, 0x004938ce, 0x678 },
- { 0x00000001, 0x40280a20, 0x000 },
- { 0x00000006, 0x40280e20, 0x000 },
- { 0x00000300, 0xc0281220, 0x000 },
- { 0x00000008, 0x00211224, 0x000 },
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- { 0x00000000, 0x14c00000, 0x563 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00002258, 0x00300a24, 0x000 },
- { 0x00040000, 0x00694622, 0x68a },
- { 0x00002169, 0x00204411, 0x000 },
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- { 0x00000000, 0xc0201c10, 0x000 },
- { 0x00000000, 0xc0400000, 0x579 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x56b },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
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- { 0x00040000, 0x00694622, 0x68a },
- { 0x00000000, 0xc0201c10, 0x000 },
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- { 0x00000000, 0x0cc00000, 0x56f },
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- { 0x00000000, 0xc0400000, 0x579 },
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- { 0x00000000, 0xc0604800, 0x68f },
- { 0x00000000, 0x00401c10, 0x579 },
- { 0x00000000, 0xc0200000, 0x000 },
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- { 0x00000000, 0x00600000, 0x5c6 },
- { 0x00000000, 0x002f0224, 0x000 },
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- { 0x0000a2b7, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x68a },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
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- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000001, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x59d },
- { 0x0000a2bb, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x68a },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
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- { 0x00000000, 0x00e00000, 0x59b },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000002, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5ae },
- { 0x0000a2bf, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2be, 0x00604411, 0x68a },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
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- { 0x0000a2c6, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x5ac },
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- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x0000a2c3, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x68a },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
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- { 0x00000000, 0x003048e9, 0x000 },
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- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x85000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x0000304a, 0x00204411, 0x000 },
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- { 0xa4000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0xc0600000, 0x5c6 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000002c, 0x00203621, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0230, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5cd },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000030, 0x00403621, 0x5e0 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x5e0 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a092, 0x00604411, 0x68a },
- { 0x00000031, 0x00203630, 0x000 },
- { 0x0004a093, 0x00604411, 0x68a },
- { 0x00000032, 0x00203630, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x68a },
- { 0x00000033, 0x00203630, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x68a },
- { 0x00000034, 0x00203630, 0x000 },
- { 0x0004a2be, 0x00604411, 0x68a },
- { 0x00000035, 0x00203630, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x68a },
- { 0x00000036, 0x00203630, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000005, 0x00204811, 0x000 },
- { 0x0000a1f4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x88000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000001, 0x002f0230, 0x000 },
- { 0x00000000, 0x0ce00000, 0x629 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x629 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x602 },
- { 0x0000a092, 0x00204411, 0x000 },
- { 0x00000031, 0x00204a2d, 0x000 },
- { 0x0000a093, 0x00204411, 0x000 },
- { 0x00000032, 0x00204a2d, 0x000 },
- { 0x0000a2b6, 0x00204411, 0x000 },
- { 0x00000033, 0x00204a2d, 0x000 },
- { 0x0000a2ba, 0x00204411, 0x000 },
- { 0x00000034, 0x00204a2d, 0x000 },
- { 0x0000a2be, 0x00204411, 0x000 },
- { 0x00000035, 0x00204a2d, 0x000 },
- { 0x0000a2c2, 0x00204411, 0x000 },
- { 0x00000036, 0x00204a2d, 0x000 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x000001ff, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x628 },
- { 0x00000000, 0x00210221, 0x000 },
- { 0x00000000, 0x14c00000, 0x60b },
- { 0x0004a003, 0x00604411, 0x68a },
- { 0x0000a003, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x14c00000, 0x610 },
- { 0x0004a010, 0x00604411, 0x68a },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x628 },
- { 0x0004a011, 0x00604411, 0x68a },
- { 0x0000a011, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a012, 0x00604411, 0x68a },
- { 0x0000a012, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a013, 0x00604411, 0x68a },
- { 0x0000a013, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a014, 0x00604411, 0x68a },
- { 0x0000a014, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a015, 0x00604411, 0x68a },
- { 0x0000a015, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a016, 0x00604411, 0x68a },
- { 0x0000a016, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a017, 0x00604411, 0x68a },
- { 0x0000a017, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x0000002c, 0x0080062d, 0x000 },
- { 0xff000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000002, 0x00804811, 0x000 },
- { 0x00000000, 0x0ee00000, 0x63a },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000002, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x638 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x00001000, 0x00200811, 0x000 },
- { 0x0000002b, 0x00203622, 0x000 },
- { 0x00000000, 0x00600000, 0x63e },
- { 0x00000000, 0x00600000, 0x5c6 },
- { 0x98000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00804811, 0x000 },
- { 0x00000000, 0xc0600000, 0x63e },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000022, 0x00204811, 0x000 },
- { 0x89000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00404811, 0x62a },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00404811, 0x62a },
- { 0x00000000, 0x00600000, 0x659 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0xc0204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x09800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x68a },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000004, 0x00404c11, 0x653 },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000004, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffffb, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffff7, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x01800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004217f, 0x00604411, 0x68a },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x689 },
- { 0x00000010, 0x00404c11, 0x66f },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x38c00000, 0x000 },
- { 0x0000001d, 0x00200a2d, 0x000 },
- { 0x0000001e, 0x00200e2d, 0x000 },
- { 0x0000001f, 0x0020122d, 0x000 },
- { 0x00000020, 0x0020162d, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000004, 0x00301224, 0x000 },
- { 0x00000000, 0x002f0064, 0x000 },
- { 0x00000000, 0x0cc00000, 0x688 },
- { 0x00000003, 0x00281a22, 0x000 },
- { 0x00000008, 0x00221222, 0x000 },
- { 0xfffff000, 0x00281224, 0x000 },
- { 0x00000000, 0x002910c4, 0x000 },
- { 0x0000001f, 0x00403624, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x68a },
- { 0x9f000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x68d },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x68f },
- { 0x9e000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x692 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0xc0204411, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000024, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000022, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00404811, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x014204ff, 0x05bd0250, 0x000 },
- { 0x01c30168, 0x043f05bd, 0x000 },
- { 0x02250209, 0x02500151, 0x000 },
- { 0x02230245, 0x02a00241, 0x000 },
- { 0x03d705bd, 0x05bd05bd, 0x000 },
- { 0x06460647, 0x031f05bd, 0x000 },
- { 0x05bd05c2, 0x03200340, 0x000 },
- { 0x032a0282, 0x03420334, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd054e, 0x05bd05bd, 0x000 },
- { 0x03ba05bd, 0x04b80344, 0x000 },
- { 0x0497044d, 0x043d05bd, 0x000 },
- { 0x04cd05bd, 0x044104da, 0x000 },
- { 0x044d0504, 0x03510375, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd05bd, 0x063c05c4, 0x000 },
- { 0x05bd05bd, 0x000705bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x03f803ed, 0x04080406, 0x000 },
- { 0x040e040a, 0x040c0410, 0x000 },
- { 0x041c0418, 0x04240420, 0x000 },
- { 0x042c0428, 0x04340430, 0x000 },
- { 0x05bd05bd, 0x043805bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x00020676, 0x06940006, 0x000 },
-};
-
-static const u32 RV630_pfp_microcode[]={
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-
-static const u32 RV635_cp_microcode[][3]={
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0000ffff, 0x00284621, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00000000, 0x00e00000, 0x000 },
- { 0x00010000, 0xc0294620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x00000000, 0x00600000, 0x62e },
- { 0x00000000, 0x00600000, 0x642 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000f00, 0x00281622, 0x000 },
- { 0x00000008, 0x00211625, 0x000 },
- { 0x00000018, 0x00203625, 0x000 },
- { 0x8d000000, 0x00204411, 0x000 },
- { 0x00000004, 0x002f0225, 0x000 },
- { 0x00000000, 0x0ce00000, 0x018 },
- { 0x00412000, 0x00404811, 0x019 },
- { 0x00422000, 0x00204811, 0x000 },
- { 0x8e000000, 0x00204411, 0x000 },
- { 0x00000028, 0x00204a2d, 0x000 },
- { 0x90000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x0000000c, 0x00211622, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000019, 0x00211a22, 0x000 },
- { 0x00000004, 0x00281a26, 0x000 },
- { 0x00000000, 0x002914c5, 0x000 },
- { 0x00000019, 0x00203625, 0x000 },
- { 0x00000000, 0x003a1402, 0x000 },
- { 0x00000016, 0x00211625, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0xfffffffc, 0x00280e23, 0x000 },
- { 0x00000000, 0x002914a3, 0x000 },
- { 0x00000017, 0x00203625, 0x000 },
- { 0x00008000, 0x00280e22, 0x000 },
- { 0x00000007, 0x00220e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x20000000, 0x00280e22, 0x000 },
- { 0x00000006, 0x00210e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x00000000, 0x00220222, 0x000 },
- { 0x00000000, 0x14e00000, 0x038 },
- { 0x00000000, 0x2ee00000, 0x035 },
- { 0x00000000, 0x2ce00000, 0x037 },
- { 0x00000000, 0x00400e2d, 0x039 },
- { 0x00000008, 0x00200e2d, 0x000 },
- { 0x00000009, 0x0040122d, 0x046 },
- { 0x00000001, 0x00400e2d, 0x039 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x03e },
- { 0x00000008, 0x00401c11, 0x041 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x0000000f, 0x00281e27, 0x000 },
- { 0x00000003, 0x00221e27, 0x000 },
- { 0x7fc00000, 0x00281a23, 0x000 },
- { 0x00000014, 0x00211a26, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000008, 0x00221a26, 0x000 },
- { 0x00000000, 0x00290cc7, 0x000 },
- { 0x00000027, 0x00203624, 0x000 },
- { 0x00007f00, 0x00281221, 0x000 },
- { 0x00001400, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x04b },
- { 0x00000001, 0x00290e23, 0x000 },
- { 0x0000000e, 0x00203623, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfff80000, 0x00294a23, 0x000 },
- { 0x00000000, 0x003a2c02, 0x000 },
- { 0x00000002, 0x00220e2b, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x0000000f, 0x00203623, 0x000 },
- { 0x00001fff, 0x00294a23, 0x000 },
- { 0x00000027, 0x00204a2d, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000029, 0x00200e2d, 0x000 },
- { 0x060a0200, 0x00294a23, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14e00000, 0x061 },
- { 0x00000000, 0x2ee00000, 0x05f },
- { 0x00000000, 0x2ce00000, 0x05e },
- { 0x00000000, 0x00400e2d, 0x062 },
- { 0x00000001, 0x00400e2d, 0x062 },
- { 0x0000000a, 0x00200e2d, 0x000 },
- { 0x0000000b, 0x0040122d, 0x06a },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x7fc00000, 0x00281623, 0x000 },
- { 0x00000014, 0x00211625, 0x000 },
- { 0x00000001, 0x00331625, 0x000 },
- { 0x80000000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00290ca3, 0x000 },
- { 0x3ffffc00, 0x00290e23, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x06d },
- { 0x00000100, 0x00401c11, 0x070 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x000000f0, 0x00281e27, 0x000 },
- { 0x00000004, 0x00221e27, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0xfffff0ff, 0x00281a30, 0x000 },
- { 0x0000a028, 0x00204411, 0x000 },
- { 0x00000000, 0x002948e6, 0x000 },
- { 0x0000a018, 0x00204411, 0x000 },
- { 0x3fffffff, 0x00284a23, 0x000 },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000030, 0x0020162d, 0x000 },
- { 0x00000002, 0x00291625, 0x000 },
- { 0x00000030, 0x00203625, 0x000 },
- { 0x00000025, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a3, 0x000 },
- { 0x00000000, 0x0cc00000, 0x083 },
- { 0x00000026, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a4, 0x000 },
- { 0x00000000, 0x0cc00000, 0x084 },
- { 0x00000000, 0x00400000, 0x08a },
- { 0x00000025, 0x00203623, 0x000 },
- { 0x00000026, 0x00203624, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x08a },
- { 0x00000000, 0x00600000, 0x665 },
- { 0x00000000, 0x00600000, 0x659 },
- { 0x00000002, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x08d },
- { 0x00000012, 0xc0403620, 0x093 },
- { 0x00000000, 0x2ee00000, 0x091 },
- { 0x00000000, 0x2ce00000, 0x090 },
- { 0x00000002, 0x00400e2d, 0x092 },
- { 0x00000003, 0x00400e2d, 0x092 },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000012, 0x00203623, 0x000 },
- { 0x00000003, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x098 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x0a0 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x2ee00000, 0x09e },
- { 0x00000000, 0x2ce00000, 0x09d },
- { 0x00000002, 0x00400e2d, 0x09f },
- { 0x00000003, 0x00400e2d, 0x09f },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x003f0000, 0x00280e23, 0x000 },
- { 0x00000010, 0x00210e23, 0x000 },
- { 0x00000011, 0x00203623, 0x000 },
- { 0x0000001e, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0a7 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x0000001f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0aa },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000008, 0x00210e2b, 0x000 },
- { 0x0000007f, 0x00280e23, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0e1 },
- { 0x00000000, 0x27000000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0b3 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x0000000c, 0x00221e30, 0x000 },
- { 0x99800000, 0x00204411, 0x000 },
- { 0x00000004, 0x0020122d, 0x000 },
- { 0x00000008, 0x00221224, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00291ce4, 0x000 },
- { 0x00000000, 0x00604807, 0x12f },
- { 0x9b000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x9c000000, 0x00204411, 0x000 },
- { 0x00000000, 0x0033146f, 0x000 },
- { 0x00000001, 0x00333e23, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0x00203c05, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e007, 0x00204411, 0x000 },
- { 0x0000000f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0cb },
- { 0x00f8ff08, 0x00204811, 0x000 },
- { 0x98000000, 0x00404811, 0x0dc },
- { 0x000000f0, 0x00280e22, 0x000 },
- { 0x000000a0, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x0da },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d5 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d4 },
- { 0x00003f00, 0x00400c11, 0x0d6 },
- { 0x00001f00, 0x00400c11, 0x0d6 },
- { 0x00000f00, 0x00200c11, 0x000 },
- { 0x00380009, 0x00294a23, 0x000 },
- { 0x3f000000, 0x00280e2b, 0x000 },
- { 0x00000002, 0x00220e23, 0x000 },
- { 0x00000007, 0x00494a23, 0x0dc },
- { 0x00380f09, 0x00204811, 0x000 },
- { 0x68000007, 0x00204811, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000a202, 0x00204411, 0x000 },
- { 0x00ff0000, 0x00280e22, 0x000 },
- { 0x00000080, 0x00294a23, 0x000 },
- { 0x00000027, 0x00200e2d, 0x000 },
- { 0x00000026, 0x0020122d, 0x000 },
- { 0x00000000, 0x002f0083, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0ea },
- { 0x00000000, 0x00600000, 0x65f },
- { 0x00000000, 0x00400000, 0x0eb },
- { 0x00000000, 0x00600000, 0x662 },
- { 0x00000007, 0x0020222d, 0x000 },
- { 0x00000005, 0x00220e22, 0x000 },
- { 0x00100000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x000000ef, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000003, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x0f8 },
- { 0x0000000b, 0x00210228, 0x000 },
- { 0x00000000, 0x14c00000, 0x0f8 },
- { 0x00000400, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000001c, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x0fd },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000001e, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x10b },
- { 0x0000a30f, 0x00204411, 0x000 },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x104 },
- { 0xffffffff, 0x00404811, 0x10b },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x107 },
- { 0x0000ffff, 0x00404811, 0x10b },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x10a },
- { 0x000000ff, 0x00404811, 0x10b },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0002c400, 0x00204411, 0x000 },
- { 0x0000001f, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x112 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000018, 0x40224a20, 0x000 },
- { 0x00000010, 0xc0424a20, 0x114 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000000a, 0x00201011, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x11b },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00531224, 0x117 },
- { 0xffbfffff, 0x00283a2e, 0x000 },
- { 0x0000001b, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x12e },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0x00000018, 0x00220e30, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e00e, 0x00204411, 0x000 },
- { 0x07f8ff08, 0x00204811, 0x000 },
- { 0x00000000, 0x00294a23, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x00800000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204806, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x68a },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x689 },
- { 0x00000004, 0x00404c11, 0x135 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x0000001c, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x13c },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40280620, 0x000 },
- { 0x00000010, 0xc0210a20, 0x000 },
- { 0x00000000, 0x00341461, 0x000 },
- { 0x00000000, 0x00741882, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x147 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0681a20, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x158 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000001, 0x00300a2f, 0x000 },
- { 0x00000001, 0x00210a22, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600000, 0x18f },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00202c08, 0x000 },
- { 0x00000000, 0x00202411, 0x000 },
- { 0x00000000, 0x00202811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000002, 0x00221e29, 0x000 },
- { 0x00000000, 0x007048eb, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000001, 0x40330620, 0x000 },
- { 0x00000000, 0xc0302409, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ae00000, 0x181 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x186 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x186 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000001, 0x00530621, 0x182 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0604800, 0x197 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000011, 0x0020062d, 0x000 },
- { 0x00000000, 0x0078042a, 0x2fb },
- { 0x00000000, 0x00202809, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x174 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x194 },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x46000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x19b },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00804811, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40281620, 0x000 },
- { 0x00000010, 0xc0811a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000008, 0x00221e30, 0x000 },
- { 0x00000029, 0x00201a2d, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfffbff09, 0x00204811, 0x000 },
- { 0x0000000f, 0x0020222d, 0x000 },
- { 0x00001fff, 0x00294a28, 0x000 },
- { 0x00000006, 0x0020222d, 0x000 },
- { 0x00000000, 0x002920e8, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000100, 0x00201811, 0x000 },
- { 0x00000008, 0x00621e28, 0x12f },
- { 0x00000008, 0x00822228, 0x000 },
- { 0x0002c000, 0x00204411, 0x000 },
- { 0x00000015, 0x00600e2d, 0x1bd },
- { 0x00000016, 0x00600e2d, 0x1bd },
- { 0x0000c008, 0x00204411, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000000, 0x14c00000, 0x1b9 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x39000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00804802, 0x000 },
- { 0x00000018, 0x00202e2d, 0x000 },
- { 0x00000000, 0x003b0d63, 0x000 },
- { 0x00000008, 0x00224a23, 0x000 },
- { 0x00000010, 0x00224a23, 0x000 },
- { 0x00000018, 0x00224a23, 0x000 },
- { 0x00000000, 0x00804803, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000007, 0x0021062f, 0x000 },
- { 0x00000013, 0x00200a2d, 0x000 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000ffff, 0x40282220, 0x000 },
- { 0x0000000f, 0x00262228, 0x000 },
- { 0x00000010, 0x40212620, 0x000 },
- { 0x0000000f, 0x00262629, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1e0 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000081, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000080, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1dc },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1d8 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000001f, 0x00280a22, 0x000 },
- { 0x0000001f, 0x00282a2a, 0x000 },
- { 0x00000001, 0x00530621, 0x1d1 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000002, 0x00304a2f, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000001, 0x00301e2f, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1e5 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x0000000f, 0x00260e23, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000000f, 0x00261224, 0x000 },
- { 0x00000000, 0x00201411, 0x000 },
- { 0x00000000, 0x00601811, 0x2bb },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022b, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1f8 },
- { 0x00000010, 0x00221628, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a29, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x0020480a, 0x000 },
- { 0x00000000, 0x00202c11, 0x000 },
- { 0x00000010, 0x00221623, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a24, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x00731503, 0x205 },
- { 0x00000000, 0x00201805, 0x000 },
- { 0x00000000, 0x00731524, 0x205 },
- { 0x00000000, 0x002d14c5, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00000000, 0x00202003, 0x000 },
- { 0x00000000, 0x00802404, 0x000 },
- { 0x0000000f, 0x00210225, 0x000 },
- { 0x00000000, 0x14c00000, 0x689 },
- { 0x00000000, 0x002b1405, 0x000 },
- { 0x00000001, 0x00901625, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00294a22, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a21, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000ffff, 0x40281220, 0x000 },
- { 0x00000010, 0xc0211a20, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211620, 0x000 },
- { 0x00000000, 0x00741465, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00000001, 0x00330621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0cc00000, 0x219 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x212 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x642 },
- { 0x00000000, 0x0040040f, 0x213 },
- { 0x00000000, 0x00600000, 0x62e },
- { 0x00000000, 0x00600000, 0x642 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00000000, 0x00600000, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ae00000, 0x232 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x236 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x236 },
- { 0x00000000, 0xc0404800, 0x233 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x00600411, 0x2fb },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x62e },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000018, 0x40210a20, 0x000 },
- { 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x24c },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x00080101, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x251 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000010, 0x00600411, 0x315 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00000000, 0x00600000, 0x27c },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000001, 0x00211e27, 0x000 },
- { 0x00000000, 0x14e00000, 0x26a },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x0000ffff, 0x00281e27, 0x000 },
- { 0x00000000, 0x00341c27, 0x000 },
- { 0x00000000, 0x12c00000, 0x25f },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e5, 0x000 },
- { 0x00000000, 0x08c00000, 0x262 },
- { 0x00000000, 0x00201407, 0x000 },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00211e27, 0x000 },
- { 0x00000000, 0x00341c47, 0x000 },
- { 0x00000000, 0x12c00000, 0x267 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x08c00000, 0x26a },
- { 0x00000000, 0x00201807, 0x000 },
- { 0x00000000, 0x00600000, 0x2c1 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000000, 0x00342023, 0x000 },
- { 0x00000000, 0x12c00000, 0x272 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x271 },
- { 0x00000016, 0x00404811, 0x276 },
- { 0x00000018, 0x00404811, 0x276 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x275 },
- { 0x00000017, 0x00404811, 0x276 },
- { 0x00000019, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00604411, 0x2e9 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x256 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000010, 0x40210620, 0x000 },
- { 0x0000ffff, 0xc0280a20, 0x000 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0881a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x00000000, 0x00600000, 0x62e },
- { 0x00000000, 0xc0600000, 0x2a3 },
- { 0x00000005, 0x00200a2d, 0x000 },
- { 0x00000008, 0x00220a22, 0x000 },
- { 0x0000002b, 0x00201a2d, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00007000, 0x00281e27, 0x000 },
- { 0x00000000, 0x00311ce6, 0x000 },
- { 0x0000002a, 0x00201a2d, 0x000 },
- { 0x0000000c, 0x00221a26, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x06e00000, 0x292 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x0000002b, 0x00203623, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00691ce2, 0x12f },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x29d },
- { 0x00000001, 0x00333e2f, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000001c, 0x00403627, 0x000 },
- { 0x0000000c, 0xc0220a20, 0x000 },
- { 0x00000029, 0x00203622, 0x000 },
- { 0x00000028, 0xc0403620, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000009, 0x00204811, 0x000 },
- { 0xa1000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce3, 0x000 },
- { 0x00000021, 0x00203627, 0x000 },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce4, 0x000 },
- { 0x00000022, 0x00203627, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a3, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x00000021, 0x00203623, 0x000 },
- { 0x00000022, 0x00203624, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000000, 0x00311cc4, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14c00000, 0x2dc },
- { 0x00000000, 0x00400000, 0x2d9 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2d9 },
- { 0x00000003, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2dc },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e1, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a1, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e2, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000000, 0x00600000, 0x665 },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00600000, 0x65c },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2a7 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x0000001a, 0x00201e2d, 0x000 },
- { 0x0000001b, 0x0080222d, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca1, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x003808c5, 0x000 },
- { 0x00000000, 0x00300841, 0x000 },
- { 0x00000001, 0x00220a22, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000017, 0x0020222d, 0x000 },
- { 0x00000000, 0x14c00000, 0x318 },
- { 0xffffffef, 0x00280621, 0x000 },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x0000f8e0, 0x00204411, 0x000 },
- { 0x00000000, 0x00294901, 0x000 },
- { 0x00000000, 0x00894901, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00804811, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x97000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00002257, 0x00204411, 0x000 },
- { 0x00000003, 0xc0484a20, 0x000 },
- { 0x0000225d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x642 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x00000001, 0x40304a20, 0x000 },
- { 0x00000002, 0xc0304a20, 0x000 },
- { 0x00000001, 0x00530a22, 0x34b },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000018, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x354 },
- { 0x00000014, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x364 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00604802, 0x36e },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x36a },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35f },
- { 0x00000028, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5bd },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35f },
- { 0x0000002c, 0x00203626, 0x000 },
- { 0x00000049, 0x00201811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0cc00000, 0x370 },
- { 0x0000002c, 0x00801a2d, 0x000 },
- { 0x0000003f, 0xc0280a20, 0x000 },
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- { 0x00000000, 0x0ce00000, 0x386 },
- { 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3b1 },
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- { 0x00000000, 0x0ce00000, 0x3b5 },
- { 0x00000020, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x39c },
- { 0x0000000f, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a8 },
- { 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a8 },
- { 0x0000001e, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x390 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x08000000, 0x00290a22, 0x000 },
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- { 0x0000000c, 0xc0211220, 0x000 },
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- { 0x00000014, 0xc0221620, 0x000 },
- { 0x00000000, 0x002914a4, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x002948a2, 0x000 },
- { 0x0000a1fe, 0x00204411, 0x000 },
- { 0x00000000, 0x00404803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000015, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x392 },
- { 0x0000210e, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000017, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000003, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x39e },
- { 0x00002108, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x80000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000010, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x3ae },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000006, 0x00404811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x0000001d, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x3ce },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000018, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x3c0 },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0xbabecafe, 0x00204811, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000004, 0x00404811, 0x000 },
- { 0x00002170, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000a, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x3d3 },
- { 0x8c000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00003fff, 0x40280a20, 0x000 },
- { 0x80000000, 0x40280e20, 0x000 },
- { 0x40000000, 0xc0281220, 0x000 },
- { 0x00040000, 0x00694622, 0x68a },
- { 0x00000000, 0x00201410, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x3e1 },
- { 0x00000000, 0xc0401800, 0x3e4 },
- { 0x00003fff, 0xc0281a20, 0x000 },
- { 0x00040000, 0x00694626, 0x68a },
- { 0x00000000, 0x00201810, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x3e7 },
- { 0x00000000, 0xc0401c00, 0x3ea },
- { 0x00003fff, 0xc0281e20, 0x000 },
- { 0x00040000, 0x00694627, 0x68a },
- { 0x00000000, 0x00201c10, 0x000 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0x002820c5, 0x000 },
- { 0x00000000, 0x004948e8, 0x000 },
- { 0xa5800000, 0x00200811, 0x000 },
- { 0x00002000, 0x00200c11, 0x000 },
- { 0x83000000, 0x00604411, 0x412 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x0000001f, 0xc0210220, 0x000 },
- { 0x00000000, 0x14c00000, 0x3f7 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0000ffff, 0xc0481220, 0x3ff },
- { 0xa7800000, 0x00200811, 0x000 },
- { 0x0000a000, 0x00200c11, 0x000 },
- { 0x83000000, 0x00604411, 0x412 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x83000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00304883, 0x000 },
- { 0x84000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1d000000, 0x000 },
- { 0x83000000, 0x00604411, 0x412 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0xa9800000, 0x00200811, 0x000 },
- { 0x0000c000, 0x00400c11, 0x3fa },
- { 0xab800000, 0x00200811, 0x000 },
- { 0x0000f8e0, 0x00400c11, 0x3fa },
- { 0xad800000, 0x00200811, 0x000 },
- { 0x0000f880, 0x00400c11, 0x3fa },
- { 0xb3800000, 0x00200811, 0x000 },
- { 0x0000f3fc, 0x00400c11, 0x3fa },
- { 0xaf800000, 0x00200811, 0x000 },
- { 0x0000e000, 0x00400c11, 0x3fa },
- { 0xb1800000, 0x00200811, 0x000 },
- { 0x0000f000, 0x00400c11, 0x3fa },
- { 0x83000000, 0x00204411, 0x000 },
- { 0x00002148, 0x00204811, 0x000 },
- { 0x84000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1d000000, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x01182000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0218a000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0318c000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0418f8e0, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0518f880, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0618e000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0718f000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0818f3fc, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00000030, 0x00200a2d, 0x000 },
- { 0x00000000, 0xc0290c40, 0x000 },
- { 0x00000030, 0x00203623, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x86000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00404801, 0x000 },
- { 0x85000000, 0xc0204411, 0x000 },
- { 0x00000000, 0x00404801, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x68a },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000000, 0x00404c02, 0x448 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x00000000, 0xc0201000, 0x000 },
- { 0x00000000, 0xc0201400, 0x000 },
- { 0x00000000, 0xc0201800, 0x000 },
- { 0x00000000, 0xc0201c00, 0x000 },
- { 0x00007f00, 0x00280a21, 0x000 },
- { 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x456 },
- { 0x00000000, 0xc0202000, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x00000010, 0x00280a23, 0x000 },
- { 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x45e },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0x00694624, 0x68a },
- { 0x00000000, 0x00400000, 0x463 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x00604805, 0x68f },
- { 0x00000000, 0x002824f0, 0x000 },
- { 0x00000007, 0x00280a23, 0x000 },
- { 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x46a },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x04e00000, 0x483 },
- { 0x00000000, 0x00400000, 0x490 },
- { 0x00000002, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x46f },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x02e00000, 0x483 },
- { 0x00000000, 0x00400000, 0x490 },
- { 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x474 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x0ce00000, 0x483 },
- { 0x00000000, 0x00400000, 0x490 },
- { 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x479 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x0ae00000, 0x483 },
- { 0x00000000, 0x00400000, 0x490 },
- { 0x00000005, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x47e },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x06e00000, 0x483 },
- { 0x00000000, 0x00400000, 0x490 },
- { 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x483 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x08e00000, 0x483 },
- { 0x00000000, 0x00400000, 0x490 },
- { 0x00007f00, 0x00280a21, 0x000 },
- { 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x000 },
- { 0x00000008, 0x00210a23, 0x000 },
- { 0x00000000, 0x14c00000, 0x48d },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x00000000, 0xc0204400, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00007f00, 0x00280a21, 0x000 },
- { 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x496 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0400000, 0x000 },
- { 0x00000000, 0x00404c08, 0x456 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x00000011, 0x40211220, 0x000 },
- { 0x00000012, 0x40211620, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00210225, 0x000 },
- { 0x00000000, 0x14e00000, 0x4a0 },
- { 0x00040000, 0xc0494a20, 0x4a1 },
- { 0xfffbffff, 0xc0284a20, 0x000 },
- { 0x00000000, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x4ad },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x00210224, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000c, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x4a9 },
- { 0xa0000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000004, 0x00204811, 0x000 },
- { 0x0000216b, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204810, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000005, 0x00204811, 0x000 },
- { 0x0000216c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204810, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00400000, 0x4a7 },
- { 0x00000000, 0xc0210a20, 0x000 },
- { 0x00000000, 0x14c00000, 0x4c0 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0604800, 0x68f },
- { 0x00000000, 0x00400000, 0x4c4 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0xc0294620, 0x000 },
- { 0x00000000, 0xc0600000, 0x68a },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x4cb },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x00000000, 0xc0204400, 0x000 },
- { 0x00000000, 0xc0404810, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x68a },
- { 0x00000000, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x4cd },
- { 0x00002180, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000003, 0x00333e2f, 0x000 },
- { 0x00000001, 0x00210221, 0x000 },
- { 0x00000000, 0x14e00000, 0x4fd },
- { 0x0000002c, 0x00200a2d, 0x000 },
- { 0x00040000, 0x18e00c11, 0x4ec },
- { 0x00000001, 0x00333e2f, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xd8c04800, 0x4e0 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000002d, 0x0020122d, 0x000 },
- { 0x00000000, 0x00290c83, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000011, 0x00210224, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000000, 0x00400000, 0x4a7 },
- { 0x0000002c, 0xc0203620, 0x000 },
- { 0x0000002d, 0xc0403620, 0x000 },
- { 0x0000000f, 0x00210221, 0x000 },
- { 0x00000000, 0x14c00000, 0x502 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0xd9000000, 0x000 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0xb5000000, 0x00204411, 0x000 },
- { 0x00002000, 0x00204811, 0x000 },
- { 0xb6000000, 0x00204411, 0x000 },
- { 0x0000a000, 0x00204811, 0x000 },
- { 0xb7000000, 0x00204411, 0x000 },
- { 0x0000c000, 0x00204811, 0x000 },
- { 0xb8000000, 0x00204411, 0x000 },
- { 0x0000f8e0, 0x00204811, 0x000 },
- { 0xb9000000, 0x00204411, 0x000 },
- { 0x0000f880, 0x00204811, 0x000 },
- { 0xba000000, 0x00204411, 0x000 },
- { 0x0000e000, 0x00204811, 0x000 },
- { 0xbb000000, 0x00204411, 0x000 },
- { 0x0000f000, 0x00204811, 0x000 },
- { 0xbc000000, 0x00204411, 0x000 },
- { 0x0000f3fc, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000002, 0x00204811, 0x000 },
- { 0x000000ff, 0x00280e30, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x516 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0x14c00000, 0x52b },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x0000001c, 0x00203623, 0x000 },
- { 0x0000002b, 0x00203623, 0x000 },
- { 0x00000029, 0x00203623, 0x000 },
- { 0x00000028, 0x00203623, 0x000 },
- { 0x00000017, 0x00203623, 0x000 },
- { 0x00000025, 0x00203623, 0x000 },
- { 0x00000026, 0x00203623, 0x000 },
- { 0x00000015, 0x00203623, 0x000 },
- { 0x00000016, 0x00203623, 0x000 },
- { 0xffffe000, 0x00200c11, 0x000 },
- { 0x00000021, 0x00203623, 0x000 },
- { 0x00000022, 0x00203623, 0x000 },
- { 0x00001fff, 0x00200c11, 0x000 },
- { 0x00000023, 0x00203623, 0x000 },
- { 0x00000024, 0x00203623, 0x000 },
- { 0xf1ffffff, 0x00283a2e, 0x000 },
- { 0x0000001a, 0xc0220e20, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x0000002a, 0x40203620, 0x000 },
- { 0x87000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1f4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000030, 0x00203623, 0x000 },
- { 0x9d000000, 0x00204411, 0x000 },
- { 0x0000001f, 0x40214a20, 0x000 },
- { 0x96000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x00000000, 0xc0201000, 0x000 },
- { 0x0000001f, 0x00211624, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x0000001d, 0x00203623, 0x000 },
- { 0x00000003, 0x00281e23, 0x000 },
- { 0x00000008, 0x00222223, 0x000 },
- { 0xfffff000, 0x00282228, 0x000 },
- { 0x00000000, 0x002920e8, 0x000 },
- { 0x0000001f, 0x00203628, 0x000 },
- { 0x00000018, 0x00211e23, 0x000 },
- { 0x00000020, 0x00203627, 0x000 },
- { 0x00000002, 0x00221624, 0x000 },
- { 0x00000000, 0x003014a8, 0x000 },
- { 0x0000001e, 0x00203625, 0x000 },
- { 0x00000003, 0x00211a24, 0x000 },
- { 0x10000000, 0x00281a26, 0x000 },
- { 0xefffffff, 0x00283a2e, 0x000 },
- { 0x00000000, 0x004938ce, 0x678 },
- { 0x00000001, 0x40280a20, 0x000 },
- { 0x00000006, 0x40280e20, 0x000 },
- { 0x00000300, 0xc0281220, 0x000 },
- { 0x00000008, 0x00211224, 0x000 },
- { 0x00000000, 0xc0201620, 0x000 },
- { 0x00000000, 0xc0201a20, 0x000 },
- { 0x00000000, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x563 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00002258, 0x00300a24, 0x000 },
- { 0x00040000, 0x00694622, 0x68a },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00020000, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x56b },
- { 0x00000000, 0xc0201c10, 0x000 },
- { 0x00000000, 0xc0400000, 0x579 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x56b },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00002258, 0x00300a24, 0x000 },
- { 0x00040000, 0x00694622, 0x68a },
- { 0x00000000, 0xc0201c10, 0x000 },
- { 0x00000000, 0xc0400000, 0x579 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x56f },
- { 0x00000000, 0xc0201c00, 0x000 },
- { 0x00000000, 0xc0400000, 0x579 },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x577 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0604800, 0x68f },
- { 0x00000000, 0x00401c10, 0x579 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0400000, 0x000 },
- { 0x00000000, 0x0ee00000, 0x57b },
- { 0x00000000, 0x00600000, 0x5c6 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x58c },
- { 0x0000a2b7, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x68a },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x0000a2c4, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x58a },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000001, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x59d },
- { 0x0000a2bb, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x68a },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x0000a2c5, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x59b },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000002, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5ae },
- { 0x0000a2bf, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2be, 0x00604411, 0x68a },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x0000a2c6, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x5ac },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x0000a2c3, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x68a },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x0000a2c7, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x5bb },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x85000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x0000304a, 0x00204411, 0x000 },
- { 0x01000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00400000, 0x5c1 },
- { 0xa4000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0xc0600000, 0x5c6 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000002c, 0x00203621, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0230, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5cd },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000030, 0x00403621, 0x5e0 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x5e0 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a092, 0x00604411, 0x68a },
- { 0x00000031, 0x00203630, 0x000 },
- { 0x0004a093, 0x00604411, 0x68a },
- { 0x00000032, 0x00203630, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x68a },
- { 0x00000033, 0x00203630, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x68a },
- { 0x00000034, 0x00203630, 0x000 },
- { 0x0004a2be, 0x00604411, 0x68a },
- { 0x00000035, 0x00203630, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x68a },
- { 0x00000036, 0x00203630, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000005, 0x00204811, 0x000 },
- { 0x0000a1f4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x88000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000001, 0x002f0230, 0x000 },
- { 0x00000000, 0x0ce00000, 0x629 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x629 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x602 },
- { 0x0000a092, 0x00204411, 0x000 },
- { 0x00000031, 0x00204a2d, 0x000 },
- { 0x0000a093, 0x00204411, 0x000 },
- { 0x00000032, 0x00204a2d, 0x000 },
- { 0x0000a2b6, 0x00204411, 0x000 },
- { 0x00000033, 0x00204a2d, 0x000 },
- { 0x0000a2ba, 0x00204411, 0x000 },
- { 0x00000034, 0x00204a2d, 0x000 },
- { 0x0000a2be, 0x00204411, 0x000 },
- { 0x00000035, 0x00204a2d, 0x000 },
- { 0x0000a2c2, 0x00204411, 0x000 },
- { 0x00000036, 0x00204a2d, 0x000 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x000001ff, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x628 },
- { 0x00000000, 0x00210221, 0x000 },
- { 0x00000000, 0x14c00000, 0x60b },
- { 0x0004a003, 0x00604411, 0x68a },
- { 0x0000a003, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x14c00000, 0x610 },
- { 0x0004a010, 0x00604411, 0x68a },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x628 },
- { 0x0004a011, 0x00604411, 0x68a },
- { 0x0000a011, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a012, 0x00604411, 0x68a },
- { 0x0000a012, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a013, 0x00604411, 0x68a },
- { 0x0000a013, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a014, 0x00604411, 0x68a },
- { 0x0000a014, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a015, 0x00604411, 0x68a },
- { 0x0000a015, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a016, 0x00604411, 0x68a },
- { 0x0000a016, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a017, 0x00604411, 0x68a },
- { 0x0000a017, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x0000002c, 0x0080062d, 0x000 },
- { 0xff000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000002, 0x00804811, 0x000 },
- { 0x00000000, 0x0ee00000, 0x63a },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000002, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x638 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x68a },
- { 0x00001000, 0x00200811, 0x000 },
- { 0x0000002b, 0x00203622, 0x000 },
- { 0x00000000, 0x00600000, 0x63e },
- { 0x00000000, 0x00600000, 0x5c6 },
- { 0x98000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00804811, 0x000 },
- { 0x00000000, 0xc0600000, 0x63e },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000022, 0x00204811, 0x000 },
- { 0x89000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00404811, 0x62a },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00404811, 0x62a },
- { 0x00000000, 0x00600000, 0x659 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0xc0204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x09800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x68a },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000004, 0x00404c11, 0x653 },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000004, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffffb, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffff7, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36e },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x01800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004217f, 0x00604411, 0x68a },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x689 },
- { 0x00000010, 0x00404c11, 0x66f },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x38c00000, 0x000 },
- { 0x0000001d, 0x00200a2d, 0x000 },
- { 0x0000001e, 0x00200e2d, 0x000 },
- { 0x0000001f, 0x0020122d, 0x000 },
- { 0x00000020, 0x0020162d, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000004, 0x00301224, 0x000 },
- { 0x00000000, 0x002f0064, 0x000 },
- { 0x00000000, 0x0cc00000, 0x688 },
- { 0x00000003, 0x00281a22, 0x000 },
- { 0x00000008, 0x00221222, 0x000 },
- { 0xfffff000, 0x00281224, 0x000 },
- { 0x00000000, 0x002910c4, 0x000 },
- { 0x0000001f, 0x00403624, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x68a },
- { 0x9f000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x68d },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x68f },
- { 0x9e000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x692 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0xc0204411, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000024, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000022, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00404811, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x014204ff, 0x05bd0250, 0x000 },
- { 0x01c30168, 0x043f05bd, 0x000 },
- { 0x02250209, 0x02500151, 0x000 },
- { 0x02230245, 0x02a00241, 0x000 },
- { 0x03d705bd, 0x05bd05bd, 0x000 },
- { 0x06460647, 0x031f05bd, 0x000 },
- { 0x05bd05c2, 0x03200340, 0x000 },
- { 0x032a0282, 0x03420334, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd054e, 0x05bd05bd, 0x000 },
- { 0x03ba05bd, 0x04b80344, 0x000 },
- { 0x0497044d, 0x043d05bd, 0x000 },
- { 0x04cd05bd, 0x044104da, 0x000 },
- { 0x044d0504, 0x03510375, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd05bd, 0x063c05c4, 0x000 },
- { 0x05bd05bd, 0x000705bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x03f803ed, 0x04080406, 0x000 },
- { 0x040e040a, 0x040c0410, 0x000 },
- { 0x041c0418, 0x04240420, 0x000 },
- { 0x042c0428, 0x04340430, 0x000 },
- { 0x05bd05bd, 0x043805bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x05bd05bd, 0x05bd05bd, 0x000 },
- { 0x00020676, 0x06940006, 0x000 },
-};
-
-static const u32 RV635_pfp_microcode[]={
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-
-static const u32 RV670_cp_microcode[][3]={
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0000ffff, 0x00284621, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00000000, 0x00e00000, 0x000 },
- { 0x00010000, 0xc0294620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x67c },
- { 0x00000000, 0x00600000, 0x624 },
- { 0x00000000, 0x00600000, 0x638 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000f00, 0x00281622, 0x000 },
- { 0x00000008, 0x00211625, 0x000 },
- { 0x00000018, 0x00203625, 0x000 },
- { 0x8d000000, 0x00204411, 0x000 },
- { 0x00000004, 0x002f0225, 0x000 },
- { 0x00000000, 0x0ce00000, 0x018 },
- { 0x00412000, 0x00404811, 0x019 },
- { 0x00422000, 0x00204811, 0x000 },
- { 0x8e000000, 0x00204411, 0x000 },
- { 0x00000028, 0x00204a2d, 0x000 },
- { 0x90000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x0000000c, 0x00211622, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000019, 0x00211a22, 0x000 },
- { 0x00000004, 0x00281a26, 0x000 },
- { 0x00000000, 0x002914c5, 0x000 },
- { 0x00000019, 0x00203625, 0x000 },
- { 0x00000000, 0x003a1402, 0x000 },
- { 0x00000016, 0x00211625, 0x000 },
- { 0x00000003, 0x00281625, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0xfffffffc, 0x00280e23, 0x000 },
- { 0x00000000, 0x002914a3, 0x000 },
- { 0x00000017, 0x00203625, 0x000 },
- { 0x00008000, 0x00280e22, 0x000 },
- { 0x00000007, 0x00220e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x20000000, 0x00280e22, 0x000 },
- { 0x00000006, 0x00210e23, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x00000000, 0x00220222, 0x000 },
- { 0x00000000, 0x14e00000, 0x038 },
- { 0x00000000, 0x2ee00000, 0x035 },
- { 0x00000000, 0x2ce00000, 0x037 },
- { 0x00000000, 0x00400e2d, 0x039 },
- { 0x00000008, 0x00200e2d, 0x000 },
- { 0x00000009, 0x0040122d, 0x046 },
- { 0x00000001, 0x00400e2d, 0x039 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x03e },
- { 0x00000008, 0x00401c11, 0x041 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x0000000f, 0x00281e27, 0x000 },
- { 0x00000003, 0x00221e27, 0x000 },
- { 0x7fc00000, 0x00281a23, 0x000 },
- { 0x00000014, 0x00211a26, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000008, 0x00221a26, 0x000 },
- { 0x00000000, 0x00290cc7, 0x000 },
- { 0x00000027, 0x00203624, 0x000 },
- { 0x00007f00, 0x00281221, 0x000 },
- { 0x00001400, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x04b },
- { 0x00000001, 0x00290e23, 0x000 },
- { 0x0000000e, 0x00203623, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfff80000, 0x00294a23, 0x000 },
- { 0x00000000, 0x003a2c02, 0x000 },
- { 0x00000002, 0x00220e2b, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x0000000f, 0x00203623, 0x000 },
- { 0x00001fff, 0x00294a23, 0x000 },
- { 0x00000027, 0x00204a2d, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000029, 0x00200e2d, 0x000 },
- { 0x060a0200, 0x00294a23, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14e00000, 0x061 },
- { 0x00000000, 0x2ee00000, 0x05f },
- { 0x00000000, 0x2ce00000, 0x05e },
- { 0x00000000, 0x00400e2d, 0x062 },
- { 0x00000001, 0x00400e2d, 0x062 },
- { 0x0000000a, 0x00200e2d, 0x000 },
- { 0x0000000b, 0x0040122d, 0x06a },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x003ffffc, 0x00281223, 0x000 },
- { 0x00000002, 0x00221224, 0x000 },
- { 0x7fc00000, 0x00281623, 0x000 },
- { 0x00000014, 0x00211625, 0x000 },
- { 0x00000001, 0x00331625, 0x000 },
- { 0x80000000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00290ca3, 0x000 },
- { 0x3ffffc00, 0x00290e23, 0x000 },
- { 0x0000001f, 0x00211e23, 0x000 },
- { 0x00000000, 0x14e00000, 0x06d },
- { 0x00000100, 0x00401c11, 0x070 },
- { 0x0000000d, 0x00201e2d, 0x000 },
- { 0x000000f0, 0x00281e27, 0x000 },
- { 0x00000004, 0x00221e27, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0xfffff0ff, 0x00281a30, 0x000 },
- { 0x0000a028, 0x00204411, 0x000 },
- { 0x00000000, 0x002948e6, 0x000 },
- { 0x0000a018, 0x00204411, 0x000 },
- { 0x3fffffff, 0x00284a23, 0x000 },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000030, 0x0020162d, 0x000 },
- { 0x00000002, 0x00291625, 0x000 },
- { 0x00000030, 0x00203625, 0x000 },
- { 0x00000025, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a3, 0x000 },
- { 0x00000000, 0x0cc00000, 0x083 },
- { 0x00000026, 0x0020162d, 0x000 },
- { 0x00000000, 0x002f00a4, 0x000 },
- { 0x00000000, 0x0cc00000, 0x084 },
- { 0x00000000, 0x00400000, 0x08a },
- { 0x00000025, 0x00203623, 0x000 },
- { 0x00000026, 0x00203624, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x08a },
- { 0x00000000, 0x00600000, 0x659 },
- { 0x00000000, 0x00600000, 0x64d },
- { 0x00000002, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x08d },
- { 0x00000012, 0xc0403620, 0x093 },
- { 0x00000000, 0x2ee00000, 0x091 },
- { 0x00000000, 0x2ce00000, 0x090 },
- { 0x00000002, 0x00400e2d, 0x092 },
- { 0x00000003, 0x00400e2d, 0x092 },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000012, 0x00203623, 0x000 },
- { 0x00000003, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x098 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x0a0 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x2ee00000, 0x09e },
- { 0x00000000, 0x2ce00000, 0x09d },
- { 0x00000002, 0x00400e2d, 0x09f },
- { 0x00000003, 0x00400e2d, 0x09f },
- { 0x0000000c, 0x00200e2d, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x003f0000, 0x00280e23, 0x000 },
- { 0x00000010, 0x00210e23, 0x000 },
- { 0x00000011, 0x00203623, 0x000 },
- { 0x0000001e, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0a7 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x0000001f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0aa },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000008, 0x00210e2b, 0x000 },
- { 0x0000007f, 0x00280e23, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0e1 },
- { 0x00000000, 0x27000000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0b3 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x0000000c, 0x00221e30, 0x000 },
- { 0x99800000, 0x00204411, 0x000 },
- { 0x00000004, 0x0020122d, 0x000 },
- { 0x00000008, 0x00221224, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00291ce4, 0x000 },
- { 0x00000000, 0x00604807, 0x12f },
- { 0x9b000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x9c000000, 0x00204411, 0x000 },
- { 0x00000000, 0x0033146f, 0x000 },
- { 0x00000001, 0x00333e23, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0x00203c05, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e007, 0x00204411, 0x000 },
- { 0x0000000f, 0x0021022b, 0x000 },
- { 0x00000000, 0x14c00000, 0x0cb },
- { 0x00f8ff08, 0x00204811, 0x000 },
- { 0x98000000, 0x00404811, 0x0dc },
- { 0x000000f0, 0x00280e22, 0x000 },
- { 0x000000a0, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x0da },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d5 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d4 },
- { 0x00003f00, 0x00400c11, 0x0d6 },
- { 0x00001f00, 0x00400c11, 0x0d6 },
- { 0x00000f00, 0x00200c11, 0x000 },
- { 0x00380009, 0x00294a23, 0x000 },
- { 0x3f000000, 0x00280e2b, 0x000 },
- { 0x00000002, 0x00220e23, 0x000 },
- { 0x00000007, 0x00494a23, 0x0dc },
- { 0x00380f09, 0x00204811, 0x000 },
- { 0x68000007, 0x00204811, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000a202, 0x00204411, 0x000 },
- { 0x00ff0000, 0x00280e22, 0x000 },
- { 0x00000080, 0x00294a23, 0x000 },
- { 0x00000027, 0x00200e2d, 0x000 },
- { 0x00000026, 0x0020122d, 0x000 },
- { 0x00000000, 0x002f0083, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0ea },
- { 0x00000000, 0x00600000, 0x653 },
- { 0x00000000, 0x00400000, 0x0eb },
- { 0x00000000, 0x00600000, 0x656 },
- { 0x00000007, 0x0020222d, 0x000 },
- { 0x00000005, 0x00220e22, 0x000 },
- { 0x00100000, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000000, 0x003a0c02, 0x000 },
- { 0x000000ef, 0x00280e23, 0x000 },
- { 0x00000000, 0x00292068, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000003, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x0f8 },
- { 0x0000000b, 0x00210228, 0x000 },
- { 0x00000000, 0x14c00000, 0x0f8 },
- { 0x00000400, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000001c, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x0fd },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000001e, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x10b },
- { 0x0000a30f, 0x00204411, 0x000 },
- { 0x00000011, 0x00200e2d, 0x000 },
- { 0x00000001, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x104 },
- { 0xffffffff, 0x00404811, 0x10b },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x107 },
- { 0x0000ffff, 0x00404811, 0x10b },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x10a },
- { 0x000000ff, 0x00404811, 0x10b },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0002c400, 0x00204411, 0x000 },
- { 0x0000001f, 0x00210e22, 0x000 },
- { 0x00000000, 0x14c00000, 0x112 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000018, 0x40224a20, 0x000 },
- { 0x00000010, 0xc0424a20, 0x114 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000013, 0x00203623, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000000a, 0x00201011, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x11b },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00531224, 0x117 },
- { 0xffbfffff, 0x00283a2e, 0x000 },
- { 0x0000001b, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x12e },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000d, 0x00204811, 0x000 },
- { 0x00000018, 0x00220e30, 0x000 },
- { 0xfc000000, 0x00280e23, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x00000000, 0x00201010, 0x000 },
- { 0x0000e00e, 0x00204411, 0x000 },
- { 0x07f8ff08, 0x00204811, 0x000 },
- { 0x00000000, 0x00294a23, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a24, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x00800000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204806, 0x000 },
- { 0x00000008, 0x00214a27, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x67c },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x67b },
- { 0x00000004, 0x00404c11, 0x135 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x0000001c, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x67c },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x13c },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40280620, 0x000 },
- { 0x00000010, 0xc0210a20, 0x000 },
- { 0x00000000, 0x00341461, 0x000 },
- { 0x00000000, 0x00741882, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x147 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x160 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0681a20, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x158 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000001, 0x00300a2f, 0x000 },
- { 0x00000001, 0x00210a22, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600000, 0x18f },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00202c08, 0x000 },
- { 0x00000000, 0x00202411, 0x000 },
- { 0x00000000, 0x00202811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000002, 0x00221e29, 0x000 },
- { 0x00000000, 0x007048eb, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000001, 0x40330620, 0x000 },
- { 0x00000000, 0xc0302409, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ae00000, 0x181 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x186 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x186 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000001, 0x00530621, 0x182 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0604800, 0x197 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000011, 0x0020062d, 0x000 },
- { 0x00000000, 0x0078042a, 0x2fb },
- { 0x00000000, 0x00202809, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x174 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x194 },
- { 0x00000015, 0xc0203620, 0x000 },
- { 0x00000016, 0xc0203620, 0x000 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x46000000, 0x00600811, 0x1b2 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x19b },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00804811, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000ffff, 0x40281620, 0x000 },
- { 0x00000010, 0xc0811a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000008, 0x00221e30, 0x000 },
- { 0x00000029, 0x00201a2d, 0x000 },
- { 0x0000e000, 0x00204411, 0x000 },
- { 0xfffbff09, 0x00204811, 0x000 },
- { 0x0000000f, 0x0020222d, 0x000 },
- { 0x00001fff, 0x00294a28, 0x000 },
- { 0x00000006, 0x0020222d, 0x000 },
- { 0x00000000, 0x002920e8, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000100, 0x00201811, 0x000 },
- { 0x00000008, 0x00621e28, 0x12f },
- { 0x00000008, 0x00822228, 0x000 },
- { 0x0002c000, 0x00204411, 0x000 },
- { 0x00000015, 0x00600e2d, 0x1bd },
- { 0x00000016, 0x00600e2d, 0x1bd },
- { 0x0000c008, 0x00204411, 0x000 },
- { 0x00000017, 0x00200e2d, 0x000 },
- { 0x00000000, 0x14c00000, 0x1b9 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x39000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00804802, 0x000 },
- { 0x00000018, 0x00202e2d, 0x000 },
- { 0x00000000, 0x003b0d63, 0x000 },
- { 0x00000008, 0x00224a23, 0x000 },
- { 0x00000010, 0x00224a23, 0x000 },
- { 0x00000018, 0x00224a23, 0x000 },
- { 0x00000000, 0x00804803, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00000007, 0x0021062f, 0x000 },
- { 0x00000013, 0x00200a2d, 0x000 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000ffff, 0x40282220, 0x000 },
- { 0x0000000f, 0x00262228, 0x000 },
- { 0x00000010, 0x40212620, 0x000 },
- { 0x0000000f, 0x00262629, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1e0 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000081, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000080, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1dc },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1d8 },
- { 0x00000001, 0x00202c11, 0x000 },
- { 0x0000001f, 0x00280a22, 0x000 },
- { 0x0000001f, 0x00282a2a, 0x000 },
- { 0x00000001, 0x00530621, 0x1d1 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000002, 0x00304a2f, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000001, 0x00301e2f, 0x000 },
- { 0x00000000, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00600000, 0x1e9 },
- { 0x00000001, 0x00531e27, 0x1e5 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x0000000f, 0x00260e23, 0x000 },
- { 0x00000010, 0xc0211220, 0x000 },
- { 0x0000000f, 0x00261224, 0x000 },
- { 0x00000000, 0x00201411, 0x000 },
- { 0x00000000, 0x00601811, 0x2bb },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022b, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1f8 },
- { 0x00000010, 0x00221628, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a29, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x0020480a, 0x000 },
- { 0x00000000, 0x00202c11, 0x000 },
- { 0x00000010, 0x00221623, 0x000 },
- { 0xffff0000, 0x00281625, 0x000 },
- { 0x0000ffff, 0x00281a24, 0x000 },
- { 0x00000000, 0x002948c5, 0x000 },
- { 0x00000000, 0x00731503, 0x205 },
- { 0x00000000, 0x00201805, 0x000 },
- { 0x00000000, 0x00731524, 0x205 },
- { 0x00000000, 0x002d14c5, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00202802, 0x000 },
- { 0x00000000, 0x00202003, 0x000 },
- { 0x00000000, 0x00802404, 0x000 },
- { 0x0000000f, 0x00210225, 0x000 },
- { 0x00000000, 0x14c00000, 0x67b },
- { 0x00000000, 0x002b1405, 0x000 },
- { 0x00000001, 0x00901625, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001a, 0x00294a22, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a21, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000ffff, 0x40281220, 0x000 },
- { 0x00000010, 0xc0211a20, 0x000 },
- { 0x0000ffff, 0x40280e20, 0x000 },
- { 0x00000010, 0xc0211620, 0x000 },
- { 0x00000000, 0x00741465, 0x2bb },
- { 0x0001a1fd, 0x00604411, 0x2e0 },
- { 0x00000001, 0x00330621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0cc00000, 0x219 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x212 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x638 },
- { 0x00000000, 0x0040040f, 0x213 },
- { 0x00000000, 0x00600000, 0x624 },
- { 0x00000000, 0x00600000, 0x638 },
- { 0x00000210, 0x00600411, 0x315 },
- { 0x00000000, 0x00600000, 0x1a0 },
- { 0x00000000, 0x00600000, 0x19c },
- { 0x00000000, 0x00600000, 0x2bb },
- { 0x00000000, 0x00600000, 0x2a3 },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204808, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ae00000, 0x232 },
- { 0x00000000, 0x00600000, 0x13a },
- { 0x00000000, 0x00400000, 0x236 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x236 },
- { 0x00000000, 0xc0404800, 0x233 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x00600411, 0x2fb },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000000, 0x00600000, 0x624 },
- { 0x0000a00c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000018, 0x40210a20, 0x000 },
- { 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x24c },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x00080101, 0x00292228, 0x000 },
- { 0x00000014, 0x00203628, 0x000 },
- { 0x0000a30c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x251 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000010, 0x00600411, 0x315 },
- { 0x3f800000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00000000, 0x00600000, 0x27c },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000001, 0x00211e27, 0x000 },
- { 0x00000000, 0x14e00000, 0x26a },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x0000ffff, 0x00281e27, 0x000 },
- { 0x00000000, 0x00341c27, 0x000 },
- { 0x00000000, 0x12c00000, 0x25f },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e5, 0x000 },
- { 0x00000000, 0x08c00000, 0x262 },
- { 0x00000000, 0x00201407, 0x000 },
- { 0x00000012, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00211e27, 0x000 },
- { 0x00000000, 0x00341c47, 0x000 },
- { 0x00000000, 0x12c00000, 0x267 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x08c00000, 0x26a },
- { 0x00000000, 0x00201807, 0x000 },
- { 0x00000000, 0x00600000, 0x2c1 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x00000000, 0x00342023, 0x000 },
- { 0x00000000, 0x12c00000, 0x272 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x271 },
- { 0x00000016, 0x00404811, 0x276 },
- { 0x00000018, 0x00404811, 0x276 },
- { 0x00000000, 0x00342044, 0x000 },
- { 0x00000000, 0x12c00000, 0x275 },
- { 0x00000017, 0x00404811, 0x276 },
- { 0x00000019, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0x00604411, 0x2e9 },
- { 0x00003fff, 0x002f022f, 0x000 },
- { 0x00000000, 0x0cc00000, 0x256 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x00000010, 0x40210620, 0x000 },
- { 0x0000ffff, 0xc0280a20, 0x000 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x00000010, 0x40211620, 0x000 },
- { 0x0000ffff, 0xc0881a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x67c },
- { 0x00000000, 0x00600000, 0x624 },
- { 0x00000000, 0xc0600000, 0x2a3 },
- { 0x00000005, 0x00200a2d, 0x000 },
- { 0x00000008, 0x00220a22, 0x000 },
- { 0x0000002b, 0x00201a2d, 0x000 },
- { 0x0000001c, 0x00201e2d, 0x000 },
- { 0x00007000, 0x00281e27, 0x000 },
- { 0x00000000, 0x00311ce6, 0x000 },
- { 0x0000002a, 0x00201a2d, 0x000 },
- { 0x0000000c, 0x00221a26, 0x000 },
- { 0x00000000, 0x002f00e6, 0x000 },
- { 0x00000000, 0x06e00000, 0x292 },
- { 0x00000000, 0x00201c11, 0x000 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x0000002b, 0x00203623, 0x000 },
- { 0x00000010, 0x00201811, 0x000 },
- { 0x00000000, 0x00691ce2, 0x12f },
- { 0x93800000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x95000000, 0x00204411, 0x000 },
- { 0x00000000, 0x002f022f, 0x000 },
- { 0x00000000, 0x0ce00000, 0x29d },
- { 0x00000001, 0x00333e2f, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x92000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000001c, 0x00403627, 0x000 },
- { 0x0000000c, 0xc0220a20, 0x000 },
- { 0x00000029, 0x00203622, 0x000 },
- { 0x00000028, 0xc0403620, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000009, 0x00204811, 0x000 },
- { 0xa1000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00804811, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce3, 0x000 },
- { 0x00000021, 0x00203627, 0x000 },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002c1ce4, 0x000 },
- { 0x00000022, 0x00203627, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a3, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x00000000, 0x002d1d07, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x00000021, 0x00203623, 0x000 },
- { 0x00000022, 0x00203624, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000023, 0x00203627, 0x000 },
- { 0x00000000, 0x00311cc4, 0x000 },
- { 0x00000024, 0x00803627, 0x000 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14c00000, 0x2dc },
- { 0x00000000, 0x00400000, 0x2d9 },
- { 0x0000001a, 0x00203627, 0x000 },
- { 0x0000001b, 0x00203628, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000002, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2d9 },
- { 0x00000003, 0x00210227, 0x000 },
- { 0x00000000, 0x14e00000, 0x2dc },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e1, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120a1, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000024, 0x00201e2d, 0x000 },
- { 0x00000000, 0x002e00e2, 0x000 },
- { 0x00000000, 0x02c00000, 0x2dc },
- { 0x00000022, 0x00201e2d, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x00000000, 0x002e00e8, 0x000 },
- { 0x00000000, 0x06c00000, 0x2dc },
- { 0x00000000, 0x00600000, 0x659 },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2b5 },
- { 0x00000000, 0x00600000, 0x650 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x00000000, 0x00600000, 0x2a7 },
- { 0x00000000, 0x00400000, 0x2de },
- { 0x0000001a, 0x00201e2d, 0x000 },
- { 0x0000001b, 0x0080222d, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000000, 0x00311ca1, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294847, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e21, 0x000 },
- { 0x00000000, 0x003120c2, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00311ca3, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294887, 0x000 },
- { 0x00000001, 0x00220a21, 0x000 },
- { 0x00000000, 0x003008a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000010, 0x00221e23, 0x000 },
- { 0x00000000, 0x003120c4, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x003808c5, 0x000 },
- { 0x00000000, 0x00300841, 0x000 },
- { 0x00000001, 0x00220a22, 0x000 },
- { 0x00000000, 0x003308a2, 0x000 },
- { 0x00000010, 0x00221e22, 0x000 },
- { 0x00000010, 0x00212222, 0x000 },
- { 0x00000000, 0x00894907, 0x000 },
- { 0x00000017, 0x0020222d, 0x000 },
- { 0x00000000, 0x14c00000, 0x318 },
- { 0xffffffef, 0x00280621, 0x000 },
- { 0x00000014, 0x0020222d, 0x000 },
- { 0x0000f8e0, 0x00204411, 0x000 },
- { 0x00000000, 0x00294901, 0x000 },
- { 0x00000000, 0x00894901, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x060a0200, 0x00804811, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x97000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00002257, 0x00204411, 0x000 },
- { 0x00000003, 0xc0484a20, 0x000 },
- { 0x0000225d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0x00600000, 0x638 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00384a22, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0001a1fd, 0x00204411, 0x000 },
- { 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x00000001, 0x40304a20, 0x000 },
- { 0x00000002, 0xc0304a20, 0x000 },
- { 0x00000001, 0x00530a22, 0x34b },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000018, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x67c },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x354 },
- { 0x00000014, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x362 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00604802, 0x36a },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x366 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35d },
- { 0x00000028, 0x002f0222, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5b3 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x35d },
- { 0x0000002c, 0x00203626, 0x000 },
- { 0x00000049, 0x00201811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000001, 0x00331a26, 0x000 },
- { 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0cc00000, 0x36c },
- { 0x0000002c, 0x00801a2d, 0x000 },
- { 0x0000003f, 0xc0280a20, 0x000 },
- { 0x00000015, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x382 },
- { 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3ad },
- { 0x00000016, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3af },
- { 0x00000020, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x398 },
- { 0x0000000f, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a4 },
- { 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x3a4 },
- { 0x0000001e, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x38c },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x08000000, 0x00290a22, 0x000 },
- { 0x00000003, 0x40210e20, 0x000 },
- { 0x0000000c, 0xc0211220, 0x000 },
- { 0x00080000, 0x00281224, 0x000 },
- { 0x00000014, 0xc0221620, 0x000 },
- { 0x00000000, 0x002914a4, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x002948a2, 0x000 },
- { 0x0000a1fe, 0x00204411, 0x000 },
- { 0x00000000, 0x00404803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000016, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x67c },
- { 0x00000015, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x38e },
- { 0x0000210e, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000017, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x67c },
- { 0x00000003, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x39a },
- { 0x00002108, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x80000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000010, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x3aa },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000006, 0x00404811, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36a },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x0000001d, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x3c4 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x00000018, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x67c },
- { 0x00000011, 0x00210230, 0x000 },
- { 0x00000000, 0x14e00000, 0x3b8 },
- { 0x00002100, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0xbabecafe, 0x00204811, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000004, 0x00404811, 0x000 },
- { 0x00002170, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000a, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x3c9 },
- { 0x8c000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00003fff, 0x40280a20, 0x000 },
- { 0x80000000, 0x40280e20, 0x000 },
- { 0x40000000, 0xc0281220, 0x000 },
- { 0x00040000, 0x00694622, 0x67c },
- { 0x00000000, 0x00201410, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x3d7 },
- { 0x00000000, 0xc0401800, 0x3da },
- { 0x00003fff, 0xc0281a20, 0x000 },
- { 0x00040000, 0x00694626, 0x67c },
- { 0x00000000, 0x00201810, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x3dd },
- { 0x00000000, 0xc0401c00, 0x3e0 },
- { 0x00003fff, 0xc0281e20, 0x000 },
- { 0x00040000, 0x00694627, 0x67c },
- { 0x00000000, 0x00201c10, 0x000 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0x002820c5, 0x000 },
- { 0x00000000, 0x004948e8, 0x000 },
- { 0xa5800000, 0x00200811, 0x000 },
- { 0x00002000, 0x00200c11, 0x000 },
- { 0x83000000, 0x00604411, 0x408 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x40204800, 0x000 },
- { 0x0000001f, 0xc0210220, 0x000 },
- { 0x00000000, 0x14c00000, 0x3ed },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00008000, 0x00204811, 0x000 },
- { 0x0000ffff, 0xc0481220, 0x3f5 },
- { 0xa7800000, 0x00200811, 0x000 },
- { 0x0000a000, 0x00200c11, 0x000 },
- { 0x83000000, 0x00604411, 0x408 },
- { 0x00000000, 0x00204402, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000ffff, 0xc0281220, 0x000 },
- { 0x83000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00304883, 0x000 },
- { 0x84000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1d000000, 0x000 },
- { 0x83000000, 0x00604411, 0x408 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0xa9800000, 0x00200811, 0x000 },
- { 0x0000c000, 0x00400c11, 0x3f0 },
- { 0xab800000, 0x00200811, 0x000 },
- { 0x0000f8e0, 0x00400c11, 0x3f0 },
- { 0xad800000, 0x00200811, 0x000 },
- { 0x0000f880, 0x00400c11, 0x3f0 },
- { 0xb3800000, 0x00200811, 0x000 },
- { 0x0000f3fc, 0x00400c11, 0x3f0 },
- { 0xaf800000, 0x00200811, 0x000 },
- { 0x0000e000, 0x00400c11, 0x3f0 },
- { 0xb1800000, 0x00200811, 0x000 },
- { 0x0000f000, 0x00400c11, 0x3f0 },
- { 0x83000000, 0x00204411, 0x000 },
- { 0x00002148, 0x00204811, 0x000 },
- { 0x84000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x1d000000, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x01182000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0218a000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0318c000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0418f8e0, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0518f880, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0618e000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0718f000, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x0818f3fc, 0xc0304620, 0x000 },
- { 0x00000000, 0xd9004800, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x00000030, 0x00200a2d, 0x000 },
- { 0x00000000, 0xc0290c40, 0x000 },
- { 0x00000030, 0x00203623, 0x000 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x00a0000a, 0x000 },
- { 0x86000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00404801, 0x000 },
- { 0x85000000, 0xc0204411, 0x000 },
- { 0x00000000, 0x00404801, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x67c },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000000, 0x00404c02, 0x43e },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x00000000, 0xc0201000, 0x000 },
- { 0x00000000, 0xc0201400, 0x000 },
- { 0x00000000, 0xc0201800, 0x000 },
- { 0x00000000, 0xc0201c00, 0x000 },
- { 0x00007f00, 0x00280a21, 0x000 },
- { 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x44c },
- { 0x00000000, 0xc0202000, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x00000010, 0x00280a23, 0x000 },
- { 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x454 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0x00694624, 0x67c },
- { 0x00000000, 0x00400000, 0x459 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x00604805, 0x681 },
- { 0x00000000, 0x002824f0, 0x000 },
- { 0x00000007, 0x00280a23, 0x000 },
- { 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x460 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x04e00000, 0x479 },
- { 0x00000000, 0x00400000, 0x486 },
- { 0x00000002, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x465 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x02e00000, 0x479 },
- { 0x00000000, 0x00400000, 0x486 },
- { 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x46a },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x0ce00000, 0x479 },
- { 0x00000000, 0x00400000, 0x486 },
- { 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x46f },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x0ae00000, 0x479 },
- { 0x00000000, 0x00400000, 0x486 },
- { 0x00000005, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x474 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x06e00000, 0x479 },
- { 0x00000000, 0x00400000, 0x486 },
- { 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x479 },
- { 0x00000000, 0x002f00c9, 0x000 },
- { 0x00000000, 0x08e00000, 0x479 },
- { 0x00000000, 0x00400000, 0x486 },
- { 0x00007f00, 0x00280a21, 0x000 },
- { 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x000 },
- { 0x00000008, 0x00210a23, 0x000 },
- { 0x00000000, 0x14c00000, 0x483 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x00000000, 0xc0204400, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00007f00, 0x00280a21, 0x000 },
- { 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x48c },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0400000, 0x000 },
- { 0x00000000, 0x00404c08, 0x44c },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000010, 0x40210e20, 0x000 },
- { 0x00000011, 0x40211220, 0x000 },
- { 0x00000012, 0x40211620, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00210225, 0x000 },
- { 0x00000000, 0x14e00000, 0x496 },
- { 0x00040000, 0xc0494a20, 0x497 },
- { 0xfffbffff, 0xc0284a20, 0x000 },
- { 0x00000000, 0x00210223, 0x000 },
- { 0x00000000, 0x14e00000, 0x4a3 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x00210224, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x0000000c, 0x00204811, 0x000 },
- { 0x00000000, 0x00200010, 0x000 },
- { 0x00000000, 0x14c00000, 0x49f },
- { 0xa0000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000004, 0x00204811, 0x000 },
- { 0x0000216b, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204810, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000005, 0x00204811, 0x000 },
- { 0x0000216c, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204810, 0x000 },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00400000, 0x49d },
- { 0x00000000, 0xc0210a20, 0x000 },
- { 0x00000000, 0x14c00000, 0x4b6 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0604800, 0x681 },
- { 0x00000000, 0x00400000, 0x4ba },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0xc0294620, 0x000 },
- { 0x00000000, 0xc0600000, 0x67c },
- { 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x4c1 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0xcafebabe, 0x00404811, 0x000 },
- { 0x00000000, 0xc0204400, 0x000 },
- { 0x00000000, 0xc0404810, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x000021f8, 0x00204411, 0x000 },
- { 0x0000000e, 0x00204811, 0x000 },
- { 0x000421f9, 0x00604411, 0x67c },
- { 0x00000000, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x4c3 },
- { 0x00002180, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000003, 0x00333e2f, 0x000 },
- { 0x00000001, 0x00210221, 0x000 },
- { 0x00000000, 0x14e00000, 0x4f3 },
- { 0x0000002c, 0x00200a2d, 0x000 },
- { 0x00040000, 0x18e00c11, 0x4e2 },
- { 0x00000001, 0x00333e2f, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xd8c04800, 0x4d6 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000002d, 0x0020122d, 0x000 },
- { 0x00000000, 0x00290c83, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204802, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000008, 0x00300a22, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000011, 0x00210224, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000000, 0x00400000, 0x49d },
- { 0x0000002c, 0xc0203620, 0x000 },
- { 0x0000002d, 0xc0403620, 0x000 },
- { 0x0000000f, 0x00210221, 0x000 },
- { 0x00000000, 0x14c00000, 0x4f8 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00000000, 0xd9000000, 0x000 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0xb5000000, 0x00204411, 0x000 },
- { 0x00002000, 0x00204811, 0x000 },
- { 0xb6000000, 0x00204411, 0x000 },
- { 0x0000a000, 0x00204811, 0x000 },
- { 0xb7000000, 0x00204411, 0x000 },
- { 0x0000c000, 0x00204811, 0x000 },
- { 0xb8000000, 0x00204411, 0x000 },
- { 0x0000f8e0, 0x00204811, 0x000 },
- { 0xb9000000, 0x00204411, 0x000 },
- { 0x0000f880, 0x00204811, 0x000 },
- { 0xba000000, 0x00204411, 0x000 },
- { 0x0000e000, 0x00204811, 0x000 },
- { 0xbb000000, 0x00204411, 0x000 },
- { 0x0000f000, 0x00204811, 0x000 },
- { 0xbc000000, 0x00204411, 0x000 },
- { 0x0000f3fc, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000002, 0x00204811, 0x000 },
- { 0x000000ff, 0x00280e30, 0x000 },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x50c },
- { 0x00000000, 0xc0200800, 0x000 },
- { 0x00000000, 0x14c00000, 0x521 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x0000001c, 0x00203623, 0x000 },
- { 0x0000002b, 0x00203623, 0x000 },
- { 0x00000029, 0x00203623, 0x000 },
- { 0x00000028, 0x00203623, 0x000 },
- { 0x00000017, 0x00203623, 0x000 },
- { 0x00000025, 0x00203623, 0x000 },
- { 0x00000026, 0x00203623, 0x000 },
- { 0x00000015, 0x00203623, 0x000 },
- { 0x00000016, 0x00203623, 0x000 },
- { 0xffffe000, 0x00200c11, 0x000 },
- { 0x00000021, 0x00203623, 0x000 },
- { 0x00000022, 0x00203623, 0x000 },
- { 0x00001fff, 0x00200c11, 0x000 },
- { 0x00000023, 0x00203623, 0x000 },
- { 0x00000024, 0x00203623, 0x000 },
- { 0xf1ffffff, 0x00283a2e, 0x000 },
- { 0x0000001a, 0xc0220e20, 0x000 },
- { 0x00000000, 0x0029386e, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x0000002a, 0x40203620, 0x000 },
- { 0x87000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x0000a1f4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000000, 0x00200c11, 0x000 },
- { 0x00000030, 0x00203623, 0x000 },
- { 0x9d000000, 0x00204411, 0x000 },
- { 0x0000001f, 0x40214a20, 0x000 },
- { 0x96000000, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0200c00, 0x000 },
- { 0x00000000, 0xc0201000, 0x000 },
- { 0x0000001f, 0x00211624, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x0000001d, 0x00203623, 0x000 },
- { 0x00000003, 0x00281e23, 0x000 },
- { 0x00000008, 0x00222223, 0x000 },
- { 0xfffff000, 0x00282228, 0x000 },
- { 0x00000000, 0x002920e8, 0x000 },
- { 0x0000001f, 0x00203628, 0x000 },
- { 0x00000018, 0x00211e23, 0x000 },
- { 0x00000020, 0x00203627, 0x000 },
- { 0x00000002, 0x00221624, 0x000 },
- { 0x00000000, 0x003014a8, 0x000 },
- { 0x0000001e, 0x00203625, 0x000 },
- { 0x00000003, 0x00211a24, 0x000 },
- { 0x10000000, 0x00281a26, 0x000 },
- { 0xefffffff, 0x00283a2e, 0x000 },
- { 0x00000000, 0x004938ce, 0x66a },
- { 0x00000001, 0x40280a20, 0x000 },
- { 0x00000006, 0x40280e20, 0x000 },
- { 0x00000300, 0xc0281220, 0x000 },
- { 0x00000008, 0x00211224, 0x000 },
- { 0x00000000, 0xc0201620, 0x000 },
- { 0x00000000, 0xc0201a20, 0x000 },
- { 0x00000000, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x559 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00002258, 0x00300a24, 0x000 },
- { 0x00040000, 0x00694622, 0x67c },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00020000, 0x00294a26, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x561 },
- { 0x00000000, 0xc0201c10, 0x000 },
- { 0x00000000, 0xc0400000, 0x56f },
- { 0x00000002, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x561 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00002258, 0x00300a24, 0x000 },
- { 0x00040000, 0x00694622, 0x67c },
- { 0x00000000, 0xc0201c10, 0x000 },
- { 0x00000000, 0xc0400000, 0x56f },
- { 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x565 },
- { 0x00000000, 0xc0201c00, 0x000 },
- { 0x00000000, 0xc0400000, 0x56f },
- { 0x00000004, 0x002f0223, 0x000 },
- { 0x00000000, 0x0cc00000, 0x56d },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x0000216d, 0x00204411, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0604800, 0x681 },
- { 0x00000000, 0x00401c10, 0x56f },
- { 0x00000000, 0xc0200000, 0x000 },
- { 0x00000000, 0xc0400000, 0x000 },
- { 0x00000000, 0x0ee00000, 0x571 },
- { 0x00000000, 0x00600000, 0x5bc },
- { 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x582 },
- { 0x0000a2b7, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x67c },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x67c },
- { 0x0000a2c4, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x580 },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d1, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000001, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x593 },
- { 0x0000a2bb, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x67c },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x67c },
- { 0x0000a2c5, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x591 },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d2, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x00000002, 0x002f0224, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5a4 },
- { 0x0000a2bf, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2be, 0x00604411, 0x67c },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x67c },
- { 0x0000a2c6, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x5a2 },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d3, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x0000a2c3, 0x00204411, 0x000 },
- { 0x00000000, 0x00204807, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x67c },
- { 0x0000001a, 0x00212230, 0x000 },
- { 0x00000006, 0x00222630, 0x000 },
- { 0x00042004, 0x00604411, 0x67c },
- { 0x0000a2c7, 0x00204411, 0x000 },
- { 0x00000000, 0x003048e9, 0x000 },
- { 0x00000000, 0x00e00000, 0x5b1 },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000000, 0x00404808, 0x000 },
- { 0x0000a2d4, 0x00204411, 0x000 },
- { 0x00000001, 0x00504a28, 0x000 },
- { 0x85000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0x0000304a, 0x00204411, 0x000 },
- { 0x01000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00400000, 0x5b7 },
- { 0xa4000000, 0xc0204411, 0x000 },
- { 0x00000000, 0xc0404800, 0x000 },
- { 0x00000000, 0xc0600000, 0x5bc },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000002c, 0x00203621, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000000, 0x002f0230, 0x000 },
- { 0x00000000, 0x0cc00000, 0x5c3 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000030, 0x00403621, 0x5d6 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x5d6 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004a092, 0x00604411, 0x67c },
- { 0x00000031, 0x00203630, 0x000 },
- { 0x0004a093, 0x00604411, 0x67c },
- { 0x00000032, 0x00203630, 0x000 },
- { 0x0004a2b6, 0x00604411, 0x67c },
- { 0x00000033, 0x00203630, 0x000 },
- { 0x0004a2ba, 0x00604411, 0x67c },
- { 0x00000034, 0x00203630, 0x000 },
- { 0x0004a2be, 0x00604411, 0x67c },
- { 0x00000035, 0x00203630, 0x000 },
- { 0x0004a2c2, 0x00604411, 0x67c },
- { 0x00000036, 0x00203630, 0x000 },
- { 0x00042004, 0x00604411, 0x67c },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x0000003f, 0x00204811, 0x000 },
- { 0x00000005, 0x00204811, 0x000 },
- { 0x0000a1f4, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x88000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000006, 0x00204811, 0x000 },
- { 0x00000001, 0x002f0230, 0x000 },
- { 0x00000000, 0x0ce00000, 0x61f },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x61f },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00007e00, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x5f8 },
- { 0x0000a092, 0x00204411, 0x000 },
- { 0x00000031, 0x00204a2d, 0x000 },
- { 0x0000a093, 0x00204411, 0x000 },
- { 0x00000032, 0x00204a2d, 0x000 },
- { 0x0000a2b6, 0x00204411, 0x000 },
- { 0x00000033, 0x00204a2d, 0x000 },
- { 0x0000a2ba, 0x00204411, 0x000 },
- { 0x00000034, 0x00204a2d, 0x000 },
- { 0x0000a2be, 0x00204411, 0x000 },
- { 0x00000035, 0x00204a2d, 0x000 },
- { 0x0000a2c2, 0x00204411, 0x000 },
- { 0x00000036, 0x00204a2d, 0x000 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x000001ff, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x61e },
- { 0x00000000, 0x00210221, 0x000 },
- { 0x00000000, 0x14c00000, 0x601 },
- { 0x0004a003, 0x00604411, 0x67c },
- { 0x0000a003, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x14c00000, 0x606 },
- { 0x0004a010, 0x00604411, 0x67c },
- { 0x0000a010, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00000001, 0x00210621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x61e },
- { 0x0004a011, 0x00604411, 0x67c },
- { 0x0000a011, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a012, 0x00604411, 0x67c },
- { 0x0000a012, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a013, 0x00604411, 0x67c },
- { 0x0000a013, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a014, 0x00604411, 0x67c },
- { 0x0000a014, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a015, 0x00604411, 0x67c },
- { 0x0000a015, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a016, 0x00604411, 0x67c },
- { 0x0000a016, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x0004a017, 0x00604411, 0x67c },
- { 0x0000a017, 0x00204411, 0x000 },
- { 0x00000000, 0x00204810, 0x000 },
- { 0x00042004, 0x00604411, 0x67c },
- { 0x0000002c, 0x0080062d, 0x000 },
- { 0xff000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00000002, 0x00804811, 0x000 },
- { 0x00000000, 0x0ee00000, 0x630 },
- { 0x00000030, 0x0020062d, 0x000 },
- { 0x00000002, 0x00280621, 0x000 },
- { 0x00000000, 0x002f0221, 0x000 },
- { 0x00000000, 0x0ce00000, 0x62e },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x00042004, 0x00604411, 0x67c },
- { 0x00001000, 0x00200811, 0x000 },
- { 0x0000002b, 0x00203622, 0x000 },
- { 0x00000000, 0x00600000, 0x634 },
- { 0x00000000, 0x00600000, 0x5bc },
- { 0x98000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00804811, 0x000 },
- { 0x00000000, 0xc0600000, 0x634 },
- { 0x00000000, 0xc0400400, 0x001 },
- { 0x0000a2a4, 0x00204411, 0x000 },
- { 0x00000022, 0x00204811, 0x000 },
- { 0x89000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00404811, 0x620 },
- { 0x97000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x8a000000, 0x00204411, 0x000 },
- { 0x00000000, 0x00404811, 0x620 },
- { 0x00000000, 0x00600000, 0x64d },
- { 0x0001a2a4, 0xc0204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36a },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x09800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x0004217f, 0x00604411, 0x67c },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x000 },
- { 0x00000004, 0x00404c11, 0x647 },
- { 0x00000000, 0x00400000, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000004, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffffb, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0x00000008, 0x00291e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x00000017, 0x00201e2d, 0x000 },
- { 0xfffffff7, 0x00281e27, 0x000 },
- { 0x00000017, 0x00803627, 0x000 },
- { 0x0001a2a4, 0x00204411, 0x000 },
- { 0x00000016, 0x00604811, 0x36a },
- { 0x00002010, 0x00204411, 0x000 },
- { 0x00010000, 0x00204811, 0x000 },
- { 0x0000217c, 0x00204411, 0x000 },
- { 0x01800000, 0x00204811, 0x000 },
- { 0xffffffff, 0x00204811, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000000, 0x17000000, 0x000 },
- { 0x81000000, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0004217f, 0x00604411, 0x67c },
- { 0x0000001f, 0x00210230, 0x000 },
- { 0x00000000, 0x14c00000, 0x67b },
- { 0x00000010, 0x00404c11, 0x661 },
- { 0x00000000, 0xc0200400, 0x000 },
- { 0x00000000, 0x38c00000, 0x000 },
- { 0x0000001d, 0x00200a2d, 0x000 },
- { 0x0000001e, 0x00200e2d, 0x000 },
- { 0x0000001f, 0x0020122d, 0x000 },
- { 0x00000020, 0x0020162d, 0x000 },
- { 0x00002169, 0x00204411, 0x000 },
- { 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x00204805, 0x000 },
- { 0x00000000, 0x00204801, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000004, 0x00301224, 0x000 },
- { 0x00000000, 0x002f0064, 0x000 },
- { 0x00000000, 0x0cc00000, 0x67a },
- { 0x00000003, 0x00281a22, 0x000 },
- { 0x00000008, 0x00221222, 0x000 },
- { 0xfffff000, 0x00281224, 0x000 },
- { 0x00000000, 0x002910c4, 0x000 },
- { 0x0000001f, 0x00403624, 0x000 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x67c },
- { 0x9f000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x67f },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x681 },
- { 0x9e000000, 0x00204411, 0x000 },
- { 0xcafebabe, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x684 },
- { 0x00000000, 0x00800000, 0x000 },
- { 0x00000000, 0x00600000, 0x00b },
- { 0x00001000, 0x00600411, 0x315 },
- { 0x00000000, 0x00200411, 0x000 },
- { 0x00000000, 0x00600811, 0x1b2 },
- { 0x0000225c, 0x00204411, 0x000 },
- { 0x00000003, 0x00204811, 0x000 },
- { 0x00002256, 0x00204411, 0x000 },
- { 0x0000001b, 0x00204811, 0x000 },
- { 0x0000a1fc, 0x00204411, 0x000 },
- { 0x00000001, 0x00204811, 0x000 },
- { 0x0001a1fd, 0xc0204411, 0x000 },
- { 0x00000021, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000024, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000022, 0x0020222d, 0x000 },
- { 0x0000ffff, 0x00282228, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00204811, 0x000 },
- { 0x00000023, 0x00201e2d, 0x000 },
- { 0x00000010, 0x00221e27, 0x000 },
- { 0x00000000, 0x00294907, 0x000 },
- { 0x00000000, 0x00404811, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x014204f5, 0x05b30250, 0x000 },
- { 0x01c30168, 0x043505b3, 0x000 },
- { 0x02250209, 0x02500151, 0x000 },
- { 0x02230245, 0x02a00241, 0x000 },
- { 0x03cd05b3, 0x05b305b3, 0x000 },
- { 0x063c063d, 0x031f05b3, 0x000 },
- { 0x05b305b8, 0x03200340, 0x000 },
- { 0x032a0282, 0x03420334, 0x000 },
- { 0x05b305b3, 0x05b305b3, 0x000 },
- { 0x05b30544, 0x05b305b3, 0x000 },
- { 0x03b205b3, 0x04ae0344, 0x000 },
- { 0x048d0443, 0x043305b3, 0x000 },
- { 0x04c305b3, 0x043704d0, 0x000 },
- { 0x044304fa, 0x03510371, 0x000 },
- { 0x05b305b3, 0x05b305b3, 0x000 },
- { 0x05b305b3, 0x05b305b3, 0x000 },
- { 0x05b305b3, 0x063205ba, 0x000 },
- { 0x05b305b3, 0x000705b3, 0x000 },
- { 0x05b305b3, 0x05b305b3, 0x000 },
- { 0x05b305b3, 0x05b305b3, 0x000 },
- { 0x03ee03e3, 0x03fe03fc, 0x000 },
- { 0x04040400, 0x04020406, 0x000 },
- { 0x0412040e, 0x041a0416, 0x000 },
- { 0x0422041e, 0x042a0426, 0x000 },
- { 0x05b305b3, 0x042e05b3, 0x000 },
- { 0x05b305b3, 0x05b305b3, 0x000 },
- { 0x05b305b3, 0x05b305b3, 0x000 },
- { 0x00020668, 0x06860006, 0x000 },
-};
-
-static const u32 RV670_pfp_microcode[]={
-0xca0400,
-0xa00000,
-0x7e828b,
-0x7c038b,
-0x8001b8,
-0x7c038b,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xc41838,
-0xca2400,
-0xca2800,
-0x9581a8,
-0xc41c3a,
-0xc3c000,
-0xca0800,
-0xca0c00,
-0x7c744b,
-0xc20005,
-0x99c000,
-0xc41c3a,
-0x7c744c,
-0xc0fff0,
-0x042c04,
-0x309002,
-0x7d2500,
-0x351402,
-0x7d350b,
-0x255403,
-0x7cd580,
-0x259c03,
-0x95c004,
-0xd5001b,
-0x7eddc1,
-0x7d9d80,
-0xd6801b,
-0xd5801b,
-0xd4401e,
-0xd5401e,
-0xd6401e,
-0xd6801e,
-0xd4801e,
-0xd4c01e,
-0x9783d3,
-0xd5c01e,
-0xca0800,
-0x80001a,
-0xca0c00,
-0xe4011e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xe4013e,
-0xd4001e,
-0x80000c,
-0xc41838,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca1800,
-0xd4401e,
-0xd5801e,
-0x800053,
-0xd40075,
-0xd4401e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd48019,
-0xd4c018,
-0xd50017,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xe2001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0xd48060,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xd48061,
-0xd4401e,
-0x800000,
-0xd4801e,
-0xca0800,
-0xca0c00,
-0xd4401e,
-0xd48016,
-0xd4c016,
-0xd4801e,
-0x8001b8,
-0xd4c01e,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x948004,
-0xca1400,
-0xe420f3,
-0xd42013,
-0xd56065,
-0xd4e01c,
-0xd5201c,
-0xd5601c,
-0x800000,
-0x062001,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9483f7,
-0xca1400,
-0xe420f3,
-0x800079,
-0xd42013,
-0xc60843,
-0xca0c00,
-0xca1000,
-0x9883ef,
-0xca1400,
-0xd40064,
-0x80008d,
-0x000000,
-0xc41432,
-0xc61843,
-0xc4082f,
-0x954005,
-0xc40c30,
-0xd4401e,
-0x800000,
-0xee001e,
-0x9583f5,
-0xc41031,
-0xd44033,
-0xd52065,
-0xd4a01c,
-0xd4e01c,
-0xd5201c,
-0xe4015e,
-0xd4001e,
-0x800000,
-0x062001,
-0xca1800,
-0x0a2001,
-0xd60076,
-0xc40836,
-0x988007,
-0xc61045,
-0x950110,
-0xd4001f,
-0xd46062,
-0x800000,
-0xd42062,
-0xcc3835,
-0xcc1433,
-0x8401bb,
-0xd40072,
-0xd5401e,
-0x800000,
-0xee001e,
-0xe2001a,
-0x8401bb,
-0xe2001a,
-0xcc104b,
-0xcc0447,
-0x2c9401,
-0x7d098b,
-0x984005,
-0x7d15cb,
-0xd4001a,
-0x8001b8,
-0xd4006d,
-0x344401,
-0xcc0c48,
-0x98403a,
-0xcc2c4a,
-0x958004,
-0xcc0449,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0x282801,
-0x8400f0,
-0xcc1003,
-0x98801b,
-0x04380c,
-0x8400f0,
-0xcc1003,
-0x988017,
-0x043808,
-0x8400f0,
-0xcc1003,
-0x988013,
-0x043804,
-0x8400f0,
-0xcc1003,
-0x988014,
-0xcc104c,
-0x9a8009,
-0xcc144d,
-0x9840dc,
-0xd4006d,
-0xcc1848,
-0xd5001a,
-0xd5401a,
-0x8000c9,
-0xd5801a,
-0x96c0d5,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0x9ac003,
-0xd4006d,
-0xd4006e,
-0x800000,
-0xec007f,
-0x9ac0cc,
-0xd4006d,
-0x8001b8,
-0xd4006e,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0x7d9103,
-0x7dd583,
-0x7d190c,
-0x35cc1f,
-0x35701f,
-0x7cf0cb,
-0x7cd08b,
-0x880000,
-0x7e8e8b,
-0x95c004,
-0xd4006e,
-0x8001b8,
-0xd4001a,
-0xd4c01a,
-0xcc0803,
-0xcc0c03,
-0xcc1003,
-0xcc1403,
-0xcc1803,
-0xcc1c03,
-0xcc2403,
-0xcc2803,
-0x35c41f,
-0x36b01f,
-0x7c704b,
-0x34f01f,
-0x7c704b,
-0x35701f,
-0x7c704b,
-0x7d8881,
-0x7dccc1,
-0x7e5101,
-0x7e9541,
-0x7c9082,
-0x7cd4c2,
-0x7c848b,
-0x9ac003,
-0x7c8c8b,
-0x2c8801,
-0x98809e,
-0xd4006d,
-0x98409c,
-0xd4006e,
-0xcc084c,
-0xcc0c4d,
-0xcc1048,
-0xd4801a,
-0xd4c01a,
-0x800101,
-0xd5001a,
-0xcc0832,
-0xd40032,
-0x9482d9,
-0xca0c00,
-0xd4401e,
-0x800000,
-0xd4001e,
-0xe4011e,
-0xd4001e,
-0xca0800,
-0xca0c00,
-0xca1000,
-0xd4401e,
-0xca1400,
-0xd4801e,
-0xd4c01e,
-0xd5001e,
-0xd5401e,
-0xd54034,
-0x800000,
-0xee001e,
-0x280404,
-0xe2001a,
-0xe2001a,
-0xd4401a,
-0xca3800,
-0xcc0803,
-0xcc0c03,
-0xcc0c03,
-0xcc0c03,
-0x9882bd,
-0x000000,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0400,
-0xc2ff00,
-0xcc0834,
-0xc13fff,
-0x7c74cb,
-0x7cc90b,
-0x7d010f,
-0x9902b0,
-0x7c738b,
-0x8401bb,
-0xd7a06f,
-0x800000,
-0xee001f,
-0xca0800,
-0x281900,
-0x7d898b,
-0x958014,
-0x281404,
-0xca0c00,
-0xca1000,
-0xca1c00,
-0xca2400,
-0xe2001f,
-0xd4c01a,
-0xd5001a,
-0xd5401a,
-0xcc1803,
-0xcc2c03,
-0xcc2c03,
-0xcc2c03,
-0x7da58b,
-0x7d9c47,
-0x984297,
-0x000000,
-0x800161,
-0xd4c01a,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xe4013e,
-0xd4001e,
-0xd4401e,
-0xee001e,
-0xca0400,
-0xa00000,
-0x7e828b,
-0xca0800,
-0x248c06,
-0x0ccc06,
-0x98c006,
-0xcc104e,
-0x990004,
-0xd40073,
-0xe4011e,
-0xd4001e,
-0xd4401e,
-0xd4801e,
-0x800000,
-0xee001e,
-0xca0800,
-0xca0c00,
-0x34d018,
-0x251001,
-0x950021,
-0xc17fff,
-0xca1000,
-0xca1400,
-0xca1800,
-0xd4801d,
-0xd4c01d,
-0x7db18b,
-0xc14202,
-0xc2c001,
-0xd5801d,
-0x34dc0e,
-0x7d5d4c,
-0x7f734c,
-0xd7401e,
-0xd5001e,
-0xd5401e,
-0xc14200,
-0xc2c000,
-0x099c01,
-0x31dc10,
-0x7f5f4c,
-0x7f734c,
-0x042802,
-0x7d8380,
-0xd5a86f,
-0xd58066,
-0xd7401e,
-0xec005e,
-0xc82402,
-0xc82402,
-0x8001b8,
-0xd60076,
-0xd4401e,
-0xd4801e,
-0xd4c01e,
-0x800000,
-0xee001e,
-0x800000,
-0xee001f,
-0xd4001f,
-0x800000,
-0xd4001f,
-0xd4001f,
-0x880000,
-0xd4001f,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x000000,
-0x010171,
-0x020178,
-0x03008f,
-0x04007f,
-0x050003,
-0x06003f,
-0x070032,
-0x08012c,
-0x090046,
-0x0a0036,
-0x1001b6,
-0x1700a2,
-0x22013a,
-0x230149,
-0x2000b4,
-0x240125,
-0x27004d,
-0x28006a,
-0x2a0060,
-0x2b0052,
-0x2f0065,
-0x320087,
-0x34017f,
-0x3c0156,
-0x3f0072,
-0x41018c,
-0x44012e,
-0x550173,
-0x56017a,
-0x60000b,
-0x610034,
-0x620038,
-0x630038,
-0x640038,
-0x650038,
-0x660038,
-0x670038,
-0x68003a,
-0x690041,
-0x6a0048,
-0x6b0048,
-0x6c0048,
-0x6d0048,
-0x6e0048,
-0x6f0048,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-0x000006,
-};
-#endif
+++ /dev/null
-/* radeon_cp.c -- CP support for Radeon -*- linux-c -*- */
-/*
- * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
- * Copyright 2007 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "radeon_drm.h"
-#include "radeon_drv.h"
-#include "r300_reg.h"
-
-#include "radeon_microcode.h"
-#define RADEON_FIFO_DEBUG 0
-
-static int radeon_do_cleanup_cp(struct drm_device * dev);
-static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
-
-static u32 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
-{
- u32 ret;
- RADEON_WRITE(R520_MC_IND_INDEX, 0x7f0000 | (addr & 0xff));
- ret = RADEON_READ(R520_MC_IND_DATA);
- RADEON_WRITE(R520_MC_IND_INDEX, 0);
- return ret;
-}
-
-static u32 RS480_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
-{
- u32 ret;
- RADEON_WRITE(RS480_NB_MC_INDEX, addr & 0xff);
- ret = RADEON_READ(RS480_NB_MC_DATA);
- RADEON_WRITE(RS480_NB_MC_INDEX, 0xff);
- return ret;
-}
-
-static u32 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
-{
- u32 ret;
- RADEON_WRITE(RS690_MC_INDEX, (addr & RS690_MC_INDEX_MASK));
- ret = RADEON_READ(RS690_MC_DATA);
- RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_MASK);
- return ret;
-}
-
-static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
-{
- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
- return RS690_READ_MCIND(dev_priv, addr);
- else
- return RS480_READ_MCIND(dev_priv, addr);
-}
-
-u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
-{
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
- return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION);
- else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
- return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION);
- else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
- return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION);
- else
- return RADEON_READ(RADEON_MC_FB_LOCATION);
-}
-
-static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
-{
- if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
- R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc);
- else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
- RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc);
- else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
- R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc);
- else
- RADEON_WRITE(RADEON_MC_FB_LOCATION, fb_loc);
-}
-
-static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc)
-{
- if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
- R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc);
- else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
- RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc);
- else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
- R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc);
- else
- RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc);
-}
-
-static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
-{
- u32 agp_base_hi = upper_32_bits(agp_base);
- u32 agp_base_lo = agp_base & 0xffffffff;
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {
- R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo);
- R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi);
- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
- RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo);
- RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi);
- } else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) {
- R500_WRITE_MCIND(R520_MC_AGP_BASE, agp_base_lo);
- R500_WRITE_MCIND(R520_MC_AGP_BASE_2, agp_base_hi);
- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
- RADEON_WRITE(RADEON_AGP_BASE, agp_base_lo);
- RADEON_WRITE(RS480_AGP_BASE_2, agp_base_hi);
- } else {
- RADEON_WRITE(RADEON_AGP_BASE, agp_base_lo);
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R200)
- RADEON_WRITE(RADEON_AGP_BASE_2, agp_base_hi);
- }
-}
-
-static int RADEON_READ_PLL(struct drm_device * dev, int addr)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, addr & 0x1f);
- return RADEON_READ(RADEON_CLOCK_CNTL_DATA);
-}
-
-static u32 RADEON_READ_PCIE(drm_radeon_private_t *dev_priv, int addr)
-{
- RADEON_WRITE8(RADEON_PCIE_INDEX, addr & 0xff);
- return RADEON_READ(RADEON_PCIE_DATA);
-}
-
-#if RADEON_FIFO_DEBUG
-static void radeon_status(drm_radeon_private_t * dev_priv)
-{
- printk("%s:\n", __FUNCTION__);
- printk("RBBM_STATUS = 0x%08x\n",
- (unsigned int)RADEON_READ(RADEON_RBBM_STATUS));
- printk("CP_RB_RTPR = 0x%08x\n",
- (unsigned int)RADEON_READ(RADEON_CP_RB_RPTR));
- printk("CP_RB_WTPR = 0x%08x\n",
- (unsigned int)RADEON_READ(RADEON_CP_RB_WPTR));
- printk("AIC_CNTL = 0x%08x\n",
- (unsigned int)RADEON_READ(RADEON_AIC_CNTL));
- printk("AIC_STAT = 0x%08x\n",
- (unsigned int)RADEON_READ(RADEON_AIC_STAT));
- printk("AIC_PT_BASE = 0x%08x\n",
- (unsigned int)RADEON_READ(RADEON_AIC_PT_BASE));
- printk("TLB_ADDR = 0x%08x\n",
- (unsigned int)RADEON_READ(RADEON_AIC_TLB_ADDR));
- printk("TLB_DATA = 0x%08x\n",
- (unsigned int)RADEON_READ(RADEON_AIC_TLB_DATA));
-}
-#endif
-
-/* ================================================================
- * Engine, FIFO control
- */
-
-static int radeon_do_pixcache_flush(drm_radeon_private_t * dev_priv)
-{
- u32 tmp;
- int i;
-
- dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) {
- tmp = RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT);
- tmp |= RADEON_RB3D_DC_FLUSH_ALL;
- RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp);
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- if (!(RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT)
- & RADEON_RB3D_DC_BUSY)) {
- return 0;
- }
- DRM_UDELAY(1);
- }
- } else {
- /* don't flush or purge cache here or lockup */
- return 0;
- }
-
-#if RADEON_FIFO_DEBUG
- DRM_ERROR("failed!\n");
- radeon_status(dev_priv);
-#endif
- return -EBUSY;
-}
-
-static int radeon_do_wait_for_fifo(drm_radeon_private_t * dev_priv, int entries)
-{
- int i;
-
- dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- int slots = (RADEON_READ(RADEON_RBBM_STATUS)
- & RADEON_RBBM_FIFOCNT_MASK);
- if (slots >= entries)
- return 0;
- DRM_UDELAY(1);
- }
- DRM_INFO("wait for fifo failed status : 0x%08X 0x%08X\n",
- RADEON_READ(RADEON_RBBM_STATUS),
- RADEON_READ(R300_VAP_CNTL_STATUS));
-
-#if RADEON_FIFO_DEBUG
- DRM_ERROR("failed!\n");
- radeon_status(dev_priv);
-#endif
- return -EBUSY;
-}
-
-static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv)
-{
- int i, ret;
-
- dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
-
- ret = radeon_do_wait_for_fifo(dev_priv, 64);
- if (ret)
- return ret;
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- if (!(RADEON_READ(RADEON_RBBM_STATUS)
- & RADEON_RBBM_ACTIVE)) {
- radeon_do_pixcache_flush(dev_priv);
- return 0;
- }
- DRM_UDELAY(1);
- }
- DRM_INFO("wait idle failed status : 0x%08X 0x%08X\n",
- RADEON_READ(RADEON_RBBM_STATUS),
- RADEON_READ(R300_VAP_CNTL_STATUS));
-
-#if RADEON_FIFO_DEBUG
- DRM_ERROR("failed!\n");
- radeon_status(dev_priv);
-#endif
- return -EBUSY;
-}
-
-static void radeon_init_pipes(drm_radeon_private_t * dev_priv)
-{
- uint32_t gb_tile_config, gb_pipe_sel = 0;
-
- /* RS4xx/RS6xx/R4xx/R5xx */
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) {
- gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT);
- dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
- } else {
- /* R3xx */
- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) {
- dev_priv->num_gb_pipes = 2;
- } else {
- /* R3Vxx */
- dev_priv->num_gb_pipes = 1;
- }
- }
- DRM_INFO("Num pipes: %d\n", dev_priv->num_gb_pipes);
-
- gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 /*| R300_SUBPIXEL_1_16*/);
-
- switch(dev_priv->num_gb_pipes) {
- case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
- case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break;
- case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break;
- default:
- case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break;
- }
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
- RADEON_WRITE_PLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4));
- RADEON_WRITE(R500_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1));
- }
- RADEON_WRITE(R300_GB_TILE_CONFIG, gb_tile_config);
- radeon_do_wait_for_idle(dev_priv);
- RADEON_WRITE(R300_DST_PIPE_CONFIG, RADEON_READ(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
- RADEON_WRITE(R300_RB2D_DSTCACHE_MODE, (RADEON_READ(R300_RB2D_DSTCACHE_MODE) |
- R300_DC_AUTOFLUSH_ENABLE |
- R300_DC_DC_DISABLE_IGNORE_PE));
-
-
-}
-
-/* ================================================================
- * CP control, initialization
- */
-
-/* Load the microcode for the CP */
-static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
-{
- int i;
- DRM_DEBUG("\n");
-
- radeon_do_wait_for_idle(dev_priv);
-
- RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0);
-
- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R100) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV100) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV200) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS100) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS200)) {
- DRM_INFO("Loading R100 Microcode\n");
- for (i = 0; i < 256; i++) {
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
- R100_cp_microcode[i][1]);
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
- R100_cp_microcode[i][0]);
- }
- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R200) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV250) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV280) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS300)) {
- DRM_INFO("Loading R200 Microcode\n");
- for (i = 0; i < 256; i++) {
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
- R200_cp_microcode[i][1]);
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
- R200_cp_microcode[i][0]);
- }
- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV350) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
- DRM_INFO("Loading R300 Microcode\n");
- for (i = 0; i < 256; i++) {
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
- R300_cp_microcode[i][1]);
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
- R300_cp_microcode[i][0]);
- }
- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R423) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV410)) {
- DRM_INFO("Loading R400 Microcode\n");
- for (i = 0; i < 256; i++) {
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
- R420_cp_microcode[i][1]);
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
- R420_cp_microcode[i][0]);
- }
- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
- DRM_INFO("Loading RS690/RS740 Microcode\n");
- for (i = 0; i < 256; i++) {
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
- RS690_cp_microcode[i][1]);
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
- RS690_cp_microcode[i][0]);
- }
- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R580) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV560) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV570)) {
- DRM_INFO("Loading R500 Microcode\n");
- for (i = 0; i < 256; i++) {
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
- R520_cp_microcode[i][1]);
- RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
- R520_cp_microcode[i][0]);
- }
- }
-}
-
-/* Flush any pending commands to the CP. This should only be used just
- * prior to a wait for idle, as it informs the engine that the command
- * stream is ending.
- */
-static void radeon_do_cp_flush(drm_radeon_private_t * dev_priv)
-{
- DRM_DEBUG("\n");
-#if 0
- u32 tmp;
-
- tmp = RADEON_READ(RADEON_CP_RB_WPTR) | (1 << 31);
- RADEON_WRITE(RADEON_CP_RB_WPTR, tmp);
-#endif
-}
-
-/* Wait for the CP to go idle.
- */
-int radeon_do_cp_idle(drm_radeon_private_t * dev_priv)
-{
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(6);
-
- RADEON_PURGE_CACHE();
- RADEON_PURGE_ZCACHE();
- RADEON_WAIT_UNTIL_IDLE();
-
- ADVANCE_RING();
- COMMIT_RING();
-
- return radeon_do_wait_for_idle(dev_priv);
-}
-
-/* Start the Command Processor.
- */
-static void radeon_do_cp_start(drm_radeon_private_t * dev_priv)
-{
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- radeon_do_wait_for_idle(dev_priv);
-
- RADEON_WRITE(RADEON_CP_CSQ_CNTL, dev_priv->cp_mode);
-
- dev_priv->cp_running = 1;
-
- BEGIN_RING(8);
- /* isync can only be written through cp on r5xx write it here */
- OUT_RING(CP_PACKET0(RADEON_ISYNC_CNTL, 0));
- OUT_RING(RADEON_ISYNC_ANY2D_IDLE3D |
- RADEON_ISYNC_ANY3D_IDLE2D |
- RADEON_ISYNC_WAIT_IDLEGUI |
- RADEON_ISYNC_CPSCRATCH_IDLEGUI);
- RADEON_PURGE_CACHE();
- RADEON_PURGE_ZCACHE();
- RADEON_WAIT_UNTIL_IDLE();
- ADVANCE_RING();
- COMMIT_RING();
-
- dev_priv->track_flush |= RADEON_FLUSH_EMITED | RADEON_PURGE_EMITED;
-}
-
-/* Reset the Command Processor. This will not flush any pending
- * commands, so you must wait for the CP command stream to complete
- * before calling this routine.
- */
-static void radeon_do_cp_reset(drm_radeon_private_t * dev_priv)
-{
- u32 cur_read_ptr;
- DRM_DEBUG("\n");
-
- cur_read_ptr = RADEON_READ(RADEON_CP_RB_RPTR);
- RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr);
- SET_RING_HEAD(dev_priv, cur_read_ptr);
- dev_priv->ring.tail = cur_read_ptr;
-}
-
-/* Stop the Command Processor. This will not flush any pending
- * commands, so you must flush the command stream and wait for the CP
- * to go idle before calling this routine.
- */
-static void radeon_do_cp_stop(drm_radeon_private_t * dev_priv)
-{
- DRM_DEBUG("\n");
-
- RADEON_WRITE(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS);
-
- dev_priv->cp_running = 0;
-}
-
-/* Reset the engine. This will stop the CP if it is running.
- */
-static int radeon_do_engine_reset(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- u32 clock_cntl_index = 0, mclk_cntl = 0, rbbm_soft_reset;
- DRM_DEBUG("\n");
-
- radeon_do_pixcache_flush(dev_priv);
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV410) {
- /* may need something similar for newer chips */
- clock_cntl_index = RADEON_READ(RADEON_CLOCK_CNTL_INDEX);
- mclk_cntl = RADEON_READ_PLL(dev, RADEON_MCLK_CNTL);
-
- RADEON_WRITE_PLL(RADEON_MCLK_CNTL, (mclk_cntl |
- RADEON_FORCEON_MCLKA |
- RADEON_FORCEON_MCLKB |
- RADEON_FORCEON_YCLKA |
- RADEON_FORCEON_YCLKB |
- RADEON_FORCEON_MC |
- RADEON_FORCEON_AIC));
- }
-
- rbbm_soft_reset = RADEON_READ(RADEON_RBBM_SOFT_RESET);
-
- RADEON_WRITE(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset |
- RADEON_SOFT_RESET_CP |
- RADEON_SOFT_RESET_HI |
- RADEON_SOFT_RESET_SE |
- RADEON_SOFT_RESET_RE |
- RADEON_SOFT_RESET_PP |
- RADEON_SOFT_RESET_E2 |
- RADEON_SOFT_RESET_RB));
- RADEON_READ(RADEON_RBBM_SOFT_RESET);
- RADEON_WRITE(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset &
- ~(RADEON_SOFT_RESET_CP |
- RADEON_SOFT_RESET_HI |
- RADEON_SOFT_RESET_SE |
- RADEON_SOFT_RESET_RE |
- RADEON_SOFT_RESET_PP |
- RADEON_SOFT_RESET_E2 |
- RADEON_SOFT_RESET_RB)));
- RADEON_READ(RADEON_RBBM_SOFT_RESET);
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV410) {
- RADEON_WRITE_PLL(RADEON_MCLK_CNTL, mclk_cntl);
- RADEON_WRITE(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index);
- RADEON_WRITE(RADEON_RBBM_SOFT_RESET, rbbm_soft_reset);
- }
-
- /* setup the raster pipes */
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300)
- radeon_init_pipes(dev_priv);
-
- /* Reset the CP ring */
- radeon_do_cp_reset(dev_priv);
-
- /* The CP is no longer running after an engine reset */
- dev_priv->cp_running = 0;
-
- /* Reset any pending vertex, indirect buffers */
- radeon_freelist_reset(dev);
-
- return 0;
-}
-
-static void radeon_cp_init_ring_buffer(struct drm_device * dev,
- drm_radeon_private_t * dev_priv)
-{
- u32 ring_start, cur_read_ptr;
- u32 tmp;
-
- /* Initialize the memory controller. With new memory map, the fb location
- * is not changed, it should have been properly initialized already. Part
- * of the problem is that the code below is bogus, assuming the GART is
- * always appended to the fb which is not necessarily the case
- */
- if (!dev_priv->new_memmap)
- radeon_write_fb_location(dev_priv,
- ((dev_priv->gart_vm_start - 1) & 0xffff0000)
- | (dev_priv->fb_location >> 16));
-
-#if __OS_HAS_AGP
- if (dev_priv->flags & RADEON_IS_AGP) {
- radeon_write_agp_base(dev_priv, dev->agp->base);
-
- radeon_write_agp_location(dev_priv,
- (((dev_priv->gart_vm_start - 1 +
- dev_priv->gart_size) & 0xffff0000) |
- (dev_priv->gart_vm_start >> 16)));
-
- ring_start = (dev_priv->cp_ring->offset
- - dev->agp->base
- + dev_priv->gart_vm_start);
- } else
-#endif
- ring_start = (dev_priv->cp_ring->offset
- - (unsigned long)dev->sg->virtual
- + dev_priv->gart_vm_start);
-
- RADEON_WRITE(RADEON_CP_RB_BASE, ring_start);
-
- /* Set the write pointer delay */
- RADEON_WRITE(RADEON_CP_RB_WPTR_DELAY, 0);
-
- /* Initialize the ring buffer's read and write pointers */
- cur_read_ptr = RADEON_READ(RADEON_CP_RB_RPTR);
- RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr);
- SET_RING_HEAD(dev_priv, cur_read_ptr);
- dev_priv->ring.tail = cur_read_ptr;
-
-#if __OS_HAS_AGP
- if (dev_priv->flags & RADEON_IS_AGP) {
- RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR,
- dev_priv->ring_rptr->offset
- - dev->agp->base + dev_priv->gart_vm_start);
- } else
-#endif
- {
- struct drm_sg_mem *entry = dev->sg;
- unsigned long tmp_ofs, page_ofs;
-
- tmp_ofs = dev_priv->ring_rptr->offset -
- (unsigned long)dev->sg->virtual;
- page_ofs = tmp_ofs >> PAGE_SHIFT;
-
- RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR, entry->busaddr[page_ofs]);
- DRM_DEBUG("ring rptr: offset=0x%08lx handle=0x%08lx\n",
- (unsigned long)entry->busaddr[page_ofs],
- entry->handle + tmp_ofs);
- }
-
- /* Set ring buffer size */
-#ifdef __BIG_ENDIAN
- RADEON_WRITE(RADEON_CP_RB_CNTL,
- RADEON_BUF_SWAP_32BIT |
- (dev_priv->ring.fetch_size_l2ow << 18) |
- (dev_priv->ring.rptr_update_l2qw << 8) |
- dev_priv->ring.size_l2qw);
-#else
- RADEON_WRITE(RADEON_CP_RB_CNTL,
- (dev_priv->ring.fetch_size_l2ow << 18) |
- (dev_priv->ring.rptr_update_l2qw << 8) |
- dev_priv->ring.size_l2qw);
-#endif
-
- /* Initialize the scratch register pointer. This will cause
- * the scratch register values to be written out to memory
- * whenever they are updated.
- *
- * We simply put this behind the ring read pointer, this works
- * with PCI GART as well as (whatever kind of) AGP GART
- */
- RADEON_WRITE(RADEON_SCRATCH_ADDR, RADEON_READ(RADEON_CP_RB_RPTR_ADDR)
- + RADEON_SCRATCH_REG_OFFSET);
-
- dev_priv->scratch = ((__volatile__ u32 *)
- dev_priv->ring_rptr->handle +
- (RADEON_SCRATCH_REG_OFFSET / sizeof(u32)));
-
- RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
-
- /* Turn on bus mastering */
- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
- /* rs600/rs690/rs740 */
- tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
- RADEON_WRITE(RADEON_BUS_CNTL, tmp);
- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
- /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
- tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
- RADEON_WRITE(RADEON_BUS_CNTL, tmp);
- } /* PCIE cards appears to not need this */
-
- dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0;
- RADEON_WRITE(RADEON_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
-
- dev_priv->sarea_priv->last_dispatch = dev_priv->scratch[1] = 0;
- RADEON_WRITE(RADEON_LAST_DISPATCH_REG,
- dev_priv->sarea_priv->last_dispatch);
-
- dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0;
- RADEON_WRITE(RADEON_LAST_CLEAR_REG, dev_priv->sarea_priv->last_clear);
-
- radeon_do_wait_for_idle(dev_priv);
-
- /* Sync everything up */
- RADEON_WRITE(RADEON_ISYNC_CNTL,
- (RADEON_ISYNC_ANY2D_IDLE3D |
- RADEON_ISYNC_ANY3D_IDLE2D |
- RADEON_ISYNC_WAIT_IDLEGUI |
- RADEON_ISYNC_CPSCRATCH_IDLEGUI));
-
-}
-
-static void radeon_test_writeback(drm_radeon_private_t * dev_priv)
-{
- u32 tmp;
-
- /* Writeback doesn't seem to work everywhere, test it here and possibly
- * enable it if it appears to work
- */
- DRM_WRITE32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0);
- RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef);
-
- for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) {
- if (DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)) ==
- 0xdeadbeef)
- break;
- DRM_UDELAY(1);
- }
-
- if (tmp < dev_priv->usec_timeout) {
- dev_priv->writeback_works = 1;
- DRM_INFO("writeback test succeeded in %d usecs\n", tmp);
- } else {
- dev_priv->writeback_works = 0;
- DRM_INFO("writeback test failed\n");
- }
- if (radeon_no_wb == 1) {
- dev_priv->writeback_works = 0;
- DRM_INFO("writeback forced off\n");
- }
-
- if (!dev_priv->writeback_works) {
- /* Disable writeback to avoid unnecessary bus master transfers */
- RADEON_WRITE(RADEON_CP_RB_CNTL, RADEON_READ(RADEON_CP_RB_CNTL) | RADEON_RB_NO_UPDATE);
- RADEON_WRITE(RADEON_SCRATCH_UMSK, 0);
- }
-}
-
-/* Enable or disable IGP GART on the chip */
-static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
-{
- u32 temp;
-
- if (on) {
- DRM_DEBUG("programming igp gart %08X %08lX %08X\n",
- dev_priv->gart_vm_start,
- (long)dev_priv->gart_info.bus_addr,
- dev_priv->gart_size);
-
- temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL);
-
- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
- IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN |
- RS690_BLOCK_GFX_D3_EN));
- else
- IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, RS480_GART_INDEX_REG_EN);
-
- IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN |
- RS480_VA_SIZE_32MB));
-
- temp = IGP_READ_MCIND(dev_priv, RS480_GART_FEATURE_ID);
- IGP_WRITE_MCIND(RS480_GART_FEATURE_ID, (RS480_HANG_EN |
- RS480_TLB_ENABLE |
- RS480_GTW_LAC_EN |
- RS480_1LEVEL_GART));
-
- temp = dev_priv->gart_info.bus_addr & 0xfffff000;
- temp |= (upper_32_bits(dev_priv->gart_info.bus_addr) & 0xff) << 4;
- IGP_WRITE_MCIND(RS480_GART_BASE, temp);
-
- temp = IGP_READ_MCIND(dev_priv, RS480_AGP_MODE_CNTL);
- IGP_WRITE_MCIND(RS480_AGP_MODE_CNTL, ((1 << RS480_REQ_TYPE_SNOOP_SHIFT) |
- RS480_REQ_TYPE_SNOOP_DIS));
-
- radeon_write_agp_base(dev_priv, dev_priv->gart_vm_start);
-
- dev_priv->gart_size = 32*1024*1024;
- temp = (((dev_priv->gart_vm_start - 1 + dev_priv->gart_size) &
- 0xffff0000) | (dev_priv->gart_vm_start >> 16));
-
- radeon_write_agp_location(dev_priv, temp);
-
- temp = IGP_READ_MCIND(dev_priv, RS480_AGP_ADDRESS_SPACE_SIZE);
- IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN |
- RS480_VA_SIZE_32MB));
-
- do {
- temp = IGP_READ_MCIND(dev_priv, RS480_GART_CACHE_CNTRL);
- if ((temp & RS480_GART_CACHE_INVALIDATE) == 0)
- break;
- DRM_UDELAY(1);
- } while(1);
-
- IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL,
- RS480_GART_CACHE_INVALIDATE);
-
- do {
- temp = IGP_READ_MCIND(dev_priv, RS480_GART_CACHE_CNTRL);
- if ((temp & RS480_GART_CACHE_INVALIDATE) == 0)
- break;
- DRM_UDELAY(1);
- } while(1);
-
- IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL, 0);
- } else {
- IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, 0);
- }
-}
-
-static void radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on)
-{
- u32 tmp = RADEON_READ_PCIE(dev_priv, RADEON_PCIE_TX_GART_CNTL);
- if (on) {
-
- DRM_DEBUG("programming pcie %08X %08lX %08X\n",
- dev_priv->gart_vm_start,
- (long)dev_priv->gart_info.bus_addr,
- dev_priv->gart_size);
- RADEON_WRITE_PCIE(RADEON_PCIE_TX_DISCARD_RD_ADDR_LO,
- dev_priv->gart_vm_start);
- RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_BASE,
- dev_priv->gart_info.bus_addr);
- RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_START_LO,
- dev_priv->gart_vm_start);
- RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_END_LO,
- dev_priv->gart_vm_start +
- dev_priv->gart_size - 1);
-
- radeon_write_agp_location(dev_priv, 0xffffffc0); /* ?? */
-
- RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL,
- RADEON_PCIE_TX_GART_EN);
- } else {
- RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL,
- tmp & ~RADEON_PCIE_TX_GART_EN);
- }
-}
-
-/* Enable or disable PCI GART on the chip */
-static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
-{
- u32 tmp;
-
- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740) ||
- (dev_priv->flags & RADEON_IS_IGPGART)) {
- radeon_set_igpgart(dev_priv, on);
- return;
- }
-
- if (dev_priv->flags & RADEON_IS_PCIE) {
- radeon_set_pciegart(dev_priv, on);
- return;
- }
-
- tmp = RADEON_READ(RADEON_AIC_CNTL);
-
- if (on) {
- RADEON_WRITE(RADEON_AIC_CNTL,
- tmp | RADEON_PCIGART_TRANSLATE_EN);
-
- /* set PCI GART page-table base address
- */
- RADEON_WRITE(RADEON_AIC_PT_BASE, dev_priv->gart_info.bus_addr);
-
- /* set address range for PCI address translate
- */
- RADEON_WRITE(RADEON_AIC_LO_ADDR, dev_priv->gart_vm_start);
- RADEON_WRITE(RADEON_AIC_HI_ADDR, dev_priv->gart_vm_start
- + dev_priv->gart_size - 1);
-
- /* Turn off AGP aperture -- is this required for PCI GART?
- */
- radeon_write_agp_location(dev_priv, 0xffffffc0);
- RADEON_WRITE(RADEON_AGP_COMMAND, 0); /* clear AGP_COMMAND */
- } else {
- RADEON_WRITE(RADEON_AIC_CNTL,
- tmp & ~RADEON_PCIGART_TRANSLATE_EN);
- }
-}
-
-static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
-
- /* if we require new memory map but we don't have it fail */
- if ((dev_priv->flags & RADEON_NEW_MEMMAP) && !dev_priv->new_memmap) {
- DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX for 3D\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
-
- if (init->is_pci && (dev_priv->flags & RADEON_IS_AGP))
- {
- DRM_DEBUG("Forcing AGP card to PCI mode\n");
- dev_priv->flags &= ~RADEON_IS_AGP;
- }
- else if (!(dev_priv->flags & (RADEON_IS_AGP | RADEON_IS_PCI | RADEON_IS_PCIE))
- && !init->is_pci)
- {
- DRM_DEBUG("Restoring AGP flag\n");
- dev_priv->flags |= RADEON_IS_AGP;
- }
-
- if ((!(dev_priv->flags & RADEON_IS_AGP)) && !dev->sg) {
- DRM_ERROR("PCI GART memory not allocated!\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
-
- dev_priv->usec_timeout = init->usec_timeout;
- if (dev_priv->usec_timeout < 1 ||
- dev_priv->usec_timeout > RADEON_MAX_USEC_TIMEOUT) {
- DRM_DEBUG("TIMEOUT problem!\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
-
- /* Enable vblank on CRTC1 for older X servers
- */
- dev_priv->vblank_crtc = DRM_RADEON_VBLANK_CRTC1;
-
- dev_priv->do_boxes = 0;
- dev_priv->cp_mode = init->cp_mode;
-
- /* We don't support anything other than bus-mastering ring mode,
- * but the ring can be in either AGP or PCI space for the ring
- * read pointer.
- */
- if ((init->cp_mode != RADEON_CSQ_PRIBM_INDDIS) &&
- (init->cp_mode != RADEON_CSQ_PRIBM_INDBM)) {
- DRM_DEBUG("BAD cp_mode (%x)!\n", init->cp_mode);
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
-
- switch (init->fb_bpp) {
- case 16:
- dev_priv->color_fmt = RADEON_COLOR_FORMAT_RGB565;
- break;
- case 32:
- default:
- dev_priv->color_fmt = RADEON_COLOR_FORMAT_ARGB8888;
- break;
- }
- dev_priv->front_offset = init->front_offset;
- dev_priv->front_pitch = init->front_pitch;
- dev_priv->back_offset = init->back_offset;
- dev_priv->back_pitch = init->back_pitch;
-
- switch (init->depth_bpp) {
- case 16:
- dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z;
- break;
- case 32:
- default:
- dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z;
- break;
- }
- dev_priv->depth_offset = init->depth_offset;
- dev_priv->depth_pitch = init->depth_pitch;
-
- /* Hardware state for depth clears. Remove this if/when we no
- * longer clear the depth buffer with a 3D rectangle. Hard-code
- * all values to prevent unwanted 3D state from slipping through
- * and screwing with the clear operation.
- */
- dev_priv->depth_clear.rb3d_cntl = (RADEON_PLANE_MASK_ENABLE |
- (dev_priv->color_fmt << 10) |
- (dev_priv->chip_family < CHIP_R200 ? RADEON_ZBLOCK16 : 0));
-
- dev_priv->depth_clear.rb3d_zstencilcntl =
- (dev_priv->depth_fmt |
- RADEON_Z_TEST_ALWAYS |
- RADEON_STENCIL_TEST_ALWAYS |
- RADEON_STENCIL_S_FAIL_REPLACE |
- RADEON_STENCIL_ZPASS_REPLACE |
- RADEON_STENCIL_ZFAIL_REPLACE | RADEON_Z_WRITE_ENABLE);
-
- dev_priv->depth_clear.se_cntl = (RADEON_FFACE_CULL_CW |
- RADEON_BFACE_SOLID |
- RADEON_FFACE_SOLID |
- RADEON_FLAT_SHADE_VTX_LAST |
- RADEON_DIFFUSE_SHADE_FLAT |
- RADEON_ALPHA_SHADE_FLAT |
- RADEON_SPECULAR_SHADE_FLAT |
- RADEON_FOG_SHADE_FLAT |
- RADEON_VTX_PIX_CENTER_OGL |
- RADEON_ROUND_MODE_TRUNC |
- RADEON_ROUND_PREC_8TH_PIX);
-
-
- dev_priv->ring_offset = init->ring_offset;
- dev_priv->ring_rptr_offset = init->ring_rptr_offset;
- dev_priv->buffers_offset = init->buffers_offset;
- dev_priv->gart_textures_offset = init->gart_textures_offset;
-
- dev_priv->sarea = drm_getsarea(dev);
- if (!dev_priv->sarea) {
- DRM_ERROR("could not find sarea!\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
-
- dev_priv->cp_ring = drm_core_findmap(dev, init->ring_offset);
- if (!dev_priv->cp_ring) {
- DRM_ERROR("could not find cp ring region!\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
- dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset);
- if (!dev_priv->ring_rptr) {
- DRM_ERROR("could not find ring read pointer!\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
- dev->agp_buffer_token = init->buffers_offset;
- dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
- if (!dev->agp_buffer_map) {
- DRM_ERROR("could not find dma buffer region!\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
-
- if (init->gart_textures_offset) {
- dev_priv->gart_textures =
- drm_core_findmap(dev, init->gart_textures_offset);
- if (!dev_priv->gart_textures) {
- DRM_ERROR("could not find GART texture region!\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
- }
-
- dev_priv->sarea_priv =
- (drm_radeon_sarea_t *) ((u8 *) dev_priv->sarea->handle +
- init->sarea_priv_offset);
-
-#if __OS_HAS_AGP
- if (dev_priv->flags & RADEON_IS_AGP) {
- drm_core_ioremap(dev_priv->cp_ring, dev);
- drm_core_ioremap(dev_priv->ring_rptr, dev);
- drm_core_ioremap(dev->agp_buffer_map, dev);
- if (!dev_priv->cp_ring->handle ||
- !dev_priv->ring_rptr->handle ||
- !dev->agp_buffer_map->handle) {
- DRM_ERROR("could not find ioremap agp regions!\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
- } else
-#endif
- {
- dev_priv->cp_ring->handle = (void *)dev_priv->cp_ring->offset;
- dev_priv->ring_rptr->handle =
- (void *)dev_priv->ring_rptr->offset;
- dev->agp_buffer_map->handle =
- (void *)dev->agp_buffer_map->offset;
-
- DRM_DEBUG("dev_priv->cp_ring->handle %p\n",
- dev_priv->cp_ring->handle);
- DRM_DEBUG("dev_priv->ring_rptr->handle %p\n",
- dev_priv->ring_rptr->handle);
- DRM_DEBUG("dev->agp_buffer_map->handle %p\n",
- dev->agp_buffer_map->handle);
- }
-
- dev_priv->fb_location = (radeon_read_fb_location(dev_priv) & 0xffff) << 16;
- dev_priv->fb_size =
- ((radeon_read_fb_location(dev_priv) & 0xffff0000u) + 0x10000)
- - dev_priv->fb_location;
-
- dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) |
- ((dev_priv->front_offset
- + dev_priv->fb_location) >> 10));
-
- dev_priv->back_pitch_offset = (((dev_priv->back_pitch / 64) << 22) |
- ((dev_priv->back_offset
- + dev_priv->fb_location) >> 10));
-
- dev_priv->depth_pitch_offset = (((dev_priv->depth_pitch / 64) << 22) |
- ((dev_priv->depth_offset
- + dev_priv->fb_location) >> 10));
-
- dev_priv->gart_size = init->gart_size;
-
- /* New let's set the memory map ... */
- if (dev_priv->new_memmap) {
- u32 base = 0;
-
- DRM_INFO("Setting GART location based on new memory map\n");
-
- /* If using AGP, try to locate the AGP aperture at the same
- * location in the card and on the bus, though we have to
- * align it down.
- */
-#if __OS_HAS_AGP
- if (dev_priv->flags & RADEON_IS_AGP) {
- base = dev->agp->base;
- /* Check if valid */
- if ((base + dev_priv->gart_size - 1) >= dev_priv->fb_location &&
- base < (dev_priv->fb_location + dev_priv->fb_size - 1)) {
- DRM_INFO("Can't use AGP base @0x%08lx, won't fit\n",
- dev->agp->base);
- base = 0;
- }
- }
-#endif
- /* If not or if AGP is at 0 (Macs), try to put it elsewhere */
- if (base == 0) {
- base = dev_priv->fb_location + dev_priv->fb_size;
- if (base < dev_priv->fb_location ||
- ((base + dev_priv->gart_size) & 0xfffffffful) < base)
- base = dev_priv->fb_location
- - dev_priv->gart_size;
- }
- dev_priv->gart_vm_start = base & 0xffc00000u;
- if (dev_priv->gart_vm_start != base)
- DRM_INFO("GART aligned down from 0x%08x to 0x%08x\n",
- base, dev_priv->gart_vm_start);
- } else {
- DRM_INFO("Setting GART location based on old memory map\n");
- dev_priv->gart_vm_start = dev_priv->fb_location +
- RADEON_READ(RADEON_CONFIG_APER_SIZE);
- }
-
-#if __OS_HAS_AGP
- if (dev_priv->flags & RADEON_IS_AGP)
- dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset
- - dev->agp->base
- + dev_priv->gart_vm_start);
- else
-#endif
- dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset
- - (unsigned long)dev->sg->virtual
- + dev_priv->gart_vm_start);
-
- DRM_DEBUG("dev_priv->gart_size %d\n", dev_priv->gart_size);
- DRM_DEBUG("dev_priv->gart_vm_start 0x%x\n", dev_priv->gart_vm_start);
- DRM_DEBUG("dev_priv->gart_buffers_offset 0x%lx\n",
- dev_priv->gart_buffers_offset);
-
- dev_priv->ring.start = (u32 *) dev_priv->cp_ring->handle;
- dev_priv->ring.end = ((u32 *) dev_priv->cp_ring->handle
- + init->ring_size / sizeof(u32));
- dev_priv->ring.size = init->ring_size;
- dev_priv->ring.size_l2qw = drm_order(init->ring_size / 8);
-
- dev_priv->ring.rptr_update = /* init->rptr_update */ 4096;
- dev_priv->ring.rptr_update_l2qw = drm_order( /* init->rptr_update */ 4096 / 8);
-
- dev_priv->ring.fetch_size = /* init->fetch_size */ 32;
- dev_priv->ring.fetch_size_l2ow = drm_order( /* init->fetch_size */ 32 / 16);
-
- dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;
-
- dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK;
-
-#if __OS_HAS_AGP
- if (dev_priv->flags & RADEON_IS_AGP) {
- /* Turn off PCI GART */
- radeon_set_pcigart(dev_priv, 0);
- } else
-#endif
- {
- dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
- /* if we have an offset set from userspace */
- if (dev_priv->pcigart_offset_set) {
- dev_priv->gart_info.bus_addr =
- dev_priv->pcigart_offset + dev_priv->fb_location;
- dev_priv->gart_info.mapping.offset =
- dev_priv->pcigart_offset + dev_priv->fb_aper_offset;
- dev_priv->gart_info.mapping.size =
- dev_priv->gart_info.table_size;
-
- drm_core_ioremap_wc(&dev_priv->gart_info.mapping, dev);
- dev_priv->gart_info.addr =
- dev_priv->gart_info.mapping.handle;
-
- if (dev_priv->flags & RADEON_IS_PCIE)
- dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCIE;
- else
- dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCI;
- dev_priv->gart_info.gart_table_location =
- DRM_ATI_GART_FB;
-
- DRM_DEBUG("Setting phys_pci_gart to %p %08lX\n",
- dev_priv->gart_info.addr,
- dev_priv->pcigart_offset);
- } else {
- if (dev_priv->flags & RADEON_IS_IGPGART)
- dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_IGP;
- else
- dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCI;
- dev_priv->gart_info.gart_table_location =
- DRM_ATI_GART_MAIN;
- dev_priv->gart_info.addr = NULL;
- dev_priv->gart_info.bus_addr = 0;
- if (dev_priv->flags & RADEON_IS_PCIE) {
- DRM_ERROR
- ("Cannot use PCI Express without GART in FB memory\n");
- radeon_do_cleanup_cp(dev);
- return -EINVAL;
- }
- }
-
- if (!drm_ati_pcigart_init(dev, &dev_priv->gart_info)) {
- DRM_ERROR("failed to init PCI GART!\n");
- radeon_do_cleanup_cp(dev);
- return -ENOMEM;
- }
-
- /* Turn on PCI GART */
- radeon_set_pcigart(dev_priv, 1);
- }
-
- /* Start with assuming that writeback doesn't work */
- dev_priv->writeback_works = 0;
-
- radeon_cp_load_microcode(dev_priv);
- radeon_cp_init_ring_buffer(dev, dev_priv);
-
- dev_priv->last_buf = 0;
-
- radeon_do_engine_reset(dev);
- radeon_test_writeback(dev_priv);
-
- return 0;
-}
-
-static int radeon_do_cleanup_cp(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- /* Make sure interrupts are disabled here because the uninstall ioctl
- * may not have been called from userspace and after dev_private
- * is freed, it's too late.
- */
- if (dev->irq_enabled)
- drm_irq_uninstall(dev);
-
-#if __OS_HAS_AGP
- if (dev_priv->flags & RADEON_IS_AGP) {
- if (dev_priv->cp_ring != NULL) {
- drm_core_ioremapfree(dev_priv->cp_ring, dev);
- dev_priv->cp_ring = NULL;
- }
- if (dev_priv->ring_rptr != NULL) {
- drm_core_ioremapfree(dev_priv->ring_rptr, dev);
- dev_priv->ring_rptr = NULL;
- }
- if (dev->agp_buffer_map != NULL) {
- drm_core_ioremapfree(dev->agp_buffer_map, dev);
- dev->agp_buffer_map = NULL;
- }
- } else
-#endif
- {
-
- if (dev_priv->gart_info.bus_addr) {
- /* Turn off PCI GART */
- radeon_set_pcigart(dev_priv, 0);
- if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
- DRM_ERROR("failed to cleanup PCI GART!\n");
- }
-
- if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB)
- {
- drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
- dev_priv->gart_info.addr = 0;
- }
- }
- /* only clear to the start of flags */
- memset(dev_priv, 0, offsetof(drm_radeon_private_t, flags));
-
- return 0;
-}
-
-/* This code will reinit the Radeon CP hardware after a resume from disc.
- * AFAIK, it would be very difficult to pickle the state at suspend time, so
- * here we make sure that all Radeon hardware initialisation is re-done without
- * affecting running applications.
- *
- * Charl P. Botha <http://cpbotha.net>
- */
-static int radeon_do_resume_cp(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- if (!dev_priv) {
- DRM_ERROR("Called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("Starting radeon_do_resume_cp()\n");
-
-#if __OS_HAS_AGP
- if (dev_priv->flags & RADEON_IS_AGP) {
- /* Turn off PCI GART */
- radeon_set_pcigart(dev_priv, 0);
- } else
-#endif
- {
- /* Turn on PCI GART */
- radeon_set_pcigart(dev_priv, 1);
- }
-
- radeon_cp_load_microcode(dev_priv);
- radeon_cp_init_ring_buffer(dev, dev_priv);
-
- radeon_do_engine_reset(dev);
- radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1);
-
- DRM_DEBUG("radeon_do_resume_cp() complete\n");
-
- return 0;
-}
-
-int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_init_t *init = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (init->func == RADEON_INIT_R300_CP)
- r300_init_reg_flags(dev);
-
- switch (init->func) {
- case RADEON_INIT_CP:
- case RADEON_INIT_R200_CP:
- case RADEON_INIT_R300_CP:
- return radeon_do_init_cp(dev, init);
- case RADEON_CLEANUP_CP:
- return radeon_do_cleanup_cp(dev);
- }
-
- return -EINVAL;
-}
-
-int radeon_cp_start(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (dev_priv->cp_running) {
- DRM_DEBUG("while CP running\n");
- return 0;
- }
- if (dev_priv->cp_mode == RADEON_CSQ_PRIDIS_INDDIS) {
- DRM_DEBUG("called with bogus CP mode (%d)\n",
- dev_priv->cp_mode);
- return 0;
- }
-
- radeon_do_cp_start(dev_priv);
-
- return 0;
-}
-
-/* Stop the CP. The engine must have been idled before calling this
- * routine.
- */
-int radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_cp_stop_t *stop = data;
- int ret;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv->cp_running)
- return 0;
-
- /* Flush any pending CP commands. This ensures any outstanding
- * commands are exectuted by the engine before we turn it off.
- */
- if (stop->flush) {
- radeon_do_cp_flush(dev_priv);
- }
-
- /* If we fail to make the engine go idle, we return an error
- * code so that the DRM ioctl wrapper can try again.
- */
- if (stop->idle) {
- ret = radeon_do_cp_idle(dev_priv);
- if (ret)
- return ret;
- }
-
- /* Finally, we can turn off the CP. If the engine isn't idle,
- * we will get some dropped triangles as they won't be fully
- * rendered before the CP is shut down.
- */
- radeon_do_cp_stop(dev_priv);
-
- /* Reset the engine */
- radeon_do_engine_reset(dev);
-
- return 0;
-}
-
-void radeon_do_release(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- int i, ret;
-
- if (dev_priv) {
- if (dev_priv->cp_running) {
- /* Stop the cp */
- while ((ret = radeon_do_cp_idle(dev_priv)) != 0) {
- DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
-#ifdef __linux__
- schedule();
-#else
- mtx_sleep(&ret, &dev->dev_lock, 0, "rdnrel", 1);
-#endif
- }
- radeon_do_cp_stop(dev_priv);
- radeon_do_engine_reset(dev);
- }
-
- /* Disable *all* interrupts */
- if (dev_priv->mmio) /* remove this after permanent addmaps */
- RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
-
- if (dev_priv->mmio) { /* remove all surfaces */
- for (i = 0; i < RADEON_MAX_SURFACES; i++) {
- RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, 0);
- RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND +
- 16 * i, 0);
- RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND +
- 16 * i, 0);
- }
- }
-
- /* Free memory heap structures */
- radeon_mem_takedown(&(dev_priv->gart_heap));
- radeon_mem_takedown(&(dev_priv->fb_heap));
-
- /* deallocate kernel resources */
- radeon_do_cleanup_cp(dev);
- }
-}
-
-/* Just reset the CP ring. Called as part of an X Server engine reset.
- */
-int radeon_cp_reset(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_DEBUG("called before init done\n");
- return -EINVAL;
- }
-
- radeon_do_cp_reset(dev_priv);
-
- /* The CP is no longer running after an engine reset */
- dev_priv->cp_running = 0;
-
- return 0;
-}
-
-int radeon_cp_idle(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- return radeon_do_cp_idle(dev_priv);
-}
-
-/* Added by Charl P. Botha to call radeon_do_resume_cp().
- */
-int radeon_cp_resume(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
-
- return radeon_do_resume_cp(dev);
-}
-
-int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- return radeon_do_engine_reset(dev);
-}
-
-/* ================================================================
- * Fullscreen mode
- */
-
-/* KW: Deprecated to say the least:
- */
-int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- return 0;
-}
-
-/* ================================================================
- * Freelist management
- */
-
-/* Original comment: FIXME: ROTATE_BUFS is a hack to cycle through
- * bufs until freelist code is used. Note this hides a problem with
- * the scratch register * (used to keep track of last buffer
- * completed) being written to before * the last buffer has actually
- * completed rendering.
- *
- * KW: It's also a good way to find free buffers quickly.
- *
- * KW: Ideally this loop wouldn't exist, and freelist_get wouldn't
- * sleep. However, bugs in older versions of radeon_accel.c mean that
- * we essentially have to do this, else old clients will break.
- *
- * However, it does leave open a potential deadlock where all the
- * buffers are held by other clients, which can't release them because
- * they can't get the lock.
- */
-
-struct drm_buf *radeon_freelist_get(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_buf_priv_t *buf_priv;
- struct drm_buf *buf;
- int i, t;
- int start;
-
- if (++dev_priv->last_buf >= dma->buf_count)
- dev_priv->last_buf = 0;
-
- start = dev_priv->last_buf;
-
- for (t = 0; t < dev_priv->usec_timeout; t++) {
- u32 done_age = GET_SCRATCH(1);
- DRM_DEBUG("done_age = %d\n", done_age);
- for (i = start; i < dma->buf_count; i++) {
- buf = dma->buflist[i];
- buf_priv = buf->dev_private;
- if (buf->file_priv == NULL || (buf->pending &&
- buf_priv->age <=
- done_age)) {
- dev_priv->stats.requested_bufs++;
- buf->pending = 0;
- return buf;
- }
- start = 0;
- }
-
- if (t) {
- DRM_UDELAY(1);
- dev_priv->stats.freelist_loops++;
- }
- }
-
- DRM_DEBUG("returning NULL!\n");
- return NULL;
-}
-
-#if 0
-struct drm_buf *radeon_freelist_get(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_buf_priv_t *buf_priv;
- struct drm_buf *buf;
- int i, t;
- int start;
- u32 done_age = DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1));
-
- if (++dev_priv->last_buf >= dma->buf_count)
- dev_priv->last_buf = 0;
-
- start = dev_priv->last_buf;
- dev_priv->stats.freelist_loops++;
-
- for (t = 0; t < 2; t++) {
- for (i = start; i < dma->buf_count; i++) {
- buf = dma->buflist[i];
- buf_priv = buf->dev_private;
- if (buf->file_priv == 0 || (buf->pending &&
- buf_priv->age <=
- done_age)) {
- dev_priv->stats.requested_bufs++;
- buf->pending = 0;
- return buf;
- }
- }
- start = 0;
- }
-
- return NULL;
-}
-#endif
-
-void radeon_freelist_reset(struct drm_device * dev)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_radeon_private_t *dev_priv = dev->dev_private;
- int i;
-
- dev_priv->last_buf = 0;
- for (i = 0; i < dma->buf_count; i++) {
- struct drm_buf *buf = dma->buflist[i];
- drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
- buf_priv->age = 0;
- }
-}
-
-/* ================================================================
- * CP command submission
- */
-
-int radeon_wait_ring(drm_radeon_private_t * dev_priv, int n)
-{
- drm_radeon_ring_buffer_t *ring = &dev_priv->ring;
- int i;
- u32 last_head = GET_RING_HEAD(dev_priv);
-
- for (i = 0; i < dev_priv->usec_timeout; i++) {
- u32 head = GET_RING_HEAD(dev_priv);
-
- ring->space = (head - ring->tail) * sizeof(u32);
- if (ring->space <= 0)
- ring->space += ring->size;
- if (ring->space > n)
- return 0;
-
- dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
-
- if (head != last_head)
- i = 0;
- last_head = head;
-
- DRM_UDELAY(1);
- }
-
- /* FIXME: This return value is ignored in the BEGIN_RING macro! */
-#if RADEON_FIFO_DEBUG
- radeon_status(dev_priv);
- DRM_ERROR("failed!\n");
-#endif
- return -EBUSY;
-}
-
-static int radeon_cp_get_buffers(struct drm_device *dev,
- struct drm_file *file_priv,
- struct drm_dma * d)
-{
- int i;
- struct drm_buf *buf;
-
- for (i = d->granted_count; i < d->request_count; i++) {
- buf = radeon_freelist_get(dev);
- if (!buf)
- return -EBUSY; /* NOTE: broken client */
-
- buf->file_priv = file_priv;
-
- if (DRM_COPY_TO_USER(&d->request_indices[i], &buf->idx,
- sizeof(buf->idx)))
- return -EFAULT;
- if (DRM_COPY_TO_USER(&d->request_sizes[i], &buf->total,
- sizeof(buf->total)))
- return -EFAULT;
-
- d->granted_count++;
- }
- return 0;
-}
-
-int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- int ret = 0;
- struct drm_dma *d = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- /* Please don't send us buffers.
- */
- if (d->send_count != 0) {
- DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
- DRM_CURRENTPID, d->send_count);
- return -EINVAL;
- }
-
- /* We'll send you buffers.
- */
- if (d->request_count < 0 || d->request_count > dma->buf_count) {
- DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
- DRM_CURRENTPID, d->request_count, dma->buf_count);
- return -EINVAL;
- }
-
- d->granted_count = 0;
-
- if (d->request_count) {
- ret = radeon_cp_get_buffers(dev, file_priv, d);
- }
-
- return ret;
-}
-
-int radeon_driver_load(struct drm_device *dev, unsigned long flags)
-{
- drm_radeon_private_t *dev_priv;
- int ret = 0;
-
- dev_priv = drm_alloc(sizeof(drm_radeon_private_t), DRM_MEM_DRIVER);
- if (dev_priv == NULL)
- return -ENOMEM;
-
- memset(dev_priv, 0, sizeof(drm_radeon_private_t));
- dev->dev_private = (void *)dev_priv;
- dev_priv->flags = flags;
-
- switch (flags & RADEON_FAMILY_MASK) {
- case CHIP_R100:
- case CHIP_RV200:
- case CHIP_R200:
- case CHIP_R300:
- case CHIP_R350:
- case CHIP_R420:
- case CHIP_R423:
- case CHIP_RV410:
- case CHIP_RV515:
- case CHIP_R520:
- case CHIP_RV570:
- case CHIP_R580:
- dev_priv->flags |= RADEON_HAS_HIERZ;
- break;
- default:
- /* all other chips have no hierarchical z buffer */
- break;
- }
-
- dev_priv->chip_family = flags & RADEON_FAMILY_MASK;
- if (drm_device_is_agp(dev))
- dev_priv->flags |= RADEON_IS_AGP;
- else if (drm_device_is_pcie(dev))
- dev_priv->flags |= RADEON_IS_PCIE;
- else
- dev_priv->flags |= RADEON_IS_PCI;
-
- ret = drm_vblank_init(dev, 2);
- if (ret) {
- radeon_driver_unload(dev);
- return ret;
- }
-
- DRM_DEBUG("%s card detected\n",
- ((dev_priv->flags & RADEON_IS_AGP) ? "AGP" : (((dev_priv->flags & RADEON_IS_PCIE) ? "PCIE" : "PCI"))));
- return ret;
-}
-
-/* Create mappings for registers and framebuffer so userland doesn't necessarily
- * have to find them.
- */
-int radeon_driver_firstopen(struct drm_device *dev)
-{
- int ret;
- drm_local_map_t *map;
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE;
-
- ret = drm_addmap(dev, drm_get_resource_start(dev, 2),
- drm_get_resource_len(dev, 2), _DRM_REGISTERS,
- _DRM_READ_ONLY, &dev_priv->mmio);
- if (ret != 0)
- return ret;
-
- dev_priv->fb_aper_offset = drm_get_resource_start(dev, 0);
- ret = drm_addmap(dev, dev_priv->fb_aper_offset,
- drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER,
- _DRM_WRITE_COMBINING, &map);
- if (ret != 0)
- return ret;
-
- return 0;
-}
-
-int radeon_driver_unload(struct drm_device *dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- DRM_DEBUG("\n");
- drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);
-
- dev->dev_private = NULL;
- return 0;
-}
+++ /dev/null
-/* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*-
- *
- * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
- * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- * Keith Whitwell <keith@tungstengraphics.com>
- */
-
-#ifndef __RADEON_DRM_H__
-#define __RADEON_DRM_H__
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the X server file (radeon_sarea.h)
- */
-#ifndef __RADEON_SAREA_DEFINES__
-#define __RADEON_SAREA_DEFINES__
-
-/* Old style state flags, required for sarea interface (1.1 and 1.2
- * clears) and 1.2 drm_vertex2 ioctl.
- */
-#define RADEON_UPLOAD_CONTEXT 0x00000001
-#define RADEON_UPLOAD_VERTFMT 0x00000002
-#define RADEON_UPLOAD_LINE 0x00000004
-#define RADEON_UPLOAD_BUMPMAP 0x00000008
-#define RADEON_UPLOAD_MASKS 0x00000010
-#define RADEON_UPLOAD_VIEWPORT 0x00000020
-#define RADEON_UPLOAD_SETUP 0x00000040
-#define RADEON_UPLOAD_TCL 0x00000080
-#define RADEON_UPLOAD_MISC 0x00000100
-#define RADEON_UPLOAD_TEX0 0x00000200
-#define RADEON_UPLOAD_TEX1 0x00000400
-#define RADEON_UPLOAD_TEX2 0x00000800
-#define RADEON_UPLOAD_TEX0IMAGES 0x00001000
-#define RADEON_UPLOAD_TEX1IMAGES 0x00002000
-#define RADEON_UPLOAD_TEX2IMAGES 0x00004000
-#define RADEON_UPLOAD_CLIPRECTS 0x00008000 /* handled client-side */
-#define RADEON_REQUIRE_QUIESCENCE 0x00010000
-#define RADEON_UPLOAD_ZBIAS 0x00020000 /* version 1.2 and newer */
-#define RADEON_UPLOAD_ALL 0x003effff
-#define RADEON_UPLOAD_CONTEXT_ALL 0x003e01ff
-
-/* New style per-packet identifiers for use in cmd_buffer ioctl with
- * the RADEON_EMIT_PACKET command. Comments relate new packets to old
- * state bits and the packet size:
- */
-#define RADEON_EMIT_PP_MISC 0 /* context/7 */
-#define RADEON_EMIT_PP_CNTL 1 /* context/3 */
-#define RADEON_EMIT_RB3D_COLORPITCH 2 /* context/1 */
-#define RADEON_EMIT_RE_LINE_PATTERN 3 /* line/2 */
-#define RADEON_EMIT_SE_LINE_WIDTH 4 /* line/1 */
-#define RADEON_EMIT_PP_LUM_MATRIX 5 /* bumpmap/1 */
-#define RADEON_EMIT_PP_ROT_MATRIX_0 6 /* bumpmap/2 */
-#define RADEON_EMIT_RB3D_STENCILREFMASK 7 /* masks/3 */
-#define RADEON_EMIT_SE_VPORT_XSCALE 8 /* viewport/6 */
-#define RADEON_EMIT_SE_CNTL 9 /* setup/2 */
-#define RADEON_EMIT_SE_CNTL_STATUS 10 /* setup/1 */
-#define RADEON_EMIT_RE_MISC 11 /* misc/1 */
-#define RADEON_EMIT_PP_TXFILTER_0 12 /* tex0/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_0 13 /* tex0/1 */
-#define RADEON_EMIT_PP_TXFILTER_1 14 /* tex1/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_1 15 /* tex1/1 */
-#define RADEON_EMIT_PP_TXFILTER_2 16 /* tex2/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_2 17 /* tex2/1 */
-#define RADEON_EMIT_SE_ZBIAS_FACTOR 18 /* zbias/2 */
-#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT 19 /* tcl/11 */
-#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED 20 /* material/17 */
-#define R200_EMIT_PP_TXCBLEND_0 21 /* tex0/4 */
-#define R200_EMIT_PP_TXCBLEND_1 22 /* tex1/4 */
-#define R200_EMIT_PP_TXCBLEND_2 23 /* tex2/4 */
-#define R200_EMIT_PP_TXCBLEND_3 24 /* tex3/4 */
-#define R200_EMIT_PP_TXCBLEND_4 25 /* tex4/4 */
-#define R200_EMIT_PP_TXCBLEND_5 26 /* tex5/4 */
-#define R200_EMIT_PP_TXCBLEND_6 27 /* /4 */
-#define R200_EMIT_PP_TXCBLEND_7 28 /* /4 */
-#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0 29 /* tcl/7 */
-#define R200_EMIT_TFACTOR_0 30 /* tf/7 */
-#define R200_EMIT_VTX_FMT_0 31 /* vtx/5 */
-#define R200_EMIT_VAP_CTL 32 /* vap/1 */
-#define R200_EMIT_MATRIX_SELECT_0 33 /* msl/5 */
-#define R200_EMIT_TEX_PROC_CTL_2 34 /* tcg/5 */
-#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL 35 /* tcl/1 */
-#define R200_EMIT_PP_TXFILTER_0 36 /* tex0/6 */
-#define R200_EMIT_PP_TXFILTER_1 37 /* tex1/6 */
-#define R200_EMIT_PP_TXFILTER_2 38 /* tex2/6 */
-#define R200_EMIT_PP_TXFILTER_3 39 /* tex3/6 */
-#define R200_EMIT_PP_TXFILTER_4 40 /* tex4/6 */
-#define R200_EMIT_PP_TXFILTER_5 41 /* tex5/6 */
-#define R200_EMIT_PP_TXOFFSET_0 42 /* tex0/1 */
-#define R200_EMIT_PP_TXOFFSET_1 43 /* tex1/1 */
-#define R200_EMIT_PP_TXOFFSET_2 44 /* tex2/1 */
-#define R200_EMIT_PP_TXOFFSET_3 45 /* tex3/1 */
-#define R200_EMIT_PP_TXOFFSET_4 46 /* tex4/1 */
-#define R200_EMIT_PP_TXOFFSET_5 47 /* tex5/1 */
-#define R200_EMIT_VTE_CNTL 48 /* vte/1 */
-#define R200_EMIT_OUTPUT_VTX_COMP_SEL 49 /* vtx/1 */
-#define R200_EMIT_PP_TAM_DEBUG3 50 /* tam/1 */
-#define R200_EMIT_PP_CNTL_X 51 /* cst/1 */
-#define R200_EMIT_RB3D_DEPTHXY_OFFSET 52 /* cst/1 */
-#define R200_EMIT_RE_AUX_SCISSOR_CNTL 53 /* cst/1 */
-#define R200_EMIT_RE_SCISSOR_TL_0 54 /* cst/2 */
-#define R200_EMIT_RE_SCISSOR_TL_1 55 /* cst/2 */
-#define R200_EMIT_RE_SCISSOR_TL_2 56 /* cst/2 */
-#define R200_EMIT_SE_VAP_CNTL_STATUS 57 /* cst/1 */
-#define R200_EMIT_SE_VTX_STATE_CNTL 58 /* cst/1 */
-#define R200_EMIT_RE_POINTSIZE 59 /* cst/1 */
-#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0 60 /* cst/4 */
-#define R200_EMIT_PP_CUBIC_FACES_0 61
-#define R200_EMIT_PP_CUBIC_OFFSETS_0 62
-#define R200_EMIT_PP_CUBIC_FACES_1 63
-#define R200_EMIT_PP_CUBIC_OFFSETS_1 64
-#define R200_EMIT_PP_CUBIC_FACES_2 65
-#define R200_EMIT_PP_CUBIC_OFFSETS_2 66
-#define R200_EMIT_PP_CUBIC_FACES_3 67
-#define R200_EMIT_PP_CUBIC_OFFSETS_3 68
-#define R200_EMIT_PP_CUBIC_FACES_4 69
-#define R200_EMIT_PP_CUBIC_OFFSETS_4 70
-#define R200_EMIT_PP_CUBIC_FACES_5 71
-#define R200_EMIT_PP_CUBIC_OFFSETS_5 72
-#define RADEON_EMIT_PP_TEX_SIZE_0 73
-#define RADEON_EMIT_PP_TEX_SIZE_1 74
-#define RADEON_EMIT_PP_TEX_SIZE_2 75
-#define R200_EMIT_RB3D_BLENDCOLOR 76
-#define R200_EMIT_TCL_POINT_SPRITE_CNTL 77
-#define RADEON_EMIT_PP_CUBIC_FACES_0 78
-#define RADEON_EMIT_PP_CUBIC_OFFSETS_T0 79
-#define RADEON_EMIT_PP_CUBIC_FACES_1 80
-#define RADEON_EMIT_PP_CUBIC_OFFSETS_T1 81
-#define RADEON_EMIT_PP_CUBIC_FACES_2 82
-#define RADEON_EMIT_PP_CUBIC_OFFSETS_T2 83
-#define R200_EMIT_PP_TRI_PERF_CNTL 84
-#define R200_EMIT_PP_AFS_0 85
-#define R200_EMIT_PP_AFS_1 86
-#define R200_EMIT_ATF_TFACTOR 87
-#define R200_EMIT_PP_TXCTLALL_0 88
-#define R200_EMIT_PP_TXCTLALL_1 89
-#define R200_EMIT_PP_TXCTLALL_2 90
-#define R200_EMIT_PP_TXCTLALL_3 91
-#define R200_EMIT_PP_TXCTLALL_4 92
-#define R200_EMIT_PP_TXCTLALL_5 93
-#define R200_EMIT_VAP_PVS_CNTL 94
-#define RADEON_MAX_STATE_PACKETS 95
-
-/* Commands understood by cmd_buffer ioctl. More can be added but
- * obviously these can't be removed or changed:
- */
-#define RADEON_CMD_PACKET 1 /* emit one of the register packets above */
-#define RADEON_CMD_SCALARS 2 /* emit scalar data */
-#define RADEON_CMD_VECTORS 3 /* emit vector data */
-#define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */
-#define RADEON_CMD_PACKET3 5 /* emit hw packet */
-#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */
-#define RADEON_CMD_SCALARS2 7 /* r200 stopgap */
-#define RADEON_CMD_WAIT 8 /* emit hw wait commands -- note:
- * doesn't make the cpu wait, just
- * the graphics hardware */
-#define RADEON_CMD_VECLINEAR 9 /* another r200 stopgap */
-
-typedef union {
- int i;
- struct {
- unsigned char cmd_type, pad0, pad1, pad2;
- } header;
- struct {
- unsigned char cmd_type, packet_id, pad0, pad1;
- } packet;
- struct {
- unsigned char cmd_type, offset, stride, count;
- } scalars;
- struct {
- unsigned char cmd_type, offset, stride, count;
- } vectors;
- struct {
- unsigned char cmd_type, addr_lo, addr_hi, count;
- } veclinear;
- struct {
- unsigned char cmd_type, buf_idx, pad0, pad1;
- } dma;
- struct {
- unsigned char cmd_type, flags, pad0, pad1;
- } wait;
-} drm_radeon_cmd_header_t;
-
-#define RADEON_WAIT_2D 0x1
-#define RADEON_WAIT_3D 0x2
-
-/* Allowed parameters for R300_CMD_PACKET3
- */
-#define R300_CMD_PACKET3_CLEAR 0
-#define R300_CMD_PACKET3_RAW 1
-
-/* Commands understood by cmd_buffer ioctl for R300.
- * The interface has not been stabilized, so some of these may be removed
- * and eventually reordered before stabilization.
- */
-#define R300_CMD_PACKET0 1
-#define R300_CMD_VPU 2 /* emit vertex program upload */
-#define R300_CMD_PACKET3 3 /* emit a packet3 */
-#define R300_CMD_END3D 4 /* emit sequence ending 3d rendering */
-#define R300_CMD_CP_DELAY 5
-#define R300_CMD_DMA_DISCARD 6
-#define R300_CMD_WAIT 7
-# define R300_WAIT_2D 0x1
-# define R300_WAIT_3D 0x2
-/* these two defines are DOING IT WRONG - however
- * we have userspace which relies on using these.
- * The wait interface is backwards compat new
- * code should use the NEW_WAIT defines below
- * THESE ARE NOT BIT FIELDS
- */
-# define R300_WAIT_2D_CLEAN 0x3
-# define R300_WAIT_3D_CLEAN 0x4
-
-# define R300_NEW_WAIT_2D_3D 0x3
-# define R300_NEW_WAIT_2D_2D_CLEAN 0x4
-# define R300_NEW_WAIT_3D_3D_CLEAN 0x6
-# define R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN 0x8
-
-#define R300_CMD_SCRATCH 8
-#define R300_CMD_R500FP 9
-
-typedef union {
- unsigned int u;
- struct {
- unsigned char cmd_type, pad0, pad1, pad2;
- } header;
- struct {
- unsigned char cmd_type, count, reglo, reghi;
- } packet0;
- struct {
- unsigned char cmd_type, count, adrlo, adrhi;
- } vpu;
- struct {
- unsigned char cmd_type, packet, pad0, pad1;
- } packet3;
- struct {
- unsigned char cmd_type, packet;
- unsigned short count; /* amount of packet2 to emit */
- } delay;
- struct {
- unsigned char cmd_type, buf_idx, pad0, pad1;
- } dma;
- struct {
- unsigned char cmd_type, flags, pad0, pad1;
- } wait;
- struct {
- unsigned char cmd_type, reg, n_bufs, flags;
- } scratch;
- struct {
- unsigned char cmd_type, count, adrlo, adrhi_flags;
- } r500fp;
-} drm_r300_cmd_header_t;
-
-#define RADEON_FRONT 0x1
-#define RADEON_BACK 0x2
-#define RADEON_DEPTH 0x4
-#define RADEON_STENCIL 0x8
-#define RADEON_CLEAR_FASTZ 0x80000000
-#define RADEON_USE_HIERZ 0x40000000
-#define RADEON_USE_COMP_ZBUF 0x20000000
-
-#define R500FP_CONSTANT_TYPE (1 << 1)
-#define R500FP_CONSTANT_CLAMP (1 << 2)
-
-/* Primitive types
- */
-#define RADEON_POINTS 0x1
-#define RADEON_LINES 0x2
-#define RADEON_LINE_STRIP 0x3
-#define RADEON_TRIANGLES 0x4
-#define RADEON_TRIANGLE_FAN 0x5
-#define RADEON_TRIANGLE_STRIP 0x6
-
-/* Vertex/indirect buffer size
- */
-#define RADEON_BUFFER_SIZE 65536
-
-/* Byte offsets for indirect buffer data
- */
-#define RADEON_INDEX_PRIM_OFFSET 20
-
-#define RADEON_SCRATCH_REG_OFFSET 32
-#define R600_SCRATCH_REG_OFFSET 256
-
-#define RADEON_NR_SAREA_CLIPRECTS 12
-
-/* There are 2 heaps (local/GART). Each region within a heap is a
- * minimum of 64k, and there are at most 64 of them per heap.
- */
-#define RADEON_LOCAL_TEX_HEAP 0
-#define RADEON_GART_TEX_HEAP 1
-#define RADEON_NR_TEX_HEAPS 2
-#define RADEON_NR_TEX_REGIONS 64
-#define RADEON_LOG_TEX_GRANULARITY 16
-
-#define RADEON_MAX_TEXTURE_LEVELS 12
-#define RADEON_MAX_TEXTURE_UNITS 3
-
-#define RADEON_MAX_SURFACES 8
-
-/* Blits have strict offset rules. All blit offset must be aligned on
- * a 1K-byte boundary.
- */
-#define RADEON_OFFSET_SHIFT 10
-#define RADEON_OFFSET_ALIGN (1 << RADEON_OFFSET_SHIFT)
-#define RADEON_OFFSET_MASK (RADEON_OFFSET_ALIGN - 1)
-
-#endif /* __RADEON_SAREA_DEFINES__ */
-
-typedef struct {
- unsigned int red;
- unsigned int green;
- unsigned int blue;
- unsigned int alpha;
-} radeon_color_regs_t;
-
-typedef struct {
- /* Context state */
- unsigned int pp_misc; /* 0x1c14 */
- unsigned int pp_fog_color;
- unsigned int re_solid_color;
- unsigned int rb3d_blendcntl;
- unsigned int rb3d_depthoffset;
- unsigned int rb3d_depthpitch;
- unsigned int rb3d_zstencilcntl;
-
- unsigned int pp_cntl; /* 0x1c38 */
- unsigned int rb3d_cntl;
- unsigned int rb3d_coloroffset;
- unsigned int re_width_height;
- unsigned int rb3d_colorpitch;
- unsigned int se_cntl;
-
- /* Vertex format state */
- unsigned int se_coord_fmt; /* 0x1c50 */
-
- /* Line state */
- unsigned int re_line_pattern; /* 0x1cd0 */
- unsigned int re_line_state;
-
- unsigned int se_line_width; /* 0x1db8 */
-
- /* Bumpmap state */
- unsigned int pp_lum_matrix; /* 0x1d00 */
-
- unsigned int pp_rot_matrix_0; /* 0x1d58 */
- unsigned int pp_rot_matrix_1;
-
- /* Mask state */
- unsigned int rb3d_stencilrefmask; /* 0x1d7c */
- unsigned int rb3d_ropcntl;
- unsigned int rb3d_planemask;
-
- /* Viewport state */
- unsigned int se_vport_xscale; /* 0x1d98 */
- unsigned int se_vport_xoffset;
- unsigned int se_vport_yscale;
- unsigned int se_vport_yoffset;
- unsigned int se_vport_zscale;
- unsigned int se_vport_zoffset;
-
- /* Setup state */
- unsigned int se_cntl_status; /* 0x2140 */
-
- /* Misc state */
- unsigned int re_top_left; /* 0x26c0 */
- unsigned int re_misc;
-} drm_radeon_context_regs_t;
-
-typedef struct {
- /* Zbias state */
- unsigned int se_zbias_factor; /* 0x1dac */
- unsigned int se_zbias_constant;
-} drm_radeon_context2_regs_t;
-
-/* Setup registers for each texture unit
- */
-typedef struct {
- unsigned int pp_txfilter;
- unsigned int pp_txformat;
- unsigned int pp_txoffset;
- unsigned int pp_txcblend;
- unsigned int pp_txablend;
- unsigned int pp_tfactor;
- unsigned int pp_border_color;
-} drm_radeon_texture_regs_t;
-
-typedef struct {
- unsigned int start;
- unsigned int finish;
- unsigned int prim:8;
- unsigned int stateidx:8;
- unsigned int numverts:16; /* overloaded as offset/64 for elt prims */
- unsigned int vc_format; /* vertex format */
-} drm_radeon_prim_t;
-
-typedef struct {
- drm_radeon_context_regs_t context;
- drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS];
- drm_radeon_context2_regs_t context2;
- unsigned int dirty;
-} drm_radeon_state_t;
-
-typedef struct {
- /* The channel for communication of state information to the
- * kernel on firing a vertex buffer with either of the
- * obsoleted vertex/index ioctls.
- */
- drm_radeon_context_regs_t context_state;
- drm_radeon_texture_regs_t tex_state[RADEON_MAX_TEXTURE_UNITS];
- unsigned int dirty;
- unsigned int vertsize;
- unsigned int vc_format;
-
- /* The current cliprects, or a subset thereof.
- */
- struct drm_clip_rect boxes[RADEON_NR_SAREA_CLIPRECTS];
- unsigned int nbox;
-
- /* Counters for client-side throttling of rendering clients.
- */
- unsigned int last_frame;
- unsigned int last_dispatch;
- unsigned int last_clear;
-
- struct drm_tex_region tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS +
- 1];
- unsigned int tex_age[RADEON_NR_TEX_HEAPS];
- int ctx_owner;
- int pfState; /* number of 3d windows (0,1,2ormore) */
- int pfCurrentPage; /* which buffer is being displayed? */
- int crtc2_base; /* CRTC2 frame offset */
- int tiling_enabled; /* set by drm, read by 2d + 3d clients */
-} drm_radeon_sarea_t;
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the Xserver file (xf86drmRadeon.h)
- *
- * KW: actually it's illegal to change any of this (backwards compatibility).
- */
-
-/* Radeon specific ioctls
- * The device specific ioctl range is 0x40 to 0x79.
- */
-#define DRM_RADEON_CP_INIT 0x00
-#define DRM_RADEON_CP_START 0x01
-#define DRM_RADEON_CP_STOP 0x02
-#define DRM_RADEON_CP_RESET 0x03
-#define DRM_RADEON_CP_IDLE 0x04
-#define DRM_RADEON_RESET 0x05
-#define DRM_RADEON_FULLSCREEN 0x06
-#define DRM_RADEON_SWAP 0x07
-#define DRM_RADEON_CLEAR 0x08
-#define DRM_RADEON_VERTEX 0x09
-#define DRM_RADEON_INDICES 0x0A
-#define DRM_RADEON_NOT_USED
-#define DRM_RADEON_STIPPLE 0x0C
-#define DRM_RADEON_INDIRECT 0x0D
-#define DRM_RADEON_TEXTURE 0x0E
-#define DRM_RADEON_VERTEX2 0x0F
-#define DRM_RADEON_CMDBUF 0x10
-#define DRM_RADEON_GETPARAM 0x11
-#define DRM_RADEON_FLIP 0x12
-#define DRM_RADEON_ALLOC 0x13
-#define DRM_RADEON_FREE 0x14
-#define DRM_RADEON_INIT_HEAP 0x15
-#define DRM_RADEON_IRQ_EMIT 0x16
-#define DRM_RADEON_IRQ_WAIT 0x17
-#define DRM_RADEON_CP_RESUME 0x18
-#define DRM_RADEON_SETPARAM 0x19
-#define DRM_RADEON_SURF_ALLOC 0x1a
-#define DRM_RADEON_SURF_FREE 0x1b
-/* KMS ioctl */
-#define DRM_RADEON_GEM_INFO 0x1c
-#define DRM_RADEON_GEM_CREATE 0x1d
-#define DRM_RADEON_GEM_MMAP 0x1e
-#define DRM_RADEON_GEM_PREAD 0x21
-#define DRM_RADEON_GEM_PWRITE 0x22
-#define DRM_RADEON_GEM_SET_DOMAIN 0x23
-#define DRM_RADEON_GEM_WAIT_IDLE 0x24
-#define DRM_RADEON_CS 0x26
-#define DRM_RADEON_INFO 0x27
-#define DRM_RADEON_GEM_SET_TILING 0x28
-#define DRM_RADEON_GEM_GET_TILING 0x29
-#define DRM_RADEON_GEM_BUSY 0x2a
-
-#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
-#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
-#define DRM_IOCTL_RADEON_CP_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_STOP, drm_radeon_cp_stop_t)
-#define DRM_IOCTL_RADEON_CP_RESET DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESET)
-#define DRM_IOCTL_RADEON_CP_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_IDLE)
-#define DRM_IOCTL_RADEON_RESET DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_RESET)
-#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FULLSCREEN, drm_radeon_fullscreen_t)
-#define DRM_IOCTL_RADEON_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_SWAP)
-#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CLEAR, drm_radeon_clear_t)
-#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX, drm_radeon_vertex_t)
-#define DRM_IOCTL_RADEON_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INDICES, drm_radeon_indices_t)
-#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_STIPPLE, drm_radeon_stipple_t)
-#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INDIRECT, drm_radeon_indirect_t)
-#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_TEXTURE, drm_radeon_texture_t)
-#define DRM_IOCTL_RADEON_VERTEX2 DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX2, drm_radeon_vertex2_t)
-#define DRM_IOCTL_RADEON_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CMDBUF, drm_radeon_cmd_buffer_t)
-#define DRM_IOCTL_RADEON_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GETPARAM, drm_radeon_getparam_t)
-#define DRM_IOCTL_RADEON_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_FLIP)
-#define DRM_IOCTL_RADEON_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_ALLOC, drm_radeon_mem_alloc_t)
-#define DRM_IOCTL_RADEON_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FREE, drm_radeon_mem_free_t)
-#define DRM_IOCTL_RADEON_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INIT_HEAP, drm_radeon_mem_init_heap_t)
-#define DRM_IOCTL_RADEON_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_IRQ_EMIT, drm_radeon_irq_emit_t)
-#define DRM_IOCTL_RADEON_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_IRQ_WAIT, drm_radeon_irq_wait_t)
-#define DRM_IOCTL_RADEON_CP_RESUME DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME)
-#define DRM_IOCTL_RADEON_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SETPARAM, drm_radeon_setparam_t)
-#define DRM_IOCTL_RADEON_SURF_ALLOC DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_ALLOC, drm_radeon_surface_alloc_t)
-#define DRM_IOCTL_RADEON_SURF_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_FREE, drm_radeon_surface_free_t)
-/* KMS */
-#define DRM_IOCTL_RADEON_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_INFO, struct drm_radeon_gem_info)
-#define DRM_IOCTL_RADEON_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_CREATE, struct drm_radeon_gem_create)
-#define DRM_IOCTL_RADEON_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_MMAP, struct drm_radeon_gem_mmap)
-#define DRM_IOCTL_RADEON_GEM_PREAD DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PREAD, struct drm_radeon_gem_pread)
-#define DRM_IOCTL_RADEON_GEM_PWRITE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PWRITE, struct drm_radeon_gem_pwrite)
-#define DRM_IOCTL_RADEON_GEM_SET_DOMAIN DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_DOMAIN, struct drm_radeon_gem_set_domain)
-#define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle)
-#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs)
-#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info)
-#define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)
-#define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)
-#define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy)
-
-typedef struct drm_radeon_init {
- enum {
- RADEON_INIT_CP = 0x01,
- RADEON_CLEANUP_CP = 0x02,
- RADEON_INIT_R200_CP = 0x03,
- RADEON_INIT_R300_CP = 0x04,
- RADEON_INIT_R600_CP = 0x05
- } func;
- unsigned long sarea_priv_offset;
- int is_pci; /* for overriding only */
- int cp_mode;
- int gart_size;
- int ring_size;
- int usec_timeout;
-
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
-
- unsigned long fb_offset DEPRECATED; /* deprecated, driver asks hardware */
- unsigned long mmio_offset DEPRECATED; /* deprecated, driver asks hardware */
- unsigned long ring_offset;
- unsigned long ring_rptr_offset;
- unsigned long buffers_offset;
- unsigned long gart_textures_offset;
-} drm_radeon_init_t;
-
-typedef struct drm_radeon_cp_stop {
- int flush;
- int idle;
-} drm_radeon_cp_stop_t;
-
-typedef struct drm_radeon_fullscreen {
- enum {
- RADEON_INIT_FULLSCREEN = 0x01,
- RADEON_CLEANUP_FULLSCREEN = 0x02
- } func;
-} drm_radeon_fullscreen_t;
-
-#define CLEAR_X1 0
-#define CLEAR_Y1 1
-#define CLEAR_X2 2
-#define CLEAR_Y2 3
-#define CLEAR_DEPTH 4
-
-typedef union drm_radeon_clear_rect {
- float f[5];
- unsigned int ui[5];
-} drm_radeon_clear_rect_t;
-
-typedef struct drm_radeon_clear {
- unsigned int flags;
- unsigned int clear_color;
- unsigned int clear_depth;
- unsigned int color_mask;
- unsigned int depth_mask; /* misnamed field: should be stencil */
- drm_radeon_clear_rect_t __user *depth_boxes;
-} drm_radeon_clear_t;
-
-typedef struct drm_radeon_vertex {
- int prim;
- int idx; /* Index of vertex buffer */
- int count; /* Number of vertices in buffer */
- int discard; /* Client finished with buffer? */
-} drm_radeon_vertex_t;
-
-typedef struct drm_radeon_indices {
- int prim;
- int idx;
- int start;
- int end;
- int discard; /* Client finished with buffer? */
-} drm_radeon_indices_t;
-
-/* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices
- * - allows multiple primitives and state changes in a single ioctl
- * - supports driver change to emit native primitives
- */
-typedef struct drm_radeon_vertex2 {
- int idx; /* Index of vertex buffer */
- int discard; /* Client finished with buffer? */
- int nr_states;
- drm_radeon_state_t __user *state;
- int nr_prims;
- drm_radeon_prim_t __user *prim;
-} drm_radeon_vertex2_t;
-
-/* v1.3 - obsoletes drm_radeon_vertex2
- * - allows arbitarily large cliprect list
- * - allows updating of tcl packet, vector and scalar state
- * - allows memory-efficient description of state updates
- * - allows state to be emitted without a primitive
- * (for clears, ctx switches)
- * - allows more than one dma buffer to be referenced per ioctl
- * - supports tcl driver
- * - may be extended in future versions with new cmd types, packets
- */
-typedef struct drm_radeon_cmd_buffer {
- int bufsz;
- char __user *buf;
- int nbox;
- struct drm_clip_rect __user *boxes;
-} drm_radeon_cmd_buffer_t;
-
-typedef struct drm_radeon_tex_image {
- unsigned int x, y; /* Blit coordinates */
- unsigned int width, height;
- const void __user *data;
-} drm_radeon_tex_image_t;
-
-typedef struct drm_radeon_texture {
- unsigned int offset;
- int pitch;
- int format;
- int width; /* Texture image coordinates */
- int height;
- drm_radeon_tex_image_t __user *image;
-} drm_radeon_texture_t;
-
-typedef struct drm_radeon_stipple {
- unsigned int __user *mask;
-} drm_radeon_stipple_t;
-
-typedef struct drm_radeon_indirect {
- int idx;
- int start;
- int end;
- int discard;
-} drm_radeon_indirect_t;
-
-/* enum for card type parameters */
-#define RADEON_CARD_PCI 0
-#define RADEON_CARD_AGP 1
-#define RADEON_CARD_PCIE 2
-
-/* 1.3: An ioctl to get parameters that aren't available to the 3d
- * client any other way.
- */
-#define RADEON_PARAM_GART_BUFFER_OFFSET 1 /* card offset of 1st GART buffer */
-#define RADEON_PARAM_LAST_FRAME 2
-#define RADEON_PARAM_LAST_DISPATCH 3
-#define RADEON_PARAM_LAST_CLEAR 4
-/* Added with DRM version 1.6. */
-#define RADEON_PARAM_IRQ_NR 5
-#define RADEON_PARAM_GART_BASE 6 /* card offset of GART base */
-/* Added with DRM version 1.8. */
-#define RADEON_PARAM_REGISTER_HANDLE 7 /* for drmMap() */
-#define RADEON_PARAM_STATUS_HANDLE 8
-#define RADEON_PARAM_SAREA_HANDLE 9
-#define RADEON_PARAM_GART_TEX_HANDLE 10
-#define RADEON_PARAM_SCRATCH_OFFSET 11
-#define RADEON_PARAM_CARD_TYPE 12
-#define RADEON_PARAM_VBLANK_CRTC 13 /* VBLANK CRTC */
-#define RADEON_PARAM_FB_LOCATION 14 /* FB location */
-#define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */
-#define RADEON_PARAM_DEVICE_ID 16
-#define RADEON_PARAM_NUM_Z_PIPES 17 /* num Z pipes */
-
-typedef struct drm_radeon_getparam {
- int param;
- void __user *value;
-} drm_radeon_getparam_t;
-
-/* 1.6: Set up a memory manager for regions of shared memory:
- */
-#define RADEON_MEM_REGION_GART 1
-#define RADEON_MEM_REGION_FB 2
-
-typedef struct drm_radeon_mem_alloc {
- int region;
- int alignment;
- int size;
- int __user *region_offset; /* offset from start of fb or GART */
-} drm_radeon_mem_alloc_t;
-
-typedef struct drm_radeon_mem_free {
- int region;
- int region_offset;
-} drm_radeon_mem_free_t;
-
-typedef struct drm_radeon_mem_init_heap {
- int region;
- int size;
- int start;
-} drm_radeon_mem_init_heap_t;
-
-/* 1.6: Userspace can request & wait on irq's:
- */
-typedef struct drm_radeon_irq_emit {
- int __user *irq_seq;
-} drm_radeon_irq_emit_t;
-
-typedef struct drm_radeon_irq_wait {
- int irq_seq;
-} drm_radeon_irq_wait_t;
-
-/* 1.10: Clients tell the DRM where they think the framebuffer is located in
- * the card's address space, via a new generic ioctl to set parameters
- */
-
-typedef struct drm_radeon_setparam {
- unsigned int param;
- int64_t value;
-} drm_radeon_setparam_t;
-
-#define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */
-#define RADEON_SETPARAM_SWITCH_TILING 2 /* enable/disable color tiling */
-#define RADEON_SETPARAM_PCIGART_LOCATION 3 /* PCI Gart Location */
-#define RADEON_SETPARAM_NEW_MEMMAP 4 /* Use new memory map */
-#define RADEON_SETPARAM_PCIGART_TABLE_SIZE 5 /* PCI GART Table Size */
-#define RADEON_SETPARAM_VBLANK_CRTC 6 /* VBLANK CRTC */
-/* 1.14: Clients can allocate/free a surface
- */
-typedef struct drm_radeon_surface_alloc {
- unsigned int address;
- unsigned int size;
- unsigned int flags;
-} drm_radeon_surface_alloc_t;
-
-typedef struct drm_radeon_surface_free {
- unsigned int address;
-} drm_radeon_surface_free_t;
-
-#define DRM_RADEON_VBLANK_CRTC1 1
-#define DRM_RADEON_VBLANK_CRTC2 2
-
-/*
- * Kernel modesetting world below.
- */
-#define RADEON_GEM_DOMAIN_CPU 0x1
-#define RADEON_GEM_DOMAIN_GTT 0x2
-#define RADEON_GEM_DOMAIN_VRAM 0x4
-
-struct drm_radeon_gem_info {
- uint64_t gart_size;
- uint64_t vram_size;
- uint64_t vram_visible;
-};
-
-#define RADEON_GEM_NO_BACKING_STORE 1
-
-struct drm_radeon_gem_create {
- uint64_t size;
- uint64_t alignment;
- uint32_t handle;
- uint32_t initial_domain;
- uint32_t flags;
-};
-
-#define RADEON_TILING_MACRO 0x1
-#define RADEON_TILING_MICRO 0x2
-#define RADEON_TILING_SWAP_16BIT 0x4
-#define RADEON_TILING_SWAP_32BIT 0x8
-#define RADEON_TILING_SURFACE 0x10 /* this object requires a surface
- * when mapped - i.e. front buffer */
-
-struct drm_radeon_gem_set_tiling {
- uint32_t handle;
- uint32_t tiling_flags;
- uint32_t pitch;
-};
-
-struct drm_radeon_gem_get_tiling {
- uint32_t handle;
- uint32_t tiling_flags;
- uint32_t pitch;
-};
-
-struct drm_radeon_gem_mmap {
- uint32_t handle;
- uint32_t pad;
- uint64_t offset;
- uint64_t size;
- uint64_t addr_ptr;
-};
-
-struct drm_radeon_gem_set_domain {
- uint32_t handle;
- uint32_t read_domains;
- uint32_t write_domain;
-};
-
-struct drm_radeon_gem_wait_idle {
- uint32_t handle;
- uint32_t pad;
-};
-
-struct drm_radeon_gem_busy {
- uint32_t handle;
- uint32_t domain;
-};
-
-struct drm_radeon_gem_pread {
- /** Handle for the object being read. */
- uint32_t handle;
- uint32_t pad;
- /** Offset into the object to read from */
- uint64_t offset;
- /** Length of data to read */
- uint64_t size;
- /** Pointer to write the data into. */
- /* void *, but pointers are not 32/64 compatible */
- uint64_t data_ptr;
-};
-
-struct drm_radeon_gem_pwrite {
- /** Handle for the object being written to. */
- uint32_t handle;
- uint32_t pad;
- /** Offset into the object to write to */
- uint64_t offset;
- /** Length of data to write */
- uint64_t size;
- /** Pointer to read the data from. */
- /* void *, but pointers are not 32/64 compatible */
- uint64_t data_ptr;
-};
-
-#define RADEON_CHUNK_ID_RELOCS 0x01
-#define RADEON_CHUNK_ID_IB 0x02
-
-struct drm_radeon_cs_chunk {
- uint32_t chunk_id;
- uint32_t length_dw;
- uint64_t chunk_data;
-};
-
-struct drm_radeon_cs_reloc {
- uint32_t handle;
- uint32_t read_domains;
- uint32_t write_domain;
- uint32_t flags;
-};
-
-struct drm_radeon_cs {
- uint32_t num_chunks;
- uint32_t cs_id;
- /* this points to uint64_t * which point to cs chunks */
- uint64_t chunks;
- /* updates to the limits after this CS ioctl */
- uint64_t gart_limit;
- uint64_t vram_limit;
-};
-
-#define RADEON_INFO_DEVICE_ID 0x00
-#define RADEON_INFO_NUM_GB_PIPES 0x01
-#define RADEON_INFO_NUM_Z_PIPES 0x02
-
-struct drm_radeon_info {
- uint32_t request;
- uint32_t pad;
- uint64_t value;
-};
-
-#endif
+++ /dev/null
-/* radeon_drv.h -- Private header for radeon driver -*- linux-c -*-
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __RADEON_DRV_H__
-#define __RADEON_DRV_H__
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "Gareth Hughes, Keith Whitwell, others."
-
-#define DRIVER_NAME "radeon"
-#define DRIVER_DESC "ATI Radeon"
-#define DRIVER_DATE "20080613"
-
-/* Interface history:
- *
- * 1.1 - ??
- * 1.2 - Add vertex2 ioctl (keith)
- * - Add stencil capability to clear ioctl (gareth, keith)
- * - Increase MAX_TEXTURE_LEVELS (brian)
- * 1.3 - Add cmdbuf ioctl (keith)
- * - Add support for new radeon packets (keith)
- * - Add getparam ioctl (keith)
- * - Add flip-buffers ioctl, deprecate fullscreen foo (keith).
- * 1.4 - Add scratch registers to get_param ioctl.
- * 1.5 - Add r200 packets to cmdbuf ioctl
- * - Add r200 function to init ioctl
- * - Add 'scalar2' instruction to cmdbuf
- * 1.6 - Add static GART memory manager
- * Add irq handler (won't be turned on unless X server knows to)
- * Add irq ioctls and irq_active getparam.
- * Add wait command for cmdbuf ioctl
- * Add GART offset query for getparam
- * 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5]
- * and R200_PP_CUBIC_OFFSET_F1_[0..5].
- * Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and
- * R200_EMIT_PP_CUBIC_OFFSETS_[0..5]. (brian)
- * 1.8 - Remove need to call cleanup ioctls on last client exit (keith)
- * Add 'GET' queries for starting additional clients on different VT's.
- * 1.9 - Add DRM_IOCTL_RADEON_CP_RESUME ioctl.
- * Add texture rectangle support for r100.
- * 1.10- Add SETPARAM ioctl; first parameter to set is FB_LOCATION, which
- * clients use to tell the DRM where they think the framebuffer is
- * located in the card's address space
- * 1.11- Add packet R200_EMIT_RB3D_BLENDCOLOR to support GL_EXT_blend_color
- * and GL_EXT_blend_[func|equation]_separate on r200
- * 1.12- Add R300 CP microcode support - this just loads the CP on r300
- * (No 3D support yet - just microcode loading).
- * 1.13- Add packet R200_EMIT_TCL_POINT_SPRITE_CNTL for ARB_point_parameters
- * - Add hyperz support, add hyperz flags to clear ioctl.
- * 1.14- Add support for color tiling
- * - Add R100/R200 surface allocation/free support
- * 1.15- Add support for texture micro tiling
- * - Add support for r100 cube maps
- * 1.16- Add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear
- * texture filtering on r200
- * 1.17- Add initial support for R300 (3D).
- * 1.18- Add support for GL_ATI_fragment_shader, new packets
- * R200_EMIT_PP_AFS_0/1, R200_EMIT_PP_TXCTLALL_0-5 (replaces
- * R200_EMIT_PP_TXFILTER_0-5, 2 more regs) and R200_EMIT_ATF_TFACTOR
- * (replaces R200_EMIT_TFACTOR_0 (8 consts instead of 6)
- * 1.19- Add support for gart table in FB memory and PCIE r300
- * 1.20- Add support for r300 texrect
- * 1.21- Add support for card type getparam
- * 1.22- Add support for texture cache flushes (R300_TX_CNTL)
- * 1.23- Add new radeon memory map work from benh
- * 1.24- Add general-purpose packet for manipulating scratch registers (r300)
- * 1.25- Add support for r200 vertex programs (R200_EMIT_VAP_PVS_CNTL,
- * new packet type)
- * 1.26- Add support for variable size PCI(E) gart aperture
- * 1.27- Add support for IGP GART
- * 1.28- Add support for VBL on CRTC2
- * 1.29- R500 3D cmd buffer support
- */
-
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 29
-#define DRIVER_PATCHLEVEL 0
-
-/*
- * Radeon chip families
- */
-enum radeon_family {
- CHIP_R100,
- CHIP_RV100,
- CHIP_RS100,
- CHIP_RV200,
- CHIP_RS200,
- CHIP_R200,
- CHIP_RV250,
- CHIP_RS300,
- CHIP_RV280,
- CHIP_R300,
- CHIP_R350,
- CHIP_RV350,
- CHIP_RV380,
- CHIP_R420,
- CHIP_R423,
- CHIP_RV410,
- CHIP_RS400,
- CHIP_RS480,
- CHIP_RS690,
- CHIP_RS740,
- CHIP_RV515,
- CHIP_R520,
- CHIP_RV530,
- CHIP_RV560,
- CHIP_RV570,
- CHIP_R580,
- CHIP_LAST,
-};
-
-/*
- * Chip flags
- */
-enum radeon_chip_flags {
- RADEON_FAMILY_MASK = 0x0000ffffUL,
- RADEON_FLAGS_MASK = 0xffff0000UL,
- RADEON_IS_MOBILITY = 0x00010000UL,
- RADEON_IS_IGP = 0x00020000UL,
- RADEON_SINGLE_CRTC = 0x00040000UL,
- RADEON_IS_AGP = 0x00080000UL,
- RADEON_HAS_HIERZ = 0x00100000UL,
- RADEON_IS_PCIE = 0x00200000UL,
- RADEON_NEW_MEMMAP = 0x00400000UL,
- RADEON_IS_PCI = 0x00800000UL,
- RADEON_IS_IGPGART = 0x01000000UL,
-};
-
-#define GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \
- DRM_READ32( (dev_priv)->ring_rptr, 0 ) : RADEON_READ(RADEON_CP_RB_RPTR))
-#define SET_RING_HEAD(dev_priv,val) DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) )
-
-typedef struct drm_radeon_freelist {
- unsigned int age;
- struct drm_buf *buf;
- struct drm_radeon_freelist *next;
- struct drm_radeon_freelist *prev;
-} drm_radeon_freelist_t;
-
-typedef struct drm_radeon_ring_buffer {
- u32 *start;
- u32 *end;
- int size; /* Double Words */
- int size_l2qw; /* log2 Quad Words */
-
- int rptr_update; /* Double Words */
- int rptr_update_l2qw; /* log2 Quad Words */
-
- int fetch_size; /* Double Words */
- int fetch_size_l2ow; /* log2 Oct Words */
-
- u32 tail;
- u32 tail_mask;
- int space;
-
- int high_mark;
-} drm_radeon_ring_buffer_t;
-
-typedef struct drm_radeon_depth_clear_t {
- u32 rb3d_cntl;
- u32 rb3d_zstencilcntl;
- u32 se_cntl;
-} drm_radeon_depth_clear_t;
-
-struct drm_radeon_driver_file_fields {
- int64_t radeon_fb_delta;
-};
-
-struct mem_block {
- struct mem_block *next;
- struct mem_block *prev;
- int start;
- int size;
- struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
-};
-
-struct radeon_surface {
- int refcount;
- u32 lower;
- u32 upper;
- u32 flags;
-};
-
-struct radeon_virt_surface {
- int surface_index;
- u32 lower;
- u32 upper;
- u32 flags;
- struct drm_file *file_priv;
-};
-
-#define RADEON_FLUSH_EMITED (1 < 0)
-#define RADEON_PURGE_EMITED (1 < 1)
-
-typedef struct drm_radeon_private {
-
- drm_radeon_ring_buffer_t ring;
- drm_radeon_sarea_t *sarea_priv;
-
- u32 fb_location;
- u32 fb_size;
- int new_memmap;
-
- int gart_size;
- u32 gart_vm_start;
- unsigned long gart_buffers_offset;
-
- int cp_mode;
- int cp_running;
-
- drm_radeon_freelist_t *head;
- drm_radeon_freelist_t *tail;
- int last_buf;
- volatile u32 *scratch;
- int writeback_works;
-
- int usec_timeout;
-
- struct {
- u32 boxes;
- int freelist_timeouts;
- int freelist_loops;
- int requested_bufs;
- int last_frame_reads;
- int last_clear_reads;
- int clears;
- int texture_uploads;
- } stats;
-
- int do_boxes;
- int page_flipping;
-
- u32 color_fmt;
- unsigned int front_offset;
- unsigned int front_pitch;
- unsigned int back_offset;
- unsigned int back_pitch;
-
- u32 depth_fmt;
- unsigned int depth_offset;
- unsigned int depth_pitch;
-
- u32 front_pitch_offset;
- u32 back_pitch_offset;
- u32 depth_pitch_offset;
-
- drm_radeon_depth_clear_t depth_clear;
-
- unsigned long ring_offset;
- unsigned long ring_rptr_offset;
- unsigned long buffers_offset;
- unsigned long gart_textures_offset;
-
- drm_local_map_t *sarea;
- drm_local_map_t *mmio;
- drm_local_map_t *cp_ring;
- drm_local_map_t *ring_rptr;
- drm_local_map_t *gart_textures;
-
- struct mem_block *gart_heap;
- struct mem_block *fb_heap;
-
- /* SW interrupt */
- wait_queue_head_t swi_queue;
- atomic_t swi_emitted;
- int vblank_crtc;
- uint32_t irq_enable_reg;
- int irq_enabled;
- uint32_t r500_disp_irq_reg;
-
- struct radeon_surface surfaces[RADEON_MAX_SURFACES];
- struct radeon_virt_surface virt_surfaces[2 * RADEON_MAX_SURFACES];
-
- unsigned long pcigart_offset;
- unsigned int pcigart_offset_set;
- struct drm_ati_pcigart_info gart_info;
-
- u32 scratch_ages[5];
-
- unsigned int crtc_last_cnt;
- unsigned int crtc2_last_cnt;
-
- /* starting from here on, data is preserved accross an open */
- uint32_t flags; /* see radeon_chip_flags */
- unsigned long fb_aper_offset;
-
- int num_gb_pipes;
- int track_flush;
- uint32_t chip_family; /* extract from flags */
-} drm_radeon_private_t;
-
-typedef struct drm_radeon_buf_priv {
- u32 age;
-} drm_radeon_buf_priv_t;
-
-typedef struct drm_radeon_kcmd_buffer {
- int bufsz;
- char *buf;
- int nbox;
- struct drm_clip_rect __user *boxes;
-} drm_radeon_kcmd_buffer_t;
-
-extern int radeon_no_wb;
-extern struct drm_ioctl_desc radeon_ioctls[];
-extern int radeon_max_ioctl;
-
-/* Check whether the given hardware address is inside the framebuffer or the
- * GART area.
- */
-static __inline__ int radeon_check_offset(drm_radeon_private_t *dev_priv,
- u64 off)
-{
- u32 fb_start = dev_priv->fb_location;
- u32 fb_end = fb_start + dev_priv->fb_size - 1;
- u32 gart_start = dev_priv->gart_vm_start;
- u32 gart_end = gart_start + dev_priv->gart_size - 1;
-
- return ((off >= fb_start && off <= fb_end) ||
- (off >= gart_start && off <= gart_end));
-}
-
- /* radeon_cp.c */
-extern int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_cp_start(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_cp_reset(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_cp_idle(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_cp_resume(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv);
-
-extern void radeon_freelist_reset(struct drm_device * dev);
-extern struct drm_buf *radeon_freelist_get(struct drm_device * dev);
-
-extern int radeon_wait_ring(drm_radeon_private_t * dev_priv, int n);
-
-extern int radeon_do_cp_idle(drm_radeon_private_t * dev_priv);
-
-extern int radeon_mem_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_mem_init_heap(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern void radeon_mem_takedown(struct mem_block **heap);
-extern void radeon_mem_release(struct drm_file *file_priv,
- struct mem_block *heap);
-
- /* radeon_irq.c */
-extern void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state);
-extern int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_irq_wait(struct drm_device *dev, void *data, struct drm_file *file_priv);
-
-extern void radeon_do_release(struct drm_device * dev);
-extern u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc);
-extern int radeon_enable_vblank(struct drm_device *dev, int crtc);
-extern void radeon_disable_vblank(struct drm_device *dev, int crtc);
-extern irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS);
-extern void radeon_driver_irq_preinstall(struct drm_device * dev);
-extern int radeon_driver_irq_postinstall(struct drm_device * dev);
-extern void radeon_driver_irq_uninstall(struct drm_device * dev);
-extern int radeon_vblank_crtc_get(struct drm_device *dev);
-extern int radeon_vblank_crtc_set(struct drm_device *dev, int64_t value);
-
-extern int radeon_driver_load(struct drm_device *dev, unsigned long flags);
-extern int radeon_driver_unload(struct drm_device *dev);
-extern int radeon_driver_firstopen(struct drm_device *dev);
-extern void radeon_driver_preclose(struct drm_device * dev,
- struct drm_file *file_priv);
-extern void radeon_driver_postclose(struct drm_device * dev,
- struct drm_file *file_priv);
-extern void radeon_driver_lastclose(struct drm_device * dev);
-extern int radeon_driver_open(struct drm_device * dev,
- struct drm_file * file_priv);
-extern long radeon_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg);
-
-/* r300_cmdbuf.c */
-extern void r300_init_reg_flags(struct drm_device *dev);
-
-extern int r300_do_cp_cmdbuf(struct drm_device *dev,
- struct drm_file *file_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf);
-
-/* Flags for stats.boxes
- */
-#define RADEON_BOX_DMA_IDLE 0x1
-#define RADEON_BOX_RING_FULL 0x2
-#define RADEON_BOX_FLIP 0x4
-#define RADEON_BOX_WAIT_IDLE 0x8
-#define RADEON_BOX_TEXTURE_LOAD 0x10
-
-/* Register definitions, register access macros and drmAddMap constants
- * for Radeon kernel driver.
- */
-#define RADEON_AGP_COMMAND 0x0f60
-#define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config */
-# define RADEON_AGP_ENABLE (1<<8)
-#define RADEON_AUX_SCISSOR_CNTL 0x26f0
-# define RADEON_EXCLUSIVE_SCISSOR_0 (1 << 24)
-# define RADEON_EXCLUSIVE_SCISSOR_1 (1 << 25)
-# define RADEON_EXCLUSIVE_SCISSOR_2 (1 << 26)
-# define RADEON_SCISSOR_0_ENABLE (1 << 28)
-# define RADEON_SCISSOR_1_ENABLE (1 << 29)
-# define RADEON_SCISSOR_2_ENABLE (1 << 30)
-
-/*
- * PCIE radeons (rv370/rv380, rv410, r423/r430/r480, r5xx)
- * don't have an explicit bus mastering disable bit. It's handled
- * by the PCI D-states. PMI_BM_DIS disables D-state bus master
- * handling, not bus mastering itself.
- */
-#define RADEON_BUS_CNTL 0x0030
-/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
-# define RADEON_BUS_MASTER_DIS (1 << 6)
-/* rs600/rs690/rs740 */
-# define RS600_BUS_MASTER_DIS (1 << 14)
-# define RS600_MSI_REARM (1 << 20)
-/* see RS480_MSI_REARM in AIC_CNTL for rs480 */
-
-#define RADEON_BUS_CNTL1 0x0034
-# define RADEON_PMI_BM_DIS (1 << 2)
-# define RADEON_PMI_INT_DIS (1 << 3)
-
-#define RV370_BUS_CNTL 0x004c
-# define RV370_PMI_BM_DIS (1 << 5)
-# define RV370_PMI_INT_DIS (1 << 6)
-
-#define RADEON_MSI_REARM_EN 0x0160
-/* rv370/rv380, rv410, r423/r430/r480, r5xx */
-# define RV370_MSI_REARM_EN (1 << 0)
-
-#define RADEON_CLOCK_CNTL_DATA 0x000c
-# define RADEON_PLL_WR_EN (1 << 7)
-#define RADEON_CLOCK_CNTL_INDEX 0x0008
-#define RADEON_CONFIG_APER_SIZE 0x0108
-#define RADEON_CONFIG_MEMSIZE 0x00f8
-#define RADEON_CRTC_OFFSET 0x0224
-#define RADEON_CRTC_OFFSET_CNTL 0x0228
-# define RADEON_CRTC_TILE_EN (1 << 15)
-# define RADEON_CRTC_OFFSET_FLIP_CNTL (1 << 16)
-#define RADEON_CRTC2_OFFSET 0x0324
-#define RADEON_CRTC2_OFFSET_CNTL 0x0328
-
-#define RADEON_PCIE_INDEX 0x0030
-#define RADEON_PCIE_DATA 0x0034
-#define RADEON_PCIE_TX_GART_CNTL 0x10
-# define RADEON_PCIE_TX_GART_EN (1 << 0)
-# define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_PASS_THRU (0 << 1)
-# define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_CLAMP_LO (1 << 1)
-# define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD (3 << 1)
-# define RADEON_PCIE_TX_GART_MODE_32_128_CACHE (0 << 3)
-# define RADEON_PCIE_TX_GART_MODE_8_4_128_CACHE (1 << 3)
-# define RADEON_PCIE_TX_GART_CHK_RW_VALID_EN (1 << 5)
-# define RADEON_PCIE_TX_GART_INVALIDATE_TLB (1 << 8)
-#define RADEON_PCIE_TX_DISCARD_RD_ADDR_LO 0x11
-#define RADEON_PCIE_TX_DISCARD_RD_ADDR_HI 0x12
-#define RADEON_PCIE_TX_GART_BASE 0x13
-#define RADEON_PCIE_TX_GART_START_LO 0x14
-#define RADEON_PCIE_TX_GART_START_HI 0x15
-#define RADEON_PCIE_TX_GART_END_LO 0x16
-#define RADEON_PCIE_TX_GART_END_HI 0x17
-
-#define RS480_NB_MC_INDEX 0x168
-# define RS480_NB_MC_IND_WR_EN (1 << 8)
-#define RS480_NB_MC_DATA 0x16c
-
-#define RS690_MC_INDEX 0x78
-# define RS690_MC_INDEX_MASK 0x1ff
-# define RS690_MC_INDEX_WR_EN (1 << 9)
-# define RS690_MC_INDEX_WR_ACK 0x7f
-#define RS690_MC_DATA 0x7c
-
-/* MC indirect registers */
-#define RS480_MC_MISC_CNTL 0x18
-# define RS480_DISABLE_GTW (1 << 1)
-/* switch between MCIND GART and MM GART registers. 0 = mmgart, 1 = mcind gart */
-# define RS480_GART_INDEX_REG_EN (1 << 12)
-# define RS690_BLOCK_GFX_D3_EN (1 << 14)
-#define RS480_K8_FB_LOCATION 0x1e
-#define RS480_GART_FEATURE_ID 0x2b
-# define RS480_HANG_EN (1 << 11)
-# define RS480_TLB_ENABLE (1 << 18)
-# define RS480_P2P_ENABLE (1 << 19)
-# define RS480_GTW_LAC_EN (1 << 25)
-# define RS480_2LEVEL_GART (0 << 30)
-# define RS480_1LEVEL_GART (1 << 30)
-# define RS480_PDC_EN (1 << 31)
-#define RS480_GART_BASE 0x2c
-#define RS480_GART_CACHE_CNTRL 0x2e
-# define RS480_GART_CACHE_INVALIDATE (1 << 0) /* wait for it to clear */
-#define RS480_AGP_ADDRESS_SPACE_SIZE 0x38
-# define RS480_GART_EN (1 << 0)
-# define RS480_VA_SIZE_32MB (0 << 1)
-# define RS480_VA_SIZE_64MB (1 << 1)
-# define RS480_VA_SIZE_128MB (2 << 1)
-# define RS480_VA_SIZE_256MB (3 << 1)
-# define RS480_VA_SIZE_512MB (4 << 1)
-# define RS480_VA_SIZE_1GB (5 << 1)
-# define RS480_VA_SIZE_2GB (6 << 1)
-#define RS480_AGP_MODE_CNTL 0x39
-# define RS480_POST_GART_Q_SIZE (1 << 18)
-# define RS480_NONGART_SNOOP (1 << 19)
-# define RS480_AGP_RD_BUF_SIZE (1 << 20)
-# define RS480_REQ_TYPE_SNOOP_SHIFT 22
-# define RS480_REQ_TYPE_SNOOP_MASK 0x3
-# define RS480_REQ_TYPE_SNOOP_DIS (1 << 24)
-#define RS480_MC_MISC_UMA_CNTL 0x5f
-#define RS480_MC_MCLK_CNTL 0x7a
-#define RS480_MC_UMA_DUALCH_CNTL 0x86
-
-#define RS690_MC_FB_LOCATION 0x100
-#define RS690_MC_AGP_LOCATION 0x101
-#define RS690_MC_AGP_BASE 0x102
-#define RS690_MC_AGP_BASE_2 0x103
-
-#define R520_MC_IND_INDEX 0x70
-#define R520_MC_IND_WR_EN (1 << 24)
-#define R520_MC_IND_DATA 0x74
-
-#define RV515_MC_FB_LOCATION 0x01
-#define RV515_MC_AGP_LOCATION 0x02
-#define RV515_MC_AGP_BASE 0x03
-#define RV515_MC_AGP_BASE_2 0x04
-
-#define R520_MC_FB_LOCATION 0x04
-#define R520_MC_AGP_LOCATION 0x05
-#define R520_MC_AGP_BASE 0x06
-#define R520_MC_AGP_BASE_2 0x07
-
-#define RADEON_MPP_TB_CONFIG 0x01c0
-#define RADEON_MEM_CNTL 0x0140
-#define RADEON_MEM_SDRAM_MODE_REG 0x0158
-#define RADEON_AGP_BASE_2 0x015c /* r200+ only */
-#define RS480_AGP_BASE_2 0x0164
-#define RADEON_AGP_BASE 0x0170
-
-/* pipe config regs */
-#define R400_GB_PIPE_SELECT 0x402c
-#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */
-#define R500_SU_REG_DEST 0x42c8
-#define R300_GB_TILE_CONFIG 0x4018
-# define R300_ENABLE_TILING (1 << 0)
-# define R300_PIPE_COUNT_RV350 (0 << 1)
-# define R300_PIPE_COUNT_R300 (3 << 1)
-# define R300_PIPE_COUNT_R420_3P (6 << 1)
-# define R300_PIPE_COUNT_R420 (7 << 1)
-# define R300_TILE_SIZE_8 (0 << 4)
-# define R300_TILE_SIZE_16 (1 << 4)
-# define R300_TILE_SIZE_32 (2 << 4)
-# define R300_SUBPIXEL_1_12 (0 << 16)
-# define R300_SUBPIXEL_1_16 (1 << 16)
-#define R300_DST_PIPE_CONFIG 0x170c
-# define R300_PIPE_AUTO_CONFIG (1 << 31)
-#define R300_RB2D_DSTCACHE_MODE 0x3428
-# define R300_DC_AUTOFLUSH_ENABLE (1 << 8)
-# define R300_DC_DC_DISABLE_IGNORE_PE (1 << 17)
-
-#define RADEON_RB3D_COLOROFFSET 0x1c40
-#define RADEON_RB3D_COLORPITCH 0x1c48
-
-#define RADEON_SRC_X_Y 0x1590
-
-#define RADEON_DP_GUI_MASTER_CNTL 0x146c
-# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
-# define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1)
-# define RADEON_GMC_BRUSH_SOLID_COLOR (13 << 4)
-# define RADEON_GMC_BRUSH_NONE (15 << 4)
-# define RADEON_GMC_DST_16BPP (4 << 8)
-# define RADEON_GMC_DST_24BPP (5 << 8)
-# define RADEON_GMC_DST_32BPP (6 << 8)
-# define RADEON_GMC_DST_DATATYPE_SHIFT 8
-# define RADEON_GMC_SRC_DATATYPE_COLOR (3 << 12)
-# define RADEON_DP_SRC_SOURCE_MEMORY (2 << 24)
-# define RADEON_DP_SRC_SOURCE_HOST_DATA (3 << 24)
-# define RADEON_GMC_CLR_CMP_CNTL_DIS (1 << 28)
-# define RADEON_GMC_WR_MSK_DIS (1 << 30)
-# define RADEON_ROP3_S 0x00cc0000
-# define RADEON_ROP3_P 0x00f00000
-#define RADEON_DP_WRITE_MASK 0x16cc
-#define RADEON_SRC_PITCH_OFFSET 0x1428
-#define RADEON_DST_PITCH_OFFSET 0x142c
-#define RADEON_DST_PITCH_OFFSET_C 0x1c80
-# define RADEON_DST_TILE_LINEAR (0 << 30)
-# define RADEON_DST_TILE_MACRO (1 << 30)
-# define RADEON_DST_TILE_MICRO (2 << 30)
-# define RADEON_DST_TILE_BOTH (3 << 30)
-
-#define RADEON_SCRATCH_REG0 0x15e0
-#define RADEON_SCRATCH_REG1 0x15e4
-#define RADEON_SCRATCH_REG2 0x15e8
-#define RADEON_SCRATCH_REG3 0x15ec
-#define RADEON_SCRATCH_REG4 0x15f0
-#define RADEON_SCRATCH_REG5 0x15f4
-#define RADEON_SCRATCH_UMSK 0x0770
-#define RADEON_SCRATCH_ADDR 0x0774
-
-#define RADEON_SCRATCHOFF( x ) (RADEON_SCRATCH_REG_OFFSET + 4*(x))
-
-#define GET_SCRATCH( x ) (dev_priv->writeback_works \
- ? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \
- : RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) )
-
-#define RADEON_CRTC_CRNT_FRAME 0x0214
-#define RADEON_CRTC2_CRNT_FRAME 0x0314
-
-#define RADEON_CRTC_STATUS 0x005c
-#define RADEON_CRTC2_STATUS 0x03fc
-
-#define RADEON_GEN_INT_CNTL 0x0040
-# define RADEON_CRTC_VBLANK_MASK (1 << 0)
-# define RADEON_CRTC2_VBLANK_MASK (1 << 9)
-# define RADEON_GUI_IDLE_INT_ENABLE (1 << 19)
-# define RADEON_SW_INT_ENABLE (1 << 25)
-
-#define RADEON_GEN_INT_STATUS 0x0044
-# define RADEON_CRTC_VBLANK_STAT (1 << 0)
-# define RADEON_CRTC_VBLANK_STAT_ACK (1 << 0)
-# define RADEON_CRTC2_VBLANK_STAT (1 << 9)
-# define RADEON_CRTC2_VBLANK_STAT_ACK (1 << 9)
-# define RADEON_GUI_IDLE_INT_TEST_ACK (1 << 19)
-# define RADEON_SW_INT_TEST (1 << 25)
-# define RADEON_SW_INT_TEST_ACK (1 << 25)
-# define RADEON_SW_INT_FIRE (1 << 26)
-# define R500_DISPLAY_INT_STATUS (1 << 0)
-
-
-#define RADEON_HOST_PATH_CNTL 0x0130
-# define RADEON_HDP_SOFT_RESET (1 << 26)
-# define RADEON_HDP_WC_TIMEOUT_MASK (7 << 28)
-# define RADEON_HDP_WC_TIMEOUT_28BCLK (7 << 28)
-
-#define RADEON_ISYNC_CNTL 0x1724
-# define RADEON_ISYNC_ANY2D_IDLE3D (1 << 0)
-# define RADEON_ISYNC_ANY3D_IDLE2D (1 << 1)
-# define RADEON_ISYNC_TRIG2D_IDLE3D (1 << 2)
-# define RADEON_ISYNC_TRIG3D_IDLE2D (1 << 3)
-# define RADEON_ISYNC_WAIT_IDLEGUI (1 << 4)
-# define RADEON_ISYNC_CPSCRATCH_IDLEGUI (1 << 5)
-
-#define RADEON_RBBM_GUICNTL 0x172c
-# define RADEON_HOST_DATA_SWAP_NONE (0 << 0)
-# define RADEON_HOST_DATA_SWAP_16BIT (1 << 0)
-# define RADEON_HOST_DATA_SWAP_32BIT (2 << 0)
-# define RADEON_HOST_DATA_SWAP_HDW (3 << 0)
-
-#define RADEON_MC_AGP_LOCATION 0x014c
-#define RADEON_MC_FB_LOCATION 0x0148
-#define RADEON_MCLK_CNTL 0x0012
-# define RADEON_FORCEON_MCLKA (1 << 16)
-# define RADEON_FORCEON_MCLKB (1 << 17)
-# define RADEON_FORCEON_YCLKA (1 << 18)
-# define RADEON_FORCEON_YCLKB (1 << 19)
-# define RADEON_FORCEON_MC (1 << 20)
-# define RADEON_FORCEON_AIC (1 << 21)
-
-#define RADEON_PP_BORDER_COLOR_0 0x1d40
-#define RADEON_PP_BORDER_COLOR_1 0x1d44
-#define RADEON_PP_BORDER_COLOR_2 0x1d48
-#define RADEON_PP_CNTL 0x1c38
-# define RADEON_SCISSOR_ENABLE (1 << 1)
-#define RADEON_PP_LUM_MATRIX 0x1d00
-#define RADEON_PP_MISC 0x1c14
-#define RADEON_PP_ROT_MATRIX_0 0x1d58
-#define RADEON_PP_TXFILTER_0 0x1c54
-#define RADEON_PP_TXOFFSET_0 0x1c5c
-#define RADEON_PP_TXFILTER_1 0x1c6c
-#define RADEON_PP_TXFILTER_2 0x1c84
-
-#define R300_RB2D_DSTCACHE_CTLSTAT 0x342c /* use R300_DSTCACHE_CTLSTAT */
-#define R300_DSTCACHE_CTLSTAT 0x1714
-# define R300_RB2D_DC_FLUSH (3 << 0)
-# define R300_RB2D_DC_FREE (3 << 2)
-# define R300_RB2D_DC_FLUSH_ALL 0xf
-# define R300_RB2D_DC_BUSY (1 << 31)
-#define RADEON_RB3D_CNTL 0x1c3c
-# define RADEON_ALPHA_BLEND_ENABLE (1 << 0)
-# define RADEON_PLANE_MASK_ENABLE (1 << 1)
-# define RADEON_DITHER_ENABLE (1 << 2)
-# define RADEON_ROUND_ENABLE (1 << 3)
-# define RADEON_SCALE_DITHER_ENABLE (1 << 4)
-# define RADEON_DITHER_INIT (1 << 5)
-# define RADEON_ROP_ENABLE (1 << 6)
-# define RADEON_STENCIL_ENABLE (1 << 7)
-# define RADEON_Z_ENABLE (1 << 8)
-# define RADEON_ZBLOCK16 (1 << 15)
-#define RADEON_RB3D_DEPTHOFFSET 0x1c24
-#define RADEON_RB3D_DEPTHCLEARVALUE 0x3230
-#define RADEON_RB3D_DEPTHPITCH 0x1c28
-#define RADEON_RB3D_PLANEMASK 0x1d84
-#define RADEON_RB3D_STENCILREFMASK 0x1d7c
-#define RADEON_RB3D_ZCACHE_MODE 0x3250
-#define RADEON_RB3D_ZCACHE_CTLSTAT 0x3254
-# define RADEON_RB3D_ZC_FLUSH (1 << 0)
-# define RADEON_RB3D_ZC_FREE (1 << 2)
-# define RADEON_RB3D_ZC_FLUSH_ALL 0x5
-# define RADEON_RB3D_ZC_BUSY (1 << 31)
-#define R300_ZB_ZCACHE_CTLSTAT 0x4f18
-# define R300_ZC_FLUSH (1 << 0)
-# define R300_ZC_FREE (1 << 1)
-# define R300_ZC_BUSY (1 << 31)
-#define RADEON_RB3D_DSTCACHE_CTLSTAT 0x325c
-# define RADEON_RB3D_DC_FLUSH (3 << 0)
-# define RADEON_RB3D_DC_FREE (3 << 2)
-# define RADEON_RB3D_DC_FLUSH_ALL 0xf
-# define RADEON_RB3D_DC_BUSY (1 << 31)
-#define R300_RB3D_DSTCACHE_CTLSTAT 0x4e4c
-# define R300_RB3D_DC_FLUSH (2 << 0)
-# define R300_RB3D_DC_FREE (2 << 2)
-# define R300_RB3D_DC_FINISH (1 << 4)
-#define RADEON_RB3D_ZSTENCILCNTL 0x1c2c
-# define RADEON_Z_TEST_MASK (7 << 4)
-# define RADEON_Z_TEST_ALWAYS (7 << 4)
-# define RADEON_Z_HIERARCHY_ENABLE (1 << 8)
-# define RADEON_STENCIL_TEST_ALWAYS (7 << 12)
-# define RADEON_STENCIL_S_FAIL_REPLACE (2 << 16)
-# define RADEON_STENCIL_ZPASS_REPLACE (2 << 20)
-# define RADEON_STENCIL_ZFAIL_REPLACE (2 << 24)
-# define RADEON_Z_COMPRESSION_ENABLE (1 << 28)
-# define RADEON_FORCE_Z_DIRTY (1 << 29)
-# define RADEON_Z_WRITE_ENABLE (1 << 30)
-# define RADEON_Z_DECOMPRESSION_ENABLE (1 << 31)
-#define RADEON_RBBM_SOFT_RESET 0x00f0
-# define RADEON_SOFT_RESET_CP (1 << 0)
-# define RADEON_SOFT_RESET_HI (1 << 1)
-# define RADEON_SOFT_RESET_SE (1 << 2)
-# define RADEON_SOFT_RESET_RE (1 << 3)
-# define RADEON_SOFT_RESET_PP (1 << 4)
-# define RADEON_SOFT_RESET_E2 (1 << 5)
-# define RADEON_SOFT_RESET_RB (1 << 6)
-# define RADEON_SOFT_RESET_HDP (1 << 7)
-/*
- * 6:0 Available slots in the FIFO
- * 8 Host Interface active
- * 9 CP request active
- * 10 FIFO request active
- * 11 Host Interface retry active
- * 12 CP retry active
- * 13 FIFO retry active
- * 14 FIFO pipeline busy
- * 15 Event engine busy
- * 16 CP command stream busy
- * 17 2D engine busy
- * 18 2D portion of render backend busy
- * 20 3D setup engine busy
- * 26 GA engine busy
- * 27 CBA 2D engine busy
- * 31 2D engine busy or 3D engine busy or FIFO not empty or CP busy or
- * command stream queue not empty or Ring Buffer not empty
- */
-#define RADEON_RBBM_STATUS 0x0e40
-/* Same as the previous RADEON_RBBM_STATUS; this is a mirror of that register. */
-/* #define RADEON_RBBM_STATUS 0x1740 */
-/* bits 6:0 are dword slots available in the cmd fifo */
-# define RADEON_RBBM_FIFOCNT_MASK 0x007f
-# define RADEON_HIRQ_ON_RBB (1 << 8)
-# define RADEON_CPRQ_ON_RBB (1 << 9)
-# define RADEON_CFRQ_ON_RBB (1 << 10)
-# define RADEON_HIRQ_IN_RTBUF (1 << 11)
-# define RADEON_CPRQ_IN_RTBUF (1 << 12)
-# define RADEON_CFRQ_IN_RTBUF (1 << 13)
-# define RADEON_PIPE_BUSY (1 << 14)
-# define RADEON_ENG_EV_BUSY (1 << 15)
-# define RADEON_CP_CMDSTRM_BUSY (1 << 16)
-# define RADEON_E2_BUSY (1 << 17)
-# define RADEON_RB2D_BUSY (1 << 18)
-# define RADEON_RB3D_BUSY (1 << 19) /* not used on r300 */
-# define RADEON_VAP_BUSY (1 << 20)
-# define RADEON_RE_BUSY (1 << 21) /* not used on r300 */
-# define RADEON_TAM_BUSY (1 << 22) /* not used on r300 */
-# define RADEON_TDM_BUSY (1 << 23) /* not used on r300 */
-# define RADEON_PB_BUSY (1 << 24) /* not used on r300 */
-# define RADEON_TIM_BUSY (1 << 25) /* not used on r300 */
-# define RADEON_GA_BUSY (1 << 26)
-# define RADEON_CBA2D_BUSY (1 << 27)
-# define RADEON_RBBM_ACTIVE (1 << 31)
-#define RADEON_RE_LINE_PATTERN 0x1cd0
-#define RADEON_RE_MISC 0x26c4
-#define RADEON_RE_TOP_LEFT 0x26c0
-#define RADEON_RE_WIDTH_HEIGHT 0x1c44
-#define RADEON_RE_STIPPLE_ADDR 0x1cc8
-#define RADEON_RE_STIPPLE_DATA 0x1ccc
-
-#define RADEON_SCISSOR_TL_0 0x1cd8
-#define RADEON_SCISSOR_BR_0 0x1cdc
-#define RADEON_SCISSOR_TL_1 0x1ce0
-#define RADEON_SCISSOR_BR_1 0x1ce4
-#define RADEON_SCISSOR_TL_2 0x1ce8
-#define RADEON_SCISSOR_BR_2 0x1cec
-#define RADEON_SE_COORD_FMT 0x1c50
-#define RADEON_SE_CNTL 0x1c4c
-# define RADEON_FFACE_CULL_CW (0 << 0)
-# define RADEON_BFACE_SOLID (3 << 1)
-# define RADEON_FFACE_SOLID (3 << 3)
-# define RADEON_FLAT_SHADE_VTX_LAST (3 << 6)
-# define RADEON_DIFFUSE_SHADE_FLAT (1 << 8)
-# define RADEON_DIFFUSE_SHADE_GOURAUD (2 << 8)
-# define RADEON_ALPHA_SHADE_FLAT (1 << 10)
-# define RADEON_ALPHA_SHADE_GOURAUD (2 << 10)
-# define RADEON_SPECULAR_SHADE_FLAT (1 << 12)
-# define RADEON_SPECULAR_SHADE_GOURAUD (2 << 12)
-# define RADEON_FOG_SHADE_FLAT (1 << 14)
-# define RADEON_FOG_SHADE_GOURAUD (2 << 14)
-# define RADEON_VPORT_XY_XFORM_ENABLE (1 << 24)
-# define RADEON_VPORT_Z_XFORM_ENABLE (1 << 25)
-# define RADEON_VTX_PIX_CENTER_OGL (1 << 27)
-# define RADEON_ROUND_MODE_TRUNC (0 << 28)
-# define RADEON_ROUND_PREC_8TH_PIX (1 << 30)
-#define RADEON_SE_CNTL_STATUS 0x2140
-#define RADEON_SE_LINE_WIDTH 0x1db8
-#define RADEON_SE_VPORT_XSCALE 0x1d98
-#define RADEON_SE_ZBIAS_FACTOR 0x1db0
-#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED 0x2210
-#define RADEON_SE_TCL_OUTPUT_VTX_FMT 0x2254
-#define RADEON_SE_TCL_VECTOR_INDX_REG 0x2200
-# define RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT 16
-# define RADEON_VEC_INDX_DWORD_COUNT_SHIFT 28
-#define RADEON_SE_TCL_VECTOR_DATA_REG 0x2204
-#define RADEON_SE_TCL_SCALAR_INDX_REG 0x2208
-# define RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT 16
-#define RADEON_SE_TCL_SCALAR_DATA_REG 0x220C
-#define RADEON_SURFACE_ACCESS_FLAGS 0x0bf8
-#define RADEON_SURFACE_ACCESS_CLR 0x0bfc
-#define RADEON_SURFACE_CNTL 0x0b00
-# define RADEON_SURF_TRANSLATION_DIS (1 << 8)
-# define RADEON_NONSURF_AP0_SWP_MASK (3 << 20)
-# define RADEON_NONSURF_AP0_SWP_LITTLE (0 << 20)
-# define RADEON_NONSURF_AP0_SWP_BIG16 (1 << 20)
-# define RADEON_NONSURF_AP0_SWP_BIG32 (2 << 20)
-# define RADEON_NONSURF_AP1_SWP_MASK (3 << 22)
-# define RADEON_NONSURF_AP1_SWP_LITTLE (0 << 22)
-# define RADEON_NONSURF_AP1_SWP_BIG16 (1 << 22)
-# define RADEON_NONSURF_AP1_SWP_BIG32 (2 << 22)
-#define RADEON_SURFACE0_INFO 0x0b0c
-# define RADEON_SURF_PITCHSEL_MASK (0x1ff << 0)
-# define RADEON_SURF_TILE_MODE_MASK (3 << 16)
-# define RADEON_SURF_TILE_MODE_MACRO (0 << 16)
-# define RADEON_SURF_TILE_MODE_MICRO (1 << 16)
-# define RADEON_SURF_TILE_MODE_32BIT_Z (2 << 16)
-# define RADEON_SURF_TILE_MODE_16BIT_Z (3 << 16)
-#define RADEON_SURFACE0_LOWER_BOUND 0x0b04
-#define RADEON_SURFACE0_UPPER_BOUND 0x0b08
-# define RADEON_SURF_ADDRESS_FIXED_MASK (0x3ff << 0)
-#define RADEON_SURFACE1_INFO 0x0b1c
-#define RADEON_SURFACE1_LOWER_BOUND 0x0b14
-#define RADEON_SURFACE1_UPPER_BOUND 0x0b18
-#define RADEON_SURFACE2_INFO 0x0b2c
-#define RADEON_SURFACE2_LOWER_BOUND 0x0b24
-#define RADEON_SURFACE2_UPPER_BOUND 0x0b28
-#define RADEON_SURFACE3_INFO 0x0b3c
-#define RADEON_SURFACE3_LOWER_BOUND 0x0b34
-#define RADEON_SURFACE3_UPPER_BOUND 0x0b38
-#define RADEON_SURFACE4_INFO 0x0b4c
-#define RADEON_SURFACE4_LOWER_BOUND 0x0b44
-#define RADEON_SURFACE4_UPPER_BOUND 0x0b48
-#define RADEON_SURFACE5_INFO 0x0b5c
-#define RADEON_SURFACE5_LOWER_BOUND 0x0b54
-#define RADEON_SURFACE5_UPPER_BOUND 0x0b58
-#define RADEON_SURFACE6_INFO 0x0b6c
-#define RADEON_SURFACE6_LOWER_BOUND 0x0b64
-#define RADEON_SURFACE6_UPPER_BOUND 0x0b68
-#define RADEON_SURFACE7_INFO 0x0b7c
-#define RADEON_SURFACE7_LOWER_BOUND 0x0b74
-#define RADEON_SURFACE7_UPPER_BOUND 0x0b78
-#define RADEON_SW_SEMAPHORE 0x013c
-
-#define RADEON_WAIT_UNTIL 0x1720
-# define RADEON_WAIT_CRTC_PFLIP (1 << 0)
-# define RADEON_WAIT_2D_IDLE (1 << 14)
-# define RADEON_WAIT_3D_IDLE (1 << 15)
-# define RADEON_WAIT_2D_IDLECLEAN (1 << 16)
-# define RADEON_WAIT_3D_IDLECLEAN (1 << 17)
-# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18)
-
-#define RADEON_RB3D_ZMASKOFFSET 0x3234
-#define RADEON_RB3D_ZSTENCILCNTL 0x1c2c
-# define RADEON_DEPTH_FORMAT_16BIT_INT_Z (0 << 0)
-# define RADEON_DEPTH_FORMAT_24BIT_INT_Z (2 << 0)
-
-/* CP registers */
-#define RADEON_CP_ME_RAM_ADDR 0x07d4
-#define RADEON_CP_ME_RAM_RADDR 0x07d8
-#define RADEON_CP_ME_RAM_DATAH 0x07dc
-#define RADEON_CP_ME_RAM_DATAL 0x07e0
-
-#define RADEON_CP_RB_BASE 0x0700
-#define RADEON_CP_RB_CNTL 0x0704
-# define RADEON_BUF_SWAP_32BIT (2 << 16)
-# define RADEON_RB_NO_UPDATE (1 << 27)
-#define RADEON_CP_RB_RPTR_ADDR 0x070c
-#define RADEON_CP_RB_RPTR 0x0710
-#define RADEON_CP_RB_WPTR 0x0714
-
-#define RADEON_CP_RB_WPTR_DELAY 0x0718
-# define RADEON_PRE_WRITE_TIMER_SHIFT 0
-# define RADEON_PRE_WRITE_LIMIT_SHIFT 23
-
-#define RADEON_CP_IB_BASE 0x0738
-
-#define RADEON_CP_CSQ_CNTL 0x0740
-# define RADEON_CSQ_CNT_PRIMARY_MASK (0xff << 0)
-# define RADEON_CSQ_PRIDIS_INDDIS (0 << 28)
-# define RADEON_CSQ_PRIPIO_INDDIS (1 << 28)
-# define RADEON_CSQ_PRIBM_INDDIS (2 << 28)
-# define RADEON_CSQ_PRIPIO_INDBM (3 << 28)
-# define RADEON_CSQ_PRIBM_INDBM (4 << 28)
-# define RADEON_CSQ_PRIPIO_INDPIO (15 << 28)
-
-#define RADEON_AIC_CNTL 0x01d0
-# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
-# define RS400_MSI_REARM (1 << 3)
-#define RADEON_AIC_STAT 0x01d4
-#define RADEON_AIC_PT_BASE 0x01d8
-#define RADEON_AIC_LO_ADDR 0x01dc
-#define RADEON_AIC_HI_ADDR 0x01e0
-#define RADEON_AIC_TLB_ADDR 0x01e4
-#define RADEON_AIC_TLB_DATA 0x01e8
-
-/* CP command packets */
-#define RADEON_CP_PACKET0 0x00000000
-# define RADEON_ONE_REG_WR (1 << 15)
-#define RADEON_CP_PACKET1 0x40000000
-#define RADEON_CP_PACKET2 0x80000000
-#define RADEON_CP_PACKET3 0xC0000000
-# define RADEON_CP_NOP 0x00001000
-# define RADEON_CP_NEXT_CHAR 0x00001900
-# define RADEON_CP_PLY_NEXTSCAN 0x00001D00
-# define RADEON_CP_SET_SCISSORS 0x00001E00
- /* GEN_INDX_PRIM is unsupported starting with R300 */
-# define RADEON_3D_RNDR_GEN_INDX_PRIM 0x00002300
-# define RADEON_WAIT_FOR_IDLE 0x00002600
-# define RADEON_3D_DRAW_VBUF 0x00002800
-# define RADEON_3D_DRAW_IMMD 0x00002900
-# define RADEON_3D_DRAW_INDX 0x00002A00
-# define RADEON_CP_LOAD_PALETTE 0x00002C00
-# define RADEON_3D_LOAD_VBPNTR 0x00002F00
-# define RADEON_MPEG_IDCT_MACROBLOCK 0x00003000
-# define RADEON_MPEG_IDCT_MACROBLOCK_REV 0x00003100
-# define RADEON_3D_CLEAR_ZMASK 0x00003200
-# define RADEON_CP_INDX_BUFFER 0x00003300
-# define RADEON_CP_3D_DRAW_VBUF_2 0x00003400
-# define RADEON_CP_3D_DRAW_IMMD_2 0x00003500
-# define RADEON_CP_3D_DRAW_INDX_2 0x00003600
-# define RADEON_3D_CLEAR_HIZ 0x00003700
-# define RADEON_CP_3D_CLEAR_CMASK 0x00003802
-# define RADEON_CNTL_HOSTDATA_BLT 0x00009400
-# define RADEON_CNTL_PAINT_MULTI 0x00009A00
-# define RADEON_CNTL_BITBLT_MULTI 0x00009B00
-# define RADEON_CNTL_SET_SCISSORS 0xC0001E00
-
-#define RADEON_CP_PACKET_MASK 0xC0000000
-#define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000
-#define RADEON_CP_PACKET0_REG_MASK 0x000007ff
-#define RADEON_CP_PACKET1_REG0_MASK 0x000007ff
-#define RADEON_CP_PACKET1_REG1_MASK 0x003ff800
-
-#define RADEON_VTX_Z_PRESENT (1 << 31)
-#define RADEON_VTX_PKCOLOR_PRESENT (1 << 3)
-
-#define RADEON_PRIM_TYPE_NONE (0 << 0)
-#define RADEON_PRIM_TYPE_POINT (1 << 0)
-#define RADEON_PRIM_TYPE_LINE (2 << 0)
-#define RADEON_PRIM_TYPE_LINE_STRIP (3 << 0)
-#define RADEON_PRIM_TYPE_TRI_LIST (4 << 0)
-#define RADEON_PRIM_TYPE_TRI_FAN (5 << 0)
-#define RADEON_PRIM_TYPE_TRI_STRIP (6 << 0)
-#define RADEON_PRIM_TYPE_TRI_TYPE2 (7 << 0)
-#define RADEON_PRIM_TYPE_RECT_LIST (8 << 0)
-#define RADEON_PRIM_TYPE_3VRT_POINT_LIST (9 << 0)
-#define RADEON_PRIM_TYPE_3VRT_LINE_LIST (10 << 0)
-#define RADEON_PRIM_TYPE_MASK 0xf
-#define RADEON_PRIM_WALK_IND (1 << 4)
-#define RADEON_PRIM_WALK_LIST (2 << 4)
-#define RADEON_PRIM_WALK_RING (3 << 4)
-#define RADEON_COLOR_ORDER_BGRA (0 << 6)
-#define RADEON_COLOR_ORDER_RGBA (1 << 6)
-#define RADEON_MAOS_ENABLE (1 << 7)
-#define RADEON_VTX_FMT_R128_MODE (0 << 8)
-#define RADEON_VTX_FMT_RADEON_MODE (1 << 8)
-#define RADEON_NUM_VERTICES_SHIFT 16
-
-#define RADEON_COLOR_FORMAT_CI8 2
-#define RADEON_COLOR_FORMAT_ARGB1555 3
-#define RADEON_COLOR_FORMAT_RGB565 4
-#define RADEON_COLOR_FORMAT_ARGB8888 6
-#define RADEON_COLOR_FORMAT_RGB332 7
-#define RADEON_COLOR_FORMAT_RGB8 9
-#define RADEON_COLOR_FORMAT_ARGB4444 15
-
-#define RADEON_TXFORMAT_I8 0
-#define RADEON_TXFORMAT_AI88 1
-#define RADEON_TXFORMAT_RGB332 2
-#define RADEON_TXFORMAT_ARGB1555 3
-#define RADEON_TXFORMAT_RGB565 4
-#define RADEON_TXFORMAT_ARGB4444 5
-#define RADEON_TXFORMAT_ARGB8888 6
-#define RADEON_TXFORMAT_RGBA8888 7
-#define RADEON_TXFORMAT_Y8 8
-#define RADEON_TXFORMAT_VYUY422 10
-#define RADEON_TXFORMAT_YVYU422 11
-#define RADEON_TXFORMAT_DXT1 12
-#define RADEON_TXFORMAT_DXT23 14
-#define RADEON_TXFORMAT_DXT45 15
-
-#define R200_PP_TXCBLEND_0 0x2f00
-#define R200_PP_TXCBLEND_1 0x2f10
-#define R200_PP_TXCBLEND_2 0x2f20
-#define R200_PP_TXCBLEND_3 0x2f30
-#define R200_PP_TXCBLEND_4 0x2f40
-#define R200_PP_TXCBLEND_5 0x2f50
-#define R200_PP_TXCBLEND_6 0x2f60
-#define R200_PP_TXCBLEND_7 0x2f70
-#define R200_SE_TCL_LIGHT_MODEL_CTL_0 0x2268
-#define R200_PP_TFACTOR_0 0x2ee0
-#define R200_SE_VTX_FMT_0 0x2088
-#define R200_SE_VAP_CNTL 0x2080
-#define R200_SE_TCL_MATRIX_SEL_0 0x2230
-#define R200_SE_TCL_TEX_PROC_CTL_2 0x22a8
-#define R200_SE_TCL_UCP_VERT_BLEND_CTL 0x22c0
-#define R200_PP_TXFILTER_5 0x2ca0
-#define R200_PP_TXFILTER_4 0x2c80
-#define R200_PP_TXFILTER_3 0x2c60
-#define R200_PP_TXFILTER_2 0x2c40
-#define R200_PP_TXFILTER_1 0x2c20
-#define R200_PP_TXFILTER_0 0x2c00
-#define R200_PP_TXOFFSET_5 0x2d78
-#define R200_PP_TXOFFSET_4 0x2d60
-#define R200_PP_TXOFFSET_3 0x2d48
-#define R200_PP_TXOFFSET_2 0x2d30
-#define R200_PP_TXOFFSET_1 0x2d18
-#define R200_PP_TXOFFSET_0 0x2d00
-
-#define R200_PP_CUBIC_FACES_0 0x2c18
-#define R200_PP_CUBIC_FACES_1 0x2c38
-#define R200_PP_CUBIC_FACES_2 0x2c58
-#define R200_PP_CUBIC_FACES_3 0x2c78
-#define R200_PP_CUBIC_FACES_4 0x2c98
-#define R200_PP_CUBIC_FACES_5 0x2cb8
-#define R200_PP_CUBIC_OFFSET_F1_0 0x2d04
-#define R200_PP_CUBIC_OFFSET_F2_0 0x2d08
-#define R200_PP_CUBIC_OFFSET_F3_0 0x2d0c
-#define R200_PP_CUBIC_OFFSET_F4_0 0x2d10
-#define R200_PP_CUBIC_OFFSET_F5_0 0x2d14
-#define R200_PP_CUBIC_OFFSET_F1_1 0x2d1c
-#define R200_PP_CUBIC_OFFSET_F2_1 0x2d20
-#define R200_PP_CUBIC_OFFSET_F3_1 0x2d24
-#define R200_PP_CUBIC_OFFSET_F4_1 0x2d28
-#define R200_PP_CUBIC_OFFSET_F5_1 0x2d2c
-#define R200_PP_CUBIC_OFFSET_F1_2 0x2d34
-#define R200_PP_CUBIC_OFFSET_F2_2 0x2d38
-#define R200_PP_CUBIC_OFFSET_F3_2 0x2d3c
-#define R200_PP_CUBIC_OFFSET_F4_2 0x2d40
-#define R200_PP_CUBIC_OFFSET_F5_2 0x2d44
-#define R200_PP_CUBIC_OFFSET_F1_3 0x2d4c
-#define R200_PP_CUBIC_OFFSET_F2_3 0x2d50
-#define R200_PP_CUBIC_OFFSET_F3_3 0x2d54
-#define R200_PP_CUBIC_OFFSET_F4_3 0x2d58
-#define R200_PP_CUBIC_OFFSET_F5_3 0x2d5c
-#define R200_PP_CUBIC_OFFSET_F1_4 0x2d64
-#define R200_PP_CUBIC_OFFSET_F2_4 0x2d68
-#define R200_PP_CUBIC_OFFSET_F3_4 0x2d6c
-#define R200_PP_CUBIC_OFFSET_F4_4 0x2d70
-#define R200_PP_CUBIC_OFFSET_F5_4 0x2d74
-#define R200_PP_CUBIC_OFFSET_F1_5 0x2d7c
-#define R200_PP_CUBIC_OFFSET_F2_5 0x2d80
-#define R200_PP_CUBIC_OFFSET_F3_5 0x2d84
-#define R200_PP_CUBIC_OFFSET_F4_5 0x2d88
-#define R200_PP_CUBIC_OFFSET_F5_5 0x2d8c
-
-#define R200_RE_AUX_SCISSOR_CNTL 0x26f0
-#define R200_SE_VTE_CNTL 0x20b0
-#define R200_SE_TCL_OUTPUT_VTX_COMP_SEL 0x2250
-#define R200_PP_TAM_DEBUG3 0x2d9c
-#define R200_PP_CNTL_X 0x2cc4
-#define R200_SE_VAP_CNTL_STATUS 0x2140
-#define R200_RE_SCISSOR_TL_0 0x1cd8
-#define R200_RE_SCISSOR_TL_1 0x1ce0
-#define R200_RE_SCISSOR_TL_2 0x1ce8
-#define R200_RB3D_DEPTHXY_OFFSET 0x1d60
-#define R200_RE_AUX_SCISSOR_CNTL 0x26f0
-#define R200_SE_VTX_STATE_CNTL 0x2180
-#define R200_RE_POINTSIZE 0x2648
-#define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0 0x2254
-
-#define RADEON_PP_TEX_SIZE_0 0x1d04 /* NPOT */
-#define RADEON_PP_TEX_SIZE_1 0x1d0c
-#define RADEON_PP_TEX_SIZE_2 0x1d14
-
-#define RADEON_PP_CUBIC_FACES_0 0x1d24
-#define RADEON_PP_CUBIC_FACES_1 0x1d28
-#define RADEON_PP_CUBIC_FACES_2 0x1d2c
-#define RADEON_PP_CUBIC_OFFSET_T0_0 0x1dd0 /* bits [31:5] */
-#define RADEON_PP_CUBIC_OFFSET_T1_0 0x1e00
-#define RADEON_PP_CUBIC_OFFSET_T2_0 0x1e14
-
-#define RADEON_SE_TCL_STATE_FLUSH 0x2284
-
-#define SE_VAP_CNTL__TCL_ENA_MASK 0x00000001
-#define SE_VAP_CNTL__FORCE_W_TO_ONE_MASK 0x00010000
-#define SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT 0x00000012
-#define SE_VTE_CNTL__VTX_XY_FMT_MASK 0x00000100
-#define SE_VTE_CNTL__VTX_Z_FMT_MASK 0x00000200
-#define SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK 0x00000001
-#define SE_VTX_FMT_0__VTX_W0_PRESENT_MASK 0x00000002
-#define SE_VTX_FMT_0__VTX_COLOR_0_FMT__SHIFT 0x0000000b
-#define R200_3D_DRAW_IMMD_2 0xC0003500
-#define R200_SE_VTX_FMT_1 0x208c
-#define R200_RE_CNTL 0x1c50
-
-#define R200_RB3D_BLENDCOLOR 0x3218
-
-#define R200_SE_TCL_POINT_SPRITE_CNTL 0x22c4
-
-#define R200_PP_TRI_PERF 0x2cf8
-
-#define R200_PP_AFS_0 0x2f80
-#define R200_PP_AFS_1 0x2f00 /* same as txcblend_0 */
-
-#define R200_VAP_PVS_CNTL_1 0x22D0
-
-/* MPEG settings from VHA code */
-#define RADEON_VHA_SETTO16_1 0x2694
-#define RADEON_VHA_SETTO16_2 0x2680
-#define RADEON_VHA_SETTO0_1 0x1840
-#define RADEON_VHA_FB_OFFSET 0x19e4
-#define RADEON_VHA_SETTO1AND70S 0x19d8
-#define RADEON_VHA_DST_PITCH 0x1408
-
-// set as reference header
-#define RADEON_VHA_BACKFRAME0_OFF_Y 0x1840
-#define RADEON_VHA_BACKFRAME1_OFF_PITCH_Y 0x1844
-#define RADEON_VHA_BACKFRAME0_OFF_U 0x1848
-#define RADEON_VHA_BACKFRAME1_OFF_PITCH_U 0x184c
-#define RADOEN_VHA_BACKFRAME0_OFF_V 0x1850
-#define RADEON_VHA_BACKFRAME1_OFF_PITCH_V 0x1854
-#define RADEON_VHA_FORWFRAME0_OFF_Y 0x1858
-#define RADEON_VHA_FORWFRAME1_OFF_PITCH_Y 0x185c
-#define RADEON_VHA_FORWFRAME0_OFF_U 0x1860
-#define RADEON_VHA_FORWFRAME1_OFF_PITCH_U 0x1864
-#define RADEON_VHA_FORWFRAME0_OFF_V 0x1868
-#define RADEON_VHA_FORWFRAME0_OFF_PITCH_V 0x1880
-#define RADEON_VHA_BACKFRAME0_OFF_Y_2 0x1884
-#define RADEON_VHA_BACKFRAME1_OFF_PITCH_Y_2 0x1888
-#define RADEON_VHA_BACKFRAME0_OFF_U_2 0x188c
-#define RADEON_VHA_BACKFRAME1_OFF_PITCH_U_2 0x1890
-#define RADEON_VHA_BACKFRAME0_OFF_V_2 0x1894
-#define RADEON_VHA_BACKFRAME1_OFF_PITCH_V_2 0x1898
-
-#define R500_D1CRTC_STATUS 0x609c
-#define R500_D2CRTC_STATUS 0x689c
-#define R500_CRTC_V_BLANK (1<<0)
-
-#define R500_D1CRTC_FRAME_COUNT 0x60a4
-#define R500_D2CRTC_FRAME_COUNT 0x68a4
-
-#define R500_D1MODE_V_COUNTER 0x6530
-#define R500_D2MODE_V_COUNTER 0x6d30
-
-#define R500_D1MODE_VBLANK_STATUS 0x6534
-#define R500_D2MODE_VBLANK_STATUS 0x6d34
-#define R500_VBLANK_OCCURED (1<<0)
-#define R500_VBLANK_ACK (1<<4)
-#define R500_VBLANK_STAT (1<<12)
-#define R500_VBLANK_INT (1<<16)
-
-#define R500_DxMODE_INT_MASK 0x6540
-#define R500_D1MODE_INT_MASK (1<<0)
-#define R500_D2MODE_INT_MASK (1<<8)
-
-#define R500_DISP_INTERRUPT_STATUS 0x7edc
-#define R500_D1_VBLANK_INTERRUPT (1 << 4)
-#define R500_D2_VBLANK_INTERRUPT (1 << 5)
-
-/* Constants */
-#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */
-
-#define RADEON_LAST_FRAME_REG RADEON_SCRATCH_REG0
-#define RADEON_LAST_DISPATCH_REG RADEON_SCRATCH_REG1
-#define RADEON_LAST_CLEAR_REG RADEON_SCRATCH_REG2
-#define RADEON_LAST_SWI_REG RADEON_SCRATCH_REG3
-#define RADEON_LAST_DISPATCH 1
-
-#define RADEON_MAX_VB_AGE 0x7fffffff
-#define RADEON_MAX_VB_VERTS (0xffff)
-
-#define RADEON_RING_HIGH_MARK 128
-
-#define RADEON_PCIGART_TABLE_SIZE (32*1024)
-
-#define RADEON_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
-#define RADEON_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
-#define RADEON_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) )
-#define RADEON_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) )
-
-#define RADEON_WRITE_PLL( addr, val ) \
-do { \
- RADEON_WRITE8( RADEON_CLOCK_CNTL_INDEX, \
- ((addr) & 0x1f) | RADEON_PLL_WR_EN ); \
- RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \
-} while (0)
-
-#define RADEON_WRITE_PCIE( addr, val ) \
-do { \
- RADEON_WRITE8( RADEON_PCIE_INDEX, \
- ((addr) & 0xff)); \
- RADEON_WRITE( RADEON_PCIE_DATA, (val) ); \
-} while (0)
-
-#define R500_WRITE_MCIND( addr, val ) \
-do { \
- RADEON_WRITE(R520_MC_IND_INDEX, 0xff0000 | ((addr) & 0xff)); \
- RADEON_WRITE(R520_MC_IND_DATA, (val)); \
- RADEON_WRITE(R520_MC_IND_INDEX, 0); \
-} while (0)
-
-#define RS480_WRITE_MCIND( addr, val ) \
-do { \
- RADEON_WRITE( RS480_NB_MC_INDEX, \
- ((addr) & 0xff) | RS480_NB_MC_IND_WR_EN); \
- RADEON_WRITE( RS480_NB_MC_DATA, (val) ); \
- RADEON_WRITE( RS480_NB_MC_INDEX, 0xff ); \
-} while (0)
-
-#define RS690_WRITE_MCIND( addr, val ) \
-do { \
- RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_EN | ((addr) & RS690_MC_INDEX_MASK)); \
- RADEON_WRITE(RS690_MC_DATA, val); \
- RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK); \
-} while (0)
-
-#define IGP_WRITE_MCIND( addr, val ) \
-do { \
- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || \
- ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) \
- RS690_WRITE_MCIND( addr, val ); \
- else \
- RS480_WRITE_MCIND( addr, val ); \
-} while (0)
-
-#define CP_PACKET0( reg, n ) \
- (RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2))
-#define CP_PACKET0_TABLE( reg, n ) \
- (RADEON_CP_PACKET0 | RADEON_ONE_REG_WR | ((n) << 16) | ((reg) >> 2))
-#define CP_PACKET1( reg0, reg1 ) \
- (RADEON_CP_PACKET1 | (((reg1) >> 2) << 15) | ((reg0) >> 2))
-#define CP_PACKET2() \
- (RADEON_CP_PACKET2)
-#define CP_PACKET3( pkt, n ) \
- (RADEON_CP_PACKET3 | (pkt) | ((n) << 16))
-
-/* ================================================================
- * Engine control helper macros
- */
-
-#define RADEON_WAIT_UNTIL_2D_IDLE() do { \
- OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
- OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \
- RADEON_WAIT_HOST_IDLECLEAN) ); \
-} while (0)
-
-#define RADEON_WAIT_UNTIL_3D_IDLE() do { \
- OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
- OUT_RING( (RADEON_WAIT_3D_IDLECLEAN | \
- RADEON_WAIT_HOST_IDLECLEAN) ); \
-} while (0)
-
-#define RADEON_WAIT_UNTIL_IDLE() do { \
- OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
- OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \
- RADEON_WAIT_3D_IDLECLEAN | \
- RADEON_WAIT_HOST_IDLECLEAN) ); \
-} while (0)
-
-#define RADEON_WAIT_UNTIL_PAGE_FLIPPED() do { \
- OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
- OUT_RING( RADEON_WAIT_CRTC_PFLIP ); \
-} while (0)
-
-#define RADEON_FLUSH_CACHE() do { \
- if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \
- OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \
- OUT_RING(RADEON_RB3D_DC_FLUSH); \
- } else { \
- OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \
- OUT_RING(R300_RB3D_DC_FLUSH); \
- } \
-} while (0)
-
-#define RADEON_PURGE_CACHE() do { \
- if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \
- OUT_RING(CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \
- OUT_RING(RADEON_RB3D_DC_FLUSH | RADEON_RB3D_DC_FREE); \
- } else { \
- OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \
- OUT_RING(R300_RB3D_DC_FLUSH | R300_RB3D_DC_FREE ); \
- } \
-} while (0)
-
-#define RADEON_FLUSH_ZCACHE() do { \
- if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \
- OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \
- OUT_RING( RADEON_RB3D_ZC_FLUSH ); \
- } else { \
- OUT_RING( CP_PACKET0( R300_ZB_ZCACHE_CTLSTAT, 0 ) ); \
- OUT_RING( R300_ZC_FLUSH ); \
- } \
-} while (0)
-
-#define RADEON_PURGE_ZCACHE() do { \
- if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \
- OUT_RING(CP_PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0)); \
- OUT_RING(RADEON_RB3D_ZC_FLUSH | RADEON_RB3D_ZC_FREE); \
- } else { \
- OUT_RING(CP_PACKET0(R300_ZB_ZCACHE_CTLSTAT, 0)); \
- OUT_RING(R300_ZC_FLUSH | R300_ZC_FREE); \
- } \
-} while (0)
-
-/* ================================================================
- * Misc helper macros
- */
-
-/* Perfbox functionality only.
- */
-#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \
-do { \
- if (!(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE)) { \
- u32 head = GET_RING_HEAD( dev_priv ); \
- if (head == dev_priv->ring.tail) \
- dev_priv->stats.boxes |= RADEON_BOX_DMA_IDLE; \
- } \
-} while (0)
-
-#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \
-do { \
- drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; \
- if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \
- int __ret = radeon_do_cp_idle( dev_priv ); \
- if ( __ret ) return __ret; \
- sarea_priv->last_dispatch = 0; \
- radeon_freelist_reset( dev ); \
- } \
-} while (0)
-
-#define RADEON_DISPATCH_AGE( age ) do { \
- OUT_RING( CP_PACKET0( RADEON_LAST_DISPATCH_REG, 0 ) ); \
- OUT_RING( age ); \
-} while (0)
-
-#define RADEON_FRAME_AGE( age ) do { \
- OUT_RING( CP_PACKET0( RADEON_LAST_FRAME_REG, 0 ) ); \
- OUT_RING( age ); \
-} while (0)
-
-#define RADEON_CLEAR_AGE( age ) do { \
- OUT_RING( CP_PACKET0( RADEON_LAST_CLEAR_REG, 0 ) ); \
- OUT_RING( age ); \
-} while (0)
-
-/* ================================================================
- * Ring control
- */
-
-#define RADEON_VERBOSE 0
-
-#define RING_LOCALS int write, _nr; unsigned int mask; u32 *ring;
-
-#define BEGIN_RING( n ) do { \
- if ( RADEON_VERBOSE ) { \
- DRM_INFO( "BEGIN_RING( %d )\n", (n)); \
- } \
- if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
- COMMIT_RING(); \
- radeon_wait_ring( dev_priv, (n) * sizeof(u32) ); \
- } \
- _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \
- ring = dev_priv->ring.start; \
- write = dev_priv->ring.tail; \
- mask = dev_priv->ring.tail_mask; \
-} while (0)
-
-#define ADVANCE_RING() do { \
- if ( RADEON_VERBOSE ) { \
- DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \
- write, dev_priv->ring.tail ); \
- } \
- if (((dev_priv->ring.tail + _nr) & mask) != write) { \
- DRM_ERROR( \
- "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \
- ((dev_priv->ring.tail + _nr) & mask), \
- write, __LINE__); \
- } else \
- dev_priv->ring.tail = write; \
-} while (0)
-
-#define COMMIT_RING() do { \
- /* Flush writes to ring */ \
- DRM_MEMORYBARRIER(); \
- GET_RING_HEAD( dev_priv ); \
- RADEON_WRITE( RADEON_CP_RB_WPTR, dev_priv->ring.tail ); \
- /* read from PCI bus to ensure correct posting */ \
- RADEON_READ( RADEON_CP_RB_RPTR ); \
-} while (0)
-
-#define OUT_RING( x ) do { \
- if ( RADEON_VERBOSE ) { \
- DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \
- (unsigned int)(x), write ); \
- } \
- ring[write++] = (x); \
- write &= mask; \
-} while (0)
-
-#define OUT_RING_REG( reg, val ) do { \
- OUT_RING( CP_PACKET0( reg, 0 ) ); \
- OUT_RING( val ); \
-} while (0)
-
-#define OUT_RING_TABLE( tab, sz ) do { \
- int _size = (sz); \
- int *_tab = (int *)(tab); \
- \
- if (write + _size > mask) { \
- int _i = (mask+1) - write; \
- _size -= _i; \
- while (_i > 0) { \
- *(int *)(ring + write) = *_tab++; \
- write++; \
- _i--; \
- } \
- write = 0; \
- _tab += _i; \
- } \
- while (_size > 0) { \
- *(ring + write) = *_tab++; \
- write++; \
- _size--; \
- } \
- write &= mask; \
-} while (0)
-
-#endif /* __RADEON_DRV_H__ */
+++ /dev/null
-/* radeon_irq.c -- IRQ handling for radeon -*- linux-c -*- */
-/*
- * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
- *
- * The Weather Channel (TM) funded Tungsten Graphics to develop the
- * initial release of the Radeon 8500 driver under the XFree86 license.
- * This notice must be preserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
- * Michel D�zer <michel@daenzer.net>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "radeon_drm.h"
-#include "radeon_drv.h"
-
-void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- if (state)
- dev_priv->irq_enable_reg |= mask;
- else
- dev_priv->irq_enable_reg &= ~mask;
-
- if (dev->irq_enabled)
- RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
-}
-
-static void r500_vbl_irq_set_state(struct drm_device *dev, u32 mask, int state)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- if (state)
- dev_priv->r500_disp_irq_reg |= mask;
- else
- dev_priv->r500_disp_irq_reg &= ~mask;
-
- if (dev->irq_enabled)
- RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
-}
-
-int radeon_enable_vblank(struct drm_device *dev, int crtc)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
- switch (crtc) {
- case 0:
- r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 1);
- break;
- case 1:
- r500_vbl_irq_set_state(dev, R500_D2MODE_INT_MASK, 1);
- break;
- default:
- DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
- crtc);
- return EINVAL;
- }
- } else {
- switch (crtc) {
- case 0:
- radeon_irq_set_state(dev, RADEON_CRTC_VBLANK_MASK, 1);
- break;
- case 1:
- radeon_irq_set_state(dev, RADEON_CRTC2_VBLANK_MASK, 1);
- break;
- default:
- DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
- crtc);
- return EINVAL;
- }
- }
-
- return 0;
-}
-
-void radeon_disable_vblank(struct drm_device *dev, int crtc)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
- switch (crtc) {
- case 0:
- r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 0);
- break;
- case 1:
- r500_vbl_irq_set_state(dev, R500_D2MODE_INT_MASK, 0);
- break;
- default:
- DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
- crtc);
- break;
- }
- } else {
- switch (crtc) {
- case 0:
- radeon_irq_set_state(dev, RADEON_CRTC_VBLANK_MASK, 0);
- break;
- case 1:
- radeon_irq_set_state(dev, RADEON_CRTC2_VBLANK_MASK, 0);
- break;
- default:
- DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
- crtc);
- break;
- }
- }
-}
-
-static __inline__ u32 radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv, u32 *r500_disp_int)
-{
- u32 irqs = RADEON_READ(RADEON_GEN_INT_STATUS);
- u32 irq_mask = RADEON_SW_INT_TEST;
-
- *r500_disp_int = 0;
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
- /* vbl interrupts in a different place */
-
- if (irqs & R500_DISPLAY_INT_STATUS) {
- /* if a display interrupt */
- u32 disp_irq;
-
- disp_irq = RADEON_READ(R500_DISP_INTERRUPT_STATUS);
-
- *r500_disp_int = disp_irq;
- if (disp_irq & R500_D1_VBLANK_INTERRUPT) {
- RADEON_WRITE(R500_D1MODE_VBLANK_STATUS, R500_VBLANK_ACK);
- }
- if (disp_irq & R500_D2_VBLANK_INTERRUPT) {
- RADEON_WRITE(R500_D2MODE_VBLANK_STATUS, R500_VBLANK_ACK);
- }
- }
- irq_mask |= R500_DISPLAY_INT_STATUS;
- } else
- irq_mask |= RADEON_CRTC_VBLANK_STAT | RADEON_CRTC2_VBLANK_STAT;
-
- irqs &= irq_mask;
-
- if (irqs)
- RADEON_WRITE(RADEON_GEN_INT_STATUS, irqs);
-
- return irqs;
-}
-
-/* Interrupts - Used for device synchronization and flushing in the
- * following circumstances:
- *
- * - Exclusive FB access with hw idle:
- * - Wait for GUI Idle (?) interrupt, then do normal flush.
- *
- * - Frame throttling, NV_fence:
- * - Drop marker irq's into command stream ahead of time.
- * - Wait on irq's with lock *not held*
- * - Check each for termination condition
- *
- * - Internally in cp_getbuffer, etc:
- * - as above, but wait with lock held???
- *
- * NOTE: These functions are misleadingly named -- the irq's aren't
- * tied to dma at all, this is just a hangover from dri prehistory.
- */
-
-irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
-{
- struct drm_device *dev = (struct drm_device *) arg;
- drm_radeon_private_t *dev_priv =
- (drm_radeon_private_t *) dev->dev_private;
- u32 stat;
- u32 r500_disp_int;
- u32 tmp;
-
- /* Only consider the bits we're interested in - others could be used
- * outside the DRM
- */
- stat = radeon_acknowledge_irqs(dev_priv, &r500_disp_int);
- if (!stat)
- return IRQ_NONE;
-
- stat &= dev_priv->irq_enable_reg;
-
- /* SW interrupt */
- if (stat & RADEON_SW_INT_TEST)
- DRM_WAKEUP(&dev_priv->swi_queue);
-
- /* VBLANK interrupt */
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
- if (r500_disp_int & R500_D1_VBLANK_INTERRUPT)
- drm_handle_vblank(dev, 0);
- if (r500_disp_int & R500_D2_VBLANK_INTERRUPT)
- drm_handle_vblank(dev, 1);
- } else {
- if (stat & RADEON_CRTC_VBLANK_STAT)
- drm_handle_vblank(dev, 0);
- if (stat & RADEON_CRTC2_VBLANK_STAT)
- drm_handle_vblank(dev, 1);
- }
- if (dev->msi_enabled) {
- switch(dev_priv->flags & RADEON_FAMILY_MASK) {
- case CHIP_RS400:
- case CHIP_RS480:
- tmp = RADEON_READ(RADEON_AIC_CNTL) &
- ~RS400_MSI_REARM;
- RADEON_WRITE(RADEON_AIC_CNTL, tmp);
- RADEON_WRITE(RADEON_AIC_CNTL,
- tmp | RS400_MSI_REARM);
- break;
- case CHIP_RS690:
- case CHIP_RS740:
- tmp = RADEON_READ(RADEON_BUS_CNTL) &
- ~RS600_MSI_REARM;
- RADEON_WRITE(RADEON_BUS_CNTL, tmp);
- RADEON_WRITE(RADEON_BUS_CNTL, tmp |
- RS600_MSI_REARM);
- break;
- default:
- tmp = RADEON_READ(RADEON_MSI_REARM_EN) &
- ~RV370_MSI_REARM_EN;
- RADEON_WRITE(RADEON_MSI_REARM_EN, tmp);
- RADEON_WRITE(RADEON_MSI_REARM_EN,
- tmp | RV370_MSI_REARM_EN);
- break;
- }
- }
- return IRQ_HANDLED;
-}
-
-static int radeon_emit_irq(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- unsigned int ret;
- RING_LOCALS;
-
- atomic_inc(&dev_priv->swi_emitted);
- ret = atomic_read(&dev_priv->swi_emitted);
-
- BEGIN_RING(4);
- OUT_RING_REG(RADEON_LAST_SWI_REG, ret);
- OUT_RING_REG(RADEON_GEN_INT_STATUS, RADEON_SW_INT_FIRE);
- ADVANCE_RING();
- COMMIT_RING();
-
- return ret;
-}
-
-static int radeon_wait_irq(struct drm_device * dev, int swi_nr)
-{
- drm_radeon_private_t *dev_priv =
- (drm_radeon_private_t *) dev->dev_private;
- int ret = 0;
-
- if (RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr)
- return 0;
-
- dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
-
- DRM_WAIT_ON(ret, dev_priv->swi_queue, 3 * DRM_HZ,
- RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr);
-
- return ret;
-}
-
-u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- if (crtc < 0 || crtc > 1) {
- DRM_ERROR("Invalid crtc %d\n", crtc);
- return -EINVAL;
- }
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
- if (crtc == 0)
- return RADEON_READ(R500_D1CRTC_FRAME_COUNT);
- else
- return RADEON_READ(R500_D2CRTC_FRAME_COUNT);
- } else {
- if (crtc == 0)
- return RADEON_READ(RADEON_CRTC_CRNT_FRAME);
- else
- return RADEON_READ(RADEON_CRTC2_CRNT_FRAME);
- }
-}
-
-/* Needs the lock as it touches the ring.
- */
-int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_irq_emit_t *emit = data;
- int result;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- result = radeon_emit_irq(dev);
-
- if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
- DRM_ERROR("copy_to_user\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-/* Doesn't need the hardware lock.
- */
-int radeon_irq_wait(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_irq_wait_t *irqwait = data;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- return radeon_wait_irq(dev, irqwait->irq_seq);
-}
-
-/* drm_dma.h hooks
-*/
-void radeon_driver_irq_preinstall(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv =
- (drm_radeon_private_t *) dev->dev_private;
- u32 dummy;
-
- /* Disable *all* interrupts */
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
- RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
- RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
-
- /* Clear bits if they're already high */
- radeon_acknowledge_irqs(dev_priv, &dummy);
-}
-
-int radeon_driver_irq_postinstall(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv =
- (drm_radeon_private_t *) dev->dev_private;
-
- atomic_set(&dev_priv->swi_emitted, 0);
- DRM_INIT_WAITQUEUE(&dev_priv->swi_queue);
-
- dev->max_vblank_count = 0x001fffff;
-
- radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1);
-
- return 0;
-}
-
-void radeon_driver_irq_uninstall(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv =
- (drm_radeon_private_t *) dev->dev_private;
- if (!dev_priv)
- return;
-
- dev_priv->irq_enabled = 0;
-
- if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
- RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
- /* Disable *all* interrupts */
- RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
-}
-
-
-int radeon_vblank_crtc_get(struct drm_device *dev)
-{
- drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private;
-
- return dev_priv->vblank_crtc;
-}
-
-int radeon_vblank_crtc_set(struct drm_device *dev, int64_t value)
-{
- drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private;
- if (value & ~(DRM_RADEON_VBLANK_CRTC1 | DRM_RADEON_VBLANK_CRTC2)) {
- DRM_ERROR("called with invalid crtc 0x%x\n", (unsigned int)value);
- return -EINVAL;
- }
- dev_priv->vblank_crtc = (unsigned int)value;
- return 0;
-}
+++ /dev/null
-/* radeon_mem.c -- Simple GART/fb memory manager for radeon -*- linux-c -*- */
-/*
- * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
- *
- * The Weather Channel (TM) funded Tungsten Graphics to develop the
- * initial release of the Radeon 8500 driver under the XFree86 license.
- * This notice must be preserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "radeon_drm.h"
-#include "radeon_drv.h"
-
-/* Very simple allocator for GART memory, working on a static range
- * already mapped into each client's address space.
- */
-
-static struct mem_block *split_block(struct mem_block *p, int start, int size,
- struct drm_file *file_priv)
-{
- /* Maybe cut off the start of an existing block */
- if (start > p->start) {
- struct mem_block *newblock =
- drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
- if (!newblock)
- goto out;
- newblock->start = start;
- newblock->size = p->size - (start - p->start);
- newblock->file_priv = NULL;
- newblock->next = p->next;
- newblock->prev = p;
- p->next->prev = newblock;
- p->next = newblock;
- p->size -= newblock->size;
- p = newblock;
- }
-
- /* Maybe cut off the end of an existing block */
- if (size < p->size) {
- struct mem_block *newblock =
- drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
- if (!newblock)
- goto out;
- newblock->start = start + size;
- newblock->size = p->size - size;
- newblock->file_priv = NULL;
- newblock->next = p->next;
- newblock->prev = p;
- p->next->prev = newblock;
- p->next = newblock;
- p->size = size;
- }
-
- out:
- /* Our block is in the middle */
- p->file_priv = file_priv;
- return p;
-}
-
-static struct mem_block *alloc_block(struct mem_block *heap, int size,
- int align2, struct drm_file *file_priv)
-{
- struct mem_block *p;
- int mask = (1 << align2) - 1;
-
- list_for_each(p, heap) {
- int start = (p->start + mask) & ~mask;
- if (p->file_priv == NULL && start + size <= p->start + p->size)
- return split_block(p, start, size, file_priv);
- }
-
- return NULL;
-}
-
-static struct mem_block *find_block(struct mem_block *heap, int start)
-{
- struct mem_block *p;
-
- list_for_each(p, heap)
- if (p->start == start)
- return p;
-
- return NULL;
-}
-
-static void free_block(struct mem_block *p)
-{
- p->file_priv = NULL;
-
- /* Assumes a single contiguous range. Needs a special file_priv in
- * 'heap' to stop it being subsumed.
- */
- if (p->next->file_priv == NULL) {
- struct mem_block *q = p->next;
- p->size += q->size;
- p->next = q->next;
- p->next->prev = p;
- drm_free(q, sizeof(*q), DRM_MEM_BUFS);
- }
-
- if (p->prev->file_priv == NULL) {
- struct mem_block *q = p->prev;
- q->size += p->size;
- q->next = p->next;
- q->next->prev = q;
- drm_free(p, sizeof(*q), DRM_MEM_BUFS);
- }
-}
-
-/* Initialize. How to check for an uninitialized heap?
- */
-static int init_heap(struct mem_block **heap, int start, int size)
-{
- struct mem_block *blocks = drm_alloc(sizeof(*blocks), DRM_MEM_BUFS);
-
- if (!blocks)
- return -ENOMEM;
-
- *heap = drm_alloc(sizeof(**heap), DRM_MEM_BUFS);
- if (!*heap) {
- drm_free(blocks, sizeof(*blocks), DRM_MEM_BUFS);
- return -ENOMEM;
- }
-
- blocks->start = start;
- blocks->size = size;
- blocks->file_priv = NULL;
- blocks->next = blocks->prev = *heap;
-
- memset(*heap, 0, sizeof(**heap));
- (*heap)->file_priv = (struct drm_file *) - 1;
- (*heap)->next = (*heap)->prev = blocks;
- return 0;
-}
-
-/* Free all blocks associated with the releasing file.
- */
-void radeon_mem_release(struct drm_file *file_priv, struct mem_block *heap)
-{
- struct mem_block *p;
-
- if (!heap || !heap->next)
- return;
-
- list_for_each(p, heap) {
- if (p->file_priv == file_priv)
- p->file_priv = NULL;
- }
-
- /* Assumes a single contiguous range. Needs a special file_priv in
- * 'heap' to stop it being subsumed.
- */
- list_for_each(p, heap) {
- while (p->file_priv == NULL && p->next->file_priv == NULL) {
- struct mem_block *q = p->next;
- p->size += q->size;
- p->next = q->next;
- p->next->prev = p;
- drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
- }
- }
-}
-
-/* Shutdown.
- */
-void radeon_mem_takedown(struct mem_block **heap)
-{
- struct mem_block *p;
-
- if (!*heap)
- return;
-
- for (p = (*heap)->next; p != *heap;) {
- struct mem_block *q = p;
- p = p->next;
- drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
- }
-
- drm_free(*heap, sizeof(**heap), DRM_MEM_DRIVER);
- *heap = NULL;
-}
-
-/* IOCTL HANDLERS */
-
-static struct mem_block **get_heap(drm_radeon_private_t * dev_priv, int region)
-{
- switch (region) {
- case RADEON_MEM_REGION_GART:
- return &dev_priv->gart_heap;
- case RADEON_MEM_REGION_FB:
- return &dev_priv->fb_heap;
- default:
- return NULL;
- }
-}
-
-int radeon_mem_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_mem_alloc_t *alloc = data;
- struct mem_block *block, **heap;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- heap = get_heap(dev_priv, alloc->region);
- if (!heap || !*heap)
- return -EFAULT;
-
- /* Make things easier on ourselves: all allocations at least
- * 4k aligned.
- */
- if (alloc->alignment < 12)
- alloc->alignment = 12;
-
- block = alloc_block(*heap, alloc->size, alloc->alignment, file_priv);
-
- if (!block)
- return -ENOMEM;
-
- if (DRM_COPY_TO_USER(alloc->region_offset, &block->start,
- sizeof(int))) {
- DRM_ERROR("copy_to_user\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-int radeon_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_mem_free_t *memfree = data;
- struct mem_block *block, **heap;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- heap = get_heap(dev_priv, memfree->region);
- if (!heap || !*heap)
- return -EFAULT;
-
- block = find_block(*heap, memfree->region_offset);
- if (!block)
- return -EFAULT;
-
- if (block->file_priv != file_priv)
- return -EPERM;
-
- free_block(block);
- return 0;
-}
-
-int radeon_mem_init_heap(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_mem_init_heap_t *initheap = data;
- struct mem_block **heap;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- heap = get_heap(dev_priv, initheap->region);
- if (!heap)
- return -EFAULT;
-
- if (*heap) {
- DRM_ERROR("heap already initialized?");
- return -EFAULT;
- }
-
- return init_heap(heap, initheap->start, initheap->size);
-}
+++ /dev/null
-/*
- * Copyright 2007 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef RADEON_MICROCODE_H
-#define RADEON_MICROCODE_H
-
-/* production radeon ucode r1xx-r6xx */
-static const u32 R100_cp_microcode[][2]={
- { 0x21007000, 0000000000 },
- { 0x20007000, 0000000000 },
- { 0x000000b4, 0x00000004 },
- { 0x000000b8, 0x00000004 },
- { 0x6f5b4d4c, 0000000000 },
- { 0x4c4c427f, 0000000000 },
- { 0x5b568a92, 0000000000 },
- { 0x4ca09c6d, 0000000000 },
- { 0xad4c4c4c, 0000000000 },
- { 0x4ce1af3d, 0000000000 },
- { 0xd8afafaf, 0000000000 },
- { 0xd64c4cdc, 0000000000 },
- { 0x4cd10d10, 0000000000 },
- { 0x000f0000, 0x00000016 },
- { 0x362f242d, 0000000000 },
- { 0x00000012, 0x00000004 },
- { 0x000f0000, 0x00000016 },
- { 0x362f282d, 0000000000 },
- { 0x000380e7, 0x00000002 },
- { 0x04002c97, 0x00000002 },
- { 0x000f0001, 0x00000016 },
- { 0x333a3730, 0000000000 },
- { 0x000077ef, 0x00000002 },
- { 0x00061000, 0x00000002 },
- { 0x00000021, 0x0000001a },
- { 0x00004000, 0x0000001e },
- { 0x00061000, 0x00000002 },
- { 0x00000021, 0x0000001a },
- { 0x00004000, 0x0000001e },
- { 0x00061000, 0x00000002 },
- { 0x00000021, 0x0000001a },
- { 0x00004000, 0x0000001e },
- { 0x00000017, 0x00000004 },
- { 0x0003802b, 0x00000002 },
- { 0x040067e0, 0x00000002 },
- { 0x00000017, 0x00000004 },
- { 0x000077e0, 0x00000002 },
- { 0x00065000, 0x00000002 },
- { 0x000037e1, 0x00000002 },
- { 0x040067e1, 0x00000006 },
- { 0x000077e0, 0x00000002 },
- { 0x000077e1, 0x00000002 },
- { 0x000077e1, 0x00000006 },
- { 0xffffffff, 0000000000 },
- { 0x10000000, 0000000000 },
- { 0x0003802b, 0x00000002 },
- { 0x040067e0, 0x00000006 },
- { 0x00007675, 0x00000002 },
- { 0x00007676, 0x00000002 },
- { 0x00007677, 0x00000002 },
- { 0x00007678, 0x00000006 },
- { 0x0003802c, 0x00000002 },
- { 0x04002676, 0x00000002 },
- { 0x00007677, 0x00000002 },
- { 0x00007678, 0x00000006 },
- { 0x0000002f, 0x00000018 },
- { 0x0000002f, 0x00000018 },
- { 0000000000, 0x00000006 },
- { 0x00000030, 0x00000018 },
- { 0x00000030, 0x00000018 },
- { 0000000000, 0x00000006 },
- { 0x01605000, 0x00000002 },
- { 0x00065000, 0x00000002 },
- { 0x00098000, 0x00000002 },
- { 0x00061000, 0x00000002 },
- { 0x64c0603e, 0x00000004 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x00080000, 0x00000016 },
- { 0000000000, 0000000000 },
- { 0x0400251d, 0x00000002 },
- { 0x00007580, 0x00000002 },
- { 0x00067581, 0x00000002 },
- { 0x04002580, 0x00000002 },
- { 0x00067581, 0x00000002 },
- { 0x00000049, 0x00000004 },
- { 0x00005000, 0000000000 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x00061000, 0x00000002 },
- { 0x0000750e, 0x00000002 },
- { 0x00019000, 0x00000002 },
- { 0x00011055, 0x00000014 },
- { 0x00000055, 0x00000012 },
- { 0x0400250f, 0x00000002 },
- { 0x0000504f, 0x00000004 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x00007565, 0x00000002 },
- { 0x00007566, 0x00000002 },
- { 0x00000058, 0x00000004 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x01e655b4, 0x00000002 },
- { 0x4401b0e4, 0x00000002 },
- { 0x01c110e4, 0x00000002 },
- { 0x26667066, 0x00000018 },
- { 0x040c2565, 0x00000002 },
- { 0x00000066, 0x00000018 },
- { 0x04002564, 0x00000002 },
- { 0x00007566, 0x00000002 },
- { 0x0000005d, 0x00000004 },
- { 0x00401069, 0x00000008 },
- { 0x00101000, 0x00000002 },
- { 0x000d80ff, 0x00000002 },
- { 0x0080006c, 0x00000008 },
- { 0x000f9000, 0x00000002 },
- { 0x000e00ff, 0x00000002 },
- { 0000000000, 0x00000006 },
- { 0x0000008f, 0x00000018 },
- { 0x0000005b, 0x00000004 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x00007576, 0x00000002 },
- { 0x00065000, 0x00000002 },
- { 0x00009000, 0x00000002 },
- { 0x00041000, 0x00000002 },
- { 0x0c00350e, 0x00000002 },
- { 0x00049000, 0x00000002 },
- { 0x00051000, 0x00000002 },
- { 0x01e785f8, 0x00000002 },
- { 0x00200000, 0x00000002 },
- { 0x0060007e, 0x0000000c },
- { 0x00007563, 0x00000002 },
- { 0x006075f0, 0x00000021 },
- { 0x20007073, 0x00000004 },
- { 0x00005073, 0x00000004 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x00007576, 0x00000002 },
- { 0x00007577, 0x00000002 },
- { 0x0000750e, 0x00000002 },
- { 0x0000750f, 0x00000002 },
- { 0x00a05000, 0x00000002 },
- { 0x00600083, 0x0000000c },
- { 0x006075f0, 0x00000021 },
- { 0x000075f8, 0x00000002 },
- { 0x00000083, 0x00000004 },
- { 0x000a750e, 0x00000002 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x0020750f, 0x00000002 },
- { 0x00600086, 0x00000004 },
- { 0x00007570, 0x00000002 },
- { 0x00007571, 0x00000002 },
- { 0x00007572, 0x00000006 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x00005000, 0x00000002 },
- { 0x00a05000, 0x00000002 },
- { 0x00007568, 0x00000002 },
- { 0x00061000, 0x00000002 },
- { 0x00000095, 0x0000000c },
- { 0x00058000, 0x00000002 },
- { 0x0c607562, 0x00000002 },
- { 0x00000097, 0x00000004 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x00600096, 0x00000004 },
- { 0x400070e5, 0000000000 },
- { 0x000380e6, 0x00000002 },
- { 0x040025c5, 0x00000002 },
- { 0x000380e5, 0x00000002 },
- { 0x000000a8, 0x0000001c },
- { 0x000650aa, 0x00000018 },
- { 0x040025bb, 0x00000002 },
- { 0x000610ab, 0x00000018 },
- { 0x040075bc, 0000000000 },
- { 0x000075bb, 0x00000002 },
- { 0x000075bc, 0000000000 },
- { 0x00090000, 0x00000006 },
- { 0x00090000, 0x00000002 },
- { 0x000d8002, 0x00000006 },
- { 0x00007832, 0x00000002 },
- { 0x00005000, 0x00000002 },
- { 0x000380e7, 0x00000002 },
- { 0x04002c97, 0x00000002 },
- { 0x00007820, 0x00000002 },
- { 0x00007821, 0x00000002 },
- { 0x00007800, 0000000000 },
- { 0x01200000, 0x00000002 },
- { 0x20077000, 0x00000002 },
- { 0x01200000, 0x00000002 },
- { 0x20007000, 0x00000002 },
- { 0x00061000, 0x00000002 },
- { 0x0120751b, 0x00000002 },
- { 0x8040750a, 0x00000002 },
- { 0x8040750b, 0x00000002 },
- { 0x00110000, 0x00000002 },
- { 0x000380e5, 0x00000002 },
- { 0x000000c6, 0x0000001c },
- { 0x000610ab, 0x00000018 },
- { 0x844075bd, 0x00000002 },
- { 0x000610aa, 0x00000018 },
- { 0x840075bb, 0x00000002 },
- { 0x000610ab, 0x00000018 },
- { 0x844075bc, 0x00000002 },
- { 0x000000c9, 0x00000004 },
- { 0x804075bd, 0x00000002 },
- { 0x800075bb, 0x00000002 },
- { 0x804075bc, 0x00000002 },
- { 0x00108000, 0x00000002 },
- { 0x01400000, 0x00000002 },
- { 0x006000cd, 0x0000000c },
- { 0x20c07000, 0x00000020 },
- { 0x000000cf, 0x00000012 },
- { 0x00800000, 0x00000006 },
- { 0x0080751d, 0x00000006 },
- { 0000000000, 0000000000 },
- { 0x0000775c, 0x00000002 },
- { 0x00a05000, 0x00000002 },
- { 0x00661000, 0x00000002 },
- { 0x0460275d, 0x00000020 },
- { 0x00004000, 0000000000 },
- { 0x01e00830, 0x00000002 },
- { 0x21007000, 0000000000 },
- { 0x6464614d, 0000000000 },
- { 0x69687420, 0000000000 },
- { 0x00000073, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x00005000, 0x00000002 },
- { 0x000380d0, 0x00000002 },
- { 0x040025e0, 0x00000002 },
- { 0x000075e1, 0000000000 },
- { 0x00000001, 0000000000 },
- { 0x000380e0, 0x00000002 },
- { 0x04002394, 0x00000002 },
- { 0x00005000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x00000008, 0000000000 },
- { 0x00000004, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
-};
-
-static const u32 R200_cp_microcode[][2]={
- { 0x21007000, 0000000000 },
- { 0x20007000, 0000000000 },
- { 0x000000bf, 0x00000004 },
- { 0x000000c3, 0x00000004 },
- { 0x7a685e5d, 0000000000 },
- { 0x5d5d5588, 0000000000 },
- { 0x68659197, 0000000000 },
- { 0x5da19f78, 0000000000 },
- { 0x5d5d5d5d, 0000000000 },
- { 0x5dee5d50, 0000000000 },
- { 0xf2acacac, 0000000000 },
- { 0xe75df9e9, 0000000000 },
- { 0xb1dd0e11, 0000000000 },
- { 0xe2afafaf, 0000000000 },
- { 0x000f0000, 0x00000016 },
- { 0x452f232d, 0000000000 },
- { 0x00000013, 0x00000004 },
- { 0x000f0000, 0x00000016 },
- { 0x452f272d, 0000000000 },
- { 0x000f0001, 0x00000016 },
- { 0x3e4d4a37, 0000000000 },
- { 0x000077ef, 0x00000002 },
- { 0x00061000, 0x00000002 },
- { 0x00000020, 0x0000001a },
- { 0x00004000, 0x0000001e },
- { 0x00061000, 0x00000002 },
- { 0x00000020, 0x0000001a },
- { 0x00004000, 0x0000001e },
- { 0x00061000, 0x00000002 },
- { 0x00000020, 0x0000001a },
- { 0x00004000, 0x0000001e },
- { 0x00000016, 0x00000004 },
- { 0x0003802a, 0x00000002 },
- { 0x040067e0, 0x00000002 },
- { 0x00000016, 0x00000004 },
- { 0x000077e0, 0x00000002 },
- { 0x00065000, 0x00000002 },
- { 0x000037e1, 0x00000002 },
- { 0x040067e1, 0x00000006 },
- { 0x000077e0, 0x00000002 },
- { 0x000077e1, 0x00000002 },
- { 0x000077e1, 0x00000006 },
- { 0xffffffff, 0000000000 },
- { 0x10000000, 0000000000 },
- { 0x07f007f0, 0000000000 },
- { 0x0003802a, 0x00000002 },
- { 0x040067e0, 0x00000006 },
- { 0x0003802c, 0x00000002 },
- { 0x04002741, 0x00000002 },
- { 0x04002741, 0x00000002 },
- { 0x04002743, 0x00000002 },
- { 0x00007675, 0x00000002 },
- { 0x00007676, 0x00000002 },
- { 0x00007677, 0x00000002 },
- { 0x00007678, 0x00000006 },
- { 0x0003802c, 0x00000002 },
- { 0x04002741, 0x00000002 },
- { 0x04002741, 0x00000002 },
- { 0x04002743, 0x00000002 },
- { 0x00007676, 0x00000002 },
- { 0x00007677, 0x00000002 },
- { 0x00007678, 0x00000006 },
- { 0x0003802b, 0x00000002 },
- { 0x04002676, 0x00000002 },
- { 0x00007677, 0x00000002 },
- { 0x0003802c, 0x00000002 },
- { 0x04002741, 0x00000002 },
- { 0x04002743, 0x00000002 },
- { 0x00007678, 0x00000006 },
- { 0x0003802c, 0x00000002 },
- { 0x04002741, 0x00000002 },
- { 0x04002741, 0x00000002 },
- { 0x04002743, 0x00000002 },
- { 0x00007678, 0x00000006 },
- { 0x0000002f, 0x00000018 },
- { 0x0000002f, 0x00000018 },
- { 0000000000, 0x00000006 },
- { 0x00000037, 0x00000018 },
- { 0x00000037, 0x00000018 },
- { 0000000000, 0x00000006 },
- { 0x01605000, 0x00000002 },
- { 0x00065000, 0x00000002 },
- { 0x00098000, 0x00000002 },
- { 0x00061000, 0x00000002 },
- { 0x64c06051, 0x00000004 },
- { 0x00080000, 0x00000016 },
- { 0000000000, 0000000000 },
- { 0x0400251d, 0x00000002 },
- { 0x00007580, 0x00000002 },
- { 0x00067581, 0x00000002 },
- { 0x04002580, 0x00000002 },
- { 0x00067581, 0x00000002 },
- { 0x0000005a, 0x00000004 },
- { 0x00005000, 0000000000 },
- { 0x00061000, 0x00000002 },
- { 0x0000750e, 0x00000002 },
- { 0x00019000, 0x00000002 },
- { 0x00011064, 0x00000014 },
- { 0x00000064, 0x00000012 },
- { 0x0400250f, 0x00000002 },
- { 0x0000505e, 0x00000004 },
- { 0x00007565, 0x00000002 },
- { 0x00007566, 0x00000002 },
- { 0x00000065, 0x00000004 },
- { 0x01e655b4, 0x00000002 },
- { 0x4401b0f0, 0x00000002 },
- { 0x01c110f0, 0x00000002 },
- { 0x26667071, 0x00000018 },
- { 0x040c2565, 0x00000002 },
- { 0x00000071, 0x00000018 },
- { 0x04002564, 0x00000002 },
- { 0x00007566, 0x00000002 },
- { 0x00000068, 0x00000004 },
- { 0x00401074, 0x00000008 },
- { 0x00101000, 0x00000002 },
- { 0x000d80ff, 0x00000002 },
- { 0x00800077, 0x00000008 },
- { 0x000f9000, 0x00000002 },
- { 0x000e00ff, 0x00000002 },
- { 0000000000, 0x00000006 },
- { 0x00000094, 0x00000018 },
- { 0x00000068, 0x00000004 },
- { 0x00007576, 0x00000002 },
- { 0x00065000, 0x00000002 },
- { 0x00009000, 0x00000002 },
- { 0x00041000, 0x00000002 },
- { 0x0c00350e, 0x00000002 },
- { 0x00049000, 0x00000002 },
- { 0x00051000, 0x00000002 },
- { 0x01e785f8, 0x00000002 },
- { 0x00200000, 0x00000002 },
- { 0x00600087, 0x0000000c },
- { 0x00007563, 0x00000002 },
- { 0x006075f0, 0x00000021 },
- { 0x2000707c, 0x00000004 },
- { 0x0000507c, 0x00000004 },
- { 0x00007576, 0x00000002 },
- { 0x00007577, 0x00000002 },
- { 0x0000750e, 0x00000002 },
- { 0x0000750f, 0x00000002 },
- { 0x00a05000, 0x00000002 },
- { 0x0060008a, 0x0000000c },
- { 0x006075f0, 0x00000021 },
- { 0x000075f8, 0x00000002 },
- { 0x0000008a, 0x00000004 },
- { 0x000a750e, 0x00000002 },
- { 0x0020750f, 0x00000002 },
- { 0x0060008d, 0x00000004 },
- { 0x00007570, 0x00000002 },
- { 0x00007571, 0x00000002 },
- { 0x00007572, 0x00000006 },
- { 0x00005000, 0x00000002 },
- { 0x00a05000, 0x00000002 },
- { 0x00007568, 0x00000002 },
- { 0x00061000, 0x00000002 },
- { 0x00000098, 0x0000000c },
- { 0x00058000, 0x00000002 },
- { 0x0c607562, 0x00000002 },
- { 0x0000009a, 0x00000004 },
- { 0x00600099, 0x00000004 },
- { 0x400070f1, 0000000000 },
- { 0x000380f1, 0x00000002 },
- { 0x000000a7, 0x0000001c },
- { 0x000650a9, 0x00000018 },
- { 0x040025bb, 0x00000002 },
- { 0x000610aa, 0x00000018 },
- { 0x040075bc, 0000000000 },
- { 0x000075bb, 0x00000002 },
- { 0x000075bc, 0000000000 },
- { 0x00090000, 0x00000006 },
- { 0x00090000, 0x00000002 },
- { 0x000d8002, 0x00000006 },
- { 0x00005000, 0x00000002 },
- { 0x00007821, 0x00000002 },
- { 0x00007800, 0000000000 },
- { 0x00007821, 0x00000002 },
- { 0x00007800, 0000000000 },
- { 0x01665000, 0x00000002 },
- { 0x000a0000, 0x00000002 },
- { 0x000671cc, 0x00000002 },
- { 0x0286f1cd, 0x00000002 },
- { 0x000000b7, 0x00000010 },
- { 0x21007000, 0000000000 },
- { 0x000000be, 0x0000001c },
- { 0x00065000, 0x00000002 },
- { 0x000a0000, 0x00000002 },
- { 0x00061000, 0x00000002 },
- { 0x000b0000, 0x00000002 },
- { 0x38067000, 0x00000002 },
- { 0x000a00ba, 0x00000004 },
- { 0x20007000, 0000000000 },
- { 0x01200000, 0x00000002 },
- { 0x20077000, 0x00000002 },
- { 0x01200000, 0x00000002 },
- { 0x20007000, 0000000000 },
- { 0x00061000, 0x00000002 },
- { 0x0120751b, 0x00000002 },
- { 0x8040750a, 0x00000002 },
- { 0x8040750b, 0x00000002 },
- { 0x00110000, 0x00000002 },
- { 0x000380f1, 0x00000002 },
- { 0x000000d1, 0x0000001c },
- { 0x000610aa, 0x00000018 },
- { 0x844075bd, 0x00000002 },
- { 0x000610a9, 0x00000018 },
- { 0x840075bb, 0x00000002 },
- { 0x000610aa, 0x00000018 },
- { 0x844075bc, 0x00000002 },
- { 0x000000d4, 0x00000004 },
- { 0x804075bd, 0x00000002 },
- { 0x800075bb, 0x00000002 },
- { 0x804075bc, 0x00000002 },
- { 0x00108000, 0x00000002 },
- { 0x01400000, 0x00000002 },
- { 0x006000d8, 0x0000000c },
- { 0x20c07000, 0x00000020 },
- { 0x000000da, 0x00000012 },
- { 0x00800000, 0x00000006 },
- { 0x0080751d, 0x00000006 },
- { 0x000025bb, 0x00000002 },
- { 0x000040d4, 0x00000004 },
- { 0x0000775c, 0x00000002 },
- { 0x00a05000, 0x00000002 },
- { 0x00661000, 0x00000002 },
- { 0x0460275d, 0x00000020 },
- { 0x00004000, 0000000000 },
- { 0x00007999, 0x00000002 },
- { 0x00a05000, 0x00000002 },
- { 0x00661000, 0x00000002 },
- { 0x0460299b, 0x00000020 },
- { 0x00004000, 0000000000 },
- { 0x01e00830, 0x00000002 },
- { 0x21007000, 0000000000 },
- { 0x00005000, 0x00000002 },
- { 0x00038056, 0x00000002 },
- { 0x040025e0, 0x00000002 },
- { 0x000075e1, 0000000000 },
- { 0x00000001, 0000000000 },
- { 0x000380ed, 0x00000002 },
- { 0x04007394, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x000078c4, 0x00000002 },
- { 0x000078c5, 0x00000002 },
- { 0x000078c6, 0x00000002 },
- { 0x00007924, 0x00000002 },
- { 0x00007925, 0x00000002 },
- { 0x00007926, 0x00000002 },
- { 0x000000f2, 0x00000004 },
- { 0x00007924, 0x00000002 },
- { 0x00007925, 0x00000002 },
- { 0x00007926, 0x00000002 },
- { 0x000000f9, 0x00000004 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
-};
-
-static const u32 R300_cp_microcode[][2]={
- { 0x4200e000, 0000000000 },
- { 0x4000e000, 0000000000 },
- { 0x000000ae, 0x00000008 },
- { 0x000000b2, 0x00000008 },
- { 0x67554b4a, 0000000000 },
- { 0x4a4a4475, 0000000000 },
- { 0x55527d83, 0000000000 },
- { 0x4a8c8b65, 0000000000 },
- { 0x4aef4af6, 0000000000 },
- { 0x4ae14a4a, 0000000000 },
- { 0xe4979797, 0000000000 },
- { 0xdb4aebdd, 0000000000 },
- { 0x9ccc4a4a, 0000000000 },
- { 0xd1989898, 0000000000 },
- { 0x4a0f9ad6, 0000000000 },
- { 0x000ca000, 0x00000004 },
- { 0x000d0012, 0x00000038 },
- { 0x0000e8b4, 0x00000004 },
- { 0x000d0014, 0x00000038 },
- { 0x0000e8b6, 0x00000004 },
- { 0x000d0016, 0x00000038 },
- { 0x0000e854, 0x00000004 },
- { 0x000d0018, 0x00000038 },
- { 0x0000e855, 0x00000004 },
- { 0x000d001a, 0x00000038 },
- { 0x0000e856, 0x00000004 },
- { 0x000d001c, 0x00000038 },
- { 0x0000e857, 0x00000004 },
- { 0x000d001e, 0x00000038 },
- { 0x0000e824, 0x00000004 },
- { 0x000d0020, 0x00000038 },
- { 0x0000e825, 0x00000004 },
- { 0x000d0022, 0x00000038 },
- { 0x0000e830, 0x00000004 },
- { 0x000d0024, 0x00000038 },
- { 0x0000f0c0, 0x00000004 },
- { 0x000d0026, 0x00000038 },
- { 0x0000f0c1, 0x00000004 },
- { 0x000d0028, 0x00000038 },
- { 0x0000f041, 0x00000004 },
- { 0x000d002a, 0x00000038 },
- { 0x0000f184, 0x00000004 },
- { 0x000d002c, 0x00000038 },
- { 0x0000f185, 0x00000004 },
- { 0x000d002e, 0x00000038 },
- { 0x0000f186, 0x00000004 },
- { 0x000d0030, 0x00000038 },
- { 0x0000f187, 0x00000004 },
- { 0x000d0032, 0x00000038 },
- { 0x0000f180, 0x00000004 },
- { 0x000d0034, 0x00000038 },
- { 0x0000f393, 0x00000004 },
- { 0x000d0036, 0x00000038 },
- { 0x0000f38a, 0x00000004 },
- { 0x000d0038, 0x00000038 },
- { 0x0000f38e, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000043, 0x00000018 },
- { 0x00cce800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x0000003a, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x2000451d, 0x00000004 },
- { 0x0000e580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x08004580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x00000047, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x00032000, 0x00000004 },
- { 0x00022051, 0x00000028 },
- { 0x00000051, 0x00000024 },
- { 0x0800450f, 0x00000004 },
- { 0x0000a04b, 0x00000008 },
- { 0x0000e565, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000052, 0x00000008 },
- { 0x03cca5b4, 0x00000004 },
- { 0x05432000, 0x00000004 },
- { 0x00022000, 0x00000004 },
- { 0x4ccce05e, 0x00000030 },
- { 0x08274565, 0x00000004 },
- { 0x0000005e, 0x00000030 },
- { 0x08004564, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000055, 0x00000008 },
- { 0x00802061, 0x00000010 },
- { 0x00202000, 0x00000004 },
- { 0x001b00ff, 0x00000004 },
- { 0x01000064, 0x00000010 },
- { 0x001f2000, 0x00000004 },
- { 0x001c00ff, 0x00000004 },
- { 0000000000, 0x0000000c },
- { 0x00000080, 0x00000030 },
- { 0x00000055, 0x00000008 },
- { 0x0000e576, 0x00000004 },
- { 0x000ca000, 0x00000004 },
- { 0x00012000, 0x00000004 },
- { 0x00082000, 0x00000004 },
- { 0x1800650e, 0x00000004 },
- { 0x00092000, 0x00000004 },
- { 0x000a2000, 0x00000004 },
- { 0x000f0000, 0x00000004 },
- { 0x00400000, 0x00000004 },
- { 0x00000074, 0x00000018 },
- { 0x0000e563, 0x00000004 },
- { 0x00c0e5f9, 0x000000c2 },
- { 0x00000069, 0x00000008 },
- { 0x0000a069, 0x00000008 },
- { 0x0000e576, 0x00000004 },
- { 0x0000e577, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x0000e50f, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000077, 0x00000018 },
- { 0x00c0e5f9, 0x000000c2 },
- { 0x00000077, 0x00000008 },
- { 0x0014e50e, 0x00000004 },
- { 0x0040e50f, 0x00000004 },
- { 0x00c0007a, 0x00000008 },
- { 0x0000e570, 0x00000004 },
- { 0x0000e571, 0x00000004 },
- { 0x0000e572, 0x0000000c },
- { 0x0000a000, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x0000e568, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00000084, 0x00000018 },
- { 0x000b0000, 0x00000004 },
- { 0x18c0e562, 0x00000004 },
- { 0x00000086, 0x00000008 },
- { 0x00c00085, 0x00000008 },
- { 0x000700e3, 0x00000004 },
- { 0x00000092, 0x00000038 },
- { 0x000ca094, 0x00000030 },
- { 0x080045bb, 0x00000004 },
- { 0x000c2095, 0x00000030 },
- { 0x0800e5bc, 0000000000 },
- { 0x0000e5bb, 0x00000004 },
- { 0x0000e5bc, 0000000000 },
- { 0x00120000, 0x0000000c },
- { 0x00120000, 0x00000004 },
- { 0x001b0002, 0x0000000c },
- { 0x0000a000, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e800, 0000000000 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e82e, 0000000000 },
- { 0x02cca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000ce1cc, 0x00000004 },
- { 0x050de1cd, 0x00000004 },
- { 0x00400000, 0x00000004 },
- { 0x000000a4, 0x00000018 },
- { 0x00c0a000, 0x00000004 },
- { 0x000000a1, 0x00000008 },
- { 0x000000a6, 0x00000020 },
- { 0x4200e000, 0000000000 },
- { 0x000000ad, 0x00000038 },
- { 0x000ca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00160000, 0x00000004 },
- { 0x700ce000, 0x00000004 },
- { 0x001400a9, 0x00000008 },
- { 0x4000e000, 0000000000 },
- { 0x02400000, 0x00000004 },
- { 0x400ee000, 0x00000004 },
- { 0x02400000, 0x00000004 },
- { 0x4000e000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x0240e51b, 0x00000004 },
- { 0x0080e50a, 0x00000005 },
- { 0x0080e50b, 0x00000005 },
- { 0x00220000, 0x00000004 },
- { 0x000700e3, 0x00000004 },
- { 0x000000c0, 0x00000038 },
- { 0x000c2095, 0x00000030 },
- { 0x0880e5bd, 0x00000005 },
- { 0x000c2094, 0x00000030 },
- { 0x0800e5bb, 0x00000005 },
- { 0x000c2095, 0x00000030 },
- { 0x0880e5bc, 0x00000005 },
- { 0x000000c3, 0x00000008 },
- { 0x0080e5bd, 0x00000005 },
- { 0x0000e5bb, 0x00000005 },
- { 0x0080e5bc, 0x00000005 },
- { 0x00210000, 0x00000004 },
- { 0x02800000, 0x00000004 },
- { 0x00c000c7, 0x00000018 },
- { 0x4180e000, 0x00000040 },
- { 0x000000c9, 0x00000024 },
- { 0x01000000, 0x0000000c },
- { 0x0100e51d, 0x0000000c },
- { 0x000045bb, 0x00000004 },
- { 0x000080c3, 0x00000008 },
- { 0x0000f3ce, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c053cf, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x0000f3d2, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c053d3, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x0000f39d, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c0539e, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x03c00830, 0x00000004 },
- { 0x4200e000, 0000000000 },
- { 0x0000a000, 0x00000004 },
- { 0x200045e0, 0x00000004 },
- { 0x0000e5e1, 0000000000 },
- { 0x00000001, 0000000000 },
- { 0x000700e0, 0x00000004 },
- { 0x0800e394, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x0000e8c4, 0x00000004 },
- { 0x0000e8c5, 0x00000004 },
- { 0x0000e8c6, 0x00000004 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000e4, 0x00000008 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000eb, 0x00000008 },
- { 0x02c02000, 0x00000004 },
- { 0x00060000, 0x00000004 },
- { 0x000000f3, 0x00000034 },
- { 0x000000f0, 0x00000008 },
- { 0x00008000, 0x00000004 },
- { 0xc000e000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x001d0018, 0x00000004 },
- { 0x001a0001, 0x00000004 },
- { 0x000000fb, 0x00000034 },
- { 0x0000004a, 0x00000008 },
- { 0x0500a04a, 0x00000008 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
-};
-
-static const u32 R420_cp_microcode[][2]={
- { 0x4200e000, 0000000000 },
- { 0x4000e000, 0000000000 },
- { 0x00000099, 0x00000008 },
- { 0x0000009d, 0x00000008 },
- { 0x4a554b4a, 0000000000 },
- { 0x4a4a4467, 0000000000 },
- { 0x55526f75, 0000000000 },
- { 0x4a7e7d65, 0000000000 },
- { 0xd9d3dff6, 0000000000 },
- { 0x4ac54a4a, 0000000000 },
- { 0xc8828282, 0000000000 },
- { 0xbf4acfc1, 0000000000 },
- { 0x87b04a4a, 0000000000 },
- { 0xb5838383, 0000000000 },
- { 0x4a0f85ba, 0000000000 },
- { 0x000ca000, 0x00000004 },
- { 0x000d0012, 0x00000038 },
- { 0x0000e8b4, 0x00000004 },
- { 0x000d0014, 0x00000038 },
- { 0x0000e8b6, 0x00000004 },
- { 0x000d0016, 0x00000038 },
- { 0x0000e854, 0x00000004 },
- { 0x000d0018, 0x00000038 },
- { 0x0000e855, 0x00000004 },
- { 0x000d001a, 0x00000038 },
- { 0x0000e856, 0x00000004 },
- { 0x000d001c, 0x00000038 },
- { 0x0000e857, 0x00000004 },
- { 0x000d001e, 0x00000038 },
- { 0x0000e824, 0x00000004 },
- { 0x000d0020, 0x00000038 },
- { 0x0000e825, 0x00000004 },
- { 0x000d0022, 0x00000038 },
- { 0x0000e830, 0x00000004 },
- { 0x000d0024, 0x00000038 },
- { 0x0000f0c0, 0x00000004 },
- { 0x000d0026, 0x00000038 },
- { 0x0000f0c1, 0x00000004 },
- { 0x000d0028, 0x00000038 },
- { 0x0000f041, 0x00000004 },
- { 0x000d002a, 0x00000038 },
- { 0x0000f184, 0x00000004 },
- { 0x000d002c, 0x00000038 },
- { 0x0000f185, 0x00000004 },
- { 0x000d002e, 0x00000038 },
- { 0x0000f186, 0x00000004 },
- { 0x000d0030, 0x00000038 },
- { 0x0000f187, 0x00000004 },
- { 0x000d0032, 0x00000038 },
- { 0x0000f180, 0x00000004 },
- { 0x000d0034, 0x00000038 },
- { 0x0000f393, 0x00000004 },
- { 0x000d0036, 0x00000038 },
- { 0x0000f38a, 0x00000004 },
- { 0x000d0038, 0x00000038 },
- { 0x0000f38e, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000043, 0x00000018 },
- { 0x00cce800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x0000003a, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x2000451d, 0x00000004 },
- { 0x0000e580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x08004580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x00000047, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x00032000, 0x00000004 },
- { 0x00022051, 0x00000028 },
- { 0x00000051, 0x00000024 },
- { 0x0800450f, 0x00000004 },
- { 0x0000a04b, 0x00000008 },
- { 0x0000e565, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000052, 0x00000008 },
- { 0x03cca5b4, 0x00000004 },
- { 0x05432000, 0x00000004 },
- { 0x00022000, 0x00000004 },
- { 0x4ccce05e, 0x00000030 },
- { 0x08274565, 0x00000004 },
- { 0x0000005e, 0x00000030 },
- { 0x08004564, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000055, 0x00000008 },
- { 0x00802061, 0x00000010 },
- { 0x00202000, 0x00000004 },
- { 0x001b00ff, 0x00000004 },
- { 0x01000064, 0x00000010 },
- { 0x001f2000, 0x00000004 },
- { 0x001c00ff, 0x00000004 },
- { 0000000000, 0x0000000c },
- { 0x00000072, 0x00000030 },
- { 0x00000055, 0x00000008 },
- { 0x0000e576, 0x00000004 },
- { 0x0000e577, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x0000e50f, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000069, 0x00000018 },
- { 0x00c0e5f9, 0x000000c2 },
- { 0x00000069, 0x00000008 },
- { 0x0014e50e, 0x00000004 },
- { 0x0040e50f, 0x00000004 },
- { 0x00c0006c, 0x00000008 },
- { 0x0000e570, 0x00000004 },
- { 0x0000e571, 0x00000004 },
- { 0x0000e572, 0x0000000c },
- { 0x0000a000, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x0000e568, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00000076, 0x00000018 },
- { 0x000b0000, 0x00000004 },
- { 0x18c0e562, 0x00000004 },
- { 0x00000078, 0x00000008 },
- { 0x00c00077, 0x00000008 },
- { 0x000700c7, 0x00000004 },
- { 0x00000080, 0x00000038 },
- { 0x0000e5bb, 0x00000004 },
- { 0x0000e5bc, 0000000000 },
- { 0x0000a000, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e800, 0000000000 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e82e, 0000000000 },
- { 0x02cca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000ce1cc, 0x00000004 },
- { 0x050de1cd, 0x00000004 },
- { 0x00400000, 0x00000004 },
- { 0x0000008f, 0x00000018 },
- { 0x00c0a000, 0x00000004 },
- { 0x0000008c, 0x00000008 },
- { 0x00000091, 0x00000020 },
- { 0x4200e000, 0000000000 },
- { 0x00000098, 0x00000038 },
- { 0x000ca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00160000, 0x00000004 },
- { 0x700ce000, 0x00000004 },
- { 0x00140094, 0x00000008 },
- { 0x4000e000, 0000000000 },
- { 0x02400000, 0x00000004 },
- { 0x400ee000, 0x00000004 },
- { 0x02400000, 0x00000004 },
- { 0x4000e000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x0240e51b, 0x00000004 },
- { 0x0080e50a, 0x00000005 },
- { 0x0080e50b, 0x00000005 },
- { 0x00220000, 0x00000004 },
- { 0x000700c7, 0x00000004 },
- { 0x000000a4, 0x00000038 },
- { 0x0080e5bd, 0x00000005 },
- { 0x0000e5bb, 0x00000005 },
- { 0x0080e5bc, 0x00000005 },
- { 0x00210000, 0x00000004 },
- { 0x02800000, 0x00000004 },
- { 0x00c000ab, 0x00000018 },
- { 0x4180e000, 0x00000040 },
- { 0x000000ad, 0x00000024 },
- { 0x01000000, 0x0000000c },
- { 0x0100e51d, 0x0000000c },
- { 0x000045bb, 0x00000004 },
- { 0x000080a7, 0x00000008 },
- { 0x0000f3ce, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c053cf, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x0000f3d2, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c053d3, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x0000f39d, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c0539e, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x03c00830, 0x00000004 },
- { 0x4200e000, 0000000000 },
- { 0x0000a000, 0x00000004 },
- { 0x200045e0, 0x00000004 },
- { 0x0000e5e1, 0000000000 },
- { 0x00000001, 0000000000 },
- { 0x000700c4, 0x00000004 },
- { 0x0800e394, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x0000e8c4, 0x00000004 },
- { 0x0000e8c5, 0x00000004 },
- { 0x0000e8c6, 0x00000004 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000c8, 0x00000008 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000cf, 0x00000008 },
- { 0x02c02000, 0x00000004 },
- { 0x00060000, 0x00000004 },
- { 0x000000d7, 0x00000034 },
- { 0x000000d4, 0x00000008 },
- { 0x00008000, 0x00000004 },
- { 0xc000e000, 0000000000 },
- { 0x0000e1cc, 0x00000004 },
- { 0x0500e1cd, 0x00000004 },
- { 0x000ca000, 0x00000004 },
- { 0x000000de, 0x00000034 },
- { 0x000000da, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x0019e1cc, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x0500a000, 0x00000004 },
- { 0x080041cd, 0x00000004 },
- { 0x000ca000, 0x00000004 },
- { 0x000000fb, 0x00000034 },
- { 0x0000004a, 0x00000008 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x001d0018, 0x00000004 },
- { 0x001a0001, 0x00000004 },
- { 0x000000fb, 0x00000034 },
- { 0x0000004a, 0x00000008 },
- { 0x0500a04a, 0x00000008 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
-};
-
-static const u32 RS600_cp_microcode[][2]={
- { 0x4200e000, 0000000000 },
- { 0x4000e000, 0000000000 },
- { 0x000000a0, 0x00000008 },
- { 0x000000a4, 0x00000008 },
- { 0x4a554b4a, 0000000000 },
- { 0x4a4a4467, 0000000000 },
- { 0x55526f75, 0000000000 },
- { 0x4a7e7d65, 0000000000 },
- { 0x4ae74af6, 0000000000 },
- { 0x4ad34a4a, 0000000000 },
- { 0xd6898989, 0000000000 },
- { 0xcd4addcf, 0000000000 },
- { 0x8ebe4ae2, 0000000000 },
- { 0xc38a8a8a, 0000000000 },
- { 0x4a0f8cc8, 0000000000 },
- { 0x000ca000, 0x00000004 },
- { 0x000d0012, 0x00000038 },
- { 0x0000e8b4, 0x00000004 },
- { 0x000d0014, 0x00000038 },
- { 0x0000e8b6, 0x00000004 },
- { 0x000d0016, 0x00000038 },
- { 0x0000e854, 0x00000004 },
- { 0x000d0018, 0x00000038 },
- { 0x0000e855, 0x00000004 },
- { 0x000d001a, 0x00000038 },
- { 0x0000e856, 0x00000004 },
- { 0x000d001c, 0x00000038 },
- { 0x0000e857, 0x00000004 },
- { 0x000d001e, 0x00000038 },
- { 0x0000e824, 0x00000004 },
- { 0x000d0020, 0x00000038 },
- { 0x0000e825, 0x00000004 },
- { 0x000d0022, 0x00000038 },
- { 0x0000e830, 0x00000004 },
- { 0x000d0024, 0x00000038 },
- { 0x0000f0c0, 0x00000004 },
- { 0x000d0026, 0x00000038 },
- { 0x0000f0c1, 0x00000004 },
- { 0x000d0028, 0x00000038 },
- { 0x0000f041, 0x00000004 },
- { 0x000d002a, 0x00000038 },
- { 0x0000f184, 0x00000004 },
- { 0x000d002c, 0x00000038 },
- { 0x0000f185, 0x00000004 },
- { 0x000d002e, 0x00000038 },
- { 0x0000f186, 0x00000004 },
- { 0x000d0030, 0x00000038 },
- { 0x0000f187, 0x00000004 },
- { 0x000d0032, 0x00000038 },
- { 0x0000f180, 0x00000004 },
- { 0x000d0034, 0x00000038 },
- { 0x0000f393, 0x00000004 },
- { 0x000d0036, 0x00000038 },
- { 0x0000f38a, 0x00000004 },
- { 0x000d0038, 0x00000038 },
- { 0x0000f38e, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000043, 0x00000018 },
- { 0x00cce800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x0000003a, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x2000451d, 0x00000004 },
- { 0x0000e580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x08004580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x00000047, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x00032000, 0x00000004 },
- { 0x00022051, 0x00000028 },
- { 0x00000051, 0x00000024 },
- { 0x0800450f, 0x00000004 },
- { 0x0000a04b, 0x00000008 },
- { 0x0000e565, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000052, 0x00000008 },
- { 0x03cca5b4, 0x00000004 },
- { 0x05432000, 0x00000004 },
- { 0x00022000, 0x00000004 },
- { 0x4ccce05e, 0x00000030 },
- { 0x08274565, 0x00000004 },
- { 0x0000005e, 0x00000030 },
- { 0x08004564, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000055, 0x00000008 },
- { 0x00802061, 0x00000010 },
- { 0x00202000, 0x00000004 },
- { 0x001b00ff, 0x00000004 },
- { 0x01000064, 0x00000010 },
- { 0x001f2000, 0x00000004 },
- { 0x001c00ff, 0x00000004 },
- { 0000000000, 0x0000000c },
- { 0x00000072, 0x00000030 },
- { 0x00000055, 0x00000008 },
- { 0x0000e576, 0x00000004 },
- { 0x0000e577, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x0000e50f, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000069, 0x00000018 },
- { 0x00c0e5f9, 0x000000c2 },
- { 0x00000069, 0x00000008 },
- { 0x0014e50e, 0x00000004 },
- { 0x0040e50f, 0x00000004 },
- { 0x00c0006c, 0x00000008 },
- { 0x0000e570, 0x00000004 },
- { 0x0000e571, 0x00000004 },
- { 0x0000e572, 0x0000000c },
- { 0x0000a000, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x0000e568, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00000076, 0x00000018 },
- { 0x000b0000, 0x00000004 },
- { 0x18c0e562, 0x00000004 },
- { 0x00000078, 0x00000008 },
- { 0x00c00077, 0x00000008 },
- { 0x000700d5, 0x00000004 },
- { 0x00000084, 0x00000038 },
- { 0x000ca086, 0x00000030 },
- { 0x080045bb, 0x00000004 },
- { 0x000c2087, 0x00000030 },
- { 0x0800e5bc, 0000000000 },
- { 0x0000e5bb, 0x00000004 },
- { 0x0000e5bc, 0000000000 },
- { 0x00120000, 0x0000000c },
- { 0x00120000, 0x00000004 },
- { 0x001b0002, 0x0000000c },
- { 0x0000a000, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e800, 0000000000 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e82e, 0000000000 },
- { 0x02cca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000ce1cc, 0x00000004 },
- { 0x050de1cd, 0x00000004 },
- { 0x00400000, 0x00000004 },
- { 0x00000096, 0x00000018 },
- { 0x00c0a000, 0x00000004 },
- { 0x00000093, 0x00000008 },
- { 0x00000098, 0x00000020 },
- { 0x4200e000, 0000000000 },
- { 0x0000009f, 0x00000038 },
- { 0x000ca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00160000, 0x00000004 },
- { 0x700ce000, 0x00000004 },
- { 0x0014009b, 0x00000008 },
- { 0x4000e000, 0000000000 },
- { 0x02400000, 0x00000004 },
- { 0x400ee000, 0x00000004 },
- { 0x02400000, 0x00000004 },
- { 0x4000e000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x0240e51b, 0x00000004 },
- { 0x0080e50a, 0x00000005 },
- { 0x0080e50b, 0x00000005 },
- { 0x00220000, 0x00000004 },
- { 0x000700d5, 0x00000004 },
- { 0x000000b2, 0x00000038 },
- { 0x000c2087, 0x00000030 },
- { 0x0880e5bd, 0x00000005 },
- { 0x000c2086, 0x00000030 },
- { 0x0800e5bb, 0x00000005 },
- { 0x000c2087, 0x00000030 },
- { 0x0880e5bc, 0x00000005 },
- { 0x000000b5, 0x00000008 },
- { 0x0080e5bd, 0x00000005 },
- { 0x0000e5bb, 0x00000005 },
- { 0x0080e5bc, 0x00000005 },
- { 0x00210000, 0x00000004 },
- { 0x02800000, 0x00000004 },
- { 0x00c000b9, 0x00000018 },
- { 0x4180e000, 0x00000040 },
- { 0x000000bb, 0x00000024 },
- { 0x01000000, 0x0000000c },
- { 0x0100e51d, 0x0000000c },
- { 0x000045bb, 0x00000004 },
- { 0x000080b5, 0x00000008 },
- { 0x0000f3ce, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c053cf, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x0000f3d2, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c053d3, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x0000f39d, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c0539e, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x03c00830, 0x00000004 },
- { 0x4200e000, 0000000000 },
- { 0x0000a000, 0x00000004 },
- { 0x200045e0, 0x00000004 },
- { 0x0000e5e1, 0000000000 },
- { 0x00000001, 0000000000 },
- { 0x000700d2, 0x00000004 },
- { 0x0800e394, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x0000e8c4, 0x00000004 },
- { 0x0000e8c5, 0x00000004 },
- { 0x0000e8c6, 0x00000004 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000d6, 0x00000008 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000dd, 0x00000008 },
- { 0x00e00116, 0000000000 },
- { 0x000700e1, 0x00000004 },
- { 0x0800401c, 0x00000004 },
- { 0x200050e7, 0x00000004 },
- { 0x0000e01d, 0x00000004 },
- { 0x000000e4, 0x00000008 },
- { 0x02c02000, 0x00000004 },
- { 0x00060000, 0x00000004 },
- { 0x000000eb, 0x00000034 },
- { 0x000000e8, 0x00000008 },
- { 0x00008000, 0x00000004 },
- { 0xc000e000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x001d0018, 0x00000004 },
- { 0x001a0001, 0x00000004 },
- { 0x000000fb, 0x00000034 },
- { 0x0000004a, 0x00000008 },
- { 0x0500a04a, 0x00000008 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
-};
-
-static const u32 RS690_cp_microcode[][2]={
- { 0x000000dd, 0x00000008 },
- { 0x000000df, 0x00000008 },
- { 0x000000a0, 0x00000008 },
- { 0x000000a4, 0x00000008 },
- { 0x4a554b4a, 0000000000 },
- { 0x4a4a4467, 0000000000 },
- { 0x55526f75, 0000000000 },
- { 0x4a7e7d65, 0000000000 },
- { 0x4ad74af6, 0000000000 },
- { 0x4ac94a4a, 0000000000 },
- { 0xcc898989, 0000000000 },
- { 0xc34ad3c5, 0000000000 },
- { 0x8e4a4a4a, 0000000000 },
- { 0x4a8a8a8a, 0000000000 },
- { 0x4a0f8c4a, 0000000000 },
- { 0x000ca000, 0x00000004 },
- { 0x000d0012, 0x00000038 },
- { 0x0000e8b4, 0x00000004 },
- { 0x000d0014, 0x00000038 },
- { 0x0000e8b6, 0x00000004 },
- { 0x000d0016, 0x00000038 },
- { 0x0000e854, 0x00000004 },
- { 0x000d0018, 0x00000038 },
- { 0x0000e855, 0x00000004 },
- { 0x000d001a, 0x00000038 },
- { 0x0000e856, 0x00000004 },
- { 0x000d001c, 0x00000038 },
- { 0x0000e857, 0x00000004 },
- { 0x000d001e, 0x00000038 },
- { 0x0000e824, 0x00000004 },
- { 0x000d0020, 0x00000038 },
- { 0x0000e825, 0x00000004 },
- { 0x000d0022, 0x00000038 },
- { 0x0000e830, 0x00000004 },
- { 0x000d0024, 0x00000038 },
- { 0x0000f0c0, 0x00000004 },
- { 0x000d0026, 0x00000038 },
- { 0x0000f0c1, 0x00000004 },
- { 0x000d0028, 0x00000038 },
- { 0x0000f041, 0x00000004 },
- { 0x000d002a, 0x00000038 },
- { 0x0000f184, 0x00000004 },
- { 0x000d002c, 0x00000038 },
- { 0x0000f185, 0x00000004 },
- { 0x000d002e, 0x00000038 },
- { 0x0000f186, 0x00000004 },
- { 0x000d0030, 0x00000038 },
- { 0x0000f187, 0x00000004 },
- { 0x000d0032, 0x00000038 },
- { 0x0000f180, 0x00000004 },
- { 0x000d0034, 0x00000038 },
- { 0x0000f393, 0x00000004 },
- { 0x000d0036, 0x00000038 },
- { 0x0000f38a, 0x00000004 },
- { 0x000d0038, 0x00000038 },
- { 0x0000f38e, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000043, 0x00000018 },
- { 0x00cce800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x0000003a, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x2000451d, 0x00000004 },
- { 0x0000e580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x08004580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x00000047, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x00032000, 0x00000004 },
- { 0x00022051, 0x00000028 },
- { 0x00000051, 0x00000024 },
- { 0x0800450f, 0x00000004 },
- { 0x0000a04b, 0x00000008 },
- { 0x0000e565, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000052, 0x00000008 },
- { 0x03cca5b4, 0x00000004 },
- { 0x05432000, 0x00000004 },
- { 0x00022000, 0x00000004 },
- { 0x4ccce05e, 0x00000030 },
- { 0x08274565, 0x00000004 },
- { 0x0000005e, 0x00000030 },
- { 0x08004564, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000055, 0x00000008 },
- { 0x00802061, 0x00000010 },
- { 0x00202000, 0x00000004 },
- { 0x001b00ff, 0x00000004 },
- { 0x01000064, 0x00000010 },
- { 0x001f2000, 0x00000004 },
- { 0x001c00ff, 0x00000004 },
- { 0000000000, 0x0000000c },
- { 0x00000072, 0x00000030 },
- { 0x00000055, 0x00000008 },
- { 0x0000e576, 0x00000004 },
- { 0x0000e577, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x0000e50f, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000069, 0x00000018 },
- { 0x00c0e5f9, 0x000000c2 },
- { 0x00000069, 0x00000008 },
- { 0x0014e50e, 0x00000004 },
- { 0x0040e50f, 0x00000004 },
- { 0x00c0006c, 0x00000008 },
- { 0x0000e570, 0x00000004 },
- { 0x0000e571, 0x00000004 },
- { 0x0000e572, 0x0000000c },
- { 0x0000a000, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x0000e568, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00000076, 0x00000018 },
- { 0x000b0000, 0x00000004 },
- { 0x18c0e562, 0x00000004 },
- { 0x00000078, 0x00000008 },
- { 0x00c00077, 0x00000008 },
- { 0x000700cb, 0x00000004 },
- { 0x00000084, 0x00000038 },
- { 0x000ca086, 0x00000030 },
- { 0x080045bb, 0x00000004 },
- { 0x000c2087, 0x00000030 },
- { 0x0800e5bc, 0000000000 },
- { 0x0000e5bb, 0x00000004 },
- { 0x0000e5bc, 0000000000 },
- { 0x00120000, 0x0000000c },
- { 0x00120000, 0x00000004 },
- { 0x001b0002, 0x0000000c },
- { 0x0000a000, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e800, 0000000000 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e82e, 0000000000 },
- { 0x02cca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000ce1cc, 0x00000004 },
- { 0x050de1cd, 0x00000004 },
- { 0x00400000, 0x00000004 },
- { 0x00000096, 0x00000018 },
- { 0x00c0a000, 0x00000004 },
- { 0x00000093, 0x00000008 },
- { 0x00000098, 0x00000020 },
- { 0x4200e000, 0000000000 },
- { 0x0000009f, 0x00000038 },
- { 0x000ca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00160000, 0x00000004 },
- { 0x700ce000, 0x00000004 },
- { 0x0014009b, 0x00000008 },
- { 0x4000e000, 0000000000 },
- { 0x02400000, 0x00000004 },
- { 0x400ee000, 0x00000004 },
- { 0x02400000, 0x00000004 },
- { 0x4000e000, 0000000000 },
- { 0x00100000, 0x0000002c },
- { 0x00004000, 0000000000 },
- { 0x080045c8, 0x00000004 },
- { 0x00240005, 0x00000004 },
- { 0x08004d0b, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x0240e51b, 0x00000004 },
- { 0x0080e50a, 0x00000005 },
- { 0x0080e50b, 0x00000005 },
- { 0x00220000, 0x00000004 },
- { 0x000700cb, 0x00000004 },
- { 0x000000b7, 0x00000038 },
- { 0x000c2087, 0x00000030 },
- { 0x0880e5bd, 0x00000005 },
- { 0x000c2086, 0x00000030 },
- { 0x0800e5bb, 0x00000005 },
- { 0x000c2087, 0x00000030 },
- { 0x0880e5bc, 0x00000005 },
- { 0x000000ba, 0x00000008 },
- { 0x0080e5bd, 0x00000005 },
- { 0x0000e5bb, 0x00000005 },
- { 0x0080e5bc, 0x00000005 },
- { 0x00210000, 0x00000004 },
- { 0x02800000, 0x00000004 },
- { 0x00c000be, 0x00000018 },
- { 0x4180e000, 0x00000040 },
- { 0x000000c0, 0x00000024 },
- { 0x01000000, 0x0000000c },
- { 0x0100e51d, 0x0000000c },
- { 0x000045bb, 0x00000004 },
- { 0x000080ba, 0x00000008 },
- { 0x03c00830, 0x00000004 },
- { 0x4200e000, 0000000000 },
- { 0x0000a000, 0x00000004 },
- { 0x200045e0, 0x00000004 },
- { 0x0000e5e1, 0000000000 },
- { 0x00000001, 0000000000 },
- { 0x000700c8, 0x00000004 },
- { 0x0800e394, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x0000e8c4, 0x00000004 },
- { 0x0000e8c5, 0x00000004 },
- { 0x0000e8c6, 0x00000004 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000cc, 0x00000008 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000d3, 0x00000008 },
- { 0x02c02000, 0x00000004 },
- { 0x00060000, 0x00000004 },
- { 0x000000db, 0x00000034 },
- { 0x000000d8, 0x00000008 },
- { 0x00008000, 0x00000004 },
- { 0xc000e000, 0000000000 },
- { 0x000000e1, 0x00000030 },
- { 0x4200e000, 0000000000 },
- { 0x000000e1, 0x00000030 },
- { 0x4000e000, 0000000000 },
- { 0x0025001b, 0x00000004 },
- { 0x00230000, 0x00000004 },
- { 0x00250005, 0x00000004 },
- { 0x000000e6, 0x00000034 },
- { 0000000000, 0x0000000c },
- { 0x00244000, 0x00000004 },
- { 0x080045c8, 0x00000004 },
- { 0x00240005, 0x00000004 },
- { 0x08004d0b, 0x0000000c },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x001d0018, 0x00000004 },
- { 0x001a0001, 0x00000004 },
- { 0x000000fb, 0x00000034 },
- { 0x0000004a, 0x00000008 },
- { 0x0500a04a, 0x00000008 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
-};
-
-static const u32 R520_cp_microcode[][2]={
- { 0x4200e000, 0000000000 },
- { 0x4000e000, 0000000000 },
- { 0x00000099, 0x00000008 },
- { 0x0000009d, 0x00000008 },
- { 0x4a554b4a, 0000000000 },
- { 0x4a4a4467, 0000000000 },
- { 0x55526f75, 0000000000 },
- { 0x4a7e7d65, 0000000000 },
- { 0xe0dae6f6, 0000000000 },
- { 0x4ac54a4a, 0000000000 },
- { 0xc8828282, 0000000000 },
- { 0xbf4acfc1, 0000000000 },
- { 0x87b04ad5, 0000000000 },
- { 0xb5838383, 0000000000 },
- { 0x4a0f85ba, 0000000000 },
- { 0x000ca000, 0x00000004 },
- { 0x000d0012, 0x00000038 },
- { 0x0000e8b4, 0x00000004 },
- { 0x000d0014, 0x00000038 },
- { 0x0000e8b6, 0x00000004 },
- { 0x000d0016, 0x00000038 },
- { 0x0000e854, 0x00000004 },
- { 0x000d0018, 0x00000038 },
- { 0x0000e855, 0x00000004 },
- { 0x000d001a, 0x00000038 },
- { 0x0000e856, 0x00000004 },
- { 0x000d001c, 0x00000038 },
- { 0x0000e857, 0x00000004 },
- { 0x000d001e, 0x00000038 },
- { 0x0000e824, 0x00000004 },
- { 0x000d0020, 0x00000038 },
- { 0x0000e825, 0x00000004 },
- { 0x000d0022, 0x00000038 },
- { 0x0000e830, 0x00000004 },
- { 0x000d0024, 0x00000038 },
- { 0x0000f0c0, 0x00000004 },
- { 0x000d0026, 0x00000038 },
- { 0x0000f0c1, 0x00000004 },
- { 0x000d0028, 0x00000038 },
- { 0x0000e000, 0x00000004 },
- { 0x000d002a, 0x00000038 },
- { 0x0000e000, 0x00000004 },
- { 0x000d002c, 0x00000038 },
- { 0x0000e000, 0x00000004 },
- { 0x000d002e, 0x00000038 },
- { 0x0000e000, 0x00000004 },
- { 0x000d0030, 0x00000038 },
- { 0x0000e000, 0x00000004 },
- { 0x000d0032, 0x00000038 },
- { 0x0000f180, 0x00000004 },
- { 0x000d0034, 0x00000038 },
- { 0x0000f393, 0x00000004 },
- { 0x000d0036, 0x00000038 },
- { 0x0000f38a, 0x00000004 },
- { 0x000d0038, 0x00000038 },
- { 0x0000f38e, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000043, 0x00000018 },
- { 0x00cce800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x08004800, 0x00000004 },
- { 0x0000003a, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x2000451d, 0x00000004 },
- { 0x0000e580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x08004580, 0x00000004 },
- { 0x000ce581, 0x00000004 },
- { 0x00000047, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x00032000, 0x00000004 },
- { 0x00022051, 0x00000028 },
- { 0x00000051, 0x00000024 },
- { 0x0800450f, 0x00000004 },
- { 0x0000a04b, 0x00000008 },
- { 0x0000e565, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000052, 0x00000008 },
- { 0x03cca5b4, 0x00000004 },
- { 0x05432000, 0x00000004 },
- { 0x00022000, 0x00000004 },
- { 0x4ccce05e, 0x00000030 },
- { 0x08274565, 0x00000004 },
- { 0x0000005e, 0x00000030 },
- { 0x08004564, 0x00000004 },
- { 0x0000e566, 0x00000004 },
- { 0x00000055, 0x00000008 },
- { 0x00802061, 0x00000010 },
- { 0x00202000, 0x00000004 },
- { 0x001b00ff, 0x00000004 },
- { 0x01000064, 0x00000010 },
- { 0x001f2000, 0x00000004 },
- { 0x001c00ff, 0x00000004 },
- { 0000000000, 0x0000000c },
- { 0x00000072, 0x00000030 },
- { 0x00000055, 0x00000008 },
- { 0x0000e576, 0x00000004 },
- { 0x0000e577, 0x00000004 },
- { 0x0000e50e, 0x00000004 },
- { 0x0000e50f, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00000069, 0x00000018 },
- { 0x00c0e5f9, 0x000000c2 },
- { 0x00000069, 0x00000008 },
- { 0x0014e50e, 0x00000004 },
- { 0x0040e50f, 0x00000004 },
- { 0x00c0006c, 0x00000008 },
- { 0x0000e570, 0x00000004 },
- { 0x0000e571, 0x00000004 },
- { 0x0000e572, 0x0000000c },
- { 0x0000a000, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x0000e568, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00000076, 0x00000018 },
- { 0x000b0000, 0x00000004 },
- { 0x18c0e562, 0x00000004 },
- { 0x00000078, 0x00000008 },
- { 0x00c00077, 0x00000008 },
- { 0x000700c7, 0x00000004 },
- { 0x00000080, 0x00000038 },
- { 0x0000e5bb, 0x00000004 },
- { 0x0000e5bc, 0000000000 },
- { 0x0000a000, 0x00000004 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e800, 0000000000 },
- { 0x0000e821, 0x00000004 },
- { 0x0000e82e, 0000000000 },
- { 0x02cca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000ce1cc, 0x00000004 },
- { 0x050de1cd, 0x00000004 },
- { 0x00400000, 0x00000004 },
- { 0x0000008f, 0x00000018 },
- { 0x00c0a000, 0x00000004 },
- { 0x0000008c, 0x00000008 },
- { 0x00000091, 0x00000020 },
- { 0x4200e000, 0000000000 },
- { 0x00000098, 0x00000038 },
- { 0x000ca000, 0x00000004 },
- { 0x00140000, 0x00000004 },
- { 0x000c2000, 0x00000004 },
- { 0x00160000, 0x00000004 },
- { 0x700ce000, 0x00000004 },
- { 0x00140094, 0x00000008 },
- { 0x4000e000, 0000000000 },
- { 0x02400000, 0x00000004 },
- { 0x400ee000, 0x00000004 },
- { 0x02400000, 0x00000004 },
- { 0x4000e000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x0240e51b, 0x00000004 },
- { 0x0080e50a, 0x00000005 },
- { 0x0080e50b, 0x00000005 },
- { 0x00220000, 0x00000004 },
- { 0x000700c7, 0x00000004 },
- { 0x000000a4, 0x00000038 },
- { 0x0080e5bd, 0x00000005 },
- { 0x0000e5bb, 0x00000005 },
- { 0x0080e5bc, 0x00000005 },
- { 0x00210000, 0x00000004 },
- { 0x02800000, 0x00000004 },
- { 0x00c000ab, 0x00000018 },
- { 0x4180e000, 0x00000040 },
- { 0x000000ad, 0x00000024 },
- { 0x01000000, 0x0000000c },
- { 0x0100e51d, 0x0000000c },
- { 0x000045bb, 0x00000004 },
- { 0x000080a7, 0x00000008 },
- { 0x0000f3ce, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c053cf, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x0000f3d2, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c053d3, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x0000f39d, 0x00000004 },
- { 0x0140a000, 0x00000004 },
- { 0x00cc2000, 0x00000004 },
- { 0x08c0539e, 0x00000040 },
- { 0x00008000, 0000000000 },
- { 0x03c00830, 0x00000004 },
- { 0x4200e000, 0000000000 },
- { 0x0000a000, 0x00000004 },
- { 0x200045e0, 0x00000004 },
- { 0x0000e5e1, 0000000000 },
- { 0x00000001, 0000000000 },
- { 0x000700c4, 0x00000004 },
- { 0x0800e394, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x0000e8c4, 0x00000004 },
- { 0x0000e8c5, 0x00000004 },
- { 0x0000e8c6, 0x00000004 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000c8, 0x00000008 },
- { 0x0000e928, 0x00000004 },
- { 0x0000e929, 0x00000004 },
- { 0x0000e92a, 0x00000004 },
- { 0x000000cf, 0x00000008 },
- { 0xdeadbeef, 0000000000 },
- { 0x00000116, 0000000000 },
- { 0x000700d3, 0x00000004 },
- { 0x080050e7, 0x00000004 },
- { 0x000700d4, 0x00000004 },
- { 0x0800401c, 0x00000004 },
- { 0x0000e01d, 0000000000 },
- { 0x02c02000, 0x00000004 },
- { 0x00060000, 0x00000004 },
- { 0x000000de, 0x00000034 },
- { 0x000000db, 0x00000008 },
- { 0x00008000, 0x00000004 },
- { 0xc000e000, 0000000000 },
- { 0x0000e1cc, 0x00000004 },
- { 0x0500e1cd, 0x00000004 },
- { 0x000ca000, 0x00000004 },
- { 0x000000e5, 0x00000034 },
- { 0x000000e1, 0x00000008 },
- { 0x0000a000, 0000000000 },
- { 0x0019e1cc, 0x00000004 },
- { 0x001b0001, 0x00000004 },
- { 0x0500a000, 0x00000004 },
- { 0x080041cd, 0x00000004 },
- { 0x000ca000, 0x00000004 },
- { 0x000000fb, 0x00000034 },
- { 0x0000004a, 0x00000008 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0x000c2000, 0x00000004 },
- { 0x001d0018, 0x00000004 },
- { 0x001a0001, 0x00000004 },
- { 0x000000fb, 0x00000034 },
- { 0x0000004a, 0x00000008 },
- { 0x0500a04a, 0x00000008 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
- { 0000000000, 0000000000 },
-};
-
-
-#endif
+++ /dev/null
-/* radeon_state.c -- State support for Radeon -*- linux-c -*- */
-/*
- * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "drm_sarea.h"
-#include "radeon_drm.h"
-#include "radeon_drv.h"
-
-/* ================================================================
- * Helper functions for client state checking and fixup
- */
-
-static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t *
- dev_priv,
- struct drm_file *file_priv,
- u32 * offset)
-{
- u64 off = *offset;
- u32 fb_end = dev_priv->fb_location + dev_priv->fb_size - 1;
- struct drm_radeon_driver_file_fields *radeon_priv;
-
- /* Hrm ... the story of the offset ... So this function converts
- * the various ideas of what userland clients might have for an
- * offset in the card address space into an offset into the card
- * address space :) So with a sane client, it should just keep
- * the value intact and just do some boundary checking. However,
- * not all clients are sane. Some older clients pass us 0 based
- * offsets relative to the start of the framebuffer and some may
- * assume the AGP aperture it appended to the framebuffer, so we
- * try to detect those cases and fix them up.
- *
- * Note: It might be a good idea here to make sure the offset lands
- * in some "allowed" area to protect things like the PCIE GART...
- */
-
- /* First, the best case, the offset already lands in either the
- * framebuffer or the GART mapped space
- */
- if (radeon_check_offset(dev_priv, off))
- return 0;
-
- /* Ok, that didn't happen... now check if we have a zero based
- * offset that fits in the framebuffer + gart space, apply the
- * magic offset we get from SETPARAM or calculated from fb_location
- */
- if (off < (dev_priv->fb_size + dev_priv->gart_size)) {
- radeon_priv = file_priv->driver_priv;
- off += radeon_priv->radeon_fb_delta;
- }
-
- /* Finally, assume we aimed at a GART offset if beyond the fb */
- if (off > fb_end)
- off = off - fb_end - 1 + dev_priv->gart_vm_start;
-
- /* Now recheck and fail if out of bounds */
- if (radeon_check_offset(dev_priv, off)) {
- DRM_DEBUG("offset fixed up to 0x%x\n", (unsigned int)off);
- *offset = off;
- return 0;
- }
- return -EINVAL;
-}
-
-static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
- dev_priv,
- struct drm_file *file_priv,
- int id, u32 *data)
-{
- switch (id) {
-
- case RADEON_EMIT_PP_MISC:
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &data[(RADEON_RB3D_DEPTHOFFSET - RADEON_PP_MISC) / 4])) {
- DRM_ERROR("Invalid depth buffer offset\n");
- return -EINVAL;
- }
- break;
-
- case RADEON_EMIT_PP_CNTL:
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &data[(RADEON_RB3D_COLOROFFSET - RADEON_PP_CNTL) / 4])) {
- DRM_ERROR("Invalid colour buffer offset\n");
- return -EINVAL;
- }
- break;
-
- case R200_EMIT_PP_TXOFFSET_0:
- case R200_EMIT_PP_TXOFFSET_1:
- case R200_EMIT_PP_TXOFFSET_2:
- case R200_EMIT_PP_TXOFFSET_3:
- case R200_EMIT_PP_TXOFFSET_4:
- case R200_EMIT_PP_TXOFFSET_5:
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &data[0])) {
- DRM_ERROR("Invalid R200 texture offset\n");
- return -EINVAL;
- }
- break;
-
- case RADEON_EMIT_PP_TXFILTER_0:
- case RADEON_EMIT_PP_TXFILTER_1:
- case RADEON_EMIT_PP_TXFILTER_2:
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &data[(RADEON_PP_TXOFFSET_0 - RADEON_PP_TXFILTER_0) / 4])) {
- DRM_ERROR("Invalid R100 texture offset\n");
- return -EINVAL;
- }
- break;
-
- case R200_EMIT_PP_CUBIC_OFFSETS_0:
- case R200_EMIT_PP_CUBIC_OFFSETS_1:
- case R200_EMIT_PP_CUBIC_OFFSETS_2:
- case R200_EMIT_PP_CUBIC_OFFSETS_3:
- case R200_EMIT_PP_CUBIC_OFFSETS_4:
- case R200_EMIT_PP_CUBIC_OFFSETS_5:{
- int i;
- for (i = 0; i < 5; i++) {
- if (radeon_check_and_fixup_offset(dev_priv,
- file_priv,
- &data[i])) {
- DRM_ERROR
- ("Invalid R200 cubic texture offset\n");
- return -EINVAL;
- }
- }
- break;
- }
-
- case RADEON_EMIT_PP_CUBIC_OFFSETS_T0:
- case RADEON_EMIT_PP_CUBIC_OFFSETS_T1:
- case RADEON_EMIT_PP_CUBIC_OFFSETS_T2:{
- int i;
- for (i = 0; i < 5; i++) {
- if (radeon_check_and_fixup_offset(dev_priv,
- file_priv,
- &data[i])) {
- DRM_ERROR
- ("Invalid R100 cubic texture offset\n");
- return -EINVAL;
- }
- }
- }
- break;
-
- case R200_EMIT_VAP_CTL: {
- RING_LOCALS;
- BEGIN_RING(2);
- OUT_RING_REG(RADEON_SE_TCL_STATE_FLUSH, 0);
- ADVANCE_RING();
- }
- break;
-
- case RADEON_EMIT_RB3D_COLORPITCH:
- case RADEON_EMIT_RE_LINE_PATTERN:
- case RADEON_EMIT_SE_LINE_WIDTH:
- case RADEON_EMIT_PP_LUM_MATRIX:
- case RADEON_EMIT_PP_ROT_MATRIX_0:
- case RADEON_EMIT_RB3D_STENCILREFMASK:
- case RADEON_EMIT_SE_VPORT_XSCALE:
- case RADEON_EMIT_SE_CNTL:
- case RADEON_EMIT_SE_CNTL_STATUS:
- case RADEON_EMIT_RE_MISC:
- case RADEON_EMIT_PP_BORDER_COLOR_0:
- case RADEON_EMIT_PP_BORDER_COLOR_1:
- case RADEON_EMIT_PP_BORDER_COLOR_2:
- case RADEON_EMIT_SE_ZBIAS_FACTOR:
- case RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT:
- case RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED:
- case R200_EMIT_PP_TXCBLEND_0:
- case R200_EMIT_PP_TXCBLEND_1:
- case R200_EMIT_PP_TXCBLEND_2:
- case R200_EMIT_PP_TXCBLEND_3:
- case R200_EMIT_PP_TXCBLEND_4:
- case R200_EMIT_PP_TXCBLEND_5:
- case R200_EMIT_PP_TXCBLEND_6:
- case R200_EMIT_PP_TXCBLEND_7:
- case R200_EMIT_TCL_LIGHT_MODEL_CTL_0:
- case R200_EMIT_TFACTOR_0:
- case R200_EMIT_VTX_FMT_0:
- case R200_EMIT_MATRIX_SELECT_0:
- case R200_EMIT_TEX_PROC_CTL_2:
- case R200_EMIT_TCL_UCP_VERT_BLEND_CTL:
- case R200_EMIT_PP_TXFILTER_0:
- case R200_EMIT_PP_TXFILTER_1:
- case R200_EMIT_PP_TXFILTER_2:
- case R200_EMIT_PP_TXFILTER_3:
- case R200_EMIT_PP_TXFILTER_4:
- case R200_EMIT_PP_TXFILTER_5:
- case R200_EMIT_VTE_CNTL:
- case R200_EMIT_OUTPUT_VTX_COMP_SEL:
- case R200_EMIT_PP_TAM_DEBUG3:
- case R200_EMIT_PP_CNTL_X:
- case R200_EMIT_RB3D_DEPTHXY_OFFSET:
- case R200_EMIT_RE_AUX_SCISSOR_CNTL:
- case R200_EMIT_RE_SCISSOR_TL_0:
- case R200_EMIT_RE_SCISSOR_TL_1:
- case R200_EMIT_RE_SCISSOR_TL_2:
- case R200_EMIT_SE_VAP_CNTL_STATUS:
- case R200_EMIT_SE_VTX_STATE_CNTL:
- case R200_EMIT_RE_POINTSIZE:
- case R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0:
- case R200_EMIT_PP_CUBIC_FACES_0:
- case R200_EMIT_PP_CUBIC_FACES_1:
- case R200_EMIT_PP_CUBIC_FACES_2:
- case R200_EMIT_PP_CUBIC_FACES_3:
- case R200_EMIT_PP_CUBIC_FACES_4:
- case R200_EMIT_PP_CUBIC_FACES_5:
- case RADEON_EMIT_PP_TEX_SIZE_0:
- case RADEON_EMIT_PP_TEX_SIZE_1:
- case RADEON_EMIT_PP_TEX_SIZE_2:
- case R200_EMIT_RB3D_BLENDCOLOR:
- case R200_EMIT_TCL_POINT_SPRITE_CNTL:
- case RADEON_EMIT_PP_CUBIC_FACES_0:
- case RADEON_EMIT_PP_CUBIC_FACES_1:
- case RADEON_EMIT_PP_CUBIC_FACES_2:
- case R200_EMIT_PP_TRI_PERF_CNTL:
- case R200_EMIT_PP_AFS_0:
- case R200_EMIT_PP_AFS_1:
- case R200_EMIT_ATF_TFACTOR:
- case R200_EMIT_PP_TXCTLALL_0:
- case R200_EMIT_PP_TXCTLALL_1:
- case R200_EMIT_PP_TXCTLALL_2:
- case R200_EMIT_PP_TXCTLALL_3:
- case R200_EMIT_PP_TXCTLALL_4:
- case R200_EMIT_PP_TXCTLALL_5:
- case R200_EMIT_VAP_PVS_CNTL:
- /* These packets don't contain memory offsets */
- break;
-
- default:
- DRM_ERROR("Unknown state packet ID %d\n", id);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static __inline__ int radeon_check_and_fixup_packet3(drm_radeon_private_t *
- dev_priv,
- struct drm_file *file_priv,
- drm_radeon_kcmd_buffer_t *
- cmdbuf,
- unsigned int *cmdsz)
-{
- u32 *cmd = (u32 *) cmdbuf->buf;
- u32 offset, narrays;
- int count, i, k;
-
- *cmdsz = 2 + ((cmd[0] & RADEON_CP_PACKET_COUNT_MASK) >> 16);
-
- if ((cmd[0] & 0xc0000000) != RADEON_CP_PACKET3) {
- DRM_ERROR("Not a type 3 packet\n");
- return -EINVAL;
- }
-
- if (4 * *cmdsz > cmdbuf->bufsz) {
- DRM_ERROR("Packet size larger than size of data provided\n");
- return -EINVAL;
- }
-
- switch(cmd[0] & 0xff00) {
- /* XXX Are there old drivers needing other packets? */
-
- case RADEON_3D_DRAW_IMMD:
- case RADEON_3D_DRAW_VBUF:
- case RADEON_3D_DRAW_INDX:
- case RADEON_WAIT_FOR_IDLE:
- case RADEON_CP_NOP:
- case RADEON_3D_CLEAR_ZMASK:
-/* case RADEON_CP_NEXT_CHAR:
- case RADEON_CP_PLY_NEXTSCAN:
- case RADEON_CP_SET_SCISSORS: */ /* probably safe but will never need them? */
- /* these packets are safe */
- break;
-
- case RADEON_CP_3D_DRAW_IMMD_2:
- case RADEON_CP_3D_DRAW_VBUF_2:
- case RADEON_CP_3D_DRAW_INDX_2:
- case RADEON_3D_CLEAR_HIZ:
- /* safe but r200 only */
- if ((dev_priv->chip_family < CHIP_R200) ||
- (dev_priv->chip_family > CHIP_RV280)) {
- DRM_ERROR("Invalid 3d packet for non r200-class chip\n");
- return -EINVAL;
- }
- break;
-
- case RADEON_3D_LOAD_VBPNTR:
- count = (cmd[0] >> 16) & 0x3fff;
-
- if (count > 18) { /* 12 arrays max */
- DRM_ERROR("Too large payload in 3D_LOAD_VBPNTR (count=%d)\n",
- count);
- return -EINVAL;
- }
-
- /* carefully check packet contents */
- narrays = cmd[1] & ~0xc000;
- k = 0;
- i = 2;
- while ((k < narrays) && (i < (count + 2))) {
- i++; /* skip attribute field */
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &cmd[i])) {
- DRM_ERROR
- ("Invalid offset (k=%d i=%d) in 3D_LOAD_VBPNTR packet.\n",
- k, i);
- return -EINVAL;
- }
- k++;
- i++;
- if (k == narrays)
- break;
- /* have one more to process, they come in pairs */
- if (radeon_check_and_fixup_offset(dev_priv,
- file_priv, &cmd[i]))
- {
- DRM_ERROR
- ("Invalid offset (k=%d i=%d) in 3D_LOAD_VBPNTR packet.\n",
- k, i);
- return -EINVAL;
- }
- k++;
- i++;
- }
- /* do the counts match what we expect ? */
- if ((k != narrays) || (i != (count + 2))) {
- DRM_ERROR
- ("Malformed 3D_LOAD_VBPNTR packet (k=%d i=%d narrays=%d count+1=%d).\n",
- k, i, narrays, count + 1);
- return -EINVAL;
- }
- break;
-
- case RADEON_3D_RNDR_GEN_INDX_PRIM:
- if (dev_priv->chip_family > CHIP_RS200) {
- DRM_ERROR("Invalid 3d packet for non-r100-class chip\n");
- return -EINVAL;
- }
- if (radeon_check_and_fixup_offset(dev_priv, file_priv, &cmd[1])) {
- DRM_ERROR("Invalid rndr_gen_indx offset\n");
- return -EINVAL;
- }
- break;
-
- case RADEON_CP_INDX_BUFFER:
- /* safe but r200 only */
- if ((dev_priv->chip_family < CHIP_R200) ||
- (dev_priv->chip_family > CHIP_RV280)) {
- DRM_ERROR("Invalid 3d packet for non-r200-class chip\n");
- return -EINVAL;
- }
- if ((cmd[1] & 0x8000ffff) != 0x80000810) {
- DRM_ERROR("Invalid indx_buffer reg address %08X\n", cmd[1]);
- return -EINVAL;
- }
- if (radeon_check_and_fixup_offset(dev_priv, file_priv, &cmd[2])) {
- DRM_ERROR("Invalid indx_buffer offset is %08X\n", cmd[2]);
- return -EINVAL;
- }
- break;
-
- case RADEON_CNTL_HOSTDATA_BLT:
- case RADEON_CNTL_PAINT_MULTI:
- case RADEON_CNTL_BITBLT_MULTI:
- /* MSB of opcode: next DWORD GUI_CNTL */
- if (cmd[1] & (RADEON_GMC_SRC_PITCH_OFFSET_CNTL
- | RADEON_GMC_DST_PITCH_OFFSET_CNTL)) {
- offset = cmd[2] << 10;
- if (radeon_check_and_fixup_offset
- (dev_priv, file_priv, &offset)) {
- DRM_ERROR("Invalid first packet offset\n");
- return -EINVAL;
- }
- cmd[2] = (cmd[2] & 0xffc00000) | offset >> 10;
- }
-
- if ((cmd[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL) &&
- (cmd[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL)) {
- offset = cmd[3] << 10;
- if (radeon_check_and_fixup_offset
- (dev_priv, file_priv, &offset)) {
- DRM_ERROR("Invalid second packet offset\n");
- return -EINVAL;
- }
- cmd[3] = (cmd[3] & 0xffc00000) | offset >> 10;
- }
- break;
-
- default:
- DRM_ERROR("Invalid packet type %x\n", cmd[0] & 0xff00);
- return -EINVAL;
- }
-
- return 0;
-}
-
-/* ================================================================
- * CP hardware state programming functions
- */
-
-static __inline__ void radeon_emit_clip_rect(drm_radeon_private_t * dev_priv,
- struct drm_clip_rect * box)
-{
- RING_LOCALS;
-
- DRM_DEBUG(" box: x1=%d y1=%d x2=%d y2=%d\n",
- box->x1, box->y1, box->x2, box->y2);
-
- BEGIN_RING(4);
- OUT_RING(CP_PACKET0(RADEON_RE_TOP_LEFT, 0));
- OUT_RING((box->y1 << 16) | box->x1);
- OUT_RING(CP_PACKET0(RADEON_RE_WIDTH_HEIGHT, 0));
- OUT_RING(((box->y2 - 1) << 16) | (box->x2 - 1));
- ADVANCE_RING();
-}
-
-/* Emit 1.1 state
- */
-static int radeon_emit_state(drm_radeon_private_t * dev_priv,
- struct drm_file *file_priv,
- drm_radeon_context_regs_t * ctx,
- drm_radeon_texture_regs_t * tex,
- unsigned int dirty)
-{
- RING_LOCALS;
- DRM_DEBUG("dirty=0x%08x\n", dirty);
-
- if (dirty & RADEON_UPLOAD_CONTEXT) {
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &ctx->rb3d_depthoffset)) {
- DRM_ERROR("Invalid depth buffer offset\n");
- return -EINVAL;
- }
-
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &ctx->rb3d_coloroffset)) {
- DRM_ERROR("Invalid depth buffer offset\n");
- return -EINVAL;
- }
-
- BEGIN_RING(14);
- OUT_RING(CP_PACKET0(RADEON_PP_MISC, 6));
- OUT_RING(ctx->pp_misc);
- OUT_RING(ctx->pp_fog_color);
- OUT_RING(ctx->re_solid_color);
- OUT_RING(ctx->rb3d_blendcntl);
- OUT_RING(ctx->rb3d_depthoffset);
- OUT_RING(ctx->rb3d_depthpitch);
- OUT_RING(ctx->rb3d_zstencilcntl);
- OUT_RING(CP_PACKET0(RADEON_PP_CNTL, 2));
- OUT_RING(ctx->pp_cntl);
- OUT_RING(ctx->rb3d_cntl);
- OUT_RING(ctx->rb3d_coloroffset);
- OUT_RING(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0));
- OUT_RING(ctx->rb3d_colorpitch);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_VERTFMT) {
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(RADEON_SE_COORD_FMT, 0));
- OUT_RING(ctx->se_coord_fmt);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_LINE) {
- BEGIN_RING(5);
- OUT_RING(CP_PACKET0(RADEON_RE_LINE_PATTERN, 1));
- OUT_RING(ctx->re_line_pattern);
- OUT_RING(ctx->re_line_state);
- OUT_RING(CP_PACKET0(RADEON_SE_LINE_WIDTH, 0));
- OUT_RING(ctx->se_line_width);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_BUMPMAP) {
- BEGIN_RING(5);
- OUT_RING(CP_PACKET0(RADEON_PP_LUM_MATRIX, 0));
- OUT_RING(ctx->pp_lum_matrix);
- OUT_RING(CP_PACKET0(RADEON_PP_ROT_MATRIX_0, 1));
- OUT_RING(ctx->pp_rot_matrix_0);
- OUT_RING(ctx->pp_rot_matrix_1);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_MASKS) {
- BEGIN_RING(4);
- OUT_RING(CP_PACKET0(RADEON_RB3D_STENCILREFMASK, 2));
- OUT_RING(ctx->rb3d_stencilrefmask);
- OUT_RING(ctx->rb3d_ropcntl);
- OUT_RING(ctx->rb3d_planemask);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_VIEWPORT) {
- BEGIN_RING(7);
- OUT_RING(CP_PACKET0(RADEON_SE_VPORT_XSCALE, 5));
- OUT_RING(ctx->se_vport_xscale);
- OUT_RING(ctx->se_vport_xoffset);
- OUT_RING(ctx->se_vport_yscale);
- OUT_RING(ctx->se_vport_yoffset);
- OUT_RING(ctx->se_vport_zscale);
- OUT_RING(ctx->se_vport_zoffset);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_SETUP) {
- BEGIN_RING(4);
- OUT_RING(CP_PACKET0(RADEON_SE_CNTL, 0));
- OUT_RING(ctx->se_cntl);
- OUT_RING(CP_PACKET0(RADEON_SE_CNTL_STATUS, 0));
- OUT_RING(ctx->se_cntl_status);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_MISC) {
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(RADEON_RE_MISC, 0));
- OUT_RING(ctx->re_misc);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_TEX0) {
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &tex[0].pp_txoffset)) {
- DRM_ERROR("Invalid texture offset for unit 0\n");
- return -EINVAL;
- }
-
- BEGIN_RING(9);
- OUT_RING(CP_PACKET0(RADEON_PP_TXFILTER_0, 5));
- OUT_RING(tex[0].pp_txfilter);
- OUT_RING(tex[0].pp_txformat);
- OUT_RING(tex[0].pp_txoffset);
- OUT_RING(tex[0].pp_txcblend);
- OUT_RING(tex[0].pp_txablend);
- OUT_RING(tex[0].pp_tfactor);
- OUT_RING(CP_PACKET0(RADEON_PP_BORDER_COLOR_0, 0));
- OUT_RING(tex[0].pp_border_color);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_TEX1) {
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &tex[1].pp_txoffset)) {
- DRM_ERROR("Invalid texture offset for unit 1\n");
- return -EINVAL;
- }
-
- BEGIN_RING(9);
- OUT_RING(CP_PACKET0(RADEON_PP_TXFILTER_1, 5));
- OUT_RING(tex[1].pp_txfilter);
- OUT_RING(tex[1].pp_txformat);
- OUT_RING(tex[1].pp_txoffset);
- OUT_RING(tex[1].pp_txcblend);
- OUT_RING(tex[1].pp_txablend);
- OUT_RING(tex[1].pp_tfactor);
- OUT_RING(CP_PACKET0(RADEON_PP_BORDER_COLOR_1, 0));
- OUT_RING(tex[1].pp_border_color);
- ADVANCE_RING();
- }
-
- if (dirty & RADEON_UPLOAD_TEX2) {
- if (radeon_check_and_fixup_offset(dev_priv, file_priv,
- &tex[2].pp_txoffset)) {
- DRM_ERROR("Invalid texture offset for unit 2\n");
- return -EINVAL;
- }
-
- BEGIN_RING(9);
- OUT_RING(CP_PACKET0(RADEON_PP_TXFILTER_2, 5));
- OUT_RING(tex[2].pp_txfilter);
- OUT_RING(tex[2].pp_txformat);
- OUT_RING(tex[2].pp_txoffset);
- OUT_RING(tex[2].pp_txcblend);
- OUT_RING(tex[2].pp_txablend);
- OUT_RING(tex[2].pp_tfactor);
- OUT_RING(CP_PACKET0(RADEON_PP_BORDER_COLOR_2, 0));
- OUT_RING(tex[2].pp_border_color);
- ADVANCE_RING();
- }
-
- return 0;
-}
-
-/* Emit 1.2 state
- */
-static int radeon_emit_state2(drm_radeon_private_t * dev_priv,
- struct drm_file *file_priv,
- drm_radeon_state_t * state)
-{
- RING_LOCALS;
-
- if (state->dirty & RADEON_UPLOAD_ZBIAS) {
- BEGIN_RING(3);
- OUT_RING(CP_PACKET0(RADEON_SE_ZBIAS_FACTOR, 1));
- OUT_RING(state->context2.se_zbias_factor);
- OUT_RING(state->context2.se_zbias_constant);
- ADVANCE_RING();
- }
-
- return radeon_emit_state(dev_priv, file_priv, &state->context,
- state->tex, state->dirty);
-}
-
-/* New (1.3) state mechanism. 3 commands (packet, scalar, vector) in
- * 1.3 cmdbuffers allow all previous state to be updated as well as
- * the tcl scalar and vector areas.
- */
-static struct {
- int start;
- int len;
- const char *name;
-} packet[RADEON_MAX_STATE_PACKETS] = {
- {RADEON_PP_MISC, 7, "RADEON_PP_MISC"},
- {RADEON_PP_CNTL, 3, "RADEON_PP_CNTL"},
- {RADEON_RB3D_COLORPITCH, 1, "RADEON_RB3D_COLORPITCH"},
- {RADEON_RE_LINE_PATTERN, 2, "RADEON_RE_LINE_PATTERN"},
- {RADEON_SE_LINE_WIDTH, 1, "RADEON_SE_LINE_WIDTH"},
- {RADEON_PP_LUM_MATRIX, 1, "RADEON_PP_LUM_MATRIX"},
- {RADEON_PP_ROT_MATRIX_0, 2, "RADEON_PP_ROT_MATRIX_0"},
- {RADEON_RB3D_STENCILREFMASK, 3, "RADEON_RB3D_STENCILREFMASK"},
- {RADEON_SE_VPORT_XSCALE, 6, "RADEON_SE_VPORT_XSCALE"},
- {RADEON_SE_CNTL, 2, "RADEON_SE_CNTL"},
- {RADEON_SE_CNTL_STATUS, 1, "RADEON_SE_CNTL_STATUS"},
- {RADEON_RE_MISC, 1, "RADEON_RE_MISC"},
- {RADEON_PP_TXFILTER_0, 6, "RADEON_PP_TXFILTER_0"},
- {RADEON_PP_BORDER_COLOR_0, 1, "RADEON_PP_BORDER_COLOR_0"},
- {RADEON_PP_TXFILTER_1, 6, "RADEON_PP_TXFILTER_1"},
- {RADEON_PP_BORDER_COLOR_1, 1, "RADEON_PP_BORDER_COLOR_1"},
- {RADEON_PP_TXFILTER_2, 6, "RADEON_PP_TXFILTER_2"},
- {RADEON_PP_BORDER_COLOR_2, 1, "RADEON_PP_BORDER_COLOR_2"},
- {RADEON_SE_ZBIAS_FACTOR, 2, "RADEON_SE_ZBIAS_FACTOR"},
- {RADEON_SE_TCL_OUTPUT_VTX_FMT, 11, "RADEON_SE_TCL_OUTPUT_VTX_FMT"},
- {RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED, 17,
- "RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED"},
- {R200_PP_TXCBLEND_0, 4, "R200_PP_TXCBLEND_0"},
- {R200_PP_TXCBLEND_1, 4, "R200_PP_TXCBLEND_1"},
- {R200_PP_TXCBLEND_2, 4, "R200_PP_TXCBLEND_2"},
- {R200_PP_TXCBLEND_3, 4, "R200_PP_TXCBLEND_3"},
- {R200_PP_TXCBLEND_4, 4, "R200_PP_TXCBLEND_4"},
- {R200_PP_TXCBLEND_5, 4, "R200_PP_TXCBLEND_5"},
- {R200_PP_TXCBLEND_6, 4, "R200_PP_TXCBLEND_6"},
- {R200_PP_TXCBLEND_7, 4, "R200_PP_TXCBLEND_7"},
- {R200_SE_TCL_LIGHT_MODEL_CTL_0, 6, "R200_SE_TCL_LIGHT_MODEL_CTL_0"},
- {R200_PP_TFACTOR_0, 6, "R200_PP_TFACTOR_0"},
- {R200_SE_VTX_FMT_0, 4, "R200_SE_VTX_FMT_0"},
- {R200_SE_VAP_CNTL, 1, "R200_SE_VAP_CNTL"},
- {R200_SE_TCL_MATRIX_SEL_0, 5, "R200_SE_TCL_MATRIX_SEL_0"},
- {R200_SE_TCL_TEX_PROC_CTL_2, 5, "R200_SE_TCL_TEX_PROC_CTL_2"},
- {R200_SE_TCL_UCP_VERT_BLEND_CTL, 1, "R200_SE_TCL_UCP_VERT_BLEND_CTL"},
- {R200_PP_TXFILTER_0, 6, "R200_PP_TXFILTER_0"},
- {R200_PP_TXFILTER_1, 6, "R200_PP_TXFILTER_1"},
- {R200_PP_TXFILTER_2, 6, "R200_PP_TXFILTER_2"},
- {R200_PP_TXFILTER_3, 6, "R200_PP_TXFILTER_3"},
- {R200_PP_TXFILTER_4, 6, "R200_PP_TXFILTER_4"},
- {R200_PP_TXFILTER_5, 6, "R200_PP_TXFILTER_5"},
- {R200_PP_TXOFFSET_0, 1, "R200_PP_TXOFFSET_0"},
- {R200_PP_TXOFFSET_1, 1, "R200_PP_TXOFFSET_1"},
- {R200_PP_TXOFFSET_2, 1, "R200_PP_TXOFFSET_2"},
- {R200_PP_TXOFFSET_3, 1, "R200_PP_TXOFFSET_3"},
- {R200_PP_TXOFFSET_4, 1, "R200_PP_TXOFFSET_4"},
- {R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5"},
- {R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL"},
- {R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1,
- "R200_SE_TCL_OUTPUT_VTX_COMP_SEL"},
- {R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3"},
- {R200_PP_CNTL_X, 1, "R200_PP_CNTL_X"},
- {R200_RB3D_DEPTHXY_OFFSET, 1, "R200_RB3D_DEPTHXY_OFFSET"},
- {R200_RE_AUX_SCISSOR_CNTL, 1, "R200_RE_AUX_SCISSOR_CNTL"},
- {R200_RE_SCISSOR_TL_0, 2, "R200_RE_SCISSOR_TL_0"},
- {R200_RE_SCISSOR_TL_1, 2, "R200_RE_SCISSOR_TL_1"},
- {R200_RE_SCISSOR_TL_2, 2, "R200_RE_SCISSOR_TL_2"},
- {R200_SE_VAP_CNTL_STATUS, 1, "R200_SE_VAP_CNTL_STATUS"},
- {R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL"},
- {R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE"},
- {R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4,
- "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0"},
- {R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0"}, /* 61 */
- {R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0"}, /* 62 */
- {R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1"},
- {R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1"},
- {R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2"},
- {R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2"},
- {R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3"},
- {R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3"},
- {R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4"},
- {R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4"},
- {R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5"},
- {R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5"},
- {RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0"},
- {RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1"},
- {RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2"},
- {R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR"},
- {R200_SE_TCL_POINT_SPRITE_CNTL, 1, "R200_SE_TCL_POINT_SPRITE_CNTL"},
- {RADEON_PP_CUBIC_FACES_0, 1, "RADEON_PP_CUBIC_FACES_0"},
- {RADEON_PP_CUBIC_OFFSET_T0_0, 5, "RADEON_PP_CUBIC_OFFSET_T0_0"},
- {RADEON_PP_CUBIC_FACES_1, 1, "RADEON_PP_CUBIC_FACES_1"},
- {RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0"},
- {RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"},
- {RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"},
- {R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"},
- {R200_PP_AFS_0, 32, "R200_PP_AFS_0"}, /* 85 */
- {R200_PP_AFS_1, 32, "R200_PP_AFS_1"},
- {R200_PP_TFACTOR_0, 8, "R200_ATF_TFACTOR"},
- {R200_PP_TXFILTER_0, 8, "R200_PP_TXCTLALL_0"},
- {R200_PP_TXFILTER_1, 8, "R200_PP_TXCTLALL_1"},
- {R200_PP_TXFILTER_2, 8, "R200_PP_TXCTLALL_2"},
- {R200_PP_TXFILTER_3, 8, "R200_PP_TXCTLALL_3"},
- {R200_PP_TXFILTER_4, 8, "R200_PP_TXCTLALL_4"},
- {R200_PP_TXFILTER_5, 8, "R200_PP_TXCTLALL_5"},
- {R200_VAP_PVS_CNTL_1, 2, "R200_VAP_PVS_CNTL"},
-};
-
-/* ================================================================
- * Performance monitoring functions
- */
-
-static void radeon_clear_box(drm_radeon_private_t * dev_priv,
- int x, int y, int w, int h, int r, int g, int b)
-{
- u32 color;
- RING_LOCALS;
-
- x += dev_priv->sarea_priv->boxes[0].x1;
- y += dev_priv->sarea_priv->boxes[0].y1;
-
- switch (dev_priv->color_fmt) {
- case RADEON_COLOR_FORMAT_RGB565:
- color = (((r & 0xf8) << 8) |
- ((g & 0xfc) << 3) | ((b & 0xf8) >> 3));
- break;
- case RADEON_COLOR_FORMAT_ARGB8888:
- default:
- color = (((0xff) << 24) | (r << 16) | (g << 8) | b);
- break;
- }
-
- BEGIN_RING(4);
- RADEON_WAIT_UNTIL_3D_IDLE();
- OUT_RING(CP_PACKET0(RADEON_DP_WRITE_MASK, 0));
- OUT_RING(0xffffffff);
- ADVANCE_RING();
-
- BEGIN_RING(6);
-
- OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT_MULTI, 4));
- OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL |
- RADEON_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->color_fmt << 8) |
- RADEON_GMC_SRC_DATATYPE_COLOR |
- RADEON_ROP3_P | RADEON_GMC_CLR_CMP_CNTL_DIS);
-
- if (dev_priv->sarea_priv->pfCurrentPage == 1) {
- OUT_RING(dev_priv->front_pitch_offset);
- } else {
- OUT_RING(dev_priv->back_pitch_offset);
- }
-
- OUT_RING(color);
-
- OUT_RING((x << 16) | y);
- OUT_RING((w << 16) | h);
-
- ADVANCE_RING();
-}
-
-static void radeon_cp_performance_boxes(drm_radeon_private_t * dev_priv)
-{
- /* Collapse various things into a wait flag -- trying to
- * guess if userspase slept -- better just to have them tell us.
- */
- if (dev_priv->stats.last_frame_reads > 1 ||
- dev_priv->stats.last_clear_reads > dev_priv->stats.clears) {
- dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
- }
-
- if (dev_priv->stats.freelist_loops) {
- dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
- }
-
- /* Purple box for page flipping
- */
- if (dev_priv->stats.boxes & RADEON_BOX_FLIP)
- radeon_clear_box(dev_priv, 4, 4, 8, 8, 255, 0, 255);
-
- /* Red box if we have to wait for idle at any point
- */
- if (dev_priv->stats.boxes & RADEON_BOX_WAIT_IDLE)
- radeon_clear_box(dev_priv, 16, 4, 8, 8, 255, 0, 0);
-
- /* Blue box: lost context?
- */
-
- /* Yellow box for texture swaps
- */
- if (dev_priv->stats.boxes & RADEON_BOX_TEXTURE_LOAD)
- radeon_clear_box(dev_priv, 40, 4, 8, 8, 255, 255, 0);
-
- /* Green box if hardware never idles (as far as we can tell)
- */
- if (!(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE))
- radeon_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0);
-
- /* Draw bars indicating number of buffers allocated
- * (not a great measure, easily confused)
- */
- if (dev_priv->stats.requested_bufs) {
- if (dev_priv->stats.requested_bufs > 100)
- dev_priv->stats.requested_bufs = 100;
-
- radeon_clear_box(dev_priv, 4, 16,
- dev_priv->stats.requested_bufs, 4,
- 196, 128, 128);
- }
-
- memset(&dev_priv->stats, 0, sizeof(dev_priv->stats));
-
-}
-
-/* ================================================================
- * CP command dispatch functions
- */
-
-static void radeon_cp_dispatch_clear(struct drm_device * dev,
- drm_radeon_clear_t * clear,
- drm_radeon_clear_rect_t * depth_boxes)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_radeon_depth_clear_t *depth_clear = &dev_priv->depth_clear;
- int nbox = sarea_priv->nbox;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- unsigned int flags = clear->flags;
- u32 rb3d_cntl = 0, rb3d_stencilrefmask = 0;
- int i;
- RING_LOCALS;
- DRM_DEBUG("flags = 0x%x\n", flags);
-
- dev_priv->stats.clears++;
-
- if (dev_priv->sarea_priv->pfCurrentPage == 1) {
- unsigned int tmp = flags;
-
- flags &= ~(RADEON_FRONT | RADEON_BACK);
- if (tmp & RADEON_FRONT)
- flags |= RADEON_BACK;
- if (tmp & RADEON_BACK)
- flags |= RADEON_FRONT;
- }
-
- if (flags & (RADEON_FRONT | RADEON_BACK)) {
-
- BEGIN_RING(4);
-
- /* Ensure the 3D stream is idle before doing a
- * 2D fill to clear the front or back buffer.
- */
- RADEON_WAIT_UNTIL_3D_IDLE();
-
- OUT_RING(CP_PACKET0(RADEON_DP_WRITE_MASK, 0));
- OUT_RING(clear->color_mask);
-
- ADVANCE_RING();
-
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->ctx_owner = 0;
-
- for (i = 0; i < nbox; i++) {
- int x = pbox[i].x1;
- int y = pbox[i].y1;
- int w = pbox[i].x2 - x;
- int h = pbox[i].y2 - y;
-
- DRM_DEBUG("%d,%d-%d,%d flags 0x%x\n",
- x, y, w, h, flags);
-
- if (flags & RADEON_FRONT) {
- BEGIN_RING(6);
-
- OUT_RING(CP_PACKET3
- (RADEON_CNTL_PAINT_MULTI, 4));
- OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL |
- RADEON_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->
- color_fmt << 8) |
- RADEON_GMC_SRC_DATATYPE_COLOR |
- RADEON_ROP3_P |
- RADEON_GMC_CLR_CMP_CNTL_DIS);
-
- OUT_RING(dev_priv->front_pitch_offset);
- OUT_RING(clear->clear_color);
-
- OUT_RING((x << 16) | y);
- OUT_RING((w << 16) | h);
-
- ADVANCE_RING();
- }
-
- if (flags & RADEON_BACK) {
- BEGIN_RING(6);
-
- OUT_RING(CP_PACKET3
- (RADEON_CNTL_PAINT_MULTI, 4));
- OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL |
- RADEON_GMC_BRUSH_SOLID_COLOR |
- (dev_priv->
- color_fmt << 8) |
- RADEON_GMC_SRC_DATATYPE_COLOR |
- RADEON_ROP3_P |
- RADEON_GMC_CLR_CMP_CNTL_DIS);
-
- OUT_RING(dev_priv->back_pitch_offset);
- OUT_RING(clear->clear_color);
-
- OUT_RING((x << 16) | y);
- OUT_RING((w << 16) | h);
-
- ADVANCE_RING();
- }
- }
- }
-
- /* hyper z clear */
- /* no docs available, based on reverse engeneering by Stephane Marchesin */
- if ((flags & (RADEON_DEPTH | RADEON_STENCIL))
- && (flags & RADEON_CLEAR_FASTZ)) {
-
- int i;
- int depthpixperline =
- dev_priv->depth_fmt ==
- RADEON_DEPTH_FORMAT_16BIT_INT_Z ? (dev_priv->depth_pitch /
- 2) : (dev_priv->
- depth_pitch / 4);
-
- u32 clearmask;
-
- u32 tempRB3D_DEPTHCLEARVALUE = clear->clear_depth |
- ((clear->depth_mask & 0xff) << 24);
-
- /* Make sure we restore the 3D state next time.
- * we haven't touched any "normal" state - still need this?
- */
- dev_priv->sarea_priv->ctx_owner = 0;
-
- if ((dev_priv->flags & RADEON_HAS_HIERZ)
- && (flags & RADEON_USE_HIERZ)) {
- /* FIXME : reverse engineer that for Rx00 cards */
- /* FIXME : the mask supposedly contains low-res z values. So can't set
- just to the max (0xff? or actually 0x3fff?), need to take z clear
- value into account? */
- /* pattern seems to work for r100, though get slight
- rendering errors with glxgears. If hierz is not enabled for r100,
- only 4 bits which indicate clear (15,16,31,32, all zero) matter, the
- other ones are ignored, and the same clear mask can be used. That's
- very different behaviour than R200 which needs different clear mask
- and different number of tiles to clear if hierz is enabled or not !?!
- */
- clearmask = (0xff << 22) | (0xff << 6) | 0x003f003f;
- } else {
- /* clear mask : chooses the clearing pattern.
- rv250: could be used to clear only parts of macrotiles
- (but that would get really complicated...)?
- bit 0 and 1 (either or both of them ?!?!) are used to
- not clear tile (or maybe one of the bits indicates if the tile is
- compressed or not), bit 2 and 3 to not clear tile 1,...,.
- Pattern is as follows:
- | 0,1 | 4,5 | 8,9 |12,13|16,17|20,21|24,25|28,29|
- bits -------------------------------------------------
- | 2,3 | 6,7 |10,11|14,15|18,19|22,23|26,27|30,31|
- rv100: clearmask covers 2x8 4x1 tiles, but one clear still
- covers 256 pixels ?!?
- */
- clearmask = 0x0;
- }
-
- BEGIN_RING(8);
- RADEON_WAIT_UNTIL_2D_IDLE();
- OUT_RING_REG(RADEON_RB3D_DEPTHCLEARVALUE,
- tempRB3D_DEPTHCLEARVALUE);
- /* what offset is this exactly ? */
- OUT_RING_REG(RADEON_RB3D_ZMASKOFFSET, 0);
- /* need ctlstat, otherwise get some strange black flickering */
- OUT_RING_REG(RADEON_RB3D_ZCACHE_CTLSTAT,
- RADEON_RB3D_ZC_FLUSH_ALL);
- ADVANCE_RING();
-
- for (i = 0; i < nbox; i++) {
- int tileoffset, nrtilesx, nrtilesy, j;
- /* it looks like r200 needs rv-style clears, at least if hierz is not enabled? */
- if ((dev_priv->flags & RADEON_HAS_HIERZ)
- && (dev_priv->chip_family < CHIP_R200)) {
- /* FIXME : figure this out for r200 (when hierz is enabled). Or
- maybe r200 actually doesn't need to put the low-res z value into
- the tile cache like r100, but just needs to clear the hi-level z-buffer?
- Works for R100, both with hierz and without.
- R100 seems to operate on 2x1 8x8 tiles, but...
- odd: offset/nrtiles need to be 64 pix (4 block) aligned? Potentially
- problematic with resolutions which are not 64 pix aligned? */
- tileoffset =
- ((pbox[i].y1 >> 3) * depthpixperline +
- pbox[i].x1) >> 6;
- nrtilesx =
- ((pbox[i].x2 & ~63) -
- (pbox[i].x1 & ~63)) >> 4;
- nrtilesy =
- (pbox[i].y2 >> 3) - (pbox[i].y1 >> 3);
- for (j = 0; j <= nrtilesy; j++) {
- BEGIN_RING(4);
- OUT_RING(CP_PACKET3
- (RADEON_3D_CLEAR_ZMASK, 2));
- /* first tile */
- OUT_RING(tileoffset * 8);
- /* the number of tiles to clear */
- OUT_RING(nrtilesx + 4);
- /* clear mask : chooses the clearing pattern. */
- OUT_RING(clearmask);
- ADVANCE_RING();
- tileoffset += depthpixperline >> 6;
- }
- } else if ((dev_priv->chip_family >= CHIP_R200) &&
- (dev_priv->chip_family <= CHIP_RV280)) {
- /* works for rv250. */
- /* find first macro tile (8x2 4x4 z-pixels on rv250) */
- tileoffset =
- ((pbox[i].y1 >> 3) * depthpixperline +
- pbox[i].x1) >> 5;
- nrtilesx =
- (pbox[i].x2 >> 5) - (pbox[i].x1 >> 5);
- nrtilesy =
- (pbox[i].y2 >> 3) - (pbox[i].y1 >> 3);
- for (j = 0; j <= nrtilesy; j++) {
- BEGIN_RING(4);
- OUT_RING(CP_PACKET3
- (RADEON_3D_CLEAR_ZMASK, 2));
- /* first tile */
- /* judging by the first tile offset needed, could possibly
- directly address/clear 4x4 tiles instead of 8x2 * 4x4
- macro tiles, though would still need clear mask for
- right/bottom if truely 4x4 granularity is desired ? */
- OUT_RING(tileoffset * 16);
- /* the number of tiles to clear */
- OUT_RING(nrtilesx + 1);
- /* clear mask : chooses the clearing pattern. */
- OUT_RING(clearmask);
- ADVANCE_RING();
- tileoffset += depthpixperline >> 5;
- }
- } else { /* rv 100 */
- /* rv100 might not need 64 pix alignment, who knows */
- /* offsets are, hmm, weird */
- tileoffset =
- ((pbox[i].y1 >> 4) * depthpixperline +
- pbox[i].x1) >> 6;
- nrtilesx =
- ((pbox[i].x2 & ~63) -
- (pbox[i].x1 & ~63)) >> 4;
- nrtilesy =
- (pbox[i].y2 >> 4) - (pbox[i].y1 >> 4);
- for (j = 0; j <= nrtilesy; j++) {
- BEGIN_RING(4);
- OUT_RING(CP_PACKET3
- (RADEON_3D_CLEAR_ZMASK, 2));
- OUT_RING(tileoffset * 128);
- /* the number of tiles to clear */
- OUT_RING(nrtilesx + 4);
- /* clear mask : chooses the clearing pattern. */
- OUT_RING(clearmask);
- ADVANCE_RING();
- tileoffset += depthpixperline >> 6;
- }
- }
- }
-
- /* TODO don't always clear all hi-level z tiles */
- if ((dev_priv->flags & RADEON_HAS_HIERZ)
- && ((dev_priv->chip_family >= CHIP_R200) &&
- (dev_priv->chip_family <= CHIP_RV280))
- && (flags & RADEON_USE_HIERZ))
- /* r100 and cards without hierarchical z-buffer have no high-level z-buffer */
- /* FIXME : the mask supposedly contains low-res z values. So can't set
- just to the max (0xff? or actually 0x3fff?), need to take z clear
- value into account? */
- {
- BEGIN_RING(4);
- OUT_RING(CP_PACKET3(RADEON_3D_CLEAR_HIZ, 2));
- OUT_RING(0x0); /* First tile */
- OUT_RING(0x3cc0);
- OUT_RING((0xff << 22) | (0xff << 6) | 0x003f003f);
- ADVANCE_RING();
- }
- }
-
- /* We have to clear the depth and/or stencil buffers by
- * rendering a quad into just those buffers. Thus, we have to
- * make sure the 3D engine is configured correctly.
- */
- else if ((dev_priv->chip_family >= CHIP_R200) &&
- (dev_priv->chip_family <= CHIP_RV280) &&
- (flags & (RADEON_DEPTH | RADEON_STENCIL))) {
-
- int tempPP_CNTL;
- int tempRE_CNTL;
- int tempRB3D_CNTL;
- int tempRB3D_ZSTENCILCNTL;
- int tempRB3D_STENCILREFMASK;
- int tempRB3D_PLANEMASK;
- int tempSE_CNTL;
- int tempSE_VTE_CNTL;
- int tempSE_VTX_FMT_0;
- int tempSE_VTX_FMT_1;
- int tempSE_VAP_CNTL;
- int tempRE_AUX_SCISSOR_CNTL;
-
- tempPP_CNTL = 0;
- tempRE_CNTL = 0;
-
- tempRB3D_CNTL = depth_clear->rb3d_cntl;
-
- tempRB3D_ZSTENCILCNTL = depth_clear->rb3d_zstencilcntl;
- tempRB3D_STENCILREFMASK = 0x0;
-
- tempSE_CNTL = depth_clear->se_cntl;
-
- /* Disable TCL */
-
- tempSE_VAP_CNTL = ( /* SE_VAP_CNTL__FORCE_W_TO_ONE_MASK | */
- (0x9 <<
- SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT));
-
- tempRB3D_PLANEMASK = 0x0;
-
- tempRE_AUX_SCISSOR_CNTL = 0x0;
-
- tempSE_VTE_CNTL =
- SE_VTE_CNTL__VTX_XY_FMT_MASK | SE_VTE_CNTL__VTX_Z_FMT_MASK;
-
- /* Vertex format (X, Y, Z, W) */
- tempSE_VTX_FMT_0 =
- SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK |
- SE_VTX_FMT_0__VTX_W0_PRESENT_MASK;
- tempSE_VTX_FMT_1 = 0x0;
-
- /*
- * Depth buffer specific enables
- */
- if (flags & RADEON_DEPTH) {
- /* Enable depth buffer */
- tempRB3D_CNTL |= RADEON_Z_ENABLE;
- } else {
- /* Disable depth buffer */
- tempRB3D_CNTL &= ~RADEON_Z_ENABLE;
- }
-
- /*
- * Stencil buffer specific enables
- */
- if (flags & RADEON_STENCIL) {
- tempRB3D_CNTL |= RADEON_STENCIL_ENABLE;
- tempRB3D_STENCILREFMASK = clear->depth_mask;
- } else {
- tempRB3D_CNTL &= ~RADEON_STENCIL_ENABLE;
- tempRB3D_STENCILREFMASK = 0x00000000;
- }
-
- if (flags & RADEON_USE_COMP_ZBUF) {
- tempRB3D_ZSTENCILCNTL |= RADEON_Z_COMPRESSION_ENABLE |
- RADEON_Z_DECOMPRESSION_ENABLE;
- }
- if (flags & RADEON_USE_HIERZ) {
- tempRB3D_ZSTENCILCNTL |= RADEON_Z_HIERARCHY_ENABLE;
- }
-
- BEGIN_RING(26);
- RADEON_WAIT_UNTIL_2D_IDLE();
-
- OUT_RING_REG(RADEON_PP_CNTL, tempPP_CNTL);
- OUT_RING_REG(R200_RE_CNTL, tempRE_CNTL);
- OUT_RING_REG(RADEON_RB3D_CNTL, tempRB3D_CNTL);
- OUT_RING_REG(RADEON_RB3D_ZSTENCILCNTL, tempRB3D_ZSTENCILCNTL);
- OUT_RING_REG(RADEON_RB3D_STENCILREFMASK,
- tempRB3D_STENCILREFMASK);
- OUT_RING_REG(RADEON_RB3D_PLANEMASK, tempRB3D_PLANEMASK);
- OUT_RING_REG(RADEON_SE_CNTL, tempSE_CNTL);
- OUT_RING_REG(R200_SE_VTE_CNTL, tempSE_VTE_CNTL);
- OUT_RING_REG(R200_SE_VTX_FMT_0, tempSE_VTX_FMT_0);
- OUT_RING_REG(R200_SE_VTX_FMT_1, tempSE_VTX_FMT_1);
- OUT_RING_REG(R200_SE_VAP_CNTL, tempSE_VAP_CNTL);
- OUT_RING_REG(R200_RE_AUX_SCISSOR_CNTL, tempRE_AUX_SCISSOR_CNTL);
- ADVANCE_RING();
-
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->ctx_owner = 0;
-
- for (i = 0; i < nbox; i++) {
-
- /* Funny that this should be required --
- * sets top-left?
- */
- radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);
-
- BEGIN_RING(14);
- OUT_RING(CP_PACKET3(R200_3D_DRAW_IMMD_2, 12));
- OUT_RING((RADEON_PRIM_TYPE_RECT_LIST |
- RADEON_PRIM_WALK_RING |
- (3 << RADEON_NUM_VERTICES_SHIFT)));
- OUT_RING(depth_boxes[i].ui[CLEAR_X1]);
- OUT_RING(depth_boxes[i].ui[CLEAR_Y1]);
- OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
- OUT_RING(0x3f800000);
- OUT_RING(depth_boxes[i].ui[CLEAR_X1]);
- OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);
- OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
- OUT_RING(0x3f800000);
- OUT_RING(depth_boxes[i].ui[CLEAR_X2]);
- OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);
- OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
- OUT_RING(0x3f800000);
- ADVANCE_RING();
- }
- } else if ((flags & (RADEON_DEPTH | RADEON_STENCIL))) {
-
- int tempRB3D_ZSTENCILCNTL = depth_clear->rb3d_zstencilcntl;
-
- rb3d_cntl = depth_clear->rb3d_cntl;
-
- if (flags & RADEON_DEPTH) {
- rb3d_cntl |= RADEON_Z_ENABLE;
- } else {
- rb3d_cntl &= ~RADEON_Z_ENABLE;
- }
-
- if (flags & RADEON_STENCIL) {
- rb3d_cntl |= RADEON_STENCIL_ENABLE;
- rb3d_stencilrefmask = clear->depth_mask; /* misnamed field */
- } else {
- rb3d_cntl &= ~RADEON_STENCIL_ENABLE;
- rb3d_stencilrefmask = 0x00000000;
- }
-
- if (flags & RADEON_USE_COMP_ZBUF) {
- tempRB3D_ZSTENCILCNTL |= RADEON_Z_COMPRESSION_ENABLE |
- RADEON_Z_DECOMPRESSION_ENABLE;
- }
- if (flags & RADEON_USE_HIERZ) {
- tempRB3D_ZSTENCILCNTL |= RADEON_Z_HIERARCHY_ENABLE;
- }
-
- BEGIN_RING(13);
- RADEON_WAIT_UNTIL_2D_IDLE();
-
- OUT_RING(CP_PACKET0(RADEON_PP_CNTL, 1));
- OUT_RING(0x00000000);
- OUT_RING(rb3d_cntl);
-
- OUT_RING_REG(RADEON_RB3D_ZSTENCILCNTL, tempRB3D_ZSTENCILCNTL);
- OUT_RING_REG(RADEON_RB3D_STENCILREFMASK, rb3d_stencilrefmask);
- OUT_RING_REG(RADEON_RB3D_PLANEMASK, 0x00000000);
- OUT_RING_REG(RADEON_SE_CNTL, depth_clear->se_cntl);
- ADVANCE_RING();
-
- /* Make sure we restore the 3D state next time.
- */
- dev_priv->sarea_priv->ctx_owner = 0;
-
- for (i = 0; i < nbox; i++) {
-
- /* Funny that this should be required --
- * sets top-left?
- */
- radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);
-
- BEGIN_RING(15);
-
- OUT_RING(CP_PACKET3(RADEON_3D_DRAW_IMMD, 13));
- OUT_RING(RADEON_VTX_Z_PRESENT |
- RADEON_VTX_PKCOLOR_PRESENT);
- OUT_RING((RADEON_PRIM_TYPE_RECT_LIST |
- RADEON_PRIM_WALK_RING |
- RADEON_MAOS_ENABLE |
- RADEON_VTX_FMT_RADEON_MODE |
- (3 << RADEON_NUM_VERTICES_SHIFT)));
-
- OUT_RING(depth_boxes[i].ui[CLEAR_X1]);
- OUT_RING(depth_boxes[i].ui[CLEAR_Y1]);
- OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
- OUT_RING(0x0);
-
- OUT_RING(depth_boxes[i].ui[CLEAR_X1]);
- OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);
- OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
- OUT_RING(0x0);
-
- OUT_RING(depth_boxes[i].ui[CLEAR_X2]);
- OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);
- OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
- OUT_RING(0x0);
-
- ADVANCE_RING();
- }
- }
-
- /* Increment the clear counter. The client-side 3D driver must
- * wait on this value before performing the clear ioctl. We
- * need this because the card's so damned fast...
- */
- dev_priv->sarea_priv->last_clear++;
-
- BEGIN_RING(4);
-
- RADEON_CLEAR_AGE(dev_priv->sarea_priv->last_clear);
- RADEON_WAIT_UNTIL_IDLE();
-
- ADVANCE_RING();
-}
-
-static void radeon_cp_dispatch_swap(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int nbox = sarea_priv->nbox;
- struct drm_clip_rect *pbox = sarea_priv->boxes;
- int i;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- /* Do some trivial performance monitoring...
- */
- if (dev_priv->do_boxes)
- radeon_cp_performance_boxes(dev_priv);
-
- /* Wait for the 3D stream to idle before dispatching the bitblt.
- * This will prevent data corruption between the two streams.
- */
- BEGIN_RING(2);
-
- RADEON_WAIT_UNTIL_3D_IDLE();
-
- ADVANCE_RING();
-
- for (i = 0; i < nbox; i++) {
- int x = pbox[i].x1;
- int y = pbox[i].y1;
- int w = pbox[i].x2 - x;
- int h = pbox[i].y2 - y;
-
- DRM_DEBUG("%d,%d-%d,%d\n", x, y, w, h);
-
- BEGIN_RING(9);
-
- OUT_RING(CP_PACKET0(RADEON_DP_GUI_MASTER_CNTL, 0));
- OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
- RADEON_GMC_DST_PITCH_OFFSET_CNTL |
- RADEON_GMC_BRUSH_NONE |
- (dev_priv->color_fmt << 8) |
- RADEON_GMC_SRC_DATATYPE_COLOR |
- RADEON_ROP3_S |
- RADEON_DP_SRC_SOURCE_MEMORY |
- RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS);
-
- /* Make this work even if front & back are flipped:
- */
- OUT_RING(CP_PACKET0(RADEON_SRC_PITCH_OFFSET, 1));
- if (dev_priv->sarea_priv->pfCurrentPage == 0) {
- OUT_RING(dev_priv->back_pitch_offset);
- OUT_RING(dev_priv->front_pitch_offset);
- } else {
- OUT_RING(dev_priv->front_pitch_offset);
- OUT_RING(dev_priv->back_pitch_offset);
- }
-
- OUT_RING(CP_PACKET0(RADEON_SRC_X_Y, 2));
- OUT_RING((x << 16) | y);
- OUT_RING((x << 16) | y);
- OUT_RING((w << 16) | h);
-
- ADVANCE_RING();
- }
-
- /* Increment the frame counter. The client-side 3D driver must
- * throttle the framerate by waiting for this value before
- * performing the swapbuffer ioctl.
- */
- dev_priv->sarea_priv->last_frame++;
-
- BEGIN_RING(4);
-
- RADEON_FRAME_AGE(dev_priv->sarea_priv->last_frame);
- RADEON_WAIT_UNTIL_2D_IDLE();
-
- ADVANCE_RING();
-}
-
-static void radeon_cp_dispatch_flip(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- struct drm_sarea *sarea = (struct drm_sarea *) dev_priv->sarea->handle;
- int offset = (dev_priv->sarea_priv->pfCurrentPage == 1)
- ? dev_priv->front_offset : dev_priv->back_offset;
- RING_LOCALS;
- DRM_DEBUG("pfCurrentPage=%d\n",
- dev_priv->sarea_priv->pfCurrentPage);
-
- /* Do some trivial performance monitoring...
- */
- if (dev_priv->do_boxes) {
- dev_priv->stats.boxes |= RADEON_BOX_FLIP;
- radeon_cp_performance_boxes(dev_priv);
- }
-
- /* Update the frame offsets for both CRTCs
- */
- BEGIN_RING(6);
-
- RADEON_WAIT_UNTIL_3D_IDLE();
- OUT_RING_REG(RADEON_CRTC_OFFSET,
- ((sarea->frame.y * dev_priv->front_pitch +
- sarea->frame.x * (dev_priv->color_fmt - 2)) & ~7)
- + offset);
- OUT_RING_REG(RADEON_CRTC2_OFFSET, dev_priv->sarea_priv->crtc2_base
- + offset);
-
- ADVANCE_RING();
-
- /* Increment the frame counter. The client-side 3D driver must
- * throttle the framerate by waiting for this value before
- * performing the swapbuffer ioctl.
- */
- dev_priv->sarea_priv->last_frame++;
- dev_priv->sarea_priv->pfCurrentPage =
- 1 - dev_priv->sarea_priv->pfCurrentPage;
-
- BEGIN_RING(2);
-
- RADEON_FRAME_AGE(dev_priv->sarea_priv->last_frame);
-
- ADVANCE_RING();
-}
-
-static int bad_prim_vertex_nr(int primitive, int nr)
-{
- switch (primitive & RADEON_PRIM_TYPE_MASK) {
- case RADEON_PRIM_TYPE_NONE:
- case RADEON_PRIM_TYPE_POINT:
- return nr < 1;
- case RADEON_PRIM_TYPE_LINE:
- return (nr & 1) || nr == 0;
- case RADEON_PRIM_TYPE_LINE_STRIP:
- return nr < 2;
- case RADEON_PRIM_TYPE_TRI_LIST:
- case RADEON_PRIM_TYPE_3VRT_POINT_LIST:
- case RADEON_PRIM_TYPE_3VRT_LINE_LIST:
- case RADEON_PRIM_TYPE_RECT_LIST:
- return nr % 3 || nr == 0;
- case RADEON_PRIM_TYPE_TRI_FAN:
- case RADEON_PRIM_TYPE_TRI_STRIP:
- return nr < 3;
- default:
- return 1;
- }
-}
-
-typedef struct {
- unsigned int start;
- unsigned int finish;
- unsigned int prim;
- unsigned int numverts;
- unsigned int offset;
- unsigned int vc_format;
-} drm_radeon_tcl_prim_t;
-
-static void radeon_cp_dispatch_vertex(struct drm_device * dev,
- struct drm_buf * buf,
- drm_radeon_tcl_prim_t * prim)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int offset = dev_priv->gart_buffers_offset + buf->offset + prim->start;
- int numverts = (int)prim->numverts;
- int nbox = sarea_priv->nbox;
- int i = 0;
- RING_LOCALS;
-
- DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d %d verts\n",
- prim->prim,
- prim->vc_format, prim->start, prim->finish, prim->numverts);
-
- if (bad_prim_vertex_nr(prim->prim, prim->numverts)) {
- DRM_ERROR("bad prim %x numverts %d\n",
- prim->prim, prim->numverts);
- return;
- }
-
- do {
- /* Emit the next cliprect */
- if (i < nbox) {
- radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);
- }
-
- /* Emit the vertex buffer rendering commands */
- BEGIN_RING(5);
-
- OUT_RING(CP_PACKET3(RADEON_3D_RNDR_GEN_INDX_PRIM, 3));
- OUT_RING(offset);
- OUT_RING(numverts);
- OUT_RING(prim->vc_format);
- OUT_RING(prim->prim | RADEON_PRIM_WALK_LIST |
- RADEON_COLOR_ORDER_RGBA |
- RADEON_VTX_FMT_RADEON_MODE |
- (numverts << RADEON_NUM_VERTICES_SHIFT));
-
- ADVANCE_RING();
-
- i++;
- } while (i < nbox);
-}
-
-static void radeon_cp_discard_buffer(struct drm_device * dev, struct drm_buf * buf)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
- RING_LOCALS;
-
- buf_priv->age = ++dev_priv->sarea_priv->last_dispatch;
-
- /* Emit the vertex buffer age */
- BEGIN_RING(2);
- RADEON_DISPATCH_AGE(buf_priv->age);
- ADVANCE_RING();
-
- buf->pending = 1;
- buf->used = 0;
-}
-
-static void radeon_cp_dispatch_indirect(struct drm_device * dev,
- struct drm_buf * buf, int start, int end)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- RING_LOCALS;
- DRM_DEBUG("buf=%d s=0x%x e=0x%x\n", buf->idx, start, end);
-
- if (start != end) {
- int offset = (dev_priv->gart_buffers_offset
- + buf->offset + start);
- int dwords = (end - start + 3) / sizeof(u32);
-
- /* Indirect buffer data must be an even number of
- * dwords, so if we've been given an odd number we must
- * pad the data with a Type-2 CP packet.
- */
- if (dwords & 1) {
- u32 *data = (u32 *)
- ((char *)dev->agp_buffer_map->handle
- + buf->offset + start);
- data[dwords++] = RADEON_CP_PACKET2;
- }
-
- /* Fire off the indirect buffer */
- BEGIN_RING(3);
-
- OUT_RING(CP_PACKET0(RADEON_CP_IB_BASE, 1));
- OUT_RING(offset);
- OUT_RING(dwords);
-
- ADVANCE_RING();
- }
-}
-
-static void radeon_cp_dispatch_indices(struct drm_device * dev,
- struct drm_buf * elt_buf,
- drm_radeon_tcl_prim_t * prim)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
- int offset = dev_priv->gart_buffers_offset + prim->offset;
- u32 *data;
- int dwords;
- int i = 0;
- int start = prim->start + RADEON_INDEX_PRIM_OFFSET;
- int count = (prim->finish - start) / sizeof(u16);
- int nbox = sarea_priv->nbox;
-
- DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d\n",
- prim->prim,
- prim->vc_format,
- prim->start, prim->finish, prim->offset, prim->numverts);
-
- if (bad_prim_vertex_nr(prim->prim, count)) {
- DRM_ERROR("bad prim %x count %d\n", prim->prim, count);
- return;
- }
-
- if (start >= prim->finish || (prim->start & 0x7)) {
- DRM_ERROR("buffer prim %d\n", prim->prim);
- return;
- }
-
- dwords = (prim->finish - prim->start + 3) / sizeof(u32);
-
- data = (u32 *) ((char *)dev->agp_buffer_map->handle +
- elt_buf->offset + prim->start);
-
- data[0] = CP_PACKET3(RADEON_3D_RNDR_GEN_INDX_PRIM, dwords - 2);
- data[1] = offset;
- data[2] = prim->numverts;
- data[3] = prim->vc_format;
- data[4] = (prim->prim |
- RADEON_PRIM_WALK_IND |
- RADEON_COLOR_ORDER_RGBA |
- RADEON_VTX_FMT_RADEON_MODE |
- (count << RADEON_NUM_VERTICES_SHIFT));
-
- do {
- if (i < nbox)
- radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);
-
- radeon_cp_dispatch_indirect(dev, elt_buf,
- prim->start, prim->finish);
-
- i++;
- } while (i < nbox);
-
-}
-
-#define RADEON_MAX_TEXTURE_SIZE RADEON_BUFFER_SIZE
-
-static int radeon_cp_dispatch_texture(struct drm_device * dev,
- struct drm_file *file_priv,
- drm_radeon_texture_t * tex,
- drm_radeon_tex_image_t * image)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- struct drm_buf *buf;
- u32 format;
- u32 *buffer;
- const u8 __user *data;
- int size, dwords, tex_width, blit_width, spitch;
- u32 height;
- int i;
- u32 texpitch, microtile;
- u32 offset, byte_offset;
- RING_LOCALS;
-
- if (radeon_check_and_fixup_offset(dev_priv, file_priv, &tex->offset)) {
- DRM_ERROR("Invalid destination offset\n");
- return -EINVAL;
- }
-
- dev_priv->stats.boxes |= RADEON_BOX_TEXTURE_LOAD;
-
- /* Flush the pixel cache. This ensures no pixel data gets mixed
- * up with the texture data from the host data blit, otherwise
- * part of the texture image may be corrupted.
- */
- BEGIN_RING(4);
- RADEON_FLUSH_CACHE();
- RADEON_WAIT_UNTIL_IDLE();
- ADVANCE_RING();
-
- /* The compiler won't optimize away a division by a variable,
- * even if the only legal values are powers of two. Thus, we'll
- * use a shift instead.
- */
- switch (tex->format) {
- case RADEON_TXFORMAT_ARGB8888:
- case RADEON_TXFORMAT_RGBA8888:
- format = RADEON_COLOR_FORMAT_ARGB8888;
- tex_width = tex->width * 4;
- blit_width = image->width * 4;
- break;
- case RADEON_TXFORMAT_AI88:
- case RADEON_TXFORMAT_ARGB1555:
- case RADEON_TXFORMAT_RGB565:
- case RADEON_TXFORMAT_ARGB4444:
- case RADEON_TXFORMAT_VYUY422:
- case RADEON_TXFORMAT_YVYU422:
- format = RADEON_COLOR_FORMAT_RGB565;
- tex_width = tex->width * 2;
- blit_width = image->width * 2;
- break;
- case RADEON_TXFORMAT_I8:
- case RADEON_TXFORMAT_RGB332:
- format = RADEON_COLOR_FORMAT_CI8;
- tex_width = tex->width * 1;
- blit_width = image->width * 1;
- break;
- default:
- DRM_ERROR("invalid texture format %d\n", tex->format);
- return -EINVAL;
- }
- spitch = blit_width >> 6;
- if (spitch == 0 && image->height > 1)
- return -EINVAL;
-
- texpitch = tex->pitch;
- if ((texpitch << 22) & RADEON_DST_TILE_MICRO) {
- microtile = 1;
- if (tex_width < 64) {
- texpitch &= ~(RADEON_DST_TILE_MICRO >> 22);
- /* we got tiled coordinates, untile them */
- image->x *= 2;
- }
- } else
- microtile = 0;
-
- /* this might fail for zero-sized uploads - are those illegal? */
- if (!radeon_check_offset(dev_priv, tex->offset + image->height *
- blit_width - 1)) {
- DRM_ERROR("Invalid final destination offset\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("tex=%dx%d blit=%d\n", tex_width, tex->height, blit_width);
-
- do {
- DRM_DEBUG("tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n",
- tex->offset >> 10, tex->pitch, tex->format,
- image->x, image->y, image->width, image->height);
-
- /* Make a copy of some parameters in case we have to
- * update them for a multi-pass texture blit.
- */
- height = image->height;
- data = (const u8 __user *)image->data;
-
- size = height * blit_width;
-
- if (size > RADEON_MAX_TEXTURE_SIZE) {
- height = RADEON_MAX_TEXTURE_SIZE / blit_width;
- size = height * blit_width;
- } else if (size < 4 && size > 0) {
- size = 4;
- } else if (size == 0) {
- return 0;
- }
-
- buf = radeon_freelist_get(dev);
- if (0 && !buf) {
- radeon_do_cp_idle(dev_priv);
- buf = radeon_freelist_get(dev);
- }
- if (!buf) {
- DRM_DEBUG("EAGAIN\n");
- if (DRM_COPY_TO_USER(tex->image, image, sizeof(*image)))
- return -EFAULT;
- return -EAGAIN;
- }
-
- /* Dispatch the indirect buffer.
- */
- buffer =
- (u32 *) ((char *)dev->agp_buffer_map->handle + buf->offset);
- dwords = size / 4;
-
-#define RADEON_COPY_MT(_buf, _data, _width) \
- do { \
- if (DRM_COPY_FROM_USER(_buf, _data, (_width))) {\
- DRM_ERROR("EFAULT on pad, %d bytes\n", (_width)); \
- return -EFAULT; \
- } \
- } while(0)
-
- if (microtile) {
- /* texture micro tiling in use, minimum texture width is thus 16 bytes.
- however, we cannot use blitter directly for texture width < 64 bytes,
- since minimum tex pitch is 64 bytes and we need this to match
- the texture width, otherwise the blitter will tile it wrong.
- Thus, tiling manually in this case. Additionally, need to special
- case tex height = 1, since our actual image will have height 2
- and we need to ensure we don't read beyond the texture size
- from user space. */
- if (tex->height == 1) {
- if (tex_width >= 64 || tex_width <= 16) {
- RADEON_COPY_MT(buffer, data,
- (int)(tex_width * sizeof(u32)));
- } else if (tex_width == 32) {
- RADEON_COPY_MT(buffer, data, 16);
- RADEON_COPY_MT(buffer + 8,
- data + 16, 16);
- }
- } else if (tex_width >= 64 || tex_width == 16) {
- RADEON_COPY_MT(buffer, data,
- (int)(dwords * sizeof(u32)));
- } else if (tex_width < 16) {
- for (i = 0; i < tex->height; i++) {
- RADEON_COPY_MT(buffer, data, tex_width);
- buffer += 4;
- data += tex_width;
- }
- } else if (tex_width == 32) {
- /* TODO: make sure this works when not fitting in one buffer
- (i.e. 32bytes x 2048...) */
- for (i = 0; i < tex->height; i += 2) {
- RADEON_COPY_MT(buffer, data, 16);
- data += 16;
- RADEON_COPY_MT(buffer + 8, data, 16);
- data += 16;
- RADEON_COPY_MT(buffer + 4, data, 16);
- data += 16;
- RADEON_COPY_MT(buffer + 12, data, 16);
- data += 16;
- buffer += 16;
- }
- }
- } else {
- if (tex_width >= 32) {
- /* Texture image width is larger than the minimum, so we
- * can upload it directly.
- */
- RADEON_COPY_MT(buffer, data,
- (int)(dwords * sizeof(u32)));
- } else {
- /* Texture image width is less than the minimum, so we
- * need to pad out each image scanline to the minimum
- * width.
- */
- for (i = 0; i < tex->height; i++) {
- RADEON_COPY_MT(buffer, data, tex_width);
- buffer += 8;
- data += tex_width;
- }
- }
- }
-
-#undef RADEON_COPY_MT
- byte_offset = (image->y & ~2047) * blit_width;
- buf->file_priv = file_priv;
- buf->used = size;
- offset = dev_priv->gart_buffers_offset + buf->offset;
- BEGIN_RING(9);
- OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT_MULTI, 5));
- OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
- RADEON_GMC_DST_PITCH_OFFSET_CNTL |
- RADEON_GMC_BRUSH_NONE |
- (format << 8) |
- RADEON_GMC_SRC_DATATYPE_COLOR |
- RADEON_ROP3_S |
- RADEON_DP_SRC_SOURCE_MEMORY |
- RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS);
- OUT_RING((spitch << 22) | (offset >> 10));
- OUT_RING((texpitch << 22) | ((tex->offset >> 10) + (byte_offset >> 10)));
- OUT_RING(0);
- OUT_RING((image->x << 16) | (image->y % 2048));
- OUT_RING((image->width << 16) | height);
- RADEON_WAIT_UNTIL_2D_IDLE();
- ADVANCE_RING();
- COMMIT_RING();
-
- radeon_cp_discard_buffer(dev, buf);
-
- /* Update the input parameters for next time */
- image->y += height;
- image->height -= height;
- image->data = (const u8 __user *)image->data + size;
- } while (image->height > 0);
-
- /* Flush the pixel cache after the blit completes. This ensures
- * the texture data is written out to memory before rendering
- * continues.
- */
- BEGIN_RING(4);
- RADEON_FLUSH_CACHE();
- RADEON_WAIT_UNTIL_2D_IDLE();
- ADVANCE_RING();
- COMMIT_RING();
-
- return 0;
-}
-
-static void radeon_cp_dispatch_stipple(struct drm_device * dev, u32 * stipple)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- int i;
- RING_LOCALS;
- DRM_DEBUG("\n");
-
- BEGIN_RING(35);
-
- OUT_RING(CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0));
- OUT_RING(0x00000000);
-
- OUT_RING(CP_PACKET0_TABLE(RADEON_RE_STIPPLE_DATA, 31));
- for (i = 0; i < 32; i++) {
- OUT_RING(stipple[i]);
- }
-
- ADVANCE_RING();
-}
-
-static void radeon_apply_surface_regs(int surf_index,
- drm_radeon_private_t *dev_priv)
-{
- if (!dev_priv->mmio)
- return;
-
- radeon_do_cp_idle(dev_priv);
-
- RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * surf_index,
- dev_priv->surfaces[surf_index].flags);
- RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16 * surf_index,
- dev_priv->surfaces[surf_index].lower);
- RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16 * surf_index,
- dev_priv->surfaces[surf_index].upper);
-}
-
-/* Allocates a virtual surface
- * doesn't always allocate a real surface, will stretch an existing
- * surface when possible.
- *
- * Note that refcount can be at most 2, since during a free refcount=3
- * might mean we have to allocate a new surface which might not always
- * be available.
- * For example : we allocate three contigous surfaces ABC. If B is
- * freed, we suddenly need two surfaces to store A and C, which might
- * not always be available.
- */
-static int alloc_surface(drm_radeon_surface_alloc_t *new,
- drm_radeon_private_t *dev_priv,
- struct drm_file *file_priv)
-{
- struct radeon_virt_surface *s;
- int i;
- int virt_surface_index;
- uint32_t new_upper, new_lower;
-
- new_lower = new->address;
- new_upper = new_lower + new->size - 1;
-
- /* sanity check */
- if ((new_lower >= new_upper) || (new->flags == 0) || (new->size == 0) ||
- ((new_upper & RADEON_SURF_ADDRESS_FIXED_MASK) !=
- RADEON_SURF_ADDRESS_FIXED_MASK)
- || ((new_lower & RADEON_SURF_ADDRESS_FIXED_MASK) != 0))
- return -1;
-
- /* make sure there is no overlap with existing surfaces */
- for (i = 0; i < RADEON_MAX_SURFACES; i++) {
- if ((dev_priv->surfaces[i].refcount != 0) &&
- (((new_lower >= dev_priv->surfaces[i].lower) &&
- (new_lower < dev_priv->surfaces[i].upper)) ||
- ((new_lower < dev_priv->surfaces[i].lower) &&
- (new_upper > dev_priv->surfaces[i].lower)))) {
- return -1;
- }
- }
-
- /* find a virtual surface */
- for (i = 0; i < 2 * RADEON_MAX_SURFACES; i++)
- if (dev_priv->virt_surfaces[i].file_priv == 0)
- break;
- if (i == 2 * RADEON_MAX_SURFACES) {
- return -1;
- }
- virt_surface_index = i;
-
- /* try to reuse an existing surface */
- for (i = 0; i < RADEON_MAX_SURFACES; i++) {
- /* extend before */
- if ((dev_priv->surfaces[i].refcount == 1) &&
- (new->flags == dev_priv->surfaces[i].flags) &&
- (new_upper + 1 == dev_priv->surfaces[i].lower)) {
- s = &(dev_priv->virt_surfaces[virt_surface_index]);
- s->surface_index = i;
- s->lower = new_lower;
- s->upper = new_upper;
- s->flags = new->flags;
- s->file_priv = file_priv;
- dev_priv->surfaces[i].refcount++;
- dev_priv->surfaces[i].lower = s->lower;
- radeon_apply_surface_regs(s->surface_index, dev_priv);
- return virt_surface_index;
- }
-
- /* extend after */
- if ((dev_priv->surfaces[i].refcount == 1) &&
- (new->flags == dev_priv->surfaces[i].flags) &&
- (new_lower == dev_priv->surfaces[i].upper + 1)) {
- s = &(dev_priv->virt_surfaces[virt_surface_index]);
- s->surface_index = i;
- s->lower = new_lower;
- s->upper = new_upper;
- s->flags = new->flags;
- s->file_priv = file_priv;
- dev_priv->surfaces[i].refcount++;
- dev_priv->surfaces[i].upper = s->upper;
- radeon_apply_surface_regs(s->surface_index, dev_priv);
- return virt_surface_index;
- }
- }
-
- /* okay, we need a new one */
- for (i = 0; i < RADEON_MAX_SURFACES; i++) {
- if (dev_priv->surfaces[i].refcount == 0) {
- s = &(dev_priv->virt_surfaces[virt_surface_index]);
- s->surface_index = i;
- s->lower = new_lower;
- s->upper = new_upper;
- s->flags = new->flags;
- s->file_priv = file_priv;
- dev_priv->surfaces[i].refcount = 1;
- dev_priv->surfaces[i].lower = s->lower;
- dev_priv->surfaces[i].upper = s->upper;
- dev_priv->surfaces[i].flags = s->flags;
- radeon_apply_surface_regs(s->surface_index, dev_priv);
- return virt_surface_index;
- }
- }
-
- /* we didn't find anything */
- return -1;
-}
-
-static int free_surface(struct drm_file *file_priv,
- drm_radeon_private_t * dev_priv,
- int lower)
-{
- struct radeon_virt_surface *s;
- int i;
- /* find the virtual surface */
- for (i = 0; i < 2 * RADEON_MAX_SURFACES; i++) {
- s = &(dev_priv->virt_surfaces[i]);
- if (s->file_priv) {
- if ((lower == s->lower) && (file_priv == s->file_priv))
- {
- if (dev_priv->surfaces[s->surface_index].
- lower == s->lower)
- dev_priv->surfaces[s->surface_index].
- lower = s->upper;
-
- if (dev_priv->surfaces[s->surface_index].
- upper == s->upper)
- dev_priv->surfaces[s->surface_index].
- upper = s->lower;
-
- dev_priv->surfaces[s->surface_index].refcount--;
- if (dev_priv->surfaces[s->surface_index].
- refcount == 0)
- dev_priv->surfaces[s->surface_index].
- flags = 0;
- s->file_priv = NULL;
- radeon_apply_surface_regs(s->surface_index,
- dev_priv);
- return 0;
- }
- }
- }
- return 1;
-}
-
-static void radeon_surfaces_release(struct drm_file *file_priv,
- drm_radeon_private_t * dev_priv)
-{
- int i;
- for (i = 0; i < 2 * RADEON_MAX_SURFACES; i++) {
- if (dev_priv->virt_surfaces[i].file_priv == file_priv)
- free_surface(file_priv, dev_priv,
- dev_priv->virt_surfaces[i].lower);
- }
-}
-
-/* ================================================================
- * IOCTL functions
- */
-static int radeon_surface_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_surface_alloc_t *alloc = data;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- if (alloc_surface(alloc, dev_priv, file_priv) == -1)
- return -EINVAL;
- else
- return 0;
-}
-
-static int radeon_surface_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_surface_free_t *memfree = data;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- if (free_surface(file_priv, dev_priv, memfree->address))
- return -EINVAL;
- else
- return 0;
-}
-
-static int radeon_cp_clear(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
- drm_radeon_clear_t *clear = data;
- drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
-
- if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
-
- if (DRM_COPY_FROM_USER(&depth_boxes, clear->depth_boxes,
- sarea_priv->nbox * sizeof(depth_boxes[0])))
- return -EFAULT;
-
- radeon_cp_dispatch_clear(dev, clear, depth_boxes);
-
- COMMIT_RING();
- return 0;
-}
-
-/* Not sure why this isn't set all the time:
- */
-static int radeon_do_init_pageflip(struct drm_device * dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- RING_LOCALS;
-
- DRM_DEBUG("\n");
-
- BEGIN_RING(6);
- RADEON_WAIT_UNTIL_3D_IDLE();
- OUT_RING(CP_PACKET0(RADEON_CRTC_OFFSET_CNTL, 0));
- OUT_RING(RADEON_READ(RADEON_CRTC_OFFSET_CNTL) |
- RADEON_CRTC_OFFSET_FLIP_CNTL);
- OUT_RING(CP_PACKET0(RADEON_CRTC2_OFFSET_CNTL, 0));
- OUT_RING(RADEON_READ(RADEON_CRTC2_OFFSET_CNTL) |
- RADEON_CRTC_OFFSET_FLIP_CNTL);
- ADVANCE_RING();
-
- dev_priv->page_flipping = 1;
-
- if (dev_priv->sarea_priv->pfCurrentPage != 1)
- dev_priv->sarea_priv->pfCurrentPage = 0;
-
- return 0;
-}
-
-/* Swapping and flipping are different operations, need different ioctls.
- * They can & should be intermixed to support multiple 3d windows.
- */
-static int radeon_cp_flip(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
-
- if (!dev_priv->page_flipping)
- radeon_do_init_pageflip(dev);
-
- radeon_cp_dispatch_flip(dev);
-
- COMMIT_RING();
- return 0;
-}
-
-static int radeon_cp_swap(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
-
- if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
- sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
-
- radeon_cp_dispatch_swap(dev);
- dev_priv->sarea_priv->ctx_owner = 0;
-
- COMMIT_RING();
- return 0;
-}
-
-static int radeon_cp_vertex(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_sarea_t *sarea_priv;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_radeon_vertex_t *vertex = data;
- drm_radeon_tcl_prim_t prim;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- sarea_priv = dev_priv->sarea_priv;
-
- DRM_DEBUG("pid=%d index=%d count=%d discard=%d\n",
- DRM_CURRENTPID, vertex->idx, vertex->count, vertex->discard);
-
- if (vertex->idx < 0 || vertex->idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- vertex->idx, dma->buf_count - 1);
- return -EINVAL;
- }
- if (vertex->prim < 0 || vertex->prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST) {
- DRM_ERROR("buffer prim %d\n", vertex->prim);
- return -EINVAL;
- }
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- buf = dma->buflist[vertex->idx];
-
- if (buf->file_priv != file_priv) {
- DRM_ERROR("process %d using buffer owned by %p\n",
- DRM_CURRENTPID, buf->file_priv);
- return -EINVAL;
- }
- if (buf->pending) {
- DRM_ERROR("sending pending buffer %d\n", vertex->idx);
- return -EINVAL;
- }
-
- /* Build up a prim_t record:
- */
- if (vertex->count) {
- buf->used = vertex->count; /* not used? */
-
- if (sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS) {
- if (radeon_emit_state(dev_priv, file_priv,
- &sarea_priv->context_state,
- sarea_priv->tex_state,
- sarea_priv->dirty)) {
- DRM_ERROR("radeon_emit_state failed\n");
- return -EINVAL;
- }
-
- sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES |
- RADEON_UPLOAD_TEX1IMAGES |
- RADEON_UPLOAD_TEX2IMAGES |
- RADEON_REQUIRE_QUIESCENCE);
- }
-
- prim.start = 0;
- prim.finish = vertex->count; /* unused */
- prim.prim = vertex->prim;
- prim.numverts = vertex->count;
- prim.vc_format = dev_priv->sarea_priv->vc_format;
-
- radeon_cp_dispatch_vertex(dev, buf, &prim);
- }
-
- if (vertex->discard) {
- radeon_cp_discard_buffer(dev, buf);
- }
-
- COMMIT_RING();
- return 0;
-}
-
-static int radeon_cp_indices(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_sarea_t *sarea_priv;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_radeon_indices_t *elts = data;
- drm_radeon_tcl_prim_t prim;
- int count;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
- sarea_priv = dev_priv->sarea_priv;
-
- DRM_DEBUG("pid=%d index=%d start=%d end=%d discard=%d\n",
- DRM_CURRENTPID, elts->idx, elts->start, elts->end,
- elts->discard);
-
- if (elts->idx < 0 || elts->idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- elts->idx, dma->buf_count - 1);
- return -EINVAL;
- }
- if (elts->prim < 0 || elts->prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST) {
- DRM_ERROR("buffer prim %d\n", elts->prim);
- return -EINVAL;
- }
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- buf = dma->buflist[elts->idx];
-
- if (buf->file_priv != file_priv) {
- DRM_ERROR("process %d using buffer owned by %p\n",
- DRM_CURRENTPID, buf->file_priv);
- return -EINVAL;
- }
- if (buf->pending) {
- DRM_ERROR("sending pending buffer %d\n", elts->idx);
- return -EINVAL;
- }
-
- count = (elts->end - elts->start) / sizeof(u16);
- elts->start -= RADEON_INDEX_PRIM_OFFSET;
-
- if (elts->start & 0x7) {
- DRM_ERROR("misaligned buffer 0x%x\n", elts->start);
- return -EINVAL;
- }
- if (elts->start < buf->used) {
- DRM_ERROR("no header 0x%x - 0x%x\n", elts->start, buf->used);
- return -EINVAL;
- }
-
- buf->used = elts->end;
-
- if (sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS) {
- if (radeon_emit_state(dev_priv, file_priv,
- &sarea_priv->context_state,
- sarea_priv->tex_state,
- sarea_priv->dirty)) {
- DRM_ERROR("radeon_emit_state failed\n");
- return -EINVAL;
- }
-
- sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES |
- RADEON_UPLOAD_TEX1IMAGES |
- RADEON_UPLOAD_TEX2IMAGES |
- RADEON_REQUIRE_QUIESCENCE);
- }
-
- /* Build up a prim_t record:
- */
- prim.start = elts->start;
- prim.finish = elts->end;
- prim.prim = elts->prim;
- prim.offset = 0; /* offset from start of dma buffers */
- prim.numverts = RADEON_MAX_VB_VERTS; /* duh */
- prim.vc_format = dev_priv->sarea_priv->vc_format;
-
- radeon_cp_dispatch_indices(dev, buf, &prim);
- if (elts->discard) {
- radeon_cp_discard_buffer(dev, buf);
- }
-
- COMMIT_RING();
- return 0;
-}
-
-static int radeon_cp_texture(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_texture_t *tex = data;
- drm_radeon_tex_image_t image;
- int ret;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (tex->image == NULL) {
- DRM_ERROR("null texture image!\n");
- return -EINVAL;
- }
-
- if (DRM_COPY_FROM_USER(&image,
- (drm_radeon_tex_image_t __user *) tex->image,
- sizeof(image)))
- return -EFAULT;
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- ret = radeon_cp_dispatch_texture(dev, file_priv, tex, &image);
-
- return ret;
-}
-
-static int radeon_cp_stipple(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_stipple_t *stipple = data;
- u32 mask[32];
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (DRM_COPY_FROM_USER(&mask, stipple->mask, 32 * sizeof(u32)))
- return -EFAULT;
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
-
- radeon_cp_dispatch_stipple(dev, mask);
-
- COMMIT_RING();
- return 0;
-}
-
-static int radeon_cp_indirect(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_radeon_indirect_t *indirect = data;
- RING_LOCALS;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("idx=%d s=%d e=%d d=%d\n",
- indirect->idx, indirect->start, indirect->end,
- indirect->discard);
-
- if (indirect->idx < 0 || indirect->idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- indirect->idx, dma->buf_count - 1);
- return -EINVAL;
- }
-
- buf = dma->buflist[indirect->idx];
-
- if (buf->file_priv != file_priv) {
- DRM_ERROR("process %d using buffer owned by %p\n",
- DRM_CURRENTPID, buf->file_priv);
- return -EINVAL;
- }
- if (buf->pending) {
- DRM_ERROR("sending pending buffer %d\n", indirect->idx);
- return -EINVAL;
- }
-
- if (indirect->start < buf->used) {
- DRM_ERROR("reusing indirect: start=0x%x actual=0x%x\n",
- indirect->start, buf->used);
- return -EINVAL;
- }
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- buf->used = indirect->end;
-
- /* Wait for the 3D stream to idle before the indirect buffer
- * containing 2D acceleration commands is processed.
- */
- BEGIN_RING(2);
-
- RADEON_WAIT_UNTIL_3D_IDLE();
-
- ADVANCE_RING();
-
- /* Dispatch the indirect buffer full of commands from the
- * X server. This is insecure and is thus only available to
- * privileged clients.
- */
- radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
- if (indirect->discard) {
- radeon_cp_discard_buffer(dev, buf);
- }
-
- COMMIT_RING();
- return 0;
-}
-
-static int radeon_cp_vertex2(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_sarea_t *sarea_priv;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_radeon_vertex2_t *vertex = data;
- int i;
- unsigned char laststate;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- sarea_priv = dev_priv->sarea_priv;
-
- DRM_DEBUG("pid=%d index=%d discard=%d\n",
- DRM_CURRENTPID, vertex->idx, vertex->discard);
-
- if (vertex->idx < 0 || vertex->idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- vertex->idx, dma->buf_count - 1);
- return -EINVAL;
- }
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- buf = dma->buflist[vertex->idx];
-
- if (buf->file_priv != file_priv) {
- DRM_ERROR("process %d using buffer owned by %p\n",
- DRM_CURRENTPID, buf->file_priv);
- return -EINVAL;
- }
-
- if (buf->pending) {
- DRM_ERROR("sending pending buffer %d\n", vertex->idx);
- return -EINVAL;
- }
-
- if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
- return -EINVAL;
-
- for (laststate = 0xff, i = 0; i < vertex->nr_prims; i++) {
- drm_radeon_prim_t prim;
- drm_radeon_tcl_prim_t tclprim;
-
- if (DRM_COPY_FROM_USER(&prim, &vertex->prim[i], sizeof(prim)))
- return -EFAULT;
-
- if (prim.stateidx != laststate) {
- drm_radeon_state_t state;
-
- if (DRM_COPY_FROM_USER(&state,
- &vertex->state[prim.stateidx],
- sizeof(state)))
- return -EFAULT;
-
- if (radeon_emit_state2(dev_priv, file_priv, &state)) {
- DRM_ERROR("radeon_emit_state2 failed\n");
- return -EINVAL;
- }
-
- laststate = prim.stateidx;
- }
-
- tclprim.start = prim.start;
- tclprim.finish = prim.finish;
- tclprim.prim = prim.prim;
- tclprim.vc_format = prim.vc_format;
-
- if (prim.prim & RADEON_PRIM_WALK_IND) {
- tclprim.offset = prim.numverts * 64;
- tclprim.numverts = RADEON_MAX_VB_VERTS; /* duh */
-
- radeon_cp_dispatch_indices(dev, buf, &tclprim);
- } else {
- tclprim.numverts = prim.numverts;
- tclprim.offset = 0; /* not used */
-
- radeon_cp_dispatch_vertex(dev, buf, &tclprim);
- }
-
- if (sarea_priv->nbox == 1)
- sarea_priv->nbox = 0;
- }
-
- if (vertex->discard) {
- radeon_cp_discard_buffer(dev, buf);
- }
-
- COMMIT_RING();
- return 0;
-}
-
-static int radeon_emit_packets(drm_radeon_private_t * dev_priv,
- struct drm_file *file_priv,
- drm_radeon_cmd_header_t header,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- int id = (int)header.packet.packet_id;
- int sz, reg;
- int *data = (int *)cmdbuf->buf;
- RING_LOCALS;
-
- if (id >= RADEON_MAX_STATE_PACKETS)
- return -EINVAL;
-
- sz = packet[id].len;
- reg = packet[id].start;
-
- if (sz * sizeof(int) > cmdbuf->bufsz) {
- DRM_ERROR("Packet size provided larger than data provided\n");
- return -EINVAL;
- }
-
- if (radeon_check_and_fixup_packets(dev_priv, file_priv, id, data)) {
- DRM_ERROR("Packet verification failed\n");
- return -EINVAL;
- }
-
- BEGIN_RING(sz + 1);
- OUT_RING(CP_PACKET0(reg, (sz - 1)));
- OUT_RING_TABLE(data, sz);
- ADVANCE_RING();
-
- cmdbuf->buf += sz * sizeof(int);
- cmdbuf->bufsz -= sz * sizeof(int);
- return 0;
-}
-
-static __inline__ int radeon_emit_scalars(drm_radeon_private_t *dev_priv,
- drm_radeon_cmd_header_t header,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- int sz = header.scalars.count;
- int start = header.scalars.offset;
- int stride = header.scalars.stride;
- RING_LOCALS;
-
- BEGIN_RING(3 + sz);
- OUT_RING(CP_PACKET0(RADEON_SE_TCL_SCALAR_INDX_REG, 0));
- OUT_RING(start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
- OUT_RING(CP_PACKET0_TABLE(RADEON_SE_TCL_SCALAR_DATA_REG, sz - 1));
- OUT_RING_TABLE(cmdbuf->buf, sz);
- ADVANCE_RING();
- cmdbuf->buf += sz * sizeof(int);
- cmdbuf->bufsz -= sz * sizeof(int);
- return 0;
-}
-
-/* God this is ugly
- */
-static __inline__ int radeon_emit_scalars2(drm_radeon_private_t *dev_priv,
- drm_radeon_cmd_header_t header,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- int sz = header.scalars.count;
- int start = ((unsigned int)header.scalars.offset) + 0x100;
- int stride = header.scalars.stride;
- RING_LOCALS;
-
- BEGIN_RING(3 + sz);
- OUT_RING(CP_PACKET0(RADEON_SE_TCL_SCALAR_INDX_REG, 0));
- OUT_RING(start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
- OUT_RING(CP_PACKET0_TABLE(RADEON_SE_TCL_SCALAR_DATA_REG, sz - 1));
- OUT_RING_TABLE(cmdbuf->buf, sz);
- ADVANCE_RING();
- cmdbuf->buf += sz * sizeof(int);
- cmdbuf->bufsz -= sz * sizeof(int);
- return 0;
-}
-
-static __inline__ int radeon_emit_vectors(drm_radeon_private_t *dev_priv,
- drm_radeon_cmd_header_t header,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- int sz = header.vectors.count;
- int start = header.vectors.offset;
- int stride = header.vectors.stride;
- RING_LOCALS;
-
- BEGIN_RING(5 + sz);
- OUT_RING_REG(RADEON_SE_TCL_STATE_FLUSH, 0);
- OUT_RING(CP_PACKET0(RADEON_SE_TCL_VECTOR_INDX_REG, 0));
- OUT_RING(start | (stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT));
- OUT_RING(CP_PACKET0_TABLE(RADEON_SE_TCL_VECTOR_DATA_REG, (sz - 1)));
- OUT_RING_TABLE(cmdbuf->buf, sz);
- ADVANCE_RING();
-
- cmdbuf->buf += sz * sizeof(int);
- cmdbuf->bufsz -= sz * sizeof(int);
- return 0;
-}
-
-static __inline__ int radeon_emit_veclinear(drm_radeon_private_t *dev_priv,
- drm_radeon_cmd_header_t header,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- int sz = header.veclinear.count * 4;
- int start = header.veclinear.addr_lo | (header.veclinear.addr_hi << 8);
- RING_LOCALS;
-
- if (!sz)
- return 0;
- if (sz * 4 > cmdbuf->bufsz)
- return -EINVAL;
-
- BEGIN_RING(5 + sz);
- OUT_RING_REG(RADEON_SE_TCL_STATE_FLUSH, 0);
- OUT_RING(CP_PACKET0(RADEON_SE_TCL_VECTOR_INDX_REG, 0));
- OUT_RING(start | (1 << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT));
- OUT_RING(CP_PACKET0_TABLE(RADEON_SE_TCL_VECTOR_DATA_REG, (sz - 1)));
- OUT_RING_TABLE(cmdbuf->buf, sz);
- ADVANCE_RING();
-
- cmdbuf->buf += sz * sizeof(int);
- cmdbuf->bufsz -= sz * sizeof(int);
- return 0;
-}
-
-static int radeon_emit_packet3(struct drm_device * dev,
- struct drm_file *file_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- unsigned int cmdsz;
- int ret;
- RING_LOCALS;
-
- DRM_DEBUG("\n");
-
- if ((ret = radeon_check_and_fixup_packet3(dev_priv, file_priv,
- cmdbuf, &cmdsz))) {
- DRM_ERROR("Packet verification failed\n");
- return ret;
- }
-
- BEGIN_RING(cmdsz);
- OUT_RING_TABLE(cmdbuf->buf, cmdsz);
- ADVANCE_RING();
-
- cmdbuf->buf += cmdsz * 4;
- cmdbuf->bufsz -= cmdsz * 4;
- return 0;
-}
-
-static int radeon_emit_packet3_cliprect(struct drm_device *dev,
- struct drm_file *file_priv,
- drm_radeon_kcmd_buffer_t *cmdbuf,
- int orig_nbox)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- struct drm_clip_rect box;
- unsigned int cmdsz;
- int ret;
- struct drm_clip_rect __user *boxes = cmdbuf->boxes;
- int i = 0;
- RING_LOCALS;
-
- DRM_DEBUG("\n");
-
- if ((ret = radeon_check_and_fixup_packet3(dev_priv, file_priv,
- cmdbuf, &cmdsz))) {
- DRM_ERROR("Packet verification failed\n");
- return ret;
- }
-
- if (!orig_nbox)
- goto out;
-
- do {
- if (i < cmdbuf->nbox) {
- if (DRM_COPY_FROM_USER(&box, &boxes[i], sizeof(box)))
- return -EFAULT;
- /* FIXME The second and subsequent times round
- * this loop, send a WAIT_UNTIL_3D_IDLE before
- * calling emit_clip_rect(). This fixes a
- * lockup on fast machines when sending
- * several cliprects with a cmdbuf, as when
- * waving a 2D window over a 3D
- * window. Something in the commands from user
- * space seems to hang the card when they're
- * sent several times in a row. That would be
- * the correct place to fix it but this works
- * around it until I can figure that out - Tim
- * Smith */
- if (i) {
- BEGIN_RING(2);
- RADEON_WAIT_UNTIL_3D_IDLE();
- ADVANCE_RING();
- }
- radeon_emit_clip_rect(dev_priv, &box);
- }
-
- BEGIN_RING(cmdsz);
- OUT_RING_TABLE(cmdbuf->buf, cmdsz);
- ADVANCE_RING();
-
- } while (++i < cmdbuf->nbox);
- if (cmdbuf->nbox == 1)
- cmdbuf->nbox = 0;
-
- out:
- cmdbuf->buf += cmdsz * 4;
- cmdbuf->bufsz -= cmdsz * 4;
- return 0;
-}
-
-static int radeon_emit_wait(struct drm_device * dev, int flags)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- RING_LOCALS;
-
- DRM_DEBUG("%x\n", flags);
- switch (flags) {
- case RADEON_WAIT_2D:
- BEGIN_RING(2);
- RADEON_WAIT_UNTIL_2D_IDLE();
- ADVANCE_RING();
- break;
- case RADEON_WAIT_3D:
- BEGIN_RING(2);
- RADEON_WAIT_UNTIL_3D_IDLE();
- ADVANCE_RING();
- break;
- case RADEON_WAIT_2D | RADEON_WAIT_3D:
- BEGIN_RING(2);
- RADEON_WAIT_UNTIL_IDLE();
- ADVANCE_RING();
- break;
- default:
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int radeon_cp_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf = NULL;
- int idx;
- drm_radeon_kcmd_buffer_t *cmdbuf = data;
- drm_radeon_cmd_header_t header;
- int orig_nbox, orig_bufsz;
- char *kbuf = NULL;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- RING_SPACE_TEST_WITH_RETURN(dev_priv);
- VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- if (cmdbuf->bufsz > 64 * 1024 || cmdbuf->bufsz < 0) {
- return -EINVAL;
- }
-
- /* Allocate an in-kernel area and copy in the cmdbuf. Do this to avoid
- * races between checking values and using those values in other code,
- * and simply to avoid a lot of function calls to copy in data.
- */
- orig_bufsz = cmdbuf->bufsz;
- if (orig_bufsz != 0) {
- kbuf = drm_alloc(cmdbuf->bufsz, DRM_MEM_DRIVER);
- if (kbuf == NULL)
- return -ENOMEM;
- if (DRM_COPY_FROM_USER(kbuf, (void __user *)cmdbuf->buf,
- cmdbuf->bufsz)) {
- drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
- return -EFAULT;
- }
- cmdbuf->buf = kbuf;
- }
-
- orig_nbox = cmdbuf->nbox;
-
- if (dev_priv->chip_family >= CHIP_R300) {
- int temp;
- temp = r300_do_cp_cmdbuf(dev, file_priv, cmdbuf);
-
- if (orig_bufsz != 0)
- drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
-
- return temp;
- }
-
- /* microcode_version != r300 */
- while (cmdbuf->bufsz >= sizeof(header)) {
-
- header.i = *(int *)cmdbuf->buf;
- cmdbuf->buf += sizeof(header);
- cmdbuf->bufsz -= sizeof(header);
-
- switch (header.header.cmd_type) {
- case RADEON_CMD_PACKET:
- DRM_DEBUG("RADEON_CMD_PACKET\n");
- if (radeon_emit_packets
- (dev_priv, file_priv, header, cmdbuf)) {
- DRM_ERROR("radeon_emit_packets failed\n");
- goto err;
- }
- break;
-
- case RADEON_CMD_SCALARS:
- DRM_DEBUG("RADEON_CMD_SCALARS\n");
- if (radeon_emit_scalars(dev_priv, header, cmdbuf)) {
- DRM_ERROR("radeon_emit_scalars failed\n");
- goto err;
- }
- break;
-
- case RADEON_CMD_VECTORS:
- DRM_DEBUG("RADEON_CMD_VECTORS\n");
- if (radeon_emit_vectors(dev_priv, header, cmdbuf)) {
- DRM_ERROR("radeon_emit_vectors failed\n");
- goto err;
- }
- break;
-
- case RADEON_CMD_DMA_DISCARD:
- DRM_DEBUG("RADEON_CMD_DMA_DISCARD\n");
- idx = header.dma.buf_idx;
- if (idx < 0 || idx >= dma->buf_count) {
- DRM_ERROR("buffer index %d (of %d max)\n",
- idx, dma->buf_count - 1);
- goto err;
- }
-
- buf = dma->buflist[idx];
- if (buf->file_priv != file_priv || buf->pending) {
- DRM_ERROR("bad buffer %p %p %d\n",
- buf->file_priv, file_priv,
- buf->pending);
- goto err;
- }
-
- radeon_cp_discard_buffer(dev, buf);
- break;
-
- case RADEON_CMD_PACKET3:
- DRM_DEBUG("RADEON_CMD_PACKET3\n");
- if (radeon_emit_packet3(dev, file_priv, cmdbuf)) {
- DRM_ERROR("radeon_emit_packet3 failed\n");
- goto err;
- }
- break;
-
- case RADEON_CMD_PACKET3_CLIP:
- DRM_DEBUG("RADEON_CMD_PACKET3_CLIP\n");
- if (radeon_emit_packet3_cliprect
- (dev, file_priv, cmdbuf, orig_nbox)) {
- DRM_ERROR("radeon_emit_packet3_clip failed\n");
- goto err;
- }
- break;
-
- case RADEON_CMD_SCALARS2:
- DRM_DEBUG("RADEON_CMD_SCALARS2\n");
- if (radeon_emit_scalars2(dev_priv, header, cmdbuf)) {
- DRM_ERROR("radeon_emit_scalars2 failed\n");
- goto err;
- }
- break;
-
- case RADEON_CMD_WAIT:
- DRM_DEBUG("RADEON_CMD_WAIT\n");
- if (radeon_emit_wait(dev, header.wait.flags)) {
- DRM_ERROR("radeon_emit_wait failed\n");
- goto err;
- }
- break;
- case RADEON_CMD_VECLINEAR:
- DRM_DEBUG("RADEON_CMD_VECLINEAR\n");
- if (radeon_emit_veclinear(dev_priv, header, cmdbuf)) {
- DRM_ERROR("radeon_emit_veclinear failed\n");
- goto err;
- }
- break;
-
- default:
- DRM_ERROR("bad cmd_type %d at %p\n",
- header.header.cmd_type,
- cmdbuf->buf - sizeof(header));
- goto err;
- }
- }
-
- if (orig_bufsz != 0)
- drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
-
- DRM_DEBUG("DONE\n");
- COMMIT_RING();
- return 0;
-
- err:
- if (orig_bufsz != 0)
- drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
- return -EINVAL;
-}
-
-static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_getparam_t *param = data;
- int value;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
-
- switch (param->param) {
- case RADEON_PARAM_GART_BUFFER_OFFSET:
- value = dev_priv->gart_buffers_offset;
- break;
- case RADEON_PARAM_LAST_FRAME:
- dev_priv->stats.last_frame_reads++;
- value = GET_SCRATCH(0);
- break;
- case RADEON_PARAM_LAST_DISPATCH:
- value = GET_SCRATCH(1);
- break;
- case RADEON_PARAM_LAST_CLEAR:
- dev_priv->stats.last_clear_reads++;
- value = GET_SCRATCH(2);
- break;
- case RADEON_PARAM_IRQ_NR:
- value = dev->irq;
- break;
- case RADEON_PARAM_GART_BASE:
- value = dev_priv->gart_vm_start;
- break;
- case RADEON_PARAM_REGISTER_HANDLE:
- value = dev_priv->mmio->offset;
- break;
- case RADEON_PARAM_STATUS_HANDLE:
- value = dev_priv->ring_rptr_offset;
- break;
-#ifndef __LP64__
- /*
- * This ioctl() doesn't work on 64-bit platforms because hw_lock is a
- * pointer which can't fit into an int-sized variable. According to
- * Michel Dänzer, the ioctl() is only used on embedded platforms, so
- * not supporting it shouldn't be a problem. If the same functionality
- * is needed on 64-bit platforms, a new ioctl() would have to be added,
- * so backwards-compatibility for the embedded platforms can be
- * maintained. --davidm 4-Feb-2004.
- */
- case RADEON_PARAM_SAREA_HANDLE:
- /* The lock is the first dword in the sarea. */
- value = (long)dev->lock.hw_lock;
- break;
-#endif
- case RADEON_PARAM_GART_TEX_HANDLE:
- value = dev_priv->gart_textures_offset;
- break;
- case RADEON_PARAM_SCRATCH_OFFSET:
- if (!dev_priv->writeback_works)
- return -EINVAL;
- value = RADEON_SCRATCH_REG_OFFSET;
- break;
-
- case RADEON_PARAM_CARD_TYPE:
- if (dev_priv->flags & RADEON_IS_PCIE)
- value = RADEON_CARD_PCIE;
- else if (dev_priv->flags & RADEON_IS_AGP)
- value = RADEON_CARD_AGP;
- else
- value = RADEON_CARD_PCI;
- break;
- case RADEON_PARAM_VBLANK_CRTC:
- value = radeon_vblank_crtc_get(dev);
- break;
- case RADEON_PARAM_FB_LOCATION:
- value = radeon_read_fb_location(dev_priv);
- break;
- case RADEON_PARAM_NUM_GB_PIPES:
- value = dev_priv->num_gb_pipes;
- break;
- default:
- DRM_DEBUG( "Invalid parameter %d\n", param->param );
- return -EINVAL;
- }
-
- if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
- DRM_ERROR("copy_to_user\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-static int radeon_cp_setparam(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- drm_radeon_setparam_t *sp = data;
- struct drm_radeon_driver_file_fields *radeon_priv;
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- switch (sp->param) {
- case RADEON_SETPARAM_FB_LOCATION:
- radeon_priv = file_priv->driver_priv;
- radeon_priv->radeon_fb_delta = dev_priv->fb_location -
- sp->value;
- break;
- case RADEON_SETPARAM_SWITCH_TILING:
- if (sp->value == 0) {
- DRM_DEBUG("color tiling disabled\n");
- dev_priv->front_pitch_offset &= ~RADEON_DST_TILE_MACRO;
- dev_priv->back_pitch_offset &= ~RADEON_DST_TILE_MACRO;
- if (dev_priv->sarea_priv)
- dev_priv->sarea_priv->tiling_enabled = 0;
- } else if (sp->value == 1) {
- DRM_DEBUG("color tiling enabled\n");
- dev_priv->front_pitch_offset |= RADEON_DST_TILE_MACRO;
- dev_priv->back_pitch_offset |= RADEON_DST_TILE_MACRO;
- if (dev_priv->sarea_priv)
- dev_priv->sarea_priv->tiling_enabled = 1;
- }
- break;
- case RADEON_SETPARAM_PCIGART_LOCATION:
- dev_priv->pcigart_offset = sp->value;
- dev_priv->pcigart_offset_set = 1;
- break;
- case RADEON_SETPARAM_NEW_MEMMAP:
- dev_priv->new_memmap = sp->value;
- break;
- case RADEON_SETPARAM_PCIGART_TABLE_SIZE:
- dev_priv->gart_info.table_size = sp->value;
- if (dev_priv->gart_info.table_size < RADEON_PCIGART_TABLE_SIZE)
- dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE;
- break;
- case RADEON_SETPARAM_VBLANK_CRTC:
- return radeon_vblank_crtc_set(dev, sp->value);
- break;
- default:
- DRM_DEBUG("Invalid parameter %d\n", sp->param);
- return -EINVAL;
- }
-
- return 0;
-}
-
-/* When a client dies:
- * - Check for and clean up flipped page state
- * - Free any alloced GART memory.
- * - Free any alloced radeon surfaces.
- *
- * DRM infrastructure takes care of reclaiming dma buffers.
- */
-void radeon_driver_preclose(struct drm_device *dev,
- struct drm_file *file_priv)
-{
- if (dev->dev_private) {
- drm_radeon_private_t *dev_priv = dev->dev_private;
- dev_priv->page_flipping = 0;
- radeon_mem_release(file_priv, dev_priv->gart_heap);
- radeon_mem_release(file_priv, dev_priv->fb_heap);
- radeon_surfaces_release(file_priv, dev_priv);
- }
-}
-
-void radeon_driver_lastclose(struct drm_device *dev)
-{
- if (dev->dev_private) {
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- if (dev_priv->sarea_priv &&
- dev_priv->sarea_priv->pfCurrentPage != 0)
- radeon_cp_dispatch_flip(dev);
- }
-
- radeon_do_release(dev);
-}
-
-int radeon_driver_open(struct drm_device *dev, struct drm_file *file_priv)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
- struct drm_radeon_driver_file_fields *radeon_priv;
-
- DRM_DEBUG("\n");
- radeon_priv =
- (struct drm_radeon_driver_file_fields *)
- drm_alloc(sizeof(*radeon_priv), DRM_MEM_FILES);
-
- if (!radeon_priv)
- return -ENOMEM;
-
- file_priv->driver_priv = radeon_priv;
-
- if (dev_priv)
- radeon_priv->radeon_fb_delta = dev_priv->fb_location;
- else
- radeon_priv->radeon_fb_delta = 0;
- return 0;
-}
-
-void radeon_driver_postclose(struct drm_device *dev, struct drm_file *file_priv)
-{
- struct drm_radeon_driver_file_fields *radeon_priv =
- file_priv->driver_priv;
-
- drm_free(radeon_priv, sizeof(*radeon_priv), DRM_MEM_FILES);
-}
-
-struct drm_ioctl_desc radeon_ioctls[] = {
- DRM_IOCTL_DEF(DRM_RADEON_CP_INIT, radeon_cp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_RADEON_CP_START, radeon_cp_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_RADEON_CP_STOP, radeon_cp_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_RADEON_CP_RESET, radeon_cp_reset, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_RADEON_CP_IDLE, radeon_cp_idle, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_CP_RESUME, radeon_cp_resume, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_RESET, radeon_engine_reset, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_FULLSCREEN, radeon_fullscreen, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_SWAP, radeon_cp_swap, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_CLEAR, radeon_cp_clear, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_VERTEX, radeon_cp_vertex, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_INDICES, radeon_cp_indices, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_TEXTURE, radeon_cp_texture, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_STIPPLE, radeon_cp_stipple, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_INDIRECT, radeon_cp_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_RADEON_VERTEX2, radeon_cp_vertex2, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_CMDBUF, radeon_cp_cmdbuf, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_GETPARAM, radeon_cp_getparam, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_FLIP, radeon_cp_flip, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_ALLOC, radeon_mem_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_FREE, radeon_mem_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_INIT_HEAP, radeon_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, radeon_irq_emit, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free, DRM_AUTH)
-};
-
-int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);
+++ /dev/null
-/* savage_bci.c -- BCI support for Savage
- *
- * Copyright 2004 Felix Kuehling
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
- * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include "drmP.h"
-#include "savage_drm.h"
-#include "savage_drv.h"
-
-/* Need a long timeout for shadow status updates can take a while
- * and so can waiting for events when the queue is full. */
-#define SAVAGE_DEFAULT_USEC_TIMEOUT 1000000 /* 1s */
-#define SAVAGE_EVENT_USEC_TIMEOUT 5000000 /* 5s */
-#define SAVAGE_FREELIST_DEBUG 0
-
-static int savage_do_cleanup_bci(struct drm_device *dev);
-
-static int
-savage_bci_wait_fifo_shadow(drm_savage_private_t *dev_priv, unsigned int n)
-{
- uint32_t mask = dev_priv->status_used_mask;
- uint32_t threshold = dev_priv->bci_threshold_hi;
- uint32_t status;
- int i;
-
-#if SAVAGE_BCI_DEBUG
- if (n > dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - threshold)
- DRM_ERROR("Trying to emit %d words "
- "(more than guaranteed space in COB)\n", n);
-#endif
-
- for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) {
- DRM_MEMORYBARRIER();
- status = dev_priv->status_ptr[0];
- if ((status & mask) < threshold)
- return 0;
- DRM_UDELAY(1);
- }
-
-#if SAVAGE_BCI_DEBUG
- DRM_ERROR("failed!\n");
- DRM_INFO(" status=0x%08x, threshold=0x%08x\n", status, threshold);
-#endif
- return -EBUSY;
-}
-
-static int
-savage_bci_wait_fifo_s3d(drm_savage_private_t *dev_priv, unsigned int n)
-{
- uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n;
- uint32_t status;
- int i;
-
- for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) {
- status = SAVAGE_READ(SAVAGE_STATUS_WORD0);
- if ((status & SAVAGE_FIFO_USED_MASK_S3D) <= maxUsed)
- return 0;
- DRM_UDELAY(1);
- }
-
-#if SAVAGE_BCI_DEBUG
- DRM_ERROR("failed!\n");
- DRM_INFO(" status=0x%08x\n", status);
-#endif
- return -EBUSY;
-}
-
-static int
-savage_bci_wait_fifo_s4(drm_savage_private_t *dev_priv, unsigned int n)
-{
- uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n;
- uint32_t status;
- int i;
-
- for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) {
- status = SAVAGE_READ(SAVAGE_ALT_STATUS_WORD0);
- if ((status & SAVAGE_FIFO_USED_MASK_S4) <= maxUsed)
- return 0;
- DRM_UDELAY(1);
- }
-
-#if SAVAGE_BCI_DEBUG
- DRM_ERROR("failed!\n");
- DRM_INFO(" status=0x%08x\n", status);
-#endif
- return -EBUSY;
-}
-
-/*
- * Waiting for events.
- *
- * The BIOSresets the event tag to 0 on mode changes. Therefore we
- * never emit 0 to the event tag. If we find a 0 event tag we know the
- * BIOS stomped on it and return success assuming that the BIOS waited
- * for engine idle.
- *
- * Note: if the Xserver uses the event tag it has to follow the same
- * rule. Otherwise there may be glitches every 2^16 events.
- */
-static int
-savage_bci_wait_event_shadow(drm_savage_private_t *dev_priv, uint16_t e)
-{
- uint32_t status;
- int i;
-
- for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) {
- DRM_MEMORYBARRIER();
- status = dev_priv->status_ptr[1];
- if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff ||
- (status & 0xffff) == 0)
- return 0;
- DRM_UDELAY(1);
- }
-
-#if SAVAGE_BCI_DEBUG
- DRM_ERROR("failed!\n");
- DRM_INFO(" status=0x%08x, e=0x%04x\n", status, e);
-#endif
-
- return -EBUSY;
-}
-
-static int
-savage_bci_wait_event_reg(drm_savage_private_t *dev_priv, uint16_t e)
-{
- uint32_t status;
- int i;
-
- for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) {
- status = SAVAGE_READ(SAVAGE_STATUS_WORD1);
- if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff ||
- (status & 0xffff) == 0)
- return 0;
- DRM_UDELAY(1);
- }
-
-#if SAVAGE_BCI_DEBUG
- DRM_ERROR("failed!\n");
- DRM_INFO(" status=0x%08x, e=0x%04x\n", status, e);
-#endif
-
- return -EBUSY;
-}
-
-uint16_t savage_bci_emit_event(drm_savage_private_t *dev_priv,
- unsigned int flags)
-{
- uint16_t count;
- BCI_LOCALS;
-
- if (dev_priv->status_ptr) {
- /* coordinate with Xserver */
- count = dev_priv->status_ptr[1023];
- if (count < dev_priv->event_counter)
- dev_priv->event_wrap++;
- } else {
- count = dev_priv->event_counter;
- }
- count = (count + 1) & 0xffff;
- if (count == 0) {
- count++; /* See the comment above savage_wait_event_*. */
- dev_priv->event_wrap++;
- }
- dev_priv->event_counter = count;
- if (dev_priv->status_ptr)
- dev_priv->status_ptr[1023] = (uint32_t)count;
-
- if ((flags & (SAVAGE_WAIT_2D | SAVAGE_WAIT_3D))) {
- unsigned int wait_cmd = BCI_CMD_WAIT;
- if ((flags & SAVAGE_WAIT_2D))
- wait_cmd |= BCI_CMD_WAIT_2D;
- if ((flags & SAVAGE_WAIT_3D))
- wait_cmd |= BCI_CMD_WAIT_3D;
- BEGIN_BCI(2);
- BCI_WRITE(wait_cmd);
- } else {
- BEGIN_BCI(1);
- }
- BCI_WRITE(BCI_CMD_UPDATE_EVENT_TAG | (uint32_t)count);
-
- return count;
-}
-
-/*
- * Freelist management
- */
-static int savage_freelist_init(struct drm_device *dev)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *buf;
- drm_savage_buf_priv_t *entry;
- int i;
- DRM_DEBUG("count=%d\n", dma->buf_count);
-
- dev_priv->head.next = &dev_priv->tail;
- dev_priv->head.prev = NULL;
- dev_priv->head.buf = NULL;
-
- dev_priv->tail.next = NULL;
- dev_priv->tail.prev = &dev_priv->head;
- dev_priv->tail.buf = NULL;
-
- for (i = 0; i < dma->buf_count; i++) {
- buf = dma->buflist[i];
- entry = buf->dev_private;
-
- SET_AGE(&entry->age, 0, 0);
- entry->buf = buf;
-
- entry->next = dev_priv->head.next;
- entry->prev = &dev_priv->head;
- dev_priv->head.next->prev = entry;
- dev_priv->head.next = entry;
- }
-
- return 0;
-}
-
-static struct drm_buf *savage_freelist_get(struct drm_device *dev)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
- drm_savage_buf_priv_t *tail = dev_priv->tail.prev;
- uint16_t event;
- unsigned int wrap;
- DRM_DEBUG("\n");
-
- UPDATE_EVENT_COUNTER();
- if (dev_priv->status_ptr)
- event = dev_priv->status_ptr[1] & 0xffff;
- else
- event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff;
- wrap = dev_priv->event_wrap;
- if (event > dev_priv->event_counter)
- wrap--; /* hardware hasn't passed the last wrap yet */
-
- DRM_DEBUG(" tail=0x%04x %d\n", tail->age.event, tail->age.wrap);
- DRM_DEBUG(" head=0x%04x %d\n", event, wrap);
-
- if (tail->buf && (TEST_AGE(&tail->age, event, wrap) || event == 0)) {
- drm_savage_buf_priv_t *next = tail->next;
- drm_savage_buf_priv_t *prev = tail->prev;
- prev->next = next;
- next->prev = prev;
- tail->next = tail->prev = NULL;
- return tail->buf;
- }
-
- DRM_DEBUG("returning NULL, tail->buf=%p!\n", tail->buf);
- return NULL;
-}
-
-void savage_freelist_put(struct drm_device *dev, struct drm_buf *buf)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
- drm_savage_buf_priv_t *entry = buf->dev_private, *prev, *next;
-
- DRM_DEBUG("age=0x%04x wrap=%d\n", entry->age.event, entry->age.wrap);
-
- if (entry->next != NULL || entry->prev != NULL) {
- DRM_ERROR("entry already on freelist.\n");
- return;
- }
-
- prev = &dev_priv->head;
- next = prev->next;
- prev->next = entry;
- next->prev = entry;
- entry->prev = prev;
- entry->next = next;
-}
-
-/*
- * Command DMA
- */
-static int savage_dma_init(drm_savage_private_t *dev_priv)
-{
- unsigned int i;
-
- dev_priv->nr_dma_pages = dev_priv->cmd_dma->size /
- (SAVAGE_DMA_PAGE_SIZE*4);
- dev_priv->dma_pages = drm_alloc(sizeof(drm_savage_dma_page_t) *
- dev_priv->nr_dma_pages, DRM_MEM_DRIVER);
- if (dev_priv->dma_pages == NULL)
- return -ENOMEM;
-
- for (i = 0; i < dev_priv->nr_dma_pages; ++i) {
- SET_AGE(&dev_priv->dma_pages[i].age, 0, 0);
- dev_priv->dma_pages[i].used = 0;
- dev_priv->dma_pages[i].flushed = 0;
- }
- SET_AGE(&dev_priv->last_dma_age, 0, 0);
-
- dev_priv->first_dma_page = 0;
- dev_priv->current_dma_page = 0;
-
- return 0;
-}
-
-void savage_dma_reset(drm_savage_private_t *dev_priv)
-{
- uint16_t event;
- unsigned int wrap, i;
- event = savage_bci_emit_event(dev_priv, 0);
- wrap = dev_priv->event_wrap;
- for (i = 0; i < dev_priv->nr_dma_pages; ++i) {
- SET_AGE(&dev_priv->dma_pages[i].age, event, wrap);
- dev_priv->dma_pages[i].used = 0;
- dev_priv->dma_pages[i].flushed = 0;
- }
- SET_AGE(&dev_priv->last_dma_age, event, wrap);
- dev_priv->first_dma_page = dev_priv->current_dma_page = 0;
-}
-
-void savage_dma_wait(drm_savage_private_t *dev_priv, unsigned int page)
-{
- uint16_t event;
- unsigned int wrap;
-
- /* Faked DMA buffer pages don't age. */
- if (dev_priv->cmd_dma == &dev_priv->fake_dma)
- return;
-
- UPDATE_EVENT_COUNTER();
- if (dev_priv->status_ptr)
- event = dev_priv->status_ptr[1] & 0xffff;
- else
- event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff;
- wrap = dev_priv->event_wrap;
- if (event > dev_priv->event_counter)
- wrap--; /* hardware hasn't passed the last wrap yet */
-
- if (dev_priv->dma_pages[page].age.wrap > wrap ||
- (dev_priv->dma_pages[page].age.wrap == wrap &&
- dev_priv->dma_pages[page].age.event > event)) {
- if (dev_priv->wait_evnt(dev_priv,
- dev_priv->dma_pages[page].age.event)
- < 0)
- DRM_ERROR("wait_evnt failed!\n");
- }
-}
-
-uint32_t *savage_dma_alloc(drm_savage_private_t *dev_priv, unsigned int n)
-{
- unsigned int cur = dev_priv->current_dma_page;
- unsigned int rest = SAVAGE_DMA_PAGE_SIZE -
- dev_priv->dma_pages[cur].used;
- unsigned int nr_pages = (n - rest + SAVAGE_DMA_PAGE_SIZE - 1) /
- SAVAGE_DMA_PAGE_SIZE;
- uint32_t *dma_ptr;
- unsigned int i;
-
- DRM_DEBUG("cur=%u, cur->used=%u, n=%u, rest=%u, nr_pages=%u\n",
- cur, dev_priv->dma_pages[cur].used, n, rest, nr_pages);
-
- if (cur + nr_pages < dev_priv->nr_dma_pages) {
- dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +
- cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used;
- if (n < rest)
- rest = n;
- dev_priv->dma_pages[cur].used += rest;
- n -= rest;
- cur++;
- } else {
- dev_priv->dma_flush(dev_priv);
- nr_pages =
- (n + SAVAGE_DMA_PAGE_SIZE - 1) / SAVAGE_DMA_PAGE_SIZE;
- for (i = cur; i < dev_priv->nr_dma_pages; ++i) {
- dev_priv->dma_pages[i].age = dev_priv->last_dma_age;
- dev_priv->dma_pages[i].used = 0;
- dev_priv->dma_pages[i].flushed = 0;
- }
- dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle;
- dev_priv->first_dma_page = cur = 0;
- }
- for (i = cur; nr_pages > 0; ++i, --nr_pages) {
-#if SAVAGE_DMA_DEBUG
- if (dev_priv->dma_pages[i].used) {
- DRM_ERROR("unflushed page %u: used=%u\n",
- i, dev_priv->dma_pages[i].used);
- }
-#endif
- if (n > SAVAGE_DMA_PAGE_SIZE)
- dev_priv->dma_pages[i].used = SAVAGE_DMA_PAGE_SIZE;
- else
- dev_priv->dma_pages[i].used = n;
- n -= SAVAGE_DMA_PAGE_SIZE;
- }
- dev_priv->current_dma_page = --i;
-
- DRM_DEBUG("cur=%u, cur->used=%u, n=%u\n",
- i, dev_priv->dma_pages[i].used, n);
-
- savage_dma_wait(dev_priv, dev_priv->current_dma_page);
-
- return dma_ptr;
-}
-
-static void savage_dma_flush(drm_savage_private_t *dev_priv)
-{
- unsigned int first = dev_priv->first_dma_page;
- unsigned int cur = dev_priv->current_dma_page;
- uint16_t event;
- unsigned int wrap, pad, align, len, i;
- unsigned long phys_addr;
- BCI_LOCALS;
-
- if (first == cur &&
- dev_priv->dma_pages[cur].used == dev_priv->dma_pages[cur].flushed)
- return;
-
- /* pad length to multiples of 2 entries
- * align start of next DMA block to multiles of 8 entries */
- pad = -dev_priv->dma_pages[cur].used & 1;
- align = -(dev_priv->dma_pages[cur].used + pad) & 7;
-
- DRM_DEBUG("first=%u, cur=%u, first->flushed=%u, cur->used=%u, "
- "pad=%u, align=%u\n",
- first, cur, dev_priv->dma_pages[first].flushed,
- dev_priv->dma_pages[cur].used, pad, align);
-
- /* pad with noops */
- if (pad) {
- uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +
- cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used;
- dev_priv->dma_pages[cur].used += pad;
- while (pad != 0) {
- *dma_ptr++ = BCI_CMD_WAIT;
- pad--;
- }
- }
-
- DRM_MEMORYBARRIER();
-
- /* do flush ... */
- phys_addr = dev_priv->cmd_dma->offset +
- (first * SAVAGE_DMA_PAGE_SIZE +
- dev_priv->dma_pages[first].flushed) * 4;
- len = (cur - first) * SAVAGE_DMA_PAGE_SIZE +
- dev_priv->dma_pages[cur].used - dev_priv->dma_pages[first].flushed;
-
- DRM_DEBUG("phys_addr=%lx, len=%u\n",
- phys_addr | dev_priv->dma_type, len);
-
- BEGIN_BCI(3);
- BCI_SET_REGISTERS(SAVAGE_DMABUFADDR, 1);
- BCI_WRITE(phys_addr | dev_priv->dma_type);
- BCI_DMA(len);
-
- /* fix alignment of the start of the next block */
- dev_priv->dma_pages[cur].used += align;
-
- /* age DMA pages */
- event = savage_bci_emit_event(dev_priv, 0);
- wrap = dev_priv->event_wrap;
- for (i = first; i < cur; ++i) {
- SET_AGE(&dev_priv->dma_pages[i].age, event, wrap);
- dev_priv->dma_pages[i].used = 0;
- dev_priv->dma_pages[i].flushed = 0;
- }
- /* age the current page only when it's full */
- if (dev_priv->dma_pages[cur].used == SAVAGE_DMA_PAGE_SIZE) {
- SET_AGE(&dev_priv->dma_pages[cur].age, event, wrap);
- dev_priv->dma_pages[cur].used = 0;
- dev_priv->dma_pages[cur].flushed = 0;
- /* advance to next page */
- cur++;
- if (cur == dev_priv->nr_dma_pages)
- cur = 0;
- dev_priv->first_dma_page = dev_priv->current_dma_page = cur;
- } else {
- dev_priv->first_dma_page = cur;
- dev_priv->dma_pages[cur].flushed = dev_priv->dma_pages[i].used;
- }
- SET_AGE(&dev_priv->last_dma_age, event, wrap);
-
- DRM_DEBUG("first=cur=%u, cur->used=%u, cur->flushed=%u\n", cur,
- dev_priv->dma_pages[cur].used,
- dev_priv->dma_pages[cur].flushed);
-}
-
-static void savage_fake_dma_flush(drm_savage_private_t *dev_priv)
-{
- unsigned int i, j;
- BCI_LOCALS;
-
- if (dev_priv->first_dma_page == dev_priv->current_dma_page &&
- dev_priv->dma_pages[dev_priv->current_dma_page].used == 0)
- return;
-
- DRM_DEBUG("first=%u, cur=%u, cur->used=%u\n",
- dev_priv->first_dma_page, dev_priv->current_dma_page,
- dev_priv->dma_pages[dev_priv->current_dma_page].used);
-
- for (i = dev_priv->first_dma_page;
- i <= dev_priv->current_dma_page && dev_priv->dma_pages[i].used;
- ++i) {
- uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +
- i * SAVAGE_DMA_PAGE_SIZE;
-#if SAVAGE_DMA_DEBUG
- /* Sanity check: all pages except the last one must be full. */
- if (i < dev_priv->current_dma_page &&
- dev_priv->dma_pages[i].used != SAVAGE_DMA_PAGE_SIZE) {
- DRM_ERROR("partial DMA page %u: used=%u",
- i, dev_priv->dma_pages[i].used);
- }
-#endif
- BEGIN_BCI(dev_priv->dma_pages[i].used);
- for (j = 0; j < dev_priv->dma_pages[i].used; ++j) {
- BCI_WRITE(dma_ptr[j]);
- }
- dev_priv->dma_pages[i].used = 0;
- }
-
- /* reset to first page */
- dev_priv->first_dma_page = dev_priv->current_dma_page = 0;
-}
-
-int savage_driver_load(struct drm_device *dev, unsigned long chipset)
-{
- drm_savage_private_t *dev_priv;
-
- dev_priv = drm_alloc(sizeof(drm_savage_private_t), DRM_MEM_DRIVER);
- if (dev_priv == NULL)
- return -ENOMEM;
-
- memset(dev_priv, 0, sizeof(drm_savage_private_t));
- dev->dev_private = (void *)dev_priv;
-
- dev_priv->chipset = (enum savage_family)chipset;
-
- return 0;
-}
-
-/*
- * Initalize mappings. On Savage4 and SavageIX the alignment
- * and size of the aperture is not suitable for automatic MTRR setup
- * in drm_addmap. Therefore we add them manually before the maps are
- * initialized, and tear them down on last close.
- */
-int savage_driver_firstopen(struct drm_device *dev)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
- unsigned long mmio_base, fb_base, fb_size, aperture_base;
- /* fb_rsrc and aper_rsrc aren't really used currently, but still exist
- * in case we decide we need information on the BAR for BSD in the
- * future.
- */
- unsigned int fb_rsrc, aper_rsrc;
- int ret = 0;
-
- dev_priv->mtrr[0].handle = -1;
- dev_priv->mtrr[1].handle = -1;
- dev_priv->mtrr[2].handle = -1;
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- fb_rsrc = 0;
- fb_base = drm_get_resource_start(dev, 0);
- fb_size = SAVAGE_FB_SIZE_S3;
- mmio_base = fb_base + SAVAGE_FB_SIZE_S3;
- aper_rsrc = 0;
- aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
- /* this should always be true */
- if (drm_get_resource_len(dev, 0) == 0x08000000) {
- /* Don't make MMIO write-cobining! We need 3
- * MTRRs. */
- dev_priv->mtrr[0].base = fb_base;
- dev_priv->mtrr[0].size = 0x01000000;
- dev_priv->mtrr[0].handle =
- drm_mtrr_add(dev_priv->mtrr[0].base,
- dev_priv->mtrr[0].size, DRM_MTRR_WC);
- dev_priv->mtrr[1].base = fb_base + 0x02000000;
- dev_priv->mtrr[1].size = 0x02000000;
- dev_priv->mtrr[1].handle =
- drm_mtrr_add(dev_priv->mtrr[1].base,
- dev_priv->mtrr[1].size, DRM_MTRR_WC);
- dev_priv->mtrr[2].base = fb_base + 0x04000000;
- dev_priv->mtrr[2].size = 0x04000000;
- dev_priv->mtrr[2].handle =
- drm_mtrr_add(dev_priv->mtrr[2].base,
- dev_priv->mtrr[2].size, DRM_MTRR_WC);
- } else {
- DRM_ERROR("strange pci_resource_len %08lx\n",
- drm_get_resource_len(dev, 0));
- }
- } else if (dev_priv->chipset != S3_SUPERSAVAGE &&
- dev_priv->chipset != S3_SAVAGE2000) {
- mmio_base = drm_get_resource_start(dev, 0);
- fb_rsrc = 1;
- fb_base = drm_get_resource_start(dev, 1);
- fb_size = SAVAGE_FB_SIZE_S4;
- aper_rsrc = 1;
- aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
- /* this should always be true */
- if (drm_get_resource_len(dev, 1) == 0x08000000) {
- /* Can use one MTRR to cover both fb and
- * aperture. */
- dev_priv->mtrr[0].base = fb_base;
- dev_priv->mtrr[0].size = 0x08000000;
- dev_priv->mtrr[0].handle =
- drm_mtrr_add(dev_priv->mtrr[0].base,
- dev_priv->mtrr[0].size, DRM_MTRR_WC);
- } else {
- DRM_ERROR("strange pci_resource_len %08lx\n",
- drm_get_resource_len(dev, 1));
- }
- } else {
- mmio_base = drm_get_resource_start(dev, 0);
- fb_rsrc = 1;
- fb_base = drm_get_resource_start(dev, 1);
- fb_size = drm_get_resource_len(dev, 1);
- aper_rsrc = 2;
- aperture_base = drm_get_resource_start(dev, 2);
- /* Automatic MTRR setup will do the right thing. */
- }
-
- ret = drm_addmap(dev, mmio_base, SAVAGE_MMIO_SIZE, _DRM_REGISTERS,
- _DRM_READ_ONLY, &dev_priv->mmio);
- if (ret)
- return ret;
-
- ret = drm_addmap(dev, fb_base, fb_size, _DRM_FRAME_BUFFER,
- _DRM_WRITE_COMBINING, &dev_priv->fb);
- if (ret)
- return ret;
-
- ret = drm_addmap(dev, aperture_base, SAVAGE_APERTURE_SIZE,
- _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING,
- &dev_priv->aperture);
- if (ret)
- return ret;
-
- return ret;
-}
-
-/*
- * Delete MTRRs and free device-private data.
- */
-void savage_driver_lastclose(struct drm_device *dev)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
- int i;
-
- for (i = 0; i < 3; ++i)
- if (dev_priv->mtrr[i].handle >= 0)
- drm_mtrr_del(dev_priv->mtrr[i].handle,
- dev_priv->mtrr[i].base,
- dev_priv->mtrr[i].size, DRM_MTRR_WC);
-}
-
-int savage_driver_unload(struct drm_device *dev)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
-
- drm_free(dev_priv, sizeof(drm_savage_private_t), DRM_MEM_DRIVER);
-
- return 0;
-}
-
-static int savage_do_init_bci(struct drm_device *dev, drm_savage_init_t *init)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
-
- if (init->fb_bpp != 16 && init->fb_bpp != 32) {
- DRM_ERROR("invalid frame buffer bpp %d!\n", init->fb_bpp);
- return -EINVAL;
- }
- if (init->depth_bpp != 16 && init->depth_bpp != 32) {
- DRM_ERROR("invalid depth buffer bpp %d!\n", init->fb_bpp);
- return -EINVAL;
- }
- if (init->dma_type != SAVAGE_DMA_AGP &&
- init->dma_type != SAVAGE_DMA_PCI) {
- DRM_ERROR("invalid dma memory type %d!\n", init->dma_type);
- return -EINVAL;
- }
-
- dev_priv->cob_size = init->cob_size;
- dev_priv->bci_threshold_lo = init->bci_threshold_lo;
- dev_priv->bci_threshold_hi = init->bci_threshold_hi;
- dev_priv->dma_type = init->dma_type;
-
- dev_priv->fb_bpp = init->fb_bpp;
- dev_priv->front_offset = init->front_offset;
- dev_priv->front_pitch = init->front_pitch;
- dev_priv->back_offset = init->back_offset;
- dev_priv->back_pitch = init->back_pitch;
- dev_priv->depth_bpp = init->depth_bpp;
- dev_priv->depth_offset = init->depth_offset;
- dev_priv->depth_pitch = init->depth_pitch;
-
- dev_priv->texture_offset = init->texture_offset;
- dev_priv->texture_size = init->texture_size;
-
- dev_priv->sarea = drm_getsarea(dev);
- if (!dev_priv->sarea) {
- DRM_ERROR("could not find sarea!\n");
- savage_do_cleanup_bci(dev);
- return -EINVAL;
- }
- if (init->status_offset != 0) {
- dev_priv->status = drm_core_findmap(dev, init->status_offset);
- if (!dev_priv->status) {
- DRM_ERROR("could not find shadow status region!\n");
- savage_do_cleanup_bci(dev);
- return -EINVAL;
- }
- } else {
- dev_priv->status = NULL;
- }
- if (dev_priv->dma_type == SAVAGE_DMA_AGP && init->buffers_offset) {
- dev->agp_buffer_token = init->buffers_offset;
- dev->agp_buffer_map = drm_core_findmap(dev,
- init->buffers_offset);
- if (!dev->agp_buffer_map) {
- DRM_ERROR("could not find DMA buffer region!\n");
- savage_do_cleanup_bci(dev);
- return -EINVAL;
- }
- drm_core_ioremap(dev->agp_buffer_map, dev);
- if (!dev->agp_buffer_map) {
- DRM_ERROR("failed to ioremap DMA buffer region!\n");
- savage_do_cleanup_bci(dev);
- return -ENOMEM;
- }
- }
- if (init->agp_textures_offset) {
- dev_priv->agp_textures =
- drm_core_findmap(dev, init->agp_textures_offset);
- if (!dev_priv->agp_textures) {
- DRM_ERROR("could not find agp texture region!\n");
- savage_do_cleanup_bci(dev);
- return -EINVAL;
- }
- } else {
- dev_priv->agp_textures = NULL;
- }
-
- if (init->cmd_dma_offset) {
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- DRM_ERROR("command DMA not supported on "
- "Savage3D/MX/IX.\n");
- savage_do_cleanup_bci(dev);
- return -EINVAL;
- }
- if (dev->dma && dev->dma->buflist) {
- DRM_ERROR("command and vertex DMA not supported "
- "at the same time.\n");
- savage_do_cleanup_bci(dev);
- return -EINVAL;
- }
- dev_priv->cmd_dma = drm_core_findmap(dev, init->cmd_dma_offset);
- if (!dev_priv->cmd_dma) {
- DRM_ERROR("could not find command DMA region!\n");
- savage_do_cleanup_bci(dev);
- return -EINVAL;
- }
- if (dev_priv->dma_type == SAVAGE_DMA_AGP) {
- if (dev_priv->cmd_dma->type != _DRM_AGP) {
- DRM_ERROR("AGP command DMA region is not a "
- "_DRM_AGP map!\n");
- savage_do_cleanup_bci(dev);
- return -EINVAL;
- }
- drm_core_ioremap(dev_priv->cmd_dma, dev);
- if (!dev_priv->cmd_dma->handle) {
- DRM_ERROR("failed to ioremap command "
- "DMA region!\n");
- savage_do_cleanup_bci(dev);
- return -ENOMEM;
- }
- } else if (dev_priv->cmd_dma->type != _DRM_CONSISTENT) {
- DRM_ERROR("PCI command DMA region is not a "
- "_DRM_CONSISTENT map!\n");
- savage_do_cleanup_bci(dev);
- return -EINVAL;
- }
- } else {
- dev_priv->cmd_dma = NULL;
- }
-
- dev_priv->dma_flush = savage_dma_flush;
- if (!dev_priv->cmd_dma) {
- DRM_DEBUG("falling back to faked command DMA.\n");
- dev_priv->fake_dma.offset = 0;
- dev_priv->fake_dma.size = SAVAGE_FAKE_DMA_SIZE;
- dev_priv->fake_dma.type = _DRM_SHM;
- dev_priv->fake_dma.handle = drm_alloc(SAVAGE_FAKE_DMA_SIZE,
- DRM_MEM_DRIVER);
- if (!dev_priv->fake_dma.handle) {
- DRM_ERROR("could not allocate faked DMA buffer!\n");
- savage_do_cleanup_bci(dev);
- return -ENOMEM;
- }
- dev_priv->cmd_dma = &dev_priv->fake_dma;
- dev_priv->dma_flush = savage_fake_dma_flush;
- }
-
- dev_priv->sarea_priv =
- (drm_savage_sarea_t *)((uint8_t *)dev_priv->sarea->handle +
- init->sarea_priv_offset);
-
- /* setup bitmap descriptors */
- {
- unsigned int color_tile_format;
- unsigned int depth_tile_format;
- unsigned int front_stride, back_stride, depth_stride;
- if (dev_priv->chipset <= S3_SAVAGE4) {
- color_tile_format = dev_priv->fb_bpp == 16 ?
- SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP;
- depth_tile_format = dev_priv->depth_bpp == 16 ?
- SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP;
- } else {
- color_tile_format = SAVAGE_BD_TILE_DEST;
- depth_tile_format = SAVAGE_BD_TILE_DEST;
- }
- front_stride = dev_priv->front_pitch / (dev_priv->fb_bpp / 8);
- back_stride = dev_priv->back_pitch / (dev_priv->fb_bpp / 8);
- depth_stride =
- dev_priv->depth_pitch / (dev_priv->depth_bpp / 8);
-
- dev_priv->front_bd = front_stride | SAVAGE_BD_BW_DISABLE |
- (dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) |
- (color_tile_format << SAVAGE_BD_TILE_SHIFT);
-
- dev_priv-> back_bd = back_stride | SAVAGE_BD_BW_DISABLE |
- (dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) |
- (color_tile_format << SAVAGE_BD_TILE_SHIFT);
-
- dev_priv->depth_bd = depth_stride | SAVAGE_BD_BW_DISABLE |
- (dev_priv->depth_bpp << SAVAGE_BD_BPP_SHIFT) |
- (depth_tile_format << SAVAGE_BD_TILE_SHIFT);
- }
-
- /* setup status and bci ptr */
- dev_priv->event_counter = 0;
- dev_priv->event_wrap = 0;
- dev_priv->bci_ptr = (volatile uint32_t *)
- ((uint8_t *)dev_priv->mmio->handle + SAVAGE_BCI_OFFSET);
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S3D;
- } else {
- dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S4;
- }
- if (dev_priv->status != NULL) {
- dev_priv->status_ptr =
- (volatile uint32_t *)dev_priv->status->handle;
- dev_priv->wait_fifo = savage_bci_wait_fifo_shadow;
- dev_priv->wait_evnt = savage_bci_wait_event_shadow;
- dev_priv->status_ptr[1023] = dev_priv->event_counter;
- } else {
- dev_priv->status_ptr = NULL;
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- dev_priv->wait_fifo = savage_bci_wait_fifo_s3d;
- } else {
- dev_priv->wait_fifo = savage_bci_wait_fifo_s4;
- }
- dev_priv->wait_evnt = savage_bci_wait_event_reg;
- }
-
- /* cliprect functions */
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset))
- dev_priv->emit_clip_rect = savage_emit_clip_rect_s3d;
- else
- dev_priv->emit_clip_rect = savage_emit_clip_rect_s4;
-
- if (savage_freelist_init(dev) < 0) {
- DRM_ERROR("could not initialize freelist\n");
- savage_do_cleanup_bci(dev);
- return -ENOMEM;
- }
-
- if (savage_dma_init(dev_priv) < 0) {
- DRM_ERROR("could not initialize command DMA\n");
- savage_do_cleanup_bci(dev);
- return -ENOMEM;
- }
-
- return 0;
-}
-
-static int savage_do_cleanup_bci(struct drm_device *dev)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
-
- if (dev_priv->cmd_dma == &dev_priv->fake_dma) {
- if (dev_priv->fake_dma.handle)
- drm_free(dev_priv->fake_dma.handle,
- SAVAGE_FAKE_DMA_SIZE, DRM_MEM_DRIVER);
- } else if (dev_priv->cmd_dma && dev_priv->cmd_dma->handle &&
- dev_priv->cmd_dma->type == _DRM_AGP &&
- dev_priv->dma_type == SAVAGE_DMA_AGP)
- drm_core_ioremapfree(dev_priv->cmd_dma, dev);
-
- if (dev_priv->dma_type == SAVAGE_DMA_AGP &&
- dev->agp_buffer_map && dev->agp_buffer_map->handle) {
- drm_core_ioremapfree(dev->agp_buffer_map, dev);
- /* make sure the next instance (which may be running
- * in PCI mode) doesn't try to use an old
- * agp_buffer_map. */
- dev->agp_buffer_map = NULL;
- }
-
- if (dev_priv->dma_pages)
- drm_free(dev_priv->dma_pages,
- sizeof(drm_savage_dma_page_t)*dev_priv->nr_dma_pages,
- DRM_MEM_DRIVER);
-
- return 0;
-}
-
-static int savage_bci_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_savage_init_t *init = data;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- switch (init->func) {
- case SAVAGE_INIT_BCI:
- return savage_do_init_bci(dev, init);
- case SAVAGE_CLEANUP_BCI:
- return savage_do_cleanup_bci(dev);
- }
-
- return -EINVAL;
-}
-
-static int savage_bci_event_emit(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
- drm_savage_event_emit_t *event = data;
-
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- event->count = savage_bci_emit_event(dev_priv, event->flags);
- event->count |= dev_priv->event_wrap << 16;
-
- return 0;
-}
-
-static int savage_bci_event_wait(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
- drm_savage_event_wait_t *event = data;
- unsigned int event_e, hw_e;
- unsigned int event_w, hw_w;
-
- DRM_DEBUG("\n");
-
- UPDATE_EVENT_COUNTER();
- if (dev_priv->status_ptr)
- hw_e = dev_priv->status_ptr[1] & 0xffff;
- else
- hw_e = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff;
- hw_w = dev_priv->event_wrap;
- if (hw_e > dev_priv->event_counter)
- hw_w--; /* hardware hasn't passed the last wrap yet */
-
- event_e = event->count & 0xffff;
- event_w = event->count >> 16;
-
- /* Don't need to wait if
- * - event counter wrapped since the event was emitted or
- * - the hardware has advanced up to or over the event to wait for.
- */
- if (event_w < hw_w || (event_w == hw_w && event_e <= hw_e))
- return 0;
- else
- return dev_priv->wait_evnt(dev_priv, event_e);
-}
-
-/*
- * DMA buffer management
- */
-
-static int savage_bci_get_buffers(struct drm_device *dev,
- struct drm_file *file_priv,
- struct drm_dma *d)
-{
- struct drm_buf *buf;
- int i;
-
- for (i = d->granted_count; i < d->request_count; i++) {
- buf = savage_freelist_get(dev);
- if (!buf)
- return -EAGAIN;
-
- buf->file_priv = file_priv;
-
- if (DRM_COPY_TO_USER(&d->request_indices[i],
- &buf->idx, sizeof(buf->idx)))
- return -EFAULT;
- if (DRM_COPY_TO_USER(&d->request_sizes[i],
- &buf->total, sizeof(buf->total)))
- return -EFAULT;
-
- d->granted_count++;
- }
- return 0;
-}
-
-int savage_bci_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- struct drm_dma *d = data;
- int ret = 0;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- /* Please don't send us buffers.
- */
- if (d->send_count != 0) {
- DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
- DRM_CURRENTPID, d->send_count);
- return -EINVAL;
- }
-
- /* We'll send you buffers.
- */
- if (d->request_count < 0 || d->request_count > dma->buf_count) {
- DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
- DRM_CURRENTPID, d->request_count, dma->buf_count);
- return -EINVAL;
- }
-
- d->granted_count = 0;
-
- if (d->request_count) {
- ret = savage_bci_get_buffers(dev, file_priv, d);
- }
-
- return ret;
-}
-
-void savage_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
-{
- struct drm_device_dma *dma = dev->dma;
- drm_savage_private_t *dev_priv = dev->dev_private;
- int i;
-
- if (!dma)
- return;
- if (!dev_priv)
- return;
- if (!dma->buflist)
- return;
-
- for (i = 0; i < dma->buf_count; i++) {
- struct drm_buf *buf = dma->buflist[i];
- drm_savage_buf_priv_t *buf_priv = buf->dev_private;
-
- if (buf->file_priv == file_priv && buf_priv &&
- buf_priv->next == NULL && buf_priv->prev == NULL) {
- uint16_t event;
- DRM_DEBUG("reclaimed from client\n");
- event = savage_bci_emit_event(dev_priv, SAVAGE_WAIT_3D);
- SET_AGE(&buf_priv->age, event, dev_priv->event_wrap);
- savage_freelist_put(dev, buf);
- }
- }
-
- drm_core_reclaim_buffers(dev, file_priv);
-}
-
-struct drm_ioctl_desc savage_ioctls[] = {
- DRM_IOCTL_DEF(DRM_SAVAGE_BCI_INIT, savage_bci_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_SAVAGE_BCI_CMDBUF, savage_bci_cmdbuf, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_EMIT, savage_bci_event_emit, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_WAIT, savage_bci_event_wait, DRM_AUTH),
-};
-
-int savage_max_ioctl = DRM_ARRAY_SIZE(savage_ioctls);
+++ /dev/null
-/* savage_drm.h -- Public header for the savage driver
- *
- * Copyright 2004 Felix Kuehling
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
- * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __SAVAGE_DRM_H__
-#define __SAVAGE_DRM_H__
-
-#ifndef __SAVAGE_SAREA_DEFINES__
-#define __SAVAGE_SAREA_DEFINES__
-
-/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
- * regions, subject to a minimum region size of (1<<16) == 64k.
- *
- * Clients may subdivide regions internally, but when sharing between
- * clients, the region size is the minimum granularity.
- */
-
-#define SAVAGE_CARD_HEAP 0
-#define SAVAGE_AGP_HEAP 1
-#define SAVAGE_NR_TEX_HEAPS 2
-#define SAVAGE_NR_TEX_REGIONS 16
-#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16
-
-#endif /* __SAVAGE_SAREA_DEFINES__ */
-
-typedef struct _drm_savage_sarea {
- /* LRU lists for texture memory in agp space and on the card.
- */
- struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS+1];
- unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
-
- /* Mechanism to validate card state.
- */
- int ctxOwner;
-} drm_savage_sarea_t, *drm_savage_sarea_ptr;
-
-/* Savage-specific ioctls
- */
-#define DRM_SAVAGE_BCI_INIT 0x00
-#define DRM_SAVAGE_BCI_CMDBUF 0x01
-#define DRM_SAVAGE_BCI_EVENT_EMIT 0x02
-#define DRM_SAVAGE_BCI_EVENT_WAIT 0x03
-
-#define DRM_IOCTL_SAVAGE_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
-#define DRM_IOCTL_SAVAGE_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
-#define DRM_IOCTL_SAVAGE_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
-#define DRM_IOCTL_SAVAGE_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
-
-#define SAVAGE_DMA_PCI 1
-#define SAVAGE_DMA_AGP 3
-typedef struct drm_savage_init {
- enum {
- SAVAGE_INIT_BCI = 1,
- SAVAGE_CLEANUP_BCI = 2
- } func;
- unsigned int sarea_priv_offset;
-
- /* some parameters */
- unsigned int cob_size;
- unsigned int bci_threshold_lo, bci_threshold_hi;
- unsigned int dma_type;
-
- /* frame buffer layout */
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
-
- /* local textures */
- unsigned int texture_offset;
- unsigned int texture_size;
-
- /* physical locations of non-permanent maps */
- unsigned long status_offset;
- unsigned long buffers_offset;
- unsigned long agp_textures_offset;
- unsigned long cmd_dma_offset;
-} drm_savage_init_t;
-
-typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
-typedef struct drm_savage_cmdbuf {
- /* command buffer in client's address space */
- drm_savage_cmd_header_t __user *cmd_addr;
- unsigned int size; /* size of the command buffer in 64bit units */
-
- unsigned int dma_idx; /* DMA buffer index to use */
- int discard; /* discard DMA buffer when done */
- /* vertex buffer in client's address space */
- unsigned int __user *vb_addr;
- unsigned int vb_size; /* size of client vertex buffer in bytes */
- unsigned int vb_stride; /* stride of vertices in 32bit words */
- /* boxes in client's address space */
- struct drm_clip_rect __user *box_addr;
- unsigned int nbox; /* number of clipping boxes */
-} drm_savage_cmdbuf_t;
-
-#define SAVAGE_WAIT_2D 0x1 /* wait for 2D idle before updating event tag */
-#define SAVAGE_WAIT_3D 0x2 /* wait for 3D idle before updating event tag */
-#define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */
-typedef struct drm_savage_event {
- unsigned int count;
- unsigned int flags;
-} drm_savage_event_emit_t, drm_savage_event_wait_t;
-
-/* Commands for the cmdbuf ioctl
- */
-#define SAVAGE_CMD_STATE 0 /* a range of state registers */
-#define SAVAGE_CMD_DMA_PRIM 1 /* vertices from DMA buffer */
-#define SAVAGE_CMD_VB_PRIM 2 /* vertices from client vertex buffer */
-#define SAVAGE_CMD_DMA_IDX 3 /* indexed vertices from DMA buffer */
-#define SAVAGE_CMD_VB_IDX 4 /* indexed vertices client vertex buffer */
-#define SAVAGE_CMD_CLEAR 5 /* clear buffers */
-#define SAVAGE_CMD_SWAP 6 /* swap buffers */
-
-/* Primitive types
-*/
-#define SAVAGE_PRIM_TRILIST 0 /* triangle list */
-#define SAVAGE_PRIM_TRISTRIP 1 /* triangle strip */
-#define SAVAGE_PRIM_TRIFAN 2 /* triangle fan */
-#define SAVAGE_PRIM_TRILIST_201 3 /* reorder verts for correct flat
- * shading on s3d */
-
-/* Skip flags (vertex format)
- */
-#define SAVAGE_SKIP_Z 0x01
-#define SAVAGE_SKIP_W 0x02
-#define SAVAGE_SKIP_C0 0x04
-#define SAVAGE_SKIP_C1 0x08
-#define SAVAGE_SKIP_S0 0x10
-#define SAVAGE_SKIP_T0 0x20
-#define SAVAGE_SKIP_ST0 0x30
-#define SAVAGE_SKIP_S1 0x40
-#define SAVAGE_SKIP_T1 0x80
-#define SAVAGE_SKIP_ST1 0xc0
-#define SAVAGE_SKIP_ALL_S3D 0x3f
-#define SAVAGE_SKIP_ALL_S4 0xff
-
-/* Buffer names for clear command
- */
-#define SAVAGE_FRONT 0x1
-#define SAVAGE_BACK 0x2
-#define SAVAGE_DEPTH 0x4
-
-/* 64-bit command header
- */
-union drm_savage_cmd_header {
- struct {
- unsigned char cmd; /* command */
- unsigned char pad0;
- unsigned short pad1;
- unsigned short pad2;
- unsigned short pad3;
- } cmd; /* generic */
- struct {
- unsigned char cmd;
- unsigned char global; /* need idle engine? */
- unsigned short count; /* number of consecutive registers */
- unsigned short start; /* first register */
- unsigned short pad3;
- } state; /* SAVAGE_CMD_STATE */
- struct {
- unsigned char cmd;
- unsigned char prim; /* primitive type */
- unsigned short skip; /* vertex format (skip flags) */
- unsigned short count; /* number of vertices */
- unsigned short start; /* first vertex in DMA/vertex buffer */
- } prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */
- struct {
- unsigned char cmd;
- unsigned char prim;
- unsigned short skip;
- unsigned short count; /* number of indices that follow */
- unsigned short pad3;
- } idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */
- struct {
- unsigned char cmd;
- unsigned char pad0;
- unsigned short pad1;
- unsigned int flags;
- } clear0; /* SAVAGE_CMD_CLEAR */
- struct {
- unsigned int mask;
- unsigned int value;
- } clear1; /* SAVAGE_CMD_CLEAR data */
-};
-
-#endif
+++ /dev/null
-/* savage_drv.h -- Private header for the savage driver */
-/*
- * Copyright 2004 Felix Kuehling
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
- * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __SAVAGE_DRV_H__
-#define __SAVAGE_DRV_H__
-
-#define DRIVER_AUTHOR "Felix Kuehling"
-
-#define DRIVER_NAME "savage"
-#define DRIVER_DESC "Savage3D/MX/IX, Savage4, SuperSavage, Twister, ProSavage[DDR]"
-#define DRIVER_DATE "20050313"
-
-#define DRIVER_MAJOR 2
-#define DRIVER_MINOR 4
-#define DRIVER_PATCHLEVEL 1
-/* Interface history:
- *
- * 1.x The DRM driver from the VIA/S3 code drop, basically a dummy
- * 2.0 The first real DRM
- * 2.1 Scissors registers managed by the DRM, 3D operations clipped by
- * cliprects of the cmdbuf ioctl
- * 2.2 Implemented SAVAGE_CMD_DMA_IDX and SAVAGE_CMD_VB_IDX
- * 2.3 Event counters used by BCI_EVENT_EMIT/WAIT ioctls are now 32 bits
- * wide and thus very long lived (unlikely to ever wrap). The size
- * in the struct was 32 bits before, but only 16 bits were used
- * 2.4 Implemented command DMA. Now drm_savage_init_t.cmd_dma_offset is
- * actually used
- */
-
-typedef struct drm_savage_age {
- uint16_t event;
- unsigned int wrap;
-} drm_savage_age_t;
-
-typedef struct drm_savage_buf_priv {
- struct drm_savage_buf_priv *next;
- struct drm_savage_buf_priv *prev;
- drm_savage_age_t age;
- struct drm_buf *buf;
-} drm_savage_buf_priv_t;
-
-typedef struct drm_savage_dma_page {
- drm_savage_age_t age;
- unsigned int used, flushed;
-} drm_savage_dma_page_t;
-#define SAVAGE_DMA_PAGE_SIZE 1024 /* in dwords */
-/* Fake DMA buffer size in bytes. 4 pages. Allows a maximum command
- * size of 16kbytes or 4k entries. Minimum requirement would be
- * 10kbytes for 255 40-byte vertices in one drawing command. */
-#define SAVAGE_FAKE_DMA_SIZE (SAVAGE_DMA_PAGE_SIZE*4*4)
-
-/* interesting bits of hardware state that are saved in dev_priv */
-typedef union {
- struct drm_savage_common_state {
- uint32_t vbaddr;
- } common;
- struct {
- unsigned char pad[sizeof(struct drm_savage_common_state)];
- uint32_t texctrl, texaddr;
- uint32_t scstart, new_scstart;
- uint32_t scend, new_scend;
- } s3d;
- struct {
- unsigned char pad[sizeof(struct drm_savage_common_state)];
- uint32_t texdescr, texaddr0, texaddr1;
- uint32_t drawctrl0, new_drawctrl0;
- uint32_t drawctrl1, new_drawctrl1;
- } s4;
-} drm_savage_state_t;
-
-/* these chip tags should match the ones in the 2D driver in savage_regs.h. */
-enum savage_family {
- S3_UNKNOWN = 0,
- S3_SAVAGE3D,
- S3_SAVAGE_MX,
- S3_SAVAGE4,
- S3_PROSAVAGE,
- S3_TWISTER,
- S3_PROSAVAGEDDR,
- S3_SUPERSAVAGE,
- S3_SAVAGE2000,
- S3_LAST
-};
-
-extern struct drm_ioctl_desc savage_ioctls[];
-extern int savage_max_ioctl;
-
-#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
-
-#define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \
- || (chip==S3_PROSAVAGE) \
- || (chip==S3_TWISTER) \
- || (chip==S3_PROSAVAGEDDR))
-
-#define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
-
-#define S3_SAVAGE_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
-
-#define S3_MOBILE_TWISTER_SERIES(chip) ((chip==S3_TWISTER) \
- ||(chip==S3_PROSAVAGEDDR))
-
-/* flags */
-#define SAVAGE_IS_AGP 1
-
-typedef struct drm_savage_private {
- drm_savage_sarea_t *sarea_priv;
-
- drm_savage_buf_priv_t head, tail;
-
- /* who am I? */
- enum savage_family chipset;
-
- unsigned int cob_size;
- unsigned int bci_threshold_lo, bci_threshold_hi;
- unsigned int dma_type;
-
- /* frame buffer layout */
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
-
- /* bitmap descriptors for swap and clear */
- unsigned int front_bd, back_bd, depth_bd;
-
- /* local textures */
- unsigned int texture_offset;
- unsigned int texture_size;
-
- /* memory regions in physical memory */
- drm_local_map_t *sarea;
- drm_local_map_t *mmio;
- drm_local_map_t *fb;
- drm_local_map_t *aperture;
- drm_local_map_t *status;
- drm_local_map_t *agp_textures;
- drm_local_map_t *cmd_dma;
- drm_local_map_t fake_dma;
-
- struct {
- int handle;
- unsigned long base, size;
- } mtrr[3];
-
- /* BCI and status-related stuff */
- volatile uint32_t *status_ptr, *bci_ptr;
- uint32_t status_used_mask;
- uint16_t event_counter;
- unsigned int event_wrap;
-
- /* Savage4 command DMA */
- drm_savage_dma_page_t *dma_pages;
- unsigned int nr_dma_pages, first_dma_page, current_dma_page;
- drm_savage_age_t last_dma_age;
-
- /* saved hw state for global/local check on S3D */
- uint32_t hw_draw_ctrl, hw_zbuf_ctrl;
- /* and for scissors (global, so don't emit if not changed) */
- uint32_t hw_scissors_start, hw_scissors_end;
-
- drm_savage_state_t state;
-
- /* after emitting a wait cmd Savage3D needs 63 nops before next DMA */
- unsigned int waiting;
-
- /* config/hardware-dependent function pointers */
- int (*wait_fifo)(struct drm_savage_private *dev_priv, unsigned int n);
- int (*wait_evnt)(struct drm_savage_private *dev_priv, uint16_t e);
- /* Err, there is a macro wait_event in include/linux/wait.h.
- * Avoid unwanted macro expansion. */
- void (*emit_clip_rect)(struct drm_savage_private *dev_priv,
- const struct drm_clip_rect *pbox);
- void (*dma_flush)(struct drm_savage_private *dev_priv);
-} drm_savage_private_t;
-
-/* ioctls */
-extern int savage_bci_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int savage_bci_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
-
-/* BCI functions */
-extern uint16_t savage_bci_emit_event(drm_savage_private_t *dev_priv,
- unsigned int flags);
-extern void savage_freelist_put(struct drm_device *dev, struct drm_buf *buf);
-extern void savage_dma_reset(drm_savage_private_t *dev_priv);
-extern void savage_dma_wait(drm_savage_private_t *dev_priv, unsigned int page);
-extern uint32_t *savage_dma_alloc(drm_savage_private_t *dev_priv,
- unsigned int n);
-extern int savage_driver_load(struct drm_device *dev, unsigned long chipset);
-extern int savage_driver_firstopen(struct drm_device *dev);
-extern void savage_driver_lastclose(struct drm_device *dev);
-extern int savage_driver_unload(struct drm_device *dev);
-extern void savage_reclaim_buffers(struct drm_device *dev,
- struct drm_file *file_priv);
-
-/* state functions */
-extern void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv,
- const struct drm_clip_rect *pbox);
-extern void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv,
- const struct drm_clip_rect *pbox);
-
-#define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */
-#define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */
-#define SAVAGE_MMIO_SIZE 0x00080000 /* 512kB */
-#define SAVAGE_APERTURE_OFFSET 0x02000000 /* 32MB */
-#define SAVAGE_APERTURE_SIZE 0x05000000 /* 5 tiled surfaces, 16MB each */
-
-#define SAVAGE_BCI_OFFSET 0x00010000 /* offset of the BCI region
- * inside the MMIO region */
-#define SAVAGE_BCI_FIFO_SIZE 32 /* number of entries in on-chip
- * BCI FIFO */
-
-/*
- * MMIO registers
- */
-#define SAVAGE_STATUS_WORD0 0x48C00
-#define SAVAGE_STATUS_WORD1 0x48C04
-#define SAVAGE_ALT_STATUS_WORD0 0x48C60
-
-#define SAVAGE_FIFO_USED_MASK_S3D 0x0001ffff
-#define SAVAGE_FIFO_USED_MASK_S4 0x001fffff
-
-/* Copied from savage_bci.h in the 2D driver with some renaming. */
-
-/* Bitmap descriptors */
-#define SAVAGE_BD_STRIDE_SHIFT 0
-#define SAVAGE_BD_BPP_SHIFT 16
-#define SAVAGE_BD_TILE_SHIFT 24
-#define SAVAGE_BD_BW_DISABLE (1<<28)
-/* common: */
-#define SAVAGE_BD_TILE_LINEAR 0
-/* savage4, MX, IX, 3D */
-#define SAVAGE_BD_TILE_16BPP 2
-#define SAVAGE_BD_TILE_32BPP 3
-/* twister, prosavage, DDR, supersavage, 2000 */
-#define SAVAGE_BD_TILE_DEST 1
-#define SAVAGE_BD_TILE_TEXTURE 2
-/* GBD - BCI enable */
-/* savage4, MX, IX, 3D */
-#define SAVAGE_GBD_BCI_ENABLE 8
-/* twister, prosavage, DDR, supersavage, 2000 */
-#define SAVAGE_GBD_BCI_ENABLE_TWISTER 0
-
-#define SAVAGE_GBD_BIG_ENDIAN 4
-#define SAVAGE_GBD_LITTLE_ENDIAN 0
-#define SAVAGE_GBD_64 1
-
-/* Global Bitmap Descriptor */
-#define SAVAGE_BCI_GLB_BD_LOW 0x8168
-#define SAVAGE_BCI_GLB_BD_HIGH 0x816C
-
-/*
- * BCI registers
- */
-/* Savage4/Twister/ProSavage 3D registers */
-#define SAVAGE_DRAWLOCALCTRL_S4 0x1e
-#define SAVAGE_TEXPALADDR_S4 0x1f
-#define SAVAGE_TEXCTRL0_S4 0x20
-#define SAVAGE_TEXCTRL1_S4 0x21
-#define SAVAGE_TEXADDR0_S4 0x22
-#define SAVAGE_TEXADDR1_S4 0x23
-#define SAVAGE_TEXBLEND0_S4 0x24
-#define SAVAGE_TEXBLEND1_S4 0x25
-#define SAVAGE_TEXXPRCLR_S4 0x26 /* never used */
-#define SAVAGE_TEXDESCR_S4 0x27
-#define SAVAGE_FOGTABLE_S4 0x28
-#define SAVAGE_FOGCTRL_S4 0x30
-#define SAVAGE_STENCILCTRL_S4 0x31
-#define SAVAGE_ZBUFCTRL_S4 0x32
-#define SAVAGE_ZBUFOFF_S4 0x33
-#define SAVAGE_DESTCTRL_S4 0x34
-#define SAVAGE_DRAWCTRL0_S4 0x35
-#define SAVAGE_DRAWCTRL1_S4 0x36
-#define SAVAGE_ZWATERMARK_S4 0x37
-#define SAVAGE_DESTTEXRWWATERMARK_S4 0x38
-#define SAVAGE_TEXBLENDCOLOR_S4 0x39
-/* Savage3D/MX/IX 3D registers */
-#define SAVAGE_TEXPALADDR_S3D 0x18
-#define SAVAGE_TEXXPRCLR_S3D 0x19 /* never used */
-#define SAVAGE_TEXADDR_S3D 0x1A
-#define SAVAGE_TEXDESCR_S3D 0x1B
-#define SAVAGE_TEXCTRL_S3D 0x1C
-#define SAVAGE_FOGTABLE_S3D 0x20
-#define SAVAGE_FOGCTRL_S3D 0x30
-#define SAVAGE_DRAWCTRL_S3D 0x31
-#define SAVAGE_ZBUFCTRL_S3D 0x32
-#define SAVAGE_ZBUFOFF_S3D 0x33
-#define SAVAGE_DESTCTRL_S3D 0x34
-#define SAVAGE_SCSTART_S3D 0x35
-#define SAVAGE_SCEND_S3D 0x36
-#define SAVAGE_ZWATERMARK_S3D 0x37
-#define SAVAGE_DESTTEXRWWATERMARK_S3D 0x38
-/* common stuff */
-#define SAVAGE_VERTBUFADDR 0x3e
-#define SAVAGE_BITPLANEWTMASK 0xd7
-#define SAVAGE_DMABUFADDR 0x51
-
-/* texture enable bits (needed for tex addr checking) */
-#define SAVAGE_TEXCTRL_TEXEN_MASK 0x00010000 /* S3D */
-#define SAVAGE_TEXDESCR_TEX0EN_MASK 0x02000000 /* S4 */
-#define SAVAGE_TEXDESCR_TEX1EN_MASK 0x04000000 /* S4 */
-
-/* Global fields in Savage4/Twister/ProSavage 3D registers:
- *
- * All texture registers and DrawLocalCtrl are local. All other
- * registers are global. */
-
-/* Global fields in Savage3D/MX/IX 3D registers:
- *
- * All texture registers are local. DrawCtrl and ZBufCtrl are
- * partially local. All other registers are global.
- *
- * DrawCtrl global fields: cullMode, alphaTestCmpFunc, alphaTestEn, alphaRefVal
- * ZBufCtrl global fields: zCmpFunc, zBufEn
- */
-#define SAVAGE_DRAWCTRL_S3D_GLOBAL 0x03f3c00c
-#define SAVAGE_ZBUFCTRL_S3D_GLOBAL 0x00000027
-
-/* Masks for scissor bits (drawCtrl[01] on s4, scissorStart/End on s3d)
- */
-#define SAVAGE_SCISSOR_MASK_S4 0x00fff7ff
-#define SAVAGE_SCISSOR_MASK_S3D 0x07ff07ff
-
-/*
- * BCI commands
- */
-#define BCI_CMD_NOP 0x40000000
-#define BCI_CMD_RECT 0x48000000
-#define BCI_CMD_RECT_XP 0x01000000
-#define BCI_CMD_RECT_YP 0x02000000
-#define BCI_CMD_SCANLINE 0x50000000
-#define BCI_CMD_LINE 0x5C000000
-#define BCI_CMD_LINE_LAST_PIXEL 0x58000000
-#define BCI_CMD_BYTE_TEXT 0x63000000
-#define BCI_CMD_NT_BYTE_TEXT 0x67000000
-#define BCI_CMD_BIT_TEXT 0x6C000000
-#define BCI_CMD_GET_ROP(cmd) (((cmd) >> 16) & 0xFF)
-#define BCI_CMD_SET_ROP(cmd, rop) ((cmd) |= ((rop & 0xFF) << 16))
-#define BCI_CMD_SEND_COLOR 0x00008000
-
-#define BCI_CMD_CLIP_NONE 0x00000000
-#define BCI_CMD_CLIP_CURRENT 0x00002000
-#define BCI_CMD_CLIP_LR 0x00004000
-#define BCI_CMD_CLIP_NEW 0x00006000
-
-#define BCI_CMD_DEST_GBD 0x00000000
-#define BCI_CMD_DEST_PBD 0x00000800
-#define BCI_CMD_DEST_PBD_NEW 0x00000C00
-#define BCI_CMD_DEST_SBD 0x00001000
-#define BCI_CMD_DEST_SBD_NEW 0x00001400
-
-#define BCI_CMD_SRC_TRANSPARENT 0x00000200
-#define BCI_CMD_SRC_SOLID 0x00000000
-#define BCI_CMD_SRC_GBD 0x00000020
-#define BCI_CMD_SRC_COLOR 0x00000040
-#define BCI_CMD_SRC_MONO 0x00000060
-#define BCI_CMD_SRC_PBD_COLOR 0x00000080
-#define BCI_CMD_SRC_PBD_MONO 0x000000A0
-#define BCI_CMD_SRC_PBD_COLOR_NEW 0x000000C0
-#define BCI_CMD_SRC_PBD_MONO_NEW 0x000000E0
-#define BCI_CMD_SRC_SBD_COLOR 0x00000100
-#define BCI_CMD_SRC_SBD_MONO 0x00000120
-#define BCI_CMD_SRC_SBD_COLOR_NEW 0x00000140
-#define BCI_CMD_SRC_SBD_MONO_NEW 0x00000160
-
-#define BCI_CMD_PAT_TRANSPARENT 0x00000010
-#define BCI_CMD_PAT_NONE 0x00000000
-#define BCI_CMD_PAT_COLOR 0x00000002
-#define BCI_CMD_PAT_MONO 0x00000003
-#define BCI_CMD_PAT_PBD_COLOR 0x00000004
-#define BCI_CMD_PAT_PBD_MONO 0x00000005
-#define BCI_CMD_PAT_PBD_COLOR_NEW 0x00000006
-#define BCI_CMD_PAT_PBD_MONO_NEW 0x00000007
-#define BCI_CMD_PAT_SBD_COLOR 0x00000008
-#define BCI_CMD_PAT_SBD_MONO 0x00000009
-#define BCI_CMD_PAT_SBD_COLOR_NEW 0x0000000A
-#define BCI_CMD_PAT_SBD_MONO_NEW 0x0000000B
-
-#define BCI_BD_BW_DISABLE 0x10000000
-#define BCI_BD_TILE_MASK 0x03000000
-#define BCI_BD_TILE_NONE 0x00000000
-#define BCI_BD_TILE_16 0x02000000
-#define BCI_BD_TILE_32 0x03000000
-#define BCI_BD_GET_BPP(bd) (((bd) >> 16) & 0xFF)
-#define BCI_BD_SET_BPP(bd, bpp) ((bd) |= (((bpp) & 0xFF) << 16))
-#define BCI_BD_GET_STRIDE(bd) ((bd) & 0xFFFF)
-#define BCI_BD_SET_STRIDE(bd, st) ((bd) |= ((st) & 0xFFFF))
-
-#define BCI_CMD_SET_REGISTER 0x96000000
-
-#define BCI_CMD_WAIT 0xC0000000
-#define BCI_CMD_WAIT_3D 0x00010000
-#define BCI_CMD_WAIT_2D 0x00020000
-
-#define BCI_CMD_UPDATE_EVENT_TAG 0x98000000
-
-#define BCI_CMD_DRAW_PRIM 0x80000000
-#define BCI_CMD_DRAW_INDEXED_PRIM 0x88000000
-#define BCI_CMD_DRAW_CONT 0x01000000
-#define BCI_CMD_DRAW_TRILIST 0x00000000
-#define BCI_CMD_DRAW_TRISTRIP 0x02000000
-#define BCI_CMD_DRAW_TRIFAN 0x04000000
-#define BCI_CMD_DRAW_SKIPFLAGS 0x000000ff
-#define BCI_CMD_DRAW_NO_Z 0x00000001
-#define BCI_CMD_DRAW_NO_W 0x00000002
-#define BCI_CMD_DRAW_NO_CD 0x00000004
-#define BCI_CMD_DRAW_NO_CS 0x00000008
-#define BCI_CMD_DRAW_NO_U0 0x00000010
-#define BCI_CMD_DRAW_NO_V0 0x00000020
-#define BCI_CMD_DRAW_NO_UV0 0x00000030
-#define BCI_CMD_DRAW_NO_U1 0x00000040
-#define BCI_CMD_DRAW_NO_V1 0x00000080
-#define BCI_CMD_DRAW_NO_UV1 0x000000c0
-
-#define BCI_CMD_DMA 0xa8000000
-
-#define BCI_W_H(w, h) ((((h) << 16) | (w)) & 0x0FFF0FFF)
-#define BCI_X_Y(x, y) ((((y) << 16) | (x)) & 0x0FFF0FFF)
-#define BCI_X_W(x, y) ((((w) << 16) | (x)) & 0x0FFF0FFF)
-#define BCI_CLIP_LR(l, r) ((((r) << 16) | (l)) & 0x0FFF0FFF)
-#define BCI_CLIP_TL(t, l) ((((t) << 16) | (l)) & 0x0FFF0FFF)
-#define BCI_CLIP_BR(b, r) ((((b) << 16) | (r)) & 0x0FFF0FFF)
-
-#define BCI_LINE_X_Y(x, y) (((y) << 16) | ((x) & 0xFFFF))
-#define BCI_LINE_STEPS(diag, axi) (((axi) << 16) | ((diag) & 0xFFFF))
-#define BCI_LINE_MISC(maj, ym, xp, yp, err) \
- (((maj) & 0x1FFF) | \
- ((ym) ? 1<<13 : 0) | \
- ((xp) ? 1<<14 : 0) | \
- ((yp) ? 1<<15 : 0) | \
- ((err) << 16))
-
-/*
- * common commands
- */
-#define BCI_SET_REGISTERS( first, n ) \
- BCI_WRITE(BCI_CMD_SET_REGISTER | \
- ((uint32_t)(n) & 0xff) << 16 | \
- ((uint32_t)(first) & 0xffff))
-#define DMA_SET_REGISTERS( first, n ) \
- DMA_WRITE(BCI_CMD_SET_REGISTER | \
- ((uint32_t)(n) & 0xff) << 16 | \
- ((uint32_t)(first) & 0xffff))
-
-#define BCI_DRAW_PRIMITIVE(n, type, skip) \
- BCI_WRITE(BCI_CMD_DRAW_PRIM | (type) | (skip) | \
- ((n) << 16))
-#define DMA_DRAW_PRIMITIVE(n, type, skip) \
- DMA_WRITE(BCI_CMD_DRAW_PRIM | (type) | (skip) | \
- ((n) << 16))
-
-#define BCI_DRAW_INDICES_S3D(n, type, i0) \
- BCI_WRITE(BCI_CMD_DRAW_INDEXED_PRIM | (type) | \
- ((n) << 16) | (i0))
-
-#define BCI_DRAW_INDICES_S4(n, type, skip) \
- BCI_WRITE(BCI_CMD_DRAW_INDEXED_PRIM | (type) | \
- (skip) | ((n) << 16))
-
-#define BCI_DMA(n) \
- BCI_WRITE(BCI_CMD_DMA | (((n) >> 1) - 1))
-
-/*
- * access to MMIO
- */
-#define SAVAGE_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
-#define SAVAGE_WRITE(reg) DRM_WRITE32( dev_priv->mmio, (reg) )
-
-/*
- * access to the burst command interface (BCI)
- */
-#define SAVAGE_BCI_DEBUG 1
-
-#define BCI_LOCALS volatile uint32_t *bci_ptr;
-
-#define BEGIN_BCI( n ) do { \
- dev_priv->wait_fifo(dev_priv, (n)); \
- bci_ptr = dev_priv->bci_ptr; \
-} while(0)
-
-#define BCI_WRITE( val ) *bci_ptr++ = (uint32_t)(val)
-
-/*
- * command DMA support
- */
-#define SAVAGE_DMA_DEBUG 1
-
-#define DMA_LOCALS uint32_t *dma_ptr;
-
-#define BEGIN_DMA( n ) do { \
- unsigned int cur = dev_priv->current_dma_page; \
- unsigned int rest = SAVAGE_DMA_PAGE_SIZE - \
- dev_priv->dma_pages[cur].used; \
- if ((n) > rest) { \
- dma_ptr = savage_dma_alloc(dev_priv, (n)); \
- } else { /* fast path for small allocations */ \
- dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle + \
- cur * SAVAGE_DMA_PAGE_SIZE + \
- dev_priv->dma_pages[cur].used; \
- if (dev_priv->dma_pages[cur].used == 0) \
- savage_dma_wait(dev_priv, cur); \
- dev_priv->dma_pages[cur].used += (n); \
- } \
-} while(0)
-
-#define DMA_WRITE( val ) *dma_ptr++ = (uint32_t)(val)
-
-#define DMA_COPY(src, n) do { \
- memcpy(dma_ptr, (src), (n)*4); \
- dma_ptr += n; \
-} while(0)
-
-#if SAVAGE_DMA_DEBUG
-#define DMA_COMMIT() do { \
- unsigned int cur = dev_priv->current_dma_page; \
- uint32_t *expected = (uint32_t *)dev_priv->cmd_dma->handle + \
- cur * SAVAGE_DMA_PAGE_SIZE + \
- dev_priv->dma_pages[cur].used; \
- if (dma_ptr != expected) { \
- DRM_ERROR("DMA allocation and use don't match: " \
- "%p != %p\n", expected, dma_ptr); \
- savage_dma_reset(dev_priv); \
- } \
-} while(0)
-#else
-#define DMA_COMMIT() do {/* nothing */} while(0)
-#endif
-
-#define DMA_FLUSH() dev_priv->dma_flush(dev_priv)
-
-/* Buffer aging via event tag
- */
-
-#define UPDATE_EVENT_COUNTER( ) do { \
- if (dev_priv->status_ptr) { \
- uint16_t count; \
- /* coordinate with Xserver */ \
- count = dev_priv->status_ptr[1023]; \
- if (count < dev_priv->event_counter) \
- dev_priv->event_wrap++; \
- dev_priv->event_counter = count; \
- } \
-} while(0)
-
-#define SET_AGE( age, e, w ) do { \
- (age)->event = e; \
- (age)->wrap = w; \
-} while(0)
-
-#define TEST_AGE( age, e, w ) \
- ( (age)->wrap < (w) || ( (age)->wrap == (w) && (age)->event <= (e) ) )
-
-#endif /* __SAVAGE_DRV_H__ */
+++ /dev/null
-/* savage_state.c -- State and drawing support for Savage
- *
- * Copyright 2004 Felix Kuehling
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
- * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include "drmP.h"
-#include "savage_drm.h"
-#include "savage_drv.h"
-
-void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv,
- const struct drm_clip_rect *pbox)
-{
- uint32_t scstart = dev_priv->state.s3d.new_scstart;
- uint32_t scend = dev_priv->state.s3d.new_scend;
- scstart = (scstart & ~SAVAGE_SCISSOR_MASK_S3D) |
- ((uint32_t)pbox->x1 & 0x000007ff) |
- (((uint32_t)pbox->y1 << 16) & 0x07ff0000);
- scend = (scend & ~SAVAGE_SCISSOR_MASK_S3D) |
- (((uint32_t)pbox->x2 - 1) & 0x000007ff) |
- ((((uint32_t)pbox->y2 - 1) << 16) & 0x07ff0000);
- if (scstart != dev_priv->state.s3d.scstart ||
- scend != dev_priv->state.s3d.scend) {
- DMA_LOCALS;
- BEGIN_DMA(4);
- DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D);
- DMA_SET_REGISTERS(SAVAGE_SCSTART_S3D, 2);
- DMA_WRITE(scstart);
- DMA_WRITE(scend);
- dev_priv->state.s3d.scstart = scstart;
- dev_priv->state.s3d.scend = scend;
- dev_priv->waiting = 1;
- DMA_COMMIT();
- }
-}
-
-void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv,
- const struct drm_clip_rect *pbox)
-{
- uint32_t drawctrl0 = dev_priv->state.s4.new_drawctrl0;
- uint32_t drawctrl1 = dev_priv->state.s4.new_drawctrl1;
- drawctrl0 = (drawctrl0 & ~SAVAGE_SCISSOR_MASK_S4) |
- ((uint32_t)pbox->x1 & 0x000007ff) |
- (((uint32_t)pbox->y1 << 12) & 0x00fff000);
- drawctrl1 = (drawctrl1 & ~SAVAGE_SCISSOR_MASK_S4) |
- (((uint32_t)pbox->x2 - 1) & 0x000007ff) |
- ((((uint32_t)pbox->y2 - 1) << 12) & 0x00fff000);
- if (drawctrl0 != dev_priv->state.s4.drawctrl0 ||
- drawctrl1 != dev_priv->state.s4.drawctrl1) {
- DMA_LOCALS;
- BEGIN_DMA(4);
- DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D);
- DMA_SET_REGISTERS(SAVAGE_DRAWCTRL0_S4, 2);
- DMA_WRITE(drawctrl0);
- DMA_WRITE(drawctrl1);
- dev_priv->state.s4.drawctrl0 = drawctrl0;
- dev_priv->state.s4.drawctrl1 = drawctrl1;
- dev_priv->waiting = 1;
- DMA_COMMIT();
- }
-}
-
-static int savage_verify_texaddr(drm_savage_private_t *dev_priv, int unit,
- uint32_t addr)
-{
- if ((addr & 6) != 2) { /* reserved bits */
- DRM_ERROR("bad texAddr%d %08x (reserved bits)\n", unit, addr);
- return -EINVAL;
- }
- if (!(addr & 1)) { /* local */
- addr &= ~7;
- if (addr < dev_priv->texture_offset ||
- addr >= dev_priv->texture_offset + dev_priv->texture_size) {
- DRM_ERROR
- ("bad texAddr%d %08x (local addr out of range)\n",
- unit, addr);
- return -EINVAL;
- }
- } else { /* AGP */
- if (!dev_priv->agp_textures) {
- DRM_ERROR("bad texAddr%d %08x (AGP not available)\n",
- unit, addr);
- return -EINVAL;
- }
- addr &= ~7;
- if (addr < dev_priv->agp_textures->offset ||
- addr >= (dev_priv->agp_textures->offset +
- dev_priv->agp_textures->size)) {
- DRM_ERROR
- ("bad texAddr%d %08x (AGP addr out of range)\n",
- unit, addr);
- return -EINVAL;
- }
- }
- return 0;
-}
-
-#define SAVE_STATE(reg,where) \
- if(start <= reg && start + count > reg) \
- dev_priv->state.where = regs[reg - start]
-#define SAVE_STATE_MASK(reg,where,mask) do { \
- if(start <= reg && start + count > reg) { \
- uint32_t tmp; \
- tmp = regs[reg - start]; \
- dev_priv->state.where = (tmp & (mask)) | \
- (dev_priv->state.where & ~(mask)); \
- } \
-} while (0)
-static int savage_verify_state_s3d(drm_savage_private_t *dev_priv,
- unsigned int start, unsigned int count,
- const uint32_t *regs)
-{
- if (start < SAVAGE_TEXPALADDR_S3D ||
- start + count - 1 > SAVAGE_DESTTEXRWWATERMARK_S3D) {
- DRM_ERROR("invalid register range (0x%04x-0x%04x)\n",
- start, start + count - 1);
- return -EINVAL;
- }
-
- SAVE_STATE_MASK(SAVAGE_SCSTART_S3D, s3d.new_scstart,
- ~SAVAGE_SCISSOR_MASK_S3D);
- SAVE_STATE_MASK(SAVAGE_SCEND_S3D, s3d.new_scend,
- ~SAVAGE_SCISSOR_MASK_S3D);
-
- /* if any texture regs were changed ... */
- if (start <= SAVAGE_TEXCTRL_S3D &&
- start + count > SAVAGE_TEXPALADDR_S3D) {
- /* ... check texture state */
- SAVE_STATE(SAVAGE_TEXCTRL_S3D, s3d.texctrl);
- SAVE_STATE(SAVAGE_TEXADDR_S3D, s3d.texaddr);
- if (dev_priv->state.s3d.texctrl & SAVAGE_TEXCTRL_TEXEN_MASK)
- return savage_verify_texaddr(dev_priv, 0,
- dev_priv->state.s3d.texaddr);
- }
-
- return 0;
-}
-
-static int savage_verify_state_s4(drm_savage_private_t *dev_priv,
- unsigned int start, unsigned int count,
- const uint32_t *regs)
-{
- int ret = 0;
-
- if (start < SAVAGE_DRAWLOCALCTRL_S4 ||
- start + count - 1 > SAVAGE_TEXBLENDCOLOR_S4) {
- DRM_ERROR("invalid register range (0x%04x-0x%04x)\n",
- start, start + count - 1);
- return -EINVAL;
- }
-
- SAVE_STATE_MASK(SAVAGE_DRAWCTRL0_S4, s4.new_drawctrl0,
- ~SAVAGE_SCISSOR_MASK_S4);
- SAVE_STATE_MASK(SAVAGE_DRAWCTRL1_S4, s4.new_drawctrl1,
- ~SAVAGE_SCISSOR_MASK_S4);
-
- /* if any texture regs were changed ... */
- if (start <= SAVAGE_TEXDESCR_S4 &&
- start + count > SAVAGE_TEXPALADDR_S4) {
- /* ... check texture state */
- SAVE_STATE(SAVAGE_TEXDESCR_S4, s4.texdescr);
- SAVE_STATE(SAVAGE_TEXADDR0_S4, s4.texaddr0);
- SAVE_STATE(SAVAGE_TEXADDR1_S4, s4.texaddr1);
- if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX0EN_MASK)
- ret |= savage_verify_texaddr(dev_priv, 0,
- dev_priv->state.s4.texaddr0);
- if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX1EN_MASK)
- ret |= savage_verify_texaddr(dev_priv, 1,
- dev_priv->state.s4.texaddr1);
- }
-
- return ret;
-}
-#undef SAVE_STATE
-#undef SAVE_STATE_MASK
-
-static int savage_dispatch_state(drm_savage_private_t *dev_priv,
- const drm_savage_cmd_header_t *cmd_header,
- const uint32_t *regs)
-{
- unsigned int count = cmd_header->state.count;
- unsigned int start = cmd_header->state.start;
- unsigned int count2 = 0;
- unsigned int bci_size;
- int ret;
- DMA_LOCALS;
-
- if (!count)
- return 0;
-
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- ret = savage_verify_state_s3d(dev_priv, start, count, regs);
- if (ret != 0)
- return ret;
- /* scissor regs are emitted in savage_dispatch_draw */
- if (start < SAVAGE_SCSTART_S3D) {
- if (start + count > SAVAGE_SCEND_S3D + 1)
- count2 = count - (SAVAGE_SCEND_S3D + 1 - start);
- if (start + count > SAVAGE_SCSTART_S3D)
- count = SAVAGE_SCSTART_S3D - start;
- } else if (start <= SAVAGE_SCEND_S3D) {
- if (start + count > SAVAGE_SCEND_S3D + 1) {
- count -= SAVAGE_SCEND_S3D + 1 - start;
- start = SAVAGE_SCEND_S3D + 1;
- } else
- return 0;
- }
- } else {
- ret = savage_verify_state_s4(dev_priv, start, count, regs);
- if (ret != 0)
- return ret;
- /* scissor regs are emitted in savage_dispatch_draw */
- if (start < SAVAGE_DRAWCTRL0_S4) {
- if (start + count > SAVAGE_DRAWCTRL1_S4 + 1)
- count2 = count -
- (SAVAGE_DRAWCTRL1_S4 + 1 - start);
- if (start + count > SAVAGE_DRAWCTRL0_S4)
- count = SAVAGE_DRAWCTRL0_S4 - start;
- } else if (start <= SAVAGE_DRAWCTRL1_S4) {
- if (start + count > SAVAGE_DRAWCTRL1_S4 + 1) {
- count -= SAVAGE_DRAWCTRL1_S4 + 1 - start;
- start = SAVAGE_DRAWCTRL1_S4 + 1;
- } else
- return 0;
- }
- }
-
- bci_size = count + (count + 254) / 255 + count2 + (count2 + 254) / 255;
-
- if (cmd_header->state.global) {
- BEGIN_DMA(bci_size + 1);
- DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D);
- dev_priv->waiting = 1;
- } else {
- BEGIN_DMA(bci_size);
- }
-
- do {
- while (count > 0) {
- unsigned int n = count < 255 ? count : 255;
- DMA_SET_REGISTERS(start, n);
- DMA_COPY(regs, n);
- count -= n;
- start += n;
- regs += n;
- }
- start += 2;
- regs += 2;
- count = count2;
- count2 = 0;
- } while (count);
-
- DMA_COMMIT();
-
- return 0;
-}
-
-static int savage_dispatch_dma_prim(drm_savage_private_t *dev_priv,
- const drm_savage_cmd_header_t *cmd_header,
- const struct drm_buf *dmabuf)
-{
- unsigned char reorder = 0;
- unsigned int prim = cmd_header->prim.prim;
- unsigned int skip = cmd_header->prim.skip;
- unsigned int n = cmd_header->prim.count;
- unsigned int start = cmd_header->prim.start;
- unsigned int i;
- BCI_LOCALS;
-
- if (!dmabuf) {
- DRM_ERROR("called without dma buffers!\n");
- return -EINVAL;
- }
-
- if (!n)
- return 0;
-
- switch (prim) {
- case SAVAGE_PRIM_TRILIST_201:
- reorder = 1;
- prim = SAVAGE_PRIM_TRILIST;
- case SAVAGE_PRIM_TRILIST:
- if (n % 3 != 0) {
- DRM_ERROR("wrong number of vertices %u in TRILIST\n",
- n);
- return -EINVAL;
- }
- break;
- case SAVAGE_PRIM_TRISTRIP:
- case SAVAGE_PRIM_TRIFAN:
- if (n < 3) {
- DRM_ERROR
- ("wrong number of vertices %u in TRIFAN/STRIP\n",
- n);
- return -EINVAL;
- }
- break;
- default:
- DRM_ERROR("invalid primitive type %u\n", prim);
- return -EINVAL;
- }
-
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- if (skip != 0) {
- DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip);
- return -EINVAL;
- }
- } else {
- unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) -
- (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) -
- (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1);
- if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) {
- DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip);
- return -EINVAL;
- }
- if (reorder) {
- DRM_ERROR("TRILIST_201 used on Savage4 hardware\n");
- return -EINVAL;
- }
- }
-
- if (start + n > dmabuf->total / 32) {
- DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n",
- start, start + n - 1, dmabuf->total / 32);
- return -EINVAL;
- }
-
- /* Vertex DMA doesn't work with command DMA at the same time,
- * so we use BCI_... to submit commands here. Flush buffered
- * faked DMA first. */
- DMA_FLUSH();
-
- if (dmabuf->bus_address != dev_priv->state.common.vbaddr) {
- BEGIN_BCI(2);
- BCI_SET_REGISTERS(SAVAGE_VERTBUFADDR, 1);
- BCI_WRITE(dmabuf->bus_address | dev_priv->dma_type);
- dev_priv->state.common.vbaddr = dmabuf->bus_address;
- }
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) {
- /* Workaround for what looks like a hardware bug. If a
- * WAIT_3D_IDLE was emitted some time before the
- * indexed drawing command then the engine will lock
- * up. There are two known workarounds:
- * WAIT_IDLE_EMPTY or emit at least 63 NOPs. */
- BEGIN_BCI(63);
- for (i = 0; i < 63; ++i)
- BCI_WRITE(BCI_CMD_WAIT);
- dev_priv->waiting = 0;
- }
-
- prim <<= 25;
- while (n != 0) {
- /* Can emit up to 255 indices (85 triangles) at once. */
- unsigned int count = n > 255 ? 255 : n;
- if (reorder) {
- /* Need to reorder indices for correct flat
- * shading while preserving the clock sense
- * for correct culling. Only on Savage3D. */
- int reorder[3] = { -1, -1, -1 };
- reorder[start % 3] = 2;
-
- BEGIN_BCI((count + 1 + 1) / 2);
- BCI_DRAW_INDICES_S3D(count, prim, start + 2);
-
- for (i = start + 1; i + 1 < start + count; i += 2)
- BCI_WRITE((i + reorder[i % 3]) |
- ((i + 1 +
- reorder[(i + 1) % 3]) << 16));
- if (i < start + count)
- BCI_WRITE(i + reorder[i % 3]);
- } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- BEGIN_BCI((count + 1 + 1) / 2);
- BCI_DRAW_INDICES_S3D(count, prim, start);
-
- for (i = start + 1; i + 1 < start + count; i += 2)
- BCI_WRITE(i | ((i + 1) << 16));
- if (i < start + count)
- BCI_WRITE(i);
- } else {
- BEGIN_BCI((count + 2 + 1) / 2);
- BCI_DRAW_INDICES_S4(count, prim, skip);
-
- for (i = start; i + 1 < start + count; i += 2)
- BCI_WRITE(i | ((i + 1) << 16));
- if (i < start + count)
- BCI_WRITE(i);
- }
-
- start += count;
- n -= count;
-
- prim |= BCI_CMD_DRAW_CONT;
- }
-
- return 0;
-}
-
-static int savage_dispatch_vb_prim(drm_savage_private_t *dev_priv,
- const drm_savage_cmd_header_t *cmd_header,
- const uint32_t *vtxbuf, unsigned int vb_size,
- unsigned int vb_stride)
-{
- unsigned char reorder = 0;
- unsigned int prim = cmd_header->prim.prim;
- unsigned int skip = cmd_header->prim.skip;
- unsigned int n = cmd_header->prim.count;
- unsigned int start = cmd_header->prim.start;
- unsigned int vtx_size;
- unsigned int i;
- DMA_LOCALS;
-
- if (!n)
- return 0;
-
- switch (prim) {
- case SAVAGE_PRIM_TRILIST_201:
- reorder = 1;
- prim = SAVAGE_PRIM_TRILIST;
- case SAVAGE_PRIM_TRILIST:
- if (n % 3 != 0) {
- DRM_ERROR("wrong number of vertices %u in TRILIST\n",
- n);
- return -EINVAL;
- }
- break;
- case SAVAGE_PRIM_TRISTRIP:
- case SAVAGE_PRIM_TRIFAN:
- if (n < 3) {
- DRM_ERROR
- ("wrong number of vertices %u in TRIFAN/STRIP\n",
- n);
- return -EINVAL;
- }
- break;
- default:
- DRM_ERROR("invalid primitive type %u\n", prim);
- return -EINVAL;
- }
-
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- if (skip > SAVAGE_SKIP_ALL_S3D) {
- DRM_ERROR("invalid skip flags 0x%04x\n", skip);
- return -EINVAL;
- }
- vtx_size = 8; /* full vertex */
- } else {
- if (skip > SAVAGE_SKIP_ALL_S4) {
- DRM_ERROR("invalid skip flags 0x%04x\n", skip);
- return -EINVAL;
- }
- vtx_size = 10; /* full vertex */
- }
-
- vtx_size -= (skip & 1) + (skip >> 1 & 1) +
- (skip >> 2 & 1) + (skip >> 3 & 1) + (skip >> 4 & 1) +
- (skip >> 5 & 1) + (skip >> 6 & 1) + (skip >> 7 & 1);
-
- if (vtx_size > vb_stride) {
- DRM_ERROR("vertex size greater than vb stride (%u > %u)\n",
- vtx_size, vb_stride);
- return -EINVAL;
- }
-
- if (start + n > vb_size / (vb_stride * 4)) {
- DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n",
- start, start + n - 1, vb_size / (vb_stride * 4));
- return -EINVAL;
- }
-
- prim <<= 25;
- while (n != 0) {
- /* Can emit up to 255 vertices (85 triangles) at once. */
- unsigned int count = n > 255 ? 255 : n;
- if (reorder) {
- /* Need to reorder vertices for correct flat
- * shading while preserving the clock sense
- * for correct culling. Only on Savage3D. */
- int reorder[3] = { -1, -1, -1 };
- reorder[start % 3] = 2;
-
- BEGIN_DMA(count * vtx_size + 1);
- DMA_DRAW_PRIMITIVE(count, prim, skip);
-
- for (i = start; i < start + count; ++i) {
- unsigned int j = i + reorder[i % 3];
- DMA_COPY(&vtxbuf[vb_stride * j], vtx_size);
- }
-
- DMA_COMMIT();
- } else {
- BEGIN_DMA(count * vtx_size + 1);
- DMA_DRAW_PRIMITIVE(count, prim, skip);
-
- if (vb_stride == vtx_size) {
- DMA_COPY(&vtxbuf[vb_stride * start],
- vtx_size * count);
- } else {
- for (i = start; i < start + count; ++i) {
- DMA_COPY(&vtxbuf[vb_stride * i],
- vtx_size);
- }
- }
-
- DMA_COMMIT();
- }
-
- start += count;
- n -= count;
-
- prim |= BCI_CMD_DRAW_CONT;
- }
-
- return 0;
-}
-
-static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
- const drm_savage_cmd_header_t *cmd_header,
- const uint16_t *idx,
- const struct drm_buf *dmabuf)
-{
- unsigned char reorder = 0;
- unsigned int prim = cmd_header->idx.prim;
- unsigned int skip = cmd_header->idx.skip;
- unsigned int n = cmd_header->idx.count;
- unsigned int i;
- BCI_LOCALS;
-
- if (!dmabuf) {
- DRM_ERROR("called without dma buffers!\n");
- return -EINVAL;
- }
-
- if (!n)
- return 0;
-
- switch (prim) {
- case SAVAGE_PRIM_TRILIST_201:
- reorder = 1;
- prim = SAVAGE_PRIM_TRILIST;
- case SAVAGE_PRIM_TRILIST:
- if (n % 3 != 0) {
- DRM_ERROR("wrong number of indices %u in TRILIST\n", n);
- return -EINVAL;
- }
- break;
- case SAVAGE_PRIM_TRISTRIP:
- case SAVAGE_PRIM_TRIFAN:
- if (n < 3) {
- DRM_ERROR
- ("wrong number of indices %u in TRIFAN/STRIP\n", n);
- return -EINVAL;
- }
- break;
- default:
- DRM_ERROR("invalid primitive type %u\n", prim);
- return -EINVAL;
- }
-
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- if (skip != 0) {
- DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip);
- return -EINVAL;
- }
- } else {
- unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) -
- (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) -
- (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1);
- if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) {
- DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip);
- return -EINVAL;
- }
- if (reorder) {
- DRM_ERROR("TRILIST_201 used on Savage4 hardware\n");
- return -EINVAL;
- }
- }
-
- /* Vertex DMA doesn't work with command DMA at the same time,
- * so we use BCI_... to submit commands here. Flush buffered
- * faked DMA first. */
- DMA_FLUSH();
-
- if (dmabuf->bus_address != dev_priv->state.common.vbaddr) {
- BEGIN_BCI(2);
- BCI_SET_REGISTERS(SAVAGE_VERTBUFADDR, 1);
- BCI_WRITE(dmabuf->bus_address | dev_priv->dma_type);
- dev_priv->state.common.vbaddr = dmabuf->bus_address;
- }
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) {
- /* Workaround for what looks like a hardware bug. If a
- * WAIT_3D_IDLE was emitted some time before the
- * indexed drawing command then the engine will lock
- * up. There are two known workarounds:
- * WAIT_IDLE_EMPTY or emit at least 63 NOPs. */
- BEGIN_BCI(63);
- for (i = 0; i < 63; ++i)
- BCI_WRITE(BCI_CMD_WAIT);
- dev_priv->waiting = 0;
- }
-
- prim <<= 25;
- while (n != 0) {
- /* Can emit up to 255 indices (85 triangles) at once. */
- unsigned int count = n > 255 ? 255 : n;
-
- /* check indices */
- for (i = 0; i < count; ++i) {
- if (idx[i] > dmabuf->total / 32) {
- DRM_ERROR("idx[%u]=%u out of range (0-%u)\n",
- i, idx[i], dmabuf->total / 32);
- return -EINVAL;
- }
- }
-
- if (reorder) {
- /* Need to reorder indices for correct flat
- * shading while preserving the clock sense
- * for correct culling. Only on Savage3D. */
- int reorder[3] = { 2, -1, -1 };
-
- BEGIN_BCI((count + 1 + 1) / 2);
- BCI_DRAW_INDICES_S3D(count, prim, idx[2]);
-
- for (i = 1; i + 1 < count; i += 2)
- BCI_WRITE(idx[i + reorder[i % 3]] |
- (idx[i + 1 +
- reorder[(i + 1) % 3]] << 16));
- if (i < count)
- BCI_WRITE(idx[i + reorder[i % 3]]);
- } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- BEGIN_BCI((count + 1 + 1) / 2);
- BCI_DRAW_INDICES_S3D(count, prim, idx[0]);
-
- for (i = 1; i + 1 < count; i += 2)
- BCI_WRITE(idx[i] | (idx[i + 1] << 16));
- if (i < count)
- BCI_WRITE(idx[i]);
- } else {
- BEGIN_BCI((count + 2 + 1) / 2);
- BCI_DRAW_INDICES_S4(count, prim, skip);
-
- for (i = 0; i + 1 < count; i += 2)
- BCI_WRITE(idx[i] | (idx[i + 1] << 16));
- if (i < count)
- BCI_WRITE(idx[i]);
- }
-
- idx += count;
- n -= count;
-
- prim |= BCI_CMD_DRAW_CONT;
- }
-
- return 0;
-}
-
-static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv,
- const drm_savage_cmd_header_t *cmd_header,
- const uint16_t *idx,
- const uint32_t *vtxbuf,
- unsigned int vb_size, unsigned int vb_stride)
-{
- unsigned char reorder = 0;
- unsigned int prim = cmd_header->idx.prim;
- unsigned int skip = cmd_header->idx.skip;
- unsigned int n = cmd_header->idx.count;
- unsigned int vtx_size;
- unsigned int i;
- DMA_LOCALS;
-
- if (!n)
- return 0;
-
- switch (prim) {
- case SAVAGE_PRIM_TRILIST_201:
- reorder = 1;
- prim = SAVAGE_PRIM_TRILIST;
- case SAVAGE_PRIM_TRILIST:
- if (n % 3 != 0) {
- DRM_ERROR("wrong number of indices %u in TRILIST\n", n);
- return -EINVAL;
- }
- break;
- case SAVAGE_PRIM_TRISTRIP:
- case SAVAGE_PRIM_TRIFAN:
- if (n < 3) {
- DRM_ERROR
- ("wrong number of indices %u in TRIFAN/STRIP\n", n);
- return -EINVAL;
- }
- break;
- default:
- DRM_ERROR("invalid primitive type %u\n", prim);
- return -EINVAL;
- }
-
- if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- if (skip > SAVAGE_SKIP_ALL_S3D) {
- DRM_ERROR("invalid skip flags 0x%04x\n", skip);
- return -EINVAL;
- }
- vtx_size = 8; /* full vertex */
- } else {
- if (skip > SAVAGE_SKIP_ALL_S4) {
- DRM_ERROR("invalid skip flags 0x%04x\n", skip);
- return -EINVAL;
- }
- vtx_size = 10; /* full vertex */
- }
-
- vtx_size -= (skip & 1) + (skip >> 1 & 1) +
- (skip >> 2 & 1) + (skip >> 3 & 1) + (skip >> 4 & 1) +
- (skip >> 5 & 1) + (skip >> 6 & 1) + (skip >> 7 & 1);
-
- if (vtx_size > vb_stride) {
- DRM_ERROR("vertex size greater than vb stride (%u > %u)\n",
- vtx_size, vb_stride);
- return -EINVAL;
- }
-
- prim <<= 25;
- while (n != 0) {
- /* Can emit up to 255 vertices (85 triangles) at once. */
- unsigned int count = n > 255 ? 255 : n;
-
- /* Check indices */
- for (i = 0; i < count; ++i) {
- if (idx[i] > vb_size / (vb_stride * 4)) {
- DRM_ERROR("idx[%u]=%u out of range (0-%u)\n",
- i, idx[i], vb_size / (vb_stride * 4));
- return -EINVAL;
- }
- }
-
- if (reorder) {
- /* Need to reorder vertices for correct flat
- * shading while preserving the clock sense
- * for correct culling. Only on Savage3D. */
- int reorder[3] = { 2, -1, -1 };
-
- BEGIN_DMA(count * vtx_size + 1);
- DMA_DRAW_PRIMITIVE(count, prim, skip);
-
- for (i = 0; i < count; ++i) {
- unsigned int j = idx[i + reorder[i % 3]];
- DMA_COPY(&vtxbuf[vb_stride * j], vtx_size);
- }
-
- DMA_COMMIT();
- } else {
- BEGIN_DMA(count * vtx_size + 1);
- DMA_DRAW_PRIMITIVE(count, prim, skip);
-
- for (i = 0; i < count; ++i) {
- unsigned int j = idx[i];
- DMA_COPY(&vtxbuf[vb_stride * j], vtx_size);
- }
-
- DMA_COMMIT();
- }
-
- idx += count;
- n -= count;
-
- prim |= BCI_CMD_DRAW_CONT;
- }
-
- return 0;
-}
-
-static int savage_dispatch_clear(drm_savage_private_t *dev_priv,
- const drm_savage_cmd_header_t *cmd_header,
- const drm_savage_cmd_header_t *data,
- unsigned int nbox,
- const struct drm_clip_rect *boxes)
-{
- unsigned int flags = cmd_header->clear0.flags;
- unsigned int clear_cmd;
- unsigned int i, nbufs;
- DMA_LOCALS;
-
- if (nbox == 0)
- return 0;
-
- clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP |
- BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW;
- BCI_CMD_SET_ROP(clear_cmd,0xCC);
-
- nbufs = ((flags & SAVAGE_FRONT) ? 1 : 0) +
- ((flags & SAVAGE_BACK) ? 1 : 0) + ((flags & SAVAGE_DEPTH) ? 1 : 0);
- if (nbufs == 0)
- return 0;
-
- if (data->clear1.mask != 0xffffffff) {
- /* set mask */
- BEGIN_DMA(2);
- DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1);
- DMA_WRITE(data->clear1.mask);
- DMA_COMMIT();
- }
- for (i = 0; i < nbox; ++i) {
- unsigned int x, y, w, h;
- unsigned int buf;
-
- x = boxes[i].x1, y = boxes[i].y1;
- w = boxes[i].x2 - boxes[i].x1;
- h = boxes[i].y2 - boxes[i].y1;
- BEGIN_DMA(nbufs * 6);
- for (buf = SAVAGE_FRONT; buf <= SAVAGE_DEPTH; buf <<= 1) {
- if (!(flags & buf))
- continue;
- DMA_WRITE(clear_cmd);
- switch (buf) {
- case SAVAGE_FRONT:
- DMA_WRITE(dev_priv->front_offset);
- DMA_WRITE(dev_priv->front_bd);
- break;
- case SAVAGE_BACK:
- DMA_WRITE(dev_priv->back_offset);
- DMA_WRITE(dev_priv->back_bd);
- break;
- case SAVAGE_DEPTH:
- DMA_WRITE(dev_priv->depth_offset);
- DMA_WRITE(dev_priv->depth_bd);
- break;
- }
- DMA_WRITE(data->clear1.value);
- DMA_WRITE(BCI_X_Y(x, y));
- DMA_WRITE(BCI_W_H(w, h));
- }
- DMA_COMMIT();
- }
- if (data->clear1.mask != 0xffffffff) {
- /* reset mask */
- BEGIN_DMA(2);
- DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1);
- DMA_WRITE(0xffffffff);
- DMA_COMMIT();
- }
-
- return 0;
-}
-
-static int savage_dispatch_swap(drm_savage_private_t *dev_priv,
- unsigned int nbox, const struct drm_clip_rect *boxes)
-{
- unsigned int swap_cmd;
- unsigned int i;
- DMA_LOCALS;
-
- if (nbox == 0)
- return 0;
-
- swap_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP |
- BCI_CMD_SRC_PBD_COLOR_NEW | BCI_CMD_DEST_GBD;
- BCI_CMD_SET_ROP(swap_cmd,0xCC);
-
- for (i = 0; i < nbox; ++i) {
- BEGIN_DMA(6);
- DMA_WRITE(swap_cmd);
- DMA_WRITE(dev_priv->back_offset);
- DMA_WRITE(dev_priv->back_bd);
- DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1));
- DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1));
- DMA_WRITE(BCI_W_H(boxes[i].x2 - boxes[i].x1,
- boxes[i].y2 - boxes[i].y1));
- DMA_COMMIT();
- }
-
- return 0;
-}
-
-static int savage_dispatch_draw(drm_savage_private_t *dev_priv,
- const drm_savage_cmd_header_t *start,
- const drm_savage_cmd_header_t *end,
- const struct drm_buf *dmabuf,
- const unsigned int *vtxbuf,
- unsigned int vb_size, unsigned int vb_stride,
- unsigned int nbox,
- const struct drm_clip_rect *boxes)
-{
- unsigned int i, j;
- int ret;
-
- for (i = 0; i < nbox; ++i) {
- const drm_savage_cmd_header_t *cmdbuf;
- dev_priv->emit_clip_rect(dev_priv, &boxes[i]);
-
- cmdbuf = start;
- while (cmdbuf < end) {
- drm_savage_cmd_header_t cmd_header;
- cmd_header = *cmdbuf;
- cmdbuf++;
- switch (cmd_header.cmd.cmd) {
- case SAVAGE_CMD_DMA_PRIM:
- ret = savage_dispatch_dma_prim(
- dev_priv, &cmd_header, dmabuf);
- break;
- case SAVAGE_CMD_VB_PRIM:
- ret = savage_dispatch_vb_prim(
- dev_priv, &cmd_header,
- vtxbuf, vb_size, vb_stride);
- break;
- case SAVAGE_CMD_DMA_IDX:
- j = (cmd_header.idx.count + 3) / 4;
- /* j was check in savage_bci_cmdbuf */
- ret = savage_dispatch_dma_idx(dev_priv,
- &cmd_header, (const uint16_t *)cmdbuf,
- dmabuf);
- cmdbuf += j;
- break;
- case SAVAGE_CMD_VB_IDX:
- j = (cmd_header.idx.count + 3) / 4;
- /* j was check in savage_bci_cmdbuf */
- ret = savage_dispatch_vb_idx(dev_priv,
- &cmd_header, (const uint16_t *)cmdbuf,
- (const uint32_t *)vtxbuf, vb_size,
- vb_stride);
- cmdbuf += j;
- break;
- default:
- /* What's the best return code? EFAULT? */
- DRM_ERROR("IMPLEMENTATION ERROR: "
- "non-drawing-command %d\n",
- cmd_header.cmd.cmd);
- return -EINVAL;
- }
-
- if (ret != 0)
- return ret;
- }
- }
-
- return 0;
-}
-
-int savage_bci_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_savage_private_t *dev_priv = dev->dev_private;
- struct drm_device_dma *dma = dev->dma;
- struct drm_buf *dmabuf;
- drm_savage_cmdbuf_t *cmdbuf = data;
- drm_savage_cmd_header_t *kcmd_addr = NULL;
- drm_savage_cmd_header_t *first_draw_cmd;
- unsigned int *kvb_addr = NULL;
- struct drm_clip_rect *kbox_addr = NULL;
- unsigned int i, j;
- int ret = 0;
-
- DRM_DEBUG("\n");
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (dma && dma->buflist) {
- if (cmdbuf->dma_idx > dma->buf_count) {
- DRM_ERROR
- ("vertex buffer index %u out of range (0-%u)\n",
- cmdbuf->dma_idx, dma->buf_count - 1);
- return -EINVAL;
- }
- dmabuf = dma->buflist[cmdbuf->dma_idx];
- } else {
- dmabuf = NULL;
- }
-
- /* Copy the user buffers into kernel temporary areas. This hasn't been
- * a performance loss compared to VERIFYAREA_READ/
- * COPY_FROM_USER_UNCHECKED when done in other drivers, and is correct
- * for locking on FreeBSD.
- */
- if (cmdbuf->size) {
- kcmd_addr = drm_alloc(cmdbuf->size * 8, DRM_MEM_DRIVER);
- if (kcmd_addr == NULL)
- return -ENOMEM;
-
- if (DRM_COPY_FROM_USER(kcmd_addr, cmdbuf->cmd_addr,
- cmdbuf->size * 8))
- {
- drm_free(kcmd_addr, cmdbuf->size * 8, DRM_MEM_DRIVER);
- return -EFAULT;
- }
- cmdbuf->cmd_addr = kcmd_addr;
- }
- if (cmdbuf->vb_size) {
- kvb_addr = drm_alloc(cmdbuf->vb_size, DRM_MEM_DRIVER);
- if (kvb_addr == NULL) {
- ret = -ENOMEM;
- goto done;
- }
-
- if (DRM_COPY_FROM_USER(kvb_addr, cmdbuf->vb_addr,
- cmdbuf->vb_size)) {
- ret = -EFAULT;
- goto done;
- }
- cmdbuf->vb_addr = kvb_addr;
- }
- if (cmdbuf->nbox) {
- kbox_addr = drm_alloc(cmdbuf->nbox *
- sizeof(struct drm_clip_rect),
- DRM_MEM_DRIVER);
- if (kbox_addr == NULL) {
- ret = -ENOMEM;
- goto done;
- }
-
- if (DRM_COPY_FROM_USER(kbox_addr, cmdbuf->box_addr,
- cmdbuf->nbox *
- sizeof(struct drm_clip_rect))) {
- ret = -EFAULT;
- goto done;
- }
- cmdbuf->box_addr = kbox_addr;
- }
-
- /* Make sure writes to DMA buffers are finished before sending
- * DMA commands to the graphics hardware. */
- DRM_MEMORYBARRIER();
-
- /* Coming from user space. Don't know if the Xserver has
- * emitted wait commands. Assuming the worst. */
- dev_priv->waiting = 1;
-
- i = 0;
- first_draw_cmd = NULL;
- while (i < cmdbuf->size) {
- drm_savage_cmd_header_t cmd_header;
- cmd_header = *(drm_savage_cmd_header_t *)cmdbuf->cmd_addr;
- cmdbuf->cmd_addr++;
- i++;
-
- /* Group drawing commands with same state to minimize
- * iterations over clip rects. */
- j = 0;
- switch (cmd_header.cmd.cmd) {
- case SAVAGE_CMD_DMA_IDX:
- case SAVAGE_CMD_VB_IDX:
- j = (cmd_header.idx.count + 3) / 4;
- if (i + j > cmdbuf->size) {
- DRM_ERROR("indexed drawing command extends "
- "beyond end of command buffer\n");
- DMA_FLUSH();
- return -EINVAL;
- }
- /* fall through */
- case SAVAGE_CMD_DMA_PRIM:
- case SAVAGE_CMD_VB_PRIM:
- if (!first_draw_cmd)
- first_draw_cmd = cmdbuf->cmd_addr - 1;
- cmdbuf->cmd_addr += j;
- i += j;
- break;
- default:
- if (first_draw_cmd) {
- ret = savage_dispatch_draw(
- dev_priv, first_draw_cmd,
- cmdbuf->cmd_addr - 1,
- dmabuf, cmdbuf->vb_addr,
- cmdbuf->vb_size,
- cmdbuf->vb_stride,
- cmdbuf->nbox, cmdbuf->box_addr);
- if (ret != 0)
- return ret;
- first_draw_cmd = NULL;
- }
- }
- if (first_draw_cmd)
- continue;
-
- switch (cmd_header.cmd.cmd) {
- case SAVAGE_CMD_STATE:
- j = (cmd_header.state.count + 1) / 2;
- if (i + j > cmdbuf->size) {
- DRM_ERROR("command SAVAGE_CMD_STATE extends "
- "beyond end of command buffer\n");
- DMA_FLUSH();
- ret = -EINVAL;
- goto done;
- }
- ret = savage_dispatch_state(dev_priv, &cmd_header,
- (const uint32_t *)cmdbuf->cmd_addr);
- cmdbuf->cmd_addr += j;
- i += j;
- break;
- case SAVAGE_CMD_CLEAR:
- if (i + 1 > cmdbuf->size) {
- DRM_ERROR("command SAVAGE_CMD_CLEAR extends "
- "beyond end of command buffer\n");
- DMA_FLUSH();
- ret = -EINVAL;
- goto done;
- }
- ret = savage_dispatch_clear(dev_priv, &cmd_header,
- cmdbuf->cmd_addr,
- cmdbuf->nbox,
- cmdbuf->box_addr);
- cmdbuf->cmd_addr++;
- i++;
- break;
- case SAVAGE_CMD_SWAP:
- ret = savage_dispatch_swap(dev_priv, cmdbuf->nbox,
- cmdbuf->box_addr);
- break;
- default:
- DRM_ERROR("invalid command 0x%x\n",
- cmd_header.cmd.cmd);
- DMA_FLUSH();
- ret = -EINVAL;
- goto done;
- }
-
- if (ret != 0) {
- DMA_FLUSH();
- goto done;
- }
- }
-
- if (first_draw_cmd) {
- ret = savage_dispatch_draw(
- dev_priv, first_draw_cmd, cmdbuf->cmd_addr, dmabuf,
- cmdbuf->vb_addr, cmdbuf->vb_size, cmdbuf->vb_stride,
- cmdbuf->nbox, cmdbuf->box_addr);
- if (ret != 0) {
- DMA_FLUSH();
- goto done;
- }
- }
-
- DMA_FLUSH();
-
- if (dmabuf && cmdbuf->discard) {
- drm_savage_buf_priv_t *buf_priv = dmabuf->dev_private;
- uint16_t event;
- event = savage_bci_emit_event(dev_priv, SAVAGE_WAIT_3D);
- SET_AGE(&buf_priv->age, event, dev_priv->event_wrap);
- savage_freelist_put(dev, dmabuf);
- }
-
-done:
- /* If we didn't need to allocate them, these'll be NULL */
- drm_free(kcmd_addr, cmdbuf->size * 8, DRM_MEM_DRIVER);
- drm_free(kvb_addr, cmdbuf->vb_size, DRM_MEM_DRIVER);
- drm_free(kbox_addr, cmdbuf->nbox * sizeof(struct drm_clip_rect),
- DRM_MEM_DRIVER);
-
- return ret;
-}
+++ /dev/null
-/* sis_drv.h -- Private header for sis driver -*- linux-c -*- */
-/*
- * Copyright 2005 Eric Anholt
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- */
-
-#ifndef __SIS_DRM_H__
-#define __SIS_DRM_H__
-
-/* SiS specific ioctls */
-#define NOT_USED_0_3
-#define DRM_SIS_FB_ALLOC 0x04
-#define DRM_SIS_FB_FREE 0x05
-#define NOT_USED_6_12
-#define DRM_SIS_AGP_INIT 0x13
-#define DRM_SIS_AGP_ALLOC 0x14
-#define DRM_SIS_AGP_FREE 0x15
-#define DRM_SIS_FB_INIT 0x16
-
-#define DRM_IOCTL_SIS_FB_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_FB_ALLOC, drm_sis_mem_t)
-#define DRM_IOCTL_SIS_FB_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_FREE, drm_sis_mem_t)
-#define DRM_IOCTL_SIS_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_INIT, drm_sis_agp_t)
-#define DRM_IOCTL_SIS_AGP_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_ALLOC, drm_sis_mem_t)
-#define DRM_IOCTL_SIS_AGP_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_AGP_FREE, drm_sis_mem_t)
-#define DRM_IOCTL_SIS_FB_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_INIT, drm_sis_fb_t)
-/*
-#define DRM_IOCTL_SIS_FLIP DRM_IOW( 0x48, drm_sis_flip_t)
-#define DRM_IOCTL_SIS_FLIP_INIT DRM_IO( 0x49)
-#define DRM_IOCTL_SIS_FLIP_FINAL DRM_IO( 0x50)
-*/
-
-typedef struct {
- int context;
- unsigned int offset;
- unsigned int size;
- unsigned long free;
-} drm_sis_mem_t;
-
-typedef struct {
- unsigned int offset, size;
-} drm_sis_agp_t;
-
-typedef struct {
- unsigned int offset, size;
-} drm_sis_fb_t;
-
-#endif /* __SIS_DRM_H__ */
+++ /dev/null
-/* sis_drv.h -- Private header for sis driver -*- linux-c -*- */
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef _SIS_DRV_H_
-#define _SIS_DRV_H_
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "SIS, Tungsten Graphics"
-#define DRIVER_NAME "sis"
-#define DRIVER_DESC "SIS 300/630/540 and XGI V3XE/V5/V8"
-#define DRIVER_DATE "20070626"
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 3
-#define DRIVER_PATCHLEVEL 0
-
-enum sis_family {
- SIS_OTHER = 0,
- SIS_CHIP_315 = 1,
-};
-
-#if defined(__linux__)
-#define SIS_HAVE_CORE_MM
-#endif
-
-#ifdef SIS_HAVE_CORE_MM
-#include "drm_sman.h"
-
-#define SIS_BASE (dev_priv->mmio)
-#define SIS_READ(reg) DRM_READ32(SIS_BASE, reg);
-#define SIS_WRITE(reg, val) DRM_WRITE32(SIS_BASE, reg, val);
-
-typedef struct drm_sis_private {
- drm_local_map_t *mmio;
- unsigned int idle_fault;
- struct drm_sman sman;
- unsigned int chipset;
- int vram_initialized;
- int agp_initialized;
- unsigned long vram_offset;
- unsigned long agp_offset;
-} drm_sis_private_t;
-
-extern int sis_idle(struct drm_device *dev);
-extern void sis_reclaim_buffers_locked(struct drm_device *dev,
- struct drm_file *file_priv);
-extern void sis_lastclose(struct drm_device *dev);
-
-#else
-#include "sis_ds.h"
-
-typedef struct drm_sis_private {
- memHeap_t *AGPHeap;
- memHeap_t *FBHeap;
-} drm_sis_private_t;
-
-extern int sis_init_context(struct drm_device * dev, int context);
-extern int sis_final_context(struct drm_device * dev, int context);
-
-#endif
-
-extern struct drm_ioctl_desc sis_ioctls[];
-extern int sis_max_ioctl;
-
-#endif
+++ /dev/null
-/* sis_ds.c -- Private header for Direct Rendering Manager -*- linux-c -*-
- * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw
- *
- * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Sung-Ching Lin <sclin@sis.com.tw>
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "sis_ds.h"
-
-/* Set Data Structure, not check repeated value
- * temporarily used
- */
-
-set_t *setInit(void)
-{
- int i;
- set_t *set;
-
- set = (set_t *) drm_alloc(sizeof(set_t), DRM_MEM_DRIVER);
- if (set != NULL) {
- for (i = 0; i < SET_SIZE; i++) {
- set->list[i].free_next = i + 1;
- set->list[i].alloc_next = -1;
- }
- set->list[SET_SIZE - 1].free_next = -1;
- set->free = 0;
- set->alloc = -1;
- set->trace = -1;
- }
- return set;
-}
-
-int setAdd(set_t * set, ITEM_TYPE item)
-{
- int free = set->free;
-
- if (free != -1) {
- set->list[free].val = item;
- set->free = set->list[free].free_next;
- } else {
- return 0;
- }
-
- set->list[free].alloc_next = set->alloc;
- set->alloc = free;
- set->list[free].free_next = -1;
-
- return 1;
-}
-
-int setDel(set_t * set, ITEM_TYPE item)
-{
- int alloc = set->alloc;
- int prev = -1;
-
- while (alloc != -1) {
- if (set->list[alloc].val == item) {
- if (prev != -1)
- set->list[prev].alloc_next =
- set->list[alloc].alloc_next;
- else
- set->alloc = set->list[alloc].alloc_next;
- break;
- }
- prev = alloc;
- alloc = set->list[alloc].alloc_next;
- }
-
- if (alloc == -1)
- return 0;
-
- set->list[alloc].free_next = set->free;
- set->free = alloc;
- set->list[alloc].alloc_next = -1;
-
- return 1;
-}
-
-/* setFirst -> setAdd -> setNext is wrong */
-
-int setFirst(set_t * set, ITEM_TYPE * item)
-{
- if (set->alloc == -1)
- return 0;
-
- *item = set->list[set->alloc].val;
- set->trace = set->list[set->alloc].alloc_next;
-
- return 1;
-}
-
-int setNext(set_t * set, ITEM_TYPE * item)
-{
- if (set->trace == -1)
- return 0;
-
- *item = set->list[set->trace].val;
- set->trace = set->list[set->trace].alloc_next;
-
- return 1;
-}
-
-int setDestroy(set_t * set)
-{
- drm_free(set, sizeof(set_t), DRM_MEM_DRIVER);
-
- return 1;
-}
-
-/*
- * GLX Hardware Device Driver common code
- * Copyright (C) 1999 Wittawat Yamwong
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * WITTAWAT YAMWONG, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
- * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#define ISFREE(bptr) ((bptr)->free)
-
-memHeap_t *mmInit(int ofs, int size)
-{
- PMemBlock blocks;
-
- if (size <= 0)
- return NULL;
-
- blocks = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), DRM_MEM_DRIVER);
- if (blocks != NULL) {
- blocks->ofs = ofs;
- blocks->size = size;
- blocks->free = 1;
- return (memHeap_t *) blocks;
- } else
- return NULL;
-}
-
-/* Checks if a pointer 'b' is part of the heap 'heap' */
-int mmBlockInHeap(memHeap_t * heap, PMemBlock b)
-{
- TMemBlock *p;
-
- if (heap == NULL || b == NULL)
- return 0;
-
- p = heap;
- while (p != NULL && p != b) {
- p = p->next;
- }
- if (p == b)
- return 1;
- else
- return 0;
-}
-
-static TMemBlock *SliceBlock(TMemBlock * p,
- int startofs, int size,
- int reserved, int alignment)
-{
- TMemBlock *newblock;
-
- /* break left */
- if (startofs > p->ofs) {
- newblock = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock),
- DRM_MEM_DRIVER);
- newblock->ofs = startofs;
- newblock->size = p->size - (startofs - p->ofs);
- newblock->free = 1;
- newblock->next = p->next;
- p->size -= newblock->size;
- p->next = newblock;
- p = newblock;
- }
-
- /* break right */
- if (size < p->size) {
- newblock = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock),
- DRM_MEM_DRIVER);
- newblock->ofs = startofs + size;
- newblock->size = p->size - size;
- newblock->free = 1;
- newblock->next = p->next;
- p->size = size;
- p->next = newblock;
- }
-
- /* p = middle block */
- p->align = alignment;
- p->free = 0;
- p->reserved = reserved;
- return p;
-}
-
-PMemBlock mmAllocMem(memHeap_t * heap, int size, int align2, int startSearch)
-{
- int mask, startofs, endofs;
- TMemBlock *p;
-
- if (heap == NULL || align2 < 0 || size <= 0)
- return NULL;
-
- mask = (1 << align2) - 1;
- startofs = 0;
- p = (TMemBlock *) heap;
- while (p != NULL) {
- if (ISFREE(p)) {
- startofs = (p->ofs + mask) & ~mask;
- if (startofs < startSearch) {
- startofs = startSearch;
- }
- endofs = startofs + size;
- if (endofs <= (p->ofs + p->size))
- break;
- }
- p = p->next;
- }
- if (p == NULL)
- return NULL;
- p = SliceBlock(p, startofs, size, 0, mask + 1);
- p->heap = heap;
- return p;
-}
-
-static __inline__ int Join2Blocks(TMemBlock * p)
-{
- if (p->free && p->next && p->next->free) {
- TMemBlock *q = p->next;
- p->size += q->size;
- p->next = q->next;
- drm_free(q, sizeof(TMemBlock), DRM_MEM_DRIVER);
- return 1;
- }
- return 0;
-}
-
-int mmFreeMem(PMemBlock b)
-{
- TMemBlock *p, *prev;
-
- if (b == NULL)
- return 0;
- if (b->heap == NULL)
- return -1;
-
- p = b->heap;
- prev = NULL;
- while (p != NULL && p != b) {
- prev = p;
- p = p->next;
- }
- if (p == NULL || p->free || p->reserved)
- return -1;
-
- p->free = 1;
- Join2Blocks(p);
- if (prev)
- Join2Blocks(prev);
- return 0;
-}
+++ /dev/null
-/* sis_ds.h -- Private header for Direct Rendering Manager -*- linux-c -*-
- * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw
- */
-/*
- * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Sung-Ching Lin <sclin@sis.com.tw>
- *
- */
-
-#ifndef __SIS_DS_H__
-#define __SIS_DS_H__
-
-/* Set Data Structure */
-
-#define SET_SIZE 5000
-
-typedef unsigned long ITEM_TYPE;
-
-typedef struct {
- ITEM_TYPE val;
- int alloc_next, free_next;
-} list_item_t;
-
-typedef struct {
- int alloc;
- int free;
- int trace;
- list_item_t list[SET_SIZE];
-} set_t;
-
-set_t *setInit(void);
-int setAdd(set_t * set, ITEM_TYPE item);
-int setDel(set_t * set, ITEM_TYPE item);
-int setFirst(set_t * set, ITEM_TYPE * item);
-int setNext(set_t * set, ITEM_TYPE * item);
-int setDestroy(set_t * set);
-
-/*
- * GLX Hardware Device Driver common code
- * Copyright (C) 1999 Wittawat Yamwong
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * WITTAWAT YAMWONG, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
- * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-struct mem_block_t {
- struct mem_block_t *next;
- struct mem_block_t *heap;
- int ofs, size;
- int align;
- unsigned int free:1;
- unsigned int reserved:1;
-};
-typedef struct mem_block_t TMemBlock;
-typedef struct mem_block_t *PMemBlock;
-
-/* a heap is just the first block in a chain */
-typedef struct mem_block_t memHeap_t;
-
-static __inline__ int mmBlockSize(PMemBlock b)
-{
- return b->size;
-}
-
-static __inline__ int mmOffset(PMemBlock b)
-{
- return b->ofs;
-}
-
-static __inline__ void mmMarkReserved(PMemBlock b)
-{
- b->reserved = 1;
-}
-
-/*
- * input: total size in bytes
- * return: a heap pointer if OK, NULL if error
- */
-memHeap_t *mmInit(int ofs, int size);
-
-/*
- * Allocate 'size' bytes with 2^align2 bytes alignment,
- * restrict the search to free memory after 'startSearch'
- * depth and back buffers should be in different 4mb banks
- * to get better page hits if possible
- * input: size = size of block
- * align2 = 2^align2 bytes alignment
- * startSearch = linear offset from start of heap to begin search
- * return: pointer to the allocated block, 0 if error
- */
-PMemBlock mmAllocMem(memHeap_t * heap, int size, int align2, int startSearch);
-
-/*
- * Returns 1 if the block 'b' is part of the heap 'heap'
- */
-int mmBlockInHeap(PMemBlock heap, PMemBlock b);
-
-/*
- * Free block starts at offset
- * input: pointer to a block
- * return: 0 if OK, -1 if error
- */
-int mmFreeMem(PMemBlock b);
-
-/* For debuging purpose. */
-void mmDumpMemInfo(memHeap_t * mmInit);
-
-#endif /* __SIS_DS_H__ */
+++ /dev/null
-/* sis_mm.c -- Private header for Direct Rendering Manager -*- linux-c -*-
- * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw
- *
- * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Sung-Ching Lin <sclin@sis.com.tw>
- *
- */
-
-#if defined(__linux__) && defined(CONFIG_FB_SIS)
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-#include <video/sisfb.h>
-#else
-#include <linux/sisfb.h>
-#endif
-#endif
-#include "drmP.h"
-#include "sis_drm.h"
-#include "sis_drv.h"
-#include "sis_ds.h"
-
-#define MAX_CONTEXT 100
-#define VIDEO_TYPE 0
-#define AGP_TYPE 1
-
-typedef struct {
- int used;
- int context;
- set_t *sets[2]; /* 0 for video, 1 for AGP */
-} sis_context_t;
-
-static sis_context_t global_ppriv[MAX_CONTEXT];
-
-static int add_alloc_set(int context, int type, unsigned int val)
-{
- int i, retval = 0;
-
- for (i = 0; i < MAX_CONTEXT; i++) {
- if (global_ppriv[i].used && global_ppriv[i].context == context) {
- retval = setAdd(global_ppriv[i].sets[type], val);
- break;
- }
- }
- return retval;
-}
-
-static int del_alloc_set(int context, int type, unsigned int val)
-{
- int i, retval = 0;
-
- for (i = 0; i < MAX_CONTEXT; i++) {
- if (global_ppriv[i].used && global_ppriv[i].context == context) {
- retval = setDel(global_ppriv[i].sets[type], val);
- break;
- }
- }
- return retval;
-}
-
-/* fb management via fb device */
-#if defined(__linux__) && defined(CONFIG_FB_SIS)
-
-static int sis_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- return 0;
-}
-
-static int sis_fb_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_mem_t *fb = data;
- struct sis_memreq req;
- int retval = 0;
-
- req.size = fb->size;
- sis_malloc(&req);
- if (req.offset) {
- /* TODO */
- fb->offset = req.offset;
- fb->free = req.offset;
- if (!add_alloc_set(fb->context, VIDEO_TYPE, fb->free)) {
- DRM_DEBUG("adding to allocation set fails\n");
- sis_free(req.offset);
- retval = -EINVAL;
- }
- } else {
- fb->offset = 0;
- fb->size = 0;
- fb->free = 0;
- }
-
- DRM_DEBUG("alloc fb, size = %d, offset = %ld\n", fb->size, req.offset);
-
- return retval;
-}
-
-static int sis_fb_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_mem_t fb;
- int retval = 0;
-
- if (!fb->free)
- return -EINVAL;
-
- if (!del_alloc_set(fb->context, VIDEO_TYPE, fb->free))
- retval = -EINVAL;
- sis_free(fb->free);
-
- DRM_DEBUG("free fb, offset = 0x%lx\n", fb->free);
-
- return retval;
-}
-
-#else
-
-/* Called by the X Server to initialize the FB heap. Allocations will fail
- * unless this is called. Offset is the beginning of the heap from the
- * framebuffer offset (MaxXFBMem in XFree86).
- *
- * Memory layout according to Thomas Winischofer:
- * |------------------|DDDDDDDDDDDDDDDDDDDDDDDDDDDDD|HHHH|CCCCCCCCCCC|
- *
- * X driver/sisfb HW- Command-
- * framebuffer memory DRI heap Cursor queue
- */
-static int sis_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_fb_t *fb = data;
-
- if (dev_priv == NULL) {
- dev->dev_private = drm_calloc(1, sizeof(drm_sis_private_t),
- DRM_MEM_DRIVER);
- dev_priv = dev->dev_private;
- if (dev_priv == NULL)
- return ENOMEM;
- }
-
- if (dev_priv->FBHeap != NULL)
- return -EINVAL;
-
- dev_priv->FBHeap = mmInit(fb->offset, fb->size);
-
- DRM_DEBUG("offset = %u, size = %u", fb->offset, fb->size);
-
- return 0;
-}
-
-static int sis_fb_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_mem_t *fb = data;
- PMemBlock block;
- int retval = 0;
-
- if (dev_priv == NULL || dev_priv->FBHeap == NULL)
- return -EINVAL;
-
- block = mmAllocMem(dev_priv->FBHeap, fb->size, 0, 0);
- if (block) {
- /* TODO */
- fb->offset = block->ofs;
- fb->free = (unsigned long)block;
- if (!add_alloc_set(fb->context, VIDEO_TYPE, fb->free)) {
- DRM_DEBUG("adding to allocation set fails\n");
- mmFreeMem((PMemBlock) fb->free);
- retval = -EINVAL;
- }
- } else {
- fb->offset = 0;
- fb->size = 0;
- fb->free = 0;
- }
-
- DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb->size, fb->offset);
-
- return retval;
-}
-
-static int sis_fb_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_mem_t *fb = data;
-
- if (dev_priv == NULL || dev_priv->FBHeap == NULL)
- return -EINVAL;
-
- if (!mmBlockInHeap(dev_priv->FBHeap, (PMemBlock) fb->free))
- return -EINVAL;
-
- if (!del_alloc_set(fb->context, VIDEO_TYPE, fb->free))
- return -EINVAL;
- mmFreeMem((PMemBlock) fb->free);
-
- DRM_DEBUG("free fb, free = 0x%lx\n", fb->free);
-
- return 0;
-}
-
-#endif
-
-/* agp memory management */
-
-static int sis_ioctl_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_agp_t *agp = data;
-
- if (dev_priv == NULL) {
- dev->dev_private = drm_calloc(1, sizeof(drm_sis_private_t),
- DRM_MEM_DRIVER);
- dev_priv = dev->dev_private;
- if (dev_priv == NULL)
- return ENOMEM;
- }
-
- if (dev_priv->AGPHeap != NULL)
- return -EINVAL;
-
- dev_priv->AGPHeap = mmInit(agp->offset, agp->size);
-
- DRM_DEBUG("offset = %u, size = %u", agp->offset, agp->size);
-
- return 0;
-}
-
-static int sis_ioctl_agp_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_mem_t *agp = data;
- PMemBlock block;
- int retval = 0;
-
- if (dev_priv == NULL || dev_priv->AGPHeap == NULL)
- return -EINVAL;
-
- block = mmAllocMem(dev_priv->AGPHeap, agp->size, 0, 0);
- if (block) {
- /* TODO */
- agp->offset = block->ofs;
- agp->free = (unsigned long)block;
- if (!add_alloc_set(agp->context, AGP_TYPE, agp->free)) {
- DRM_DEBUG("adding to allocation set fails\n");
- mmFreeMem((PMemBlock) agp->free);
- retval = -1;
- }
- } else {
- agp->offset = 0;
- agp->size = 0;
- agp->free = 0;
- }
-
- DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp->size,
- agp->offset);
-
- return retval;
-}
-
-static int sis_ioctl_agp_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_sis_private_t *dev_priv = dev->dev_private;
- drm_sis_mem_t *agp = data;
-
- if (dev_priv == NULL || dev_priv->AGPHeap == NULL)
- return -EINVAL;
-
- if (!mmBlockInHeap(dev_priv->AGPHeap, (PMemBlock) agp->free))
- return -EINVAL;
-
- mmFreeMem((PMemBlock) agp->free);
- if (!del_alloc_set(agp->context, AGP_TYPE, agp->free))
- return -EINVAL;
-
- DRM_DEBUG("free agp, free = 0x%lx\n", agp->free);
-
- return 0;
-}
-
-int sis_init_context(struct drm_device *dev, int context)
-{
- int i;
-
- for (i = 0; i < MAX_CONTEXT; i++) {
- if (global_ppriv[i].used &&
- (global_ppriv[i].context == context))
- break;
- }
-
- if (i >= MAX_CONTEXT) {
- for (i = 0; i < MAX_CONTEXT; i++) {
- if (!global_ppriv[i].used) {
- global_ppriv[i].context = context;
- global_ppriv[i].used = 1;
- global_ppriv[i].sets[0] = setInit();
- global_ppriv[i].sets[1] = setInit();
- DRM_DEBUG("init allocation set, socket=%d, "
- "context = %d\n", i, context);
- break;
- }
- }
- if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) ||
- (global_ppriv[i].sets[1] == NULL)) {
- return 0;
- }
- }
-
- return 1;
-}
-
-int sis_final_context(struct drm_device *dev, int context)
-{
- int i;
-
- for (i = 0; i < MAX_CONTEXT; i++) {
- if (global_ppriv[i].used &&
- (global_ppriv[i].context == context))
- break;
- }
-
- if (i < MAX_CONTEXT) {
- set_t *set;
- ITEM_TYPE item;
- int retval;
-
- DRM_DEBUG("find socket %d, context = %d\n", i, context);
-
- /* Video Memory */
- set = global_ppriv[i].sets[0];
- retval = setFirst(set, &item);
- while (retval) {
- DRM_DEBUG("free video memory 0x%lx\n", item);
-#if defined(__linux__) && defined(CONFIG_FB_SIS)
- sis_free(item);
-#else
- mmFreeMem((PMemBlock) item);
-#endif
- retval = setNext(set, &item);
- }
- setDestroy(set);
-
- /* AGP Memory */
- set = global_ppriv[i].sets[1];
- retval = setFirst(set, &item);
- while (retval) {
- DRM_DEBUG("free agp memory 0x%lx\n", item);
- mmFreeMem((PMemBlock) item);
- retval = setNext(set, &item);
- }
- setDestroy(set);
-
- global_ppriv[i].used = 0;
- }
-
- return 1;
-}
-
-drm_ioctl_desc_t sis_ioctls[] = {
- DRM_IOCTL_DEF(DRM_SIS_FB_ALLOC, sis_fb_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SIS_FB_FREE, sis_fb_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SIS_AGP_INIT, sis_ioctl_agp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_SIS_AGP_ALLOC, sis_ioctl_agp_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SIS_AGP_FREE, sis_ioctl_agp_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_SIS_FB_INIT, sis_fb_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY)
-};
-
-int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls);
+++ /dev/null
-/* tdfx.h -- 3dfx DRM template customization -*- linux-c -*-
- * Created: Wed Feb 14 12:32:32 2001 by gareth@valinux.com
- */
-/*
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Gareth Hughes <gareth@valinux.com>
- */
-
-#ifndef __TDFX_H__
-#define __TDFX_H__
-
-/* General customization:
- */
-
-#define DRIVER_AUTHOR "VA Linux Systems Inc."
-
-#define DRIVER_NAME "tdfx"
-#define DRIVER_DESC "3dfx Banshee/Voodoo3+"
-#define DRIVER_DATE "20010216"
-
-#define DRIVER_MAJOR 1
-#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 0
-
-#endif
+++ /dev/null
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef VIA_3D_REG_H
-#define VIA_3D_REG_H
-#define HC_REG_BASE 0x0400
-
-#define HC_REG_TRANS_SPACE 0x0040
-
-#define HC_ParaN_MASK 0xffffffff
-#define HC_Para_MASK 0x00ffffff
-#define HC_SubA_MASK 0xff000000
-#define HC_SubA_SHIFT 24
-/* Transmission Setting
- */
-#define HC_REG_TRANS_SET 0x003c
-#define HC_ParaSubType_MASK 0xff000000
-#define HC_ParaType_MASK 0x00ff0000
-#define HC_ParaOS_MASK 0x0000ff00
-#define HC_ParaAdr_MASK 0x000000ff
-#define HC_ParaSubType_SHIFT 24
-#define HC_ParaType_SHIFT 16
-#define HC_ParaOS_SHIFT 8
-#define HC_ParaAdr_SHIFT 0
-
-#define HC_ParaType_CmdVdata 0x0000
-#define HC_ParaType_NotTex 0x0001
-#define HC_ParaType_Tex 0x0002
-#define HC_ParaType_Palette 0x0003
-#define HC_ParaType_PreCR 0x0010
-#define HC_ParaType_Auto 0x00fe
-
-/* Transmission Space
- */
-#define HC_REG_Hpara0 0x0040
-#define HC_REG_HpataAF 0x02fc
-
-/* Read
- */
-#define HC_REG_HREngSt 0x0000
-#define HC_REG_HRFIFOempty 0x0004
-#define HC_REG_HRFIFOfull 0x0008
-#define HC_REG_HRErr 0x000c
-#define HC_REG_FIFOstatus 0x0010
-/* HC_REG_HREngSt 0x0000
- */
-#define HC_HDASZC_MASK 0x00010000
-#define HC_HSGEMI_MASK 0x0000f000
-#define HC_HLGEMISt_MASK 0x00000f00
-#define HC_HCRSt_MASK 0x00000080
-#define HC_HSE0St_MASK 0x00000040
-#define HC_HSE1St_MASK 0x00000020
-#define HC_HPESt_MASK 0x00000010
-#define HC_HXESt_MASK 0x00000008
-#define HC_HBESt_MASK 0x00000004
-#define HC_HE2St_MASK 0x00000002
-#define HC_HE3St_MASK 0x00000001
-/* HC_REG_HRFIFOempty 0x0004
- */
-#define HC_HRZDempty_MASK 0x00000010
-#define HC_HRTXAempty_MASK 0x00000008
-#define HC_HRTXDempty_MASK 0x00000004
-#define HC_HWZDempty_MASK 0x00000002
-#define HC_HWCDempty_MASK 0x00000001
-/* HC_REG_HRFIFOfull 0x0008
- */
-#define HC_HRZDfull_MASK 0x00000010
-#define HC_HRTXAfull_MASK 0x00000008
-#define HC_HRTXDfull_MASK 0x00000004
-#define HC_HWZDfull_MASK 0x00000002
-#define HC_HWCDfull_MASK 0x00000001
-/* HC_REG_HRErr 0x000c
- */
-#define HC_HAGPCMErr_MASK 0x80000000
-#define HC_HAGPCMErrC_MASK 0x70000000
-/* HC_REG_FIFOstatus 0x0010
- */
-#define HC_HRFIFOATall_MASK 0x80000000
-#define HC_HRFIFOATbusy_MASK 0x40000000
-#define HC_HRATFGMDo_MASK 0x00000100
-#define HC_HRATFGMDi_MASK 0x00000080
-#define HC_HRATFRZD_MASK 0x00000040
-#define HC_HRATFRTXA_MASK 0x00000020
-#define HC_HRATFRTXD_MASK 0x00000010
-#define HC_HRATFWZD_MASK 0x00000008
-#define HC_HRATFWCD_MASK 0x00000004
-#define HC_HRATTXTAG_MASK 0x00000002
-#define HC_HRATTXCH_MASK 0x00000001
-
-/* AGP Command Setting
- */
-#define HC_SubA_HAGPBstL 0x0060
-#define HC_SubA_HAGPBendL 0x0061
-#define HC_SubA_HAGPCMNT 0x0062
-#define HC_SubA_HAGPBpL 0x0063
-#define HC_SubA_HAGPBpH 0x0064
-/* HC_SubA_HAGPCMNT 0x0062
- */
-#define HC_HAGPCMNT_MASK 0x00800000
-#define HC_HCmdErrClr_MASK 0x00400000
-#define HC_HAGPBendH_MASK 0x0000ff00
-#define HC_HAGPBstH_MASK 0x000000ff
-#define HC_HAGPBendH_SHIFT 8
-#define HC_HAGPBstH_SHIFT 0
-/* HC_SubA_HAGPBpL 0x0063
- */
-#define HC_HAGPBpL_MASK 0x00fffffc
-#define HC_HAGPBpID_MASK 0x00000003
-#define HC_HAGPBpID_PAUSE 0x00000000
-#define HC_HAGPBpID_JUMP 0x00000001
-#define HC_HAGPBpID_STOP 0x00000002
-/* HC_SubA_HAGPBpH 0x0064
- */
-#define HC_HAGPBpH_MASK 0x00ffffff
-
-/* Miscellaneous Settings
- */
-#define HC_SubA_HClipTB 0x0070
-#define HC_SubA_HClipLR 0x0071
-#define HC_SubA_HFPClipTL 0x0072
-#define HC_SubA_HFPClipBL 0x0073
-#define HC_SubA_HFPClipLL 0x0074
-#define HC_SubA_HFPClipRL 0x0075
-#define HC_SubA_HFPClipTBH 0x0076
-#define HC_SubA_HFPClipLRH 0x0077
-#define HC_SubA_HLP 0x0078
-#define HC_SubA_HLPRF 0x0079
-#define HC_SubA_HSolidCL 0x007a
-#define HC_SubA_HPixGC 0x007b
-#define HC_SubA_HSPXYOS 0x007c
-#define HC_SubA_HVertexCNT 0x007d
-
-#define HC_HClipT_MASK 0x00fff000
-#define HC_HClipT_SHIFT 12
-#define HC_HClipB_MASK 0x00000fff
-#define HC_HClipB_SHIFT 0
-#define HC_HClipL_MASK 0x00fff000
-#define HC_HClipL_SHIFT 12
-#define HC_HClipR_MASK 0x00000fff
-#define HC_HClipR_SHIFT 0
-#define HC_HFPClipBH_MASK 0x0000ff00
-#define HC_HFPClipBH_SHIFT 8
-#define HC_HFPClipTH_MASK 0x000000ff
-#define HC_HFPClipTH_SHIFT 0
-#define HC_HFPClipRH_MASK 0x0000ff00
-#define HC_HFPClipRH_SHIFT 8
-#define HC_HFPClipLH_MASK 0x000000ff
-#define HC_HFPClipLH_SHIFT 0
-#define HC_HSolidCH_MASK 0x000000ff
-#define HC_HPixGC_MASK 0x00800000
-#define HC_HSPXOS_MASK 0x00fff000
-#define HC_HSPXOS_SHIFT 12
-#define HC_HSPYOS_MASK 0x00000fff
-
-/* Command
- * Command A
- */
-#define HC_HCmdHeader_MASK 0xfe000000 /*0xffe00000 */
-#define HC_HE3Fire_MASK 0x00100000
-#define HC_HPMType_MASK 0x000f0000
-#define HC_HEFlag_MASK 0x0000e000
-#define HC_HShading_MASK 0x00001c00
-#define HC_HPMValidN_MASK 0x00000200
-#define HC_HPLEND_MASK 0x00000100
-#define HC_HVCycle_MASK 0x000000ff
-#define HC_HVCycle_Style_MASK 0x000000c0
-#define HC_HVCycle_ChgA_MASK 0x00000030
-#define HC_HVCycle_ChgB_MASK 0x0000000c
-#define HC_HVCycle_ChgC_MASK 0x00000003
-#define HC_HPMType_Point 0x00000000
-#define HC_HPMType_Line 0x00010000
-#define HC_HPMType_Tri 0x00020000
-#define HC_HPMType_TriWF 0x00040000
-#define HC_HEFlag_NoAA 0x00000000
-#define HC_HEFlag_ab 0x00008000
-#define HC_HEFlag_bc 0x00004000
-#define HC_HEFlag_ca 0x00002000
-#define HC_HShading_Solid 0x00000000
-#define HC_HShading_FlatA 0x00000400
-#define HC_HShading_FlatB 0x00000800
-#define HC_HShading_FlatC 0x00000c00
-#define HC_HShading_Gouraud 0x00001000
-#define HC_HVCycle_Full 0x00000000
-#define HC_HVCycle_AFP 0x00000040
-#define HC_HVCycle_One 0x000000c0
-#define HC_HVCycle_NewA 0x00000000
-#define HC_HVCycle_AA 0x00000010
-#define HC_HVCycle_AB 0x00000020
-#define HC_HVCycle_AC 0x00000030
-#define HC_HVCycle_NewB 0x00000000
-#define HC_HVCycle_BA 0x00000004
-#define HC_HVCycle_BB 0x00000008
-#define HC_HVCycle_BC 0x0000000c
-#define HC_HVCycle_NewC 0x00000000
-#define HC_HVCycle_CA 0x00000001
-#define HC_HVCycle_CB 0x00000002
-#define HC_HVCycle_CC 0x00000003
-
-/* Command B
- */
-#define HC_HLPrst_MASK 0x00010000
-#define HC_HLLastP_MASK 0x00008000
-#define HC_HVPMSK_MASK 0x00007f80
-#define HC_HBFace_MASK 0x00000040
-#define HC_H2nd1VT_MASK 0x0000003f
-#define HC_HVPMSK_X 0x00004000
-#define HC_HVPMSK_Y 0x00002000
-#define HC_HVPMSK_Z 0x00001000
-#define HC_HVPMSK_W 0x00000800
-#define HC_HVPMSK_Cd 0x00000400
-#define HC_HVPMSK_Cs 0x00000200
-#define HC_HVPMSK_S 0x00000100
-#define HC_HVPMSK_T 0x00000080
-
-/* Enable Setting
- */
-#define HC_SubA_HEnable 0x0000
-#define HC_HenTXEnvMap_MASK 0x00200000
-#define HC_HenVertexCNT_MASK 0x00100000
-#define HC_HenCPUDAZ_MASK 0x00080000
-#define HC_HenDASZWC_MASK 0x00040000
-#define HC_HenFBCull_MASK 0x00020000
-#define HC_HenCW_MASK 0x00010000
-#define HC_HenAA_MASK 0x00008000
-#define HC_HenST_MASK 0x00004000
-#define HC_HenZT_MASK 0x00002000
-#define HC_HenZW_MASK 0x00001000
-#define HC_HenAT_MASK 0x00000800
-#define HC_HenAW_MASK 0x00000400
-#define HC_HenSP_MASK 0x00000200
-#define HC_HenLP_MASK 0x00000100
-#define HC_HenTXCH_MASK 0x00000080
-#define HC_HenTXMP_MASK 0x00000040
-#define HC_HenTXPP_MASK 0x00000020
-#define HC_HenTXTR_MASK 0x00000010
-#define HC_HenCS_MASK 0x00000008
-#define HC_HenFOG_MASK 0x00000004
-#define HC_HenABL_MASK 0x00000002
-#define HC_HenDT_MASK 0x00000001
-
-/* Z Setting
- */
-#define HC_SubA_HZWBBasL 0x0010
-#define HC_SubA_HZWBBasH 0x0011
-#define HC_SubA_HZWBType 0x0012
-#define HC_SubA_HZBiasL 0x0013
-#define HC_SubA_HZWBend 0x0014
-#define HC_SubA_HZWTMD 0x0015
-#define HC_SubA_HZWCDL 0x0016
-#define HC_SubA_HZWCTAGnum 0x0017
-#define HC_SubA_HZCYNum 0x0018
-#define HC_SubA_HZWCFire 0x0019
-/* HC_SubA_HZWBType
- */
-#define HC_HZWBType_MASK 0x00800000
-#define HC_HZBiasedWB_MASK 0x00400000
-#define HC_HZONEasFF_MASK 0x00200000
-#define HC_HZOONEasFF_MASK 0x00100000
-#define HC_HZWBFM_MASK 0x00030000
-#define HC_HZWBLoc_MASK 0x0000c000
-#define HC_HZWBPit_MASK 0x00003fff
-#define HC_HZWBFM_16 0x00000000
-#define HC_HZWBFM_32 0x00020000
-#define HC_HZWBFM_24 0x00030000
-#define HC_HZWBLoc_Local 0x00000000
-#define HC_HZWBLoc_SyS 0x00004000
-/* HC_SubA_HZWBend
- */
-#define HC_HZWBend_MASK 0x00ffe000
-#define HC_HZBiasH_MASK 0x000000ff
-#define HC_HZWBend_SHIFT 10
-/* HC_SubA_HZWTMD
- */
-#define HC_HZWTMD_MASK 0x00070000
-#define HC_HEBEBias_MASK 0x00007f00
-#define HC_HZNF_MASK 0x000000ff
-#define HC_HZWTMD_NeverPass 0x00000000
-#define HC_HZWTMD_LT 0x00010000
-#define HC_HZWTMD_EQ 0x00020000
-#define HC_HZWTMD_LE 0x00030000
-#define HC_HZWTMD_GT 0x00040000
-#define HC_HZWTMD_NE 0x00050000
-#define HC_HZWTMD_GE 0x00060000
-#define HC_HZWTMD_AllPass 0x00070000
-#define HC_HEBEBias_SHIFT 8
-/* HC_SubA_HZWCDL 0x0016
- */
-#define HC_HZWCDL_MASK 0x00ffffff
-/* HC_SubA_HZWCTAGnum 0x0017
- */
-#define HC_HZWCTAGnum_MASK 0x00ff0000
-#define HC_HZWCTAGnum_SHIFT 16
-#define HC_HZWCDH_MASK 0x000000ff
-#define HC_HZWCDH_SHIFT 0
-/* HC_SubA_HZCYNum 0x0018
- */
-#define HC_HZCYNum_MASK 0x00030000
-#define HC_HZCYNum_SHIFT 16
-#define HC_HZWCQWnum_MASK 0x00003fff
-#define HC_HZWCQWnum_SHIFT 0
-/* HC_SubA_HZWCFire 0x0019
- */
-#define HC_ZWCFire_MASK 0x00010000
-#define HC_HZWCQWnumLast_MASK 0x00003fff
-#define HC_HZWCQWnumLast_SHIFT 0
-
-/* Stencil Setting
- */
-#define HC_SubA_HSTREF 0x0023
-#define HC_SubA_HSTMD 0x0024
-/* HC_SubA_HSBFM
- */
-#define HC_HSBFM_MASK 0x00030000
-#define HC_HSBLoc_MASK 0x0000c000
-#define HC_HSBPit_MASK 0x00003fff
-/* HC_SubA_HSTREF
- */
-#define HC_HSTREF_MASK 0x00ff0000
-#define HC_HSTOPMSK_MASK 0x0000ff00
-#define HC_HSTBMSK_MASK 0x000000ff
-#define HC_HSTREF_SHIFT 16
-#define HC_HSTOPMSK_SHIFT 8
-/* HC_SubA_HSTMD
- */
-#define HC_HSTMD_MASK 0x00070000
-#define HC_HSTOPSF_MASK 0x000001c0
-#define HC_HSTOPSPZF_MASK 0x00000038
-#define HC_HSTOPSPZP_MASK 0x00000007
-#define HC_HSTMD_NeverPass 0x00000000
-#define HC_HSTMD_LT 0x00010000
-#define HC_HSTMD_EQ 0x00020000
-#define HC_HSTMD_LE 0x00030000
-#define HC_HSTMD_GT 0x00040000
-#define HC_HSTMD_NE 0x00050000
-#define HC_HSTMD_GE 0x00060000
-#define HC_HSTMD_AllPass 0x00070000
-#define HC_HSTOPSF_KEEP 0x00000000
-#define HC_HSTOPSF_ZERO 0x00000040
-#define HC_HSTOPSF_REPLACE 0x00000080
-#define HC_HSTOPSF_INCRSAT 0x000000c0
-#define HC_HSTOPSF_DECRSAT 0x00000100
-#define HC_HSTOPSF_INVERT 0x00000140
-#define HC_HSTOPSF_INCR 0x00000180
-#define HC_HSTOPSF_DECR 0x000001c0
-#define HC_HSTOPSPZF_KEEP 0x00000000
-#define HC_HSTOPSPZF_ZERO 0x00000008
-#define HC_HSTOPSPZF_REPLACE 0x00000010
-#define HC_HSTOPSPZF_INCRSAT 0x00000018
-#define HC_HSTOPSPZF_DECRSAT 0x00000020
-#define HC_HSTOPSPZF_INVERT 0x00000028
-#define HC_HSTOPSPZF_INCR 0x00000030
-#define HC_HSTOPSPZF_DECR 0x00000038
-#define HC_HSTOPSPZP_KEEP 0x00000000
-#define HC_HSTOPSPZP_ZERO 0x00000001
-#define HC_HSTOPSPZP_REPLACE 0x00000002
-#define HC_HSTOPSPZP_INCRSAT 0x00000003
-#define HC_HSTOPSPZP_DECRSAT 0x00000004
-#define HC_HSTOPSPZP_INVERT 0x00000005
-#define HC_HSTOPSPZP_INCR 0x00000006
-#define HC_HSTOPSPZP_DECR 0x00000007
-
-/* Alpha Setting
- */
-#define HC_SubA_HABBasL 0x0030
-#define HC_SubA_HABBasH 0x0031
-#define HC_SubA_HABFM 0x0032
-#define HC_SubA_HATMD 0x0033
-#define HC_SubA_HABLCsat 0x0034
-#define HC_SubA_HABLCop 0x0035
-#define HC_SubA_HABLAsat 0x0036
-#define HC_SubA_HABLAop 0x0037
-#define HC_SubA_HABLRCa 0x0038
-#define HC_SubA_HABLRFCa 0x0039
-#define HC_SubA_HABLRCbias 0x003a
-#define HC_SubA_HABLRCb 0x003b
-#define HC_SubA_HABLRFCb 0x003c
-#define HC_SubA_HABLRAa 0x003d
-#define HC_SubA_HABLRAb 0x003e
-/* HC_SubA_HABFM
- */
-#define HC_HABFM_MASK 0x00030000
-#define HC_HABLoc_MASK 0x0000c000
-#define HC_HABPit_MASK 0x000007ff
-/* HC_SubA_HATMD
- */
-#define HC_HATMD_MASK 0x00000700
-#define HC_HATREF_MASK 0x000000ff
-#define HC_HATMD_NeverPass 0x00000000
-#define HC_HATMD_LT 0x00000100
-#define HC_HATMD_EQ 0x00000200
-#define HC_HATMD_LE 0x00000300
-#define HC_HATMD_GT 0x00000400
-#define HC_HATMD_NE 0x00000500
-#define HC_HATMD_GE 0x00000600
-#define HC_HATMD_AllPass 0x00000700
-/* HC_SubA_HABLCsat
- */
-#define HC_HABLCsat_MASK 0x00010000
-#define HC_HABLCa_MASK 0x0000fc00
-#define HC_HABLCa_C_MASK 0x0000c000
-#define HC_HABLCa_OPC_MASK 0x00003c00
-#define HC_HABLFCa_MASK 0x000003f0
-#define HC_HABLFCa_C_MASK 0x00000300
-#define HC_HABLFCa_OPC_MASK 0x000000f0
-#define HC_HABLCbias_MASK 0x0000000f
-#define HC_HABLCbias_C_MASK 0x00000008
-#define HC_HABLCbias_OPC_MASK 0x00000007
-/*-- Define the input color.
- */
-#define HC_XC_Csrc 0x00000000
-#define HC_XC_Cdst 0x00000001
-#define HC_XC_Asrc 0x00000002
-#define HC_XC_Adst 0x00000003
-#define HC_XC_Fog 0x00000004
-#define HC_XC_HABLRC 0x00000005
-#define HC_XC_minSrcDst 0x00000006
-#define HC_XC_maxSrcDst 0x00000007
-#define HC_XC_mimAsrcInvAdst 0x00000008
-#define HC_XC_OPC 0x00000000
-#define HC_XC_InvOPC 0x00000010
-#define HC_XC_OPCp5 0x00000020
-/*-- Define the input Alpha
- */
-#define HC_XA_OPA 0x00000000
-#define HC_XA_InvOPA 0x00000010
-#define HC_XA_OPAp5 0x00000020
-#define HC_XA_0 0x00000000
-#define HC_XA_Asrc 0x00000001
-#define HC_XA_Adst 0x00000002
-#define HC_XA_Fog 0x00000003
-#define HC_XA_minAsrcFog 0x00000004
-#define HC_XA_minAsrcAdst 0x00000005
-#define HC_XA_maxAsrcFog 0x00000006
-#define HC_XA_maxAsrcAdst 0x00000007
-#define HC_XA_HABLRA 0x00000008
-#define HC_XA_minAsrcInvAdst 0x00000008
-#define HC_XA_HABLFRA 0x00000009
-/*--
- */
-#define HC_HABLCa_OPC (HC_XC_OPC << 10)
-#define HC_HABLCa_InvOPC (HC_XC_InvOPC << 10)
-#define HC_HABLCa_OPCp5 (HC_XC_OPCp5 << 10)
-#define HC_HABLCa_Csrc (HC_XC_Csrc << 10)
-#define HC_HABLCa_Cdst (HC_XC_Cdst << 10)
-#define HC_HABLCa_Asrc (HC_XC_Asrc << 10)
-#define HC_HABLCa_Adst (HC_XC_Adst << 10)
-#define HC_HABLCa_Fog (HC_XC_Fog << 10)
-#define HC_HABLCa_HABLRCa (HC_XC_HABLRC << 10)
-#define HC_HABLCa_minSrcDst (HC_XC_minSrcDst << 10)
-#define HC_HABLCa_maxSrcDst (HC_XC_maxSrcDst << 10)
-#define HC_HABLFCa_OPC (HC_XC_OPC << 4)
-#define HC_HABLFCa_InvOPC (HC_XC_InvOPC << 4)
-#define HC_HABLFCa_OPCp5 (HC_XC_OPCp5 << 4)
-#define HC_HABLFCa_Csrc (HC_XC_Csrc << 4)
-#define HC_HABLFCa_Cdst (HC_XC_Cdst << 4)
-#define HC_HABLFCa_Asrc (HC_XC_Asrc << 4)
-#define HC_HABLFCa_Adst (HC_XC_Adst << 4)
-#define HC_HABLFCa_Fog (HC_XC_Fog << 4)
-#define HC_HABLFCa_HABLRCa (HC_XC_HABLRC << 4)
-#define HC_HABLFCa_minSrcDst (HC_XC_minSrcDst << 4)
-#define HC_HABLFCa_maxSrcDst (HC_XC_maxSrcDst << 4)
-#define HC_HABLFCa_mimAsrcInvAdst (HC_XC_mimAsrcInvAdst << 4)
-#define HC_HABLCbias_HABLRCbias 0x00000000
-#define HC_HABLCbias_Asrc 0x00000001
-#define HC_HABLCbias_Adst 0x00000002
-#define HC_HABLCbias_Fog 0x00000003
-#define HC_HABLCbias_Cin 0x00000004
-/* HC_SubA_HABLCop 0x0035
- */
-#define HC_HABLdot_MASK 0x00010000
-#define HC_HABLCop_MASK 0x00004000
-#define HC_HABLCb_MASK 0x00003f00
-#define HC_HABLCb_C_MASK 0x00003000
-#define HC_HABLCb_OPC_MASK 0x00000f00
-#define HC_HABLFCb_MASK 0x000000fc
-#define HC_HABLFCb_C_MASK 0x000000c0
-#define HC_HABLFCb_OPC_MASK 0x0000003c
-#define HC_HABLCshift_MASK 0x00000003
-#define HC_HABLCb_OPC (HC_XC_OPC << 8)
-#define HC_HABLCb_InvOPC (HC_XC_InvOPC << 8)
-#define HC_HABLCb_OPCp5 (HC_XC_OPCp5 << 8)
-#define HC_HABLCb_Csrc (HC_XC_Csrc << 8)
-#define HC_HABLCb_Cdst (HC_XC_Cdst << 8)
-#define HC_HABLCb_Asrc (HC_XC_Asrc << 8)
-#define HC_HABLCb_Adst (HC_XC_Adst << 8)
-#define HC_HABLCb_Fog (HC_XC_Fog << 8)
-#define HC_HABLCb_HABLRCa (HC_XC_HABLRC << 8)
-#define HC_HABLCb_minSrcDst (HC_XC_minSrcDst << 8)
-#define HC_HABLCb_maxSrcDst (HC_XC_maxSrcDst << 8)
-#define HC_HABLFCb_OPC (HC_XC_OPC << 2)
-#define HC_HABLFCb_InvOPC (HC_XC_InvOPC << 2)
-#define HC_HABLFCb_OPCp5 (HC_XC_OPCp5 << 2)
-#define HC_HABLFCb_Csrc (HC_XC_Csrc << 2)
-#define HC_HABLFCb_Cdst (HC_XC_Cdst << 2)
-#define HC_HABLFCb_Asrc (HC_XC_Asrc << 2)
-#define HC_HABLFCb_Adst (HC_XC_Adst << 2)
-#define HC_HABLFCb_Fog (HC_XC_Fog << 2)
-#define HC_HABLFCb_HABLRCb (HC_XC_HABLRC << 2)
-#define HC_HABLFCb_minSrcDst (HC_XC_minSrcDst << 2)
-#define HC_HABLFCb_maxSrcDst (HC_XC_maxSrcDst << 2)
-#define HC_HABLFCb_mimAsrcInvAdst (HC_XC_mimAsrcInvAdst << 2)
-/* HC_SubA_HABLAsat 0x0036
- */
-#define HC_HABLAsat_MASK 0x00010000
-#define HC_HABLAa_MASK 0x0000fc00
-#define HC_HABLAa_A_MASK 0x0000c000
-#define HC_HABLAa_OPA_MASK 0x00003c00
-#define HC_HABLFAa_MASK 0x000003f0
-#define HC_HABLFAa_A_MASK 0x00000300
-#define HC_HABLFAa_OPA_MASK 0x000000f0
-#define HC_HABLAbias_MASK 0x0000000f
-#define HC_HABLAbias_A_MASK 0x00000008
-#define HC_HABLAbias_OPA_MASK 0x00000007
-#define HC_HABLAa_OPA (HC_XA_OPA << 10)
-#define HC_HABLAa_InvOPA (HC_XA_InvOPA << 10)
-#define HC_HABLAa_OPAp5 (HC_XA_OPAp5 << 10)
-#define HC_HABLAa_0 (HC_XA_0 << 10)
-#define HC_HABLAa_Asrc (HC_XA_Asrc << 10)
-#define HC_HABLAa_Adst (HC_XA_Adst << 10)
-#define HC_HABLAa_Fog (HC_XA_Fog << 10)
-#define HC_HABLAa_minAsrcFog (HC_XA_minAsrcFog << 10)
-#define HC_HABLAa_minAsrcAdst (HC_XA_minAsrcAdst << 10)
-#define HC_HABLAa_maxAsrcFog (HC_XA_maxAsrcFog << 10)
-#define HC_HABLAa_maxAsrcAdst (HC_XA_maxAsrcAdst << 10)
-#define HC_HABLAa_HABLRA (HC_XA_HABLRA << 10)
-#define HC_HABLFAa_OPA (HC_XA_OPA << 4)
-#define HC_HABLFAa_InvOPA (HC_XA_InvOPA << 4)
-#define HC_HABLFAa_OPAp5 (HC_XA_OPAp5 << 4)
-#define HC_HABLFAa_0 (HC_XA_0 << 4)
-#define HC_HABLFAa_Asrc (HC_XA_Asrc << 4)
-#define HC_HABLFAa_Adst (HC_XA_Adst << 4)
-#define HC_HABLFAa_Fog (HC_XA_Fog << 4)
-#define HC_HABLFAa_minAsrcFog (HC_XA_minAsrcFog << 4)
-#define HC_HABLFAa_minAsrcAdst (HC_XA_minAsrcAdst << 4)
-#define HC_HABLFAa_maxAsrcFog (HC_XA_maxAsrcFog << 4)
-#define HC_HABLFAa_maxAsrcAdst (HC_XA_maxAsrcAdst << 4)
-#define HC_HABLFAa_minAsrcInvAdst (HC_XA_minAsrcInvAdst << 4)
-#define HC_HABLFAa_HABLFRA (HC_XA_HABLFRA << 4)
-#define HC_HABLAbias_HABLRAbias 0x00000000
-#define HC_HABLAbias_Asrc 0x00000001
-#define HC_HABLAbias_Adst 0x00000002
-#define HC_HABLAbias_Fog 0x00000003
-#define HC_HABLAbias_Aaa 0x00000004
-/* HC_SubA_HABLAop 0x0037
- */
-#define HC_HABLAop_MASK 0x00004000
-#define HC_HABLAb_MASK 0x00003f00
-#define HC_HABLAb_OPA_MASK 0x00000f00
-#define HC_HABLFAb_MASK 0x000000fc
-#define HC_HABLFAb_OPA_MASK 0x0000003c
-#define HC_HABLAshift_MASK 0x00000003
-#define HC_HABLAb_OPA (HC_XA_OPA << 8)
-#define HC_HABLAb_InvOPA (HC_XA_InvOPA << 8)
-#define HC_HABLAb_OPAp5 (HC_XA_OPAp5 << 8)
-#define HC_HABLAb_0 (HC_XA_0 << 8)
-#define HC_HABLAb_Asrc (HC_XA_Asrc << 8)
-#define HC_HABLAb_Adst (HC_XA_Adst << 8)
-#define HC_HABLAb_Fog (HC_XA_Fog << 8)
-#define HC_HABLAb_minAsrcFog (HC_XA_minAsrcFog << 8)
-#define HC_HABLAb_minAsrcAdst (HC_XA_minAsrcAdst << 8)
-#define HC_HABLAb_maxAsrcFog (HC_XA_maxAsrcFog << 8)
-#define HC_HABLAb_maxAsrcAdst (HC_XA_maxAsrcAdst << 8)
-#define HC_HABLAb_HABLRA (HC_XA_HABLRA << 8)
-#define HC_HABLFAb_OPA (HC_XA_OPA << 2)
-#define HC_HABLFAb_InvOPA (HC_XA_InvOPA << 2)
-#define HC_HABLFAb_OPAp5 (HC_XA_OPAp5 << 2)
-#define HC_HABLFAb_0 (HC_XA_0 << 2)
-#define HC_HABLFAb_Asrc (HC_XA_Asrc << 2)
-#define HC_HABLFAb_Adst (HC_XA_Adst << 2)
-#define HC_HABLFAb_Fog (HC_XA_Fog << 2)
-#define HC_HABLFAb_minAsrcFog (HC_XA_minAsrcFog << 2)
-#define HC_HABLFAb_minAsrcAdst (HC_XA_minAsrcAdst << 2)
-#define HC_HABLFAb_maxAsrcFog (HC_XA_maxAsrcFog << 2)
-#define HC_HABLFAb_maxAsrcAdst (HC_XA_maxAsrcAdst << 2)
-#define HC_HABLFAb_minAsrcInvAdst (HC_XA_minAsrcInvAdst << 2)
-#define HC_HABLFAb_HABLFRA (HC_XA_HABLFRA << 2)
-/* HC_SubA_HABLRAa 0x003d
- */
-#define HC_HABLRAa_MASK 0x00ff0000
-#define HC_HABLRFAa_MASK 0x0000ff00
-#define HC_HABLRAbias_MASK 0x000000ff
-#define HC_HABLRAa_SHIFT 16
-#define HC_HABLRFAa_SHIFT 8
-/* HC_SubA_HABLRAb 0x003e
- */
-#define HC_HABLRAb_MASK 0x0000ff00
-#define HC_HABLRFAb_MASK 0x000000ff
-#define HC_HABLRAb_SHIFT 8
-
-/* Destination Setting
- */
-#define HC_SubA_HDBBasL 0x0040
-#define HC_SubA_HDBBasH 0x0041
-#define HC_SubA_HDBFM 0x0042
-#define HC_SubA_HFBBMSKL 0x0043
-#define HC_SubA_HROP 0x0044
-/* HC_SubA_HDBFM 0x0042
- */
-#define HC_HDBFM_MASK 0x001f0000
-#define HC_HDBLoc_MASK 0x0000c000
-#define HC_HDBPit_MASK 0x00003fff
-#define HC_HDBFM_RGB555 0x00000000
-#define HC_HDBFM_RGB565 0x00010000
-#define HC_HDBFM_ARGB4444 0x00020000
-#define HC_HDBFM_ARGB1555 0x00030000
-#define HC_HDBFM_BGR555 0x00040000
-#define HC_HDBFM_BGR565 0x00050000
-#define HC_HDBFM_ABGR4444 0x00060000
-#define HC_HDBFM_ABGR1555 0x00070000
-#define HC_HDBFM_ARGB0888 0x00080000
-#define HC_HDBFM_ARGB8888 0x00090000
-#define HC_HDBFM_ABGR0888 0x000a0000
-#define HC_HDBFM_ABGR8888 0x000b0000
-#define HC_HDBLoc_Local 0x00000000
-#define HC_HDBLoc_Sys 0x00004000
-/* HC_SubA_HROP 0x0044
- */
-#define HC_HROP_MASK 0x00000f00
-#define HC_HFBBMSKH_MASK 0x000000ff
-#define HC_HROP_BLACK 0x00000000
-#define HC_HROP_DPon 0x00000100
-#define HC_HROP_DPna 0x00000200
-#define HC_HROP_Pn 0x00000300
-#define HC_HROP_PDna 0x00000400
-#define HC_HROP_Dn 0x00000500
-#define HC_HROP_DPx 0x00000600
-#define HC_HROP_DPan 0x00000700
-#define HC_HROP_DPa 0x00000800
-#define HC_HROP_DPxn 0x00000900
-#define HC_HROP_D 0x00000a00
-#define HC_HROP_DPno 0x00000b00
-#define HC_HROP_P 0x00000c00
-#define HC_HROP_PDno 0x00000d00
-#define HC_HROP_DPo 0x00000e00
-#define HC_HROP_WHITE 0x00000f00
-
-/* Fog Setting
- */
-#define HC_SubA_HFogLF 0x0050
-#define HC_SubA_HFogCL 0x0051
-#define HC_SubA_HFogCH 0x0052
-#define HC_SubA_HFogStL 0x0053
-#define HC_SubA_HFogStH 0x0054
-#define HC_SubA_HFogOOdMF 0x0055
-#define HC_SubA_HFogOOdEF 0x0056
-#define HC_SubA_HFogEndL 0x0057
-#define HC_SubA_HFogDenst 0x0058
-/* HC_SubA_FogLF 0x0050
- */
-#define HC_FogLF_MASK 0x00000010
-#define HC_FogEq_MASK 0x00000008
-#define HC_FogMD_MASK 0x00000007
-#define HC_FogMD_LocalFog 0x00000000
-#define HC_FogMD_LinearFog 0x00000002
-#define HC_FogMD_ExponentialFog 0x00000004
-#define HC_FogMD_Exponential2Fog 0x00000005
-/* #define HC_FogMD_FogTable 0x00000003 */
-
-/* HC_SubA_HFogDenst 0x0058
- */
-#define HC_FogDenst_MASK 0x001fff00
-#define HC_FogEndL_MASK 0x000000ff
-
-/* Texture subtype definitions
- */
-#define HC_SubType_Tex0 0x00000000
-#define HC_SubType_Tex1 0x00000001
-#define HC_SubType_TexGeneral 0x000000fe
-
-/* Attribute of texture n
- */
-#define HC_SubA_HTXnL0BasL 0x0000
-#define HC_SubA_HTXnL1BasL 0x0001
-#define HC_SubA_HTXnL2BasL 0x0002
-#define HC_SubA_HTXnL3BasL 0x0003
-#define HC_SubA_HTXnL4BasL 0x0004
-#define HC_SubA_HTXnL5BasL 0x0005
-#define HC_SubA_HTXnL6BasL 0x0006
-#define HC_SubA_HTXnL7BasL 0x0007
-#define HC_SubA_HTXnL8BasL 0x0008
-#define HC_SubA_HTXnL9BasL 0x0009
-#define HC_SubA_HTXnLaBasL 0x000a
-#define HC_SubA_HTXnLbBasL 0x000b
-#define HC_SubA_HTXnLcBasL 0x000c
-#define HC_SubA_HTXnLdBasL 0x000d
-#define HC_SubA_HTXnLeBasL 0x000e
-#define HC_SubA_HTXnLfBasL 0x000f
-#define HC_SubA_HTXnL10BasL 0x0010
-#define HC_SubA_HTXnL11BasL 0x0011
-#define HC_SubA_HTXnL012BasH 0x0020
-#define HC_SubA_HTXnL345BasH 0x0021
-#define HC_SubA_HTXnL678BasH 0x0022
-#define HC_SubA_HTXnL9abBasH 0x0023
-#define HC_SubA_HTXnLcdeBasH 0x0024
-#define HC_SubA_HTXnLf1011BasH 0x0025
-#define HC_SubA_HTXnL0Pit 0x002b
-#define HC_SubA_HTXnL1Pit 0x002c
-#define HC_SubA_HTXnL2Pit 0x002d
-#define HC_SubA_HTXnL3Pit 0x002e
-#define HC_SubA_HTXnL4Pit 0x002f
-#define HC_SubA_HTXnL5Pit 0x0030
-#define HC_SubA_HTXnL6Pit 0x0031
-#define HC_SubA_HTXnL7Pit 0x0032
-#define HC_SubA_HTXnL8Pit 0x0033
-#define HC_SubA_HTXnL9Pit 0x0034
-#define HC_SubA_HTXnLaPit 0x0035
-#define HC_SubA_HTXnLbPit 0x0036
-#define HC_SubA_HTXnLcPit 0x0037
-#define HC_SubA_HTXnLdPit 0x0038
-#define HC_SubA_HTXnLePit 0x0039
-#define HC_SubA_HTXnLfPit 0x003a
-#define HC_SubA_HTXnL10Pit 0x003b
-#define HC_SubA_HTXnL11Pit 0x003c
-#define HC_SubA_HTXnL0_5WE 0x004b
-#define HC_SubA_HTXnL6_bWE 0x004c
-#define HC_SubA_HTXnLc_11WE 0x004d
-#define HC_SubA_HTXnL0_5HE 0x0051
-#define HC_SubA_HTXnL6_bHE 0x0052
-#define HC_SubA_HTXnLc_11HE 0x0053
-#define HC_SubA_HTXnL0OS 0x0077
-#define HC_SubA_HTXnTB 0x0078
-#define HC_SubA_HTXnMPMD 0x0079
-#define HC_SubA_HTXnCLODu 0x007a
-#define HC_SubA_HTXnFM 0x007b
-#define HC_SubA_HTXnTRCH 0x007c
-#define HC_SubA_HTXnTRCL 0x007d
-#define HC_SubA_HTXnTBC 0x007e
-#define HC_SubA_HTXnTRAH 0x007f
-#define HC_SubA_HTXnTBLCsat 0x0080
-#define HC_SubA_HTXnTBLCop 0x0081
-#define HC_SubA_HTXnTBLMPfog 0x0082
-#define HC_SubA_HTXnTBLAsat 0x0083
-#define HC_SubA_HTXnTBLRCa 0x0085
-#define HC_SubA_HTXnTBLRCb 0x0086
-#define HC_SubA_HTXnTBLRCc 0x0087
-#define HC_SubA_HTXnTBLRCbias 0x0088
-#define HC_SubA_HTXnTBLRAa 0x0089
-#define HC_SubA_HTXnTBLRFog 0x008a
-#define HC_SubA_HTXnBumpM00 0x0090
-#define HC_SubA_HTXnBumpM01 0x0091
-#define HC_SubA_HTXnBumpM10 0x0092
-#define HC_SubA_HTXnBumpM11 0x0093
-#define HC_SubA_HTXnLScale 0x0094
-#define HC_SubA_HTXSMD 0x0000
-/* HC_SubA_HTXnL012BasH 0x0020
- */
-#define HC_HTXnL0BasH_MASK 0x000000ff
-#define HC_HTXnL1BasH_MASK 0x0000ff00
-#define HC_HTXnL2BasH_MASK 0x00ff0000
-#define HC_HTXnL1BasH_SHIFT 8
-#define HC_HTXnL2BasH_SHIFT 16
-/* HC_SubA_HTXnL345BasH 0x0021
- */
-#define HC_HTXnL3BasH_MASK 0x000000ff
-#define HC_HTXnL4BasH_MASK 0x0000ff00
-#define HC_HTXnL5BasH_MASK 0x00ff0000
-#define HC_HTXnL4BasH_SHIFT 8
-#define HC_HTXnL5BasH_SHIFT 16
-/* HC_SubA_HTXnL678BasH 0x0022
- */
-#define HC_HTXnL6BasH_MASK 0x000000ff
-#define HC_HTXnL7BasH_MASK 0x0000ff00
-#define HC_HTXnL8BasH_MASK 0x00ff0000
-#define HC_HTXnL7BasH_SHIFT 8
-#define HC_HTXnL8BasH_SHIFT 16
-/* HC_SubA_HTXnL9abBasH 0x0023
- */
-#define HC_HTXnL9BasH_MASK 0x000000ff
-#define HC_HTXnLaBasH_MASK 0x0000ff00
-#define HC_HTXnLbBasH_MASK 0x00ff0000
-#define HC_HTXnLaBasH_SHIFT 8
-#define HC_HTXnLbBasH_SHIFT 16
-/* HC_SubA_HTXnLcdeBasH 0x0024
- */
-#define HC_HTXnLcBasH_MASK 0x000000ff
-#define HC_HTXnLdBasH_MASK 0x0000ff00
-#define HC_HTXnLeBasH_MASK 0x00ff0000
-#define HC_HTXnLdBasH_SHIFT 8
-#define HC_HTXnLeBasH_SHIFT 16
-/* HC_SubA_HTXnLcdeBasH 0x0025
- */
-#define HC_HTXnLfBasH_MASK 0x000000ff
-#define HC_HTXnL10BasH_MASK 0x0000ff00
-#define HC_HTXnL11BasH_MASK 0x00ff0000
-#define HC_HTXnL10BasH_SHIFT 8
-#define HC_HTXnL11BasH_SHIFT 16
-/* HC_SubA_HTXnL0Pit 0x002b
- */
-#define HC_HTXnLnPit_MASK 0x00003fff
-#define HC_HTXnEnPit_MASK 0x00080000
-#define HC_HTXnLnPitE_MASK 0x00f00000
-#define HC_HTXnLnPitE_SHIFT 20
-/* HC_SubA_HTXnL0_5WE 0x004b
- */
-#define HC_HTXnL0WE_MASK 0x0000000f
-#define HC_HTXnL1WE_MASK 0x000000f0
-#define HC_HTXnL2WE_MASK 0x00000f00
-#define HC_HTXnL3WE_MASK 0x0000f000
-#define HC_HTXnL4WE_MASK 0x000f0000
-#define HC_HTXnL5WE_MASK 0x00f00000
-#define HC_HTXnL1WE_SHIFT 4
-#define HC_HTXnL2WE_SHIFT 8
-#define HC_HTXnL3WE_SHIFT 12
-#define HC_HTXnL4WE_SHIFT 16
-#define HC_HTXnL5WE_SHIFT 20
-/* HC_SubA_HTXnL6_bWE 0x004c
- */
-#define HC_HTXnL6WE_MASK 0x0000000f
-#define HC_HTXnL7WE_MASK 0x000000f0
-#define HC_HTXnL8WE_MASK 0x00000f00
-#define HC_HTXnL9WE_MASK 0x0000f000
-#define HC_HTXnLaWE_MASK 0x000f0000
-#define HC_HTXnLbWE_MASK 0x00f00000
-#define HC_HTXnL7WE_SHIFT 4
-#define HC_HTXnL8WE_SHIFT 8
-#define HC_HTXnL9WE_SHIFT 12
-#define HC_HTXnLaWE_SHIFT 16
-#define HC_HTXnLbWE_SHIFT 20
-/* HC_SubA_HTXnLc_11WE 0x004d
- */
-#define HC_HTXnLcWE_MASK 0x0000000f
-#define HC_HTXnLdWE_MASK 0x000000f0
-#define HC_HTXnLeWE_MASK 0x00000f00
-#define HC_HTXnLfWE_MASK 0x0000f000
-#define HC_HTXnL10WE_MASK 0x000f0000
-#define HC_HTXnL11WE_MASK 0x00f00000
-#define HC_HTXnLdWE_SHIFT 4
-#define HC_HTXnLeWE_SHIFT 8
-#define HC_HTXnLfWE_SHIFT 12
-#define HC_HTXnL10WE_SHIFT 16
-#define HC_HTXnL11WE_SHIFT 20
-/* HC_SubA_HTXnL0_5HE 0x0051
- */
-#define HC_HTXnL0HE_MASK 0x0000000f
-#define HC_HTXnL1HE_MASK 0x000000f0
-#define HC_HTXnL2HE_MASK 0x00000f00
-#define HC_HTXnL3HE_MASK 0x0000f000
-#define HC_HTXnL4HE_MASK 0x000f0000
-#define HC_HTXnL5HE_MASK 0x00f00000
-#define HC_HTXnL1HE_SHIFT 4
-#define HC_HTXnL2HE_SHIFT 8
-#define HC_HTXnL3HE_SHIFT 12
-#define HC_HTXnL4HE_SHIFT 16
-#define HC_HTXnL5HE_SHIFT 20
-/* HC_SubA_HTXnL6_bHE 0x0052
- */
-#define HC_HTXnL6HE_MASK 0x0000000f
-#define HC_HTXnL7HE_MASK 0x000000f0
-#define HC_HTXnL8HE_MASK 0x00000f00
-#define HC_HTXnL9HE_MASK 0x0000f000
-#define HC_HTXnLaHE_MASK 0x000f0000
-#define HC_HTXnLbHE_MASK 0x00f00000
-#define HC_HTXnL7HE_SHIFT 4
-#define HC_HTXnL8HE_SHIFT 8
-#define HC_HTXnL9HE_SHIFT 12
-#define HC_HTXnLaHE_SHIFT 16
-#define HC_HTXnLbHE_SHIFT 20
-/* HC_SubA_HTXnLc_11HE 0x0053
- */
-#define HC_HTXnLcHE_MASK 0x0000000f
-#define HC_HTXnLdHE_MASK 0x000000f0
-#define HC_HTXnLeHE_MASK 0x00000f00
-#define HC_HTXnLfHE_MASK 0x0000f000
-#define HC_HTXnL10HE_MASK 0x000f0000
-#define HC_HTXnL11HE_MASK 0x00f00000
-#define HC_HTXnLdHE_SHIFT 4
-#define HC_HTXnLeHE_SHIFT 8
-#define HC_HTXnLfHE_SHIFT 12
-#define HC_HTXnL10HE_SHIFT 16
-#define HC_HTXnL11HE_SHIFT 20
-/* HC_SubA_HTXnL0OS 0x0077
- */
-#define HC_HTXnL0OS_MASK 0x003ff000
-#define HC_HTXnLVmax_MASK 0x00000fc0
-#define HC_HTXnLVmin_MASK 0x0000003f
-#define HC_HTXnL0OS_SHIFT 12
-#define HC_HTXnLVmax_SHIFT 6
-/* HC_SubA_HTXnTB 0x0078
- */
-#define HC_HTXnTB_MASK 0x00f00000
-#define HC_HTXnFLSe_MASK 0x0000e000
-#define HC_HTXnFLSs_MASK 0x00001c00
-#define HC_HTXnFLTe_MASK 0x00000380
-#define HC_HTXnFLTs_MASK 0x00000070
-#define HC_HTXnFLDs_MASK 0x0000000f
-#define HC_HTXnTB_NoTB 0x00000000
-#define HC_HTXnTB_TBC_S 0x00100000
-#define HC_HTXnTB_TBC_T 0x00200000
-#define HC_HTXnTB_TB_S 0x00400000
-#define HC_HTXnTB_TB_T 0x00800000
-#define HC_HTXnFLSe_Nearest 0x00000000
-#define HC_HTXnFLSe_Linear 0x00002000
-#define HC_HTXnFLSe_NonLinear 0x00004000
-#define HC_HTXnFLSe_Sharp 0x00008000
-#define HC_HTXnFLSe_Flat_Gaussian_Cubic 0x0000c000
-#define HC_HTXnFLSs_Nearest 0x00000000
-#define HC_HTXnFLSs_Linear 0x00000400
-#define HC_HTXnFLSs_NonLinear 0x00000800
-#define HC_HTXnFLSs_Flat_Gaussian_Cubic 0x00001800
-#define HC_HTXnFLTe_Nearest 0x00000000
-#define HC_HTXnFLTe_Linear 0x00000080
-#define HC_HTXnFLTe_NonLinear 0x00000100
-#define HC_HTXnFLTe_Sharp 0x00000180
-#define HC_HTXnFLTe_Flat_Gaussian_Cubic 0x00000300
-#define HC_HTXnFLTs_Nearest 0x00000000
-#define HC_HTXnFLTs_Linear 0x00000010
-#define HC_HTXnFLTs_NonLinear 0x00000020
-#define HC_HTXnFLTs_Flat_Gaussian_Cubic 0x00000060
-#define HC_HTXnFLDs_Tex0 0x00000000
-#define HC_HTXnFLDs_Nearest 0x00000001
-#define HC_HTXnFLDs_Linear 0x00000002
-#define HC_HTXnFLDs_NonLinear 0x00000003
-#define HC_HTXnFLDs_Dither 0x00000004
-#define HC_HTXnFLDs_ConstLOD 0x00000005
-#define HC_HTXnFLDs_Ani 0x00000006
-#define HC_HTXnFLDs_AniDither 0x00000007
-/* HC_SubA_HTXnMPMD 0x0079
- */
-#define HC_HTXnMPMD_SMASK 0x00070000
-#define HC_HTXnMPMD_TMASK 0x00380000
-#define HC_HTXnLODDTf_MASK 0x00000007
-#define HC_HTXnXY2ST_MASK 0x00000008
-#define HC_HTXnMPMD_Tsingle 0x00000000
-#define HC_HTXnMPMD_Tclamp 0x00080000
-#define HC_HTXnMPMD_Trepeat 0x00100000
-#define HC_HTXnMPMD_Tmirror 0x00180000
-#define HC_HTXnMPMD_Twrap 0x00200000
-#define HC_HTXnMPMD_Ssingle 0x00000000
-#define HC_HTXnMPMD_Sclamp 0x00010000
-#define HC_HTXnMPMD_Srepeat 0x00020000
-#define HC_HTXnMPMD_Smirror 0x00030000
-#define HC_HTXnMPMD_Swrap 0x00040000
-/* HC_SubA_HTXnCLODu 0x007a
- */
-#define HC_HTXnCLODu_MASK 0x000ffc00
-#define HC_HTXnCLODd_MASK 0x000003ff
-#define HC_HTXnCLODu_SHIFT 10
-/* HC_SubA_HTXnFM 0x007b
- */
-#define HC_HTXnFM_MASK 0x00ff0000
-#define HC_HTXnLoc_MASK 0x00000003
-#define HC_HTXnFM_INDEX 0x00000000
-#define HC_HTXnFM_Intensity 0x00080000
-#define HC_HTXnFM_Lum 0x00100000
-#define HC_HTXnFM_Alpha 0x00180000
-#define HC_HTXnFM_DX 0x00280000
-#define HC_HTXnFM_ARGB16 0x00880000
-#define HC_HTXnFM_ARGB32 0x00980000
-#define HC_HTXnFM_ABGR16 0x00a80000
-#define HC_HTXnFM_ABGR32 0x00b80000
-#define HC_HTXnFM_RGBA16 0x00c80000
-#define HC_HTXnFM_RGBA32 0x00d80000
-#define HC_HTXnFM_BGRA16 0x00e80000
-#define HC_HTXnFM_BGRA32 0x00f80000
-#define HC_HTXnFM_BUMPMAP 0x00380000
-#define HC_HTXnFM_Index1 (HC_HTXnFM_INDEX | 0x00000000)
-#define HC_HTXnFM_Index2 (HC_HTXnFM_INDEX | 0x00010000)
-#define HC_HTXnFM_Index4 (HC_HTXnFM_INDEX | 0x00020000)
-#define HC_HTXnFM_Index8 (HC_HTXnFM_INDEX | 0x00030000)
-#define HC_HTXnFM_T1 (HC_HTXnFM_Intensity | 0x00000000)
-#define HC_HTXnFM_T2 (HC_HTXnFM_Intensity | 0x00010000)
-#define HC_HTXnFM_T4 (HC_HTXnFM_Intensity | 0x00020000)
-#define HC_HTXnFM_T8 (HC_HTXnFM_Intensity | 0x00030000)
-#define HC_HTXnFM_L1 (HC_HTXnFM_Lum | 0x00000000)
-#define HC_HTXnFM_L2 (HC_HTXnFM_Lum | 0x00010000)
-#define HC_HTXnFM_L4 (HC_HTXnFM_Lum | 0x00020000)
-#define HC_HTXnFM_L8 (HC_HTXnFM_Lum | 0x00030000)
-#define HC_HTXnFM_AL44 (HC_HTXnFM_Lum | 0x00040000)
-#define HC_HTXnFM_AL88 (HC_HTXnFM_Lum | 0x00050000)
-#define HC_HTXnFM_A1 (HC_HTXnFM_Alpha | 0x00000000)
-#define HC_HTXnFM_A2 (HC_HTXnFM_Alpha | 0x00010000)
-#define HC_HTXnFM_A4 (HC_HTXnFM_Alpha | 0x00020000)
-#define HC_HTXnFM_A8 (HC_HTXnFM_Alpha | 0x00030000)
-#define HC_HTXnFM_DX1 (HC_HTXnFM_DX | 0x00010000)
-#define HC_HTXnFM_DX23 (HC_HTXnFM_DX | 0x00020000)
-#define HC_HTXnFM_DX45 (HC_HTXnFM_DX | 0x00030000)
-#define HC_HTXnFM_RGB555 (HC_HTXnFM_ARGB16 | 0x00000000)
-#define HC_HTXnFM_RGB565 (HC_HTXnFM_ARGB16 | 0x00010000)
-#define HC_HTXnFM_ARGB1555 (HC_HTXnFM_ARGB16 | 0x00020000)
-#define HC_HTXnFM_ARGB4444 (HC_HTXnFM_ARGB16 | 0x00030000)
-#define HC_HTXnFM_ARGB0888 (HC_HTXnFM_ARGB32 | 0x00000000)
-#define HC_HTXnFM_ARGB8888 (HC_HTXnFM_ARGB32 | 0x00010000)
-#define HC_HTXnFM_BGR555 (HC_HTXnFM_ABGR16 | 0x00000000)
-#define HC_HTXnFM_BGR565 (HC_HTXnFM_ABGR16 | 0x00010000)
-#define HC_HTXnFM_ABGR1555 (HC_HTXnFM_ABGR16 | 0x00020000)
-#define HC_HTXnFM_ABGR4444 (HC_HTXnFM_ABGR16 | 0x00030000)
-#define HC_HTXnFM_ABGR0888 (HC_HTXnFM_ABGR32 | 0x00000000)
-#define HC_HTXnFM_ABGR8888 (HC_HTXnFM_ABGR32 | 0x00010000)
-#define HC_HTXnFM_RGBA5550 (HC_HTXnFM_RGBA16 | 0x00000000)
-#define HC_HTXnFM_RGBA5551 (HC_HTXnFM_RGBA16 | 0x00020000)
-#define HC_HTXnFM_RGBA4444 (HC_HTXnFM_RGBA16 | 0x00030000)
-#define HC_HTXnFM_RGBA8880 (HC_HTXnFM_RGBA32 | 0x00000000)
-#define HC_HTXnFM_RGBA8888 (HC_HTXnFM_RGBA32 | 0x00010000)
-#define HC_HTXnFM_BGRA5550 (HC_HTXnFM_BGRA16 | 0x00000000)
-#define HC_HTXnFM_BGRA5551 (HC_HTXnFM_BGRA16 | 0x00020000)
-#define HC_HTXnFM_BGRA4444 (HC_HTXnFM_BGRA16 | 0x00030000)
-#define HC_HTXnFM_BGRA8880 (HC_HTXnFM_BGRA32 | 0x00000000)
-#define HC_HTXnFM_BGRA8888 (HC_HTXnFM_BGRA32 | 0x00010000)
-#define HC_HTXnFM_VU88 (HC_HTXnFM_BUMPMAP | 0x00000000)
-#define HC_HTXnFM_LVU655 (HC_HTXnFM_BUMPMAP | 0x00010000)
-#define HC_HTXnFM_LVU888 (HC_HTXnFM_BUMPMAP | 0x00020000)
-#define HC_HTXnLoc_Local 0x00000000
-#define HC_HTXnLoc_Sys 0x00000002
-#define HC_HTXnLoc_AGP 0x00000003
-/* HC_SubA_HTXnTRAH 0x007f
- */
-#define HC_HTXnTRAH_MASK 0x00ff0000
-#define HC_HTXnTRAL_MASK 0x0000ff00
-#define HC_HTXnTBA_MASK 0x000000ff
-#define HC_HTXnTRAH_SHIFT 16
-#define HC_HTXnTRAL_SHIFT 8
-/* HC_SubA_HTXnTBLCsat 0x0080
- *-- Define the input texture.
- */
-#define HC_XTC_TOPC 0x00000000
-#define HC_XTC_InvTOPC 0x00000010
-#define HC_XTC_TOPCp5 0x00000020
-#define HC_XTC_Cbias 0x00000000
-#define HC_XTC_InvCbias 0x00000010
-#define HC_XTC_0 0x00000000
-#define HC_XTC_Dif 0x00000001
-#define HC_XTC_Spec 0x00000002
-#define HC_XTC_Tex 0x00000003
-#define HC_XTC_Cur 0x00000004
-#define HC_XTC_Adif 0x00000005
-#define HC_XTC_Fog 0x00000006
-#define HC_XTC_Atex 0x00000007
-#define HC_XTC_Acur 0x00000008
-#define HC_XTC_HTXnTBLRC 0x00000009
-#define HC_XTC_Ctexnext 0x0000000a
-/*--
- */
-#define HC_HTXnTBLCsat_MASK 0x00800000
-#define HC_HTXnTBLCa_MASK 0x000fc000
-#define HC_HTXnTBLCb_MASK 0x00001f80
-#define HC_HTXnTBLCc_MASK 0x0000003f
-#define HC_HTXnTBLCa_TOPC (HC_XTC_TOPC << 14)
-#define HC_HTXnTBLCa_InvTOPC (HC_XTC_InvTOPC << 14)
-#define HC_HTXnTBLCa_TOPCp5 (HC_XTC_TOPCp5 << 14)
-#define HC_HTXnTBLCa_0 (HC_XTC_0 << 14)
-#define HC_HTXnTBLCa_Dif (HC_XTC_Dif << 14)
-#define HC_HTXnTBLCa_Spec (HC_XTC_Spec << 14)
-#define HC_HTXnTBLCa_Tex (HC_XTC_Tex << 14)
-#define HC_HTXnTBLCa_Cur (HC_XTC_Cur << 14)
-#define HC_HTXnTBLCa_Adif (HC_XTC_Adif << 14)
-#define HC_HTXnTBLCa_Fog (HC_XTC_Fog << 14)
-#define HC_HTXnTBLCa_Atex (HC_XTC_Atex << 14)
-#define HC_HTXnTBLCa_Acur (HC_XTC_Acur << 14)
-#define HC_HTXnTBLCa_HTXnTBLRC (HC_XTC_HTXnTBLRC << 14)
-#define HC_HTXnTBLCa_Ctexnext (HC_XTC_Ctexnext << 14)
-#define HC_HTXnTBLCb_TOPC (HC_XTC_TOPC << 7)
-#define HC_HTXnTBLCb_InvTOPC (HC_XTC_InvTOPC << 7)
-#define HC_HTXnTBLCb_TOPCp5 (HC_XTC_TOPCp5 << 7)
-#define HC_HTXnTBLCb_0 (HC_XTC_0 << 7)
-#define HC_HTXnTBLCb_Dif (HC_XTC_Dif << 7)
-#define HC_HTXnTBLCb_Spec (HC_XTC_Spec << 7)
-#define HC_HTXnTBLCb_Tex (HC_XTC_Tex << 7)
-#define HC_HTXnTBLCb_Cur (HC_XTC_Cur << 7)
-#define HC_HTXnTBLCb_Adif (HC_XTC_Adif << 7)
-#define HC_HTXnTBLCb_Fog (HC_XTC_Fog << 7)
-#define HC_HTXnTBLCb_Atex (HC_XTC_Atex << 7)
-#define HC_HTXnTBLCb_Acur (HC_XTC_Acur << 7)
-#define HC_HTXnTBLCb_HTXnTBLRC (HC_XTC_HTXnTBLRC << 7)
-#define HC_HTXnTBLCb_Ctexnext (HC_XTC_Ctexnext << 7)
-#define HC_HTXnTBLCc_TOPC (HC_XTC_TOPC << 0)
-#define HC_HTXnTBLCc_InvTOPC (HC_XTC_InvTOPC << 0)
-#define HC_HTXnTBLCc_TOPCp5 (HC_XTC_TOPCp5 << 0)
-#define HC_HTXnTBLCc_0 (HC_XTC_0 << 0)
-#define HC_HTXnTBLCc_Dif (HC_XTC_Dif << 0)
-#define HC_HTXnTBLCc_Spec (HC_XTC_Spec << 0)
-#define HC_HTXnTBLCc_Tex (HC_XTC_Tex << 0)
-#define HC_HTXnTBLCc_Cur (HC_XTC_Cur << 0)
-#define HC_HTXnTBLCc_Adif (HC_XTC_Adif << 0)
-#define HC_HTXnTBLCc_Fog (HC_XTC_Fog << 0)
-#define HC_HTXnTBLCc_Atex (HC_XTC_Atex << 0)
-#define HC_HTXnTBLCc_Acur (HC_XTC_Acur << 0)
-#define HC_HTXnTBLCc_HTXnTBLRC (HC_XTC_HTXnTBLRC << 0)
-#define HC_HTXnTBLCc_Ctexnext (HC_XTC_Ctexnext << 0)
-/* HC_SubA_HTXnTBLCop 0x0081
- */
-#define HC_HTXnTBLdot_MASK 0x00c00000
-#define HC_HTXnTBLCop_MASK 0x00380000
-#define HC_HTXnTBLCbias_MASK 0x0007c000
-#define HC_HTXnTBLCshift_MASK 0x00001800
-#define HC_HTXnTBLAop_MASK 0x00000380
-#define HC_HTXnTBLAbias_MASK 0x00000078
-#define HC_HTXnTBLAshift_MASK 0x00000003
-#define HC_HTXnTBLCop_Add 0x00000000
-#define HC_HTXnTBLCop_Sub 0x00080000
-#define HC_HTXnTBLCop_Min 0x00100000
-#define HC_HTXnTBLCop_Max 0x00180000
-#define HC_HTXnTBLCop_Mask 0x00200000
-#define HC_HTXnTBLCbias_Cbias (HC_XTC_Cbias << 14)
-#define HC_HTXnTBLCbias_InvCbias (HC_XTC_InvCbias << 14)
-#define HC_HTXnTBLCbias_0 (HC_XTC_0 << 14)
-#define HC_HTXnTBLCbias_Dif (HC_XTC_Dif << 14)
-#define HC_HTXnTBLCbias_Spec (HC_XTC_Spec << 14)
-#define HC_HTXnTBLCbias_Tex (HC_XTC_Tex << 14)
-#define HC_HTXnTBLCbias_Cur (HC_XTC_Cur << 14)
-#define HC_HTXnTBLCbias_Adif (HC_XTC_Adif << 14)
-#define HC_HTXnTBLCbias_Fog (HC_XTC_Fog << 14)
-#define HC_HTXnTBLCbias_Atex (HC_XTC_Atex << 14)
-#define HC_HTXnTBLCbias_Acur (HC_XTC_Acur << 14)
-#define HC_HTXnTBLCbias_HTXnTBLRC (HC_XTC_HTXnTBLRC << 14)
-#define HC_HTXnTBLCshift_1 0x00000000
-#define HC_HTXnTBLCshift_2 0x00000800
-#define HC_HTXnTBLCshift_No 0x00001000
-#define HC_HTXnTBLCshift_DotP 0x00001800
-/*=* John Sheng [2003.7.18] texture combine *=*/
-#define HC_HTXnTBLDOT3 0x00080000
-#define HC_HTXnTBLDOT4 0x000C0000
-
-#define HC_HTXnTBLAop_Add 0x00000000
-#define HC_HTXnTBLAop_Sub 0x00000080
-#define HC_HTXnTBLAop_Min 0x00000100
-#define HC_HTXnTBLAop_Max 0x00000180
-#define HC_HTXnTBLAop_Mask 0x00000200
-#define HC_HTXnTBLAbias_Inv 0x00000040
-#define HC_HTXnTBLAbias_Adif 0x00000000
-#define HC_HTXnTBLAbias_Fog 0x00000008
-#define HC_HTXnTBLAbias_Acur 0x00000010
-#define HC_HTXnTBLAbias_HTXnTBLRAbias 0x00000018
-#define HC_HTXnTBLAbias_Atex 0x00000020
-#define HC_HTXnTBLAshift_1 0x00000000
-#define HC_HTXnTBLAshift_2 0x00000001
-#define HC_HTXnTBLAshift_No 0x00000002
-/* #define HC_HTXnTBLAshift_DotP 0x00000003 */
-/* HC_SubA_HTXnTBLMPFog 0x0082
- */
-#define HC_HTXnTBLMPfog_MASK 0x00e00000
-#define HC_HTXnTBLMPfog_0 0x00000000
-#define HC_HTXnTBLMPfog_Adif 0x00200000
-#define HC_HTXnTBLMPfog_Fog 0x00400000
-#define HC_HTXnTBLMPfog_Atex 0x00600000
-#define HC_HTXnTBLMPfog_Acur 0x00800000
-#define HC_HTXnTBLMPfog_GHTXnTBLRFog 0x00a00000
-/* HC_SubA_HTXnTBLAsat 0x0083
- *-- Define the texture alpha input.
- */
-#define HC_XTA_TOPA 0x00000000
-#define HC_XTA_InvTOPA 0x00000008
-#define HC_XTA_TOPAp5 0x00000010
-#define HC_XTA_Adif 0x00000000
-#define HC_XTA_Fog 0x00000001
-#define HC_XTA_Acur 0x00000002
-#define HC_XTA_HTXnTBLRA 0x00000003
-#define HC_XTA_Atex 0x00000004
-#define HC_XTA_Atexnext 0x00000005
-/*--
- */
-#define HC_HTXnTBLAsat_MASK 0x00800000
-#define HC_HTXnTBLAMB_MASK 0x00700000
-#define HC_HTXnTBLAa_MASK 0x0007c000
-#define HC_HTXnTBLAb_MASK 0x00000f80
-#define HC_HTXnTBLAc_MASK 0x0000001f
-#define HC_HTXnTBLAMB_SHIFT 20
-#define HC_HTXnTBLAa_TOPA (HC_XTA_TOPA << 14)
-#define HC_HTXnTBLAa_InvTOPA (HC_XTA_InvTOPA << 14)
-#define HC_HTXnTBLAa_TOPAp5 (HC_XTA_TOPAp5 << 14)
-#define HC_HTXnTBLAa_Adif (HC_XTA_Adif << 14)
-#define HC_HTXnTBLAa_Fog (HC_XTA_Fog << 14)
-#define HC_HTXnTBLAa_Acur (HC_XTA_Acur << 14)
-#define HC_HTXnTBLAa_HTXnTBLRA (HC_XTA_HTXnTBLRA << 14)
-#define HC_HTXnTBLAa_Atex (HC_XTA_Atex << 14)
-#define HC_HTXnTBLAa_Atexnext (HC_XTA_Atexnext << 14)
-#define HC_HTXnTBLAb_TOPA (HC_XTA_TOPA << 7)
-#define HC_HTXnTBLAb_InvTOPA (HC_XTA_InvTOPA << 7)
-#define HC_HTXnTBLAb_TOPAp5 (HC_XTA_TOPAp5 << 7)
-#define HC_HTXnTBLAb_Adif (HC_XTA_Adif << 7)
-#define HC_HTXnTBLAb_Fog (HC_XTA_Fog << 7)
-#define HC_HTXnTBLAb_Acur (HC_XTA_Acur << 7)
-#define HC_HTXnTBLAb_HTXnTBLRA (HC_XTA_HTXnTBLRA << 7)
-#define HC_HTXnTBLAb_Atex (HC_XTA_Atex << 7)
-#define HC_HTXnTBLAb_Atexnext (HC_XTA_Atexnext << 7)
-#define HC_HTXnTBLAc_TOPA (HC_XTA_TOPA << 0)
-#define HC_HTXnTBLAc_InvTOPA (HC_XTA_InvTOPA << 0)
-#define HC_HTXnTBLAc_TOPAp5 (HC_XTA_TOPAp5 << 0)
-#define HC_HTXnTBLAc_Adif (HC_XTA_Adif << 0)
-#define HC_HTXnTBLAc_Fog (HC_XTA_Fog << 0)
-#define HC_HTXnTBLAc_Acur (HC_XTA_Acur << 0)
-#define HC_HTXnTBLAc_HTXnTBLRA (HC_XTA_HTXnTBLRA << 0)
-#define HC_HTXnTBLAc_Atex (HC_XTA_Atex << 0)
-#define HC_HTXnTBLAc_Atexnext (HC_XTA_Atexnext << 0)
-/* HC_SubA_HTXnTBLRAa 0x0089
- */
-#define HC_HTXnTBLRAa_MASK 0x00ff0000
-#define HC_HTXnTBLRAb_MASK 0x0000ff00
-#define HC_HTXnTBLRAc_MASK 0x000000ff
-#define HC_HTXnTBLRAa_SHIFT 16
-#define HC_HTXnTBLRAb_SHIFT 8
-#define HC_HTXnTBLRAc_SHIFT 0
-/* HC_SubA_HTXnTBLRFog 0x008a
- */
-#define HC_HTXnTBLRFog_MASK 0x0000ff00
-#define HC_HTXnTBLRAbias_MASK 0x000000ff
-#define HC_HTXnTBLRFog_SHIFT 8
-#define HC_HTXnTBLRAbias_SHIFT 0
-/* HC_SubA_HTXnLScale 0x0094
- */
-#define HC_HTXnLScale_MASK 0x0007fc00
-#define HC_HTXnLOff_MASK 0x000001ff
-#define HC_HTXnLScale_SHIFT 10
-/* HC_SubA_HTXSMD 0x0000
- */
-#define HC_HTXSMD_MASK 0x00000080
-#define HC_HTXTMD_MASK 0x00000040
-#define HC_HTXNum_MASK 0x00000038
-#define HC_HTXTRMD_MASK 0x00000006
-#define HC_HTXCHCLR_MASK 0x00000001
-#define HC_HTXNum_SHIFT 3
-
-/* Texture Palette n
- */
-#define HC_SubType_TexPalette0 0x00000000
-#define HC_SubType_TexPalette1 0x00000001
-#define HC_SubType_FogTable 0x00000010
-#define HC_SubType_Stipple 0x00000014
-/* HC_SubA_TexPalette0 0x0000
- */
-#define HC_HTPnA_MASK 0xff000000
-#define HC_HTPnR_MASK 0x00ff0000
-#define HC_HTPnG_MASK 0x0000ff00
-#define HC_HTPnB_MASK 0x000000ff
-/* HC_SubA_FogTable 0x0010
- */
-#define HC_HFPn3_MASK 0xff000000
-#define HC_HFPn2_MASK 0x00ff0000
-#define HC_HFPn1_MASK 0x0000ff00
-#define HC_HFPn_MASK 0x000000ff
-#define HC_HFPn3_SHIFT 24
-#define HC_HFPn2_SHIFT 16
-#define HC_HFPn1_SHIFT 8
-
-/* Auto Testing & Security
- */
-#define HC_SubA_HenFIFOAT 0x0000
-#define HC_SubA_HFBDrawFirst 0x0004
-#define HC_SubA_HFBBasL 0x0005
-#define HC_SubA_HFBDst 0x0006
-/* HC_SubA_HenFIFOAT 0x0000
- */
-#define HC_HenFIFOAT_MASK 0x00000020
-#define HC_HenGEMILock_MASK 0x00000010
-#define HC_HenFBASwap_MASK 0x00000008
-#define HC_HenOT_MASK 0x00000004
-#define HC_HenCMDQ_MASK 0x00000002
-#define HC_HenTXCTSU_MASK 0x00000001
-/* HC_SubA_HFBDrawFirst 0x0004
- */
-#define HC_HFBDrawFirst_MASK 0x00000800
-#define HC_HFBQueue_MASK 0x00000400
-#define HC_HFBLock_MASK 0x00000200
-#define HC_HEOF_MASK 0x00000100
-#define HC_HFBBasH_MASK 0x000000ff
-
-/* GEMI Setting
- */
-#define HC_SubA_HTArbRCM 0x0008
-#define HC_SubA_HTArbRZ 0x000a
-#define HC_SubA_HTArbWZ 0x000b
-#define HC_SubA_HTArbRTX 0x000c
-#define HC_SubA_HTArbRCW 0x000d
-#define HC_SubA_HTArbE2 0x000e
-#define HC_SubA_HArbRQCM 0x0010
-#define HC_SubA_HArbWQCM 0x0011
-#define HC_SubA_HGEMITout 0x0020
-#define HC_SubA_HFthRTXD 0x0040
-#define HC_SubA_HFthRTXA 0x0044
-#define HC_SubA_HCMDQstL 0x0050
-#define HC_SubA_HCMDQendL 0x0051
-#define HC_SubA_HCMDQLen 0x0052
-/* HC_SubA_HTArbRCM 0x0008
- */
-#define HC_HTArbRCM_MASK 0x0000ffff
-/* HC_SubA_HTArbRZ 0x000a
- */
-#define HC_HTArbRZ_MASK 0x0000ffff
-/* HC_SubA_HTArbWZ 0x000b
- */
-#define HC_HTArbWZ_MASK 0x0000ffff
-/* HC_SubA_HTArbRTX 0x000c
- */
-#define HC_HTArbRTX_MASK 0x0000ffff
-/* HC_SubA_HTArbRCW 0x000d
- */
-#define HC_HTArbRCW_MASK 0x0000ffff
-/* HC_SubA_HTArbE2 0x000e
- */
-#define HC_HTArbE2_MASK 0x0000ffff
-/* HC_SubA_HArbRQCM 0x0010
- */
-#define HC_HTArbRQCM_MASK 0x0000ffff
-/* HC_SubA_HArbWQCM 0x0011
- */
-#define HC_HArbWQCM_MASK 0x0000ffff
-/* HC_SubA_HGEMITout 0x0020
- */
-#define HC_HGEMITout_MASK 0x000f0000
-#define HC_HNPArbZC_MASK 0x0000ffff
-#define HC_HGEMITout_SHIFT 16
-/* HC_SubA_HFthRTXD 0x0040
- */
-#define HC_HFthRTXD_MASK 0x00ff0000
-#define HC_HFthRZD_MASK 0x0000ff00
-#define HC_HFthWZD_MASK 0x000000ff
-#define HC_HFthRTXD_SHIFT 16
-#define HC_HFthRZD_SHIFT 8
-/* HC_SubA_HFthRTXA 0x0044
- */
-#define HC_HFthRTXA_MASK 0x000000ff
-
-/******************************************************************************
-** Define the Halcyon Internal register access constants. For simulator only.
-******************************************************************************/
-#define HC_SIMA_HAGPBstL 0x0000
-#define HC_SIMA_HAGPBendL 0x0001
-#define HC_SIMA_HAGPCMNT 0x0002
-#define HC_SIMA_HAGPBpL 0x0003
-#define HC_SIMA_HAGPBpH 0x0004
-#define HC_SIMA_HClipTB 0x0005
-#define HC_SIMA_HClipLR 0x0006
-#define HC_SIMA_HFPClipTL 0x0007
-#define HC_SIMA_HFPClipBL 0x0008
-#define HC_SIMA_HFPClipLL 0x0009
-#define HC_SIMA_HFPClipRL 0x000a
-#define HC_SIMA_HFPClipTBH 0x000b
-#define HC_SIMA_HFPClipLRH 0x000c
-#define HC_SIMA_HLP 0x000d
-#define HC_SIMA_HLPRF 0x000e
-#define HC_SIMA_HSolidCL 0x000f
-#define HC_SIMA_HPixGC 0x0010
-#define HC_SIMA_HSPXYOS 0x0011
-#define HC_SIMA_HCmdA 0x0012
-#define HC_SIMA_HCmdB 0x0013
-#define HC_SIMA_HEnable 0x0014
-#define HC_SIMA_HZWBBasL 0x0015
-#define HC_SIMA_HZWBBasH 0x0016
-#define HC_SIMA_HZWBType 0x0017
-#define HC_SIMA_HZBiasL 0x0018
-#define HC_SIMA_HZWBend 0x0019
-#define HC_SIMA_HZWTMD 0x001a
-#define HC_SIMA_HZWCDL 0x001b
-#define HC_SIMA_HZWCTAGnum 0x001c
-#define HC_SIMA_HZCYNum 0x001d
-#define HC_SIMA_HZWCFire 0x001e
-/* #define HC_SIMA_HSBBasL 0x001d */
-/* #define HC_SIMA_HSBBasH 0x001e */
-/* #define HC_SIMA_HSBFM 0x001f */
-#define HC_SIMA_HSTREF 0x0020
-#define HC_SIMA_HSTMD 0x0021
-#define HC_SIMA_HABBasL 0x0022
-#define HC_SIMA_HABBasH 0x0023
-#define HC_SIMA_HABFM 0x0024
-#define HC_SIMA_HATMD 0x0025
-#define HC_SIMA_HABLCsat 0x0026
-#define HC_SIMA_HABLCop 0x0027
-#define HC_SIMA_HABLAsat 0x0028
-#define HC_SIMA_HABLAop 0x0029
-#define HC_SIMA_HABLRCa 0x002a
-#define HC_SIMA_HABLRFCa 0x002b
-#define HC_SIMA_HABLRCbias 0x002c
-#define HC_SIMA_HABLRCb 0x002d
-#define HC_SIMA_HABLRFCb 0x002e
-#define HC_SIMA_HABLRAa 0x002f
-#define HC_SIMA_HABLRAb 0x0030
-#define HC_SIMA_HDBBasL 0x0031
-#define HC_SIMA_HDBBasH 0x0032
-#define HC_SIMA_HDBFM 0x0033
-#define HC_SIMA_HFBBMSKL 0x0034
-#define HC_SIMA_HROP 0x0035
-#define HC_SIMA_HFogLF 0x0036
-#define HC_SIMA_HFogCL 0x0037
-#define HC_SIMA_HFogCH 0x0038
-#define HC_SIMA_HFogStL 0x0039
-#define HC_SIMA_HFogStH 0x003a
-#define HC_SIMA_HFogOOdMF 0x003b
-#define HC_SIMA_HFogOOdEF 0x003c
-#define HC_SIMA_HFogEndL 0x003d
-#define HC_SIMA_HFogDenst 0x003e
-/*---- start of texture 0 setting ----
- */
-#define HC_SIMA_HTX0L0BasL 0x0040
-#define HC_SIMA_HTX0L1BasL 0x0041
-#define HC_SIMA_HTX0L2BasL 0x0042
-#define HC_SIMA_HTX0L3BasL 0x0043
-#define HC_SIMA_HTX0L4BasL 0x0044
-#define HC_SIMA_HTX0L5BasL 0x0045
-#define HC_SIMA_HTX0L6BasL 0x0046
-#define HC_SIMA_HTX0L7BasL 0x0047
-#define HC_SIMA_HTX0L8BasL 0x0048
-#define HC_SIMA_HTX0L9BasL 0x0049
-#define HC_SIMA_HTX0LaBasL 0x004a
-#define HC_SIMA_HTX0LbBasL 0x004b
-#define HC_SIMA_HTX0LcBasL 0x004c
-#define HC_SIMA_HTX0LdBasL 0x004d
-#define HC_SIMA_HTX0LeBasL 0x004e
-#define HC_SIMA_HTX0LfBasL 0x004f
-#define HC_SIMA_HTX0L10BasL 0x0050
-#define HC_SIMA_HTX0L11BasL 0x0051
-#define HC_SIMA_HTX0L012BasH 0x0052
-#define HC_SIMA_HTX0L345BasH 0x0053
-#define HC_SIMA_HTX0L678BasH 0x0054
-#define HC_SIMA_HTX0L9abBasH 0x0055
-#define HC_SIMA_HTX0LcdeBasH 0x0056
-#define HC_SIMA_HTX0Lf1011BasH 0x0057
-#define HC_SIMA_HTX0L0Pit 0x0058
-#define HC_SIMA_HTX0L1Pit 0x0059
-#define HC_SIMA_HTX0L2Pit 0x005a
-#define HC_SIMA_HTX0L3Pit 0x005b
-#define HC_SIMA_HTX0L4Pit 0x005c
-#define HC_SIMA_HTX0L5Pit 0x005d
-#define HC_SIMA_HTX0L6Pit 0x005e
-#define HC_SIMA_HTX0L7Pit 0x005f
-#define HC_SIMA_HTX0L8Pit 0x0060
-#define HC_SIMA_HTX0L9Pit 0x0061
-#define HC_SIMA_HTX0LaPit 0x0062
-#define HC_SIMA_HTX0LbPit 0x0063
-#define HC_SIMA_HTX0LcPit 0x0064
-#define HC_SIMA_HTX0LdPit 0x0065
-#define HC_SIMA_HTX0LePit 0x0066
-#define HC_SIMA_HTX0LfPit 0x0067
-#define HC_SIMA_HTX0L10Pit 0x0068
-#define HC_SIMA_HTX0L11Pit 0x0069
-#define HC_SIMA_HTX0L0_5WE 0x006a
-#define HC_SIMA_HTX0L6_bWE 0x006b
-#define HC_SIMA_HTX0Lc_11WE 0x006c
-#define HC_SIMA_HTX0L0_5HE 0x006d
-#define HC_SIMA_HTX0L6_bHE 0x006e
-#define HC_SIMA_HTX0Lc_11HE 0x006f
-#define HC_SIMA_HTX0L0OS 0x0070
-#define HC_SIMA_HTX0TB 0x0071
-#define HC_SIMA_HTX0MPMD 0x0072
-#define HC_SIMA_HTX0CLODu 0x0073
-#define HC_SIMA_HTX0FM 0x0074
-#define HC_SIMA_HTX0TRCH 0x0075
-#define HC_SIMA_HTX0TRCL 0x0076
-#define HC_SIMA_HTX0TBC 0x0077
-#define HC_SIMA_HTX0TRAH 0x0078
-#define HC_SIMA_HTX0TBLCsat 0x0079
-#define HC_SIMA_HTX0TBLCop 0x007a
-#define HC_SIMA_HTX0TBLMPfog 0x007b
-#define HC_SIMA_HTX0TBLAsat 0x007c
-#define HC_SIMA_HTX0TBLRCa 0x007d
-#define HC_SIMA_HTX0TBLRCb 0x007e
-#define HC_SIMA_HTX0TBLRCc 0x007f
-#define HC_SIMA_HTX0TBLRCbias 0x0080
-#define HC_SIMA_HTX0TBLRAa 0x0081
-#define HC_SIMA_HTX0TBLRFog 0x0082
-#define HC_SIMA_HTX0BumpM00 0x0083
-#define HC_SIMA_HTX0BumpM01 0x0084
-#define HC_SIMA_HTX0BumpM10 0x0085
-#define HC_SIMA_HTX0BumpM11 0x0086
-#define HC_SIMA_HTX0LScale 0x0087
-/*---- end of texture 0 setting ---- 0x008f
- */
-#define HC_SIMA_TX0TX1_OFF 0x0050
-/*---- start of texture 1 setting ----
- */
-#define HC_SIMA_HTX1L0BasL (HC_SIMA_HTX0L0BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L1BasL (HC_SIMA_HTX0L1BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L2BasL (HC_SIMA_HTX0L2BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L3BasL (HC_SIMA_HTX0L3BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L4BasL (HC_SIMA_HTX0L4BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L5BasL (HC_SIMA_HTX0L5BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L6BasL (HC_SIMA_HTX0L6BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L7BasL (HC_SIMA_HTX0L7BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L8BasL (HC_SIMA_HTX0L8BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L9BasL (HC_SIMA_HTX0L9BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LaBasL (HC_SIMA_HTX0LaBasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LbBasL (HC_SIMA_HTX0LbBasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LcBasL (HC_SIMA_HTX0LcBasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LdBasL (HC_SIMA_HTX0LdBasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LeBasL (HC_SIMA_HTX0LeBasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LfBasL (HC_SIMA_HTX0LfBasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L10BasL (HC_SIMA_HTX0L10BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L11BasL (HC_SIMA_HTX0L11BasL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L012BasH (HC_SIMA_HTX0L012BasH + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L345BasH (HC_SIMA_HTX0L345BasH + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L678BasH (HC_SIMA_HTX0L678BasH + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L9abBasH (HC_SIMA_HTX0L9abBasH + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LcdeBasH (HC_SIMA_HTX0LcdeBasH + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1Lf1011BasH (HC_SIMA_HTX0Lf1011BasH + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L0Pit (HC_SIMA_HTX0L0Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L1Pit (HC_SIMA_HTX0L1Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L2Pit (HC_SIMA_HTX0L2Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L3Pit (HC_SIMA_HTX0L3Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L4Pit (HC_SIMA_HTX0L4Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L5Pit (HC_SIMA_HTX0L5Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L6Pit (HC_SIMA_HTX0L6Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L7Pit (HC_SIMA_HTX0L7Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L8Pit (HC_SIMA_HTX0L8Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L9Pit (HC_SIMA_HTX0L9Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LaPit (HC_SIMA_HTX0LaPit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LbPit (HC_SIMA_HTX0LbPit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LcPit (HC_SIMA_HTX0LcPit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LdPit (HC_SIMA_HTX0LdPit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LePit (HC_SIMA_HTX0LePit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LfPit (HC_SIMA_HTX0LfPit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L10Pit (HC_SIMA_HTX0L10Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L11Pit (HC_SIMA_HTX0L11Pit + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L0_5WE (HC_SIMA_HTX0L0_5WE + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L6_bWE (HC_SIMA_HTX0L6_bWE + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1Lc_11WE (HC_SIMA_HTX0Lc_11WE + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L0_5HE (HC_SIMA_HTX0L0_5HE + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L6_bHE (HC_SIMA_HTX0L6_bHE + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1Lc_11HE (HC_SIMA_HTX0Lc_11HE + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1L0OS (HC_SIMA_HTX0L0OS + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TB (HC_SIMA_HTX0TB + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1MPMD (HC_SIMA_HTX0MPMD + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1CLODu (HC_SIMA_HTX0CLODu + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1FM (HC_SIMA_HTX0FM + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TRCH (HC_SIMA_HTX0TRCH + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TRCL (HC_SIMA_HTX0TRCL + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBC (HC_SIMA_HTX0TBC + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TRAH (HC_SIMA_HTX0TRAH + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LTC (HC_SIMA_HTX0LTC + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LTA (HC_SIMA_HTX0LTA + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLCsat (HC_SIMA_HTX0TBLCsat + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLCop (HC_SIMA_HTX0TBLCop + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLMPfog (HC_SIMA_HTX0TBLMPfog + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLAsat (HC_SIMA_HTX0TBLAsat + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLRCa (HC_SIMA_HTX0TBLRCa + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLRCb (HC_SIMA_HTX0TBLRCb + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLRCc (HC_SIMA_HTX0TBLRCc + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLRCbias (HC_SIMA_HTX0TBLRCbias + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLRAa (HC_SIMA_HTX0TBLRAa + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1TBLRFog (HC_SIMA_HTX0TBLRFog + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1BumpM00 (HC_SIMA_HTX0BumpM00 + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1BumpM01 (HC_SIMA_HTX0BumpM01 + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1BumpM10 (HC_SIMA_HTX0BumpM10 + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1BumpM11 (HC_SIMA_HTX0BumpM11 + HC_SIMA_TX0TX1_OFF)
-#define HC_SIMA_HTX1LScale (HC_SIMA_HTX0LScale + HC_SIMA_TX0TX1_OFF)
-/*---- end of texture 1 setting ---- 0xaf
- */
-#define HC_SIMA_HTXSMD 0x00b0
-#define HC_SIMA_HenFIFOAT 0x00b1
-#define HC_SIMA_HFBDrawFirst 0x00b2
-#define HC_SIMA_HFBBasL 0x00b3
-#define HC_SIMA_HTArbRCM 0x00b4
-#define HC_SIMA_HTArbRZ 0x00b5
-#define HC_SIMA_HTArbWZ 0x00b6
-#define HC_SIMA_HTArbRTX 0x00b7
-#define HC_SIMA_HTArbRCW 0x00b8
-#define HC_SIMA_HTArbE2 0x00b9
-#define HC_SIMA_HGEMITout 0x00ba
-#define HC_SIMA_HFthRTXD 0x00bb
-#define HC_SIMA_HFthRTXA 0x00bc
-/* Define the texture palette 0
- */
-#define HC_SIMA_HTP0 0x0100
-#define HC_SIMA_HTP1 0x0200
-#define HC_SIMA_FOGTABLE 0x0300
-#define HC_SIMA_STIPPLE 0x0400
-#define HC_SIMA_HE3Fire 0x0440
-#define HC_SIMA_TRANS_SET 0x0441
-#define HC_SIMA_HREngSt 0x0442
-#define HC_SIMA_HRFIFOempty 0x0443
-#define HC_SIMA_HRFIFOfull 0x0444
-#define HC_SIMA_HRErr 0x0445
-#define HC_SIMA_FIFOstatus 0x0446
-
-/******************************************************************************
-** Define the AGP command header.
-******************************************************************************/
-#define HC_ACMD_MASK 0xfe000000
-#define HC_ACMD_SUB_MASK 0x0c000000
-#define HC_ACMD_HCmdA 0xee000000
-#define HC_ACMD_HCmdB 0xec000000
-#define HC_ACMD_HCmdC 0xea000000
-#define HC_ACMD_H1 0xf0000000
-#define HC_ACMD_H2 0xf2000000
-#define HC_ACMD_H3 0xf4000000
-#define HC_ACMD_H4 0xf6000000
-
-#define HC_ACMD_H1IO_MASK 0x000001ff
-#define HC_ACMD_H2IO1_MASK 0x001ff000
-#define HC_ACMD_H2IO2_MASK 0x000001ff
-#define HC_ACMD_H2IO1_SHIFT 12
-#define HC_ACMD_H2IO2_SHIFT 0
-#define HC_ACMD_H3IO_MASK 0x000001ff
-#define HC_ACMD_H3COUNT_MASK 0x01fff000
-#define HC_ACMD_H3COUNT_SHIFT 12
-#define HC_ACMD_H4ID_MASK 0x000001ff
-#define HC_ACMD_H4COUNT_MASK 0x01fffe00
-#define HC_ACMD_H4COUNT_SHIFT 9
-
-/********************************************************************************
-** Define Header
-********************************************************************************/
-#define HC_HEADER2 0xF210F110
-
-/********************************************************************************
-** Define Dummy Value
-********************************************************************************/
-#define HC_DUMMY 0xCCCCCCCC
-/********************************************************************************
-** Define for DMA use
-********************************************************************************/
-#define HALCYON_HEADER2 0XF210F110
-#define HALCYON_FIRECMD 0XEE100000
-#define HALCYON_FIREMASK 0XFFF00000
-#define HALCYON_CMDB 0XEC000000
-#define HALCYON_CMDBMASK 0XFFFE0000
-#define HALCYON_SUB_ADDR0 0X00000000
-#define HALCYON_HEADER1MASK 0XFFFFFC00
-#define HALCYON_HEADER1 0XF0000000
-#define HC_SubA_HAGPBstL 0x0060
-#define HC_SubA_HAGPBendL 0x0061
-#define HC_SubA_HAGPCMNT 0x0062
-#define HC_SubA_HAGPBpL 0x0063
-#define HC_SubA_HAGPBpH 0x0064
-#define HC_HAGPCMNT_MASK 0x00800000
-#define HC_HCmdErrClr_MASK 0x00400000
-#define HC_HAGPBendH_MASK 0x0000ff00
-#define HC_HAGPBstH_MASK 0x000000ff
-#define HC_HAGPBendH_SHIFT 8
-#define HC_HAGPBstH_SHIFT 0
-#define HC_HAGPBpL_MASK 0x00fffffc
-#define HC_HAGPBpID_MASK 0x00000003
-#define HC_HAGPBpID_PAUSE 0x00000000
-#define HC_HAGPBpID_JUMP 0x00000001
-#define HC_HAGPBpID_STOP 0x00000002
-#define HC_HAGPBpH_MASK 0x00ffffff
-
-#define VIA_VIDEO_HEADER5 0xFE040000
-#define VIA_VIDEO_HEADER6 0xFE050000
-#define VIA_VIDEO_HEADER7 0xFE060000
-#define VIA_VIDEOMASK 0xFFFF0000
-#endif
+++ /dev/null
-/* via_dma.c -- DMA support for the VIA Unichrome/Pro
- *
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A.
- * All Rights Reserved.
- *
- * Copyright 2004 The Unichrome project.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Tungsten Graphics,
- * Erdi Chen,
- * Thomas Hellstrom.
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "via_drm.h"
-#include "via_drv.h"
-#include "via_3d_reg.h"
-
-#define SetReg2DAGP(nReg, nData) { \
- *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \
- *((uint32_t *)(vb) + 1) = (nData); \
- vb = ((uint32_t *)vb) + 2; \
- dev_priv->dma_low +=8; \
-}
-
-#define via_flush_write_combine() DRM_MEMORYBARRIER()
-
-#define VIA_OUT_RING_QW(w1,w2) \
- *vb++ = (w1); \
- *vb++ = (w2); \
- dev_priv->dma_low += 8;
-
-static void via_cmdbuf_start(drm_via_private_t *dev_priv);
-static void via_cmdbuf_pause(drm_via_private_t *dev_priv);
-static void via_cmdbuf_reset(drm_via_private_t *dev_priv);
-static void via_cmdbuf_rewind(drm_via_private_t *dev_priv);
-static int via_wait_idle(drm_via_private_t *dev_priv);
-static void via_pad_cache(drm_via_private_t *dev_priv, int qwords);
-
-
-/*
- * Free space in command buffer.
- */
-
-static uint32_t via_cmdbuf_space(drm_via_private_t *dev_priv)
-{
- uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
- uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
-
- return ((hw_addr <= dev_priv->dma_low) ?
- (dev_priv->dma_high + hw_addr - dev_priv->dma_low) :
- (hw_addr - dev_priv->dma_low));
-}
-
-/*
- * How much does the command regulator lag behind?
- */
-
-static uint32_t via_cmdbuf_lag(drm_via_private_t *dev_priv)
-{
- uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
- uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
-
- return ((hw_addr <= dev_priv->dma_low) ?
- (dev_priv->dma_low - hw_addr) :
- (dev_priv->dma_wrap + dev_priv->dma_low - hw_addr));
-}
-
-/*
- * Check that the given size fits in the buffer, otherwise wait.
- */
-
-static inline int
-via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size)
-{
- uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
- uint32_t cur_addr, hw_addr, next_addr;
- volatile uint32_t *hw_addr_ptr;
- uint32_t count;
- hw_addr_ptr = dev_priv->hw_addr_ptr;
- cur_addr = dev_priv->dma_low;
- next_addr = cur_addr + size + 512 * 1024;
- count = 1000000;
- do {
- hw_addr = *hw_addr_ptr - agp_base;
- if (count-- == 0) {
- DRM_ERROR
- ("via_cmdbuf_wait timed out hw %x cur_addr %x next_addr %x\n",
- hw_addr, cur_addr, next_addr);
- return -1;
- }
- if ((cur_addr < hw_addr) && (next_addr >= hw_addr))
- msleep(1);
- } while ((cur_addr < hw_addr) && (next_addr >= hw_addr));
- return 0;
-}
-
-
-/*
- * Checks whether buffer head has reach the end. Rewind the ring buffer
- * when necessary.
- *
- * Returns virtual pointer to ring buffer.
- */
-
-static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv,
- unsigned int size)
-{
- if ((dev_priv->dma_low + size + 4 * CMDBUF_ALIGNMENT_SIZE) >
- dev_priv->dma_high) {
- via_cmdbuf_rewind(dev_priv);
- }
- if (via_cmdbuf_wait(dev_priv, size) != 0) {
- return NULL;
- }
-
- return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
-}
-
-int via_dma_cleanup(struct drm_device * dev)
-{
- if (dev->dev_private) {
- drm_via_private_t *dev_priv =
- (drm_via_private_t *) dev->dev_private;
-
- if (dev_priv->ring.virtual_start) {
- via_cmdbuf_reset(dev_priv);
-
- drm_core_ioremapfree(&dev_priv->ring.map, dev);
- dev_priv->ring.virtual_start = NULL;
- }
-
- }
-
- return 0;
-}
-
-static int via_initialize(struct drm_device * dev,
- drm_via_private_t * dev_priv,
- drm_via_dma_init_t * init)
-{
- if (!dev_priv || !dev_priv->mmio) {
- DRM_ERROR("via_dma_init called before via_map_init\n");
- return -EFAULT;
- }
-
- if (dev_priv->ring.virtual_start != NULL) {
- DRM_ERROR("called again without calling cleanup\n");
- return -EFAULT;
- }
-
- if (!dev->agp || !dev->agp->base) {
- DRM_ERROR("called with no agp memory available\n");
- return -EFAULT;
- }
-
- if (dev_priv->chipset == VIA_DX9_0) {
- DRM_ERROR("AGP DMA is not supported on this chip\n");
- return -EINVAL;
- }
-
- dev_priv->ring.map.offset = dev->agp->base + init->offset;
- dev_priv->ring.map.size = init->size;
- dev_priv->ring.map.type = 0;
- dev_priv->ring.map.flags = 0;
- dev_priv->ring.map.mtrr = 0;
-
- drm_core_ioremap(&dev_priv->ring.map, dev);
-
- if (dev_priv->ring.map.handle == NULL) {
- via_dma_cleanup(dev);
- DRM_ERROR("can not ioremap virtual address for"
- " ring buffer\n");
- return -ENOMEM;
- }
-
- dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
-
- dev_priv->dma_ptr = dev_priv->ring.virtual_start;
- dev_priv->dma_low = 0;
- dev_priv->dma_high = init->size;
- dev_priv->dma_wrap = init->size;
- dev_priv->dma_offset = init->offset;
- dev_priv->last_pause_ptr = NULL;
- dev_priv->hw_addr_ptr =
- (volatile uint32_t *)((char *)dev_priv->mmio->handle +
- init->reg_pause_addr);
-
- via_cmdbuf_start(dev_priv);
-
- return 0;
-}
-
-static int via_dma_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- drm_via_dma_init_t *init = data;
- int retcode = 0;
-
- switch (init->func) {
- case VIA_INIT_DMA:
- if (!DRM_SUSER(DRM_CURPROC))
- retcode = -EPERM;
- else
- retcode = via_initialize(dev, dev_priv, init);
- break;
- case VIA_CLEANUP_DMA:
- if (!DRM_SUSER(DRM_CURPROC))
- retcode = -EPERM;
- else
- retcode = via_dma_cleanup(dev);
- break;
- case VIA_DMA_INITIALIZED:
- retcode = (dev_priv->ring.virtual_start != NULL) ?
- 0 : -EFAULT;
- break;
- default:
- retcode = -EINVAL;
- break;
- }
-
- return retcode;
-}
-
-
-
-static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t * cmd)
-{
- drm_via_private_t *dev_priv;
- uint32_t *vb;
- int ret;
-
- dev_priv = (drm_via_private_t *) dev->dev_private;
-
- if (dev_priv->ring.virtual_start == NULL) {
- DRM_ERROR("called without initializing AGP ring buffer.\n");
- return -EFAULT;
- }
-
- if (cmd->size > VIA_PCI_BUF_SIZE) {
- return -ENOMEM;
- }
-
- if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
- return -EFAULT;
-
- /*
- * Running this function on AGP memory is dead slow. Therefore
- * we run it on a temporary cacheable system memory buffer and
- * copy it to AGP memory when ready.
- */
-
- if ((ret =
- via_verify_command_stream((uint32_t *)dev_priv->pci_buf,
- cmd->size, dev, 1))) {
- return ret;
- }
-
- vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size);
- if (vb == NULL) {
- return -EAGAIN;
- }
-
- memcpy(vb, dev_priv->pci_buf, cmd->size);
-
- dev_priv->dma_low += cmd->size;
-
- /*
- * Small submissions somehow stalls the CPU. (AGP cache effects?)
- * pad to greater size.
- */
-
- if (cmd->size < 0x100)
- via_pad_cache(dev_priv, (0x100 - cmd->size) >> 3);
- via_cmdbuf_pause(dev_priv);
-
- return 0;
-}
-
-int via_driver_dma_quiescent(struct drm_device * dev)
-{
- drm_via_private_t *dev_priv = dev->dev_private;
-
- if (!via_wait_idle(dev_priv)) {
- return -EBUSY;
- }
- return 0;
-}
-
-static int via_flush_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- return via_driver_dma_quiescent(dev);
-}
-
-static int via_cmdbuffer(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_cmdbuffer_t *cmdbuf = data;
- int ret;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size);
-
- ret = via_dispatch_cmdbuffer(dev, cmdbuf);
- if (ret) {
- return ret;
- }
-
- return 0;
-}
-
-static int via_dispatch_pci_cmdbuffer(struct drm_device * dev,
- drm_via_cmdbuffer_t * cmd)
-{
- drm_via_private_t *dev_priv = dev->dev_private;
- int ret;
-
- if (cmd->size > VIA_PCI_BUF_SIZE) {
- return -ENOMEM;
- }
- if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
- return -EFAULT;
-
- if ((ret =
- via_verify_command_stream((uint32_t *) dev_priv->pci_buf,
- cmd->size, dev, 0))) {
- return ret;
- }
-
- ret =
- via_parse_command_stream(dev, (const uint32_t *)dev_priv->pci_buf,
- cmd->size);
- return ret;
-}
-
-static int via_pci_cmdbuffer(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_cmdbuffer_t *cmdbuf = data;
- int ret;
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size);
-
- ret = via_dispatch_pci_cmdbuffer(dev, cmdbuf);
- if (ret) {
- return ret;
- }
-
- return 0;
-}
-
-static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv,
- uint32_t * vb, int qw_count)
-{
- for (; qw_count > 0; --qw_count) {
- VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY);
- }
- return vb;
-}
-
-/*
- * This function is used internally by ring buffer mangement code.
- *
- * Returns virtual pointer to ring buffer.
- */
-static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv)
-{
- return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
-}
-
-/*
- * Hooks a segment of data into the tail of the ring-buffer by
- * modifying the pause address stored in the buffer itself. If
- * the regulator has already paused, restart it.
- */
-static int via_hook_segment(drm_via_private_t * dev_priv,
- uint32_t pause_addr_hi, uint32_t pause_addr_lo,
- int no_pci_fire)
-{
- int paused, count;
- volatile uint32_t *paused_at = dev_priv->last_pause_ptr;
- uint32_t reader,ptr;
- uint32_t diff;
-
- paused = 0;
- via_flush_write_combine();
- (void) *(volatile uint32_t *)(via_get_dma(dev_priv) -1);
-
- *paused_at = pause_addr_lo;
- via_flush_write_combine();
- (void) *paused_at;
-
- reader = *(dev_priv->hw_addr_ptr);
- ptr = ((volatile char *)paused_at - dev_priv->dma_ptr) +
- dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4;
-
- dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1;
-
- /*
- * If there is a possibility that the command reader will
- * miss the new pause address and pause on the old one,
- * In that case we need to program the new start address
- * using PCI.
- */
-
- diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
- count = 10000000;
- while(diff == 0 && count--) {
- paused = (VIA_READ(0x41c) & 0x80000000);
- if (paused)
- break;
- reader = *(dev_priv->hw_addr_ptr);
- diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
- }
-
- paused = VIA_READ(0x41c) & 0x80000000;
-
- if (paused && !no_pci_fire) {
- reader = *(dev_priv->hw_addr_ptr);
- diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
- diff &= (dev_priv->dma_high - 1);
- if (diff != 0 && diff < (dev_priv->dma_high >> 1)) {
- DRM_ERROR("Paused at incorrect address. "
- "0x%08x, 0x%08x 0x%08x\n",
- ptr, reader, dev_priv->dma_diff);
- } else if (diff == 0) {
- /*
- * There is a concern that these writes may stall the PCI bus
- * if the GPU is not idle. However, idling the GPU first
- * doesn't make a difference.
- */
-
- VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
- VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
- VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
- VIA_READ(VIA_REG_TRANSPACE);
- }
- }
-
- return paused;
-}
-
-
-
-static int via_wait_idle(drm_via_private_t *dev_priv)
-{
- int count = 10000000;
-
- while (!(VIA_READ(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && count--);
-
- while (count-- && (VIA_READ(VIA_REG_STATUS) &
- (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY |
- VIA_3D_ENG_BUSY))) ;
- return count;
-}
-
-static uint32_t *via_align_cmd(drm_via_private_t *dev_priv, uint32_t cmd_type,
- uint32_t addr, uint32_t *cmd_addr_hi,
- uint32_t *cmd_addr_lo, int skip_wait)
-{
- uint32_t agp_base;
- uint32_t cmd_addr, addr_lo, addr_hi;
- uint32_t *vb;
- uint32_t qw_pad_count;
-
- if (!skip_wait)
- via_cmdbuf_wait(dev_priv, 2 * CMDBUF_ALIGNMENT_SIZE);
-
- vb = via_get_dma(dev_priv);
- VIA_OUT_RING_QW(HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) |
- (VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16);
-
- agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
- qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) -
- ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
-
- cmd_addr = (addr) ? addr :
- agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3);
- addr_lo = ((HC_SubA_HAGPBpL << 24) | (cmd_type & HC_HAGPBpID_MASK) |
- (cmd_addr & HC_HAGPBpL_MASK));
- addr_hi = ((HC_SubA_HAGPBpH << 24) | (cmd_addr >> 24));
-
- vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1);
- VIA_OUT_RING_QW(*cmd_addr_hi = addr_hi, *cmd_addr_lo = addr_lo);
- return vb;
-}
-
-static void via_cmdbuf_start(drm_via_private_t * dev_priv)
-{
- uint32_t pause_addr_lo, pause_addr_hi;
- uint32_t start_addr, start_addr_lo;
- uint32_t end_addr, end_addr_lo;
- uint32_t command;
- uint32_t agp_base;
- uint32_t ptr;
- uint32_t reader;
- int count;
-
- dev_priv->dma_low = 0;
-
- agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
- start_addr = agp_base;
- end_addr = agp_base + dev_priv->dma_high;
-
- start_addr_lo = ((HC_SubA_HAGPBstL << 24) | (start_addr & 0xFFFFFF));
- end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF));
- command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) |
- ((end_addr & 0xff000000) >> 16));
-
- dev_priv->last_pause_ptr =
- via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0,
- &pause_addr_hi, & pause_addr_lo, 1) - 1;
-
- via_flush_write_combine();
- (void) *(volatile uint32_t *)dev_priv->last_pause_ptr;
-
- VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
- VIA_WRITE(VIA_REG_TRANSPACE, command);
- VIA_WRITE(VIA_REG_TRANSPACE, start_addr_lo);
- VIA_WRITE(VIA_REG_TRANSPACE, end_addr_lo);
-
- VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
- VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
- DRM_WRITEMEMORYBARRIER();
- VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK);
- VIA_READ(VIA_REG_TRANSPACE);
-
- dev_priv->dma_diff = 0;
-
- count = 10000000;
- while (!(VIA_READ(0x41c) & 0x80000000) && count--);
-
- reader = *(dev_priv->hw_addr_ptr);
- ptr = ((volatile char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) +
- dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4;
-
- /*
- * This is the difference between where we tell the
- * command reader to pause and where it actually pauses.
- * This differs between hw implementation so we need to
- * detect it.
- */
-
- dev_priv->dma_diff = ptr - reader;
-}
-
-static void via_pad_cache(drm_via_private_t *dev_priv, int qwords)
-{
- uint32_t *vb;
-
- via_cmdbuf_wait(dev_priv, qwords + 2);
- vb = via_get_dma(dev_priv);
- VIA_OUT_RING_QW(HC_HEADER2, HC_ParaType_NotTex << 16);
- via_align_buffer(dev_priv, vb, qwords);
-}
-
-static inline void via_dummy_bitblt(drm_via_private_t * dev_priv)
-{
- uint32_t *vb = via_get_dma(dev_priv);
- SetReg2DAGP(0x0C, (0 | (0 << 16)));
- SetReg2DAGP(0x10, 0 | (0 << 16));
- SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000);
-}
-
-static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
-{
- uint32_t agp_base;
- uint32_t pause_addr_lo, pause_addr_hi;
- uint32_t jump_addr_lo, jump_addr_hi;
- volatile uint32_t *last_pause_ptr;
- uint32_t dma_low_save1, dma_low_save2;
-
- agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
- via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi,
- &jump_addr_lo, 0);
-
- dev_priv->dma_wrap = dev_priv->dma_low;
-
- /*
- * Wrap command buffer to the beginning.
- */
-
- dev_priv->dma_low = 0;
- if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0) {
- DRM_ERROR("via_cmdbuf_jump failed\n");
- }
-
- via_dummy_bitblt(dev_priv);
- via_dummy_bitblt(dev_priv);
-
- last_pause_ptr =
- via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
- &pause_addr_lo, 0) - 1;
- via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
- &pause_addr_lo, 0);
-
- *last_pause_ptr = pause_addr_lo;
- dma_low_save1 = dev_priv->dma_low;
-
- /*
- * Now, set a trap that will pause the regulator if it tries to rerun the old
- * command buffer. (Which may happen if via_hook_segment detecs a command regulator pause
- * and reissues the jump command over PCI, while the regulator has already taken the jump
- * and actually paused at the current buffer end).
- * There appears to be no other way to detect this condition, since the hw_addr_pointer
- * does not seem to get updated immediately when a jump occurs.
- */
-
- last_pause_ptr =
- via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
- &pause_addr_lo, 0) - 1;
- via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
- &pause_addr_lo, 0);
- *last_pause_ptr = pause_addr_lo;
-
- dma_low_save2 = dev_priv->dma_low;
- dev_priv->dma_low = dma_low_save1;
- via_hook_segment(dev_priv, jump_addr_hi, jump_addr_lo, 0);
- dev_priv->dma_low = dma_low_save2;
- via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0);
-}
-
-
-static void via_cmdbuf_rewind(drm_via_private_t * dev_priv)
-{
- via_cmdbuf_jump(dev_priv);
-}
-
-static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type)
-{
- uint32_t pause_addr_lo, pause_addr_hi;
-
- via_align_cmd(dev_priv, cmd_type, 0, &pause_addr_hi, &pause_addr_lo, 0);
- via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0);
-}
-
-
-static void via_cmdbuf_pause(drm_via_private_t * dev_priv)
-{
- via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE);
-}
-
-static void via_cmdbuf_reset(drm_via_private_t * dev_priv)
-{
- via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP);
- via_wait_idle(dev_priv);
-}
-
-/*
- * User interface to the space and lag functions.
- */
-
-static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_cmdbuf_size_t *d_siz = data;
- int ret = 0;
- uint32_t tmp_size, count;
- drm_via_private_t *dev_priv;
-
- DRM_DEBUG("\n");
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- dev_priv = (drm_via_private_t *) dev->dev_private;
-
- if (dev_priv->ring.virtual_start == NULL) {
- DRM_ERROR("called without initializing AGP ring buffer.\n");
- return -EFAULT;
- }
-
- count = 1000000;
- tmp_size = d_siz->size;
- switch (d_siz->func) {
- case VIA_CMDBUF_SPACE:
- while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size)
- && count--) {
- if (!d_siz->wait) {
- break;
- }
- }
- if (!count) {
- DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n");
- ret = -EAGAIN;
- }
- break;
- case VIA_CMDBUF_LAG:
- while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size)
- && count--) {
- if (!d_siz->wait) {
- break;
- }
- }
- if (!count) {
- DRM_ERROR("VIA_CMDBUF_LAG timed out.\n");
- ret = -EAGAIN;
- }
- break;
- default:
- ret = -EFAULT;
- }
- d_siz->size = tmp_size;
-
- return ret;
-}
-
-#ifndef VIA_HAVE_DMABLIT
-int
-via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv ) {
- DRM_ERROR("PCI DMA BitBlt is not implemented for this system.\n");
- return -EINVAL;
-}
-int
-via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ) {
- DRM_ERROR("PCI DMA BitBlt is not implemented for this system.\n");
- return -EINVAL;
-}
-#endif
-
-struct drm_ioctl_desc via_ioctls[] = {
- DRM_IOCTL_DEF(DRM_VIA_ALLOCMEM, via_mem_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_FREEMEM, via_mem_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_AGP_INIT, via_agp_init, DRM_AUTH|DRM_MASTER),
- DRM_IOCTL_DEF(DRM_VIA_FB_INIT, via_fb_init, DRM_AUTH|DRM_MASTER),
- DRM_IOCTL_DEF(DRM_VIA_MAP_INIT, via_map_init, DRM_AUTH|DRM_MASTER),
- DRM_IOCTL_DEF(DRM_VIA_DEC_FUTEX, via_decoder_futex, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_DMA_INIT, via_dma_init, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_CMDBUFFER, via_cmdbuffer, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_FLUSH, via_flush_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_PCICMD, via_pci_cmdbuffer, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_CMDBUF_SIZE, via_cmdbuf_size, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_WAIT_IRQ, via_wait_irq, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_DMA_BLIT, via_dma_blit, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_VIA_BLIT_SYNC, via_dma_blit_sync, DRM_AUTH)
-};
-
-int via_max_ioctl = DRM_ARRAY_SIZE(via_ioctls);
+++ /dev/null
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#ifndef _VIA_DRM_H_
-#define _VIA_DRM_H_
-
-/* WARNING: These defines must be the same as what the Xserver uses.
- * if you change them, you must change the defines in the Xserver.
- */
-
-#ifndef _VIA_DEFINES_
-#define _VIA_DEFINES_
-
-
-#if !defined(__KERNEL__) && !defined(_KERNEL)
-#include "via_drmclient.h"
-#endif
-
-/*
- * With the arrival of libdrm there is a need to version this file.
- * As usual, bump MINOR for new features, MAJOR for changes that create
- * backwards incompatibilities, (which should be avoided whenever possible).
- */
-
-#define VIA_DRM_DRIVER_DATE "20070202"
-
-#define VIA_DRM_DRIVER_MAJOR 2
-#define VIA_DRM_DRIVER_MINOR 11
-#define VIA_DRM_DRIVER_PATCHLEVEL 1
-#define VIA_DRM_DRIVER_VERSION (((VIA_DRM_DRIVER_MAJOR) << 16) | (VIA_DRM_DRIVER_MINOR))
-
-#define VIA_NR_SAREA_CLIPRECTS 8
-#define VIA_NR_XVMC_PORTS 10
-#define VIA_NR_XVMC_LOCKS 5
-#define VIA_MAX_CACHELINE_SIZE 64
-#define XVMCLOCKPTR(saPriv,lockNo) \
- ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
- (VIA_MAX_CACHELINE_SIZE - 1)) & \
- ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
- VIA_MAX_CACHELINE_SIZE*(lockNo)))
-#define VIA_NR_TEX_REGIONS 64
-
-#endif
-
-#define DRM_VIA_FENCE_TYPE_ACCEL 0x00000002
-
-/* VIA specific ioctls */
-#define DRM_VIA_ALLOCMEM 0x00
-#define DRM_VIA_FREEMEM 0x01
-#define DRM_VIA_AGP_INIT 0x02
-#define DRM_VIA_FB_INIT 0x03
-#define DRM_VIA_MAP_INIT 0x04
-#define DRM_VIA_DEC_FUTEX 0x05
-#define NOT_USED
-#define DRM_VIA_DMA_INIT 0x07
-#define DRM_VIA_CMDBUFFER 0x08
-#define DRM_VIA_FLUSH 0x09
-#define DRM_VIA_PCICMD 0x0a
-#define DRM_VIA_CMDBUF_SIZE 0x0b
-#define NOT_USED
-#define DRM_VIA_WAIT_IRQ 0x0d
-#define DRM_VIA_DMA_BLIT 0x0e
-#define DRM_VIA_BLIT_SYNC 0x0f
-
-#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
-#define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
-#define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
-#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
-#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
-#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
-#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
-#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
-#define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
-#define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
-#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
- drm_via_cmdbuf_size_t)
-#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
-#define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
-#define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
-
-/* Indices into buf.Setup where various bits of state are mirrored per
- * context and per buffer. These can be fired at the card as a unit,
- * or in a piecewise fashion as required.
- */
-
-#define VIA_TEX_SETUP_SIZE 8
-
-/* Flags for clear ioctl
- */
-#define VIA_FRONT 0x1
-#define VIA_BACK 0x2
-#define VIA_DEPTH 0x4
-#define VIA_STENCIL 0x8
-
-#define VIA_MEM_VIDEO 0 /* matches drm constant */
-#define VIA_MEM_AGP 1 /* matches drm constant */
-#define VIA_MEM_SYSTEM 2
-#define VIA_MEM_MIXED 3
-#define VIA_MEM_UNKNOWN 4
-
-typedef struct {
- uint32_t offset;
- uint32_t size;
-} drm_via_agp_t;
-
-typedef struct {
- uint32_t offset;
- uint32_t size;
-} drm_via_fb_t;
-
-typedef struct {
- uint32_t context;
- uint32_t type;
- uint32_t size;
- unsigned long index;
- unsigned long offset;
-} drm_via_mem_t;
-
-typedef struct _drm_via_init {
- enum {
- VIA_INIT_MAP = 0x01,
- VIA_CLEANUP_MAP = 0x02
- } func;
-
- unsigned long sarea_priv_offset;
- unsigned long fb_offset;
- unsigned long mmio_offset;
- unsigned long agpAddr;
-} drm_via_init_t;
-
-typedef struct _drm_via_futex {
- enum {
- VIA_FUTEX_WAIT = 0x00,
- VIA_FUTEX_WAKE = 0X01
- } func;
- uint32_t ms;
- uint32_t lock;
- uint32_t val;
-} drm_via_futex_t;
-
-typedef struct _drm_via_dma_init {
- enum {
- VIA_INIT_DMA = 0x01,
- VIA_CLEANUP_DMA = 0x02,
- VIA_DMA_INITIALIZED = 0x03
- } func;
-
- unsigned long offset;
- unsigned long size;
- unsigned long reg_pause_addr;
-} drm_via_dma_init_t;
-
-typedef struct _drm_via_cmdbuffer {
- char __user *buf;
- unsigned long size;
-} drm_via_cmdbuffer_t;
-
-/* Warning: If you change the SAREA structure you must change the Xserver
- * structure as well */
-
-typedef struct _drm_via_tex_region {
- unsigned char next, prev; /* indices to form a circular LRU */
- unsigned char inUse; /* owned by a client, or free? */
- int age; /* tracked by clients to update local LRU's */
-} drm_via_tex_region_t;
-
-typedef struct _drm_via_sarea {
- unsigned int dirty;
- unsigned int nbox;
- struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS];
- drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
- int texAge; /* last time texture was uploaded */
- int ctxOwner; /* last context to upload state */
- int vertexPrim;
-
- /*
- * Below is for XvMC.
- * We want the lock integers alone on, and aligned to, a cache line.
- * Therefore this somewhat strange construct.
- */
-
- char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
-
- unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
- unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
- unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
-
- /* Used by the 3d driver only at this point, for pageflipping:
- */
- unsigned int pfCurrentOffset;
-} drm_via_sarea_t;
-
-typedef struct _drm_via_cmdbuf_size {
- enum {
- VIA_CMDBUF_SPACE = 0x01,
- VIA_CMDBUF_LAG = 0x02
- } func;
- int wait;
- uint32_t size;
-} drm_via_cmdbuf_size_t;
-
-typedef enum {
- VIA_IRQ_ABSOLUTE = 0x0,
- VIA_IRQ_RELATIVE = 0x1,
- VIA_IRQ_SIGNAL = 0x10000000,
- VIA_IRQ_FORCE_SEQUENCE = 0x20000000
-} via_irq_seq_type_t;
-
-#define VIA_IRQ_FLAGS_MASK 0xF0000000
-
-enum drm_via_irqs {
- drm_via_irq_hqv0 = 0,
- drm_via_irq_hqv1,
- drm_via_irq_dma0_dd,
- drm_via_irq_dma0_td,
- drm_via_irq_dma1_dd,
- drm_via_irq_dma1_td,
- drm_via_irq_num
-};
-
-struct drm_via_wait_irq_request {
- unsigned irq;
- via_irq_seq_type_t type;
- uint32_t sequence;
- uint32_t signal;
-};
-
-typedef union drm_via_irqwait {
- struct drm_via_wait_irq_request request;
- struct drm_wait_vblank_reply reply;
-} drm_via_irqwait_t;
-
-typedef struct drm_via_blitsync {
- uint32_t sync_handle;
- unsigned engine;
-} drm_via_blitsync_t;
-
-/*
- * Below,"flags" is currently unused but will be used for possible future
- * extensions like kernel space bounce buffers for bad alignments and
- * blit engine busy-wait polling for better latency in the absence of
- * interrupts.
- */
-
-typedef struct drm_via_dmablit {
- uint32_t num_lines;
- uint32_t line_length;
-
- uint32_t fb_addr;
- uint32_t fb_stride;
-
- unsigned char *mem_addr;
- uint32_t mem_stride;
-
- uint32_t flags;
- int to_fb;
-
- drm_via_blitsync_t sync;
-} drm_via_dmablit_t;
-
-
-#endif /* _VIA_DRM_H_ */
+++ /dev/null
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-#include "via_drm.h"
-#include "via_drv.h"
-
-#include "drm_pciids.h"
-
-
-static int dri_library_name(struct drm_device * dev, char * buf)
-{
- return snprintf(buf, PAGE_SIZE, "unichrome\n");
-}
-
-static struct pci_device_id pciidlist[] = {
- viadrv_PCI_IDS
-};
-
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
-static struct drm_driver driver = {
- .driver_features =
- DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ |
- DRIVER_IRQ_SHARED,
- .load = via_driver_load,
- .unload = via_driver_unload,
-#ifndef VIA_HAVE_CORE_MM
- .context_ctor = via_init_context,
-#endif
- .context_dtor = via_final_context,
- .get_vblank_counter = via_get_vblank_counter,
- .enable_vblank = via_enable_vblank,
- .disable_vblank = via_disable_vblank,
- .irq_preinstall = via_driver_irq_preinstall,
- .irq_postinstall = via_driver_irq_postinstall,
- .irq_uninstall = via_driver_irq_uninstall,
- .irq_handler = via_driver_irq_handler,
- .dma_quiescent = via_driver_dma_quiescent,
- .dri_library_name = dri_library_name,
- .reclaim_buffers = drm_core_reclaim_buffers,
- .reclaim_buffers_locked = NULL,
-#ifdef VIA_HAVE_CORE_MM
- .reclaim_buffers_idlelocked = via_reclaim_buffers_locked,
- .lastclose = via_lastclose,
-#endif
- .get_map_ofs = drm_core_get_map_ofs,
- .get_reg_ofs = drm_core_get_reg_ofs,
- .ioctls = via_ioctls,
- .fops = {
- .owner = THIS_MODULE,
- .open = drm_open,
- .release = drm_release,
- .ioctl = drm_ioctl,
- .mmap = drm_mmap,
- .poll = drm_poll,
- .fasync = drm_fasync,
- },
- .pci_driver = {
- .name = DRIVER_NAME,
- .id_table = pciidlist,
- .probe = probe,
- .remove = __devexit_p(drm_cleanup_pci),
- },
- .name = DRIVER_NAME,
- .desc = DRIVER_DESC,
- .date = VIA_DRM_DRIVER_DATE,
- .major = VIA_DRM_DRIVER_MAJOR,
- .minor = VIA_DRM_DRIVER_MINOR,
- .patchlevel = VIA_DRM_DRIVER_PATCHLEVEL
-};
-
-static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
- return drm_get_dev(pdev, ent, &driver);
-}
-
-static int __init via_init(void)
-{
- driver.num_ioctls = via_max_ioctl;
-
- via_init_command_verifier();
- return drm_init(&driver, pciidlist);
-}
-
-static void __exit via_exit(void)
-{
- drm_exit(&driver);
-}
-
-module_init(via_init);
-module_exit(via_exit);
-
-MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#ifndef _VIA_DRV_H_
-#define _VIA_DRV_H_
-
-#include "drm_sman.h"
-#define DRIVER_AUTHOR "Various"
-
-#define DRIVER_NAME "via"
-#define DRIVER_DESC "VIA Unichrome / Pro"
-
-#include "via_verifier.h"
-
-/*
- * Registers go here.
- */
-
-
-#define CMDBUF_ALIGNMENT_SIZE (0x100)
-#define CMDBUF_ALIGNMENT_MASK (0x0ff)
-
-/* defines for VIA 3D registers */
-#define VIA_REG_STATUS 0x400
-#define VIA_REG_TRANSET 0x43C
-#define VIA_REG_TRANSPACE 0x440
-
-/* VIA_REG_STATUS(0x400): Engine Status */
-#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */
-#define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */
-#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */
-#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */
-
-
-
-#if defined(__linux__)
-#include "via_dmablit.h"
-
-/*
- * This define and all its references can be removed when
- * the DMA blit code has been implemented for FreeBSD.
- */
-#define VIA_HAVE_DMABLIT 1
-#define VIA_HAVE_CORE_MM 1
-#endif
-
-#define VIA_PCI_BUF_SIZE 60000
-#define VIA_FIRE_BUF_SIZE 1024
-#define VIA_NUM_IRQS 4
-
-typedef struct drm_via_ring_buffer {
- drm_local_map_t map;
- char *virtual_start;
-} drm_via_ring_buffer_t;
-
-typedef uint32_t maskarray_t[5];
-
-typedef struct drm_via_irq {
- atomic_t irq_received;
- uint32_t pending_mask;
- uint32_t enable_mask;
- wait_queue_head_t irq_queue;
-} drm_via_irq_t;
-
-typedef struct drm_via_private {
- drm_via_sarea_t *sarea_priv;
- drm_local_map_t *sarea;
- drm_local_map_t *fb;
- drm_local_map_t *mmio;
- unsigned long agpAddr;
- wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
- char *dma_ptr;
- unsigned int dma_low;
- unsigned int dma_high;
- unsigned int dma_offset;
- uint32_t dma_wrap;
- volatile uint32_t *last_pause_ptr;
- volatile uint32_t *hw_addr_ptr;
- drm_via_ring_buffer_t ring;
- struct timeval last_vblank;
- int last_vblank_valid;
- unsigned usec_per_vblank;
- atomic_t vbl_received;
- drm_via_state_t hc_state;
- char pci_buf[VIA_PCI_BUF_SIZE];
- const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];
- uint32_t num_fire_offsets;
- int chipset;
- drm_via_irq_t via_irqs[VIA_NUM_IRQS];
- unsigned num_irqs;
- maskarray_t *irq_masks;
- uint32_t irq_enable_mask;
- uint32_t irq_pending_mask;
- int *irq_map;
- /* Memory manager stuff */
-#ifdef VIA_HAVE_CORE_MM
- unsigned int idle_fault;
- struct drm_sman sman;
- int vram_initialized;
- int agp_initialized;
- unsigned long vram_offset;
- unsigned long agp_offset;
-#endif
-#ifdef VIA_HAVE_DMABLIT
- drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
-#endif
- uint32_t dma_diff;
-#ifdef VIA_HAVE_FENCE
- spinlock_t fence_lock;
- uint32_t emit_0_sequence;
- int have_idlelock;
- struct timer_list fence_timer;
-#endif
-} drm_via_private_t;
-
-enum via_family {
- VIA_OTHER = 0, /* Baseline */
- VIA_PRO_GROUP_A, /* Another video engine and DMA commands */
- VIA_DX9_0 /* Same video as pro_group_a, but 3D is unsupported */
-};
-
-/* VIA MMIO register access */
-#define VIA_BASE ((dev_priv->mmio))
-
-#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg)
-#define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val)
-#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg)
-#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val)
-
-extern struct drm_ioctl_desc via_ioctls[];
-extern int via_max_ioctl;
-
-extern int via_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int via_mem_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int via_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv );
-extern int via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv );
-
-extern int via_driver_load(struct drm_device *dev, unsigned long chipset);
-extern int via_driver_unload(struct drm_device *dev);
-extern int via_final_context(struct drm_device * dev, int context);
-
-extern int via_do_cleanup_map(struct drm_device * dev);
-extern u32 via_get_vblank_counter(struct drm_device *dev, int crtc);
-extern int via_enable_vblank(struct drm_device *dev, int crtc);
-extern void via_disable_vblank(struct drm_device *dev, int crtc);
-
-extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS);
-extern void via_driver_irq_preinstall(struct drm_device * dev);
-extern int via_driver_irq_postinstall(struct drm_device * dev);
-extern void via_driver_irq_uninstall(struct drm_device * dev);
-
-extern int via_dma_cleanup(struct drm_device * dev);
-extern void via_init_command_verifier(void);
-extern int via_driver_dma_quiescent(struct drm_device * dev);
-extern void via_init_futex(drm_via_private_t *dev_priv);
-extern void via_cleanup_futex(drm_via_private_t *dev_priv);
-extern void via_release_futex(drm_via_private_t *dev_priv, int context);
-
-#ifdef VIA_HAVE_CORE_MM
-extern void via_reclaim_buffers_locked(struct drm_device *dev,
- struct drm_file *file_priv);
-extern void via_lastclose(struct drm_device *dev);
-#else
-extern int via_init_context(struct drm_device * dev, int context);
-#endif
-
-#ifdef VIA_HAVE_DMABLIT
-extern void via_dmablit_handler(struct drm_device *dev, int engine, int from_irq);
-extern void via_init_dmablit(struct drm_device *dev);
-#endif
-
-#endif
+++ /dev/null
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "drmP.h"
-
-#include "via_ds.h"
-extern unsigned int VIA_DEBUG;
-
-set_t *via_setInit(void)
-{
- int i;
- set_t *set;
- set = (set_t *) drm_alloc(sizeof(set_t), DRM_MEM_DRIVER);
- for (i = 0; i < SET_SIZE; i++) {
- set->list[i].free_next = i + 1;
- set->list[i].alloc_next = -1;
- }
- set->list[SET_SIZE - 1].free_next = -1;
- set->free = 0;
- set->alloc = -1;
- set->trace = -1;
- return set;
-}
-
-int via_setAdd(set_t * set, ITEM_TYPE item)
-{
- int free = set->free;
- if (free != -1) {
- set->list[free].val = item;
- set->free = set->list[free].free_next;
- } else {
- return 0;
- }
- set->list[free].alloc_next = set->alloc;
- set->alloc = free;
- set->list[free].free_next = -1;
- return 1;
-}
-
-int via_setDel(set_t * set, ITEM_TYPE item)
-{
- int alloc = set->alloc;
- int prev = -1;
-
- while (alloc != -1) {
- if (set->list[alloc].val == item) {
- if (prev != -1)
- set->list[prev].alloc_next =
- set->list[alloc].alloc_next;
- else
- set->alloc = set->list[alloc].alloc_next;
- break;
- }
- prev = alloc;
- alloc = set->list[alloc].alloc_next;
- }
-
- if (alloc == -1)
- return 0;
-
- set->list[alloc].free_next = set->free;
- set->free = alloc;
- set->list[alloc].alloc_next = -1;
-
- return 1;
-}
-
-/* setFirst -> setAdd -> setNext is wrong */
-
-int via_setFirst(set_t * set, ITEM_TYPE * item)
-{
- if (set->alloc == -1)
- return 0;
-
- *item = set->list[set->alloc].val;
- set->trace = set->list[set->alloc].alloc_next;
-
- return 1;
-}
-
-int via_setNext(set_t * set, ITEM_TYPE * item)
-{
- if (set->trace == -1)
- return 0;
-
- *item = set->list[set->trace].val;
- set->trace = set->list[set->trace].alloc_next;
-
- return 1;
-}
-
-int via_setDestroy(set_t * set)
-{
- drm_free(set, sizeof(set_t), DRM_MEM_DRIVER);
-
- return 1;
-}
-
-#define ISFREE(bptr) ((bptr)->free)
-
-#define fprintf(fmt, arg...) do{}while(0)
-
-memHeap_t *via_mmInit(int ofs, int size)
-{
- PMemBlock blocks;
-
- if (size <= 0)
- return NULL;
-
- blocks = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), DRM_MEM_DRIVER);
-
- if (blocks) {
- blocks->ofs = ofs;
- blocks->size = size;
- blocks->free = 1;
- return (memHeap_t *) blocks;
- } else
- return NULL;
-}
-
-static TMemBlock *SliceBlock(TMemBlock * p,
- int startofs, int size,
- int reserved, int alignment)
-{
- TMemBlock *newblock;
-
- /* break left */
- if (startofs > p->ofs) {
- newblock =
- (TMemBlock *) drm_calloc(1, sizeof(TMemBlock),
- DRM_MEM_DRIVER);
- newblock->ofs = startofs;
- newblock->size = p->size - (startofs - p->ofs);
- newblock->free = 1;
- newblock->next = p->next;
- p->size -= newblock->size;
- p->next = newblock;
- p = newblock;
- }
-
- /* break right */
- if (size < p->size) {
- newblock =
- (TMemBlock *) drm_calloc(1, sizeof(TMemBlock),
- DRM_MEM_DRIVER);
- newblock->ofs = startofs + size;
- newblock->size = p->size - size;
- newblock->free = 1;
- newblock->next = p->next;
- p->size = size;
- p->next = newblock;
- }
-
- /* p = middle block */
- p->align = alignment;
- p->free = 0;
- p->reserved = reserved;
- return p;
-}
-
-PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2,
- int startSearch)
-{
- int mask, startofs, endofs;
- TMemBlock *p;
-
- if (!heap || align2 < 0 || size <= 0)
- return NULL;
-
- mask = (1 << align2) - 1;
- startofs = 0;
- p = (TMemBlock *) heap;
-
- while (p) {
- if (ISFREE(p)) {
- startofs = (p->ofs + mask) & ~mask;
-
- if (startofs < startSearch)
- startofs = startSearch;
-
- endofs = startofs + size;
-
- if (endofs <= (p->ofs + p->size))
- break;
- }
-
- p = p->next;
- }
-
- if (!p)
- return NULL;
-
- p = SliceBlock(p, startofs, size, 0, mask + 1);
- p->heap = heap;
-
- return p;
-}
-
-static __inline__ int Join2Blocks(TMemBlock * p)
-{
- if (p->free && p->next && p->next->free) {
- TMemBlock *q = p->next;
- p->size += q->size;
- p->next = q->next;
- drm_free(q, sizeof(TMemBlock), DRM_MEM_DRIVER);
-
- return 1;
- }
-
- return 0;
-}
-
-int via_mmFreeMem(PMemBlock b)
-{
- TMemBlock *p, *prev;
-
- if (!b)
- return 0;
-
- if (!b->heap) {
- fprintf(stderr, "no heap\n");
-
- return -1;
- }
-
- p = b->heap;
- prev = NULL;
-
- while (p && p != b) {
- prev = p;
- p = p->next;
- }
-
- if (!p || p->free || p->reserved) {
- if (!p)
- fprintf(stderr, "block not found in heap\n");
- else if (p->free)
- fprintf(stderr, "block already free\n");
- else
- fprintf(stderr, "block is reserved\n");
-
- return -1;
- }
-
- p->free = 1;
- Join2Blocks(p);
-
- if (prev)
- Join2Blocks(prev);
-
- return 0;
-}
+++ /dev/null
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#ifndef _via_ds_h_
-#define _via_ds_h_
-
-#include "drmP.h"
-
-/* Set Data Structure */
-#define SET_SIZE 5000
-typedef unsigned long ITEM_TYPE;
-
-typedef struct {
- ITEM_TYPE val;
- int alloc_next, free_next;
-} list_item_t;
-
-typedef struct {
- int alloc;
- int free;
- int trace;
- list_item_t list[SET_SIZE];
-} set_t;
-
-set_t *via_setInit(void);
-int via_setAdd(set_t * set, ITEM_TYPE item);
-int via_setDel(set_t * set, ITEM_TYPE item);
-int via_setFirst(set_t * set, ITEM_TYPE * item);
-int via_setNext(set_t * set, ITEM_TYPE * item);
-int via_setDestroy(set_t * set);
-
-#endif
-
-#ifndef MM_INC
-#define MM_INC
-
-struct mem_block_t {
- struct mem_block_t *next;
- struct mem_block_t *heap;
- int ofs, size;
- int align;
- unsigned int free:1;
- unsigned int reserved:1;
-};
-typedef struct mem_block_t TMemBlock;
-typedef struct mem_block_t *PMemBlock;
-
-/* a heap is just the first block in a chain */
-typedef struct mem_block_t memHeap_t;
-
-static __inline__ int mmBlockSize(PMemBlock b)
-{
- return b->size;
-}
-
-static __inline__ int mmOffset(PMemBlock b)
-{
- return b->ofs;
-}
-
-static __inline__ void mmMarkReserved(PMemBlock b)
-{
- b->reserved = 1;
-}
-
-/*
- * input: total size in bytes
- * return: a heap pointer if OK, NULL if error
- */
-memHeap_t *via_mmInit(int ofs, int size);
-
-PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2,
- int startSearch);
-
-/*
- * Free block starts at offset
- * input: pointer to a block
- * return: 0 if OK, -1 if error
- */
-int via_mmFreeMem(PMemBlock b);
-
-#endif
+++ /dev/null
-/* via_irq.c
- *
- * Copyright 2004 BEAM Ltd.
- * Copyright 2002 Tungsten Graphics, Inc.
- * Copyright 2005 Thomas Hellstrom.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Terry Barnaby <terry1@beam.ltd.uk>
- * Keith Whitwell <keith@tungstengraphics.com>
- * Thomas Hellstrom <unichrome@shipmail.org>
- *
- * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
- * interrupt, as well as an infrastructure to handle other interrupts of the chip.
- * The refresh rate is also calculated for video playback sync purposes.
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "via_drm.h"
-#include "via_drv.h"
-
-#define VIA_REG_INTERRUPT 0x200
-
-/* VIA_REG_INTERRUPT */
-#define VIA_IRQ_GLOBAL (1 << 31)
-#define VIA_IRQ_VBLANK_ENABLE (1 << 19)
-#define VIA_IRQ_VBLANK_PENDING (1 << 3)
-#define VIA_IRQ_HQV0_ENABLE (1 << 11)
-#define VIA_IRQ_HQV1_ENABLE (1 << 25)
-#define VIA_IRQ_HQV0_PENDING (1 << 9)
-#define VIA_IRQ_HQV1_PENDING (1 << 10)
-#define VIA_IRQ_DMA0_DD_ENABLE (1 << 20)
-#define VIA_IRQ_DMA0_TD_ENABLE (1 << 21)
-#define VIA_IRQ_DMA1_DD_ENABLE (1 << 22)
-#define VIA_IRQ_DMA1_TD_ENABLE (1 << 23)
-#define VIA_IRQ_DMA0_DD_PENDING (1 << 4)
-#define VIA_IRQ_DMA0_TD_PENDING (1 << 5)
-#define VIA_IRQ_DMA1_DD_PENDING (1 << 6)
-#define VIA_IRQ_DMA1_TD_PENDING (1 << 7)
-
-
-/*
- * Device-specific IRQs go here. This type might need to be extended with
- * the register if there are multiple IRQ control registers.
- * Currently we activate the HQV interrupts of Unichrome Pro group A.
- */
-
-static maskarray_t via_pro_group_a_irqs[] = {
- {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010,
- 0x00000000 },
- {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010,
- 0x00000000 },
- {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
- VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
- {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
- VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
-};
-static int via_num_pro_group_a = ARRAY_SIZE(via_pro_group_a_irqs);
-static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3};
-
-static maskarray_t via_unichrome_irqs[] = {
- {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
- VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
- {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
- VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}
-};
-static int via_num_unichrome = ARRAY_SIZE(via_unichrome_irqs);
-static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1};
-
-
-static unsigned time_diff(struct timeval *now,struct timeval *then)
-{
- return (now->tv_usec >= then->tv_usec) ?
- now->tv_usec - then->tv_usec :
- 1000000 - (then->tv_usec - now->tv_usec);
-}
-
-u32 via_get_vblank_counter(struct drm_device *dev, int crtc)
-{
- drm_via_private_t *dev_priv = dev->dev_private;
- if (crtc != 0)
- return 0;
-
- return atomic_read(&dev_priv->vbl_received);
-}
-
-irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
-{
- struct drm_device *dev = (struct drm_device *) arg;
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- u32 status;
- int handled = 0;
- struct timeval cur_vblank;
- drm_via_irq_t *cur_irq = dev_priv->via_irqs;
- int i;
-
- status = VIA_READ(VIA_REG_INTERRUPT);
- if (status & VIA_IRQ_VBLANK_PENDING) {
- atomic_inc(&dev_priv->vbl_received);
- if (!(atomic_read(&dev_priv->vbl_received) & 0x0F)) {
-#ifdef __linux__
- do_gettimeofday(&cur_vblank);
-#else
- microtime(&cur_vblank);
-#endif
- if (dev_priv->last_vblank_valid) {
- dev_priv->usec_per_vblank =
- time_diff(&cur_vblank,
- &dev_priv->last_vblank) >> 4;
- }
- dev_priv->last_vblank = cur_vblank;
- dev_priv->last_vblank_valid = 1;
- }
- if (!(atomic_read(&dev_priv->vbl_received) & 0xFF)) {
- DRM_DEBUG("US per vblank is: %u\n",
- dev_priv->usec_per_vblank);
- }
- drm_handle_vblank(dev, 0);
- handled = 1;
- }
-
- for (i = 0; i < dev_priv->num_irqs; ++i) {
- if (status & cur_irq->pending_mask) {
- atomic_inc(&cur_irq->irq_received);
- DRM_WAKEUP(&cur_irq->irq_queue);
- handled = 1;
-#ifdef VIA_HAVE_DMABLIT
- if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) {
- via_dmablit_handler(dev, 0, 1);
- } else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) {
- via_dmablit_handler(dev, 1, 1);
- }
-#endif
- }
- cur_irq++;
- }
-
- /* Acknowlege interrupts */
- VIA_WRITE(VIA_REG_INTERRUPT, status);
-
-
- if (handled)
- return IRQ_HANDLED;
- else
- return IRQ_NONE;
-}
-
-static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
-{
- u32 status;
-
- if (dev_priv) {
- /* Acknowlege interrupts */
- status = VIA_READ(VIA_REG_INTERRUPT);
- VIA_WRITE(VIA_REG_INTERRUPT, status |
- dev_priv->irq_pending_mask);
- }
-}
-
-int via_enable_vblank(struct drm_device *dev, int crtc)
-{
- drm_via_private_t *dev_priv = dev->dev_private;
- u32 status;
-
- if (crtc != 0) {
- DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc);
- return -EINVAL;
- }
-
- status = VIA_READ(VIA_REG_INTERRUPT);
- VIA_WRITE(VIA_REG_INTERRUPT, status & VIA_IRQ_VBLANK_ENABLE);
-
- VIA_WRITE8(0x83d4, 0x11);
- VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
-
- return 0;
-}
-
-void via_disable_vblank(struct drm_device *dev, int crtc)
-{
- drm_via_private_t *dev_priv = dev->dev_private;
-
- VIA_WRITE8(0x83d4, 0x11);
- VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
-
- if (crtc != 0)
- DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc);
-}
-
-static int
-via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequence,
- unsigned int *sequence)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- unsigned int cur_irq_sequence;
- drm_via_irq_t *cur_irq;
- int ret = 0;
- maskarray_t *masks;
- int real_irq;
-
- DRM_DEBUG("\n");
-
- if (!dev_priv) {
- DRM_ERROR("called with no initialization\n");
- return -EINVAL;
- }
-
- if (irq >= drm_via_irq_num) {
- DRM_ERROR("Trying to wait on unknown irq %d\n", irq);
- return -EINVAL;
- }
-
- real_irq = dev_priv->irq_map[irq];
-
- if (real_irq < 0) {
- DRM_ERROR("Video IRQ %d not available on this hardware.\n",
- irq);
- return -EINVAL;
- }
-
- masks = dev_priv->irq_masks;
- cur_irq = dev_priv->via_irqs + real_irq;
-
- if (masks[real_irq][2] && !force_sequence) {
- DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
- ((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
- masks[irq][4]));
- cur_irq_sequence = atomic_read(&cur_irq->irq_received);
- } else {
- DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
- (((cur_irq_sequence =
- atomic_read(&cur_irq->irq_received)) -
- *sequence) <= (1 << 23)));
- }
- *sequence = cur_irq_sequence;
- return ret;
-}
-
-
-/*
- * drm_dma.h hooks
- */
-
-void via_driver_irq_preinstall(struct drm_device * dev)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- u32 status;
- drm_via_irq_t *cur_irq;
- int i;
-
- DRM_DEBUG("dev_priv: %p\n", dev_priv);
- if (dev_priv) {
- cur_irq = dev_priv->via_irqs;
-
- dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
- dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;
-
- if (dev_priv->chipset == VIA_PRO_GROUP_A ||
- dev_priv->chipset == VIA_DX9_0) {
- dev_priv->irq_masks = via_pro_group_a_irqs;
- dev_priv->num_irqs = via_num_pro_group_a;
- dev_priv->irq_map = via_irqmap_pro_group_a;
- } else {
- dev_priv->irq_masks = via_unichrome_irqs;
- dev_priv->num_irqs = via_num_unichrome;
- dev_priv->irq_map = via_irqmap_unichrome;
- }
-
- for (i = 0; i < dev_priv->num_irqs; ++i) {
- atomic_set(&cur_irq->irq_received, 0);
- cur_irq->enable_mask = dev_priv->irq_masks[i][0];
- cur_irq->pending_mask = dev_priv->irq_masks[i][1];
- DRM_INIT_WAITQUEUE(&cur_irq->irq_queue);
- dev_priv->irq_enable_mask |= cur_irq->enable_mask;
- dev_priv->irq_pending_mask |= cur_irq->pending_mask;
- cur_irq++;
-
- DRM_DEBUG("Initializing IRQ %d\n", i);
- }
-
- dev_priv->last_vblank_valid = 0;
-
- /* Clear VSync interrupt regs */
- status = VIA_READ(VIA_REG_INTERRUPT);
- VIA_WRITE(VIA_REG_INTERRUPT, status &
- ~(dev_priv->irq_enable_mask));
-
- /* Clear bits if they're already high */
- viadrv_acknowledge_irqs(dev_priv);
- }
-}
-
-int via_driver_irq_postinstall(struct drm_device * dev)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- u32 status;
-
- DRM_DEBUG("via_driver_irq_postinstall\n");
- if (!dev_priv)
- return -EINVAL;
-
- status = VIA_READ(VIA_REG_INTERRUPT);
- VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
- | dev_priv->irq_enable_mask);
-
- /* Some magic, oh for some data sheets ! */
- VIA_WRITE8(0x83d4, 0x11);
- VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
-
- return 0;
-}
-
-void via_driver_irq_uninstall(struct drm_device * dev)
-{
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- u32 status;
-
- DRM_DEBUG("\n");
- if (dev_priv) {
-
- /* Some more magic, oh for some data sheets ! */
-
- VIA_WRITE8(0x83d4, 0x11);
- VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
-
- status = VIA_READ(VIA_REG_INTERRUPT);
- VIA_WRITE(VIA_REG_INTERRUPT, status &
- ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask));
- }
-}
-
-int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_irqwait_t *irqwait = data;
- struct timeval now;
- int ret = 0;
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- drm_via_irq_t *cur_irq = dev_priv->via_irqs;
- int force_sequence;
-
- if (!dev->irq)
- return -EINVAL;
-
- if (irqwait->request.irq >= dev_priv->num_irqs) {
- DRM_ERROR("Trying to wait on unknown irq %d\n",
- irqwait->request.irq);
- return -EINVAL;
- }
-
- cur_irq += irqwait->request.irq;
-
- switch (irqwait->request.type & ~VIA_IRQ_FLAGS_MASK) {
- case VIA_IRQ_RELATIVE:
- irqwait->request.sequence +=
- atomic_read(&cur_irq->irq_received);
- irqwait->request.type &= ~_DRM_VBLANK_RELATIVE;
- case VIA_IRQ_ABSOLUTE:
- break;
- default:
- return -EINVAL;
- }
-
- if (irqwait->request.type & VIA_IRQ_SIGNAL) {
- DRM_ERROR("Signals on Via IRQs not implemented yet.\n");
- return -EINVAL;
- }
-
- force_sequence = (irqwait->request.type & VIA_IRQ_FORCE_SEQUENCE);
-
- ret = via_driver_irq_wait(dev, irqwait->request.irq, force_sequence,
- &irqwait->request.sequence);
-#ifdef __linux__
- do_gettimeofday(&now);
-#else
- microtime(&now);
-#endif
- irqwait->reply.tval_sec = now.tv_sec;
- irqwait->reply.tval_usec = now.tv_usec;
-
- return ret;
-}
+++ /dev/null
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#include "drmP.h"
-#include "via_drm.h"
-#include "via_drv.h"
-
-static int via_do_init_map(struct drm_device * dev, drm_via_init_t * init)
-{
- drm_via_private_t *dev_priv = dev->dev_private;
- int ret = 0;
-
- DRM_DEBUG("\n");
-
- dev_priv->sarea = drm_getsarea(dev);
- if (!dev_priv->sarea) {
- DRM_ERROR("could not find sarea!\n");
- dev->dev_private = (void *)dev_priv;
- via_do_cleanup_map(dev);
- return -EINVAL;
- }
-
- dev_priv->fb = drm_core_findmap(dev, init->fb_offset);
- if (!dev_priv->fb) {
- DRM_ERROR("could not find framebuffer!\n");
- dev->dev_private = (void *)dev_priv;
- via_do_cleanup_map(dev);
- return -EINVAL;
- }
- dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
- if (!dev_priv->mmio) {
- DRM_ERROR("could not find mmio region!\n");
- dev->dev_private = (void *)dev_priv;
- via_do_cleanup_map(dev);
- return -EINVAL;
- }
-
- dev_priv->sarea_priv =
- (drm_via_sarea_t *) ((u8 *) dev_priv->sarea->handle +
- init->sarea_priv_offset);
-
- dev_priv->agpAddr = init->agpAddr;
-
- via_init_futex( dev_priv );
-#ifdef VIA_HAVE_DMABLIT
- via_init_dmablit( dev );
-#endif
- dev->dev_private = (void *)dev_priv;
- return ret;
-
-}
-
-int via_do_cleanup_map(struct drm_device * dev)
-{
- via_dma_cleanup(dev);
-
- return 0;
-}
-
-
-int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_init_t *init = data;
-
- DRM_DEBUG("\n");
-
- switch (init->func) {
- case VIA_INIT_MAP:
- return via_do_init_map(dev, init);
- case VIA_CLEANUP_MAP:
- return via_do_cleanup_map(dev);
- }
-
- return -EINVAL;
-}
-
-int via_driver_load(struct drm_device *dev, unsigned long chipset)
-{
- drm_via_private_t *dev_priv;
- int ret = 0;
-
- dev_priv = drm_calloc(1, sizeof(drm_via_private_t), DRM_MEM_DRIVER);
- if (dev_priv == NULL)
- return -ENOMEM;
-
- dev->dev_private = (void *)dev_priv;
-
- dev_priv->chipset = chipset;
-
-#ifdef VIA_HAVE_CORE_MM
- ret = drm_sman_init(&dev_priv->sman, 2, 12, 8);
- if (ret) {
- drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);
- return ret;
- }
-#endif
-
- ret = drm_vblank_init(dev, 1);
- if (ret) {
- drm_sman_takedown(&dev_priv->sman);
- drm_free(dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER);
- return ret;
- }
-
- return 0;
-
-}
-
-int via_driver_unload(struct drm_device *dev)
-{
- drm_via_private_t *dev_priv = dev->dev_private;
-
-#ifdef VIA_HAVE_CORE_MM
- drm_sman_takedown(&dev_priv->sman);
-#endif
- drm_free(dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER);
-
- return 0;
-}
+++ /dev/null
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#include "drmP.h"
-#include "via_drm.h"
-#include "via_drv.h"
-#include "via_ds.h"
-#include "via_mm.h"
-
-#define MAX_CONTEXT 100
-
-typedef struct {
- int used;
- int context;
- set_t *sets[2]; /* 0 for frame buffer, 1 for AGP , 2 for System */
-} via_context_t;
-
-static via_context_t global_ppriv[MAX_CONTEXT];
-
-static int via_agp_alloc(drm_via_mem_t * mem);
-static int via_agp_free(drm_via_mem_t * mem);
-static int via_fb_alloc(drm_via_mem_t * mem);
-static int via_fb_free(drm_via_mem_t * mem);
-
-static int add_alloc_set(int context, int type, unsigned long val)
-{
- int i, retval = 0;
-
- for (i = 0; i < MAX_CONTEXT; i++) {
- if (global_ppriv[i].used && global_ppriv[i].context == context) {
- retval = via_setAdd(global_ppriv[i].sets[type], val);
- break;
- }
- }
-
- return retval;
-}
-
-static int del_alloc_set(int context, int type, unsigned long val)
-{
- int i, retval = 0;
-
- for (i = 0; i < MAX_CONTEXT; i++)
- if (global_ppriv[i].used && global_ppriv[i].context == context) {
- retval = via_setDel(global_ppriv[i].sets[type], val);
- break;
- }
-
- return retval;
-}
-
-/* agp memory management */
-static memHeap_t *AgpHeap = NULL;
-
-int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_agp_t *agp = data;
-
- AgpHeap = via_mmInit(agp->offset, agp->size);
-
- DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)agp->offset,
- (unsigned long)agp->size);
-
- return 0;
-}
-
-/* fb memory management */
-static memHeap_t *FBHeap = NULL;
-
-int via_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_fb_t *fb = data;
-
- FBHeap = via_mmInit(fb.offset, fb.size);
-
- DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)fb.offset,
- (unsigned long)fb.size);
-
- return 0;
-}
-
-int via_init_context(struct drm_device *dev, int context)
-{
- int i;
-
- for (i = 0; i < MAX_CONTEXT; i++)
- if (global_ppriv[i].used &&
- (global_ppriv[i].context == context))
- break;
-
- if (i >= MAX_CONTEXT) {
- for (i = 0; i < MAX_CONTEXT; i++) {
- if (!global_ppriv[i].used) {
- global_ppriv[i].context = context;
- global_ppriv[i].used = 1;
- global_ppriv[i].sets[0] = via_setInit();
- global_ppriv[i].sets[1] = via_setInit();
- DRM_DEBUG("init allocation set, socket=%d,"
- " context = %d\n", i, context);
- break;
- }
- }
-
- if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) ||
- (global_ppriv[i].sets[1] == NULL)) {
- return 0;
- }
- }
-
- return 1;
-}
-
-int via_final_context(struct drm_device *dev, int context)
-{
- int i;
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
-
- for (i = 0; i < MAX_CONTEXT; i++)
- if (global_ppriv[i].used &&
- (global_ppriv[i].context == context))
- break;
-
- if (i < MAX_CONTEXT) {
- set_t *set;
- ITEM_TYPE item;
- int retval;
-
- DRM_DEBUG("find socket %d, context = %d\n", i, context);
-
- /* Video Memory */
- set = global_ppriv[i].sets[0];
- retval = via_setFirst(set, &item);
- while (retval) {
- DRM_DEBUG("free video memory 0x%lx\n", item);
- via_mmFreeMem((PMemBlock) item);
- retval = via_setNext(set, &item);
- }
- via_setDestroy(set);
-
- /* AGP Memory */
- set = global_ppriv[i].sets[1];
- retval = via_setFirst(set, &item);
- while (retval) {
- DRM_DEBUG("free agp memory 0x%lx\n", item);
- via_mmFreeMem((PMemBlock) item);
- retval = via_setNext(set, &item);
- }
- via_setDestroy(set);
- global_ppriv[i].used = 0;
- }
- via_release_futex(dev_priv, context);
-
-#if defined(__linux__)
- /* Linux specific until context tracking code gets ported to BSD */
- /* Last context, perform cleanup */
- if (dev->ctx_count == 1 && dev->dev_private) {
- DRM_DEBUG("Last Context\n");
- if (dev->irq)
- drm_irq_uninstall(dev);
-
- via_cleanup_futex(dev_priv);
- via_do_cleanup_map(dev);
- }
-#endif
-
- return 1;
-}
-
-int via_mem_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_mem_t *mem = data;
-
- switch (mem.type) {
- case VIA_MEM_VIDEO:
- if (via_fb_alloc(mem) < 0)
- return -EFAULT;
- return 0;
- case VIA_MEM_AGP:
- if (via_agp_alloc(mem) < 0)
- return -EFAULT;
- return 0;
- }
-
- return -EFAULT;
-}
-
-static int via_fb_alloc(drm_via_mem_t * mem)
-{
- drm_via_mm_t fb;
- PMemBlock block;
- int retval = 0;
-
- if (!FBHeap)
- return -1;
-
- fb.size = mem->size;
- fb.context = mem->context;
-
- block = via_mmAllocMem(FBHeap, fb.size, 5, 0);
- if (block) {
- fb.offset = block->ofs;
- fb.free = (unsigned long)block;
- if (!add_alloc_set(fb.context, VIA_MEM_VIDEO, fb.free)) {
- DRM_DEBUG("adding to allocation set fails\n");
- via_mmFreeMem((PMemBlock) fb.free);
- retval = -1;
- }
- } else {
- fb.offset = 0;
- fb.size = 0;
- fb.free = 0;
- retval = -1;
- }
-
- mem->offset = fb.offset;
- mem->index = fb.free;
-
- DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb.size,
- (int)fb.offset);
-
- return retval;
-}
-
-static int via_agp_alloc(drm_via_mem_t * mem)
-{
- drm_via_mm_t agp;
- PMemBlock block;
- int retval = 0;
-
- if (!AgpHeap)
- return -1;
-
- agp.size = mem->size;
- agp.context = mem->context;
-
- block = via_mmAllocMem(AgpHeap, agp.size, 5, 0);
- if (block) {
- agp.offset = block->ofs;
- agp.free = (unsigned long)block;
- if (!add_alloc_set(agp.context, VIA_MEM_AGP, agp.free)) {
- DRM_DEBUG("adding to allocation set fails\n");
- via_mmFreeMem((PMemBlock) agp.free);
- retval = -1;
- }
- } else {
- agp.offset = 0;
- agp.size = 0;
- agp.free = 0;
- }
-
- mem->offset = agp.offset;
- mem->index = agp.free;
-
- DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp.size,
- (unsigned int)agp.offset);
- return retval;
-}
-
-int via_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_mem_t *mem = data;
-
- switch (mem->type) {
-
- case VIA_MEM_VIDEO:
- if (via_fb_free(mem) == 0)
- return 0;
- break;
- case VIA_MEM_AGP:
- if (via_agp_free(mem) == 0)
- return 0;
- break;
- }
-
- return -EFAULT;
-}
-
-static int via_fb_free(drm_via_mem_t * mem)
-{
- drm_via_mm_t fb;
- int retval = 0;
-
- if (!FBHeap) {
- return -1;
- }
-
- fb.free = mem->index;
- fb.context = mem->context;
-
- if (!fb.free) {
- return -1;
-
- }
-
- via_mmFreeMem((PMemBlock) fb.free);
-
- if (!del_alloc_set(fb.context, VIA_MEM_VIDEO, fb.free)) {
- retval = -1;
- }
-
- DRM_DEBUG("free fb, free = %ld\n", fb.free);
-
- return retval;
-}
-
-static int via_agp_free(drm_via_mem_t * mem)
-{
- drm_via_mm_t agp;
-
- int retval = 0;
-
- agp.free = mem->index;
- agp.context = mem->context;
-
- if (!agp.free)
- return -1;
-
- via_mmFreeMem((PMemBlock) agp.free);
-
- if (!del_alloc_set(agp.context, VIA_MEM_AGP, agp.free)) {
- retval = -1;
- }
-
- DRM_DEBUG("free agp, free = %ld\n", agp.nfree);
-
- return retval;
-}
+++ /dev/null
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#ifndef _via_drm_mm_h_
-#define _via_drm_mm_h_
-
-typedef struct {
- unsigned int context;
- unsigned int size;
- unsigned long offset;
- unsigned long free;
-} drm_via_mm_t;
-
-typedef struct {
- unsigned int size;
- unsigned long handle;
- void *virtual;
-} drm_via_dma_t;
-
-#endif
+++ /dev/null
-/*
- * Copyright 2004 The Unichrome Project. All Rights Reserved.
- * Copyright 2005 Thomas Hellstrom. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Author: Thomas Hellstrom 2004, 2005.
- * This code was written using docs obtained under NDA from VIA Inc.
- *
- * Don't run this code directly on an AGP buffer. Due to cache problems it will
- * be very slow.
- */
-
-#include "via_3d_reg.h"
-#include "drmP.h"
-#include "drm.h"
-#include "via_drm.h"
-#include "via_verifier.h"
-#include "via_drv.h"
-
-typedef enum {
- state_command,
- state_header2,
- state_header1,
- state_vheader5,
- state_vheader6,
- state_error
-} verifier_state_t;
-
-typedef enum {
- no_check = 0,
- check_for_header2,
- check_for_header1,
- check_for_header2_err,
- check_for_header1_err,
- check_for_fire,
- check_z_buffer_addr0,
- check_z_buffer_addr1,
- check_z_buffer_addr_mode,
- check_destination_addr0,
- check_destination_addr1,
- check_destination_addr_mode,
- check_for_dummy,
- check_for_dd,
- check_texture_addr0,
- check_texture_addr1,
- check_texture_addr2,
- check_texture_addr3,
- check_texture_addr4,
- check_texture_addr5,
- check_texture_addr6,
- check_texture_addr7,
- check_texture_addr8,
- check_texture_addr_mode,
- check_for_vertex_count,
- check_number_texunits,
- forbidden_command
-} hazard_t;
-
-/*
- * Associates each hazard above with a possible multi-command
- * sequence. For example an address that is split over multiple
- * commands and that needs to be checked at the first command
- * that does not include any part of the address.
- */
-
-static drm_via_sequence_t seqs[] = {
- no_sequence,
- no_sequence,
- no_sequence,
- no_sequence,
- no_sequence,
- no_sequence,
- z_address,
- z_address,
- z_address,
- dest_address,
- dest_address,
- dest_address,
- no_sequence,
- no_sequence,
- tex_address,
- tex_address,
- tex_address,
- tex_address,
- tex_address,
- tex_address,
- tex_address,
- tex_address,
- tex_address,
- tex_address,
- no_sequence
-};
-
-typedef struct {
- unsigned int code;
- hazard_t hz;
-} hz_init_t;
-
-static hz_init_t init_table1[] = {
- {0xf2, check_for_header2_err},
- {0xf0, check_for_header1_err},
- {0xee, check_for_fire},
- {0xcc, check_for_dummy},
- {0xdd, check_for_dd},
- {0x00, no_check},
- {0x10, check_z_buffer_addr0},
- {0x11, check_z_buffer_addr1},
- {0x12, check_z_buffer_addr_mode},
- {0x13, no_check},
- {0x14, no_check},
- {0x15, no_check},
- {0x23, no_check},
- {0x24, no_check},
- {0x33, no_check},
- {0x34, no_check},
- {0x35, no_check},
- {0x36, no_check},
- {0x37, no_check},
- {0x38, no_check},
- {0x39, no_check},
- {0x3A, no_check},
- {0x3B, no_check},
- {0x3C, no_check},
- {0x3D, no_check},
- {0x3E, no_check},
- {0x40, check_destination_addr0},
- {0x41, check_destination_addr1},
- {0x42, check_destination_addr_mode},
- {0x43, no_check},
- {0x44, no_check},
- {0x50, no_check},
- {0x51, no_check},
- {0x52, no_check},
- {0x53, no_check},
- {0x54, no_check},
- {0x55, no_check},
- {0x56, no_check},
- {0x57, no_check},
- {0x58, no_check},
- {0x70, no_check},
- {0x71, no_check},
- {0x78, no_check},
- {0x79, no_check},
- {0x7A, no_check},
- {0x7B, no_check},
- {0x7C, no_check},
- {0x7D, check_for_vertex_count}
-};
-
-static hz_init_t init_table2[] = {
- {0xf2, check_for_header2_err},
- {0xf0, check_for_header1_err},
- {0xee, check_for_fire},
- {0xcc, check_for_dummy},
- {0x00, check_texture_addr0},
- {0x01, check_texture_addr0},
- {0x02, check_texture_addr0},
- {0x03, check_texture_addr0},
- {0x04, check_texture_addr0},
- {0x05, check_texture_addr0},
- {0x06, check_texture_addr0},
- {0x07, check_texture_addr0},
- {0x08, check_texture_addr0},
- {0x09, check_texture_addr0},
- {0x20, check_texture_addr1},
- {0x21, check_texture_addr1},
- {0x22, check_texture_addr1},
- {0x23, check_texture_addr4},
- {0x2B, check_texture_addr3},
- {0x2C, check_texture_addr3},
- {0x2D, check_texture_addr3},
- {0x2E, check_texture_addr3},
- {0x2F, check_texture_addr3},
- {0x30, check_texture_addr3},
- {0x31, check_texture_addr3},
- {0x32, check_texture_addr3},
- {0x33, check_texture_addr3},
- {0x34, check_texture_addr3},
- {0x4B, check_texture_addr5},
- {0x4C, check_texture_addr6},
- {0x51, check_texture_addr7},
- {0x52, check_texture_addr8},
- {0x77, check_texture_addr2},
- {0x78, no_check},
- {0x79, no_check},
- {0x7A, no_check},
- {0x7B, check_texture_addr_mode},
- {0x7C, no_check},
- {0x7D, no_check},
- {0x7E, no_check},
- {0x7F, no_check},
- {0x80, no_check},
- {0x81, no_check},
- {0x82, no_check},
- {0x83, no_check},
- {0x85, no_check},
- {0x86, no_check},
- {0x87, no_check},
- {0x88, no_check},
- {0x89, no_check},
- {0x8A, no_check},
- {0x90, no_check},
- {0x91, no_check},
- {0x92, no_check},
- {0x93, no_check}
-};
-
-static hz_init_t init_table3[] = {
- {0xf2, check_for_header2_err},
- {0xf0, check_for_header1_err},
- {0xcc, check_for_dummy},
- {0x00, check_number_texunits}
-};
-
-static hazard_t table1[256];
-static hazard_t table2[256];
-static hazard_t table3[256];
-
-static __inline__ int
-eat_words(const uint32_t ** buf, const uint32_t * buf_end, unsigned num_words)
-{
- if ((buf_end - *buf) >= num_words) {
- *buf += num_words;
- return 0;
- }
- DRM_ERROR("Illegal termination of DMA command buffer\n");
- return 1;
-}
-
-/*
- * Partially stolen from drm_memory.h
- */
-
-static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t *seq,
- unsigned long offset,
- unsigned long size,
- struct drm_device *dev)
-{
-#ifdef __linux__
- struct drm_map_list *r_list;
-#endif
- drm_local_map_t *map = seq->map_cache;
-
- if (map && map->offset <= offset
- && (offset + size) <= (map->offset + map->size)) {
- return map;
- }
-#ifdef __linux__
- list_for_each_entry(r_list, &dev->maplist, head) {
- map = r_list->map;
- if (!map)
- continue;
-#else
- TAILQ_FOREACH(map, &dev->maplist, link) {
-#endif
- if (map->offset <= offset
- && (offset + size) <= (map->offset + map->size)
- && !(map->flags & _DRM_RESTRICTED)
- && (map->type == _DRM_AGP)) {
- seq->map_cache = map;
- return map;
- }
- }
- return NULL;
-}
-
-/*
- * Require that all AGP texture levels reside in the same AGP map which should
- * be mappable by the client. This is not a big restriction.
- * FIXME: To actually enforce this security policy strictly, drm_rmmap
- * would have to wait for dma quiescent before removing an AGP map.
- * The via_drm_lookup_agp_map call in reality seems to take
- * very little CPU time.
- */
-
-static __inline__ int finish_current_sequence(drm_via_state_t * cur_seq)
-{
- switch (cur_seq->unfinished) {
- case z_address:
- DRM_DEBUG("Z Buffer start address is 0x%x\n", cur_seq->z_addr);
- break;
- case dest_address:
- DRM_DEBUG("Destination start address is 0x%x\n",
- cur_seq->d_addr);
- break;
- case tex_address:
- if (cur_seq->agp_texture) {
- unsigned start =
- cur_seq->tex_level_lo[cur_seq->texture];
- unsigned end = cur_seq->tex_level_hi[cur_seq->texture];
- unsigned long lo = ~0, hi = 0, tmp;
- uint32_t *addr, *pitch, *height, tex;
- unsigned i;
- int npot;
-
- if (end > 9)
- end = 9;
- if (start > 9)
- start = 9;
-
- addr =
- &(cur_seq->t_addr[tex = cur_seq->texture][start]);
- pitch = &(cur_seq->pitch[tex][start]);
- height = &(cur_seq->height[tex][start]);
- npot = cur_seq->tex_npot[tex];
- for (i = start; i <= end; ++i) {
- tmp = *addr++;
- if (tmp < lo)
- lo = tmp;
- if (i == 0 && npot)
- tmp += (*height++ * *pitch++);
- else
- tmp += (*height++ << *pitch++);
- if (tmp > hi)
- hi = tmp;
- }
-
- if (!via_drm_lookup_agp_map
- (cur_seq, lo, hi - lo, cur_seq->dev)) {
- DRM_ERROR
- ("AGP texture is not in allowed map\n");
- return 2;
- }
- }
- break;
- default:
- break;
- }
- cur_seq->unfinished = no_sequence;
- return 0;
-}
-
-static __inline__ int
-investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t * cur_seq)
-{
- register uint32_t tmp, *tmp_addr;
-
- if (cur_seq->unfinished && (cur_seq->unfinished != seqs[hz])) {
- int ret;
- if ((ret = finish_current_sequence(cur_seq)))
- return ret;
- }
-
- switch (hz) {
- case check_for_header2:
- if (cmd == HALCYON_HEADER2)
- return 1;
- return 0;
- case check_for_header1:
- if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1)
- return 1;
- return 0;
- case check_for_header2_err:
- if (cmd == HALCYON_HEADER2)
- return 1;
- DRM_ERROR("Illegal DMA HALCYON_HEADER2 command\n");
- break;
- case check_for_header1_err:
- if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1)
- return 1;
- DRM_ERROR("Illegal DMA HALCYON_HEADER1 command\n");
- break;
- case check_for_fire:
- if ((cmd & HALCYON_FIREMASK) == HALCYON_FIRECMD)
- return 1;
- DRM_ERROR("Illegal DMA HALCYON_FIRECMD command\n");
- break;
- case check_for_dummy:
- if (HC_DUMMY == cmd)
- return 0;
- DRM_ERROR("Illegal DMA HC_DUMMY command\n");
- break;
- case check_for_dd:
- if (0xdddddddd == cmd)
- return 0;
- DRM_ERROR("Illegal DMA 0xdddddddd command\n");
- break;
- case check_z_buffer_addr0:
- cur_seq->unfinished = z_address;
- cur_seq->z_addr = (cur_seq->z_addr & 0xFF000000) |
- (cmd & 0x00FFFFFF);
- return 0;
- case check_z_buffer_addr1:
- cur_seq->unfinished = z_address;
- cur_seq->z_addr = (cur_seq->z_addr & 0x00FFFFFF) |
- ((cmd & 0xFF) << 24);
- return 0;
- case check_z_buffer_addr_mode:
- cur_seq->unfinished = z_address;
- if ((cmd & 0x0000C000) == 0)
- return 0;
- DRM_ERROR("Attempt to place Z buffer in system memory\n");
- return 2;
- case check_destination_addr0:
- cur_seq->unfinished = dest_address;
- cur_seq->d_addr = (cur_seq->d_addr & 0xFF000000) |
- (cmd & 0x00FFFFFF);
- return 0;
- case check_destination_addr1:
- cur_seq->unfinished = dest_address;
- cur_seq->d_addr = (cur_seq->d_addr & 0x00FFFFFF) |
- ((cmd & 0xFF) << 24);
- return 0;
- case check_destination_addr_mode:
- cur_seq->unfinished = dest_address;
- if ((cmd & 0x0000C000) == 0)
- return 0;
- DRM_ERROR
- ("Attempt to place 3D drawing buffer in system memory\n");
- return 2;
- case check_texture_addr0:
- cur_seq->unfinished = tex_address;
- tmp = (cmd >> 24);
- tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp];
- *tmp_addr = (*tmp_addr & 0xFF000000) | (cmd & 0x00FFFFFF);
- return 0;
- case check_texture_addr1:
- cur_seq->unfinished = tex_address;
- tmp = ((cmd >> 24) - 0x20);
- tmp += tmp << 1;
- tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp];
- *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24);
- tmp_addr++;
- *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF00) << 16);
- tmp_addr++;
- *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF0000) << 8);
- return 0;
- case check_texture_addr2:
- cur_seq->unfinished = tex_address;
- cur_seq->tex_level_lo[tmp = cur_seq->texture] = cmd & 0x3F;
- cur_seq->tex_level_hi[tmp] = (cmd & 0xFC0) >> 6;
- return 0;
- case check_texture_addr3:
- cur_seq->unfinished = tex_address;
- tmp = ((cmd >> 24) - HC_SubA_HTXnL0Pit);
- if (tmp == 0 &&
- (cmd & HC_HTXnEnPit_MASK)) {
- cur_seq->pitch[cur_seq->texture][tmp] =
- (cmd & HC_HTXnLnPit_MASK);
- cur_seq->tex_npot[cur_seq->texture] = 1;
- } else {
- cur_seq->pitch[cur_seq->texture][tmp] =
- (cmd & HC_HTXnLnPitE_MASK) >> HC_HTXnLnPitE_SHIFT;
- cur_seq->tex_npot[cur_seq->texture] = 0;
- if (cmd & 0x000FFFFF) {
- DRM_ERROR
- ("Unimplemented texture level 0 pitch mode.\n");
- return 2;
- }
- }
- return 0;
- case check_texture_addr4:
- cur_seq->unfinished = tex_address;
- tmp_addr = &cur_seq->t_addr[cur_seq->texture][9];
- *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24);
- return 0;
- case check_texture_addr5:
- case check_texture_addr6:
- cur_seq->unfinished = tex_address;
- /*
- * Texture width. We don't care since we have the pitch.
- */
- return 0;
- case check_texture_addr7:
- cur_seq->unfinished = tex_address;
- tmp_addr = &(cur_seq->height[cur_seq->texture][0]);
- tmp_addr[5] = 1 << ((cmd & 0x00F00000) >> 20);
- tmp_addr[4] = 1 << ((cmd & 0x000F0000) >> 16);
- tmp_addr[3] = 1 << ((cmd & 0x0000F000) >> 12);
- tmp_addr[2] = 1 << ((cmd & 0x00000F00) >> 8);
- tmp_addr[1] = 1 << ((cmd & 0x000000F0) >> 4);
- tmp_addr[0] = 1 << (cmd & 0x0000000F);
- return 0;
- case check_texture_addr8:
- cur_seq->unfinished = tex_address;
- tmp_addr = &(cur_seq->height[cur_seq->texture][0]);
- tmp_addr[9] = 1 << ((cmd & 0x0000F000) >> 12);
- tmp_addr[8] = 1 << ((cmd & 0x00000F00) >> 8);
- tmp_addr[7] = 1 << ((cmd & 0x000000F0) >> 4);
- tmp_addr[6] = 1 << (cmd & 0x0000000F);
- return 0;
- case check_texture_addr_mode:
- cur_seq->unfinished = tex_address;
- if (2 == (tmp = cmd & 0x00000003)) {
- DRM_ERROR
- ("Attempt to fetch texture from system memory.\n");
- return 2;
- }
- cur_seq->agp_texture = (tmp == 3);
- cur_seq->tex_palette_size[cur_seq->texture] =
- (cmd >> 16) & 0x000000007;
- return 0;
- case check_for_vertex_count:
- cur_seq->vertex_count = cmd & 0x0000FFFF;
- return 0;
- case check_number_texunits:
- cur_seq->multitex = (cmd >> 3) & 1;
- return 0;
- default:
- DRM_ERROR("Illegal DMA data: 0x%x\n", cmd);
- return 2;
- }
- return 2;
-}
-
-static __inline__ int
-via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end,
- drm_via_state_t * cur_seq)
-{
- drm_via_private_t *dev_priv =
- (drm_via_private_t *) cur_seq->dev->dev_private;
- uint32_t a_fire, bcmd, dw_count;
- int ret = 0;
- int have_fire;
- const uint32_t *buf = *buffer;
-
- while (buf < buf_end) {
- have_fire = 0;
- if ((buf_end - buf) < 2) {
- DRM_ERROR
- ("Unexpected termination of primitive list.\n");
- ret = 1;
- break;
- }
- if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdB)
- break;
- bcmd = *buf++;
- if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdA) {
- DRM_ERROR("Expected Vertex List A command, got 0x%x\n",
- *buf);
- ret = 1;
- break;
- }
- a_fire =
- *buf++ | HC_HPLEND_MASK | HC_HPMValidN_MASK |
- HC_HE3Fire_MASK;
-
- /*
- * How many dwords per vertex ?
- */
-
- if (cur_seq->agp && ((bcmd & (0xF << 11)) == 0)) {
- DRM_ERROR("Illegal B command vertex data for AGP.\n");
- ret = 1;
- break;
- }
-
- dw_count = 0;
- if (bcmd & (1 << 7))
- dw_count += (cur_seq->multitex) ? 2 : 1;
- if (bcmd & (1 << 8))
- dw_count += (cur_seq->multitex) ? 2 : 1;
- if (bcmd & (1 << 9))
- dw_count++;
- if (bcmd & (1 << 10))
- dw_count++;
- if (bcmd & (1 << 11))
- dw_count++;
- if (bcmd & (1 << 12))
- dw_count++;
- if (bcmd & (1 << 13))
- dw_count++;
- if (bcmd & (1 << 14))
- dw_count++;
-
- while (buf < buf_end) {
- if (*buf == a_fire) {
- if (dev_priv->num_fire_offsets >=
- VIA_FIRE_BUF_SIZE) {
- DRM_ERROR("Fire offset buffer full.\n");
- ret = 1;
- break;
- }
- dev_priv->fire_offsets[dev_priv->
- num_fire_offsets++] =
- buf;
- have_fire = 1;
- buf++;
- if (buf < buf_end && *buf == a_fire)
- buf++;
- break;
- }
- if ((*buf == HALCYON_HEADER2) ||
- ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) {
- DRM_ERROR("Missing Vertex Fire command, "
- "Stray Vertex Fire command or verifier "
- "lost sync.\n");
- ret = 1;
- break;
- }
- if ((ret = eat_words(&buf, buf_end, dw_count)))
- break;
- }
- if (buf >= buf_end && !have_fire) {
- DRM_ERROR("Missing Vertex Fire command or verifier "
- "lost sync.\n");
- ret = 1;
- break;
- }
- if (cur_seq->agp && ((buf - cur_seq->buf_start) & 0x01)) {
- DRM_ERROR("AGP Primitive list end misaligned.\n");
- ret = 1;
- break;
- }
- }
- *buffer = buf;
- return ret;
-}
-
-static __inline__ verifier_state_t
-via_check_header2(uint32_t const **buffer, const uint32_t * buf_end,
- drm_via_state_t * hc_state)
-{
- uint32_t cmd;
- int hz_mode;
- hazard_t hz;
- const uint32_t *buf = *buffer;
- const hazard_t *hz_table;
-
- if ((buf_end - buf) < 2) {
- DRM_ERROR
- ("Illegal termination of DMA HALCYON_HEADER2 sequence.\n");
- return state_error;
- }
- buf++;
- cmd = (*buf++ & 0xFFFF0000) >> 16;
-
- switch (cmd) {
- case HC_ParaType_CmdVdata:
- if (via_check_prim_list(&buf, buf_end, hc_state))
- return state_error;
- *buffer = buf;
- return state_command;
- case HC_ParaType_NotTex:
- hz_table = table1;
- break;
- case HC_ParaType_Tex:
- hc_state->texture = 0;
- hz_table = table2;
- break;
- case (HC_ParaType_Tex | (HC_SubType_Tex1 << 8)):
- hc_state->texture = 1;
- hz_table = table2;
- break;
- case (HC_ParaType_Tex | (HC_SubType_TexGeneral << 8)):
- hz_table = table3;
- break;
- case HC_ParaType_Auto:
- if (eat_words(&buf, buf_end, 2))
- return state_error;
- *buffer = buf;
- return state_command;
- case (HC_ParaType_Palette | (HC_SubType_Stipple << 8)):
- if (eat_words(&buf, buf_end, 32))
- return state_error;
- *buffer = buf;
- return state_command;
- case (HC_ParaType_Palette | (HC_SubType_TexPalette0 << 8)):
- case (HC_ParaType_Palette | (HC_SubType_TexPalette1 << 8)):
- DRM_ERROR("Texture palettes are rejected because of "
- "lack of info how to determine their size.\n");
- return state_error;
- case (HC_ParaType_Palette | (HC_SubType_FogTable << 8)):
- DRM_ERROR("Fog factor palettes are rejected because of "
- "lack of info how to determine their size.\n");
- return state_error;
- default:
-
- /*
- * There are some unimplemented HC_ParaTypes here, that
- * need to be implemented if the Mesa driver is extended.
- */
-
- DRM_ERROR("Invalid or unimplemented HALCYON_HEADER2 "
- "DMA subcommand: 0x%x. Previous dword: 0x%x\n",
- cmd, *(buf - 2));
- *buffer = buf;
- return state_error;
- }
-
- while (buf < buf_end) {
- cmd = *buf++;
- if ((hz = hz_table[cmd >> 24])) {
- if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) {
- if (hz_mode == 1) {
- buf--;
- break;
- }
- return state_error;
- }
- } else if (hc_state->unfinished &&
- finish_current_sequence(hc_state)) {
- return state_error;
- }
- }
- if (hc_state->unfinished && finish_current_sequence(hc_state)) {
- return state_error;
- }
- *buffer = buf;
- return state_command;
-}
-
-static __inline__ verifier_state_t
-via_parse_header2(drm_via_private_t * dev_priv, uint32_t const **buffer,
- const uint32_t * buf_end, int *fire_count)
-{
- uint32_t cmd;
- const uint32_t *buf = *buffer;
- const uint32_t *next_fire;
- int burst = 0;
-
- next_fire = dev_priv->fire_offsets[*fire_count];
- buf++;
- cmd = (*buf & 0xFFFF0000) >> 16;
- VIA_WRITE(HC_REG_TRANS_SET + HC_REG_BASE, *buf++);
- switch (cmd) {
- case HC_ParaType_CmdVdata:
- while ((buf < buf_end) &&
- (*fire_count < dev_priv->num_fire_offsets) &&
- (*buf & HC_ACMD_MASK) == HC_ACMD_HCmdB) {
- while (buf <= next_fire) {
- VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE +
- (burst & 63), *buf++);
- burst += 4;
- }
- if ((buf < buf_end)
- && ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD))
- buf++;
-
- if (++(*fire_count) < dev_priv->num_fire_offsets)
- next_fire = dev_priv->fire_offsets[*fire_count];
- }
- break;
- default:
- while (buf < buf_end) {
-
- if (*buf == HC_HEADER2 ||
- (*buf & HALCYON_HEADER1MASK) == HALCYON_HEADER1 ||
- (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5 ||
- (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6)
- break;
-
- VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE +
- (burst & 63), *buf++);
- burst += 4;
- }
- }
- *buffer = buf;
- return state_command;
-}
-
-static __inline__ int verify_mmio_address(uint32_t address)
-{
- if ((address > 0x3FF) && (address < 0xC00)) {
- DRM_ERROR("Invalid VIDEO DMA command. "
- "Attempt to access 3D- or command burst area.\n");
- return 1;
- } else if ((address > 0xCFF) && (address < 0x1300)) {
- DRM_ERROR("Invalid VIDEO DMA command. "
- "Attempt to access PCI DMA area.\n");
- return 1;
- } else if (address > 0x13FF) {
- DRM_ERROR("Invalid VIDEO DMA command. "
- "Attempt to access VGA registers.\n");
- return 1;
- }
- return 0;
-}
-
-static __inline__ int
-verify_video_tail(uint32_t const **buffer, const uint32_t * buf_end,
- uint32_t dwords)
-{
- const uint32_t *buf = *buffer;
-
- if (buf_end - buf < dwords) {
- DRM_ERROR("Illegal termination of video command.\n");
- return 1;
- }
- while (dwords--) {
- if (*buf++) {
- DRM_ERROR("Illegal video command tail.\n");
- return 1;
- }
- }
- *buffer = buf;
- return 0;
-}
-
-static __inline__ verifier_state_t
-via_check_header1(uint32_t const **buffer, const uint32_t * buf_end)
-{
- uint32_t cmd;
- const uint32_t *buf = *buffer;
- verifier_state_t ret = state_command;
-
- while (buf < buf_end) {
- cmd = *buf;
- if ((cmd > ((0x3FF >> 2) | HALCYON_HEADER1)) &&
- (cmd < ((0xC00 >> 2) | HALCYON_HEADER1))) {
- if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1)
- break;
- DRM_ERROR("Invalid HALCYON_HEADER1 command. "
- "Attempt to access 3D- or command burst area.\n");
- ret = state_error;
- break;
- } else if (cmd > ((0xCFF >> 2) | HALCYON_HEADER1)) {
- if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1)
- break;
- DRM_ERROR("Invalid HALCYON_HEADER1 command. "
- "Attempt to access VGA registers.\n");
- ret = state_error;
- break;
- } else {
- buf += 2;
- }
- }
- *buffer = buf;
- return ret;
-}
-
-static __inline__ verifier_state_t
-via_parse_header1(drm_via_private_t * dev_priv, uint32_t const **buffer,
- const uint32_t * buf_end)
-{
- register uint32_t cmd;
- const uint32_t *buf = *buffer;
-
- while (buf < buf_end) {
- cmd = *buf;
- if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1)
- break;
- VIA_WRITE((cmd & ~HALCYON_HEADER1MASK) << 2, *++buf);
- buf++;
- }
- *buffer = buf;
- return state_command;
-}
-
-static __inline__ verifier_state_t
-via_check_vheader5(uint32_t const **buffer, const uint32_t * buf_end)
-{
- uint32_t data;
- const uint32_t *buf = *buffer;
-
- if (buf_end - buf < 4) {
- DRM_ERROR("Illegal termination of video header5 command\n");
- return state_error;
- }
-
- data = *buf++ & ~VIA_VIDEOMASK;
- if (verify_mmio_address(data))
- return state_error;
-
- data = *buf++;
- if (*buf++ != 0x00F50000) {
- DRM_ERROR("Illegal header5 header data\n");
- return state_error;
- }
- if (*buf++ != 0x00000000) {
- DRM_ERROR("Illegal header5 header data\n");
- return state_error;
- }
- if (eat_words(&buf, buf_end, data))
- return state_error;
- if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3)))
- return state_error;
- *buffer = buf;
- return state_command;
-
-}
-
-static __inline__ verifier_state_t
-via_parse_vheader5(drm_via_private_t * dev_priv, uint32_t const **buffer,
- const uint32_t * buf_end)
-{
- uint32_t addr, count, i;
- const uint32_t *buf = *buffer;
-
- addr = *buf++ & ~VIA_VIDEOMASK;
- i = count = *buf;
- buf += 3;
- while (i--) {
- VIA_WRITE(addr, *buf++);
- }
- if (count & 3)
- buf += 4 - (count & 3);
- *buffer = buf;
- return state_command;
-}
-
-static __inline__ verifier_state_t
-via_check_vheader6(uint32_t const **buffer, const uint32_t * buf_end)
-{
- uint32_t data;
- const uint32_t *buf = *buffer;
- uint32_t i;
-
- if (buf_end - buf < 4) {
- DRM_ERROR("Illegal termination of video header6 command\n");
- return state_error;
- }
- buf++;
- data = *buf++;
- if (*buf++ != 0x00F60000) {
- DRM_ERROR("Illegal header6 header data\n");
- return state_error;
- }
- if (*buf++ != 0x00000000) {
- DRM_ERROR("Illegal header6 header data\n");
- return state_error;
- }
- if ((buf_end - buf) < (data << 1)) {
- DRM_ERROR("Illegal termination of video header6 command\n");
- return state_error;
- }
- for (i = 0; i < data; ++i) {
- if (verify_mmio_address(*buf++))
- return state_error;
- buf++;
- }
- data <<= 1;
- if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3)))
- return state_error;
- *buffer = buf;
- return state_command;
-}
-
-static __inline__ verifier_state_t
-via_parse_vheader6(drm_via_private_t * dev_priv, uint32_t const **buffer,
- const uint32_t * buf_end)
-{
-
- uint32_t addr, count, i;
- const uint32_t *buf = *buffer;
-
- i = count = *++buf;
- buf += 3;
- while (i--) {
- addr = *buf++;
- VIA_WRITE(addr, *buf++);
- }
- count <<= 1;
- if (count & 3)
- buf += 4 - (count & 3);
- *buffer = buf;
- return state_command;
-}
-
-int
-via_verify_command_stream(const uint32_t * buf, unsigned int size,
- struct drm_device * dev, int agp)
-{
-
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- drm_via_state_t *hc_state = &dev_priv->hc_state;
- drm_via_state_t saved_state = *hc_state;
- uint32_t cmd;
- const uint32_t *buf_end = buf + (size >> 2);
- verifier_state_t state = state_command;
- int cme_video;
- int supported_3d;
-
- cme_video = (dev_priv->chipset == VIA_PRO_GROUP_A ||
- dev_priv->chipset == VIA_DX9_0);
-
- supported_3d = dev_priv->chipset != VIA_DX9_0;
-
- hc_state->dev = dev;
- hc_state->unfinished = no_sequence;
- hc_state->map_cache = NULL;
- hc_state->agp = agp;
- hc_state->buf_start = buf;
- dev_priv->num_fire_offsets = 0;
-
- while (buf < buf_end) {
-
- switch (state) {
- case state_header2:
- state = via_check_header2(&buf, buf_end, hc_state);
- break;
- case state_header1:
- state = via_check_header1(&buf, buf_end);
- break;
- case state_vheader5:
- state = via_check_vheader5(&buf, buf_end);
- break;
- case state_vheader6:
- state = via_check_vheader6(&buf, buf_end);
- break;
- case state_command:
- if ((HALCYON_HEADER2 == (cmd = *buf)) &&
- supported_3d)
- state = state_header2;
- else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1)
- state = state_header1;
- else if (cme_video
- && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5)
- state = state_vheader5;
- else if (cme_video
- && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6)
- state = state_vheader6;
- else if ((cmd == HALCYON_HEADER2) && !supported_3d) {
- DRM_ERROR("Accelerated 3D is not supported on this chipset yet.\n");
- state = state_error;
- } else {
- DRM_ERROR
- ("Invalid / Unimplemented DMA HEADER command. 0x%x\n",
- cmd);
- state = state_error;
- }
- break;
- case state_error:
- default:
- *hc_state = saved_state;
- return -EINVAL;
- }
- }
- if (state == state_error) {
- *hc_state = saved_state;
- return -EINVAL;
- }
- return 0;
-}
-
-int
-via_parse_command_stream(struct drm_device * dev, const uint32_t * buf,
- unsigned int size)
-{
-
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- uint32_t cmd;
- const uint32_t *buf_end = buf + (size >> 2);
- verifier_state_t state = state_command;
- int fire_count = 0;
-
- while (buf < buf_end) {
-
- switch (state) {
- case state_header2:
- state =
- via_parse_header2(dev_priv, &buf, buf_end,
- &fire_count);
- break;
- case state_header1:
- state = via_parse_header1(dev_priv, &buf, buf_end);
- break;
- case state_vheader5:
- state = via_parse_vheader5(dev_priv, &buf, buf_end);
- break;
- case state_vheader6:
- state = via_parse_vheader6(dev_priv, &buf, buf_end);
- break;
- case state_command:
- if (HALCYON_HEADER2 == (cmd = *buf))
- state = state_header2;
- else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1)
- state = state_header1;
- else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5)
- state = state_vheader5;
- else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6)
- state = state_vheader6;
- else {
- DRM_ERROR
- ("Invalid / Unimplemented DMA HEADER command. 0x%x\n",
- cmd);
- state = state_error;
- }
- break;
- case state_error:
- default:
- return -EINVAL;
- }
- }
- if (state == state_error) {
- return -EINVAL;
- }
- return 0;
-}
-
-static void
-setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size)
-{
- int i;
-
- for (i = 0; i < 256; ++i) {
- table[i] = forbidden_command;
- }
-
- for (i = 0; i < size; ++i) {
- table[init_table[i].code] = init_table[i].hz;
- }
-}
-
-void via_init_command_verifier(void)
-{
- setup_hazard_table(init_table1, table1,
- sizeof(init_table1) / sizeof(hz_init_t));
- setup_hazard_table(init_table2, table2,
- sizeof(init_table2) / sizeof(hz_init_t));
- setup_hazard_table(init_table3, table3,
- sizeof(init_table3) / sizeof(hz_init_t));
-}
+++ /dev/null
-/*
- * Copyright 2004 The Unichrome Project. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE UNICHROME PROJECT, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Author: Thomas Hellström 2004.
- */
-
-#ifndef _VIA_VERIFIER_H_
-#define _VIA_VERIFIER_H_
-
-typedef enum {
- no_sequence = 0,
- z_address,
- dest_address,
- tex_address
-} drm_via_sequence_t;
-
-typedef struct {
- unsigned texture;
- uint32_t z_addr;
- uint32_t d_addr;
- uint32_t t_addr[2][10];
- uint32_t pitch[2][10];
- uint32_t height[2][10];
- uint32_t tex_level_lo[2];
- uint32_t tex_level_hi[2];
- uint32_t tex_palette_size[2];
- uint32_t tex_npot[2];
- drm_via_sequence_t unfinished;
- int agp_texture;
- int multitex;
- struct drm_device *dev;
- drm_local_map_t *map_cache;
- uint32_t vertex_count;
- int agp;
- const uint32_t *buf_start;
-} drm_via_state_t;
-
-extern int via_verify_command_stream(const uint32_t *buf, unsigned int size,
- struct drm_device *dev, int agp);
-extern int via_parse_command_stream(struct drm_device *dev, const uint32_t *buf,
- unsigned int size);
-
-#endif
+++ /dev/null
-/*
- * Copyright 2005 Thomas Hellstrom. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Author: Thomas Hellstrom 2005.
- *
- * Video and XvMC related functions.
- */
-
-#include "drmP.h"
-#include "via_drm.h"
-#include "via_drv.h"
-
-void via_init_futex(drm_via_private_t * dev_priv)
-{
- unsigned int i;
-
- DRM_DEBUG("\n");
-
- for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i) {
- DRM_INIT_WAITQUEUE(&(dev_priv->decoder_queue[i]));
- XVMCLOCKPTR(dev_priv->sarea_priv, i)->lock = 0;
- }
-}
-
-void via_cleanup_futex(drm_via_private_t * dev_priv)
-{
-}
-
-void via_release_futex(drm_via_private_t * dev_priv, int context)
-{
- unsigned int i;
- volatile int *lock;
-
- if (!dev_priv->sarea_priv)
- return;
-
- for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i) {
- lock = (volatile int *)XVMCLOCKPTR(dev_priv->sarea_priv, i);
- if ((_DRM_LOCKING_CONTEXT(*lock) == context)) {
- if (_DRM_LOCK_IS_HELD(*lock)
- && (*lock & _DRM_LOCK_CONT)) {
- DRM_WAKEUP(&(dev_priv->decoder_queue[i]));
- }
- *lock = 0;
- }
- }
-}
-
-int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_futex_t *fx = data;
- volatile int *lock;
- drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- drm_via_sarea_t *sAPriv = dev_priv->sarea_priv;
- int ret = 0;
-
- DRM_DEBUG("\n");
-
- if (fx->lock > VIA_NR_XVMC_LOCKS)
- return -EFAULT;
-
- lock = (volatile int *)XVMCLOCKPTR(sAPriv, fx->lock);
-
- switch (fx->func) {
- case VIA_FUTEX_WAIT:
- DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx->lock],
- (fx->ms / 10) * (DRM_HZ / 100), *lock != fx->val);
- return ret;
- case VIA_FUTEX_WAKE:
- DRM_WAKEUP(&(dev_priv->decoder_queue[fx->lock]));
- return 0;
- }
- return 0;
-}
+++ /dev/null
-/****************************************************************************
- * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL XGI AND/OR
- * ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- ***************************************************************************/
-
-#ifndef _XGI_DRM_H_
-#define _XGI_DRM_H_
-
-#include <linux/types.h>
-#include <asm/ioctl.h>
-
-struct drm_xgi_sarea {
- __u16 device_id;
- __u16 vendor_id;
-
- char device_name[32];
-
- unsigned int scrn_start;
- unsigned int scrn_xres;
- unsigned int scrn_yres;
- unsigned int scrn_bpp;
- unsigned int scrn_pitch;
-};
-
-
-struct xgi_bootstrap {
- /**
- * Size of PCI-e GART range in megabytes.
- */
- struct drm_map gart;
-};
-
-
-enum xgi_mem_location {
- XGI_MEMLOC_NON_LOCAL = 0,
- XGI_MEMLOC_LOCAL = 1,
- XGI_MEMLOC_INVALID = 0x7fffffff
-};
-
-struct xgi_mem_alloc {
- /**
- * Memory region to be used for allocation.
- *
- * Must be one of XGI_MEMLOC_NON_LOCAL or XGI_MEMLOC_LOCAL.
- */
- unsigned int location;
-
- /**
- * Number of bytes request.
- *
- * On successful allocation, set to the actual number of bytes
- * allocated.
- */
- unsigned int size;
-
- /**
- * Address of the memory from the graphics hardware's point of view.
- */
- __u32 hw_addr;
-
- /**
- * Offset of the allocation in the mapping.
- */
- __u32 offset;
-
- /**
- * Magic handle used to release memory.
- *
- * See also DRM_XGI_FREE ioctl.
- */
- __u32 index;
-};
-
-enum xgi_batch_type {
- BTYPE_2D = 0,
- BTYPE_3D = 1,
- BTYPE_FLIP = 2,
- BTYPE_CTRL = 3,
- BTYPE_NONE = 0x7fffffff
-};
-
-struct xgi_cmd_info {
- __u32 type;
- __u32 hw_addr;
- __u32 size;
- __u32 id;
-};
-
-struct xgi_state_info {
- unsigned int _fromState;
- unsigned int _toState;
-};
-
-
-/*
- * Ioctl definitions
- */
-
-#define DRM_XGI_BOOTSTRAP 0
-#define DRM_XGI_ALLOC 1
-#define DRM_XGI_FREE 2
-#define DRM_XGI_SUBMIT_CMDLIST 3
-#define DRM_XGI_STATE_CHANGE 4
-#define DRM_XGI_SET_FENCE 5
-#define DRM_XGI_WAIT_FENCE 6
-
-#define XGI_IOCTL_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_BOOTSTRAP, struct xgi_bootstrap)
-#define XGI_IOCTL_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_ALLOC, struct xgi_mem_alloc)
-#define XGI_IOCTL_FREE DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_FREE, __u32)
-#define XGI_IOCTL_SUBMIT_CMDLIST DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_SUBMIT_CMDLIST, struct xgi_cmd_info)
-#define XGI_IOCTL_STATE_CHANGE DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_STATE_CHANGE, struct xgi_state_info)
-#define XGI_IOCTL_SET_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_SET_FENCE, u32)
-#define XGI_IOCTL_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_WAIT_FENCE, u32)
-
-#endif /* _XGI_DRM_H_ */
projects / profile / ivi / libdrm.git / commitdiff