staging: comedi: drivers: re-do PLX PCI 9080 INTCSR register values

Replace the existing macros in "plx9080.h" that define values for the
INTCSR register.  Use the prefix `PLX_INTCSR_` for the macros.  Make use
of the `BIT(x)` and `GENMASK(h,l)` macros to define the values.

Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/comedi/drivers/cb_pcidas64.c b/drivers/staging/comedi/drivers/cb_pcidas64.c
index 4a8e88a..6b3f4dc 100644 (file)
--- a/drivers/staging/comedi/drivers/cb_pcidas64.c
+++ b/drivers/staging/comedi/drivers/cb_pcidas64.c
@@ -1336,8 +1336,9 @@ static void init_plx9080(struct comedi_device *dev)
 
        /*  enable interrupts on plx 9080 */
        devpriv->plx_intcsr_bits |=
-           ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE |
-           ICS_DMA0_E | ICS_DMA1_E;
+           PLX_INTCSR_LSEABORTEN | PLX_INTCSR_LSEPARITYEN | PLX_INTCSR_PIEN |
+           PLX_INTCSR_PLIEN | PLX_INTCSR_PABORTIEN | PLX_INTCSR_LIOEN |
+           PLX_INTCSR_DMA0IEN | PLX_INTCSR_DMA1IEN;
        writel(devpriv->plx_intcsr_bits,
               devpriv->plx9080_iobase + PLX_REG_INTCSR);
 }
@@ -2836,7 +2837,7 @@ static void handle_ai_interrupt(struct comedi_device *dev,
        /*  spin lock makes sure no one else changes plx dma control reg */
        spin_lock_irqsave(&dev->spinlock, flags);
        dma1_status = readb(devpriv->plx9080_iobase + PLX_REG_DMACSR1);
-       if (plx_status & ICS_DMA1_A) {  /*  dma chan 1 interrupt */
+       if (plx_status & PLX_INTCSR_DMA1IA) {   /*  dma chan 1 interrupt */
                writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
                       devpriv->plx9080_iobase + PLX_REG_DMACSR1);
 
@@ -3014,7 +3015,7 @@ static void handle_ao_interrupt(struct comedi_device *dev,
        /*  spin lock makes sure no one else changes plx dma control reg */
        spin_lock_irqsave(&dev->spinlock, flags);
        dma0_status = readb(devpriv->plx9080_iobase + PLX_REG_DMACSR0);
-       if (plx_status & ICS_DMA0_A) {  /*  dma chan 0 interrupt */
+       if (plx_status & PLX_INTCSR_DMA0IA) {   /*  dma chan 0 interrupt */
                if ((dma0_status & PLX_DMA_EN_BIT) &&
                    !(dma0_status & PLX_DMA_DONE_BIT)) {
                        writeb(PLX_DMA_EN_BIT | PLX_CLEAR_DMA_INTR_BIT,
@@ -3067,8 +3068,9 @@ static irqreturn_t handle_interrupt(int irq, void *d)
        handle_ai_interrupt(dev, status, plx_status);
        handle_ao_interrupt(dev, status, plx_status);
 
-       /*  clear possible plx9080 interrupt sources */
-       if (plx_status & ICS_LDIA) {    /*  clear local doorbell interrupt */
+       /* clear possible plx9080 interrupt sources */
+       if (plx_status & PLX_INTCSR_LDBIA) {
+               /* clear local doorbell interrupt */
                plx_bits = readl(devpriv->plx9080_iobase + PLX_REG_L2PDBELL);
                writel(plx_bits, devpriv->plx9080_iobase + PLX_REG_L2PDBELL);
        }

diff --git a/drivers/staging/comedi/drivers/gsc_hpdi.c b/drivers/staging/comedi/drivers/gsc_hpdi.c
index 536bebe..e288798 100644 (file)
--- a/drivers/staging/comedi/drivers/gsc_hpdi.c
+++ b/drivers/staging/comedi/drivers/gsc_hpdi.c
@@ -199,7 +199,8 @@ static irqreturn_t gsc_hpdi_interrupt(int irq, void *d)
                return IRQ_NONE;
 
        plx_status = readl(devpriv->plx9080_mmio + PLX_REG_INTCSR);
-       if ((plx_status & (ICS_DMA0_A | ICS_DMA1_A | ICS_LIA)) == 0)
+       if ((plx_status &
+            (PLX_INTCSR_DMA0IA | PLX_INTCSR_DMA1IA | PLX_INTCSR_PLIA)) == 0)
                return IRQ_NONE;
 
        hpdi_intr_status = readl(dev->mmio + INTERRUPT_STATUS_REG);
@@ -211,7 +212,7 @@ static irqreturn_t gsc_hpdi_interrupt(int irq, void *d)
        /* spin lock makes sure no one else changes plx dma control reg */
        spin_lock_irqsave(&dev->spinlock, flags);
        dma0_status = readb(devpriv->plx9080_mmio + PLX_REG_DMACSR0);
-       if (plx_status & ICS_DMA0_A) {
+       if (plx_status & PLX_INTCSR_DMA0IA) {
                /* dma chan 0 interrupt */
                writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
                       devpriv->plx9080_mmio + PLX_REG_DMACSR0);
@@ -224,7 +225,7 @@ static irqreturn_t gsc_hpdi_interrupt(int irq, void *d)
        /* spin lock makes sure no one else changes plx dma control reg */
        spin_lock_irqsave(&dev->spinlock, flags);
        dma1_status = readb(devpriv->plx9080_mmio + PLX_REG_DMACSR1);
-       if (plx_status & ICS_DMA1_A) {
+       if (plx_status & PLX_INTCSR_DMA1IA) {
                /* XXX */ /* dma chan 1 interrupt */
                writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
                       devpriv->plx9080_mmio + PLX_REG_DMACSR1);
@@ -232,7 +233,7 @@ static irqreturn_t gsc_hpdi_interrupt(int irq, void *d)
        spin_unlock_irqrestore(&dev->spinlock, flags);
 
        /* clear possible plx9080 interrupt sources */
-       if (plx_status & ICS_LDIA) {
+       if (plx_status & PLX_INTCSR_LDBIA) {
                /* clear local doorbell interrupt */
                plx_bits = readl(devpriv->plx9080_mmio + PLX_REG_L2PDBELL);
                writel(plx_bits, devpriv->plx9080_mmio + PLX_REG_L2PDBELL);
@@ -533,8 +534,9 @@ static int gsc_hpdi_init(struct comedi_device *dev)
 
        /* enable interrupts */
        plx_intcsr_bits =
-           ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE |
-           ICS_DMA0_E;
+           PLX_INTCSR_LSEABORTEN | PLX_INTCSR_LSEPARITYEN | PLX_INTCSR_PIEN |
+           PLX_INTCSR_PLIEN | PLX_INTCSR_PABORTIEN | PLX_INTCSR_LIOEN |
+           PLX_INTCSR_DMA0IEN;
        writel(plx_intcsr_bits, devpriv->plx9080_mmio + PLX_REG_INTCSR);
 
        return 0;

diff --git a/drivers/staging/comedi/drivers/plx9080.h b/drivers/staging/comedi/drivers/plx9080.h
index e544327..e9f1b9c 100644 (file)
--- a/drivers/staging/comedi/drivers/plx9080.h
+++ b/drivers/staging/comedi/drivers/plx9080.h
@@ -321,32 +321,71 @@ struct plx_dma_desc {
 /* Interrupt Control/Status Register */
 #define PLX_REG_INTCSR         0x0068
 
-#define  ICS_AERR          0x00000001  /* Assert LSERR on ABORT */
-#define  ICS_PERR          0x00000002  /* Assert LSERR on Parity Error */
-#define  ICS_SERR          0x00000004  /* Generate PCI SERR# */
-#define  ICS_MBIE          0x00000008  /*  mailbox interrupt enable */
-#define  ICS_PIE           0x00000100  /* PCI Interrupt Enable */
-#define  ICS_PDIE          0x00000200  /* PCI Doorbell Interrupt Enable */
-#define  ICS_PAIE          0x00000400  /* PCI Abort Interrupt Enable */
-#define  ICS_PLIE          0x00000800  /* PCI Local Int Enable */
-#define  ICS_RAE           0x00001000  /* Retry Abort Enable */
-#define  ICS_PDIA          0x00002000  /* PCI Doorbell Interrupt Active */
-#define  ICS_PAIA          0x00004000  /* PCI Abort Interrupt Active */
-#define  ICS_LIA           0x00008000  /* Local Interrupt Active */
-#define  ICS_LIE           0x00010000  /* Local Interrupt Enable */
-#define  ICS_LDIE          0x00020000  /* Local Doorbell Int Enable */
-#define  ICS_DMA0_E        0x00040000  /* DMA #0 Interrupt Enable */
-#define  ICS_DMA1_E        0x00080000  /* DMA #1 Interrupt Enable */
-#define  ICS_LDIA          0x00100000  /* Local Doorbell Int Active */
-#define  ICS_DMA0_A        0x00200000  /* DMA #0 Interrupt Active */
-#define  ICS_DMA1_A        0x00400000  /* DMA #1 Interrupt Active */
-#define  ICS_BIA           0x00800000  /* BIST Interrupt Active */
-#define  ICS_TA_DM         0x01000000  /* Target Abort - Direct Master */
-#define  ICS_TA_DMA0       0x02000000  /* Target Abort - DMA #0 */
-#define  ICS_TA_DMA1       0x04000000  /* Target Abort - DMA #1 */
-#define  ICS_TA_RA         0x08000000  /* Target Abort - Retry Timeout */
-/*  mailbox x is active */
-#define  ICS_MBIA(x)       (0x10000000 << ((x) & 0x3))
+/* Enable Local Bus LSERR# when PCI Bus Target Abort or Master Abort occurs */
+#define PLX_INTCSR_LSEABORTEN  BIT(0)
+/* Enable Local Bus LSERR# when PCI parity error occurs */
+#define PLX_INTCSR_LSEPARITYEN BIT(1)
+/* Generate PCI Bus SERR# when set to 1 */
+#define PLX_INTCSR_GENSERR     BIT(2)
+/* Mailbox Interrupt Enable (local bus interrupts on PCI write to MBOX0-3) */
+#define PLX_INTCSR_MBIEN       BIT(3)
+/* PCI Interrupt Enable */
+#define PLX_INTCSR_PIEN                BIT(8)
+/* PCI Doorbell Interrupt Enable */
+#define PLX_INTCSR_PDBIEN      BIT(9)
+/* PCI Abort Interrupt Enable */
+#define PLX_INTCSR_PABORTIEN   BIT(10)
+/* PCI Local Interrupt Enable */
+#define PLX_INTCSR_PLIEN       BIT(11)
+/* Retry Abort Enable (for diagnostic purposes only) */
+#define PLX_INTCSR_RAEN                BIT(12)
+/* PCI Doorbell Interrupt Active (read-only) */
+#define PLX_INTCSR_PDBIA       BIT(13)
+/* PCI Abort Interrupt Active (read-only) */
+#define PLX_INTCSR_PABORTIA    BIT(14)
+/* Local Interrupt (LINTi#) Active (read-only) */
+#define PLX_INTCSR_PLIA                BIT(15)
+/* Local Interrupt Output (LINTo#) Enable */
+#define PLX_INTCSR_LIOEN       BIT(16)
+/* Local Doorbell Interrupt Enable */
+#define PLX_INTCSR_LDBIEN      BIT(17)
+/* DMA Channel 0 Interrupt Enable */
+#define PLX_INTCSR_DMA0IEN     BIT(18)
+/* DMA Channel 1 Interrupt Enable */
+#define PLX_INTCSR_DMA1IEN     BIT(19)
+/* DMA Channel N Interrupt Enable (N <= 1) */
+#define PLX_INTCSR_DMAIEN(n)   ((n) ? PLX_INTCSR_DMA1IEN : PLX_INTCSR_DMA0IEN)
+/* Local Doorbell Interrupt Active (read-only) */
+#define PLX_INTCSR_LDBIA       BIT(20)
+/* DMA Channel 0 Interrupt Active (read-only) */
+#define PLX_INTCSR_DMA0IA      BIT(21)
+/* DMA Channel 1 Interrupt Active (read-only) */
+#define PLX_INTCSR_DMA1IA      BIT(22)
+/* DMA Channel N Interrupt Active (N <= 1) (read-only) */
+#define PLX_INTCSR_DMAIA(n)    ((n) ? PLX_INTCSR_DMA1IA : PLX_INTCSR_DMA0IA)
+/* BIST Interrupt Active (read-only) */
+#define PLX_INTCSR_BISTIA      BIT(23)
+/* Direct Master Not Bus Master During Master Or Target Abort (read-only) */
+#define PLX_INTCSR_ABNOTDM     BIT(24)
+/* DMA Channel 0 Not Bus Master During Master Or Target Abort (read-only) */
+#define PLX_INTCSR_ABNOTDMA0   BIT(25)
+/* DMA Channel 1 Not Bus Master During Master Or Target Abort (read-only) */
+#define PLX_INTCSR_ABNOTDMA1   BIT(26)
+/* DMA Channel N Not Bus Master During Master Or Target Abort (read-only) */
+#define PLX_INTCSR_ABNOTDMA(n) ((n) ? PLX_INTCSR_ABNOTDMA1 \
+                                    : PLX_INTCSR_ABNOTDMA0)
+/* Target Abort Not Generated After 256 Master Retries (read-only) */
+#define PLX_INTCSR_ABNOTRETRY  BIT(27)
+/* PCI Wrote Mailbox 0 (enabled if bit 3 set) (read-only) */
+#define PLX_INTCSR_MB0IA       BIT(28)
+/* PCI Wrote Mailbox 1 (enabled if bit 3 set) (read-only) */
+#define PLX_INTCSR_MB1IA       BIT(29)
+/* PCI Wrote Mailbox 2 (enabled if bit 3 set) (read-only) */
+#define PLX_INTCSR_MB2IA       BIT(30)
+/* PCI Wrote Mailbox 3 (enabled if bit 3 set) (read-only) */
+#define PLX_INTCSR_MB3IA       BIT(31)
+/* PCI Wrote Mailbox N (N <= 3) (enabled if bit 3 set) (read-only) */
+#define PLX_INTCSR_MBIA(n)     BIT(28 + (n))
 
 /*
  * Serial EEPROM Control, PCI Command Codes, User I/O Control,

diff --git a/drivers/staging/comedi/drivers/rtd520.c b/drivers/staging/comedi/drivers/rtd520.c
index 236f6ad..e00e9c6 100644 (file)
--- a/drivers/staging/comedi/drivers/rtd520.c
+++ b/drivers/staging/comedi/drivers/rtd520.c
@@ -1316,7 +1316,8 @@ static int rtd_auto_attach(struct comedi_device *dev,
        devpriv->fifosz = ret;
 
        if (dev->irq)
-               writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + PLX_REG_INTCSR);
+               writel(PLX_INTCSR_PIEN | PLX_INTCSR_PLIEN,
+                      devpriv->lcfg + PLX_REG_INTCSR);
 
        return 0;
 }