RDMA/mlx5: Add sw_owner_v2 bit capability
authorAlex Vesker <valex@nvidia.com>
Mon, 31 Aug 2020 07:01:48 +0000 (10:01 +0300)
committerLeon Romanovsky <leonro@nvidia.com>
Thu, 17 Sep 2020 18:12:28 +0000 (21:12 +0300)
Added sw_owner_v2 which will be enabled for future devices,
replacing sw_owner bit.

Signed-off-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
include/linux/mlx5/mlx5_ifc.h

index de1ffb4..3061cee 100644 (file)
@@ -420,7 +420,8 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
        u8         reserved_at_1a[0x2];
        u8         ipsec_encrypt[0x1];
        u8         ipsec_decrypt[0x1];
-       u8         reserved_at_1e[0x2];
+       u8         sw_owner_v2[0x1];
+       u8         reserved_at_1f[0x1];
 
        u8         termination_table_raw_traffic[0x1];
        u8         reserved_at_21[0x1];