--- /dev/null
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/starfive,jh7110-sdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 SDIO Device Tree Bindings
+
+description: |
+ Bindings for the JH7110 RISC-V SoC from StarFive Ltd.
+
+maintainers:
+ - William Qiu <william,qiu@starfivetech.com>
+
+properties:
+ compatible:
+ const: starfive,jh7110-sdio
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ -description: biu clock
+ -description: ciu clock
+
+ clock-names:
+ minItems: 1
+ items:
+ -const: biu
+ -const: ciu
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ maxItems: 1
+ -const: reset
+
+ interrupts:
+ maxItems: 1
+
+ fifo-depth:
+ maxItems: 1
+
+ data-addr:
+ maxItem: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - interrupts
+ - fifo-depth
+ - data-addr
+
+examples:
+ - |
+ sdio0: sdio0@16010000 {
+ compatible = "starfive,jh7110-sdio";
+ reg = <0x0 0x16010000 0x0 0x10000>;
+ clocks = <&clkgen JH7110_SDIO0_CLK_AHB>,
+ <&clkgen JH7110_SDIO0_CLK_SDCARD>;
+ clock-names = "biu","ciu";
+ resets = <&rstgen RSTN_U0_DW_SDIO_AHB>;
+ reset-names = "reset";
+ interrupts = <74>;
+ fifo-depth = <32>;
+ fifo-watermark-aligned;
+ data-addr = <0>;
+ starfive,sys-syscon = <&sys_syscon 0x14 0x1a 0x7c000000>;
+ status = "disabled";
+ };
S: Maintained
F: Documentation/devicetree/bindings/pinctrl/starfive,jh7110-pinctrl.yaml
+STARFIVE JH7110 SDIO
+M: William Qiu <william.qiu@starfivetech.com>
+S: Maintained
+F: Documentation/devicetree/bindings/mmc/starfive,jh7110-sdio.yaml