/* Simulator instruction extractor for m32r.
-This file is machine generated.
+Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
-Copyright (C) 1996, 1997 Free Software Foundation, Inc.
-
-This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+This file is part of the GNU Simulators.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
*/
+#define WANT_CPU
+#define WANT_CPU_M32R
+
#include "sim-main.h"
-#include "decode.h"
#include "cpu-sim.h"
void
-EX_FN_NAME (add) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_0_add) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_0_add.f
+ EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_0_ADD_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "add", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_0_add", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (add3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_1_add3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_1.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_1_add3.f
+ EXTRACT_FMT_1_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_1_ADD3_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "add3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_1_add3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (and) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_2_and3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_2_and3.f
+ EXTRACT_FMT_2_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+
+ EXTRACT_FMT_2_AND3_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "and", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_2_and3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ abuf->h_gr_get = 0 | (1 << f_r2);
abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
}
void
-EX_FN_NAME (and3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_3_or3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_2.f
- /* Instruction fields. */
- int f_uimm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_uimm16 = EXTRACT_UNSIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_3_or3.f
+ EXTRACT_FMT_3_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+
+ EXTRACT_FMT_3_OR3_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_uimm16) = f_uimm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "and3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_3_or3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "ulo16 0x%x", 'x', f_uimm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (or) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_4_addi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_4_addi.f
+ EXTRACT_FMT_4_ADDI_VARS /* f-op1 f-r1 f-simm8 */
+
+ EXTRACT_FMT_4_ADDI_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "or", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_simm8) = f_simm8;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_4_addi", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ abuf->h_gr_get = 0 | (1 << f_r1);
abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
}
void
-EX_FN_NAME (or3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_5_addv3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_3.f
- /* Instruction fields. */
- int f_uimm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_uimm16 = EXTRACT_UNSIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_5_addv3.f
+ EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_5_ADDV3_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_uimm16) = f_uimm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "or3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "ulo16 0x%x", 'x', f_uimm16, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_5_addv3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (xor) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_6_addx) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_6_addx.f
+ EXTRACT_FMT_6_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_6_ADDX_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "xor", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_6_addx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (xor3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_7_bc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_2.f
- /* Instruction fields. */
- int f_uimm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_uimm16 = EXTRACT_UNSIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_7_bc8.f
+ EXTRACT_FMT_7_BC8_VARS /* f-op1 f-r1 f-disp8 */
+
+ EXTRACT_FMT_7_BC8_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_uimm16) = f_uimm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "xor3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+ RECORD_IADDR (FLD (f_disp8), (pc & -4L) + f_disp8);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_7_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
abuf->length = length;
abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
#undef FLD
}
void
-EX_FN_NAME (addi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_8_bc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_4.f
- /* Instruction fields. */
- int f_simm8;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_simm8 = EXTRACT_SIGNED (insn, 16, 8, 8);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_8_bc24.f
+ EXTRACT_FMT_8_BC24_VARS /* f-op1 f-r1 f-disp24 */
+
+ EXTRACT_FMT_8_BC24_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_simm8) = f_simm8;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "addi", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
+ RECORD_IADDR (FLD (f_disp24), pc + f_disp24);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_8_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
abuf->length = length;
abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
#undef FLD
}
void
-EX_FN_NAME (addv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_9_beq) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_9_beq.f
+ EXTRACT_FMT_9_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+
+ EXTRACT_FMT_9_BEQ_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "addv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_9_beq", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
if (PROFILE_MODEL_P (current_cpu))
{
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (addv3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_10_beqz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_5.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_10_beqz.f
+ EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+
+ EXTRACT_FMT_10_BEQZ_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "addv3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_10_beqz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
if (PROFILE_MODEL_P (current_cpu))
{
abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (addx) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_11_bl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "addx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
+#define FLD(f) abuf->fields.fmt_11_bl8.f
+ EXTRACT_FMT_11_BL8_VARS /* f-op1 f-r1 f-disp8 */
-void
-EX_FN_NAME (bc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_6.f
- /* Instruction fields. */
- int f_disp8;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_disp8 = EXTRACT_SIGNED (insn, 16, 8, 8) << 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+ EXTRACT_FMT_11_BL8_CODE
/* Record the fields for the semantic handler. */
RECORD_IADDR (FLD (f_disp8), (pc & -4L) + f_disp8);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_11_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (bc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_12_bl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_7.f
- /* Instruction fields. */
- int f_disp24;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp24 = EXTRACT_SIGNED (insn, 32, 8, 24) << 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_12_bl24.f
+ EXTRACT_FMT_12_BL24_VARS /* f-op1 f-r1 f-disp24 */
+
+ EXTRACT_FMT_12_BL24_CODE
/* Record the fields for the semantic handler. */
RECORD_IADDR (FLD (f_disp24), pc + f_disp24);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_12_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (beq) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_13_bra8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_8.f
- /* Instruction fields. */
- int f_disp16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp16 = EXTRACT_SIGNED (insn, 32, 16, 16) << 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_13_bra8.f
+ EXTRACT_FMT_13_BRA8_VARS /* f-op1 f-r1 f-disp8 */
+
+ EXTRACT_FMT_13_BRA8_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "beq", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ RECORD_IADDR (FLD (f_disp8), (pc & -4L) + f_disp8);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_13_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
abuf->length = length;
abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
#undef FLD
}
void
-EX_FN_NAME (beqz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_14_bra24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_9.f
- /* Instruction fields. */
- int f_disp16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp16 = EXTRACT_SIGNED (insn, 32, 16, 16) << 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_14_bra24.f
+ EXTRACT_FMT_14_BRA24_VARS /* f-op1 f-r1 f-disp24 */
+
+ EXTRACT_FMT_14_BRA24_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "beqz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ RECORD_IADDR (FLD (f_disp24), pc + f_disp24);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_14_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
abuf->length = length;
abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- }
-#endif
#undef FLD
}
void
-EX_FN_NAME (bgez) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_15_cmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_9.f
- /* Instruction fields. */
- int f_disp16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp16 = EXTRACT_SIGNED (insn, 32, 16, 16) << 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_15_cmp.f
+ EXTRACT_FMT_15_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_15_CMP_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bgez", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_15_cmp", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (bgtz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_16_cmpi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_9.f
- /* Instruction fields. */
- int f_disp16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp16 = EXTRACT_SIGNED (insn, 32, 16, 16) << 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_16_cmpi.f
+ EXTRACT_FMT_16_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_16_CMPI_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bgtz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_16_cmpi", "src2 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (blez) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_17_cmpui) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_9.f
- /* Instruction fields. */
- int f_disp16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp16 = EXTRACT_SIGNED (insn, 32, 16, 16) << 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_17_cmpui.f
+ EXTRACT_FMT_17_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+
+ EXTRACT_FMT_17_CMPUI_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "blez", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_17_cmpui", "src2 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (bltz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_18_div) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_9.f
- /* Instruction fields. */
- int f_disp16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp16 = EXTRACT_SIGNED (insn, 32, 16, 16) << 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_18_div.f
+ EXTRACT_FMT_18_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_18_DIV_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bltz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_18_div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (bnez) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_19_jl) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_9.f
- /* Instruction fields. */
- int f_disp16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp16 = EXTRACT_SIGNED (insn, 32, 16, 16) << 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_19_jl.f
+ EXTRACT_FMT_19_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_19_JL_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bnez", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_19_jl", "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (bl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_20_jmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_6.f
- /* Instruction fields. */
- int f_disp8;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_disp8 = EXTRACT_SIGNED (insn, 16, 8, 8) << 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_20_jmp.f
+ EXTRACT_FMT_20_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_20_JMP_CODE
/* Record the fields for the semantic handler. */
- RECORD_IADDR (FLD (f_disp8), (pc & -4L) + f_disp8);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_20_jmp", "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << 14);
+ abuf->h_gr_get = 0 | (1 << f_r2);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (bl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_21_ld) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_7.f
- /* Instruction fields. */
- int f_disp24;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp24 = EXTRACT_SIGNED (insn, 32, 8, 24) << 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_21_ld.f
+ EXTRACT_FMT_21_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_21_LD_CODE
/* Record the fields for the semantic handler. */
- RECORD_IADDR (FLD (f_disp24), pc + f_disp24);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_21_ld", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << 14);
+ abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (bnc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_6.f
- /* Instruction fields. */
- int f_disp8;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_disp8 = EXTRACT_SIGNED (insn, 16, 8, 8) << 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- RECORD_IADDR (FLD (f_disp8), (pc & -4L) + f_disp8);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bnc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-#undef FLD
-}
-
-void
-EX_FN_NAME (bnc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_22_ld_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_7.f
- /* Instruction fields. */
- int f_disp24;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp24 = EXTRACT_SIGNED (insn, 32, 8, 24) << 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- RECORD_IADDR (FLD (f_disp24), pc + f_disp24);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bnc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-#undef FLD
-}
+#define FLD(f) abuf->fields.fmt_22_ld_d.f
+ EXTRACT_FMT_22_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
-void
-EX_FN_NAME (bne) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_8.f
- /* Instruction fields. */
- int f_disp16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp16 = EXTRACT_SIGNED (insn, 32, 16, 16) << 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+ EXTRACT_FMT_22_LD_D_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bne", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_22_ld_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (bra8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_6.f
- /* Instruction fields. */
- int f_disp8;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_disp8 = EXTRACT_SIGNED (insn, 16, 8, 8) << 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- RECORD_IADDR (FLD (f_disp8), (pc & -4L) + f_disp8);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-#undef FLD
-}
-
-void
-EX_FN_NAME (bra24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_23_ldb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_7.f
- /* Instruction fields. */
- int f_disp24;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_disp24 = EXTRACT_SIGNED (insn, 32, 8, 24) << 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- RECORD_IADDR (FLD (f_disp24), pc + f_disp24);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-#undef FLD
-}
+#define FLD(f) abuf->fields.fmt_23_ldb.f
+ EXTRACT_FMT_23_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
-void
-EX_FN_NAME (cmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+ EXTRACT_FMT_23_LDB_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "cmp", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_23_ldb", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (cmpi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_24_ldb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_11.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_op2;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_24_ldb_d.f
+ EXTRACT_FMT_24_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_24_LDB_D_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "cmpi", "src2 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_24_ldb_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
if (PROFILE_MODEL_P (current_cpu))
{
abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (cmpu) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_25_ldh) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_25_ldh.f
+ EXTRACT_FMT_25_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_25_LDH_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "cmpu", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_25_ldh", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (cmpui) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_26_ldh_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_12.f
- /* Instruction fields. */
- int f_uimm16;
- int f_r2;
- int f_op2;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_uimm16 = EXTRACT_UNSIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_26_ldh_d.f
+ EXTRACT_FMT_26_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_26_LDH_D_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_uimm16) = f_uimm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "cmpui", "src2 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_26_ldh_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
if (PROFILE_MODEL_P (current_cpu))
{
abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (div) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_27_ld24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_13.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_27_ld24.f
+ EXTRACT_FMT_27_LD24_VARS /* f-op1 f-r1 f-uimm24 */
+
+ EXTRACT_FMT_27_LD24_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_uimm24) = f_uimm24;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_27_ld24", "dr 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
}
void
-EX_FN_NAME (divu) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_28_ldi8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_13.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_28_ldi8.f
+ EXTRACT_FMT_28_LDI8_VARS /* f-op1 f-r1 f-simm8 */
+
+ EXTRACT_FMT_28_LDI8_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "divu", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_simm8) = f_simm8;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_28_ldi8", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
}
void
-EX_FN_NAME (rem) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_29_ldi16) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_13.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_29_ldi16.f
+ EXTRACT_FMT_29_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_29_LDI16_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "rem", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_29_ldi16", "dr 0x%x", 'x', f_r1, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
}
void
-EX_FN_NAME (remu) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_30_machi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_13.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_30_machi.f
+ EXTRACT_FMT_30_MACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_30_MACHI_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "remu", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_30_machi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
if (PROFILE_MODEL_P (current_cpu))
{
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (jl) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_31_mv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_14.f
- /* Instruction fields. */
- int f_r2;
- int f_op2;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_31_mv.f
+ EXTRACT_FMT_31_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_31_MV_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "jl", "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_31_mv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
if (PROFILE_MODEL_P (current_cpu))
{
abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << 14);
+ abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (jmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_32_mvfachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_14.f
- /* Instruction fields. */
- int f_r2;
- int f_op2;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_32_mvfachi.f
+ EXTRACT_FMT_32_MVFACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_32_MVFACHI_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "jmp", "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_32_mvfachi", "dr 0x%x", 'x', f_r1, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (ld) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_33_mvfc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_33_mvfc.f
+ EXTRACT_FMT_33_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_33_MVFC_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ld", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = f_r2;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_33_mvfc", "dr 0x%x", 'x', f_r1, "scr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
}
void
-EX_FN_NAME (ld_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_34_mvtachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_1.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_34_mvtachi.f
+ EXTRACT_FMT_34_MVTACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_34_MVTACHI_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ld_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_34_mvtachi", "src1 0x%x", 'x', f_r1, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ abuf->h_gr_get = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (ldb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_35_mvtc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_35_mvtc.f
+ EXTRACT_FMT_35_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_35_MVTC_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ldb", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = f_r1;
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_35_mvtc", "dcr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
if (PROFILE_MODEL_P (current_cpu))
{
abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (ldb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_36_nop) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_1.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_36_nop.f
+ EXTRACT_FMT_36_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_36_NOP_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ldb_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_36_nop", (char *) 0));
abuf->length = length;
abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
#undef FLD
}
void
-EX_FN_NAME (ldh) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_37_rac) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_37_rac.f
+ EXTRACT_FMT_37_RAC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_37_RAC_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ldh", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_37_rac", (char *) 0));
abuf->length = length;
abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
#undef FLD
}
void
-EX_FN_NAME (ldh_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_38_seth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_1.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_38_seth.f
+ EXTRACT_FMT_38_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
+
+ EXTRACT_FMT_38_SETH_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ldh_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_hi16) = f_hi16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_38_seth", "dr 0x%x", 'x', f_r1, "hi16 0x%x", 'x', f_hi16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
}
void
-EX_FN_NAME (ldub) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_39_slli) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_39_slli.f
+ EXTRACT_FMT_39_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+
+ EXTRACT_FMT_39_SLLI_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ldub", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_uimm5) = f_uimm5;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_39_slli", "dr 0x%x", 'x', f_r1, "uimm5 0x%x", 'x', f_uimm5, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_get = 0 | (1 << f_r1);
abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
}
void
-EX_FN_NAME (ldub_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_40_st_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_1.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
+#define FLD(f) abuf->fields.fmt_40_st_d.f
+ EXTRACT_FMT_40_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_40_ST_D_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ldub_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_40_st_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
}
#endif
#undef FLD
}
void
-EX_FN_NAME (lduh) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_41_trap) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
+#define FLD(f) abuf->fields.fmt_41_trap.f
+ EXTRACT_FMT_41_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
+
+ EXTRACT_FMT_41_TRAP_CODE
/* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "lduh", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ FLD (f_uimm4) = f_uimm4;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_41_trap", "uimm4 0x%x", 'x', f_uimm4, (char *) 0));
abuf->length = length;
abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
#undef FLD
}
void
-EX_FN_NAME (lduh_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,illegal) (SIM_CPU *cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_1.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "lduh_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
-
- abuf->length = length;
+ abuf->length = CGEN_BASE_INSN_SIZE;
abuf->addr = pc;
+ /* Leave signalling to semantic fn. */
+}
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (ld_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_op2;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ld_plus", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (ld24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_15.f
- /* Instruction fields. */
- int f_uimm24;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_uimm24 = EXTRACT_UNSIGNED (insn, 32, 8, 24);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_uimm24) = f_uimm24;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ld24", "dr 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (ldi8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_4.f
- /* Instruction fields. */
- int f_simm8;
- int f_r1;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_simm8 = EXTRACT_SIGNED (insn, 16, 8, 8);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_simm8) = f_simm8;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ldi8", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (ldi16) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_16.f
- /* Instruction fields. */
- int f_simm16;
- int f_r1;
- int f_r2;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "ldi16", "dr 0x%x", 'x', f_r1, "slo16 0x%x", 'x', f_simm16, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (lock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "lock", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (machi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "machi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (maclo) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "maclo", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (macwhi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "macwhi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (macwlo) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "macwlo", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mul) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mul", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mulhi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mulhi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mullo) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mullo", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mulwhi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mulwhi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mulwlo) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mulwlo", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mvfachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_17.f
- /* Instruction fields. */
- int f_r1;
- int f_r2;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mvfachi", "dr 0x%x", 'x', f_r1, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mvfaclo) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_17.f
- /* Instruction fields. */
- int f_r1;
- int f_r2;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mvfaclo", "dr 0x%x", 'x', f_r1, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mvfacmi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_17.f
- /* Instruction fields. */
- int f_r1;
- int f_r2;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mvfacmi", "dr 0x%x", 'x', f_r1, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mvfc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_18.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = f_r2;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mvfc", "dr 0x%x", 'x', f_r1, "scr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mvtachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_19.f
- /* Instruction fields. */
- int f_r1;
- int f_r2;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mvtachi", "src1 0x%x", 'x', f_r1, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mvtaclo) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_19.f
- /* Instruction fields. */
- int f_r1;
- int f_r2;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mvtaclo", "src1 0x%x", 'x', f_r1, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (mvtc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_20.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "mvtc", "dcr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (neg) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "neg", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (nop) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_21.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "nop", (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-#undef FLD
-}
-
-void
-EX_FN_NAME (not) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "not", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (rac) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_21.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "rac", (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-#undef FLD
-}
-
-void
-EX_FN_NAME (rach) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_21.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "rach", (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-#undef FLD
-}
-
-void
-EX_FN_NAME (rte) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_21.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "rte", (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-#undef FLD
-}
-
-void
-EX_FN_NAME (seth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_22.f
- /* Instruction fields. */
- int f_hi16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_hi16 = EXTRACT_UNSIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_hi16) = f_hi16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "seth", "dr 0x%x", 'x', f_r1, "hi16 0x%x", 'x', f_hi16, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (sll) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "sll", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (sll3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_5.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "sll3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (slli) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_23.f
- /* Instruction fields. */
- int f_uimm5;
- int f_r1;
- int f_shift_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_uimm5 = EXTRACT_UNSIGNED (insn, 16, 11, 5);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_shift_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 3);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_uimm5) = f_uimm5;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "slli", "dr 0x%x", 'x', f_r1, "uimm5 0x%x", 'x', f_uimm5, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (sra) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "sra", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (sra3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_5.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "sra3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (srai) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_23.f
- /* Instruction fields. */
- int f_uimm5;
- int f_r1;
- int f_shift_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_uimm5 = EXTRACT_UNSIGNED (insn, 16, 11, 5);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_shift_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 3);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_uimm5) = f_uimm5;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "srai", "dr 0x%x", 'x', f_r1, "uimm5 0x%x", 'x', f_uimm5, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (srl) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "srl", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (srl3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_5.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "srl3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (srli) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_23.f
- /* Instruction fields. */
- int f_uimm5;
- int f_r1;
- int f_shift_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_uimm5 = EXTRACT_UNSIGNED (insn, 16, 11, 5);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_shift_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 3);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_uimm5) = f_uimm5;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "srli", "dr 0x%x", 'x', f_r1, "uimm5 0x%x", 'x', f_uimm5, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (st) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "st", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (st_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_24.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "st_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (stb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "stb", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (stb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_24.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "stb_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (sth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "sth", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (sth_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_24.f
- /* Instruction fields. */
- int f_simm16;
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 4;
- f_simm16 = EXTRACT_SIGNED (insn, 32, 16, 16);
- f_r2 = EXTRACT_UNSIGNED (insn, 32, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 32, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 32, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 32, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "sth_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (st_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "st_plus", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (st_minus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "st_minus", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r2);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (sub) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "sub", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (subv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "subv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
-void
-EX_FN_NAME (subx) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_0.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "subx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
- }
-#endif
-#undef FLD
-}
-
+#if 0 /*wip*/
void
-EX_FN_NAME (trap) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EXC_FN_NAME (m32r,illegal) (SIM_CPU *cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_25.f
- /* Instruction fields. */
- int f_uimm4;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_uimm4 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_uimm4) = f_uimm4;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "trap", "uimm4 0x%x", 'x', f_uimm4, (char *) 0));
-
- abuf->length = length;
+ abuf->length = CGEN_BASE_INSN_SIZE;
abuf->addr = pc;
-#undef FLD
+ /* Leave signalling to semantic fn. */
}
-
-void
-EX_FN_NAME (unlock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
-#define FLD(f) abuf->fields.fmt_10.f
- /* Instruction fields. */
- int f_r2;
- int f_r1;
- int f_op2;
- int f_op1;
- /* The length of the insn may be fixed or variable. */
- int length;
-
- /* Extract the fields of the insn, computing the length as we go. */
- length = 2;
- f_r2 = EXTRACT_UNSIGNED (insn, 16, 12, 4);
- f_r1 = EXTRACT_UNSIGNED (insn, 16, 4, 4);
- f_op2 = EXTRACT_UNSIGNED (insn, 16, 8, 4);
- f_op1 = EXTRACT_UNSIGNED (insn, 16, 0, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = & CPU (h_gr[f_r1]);
- FLD (f_r2) = & CPU (h_gr[f_r2]);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "unlock", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
- abuf->length = length;
- abuf->addr = pc;
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- }
#endif
-#undef FLD
-}
-
--- /dev/null
+/* Simulator model support for m32r.
+
+Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of the GNU Simulators.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+*/
+
+#define WANT_CPU
+#define WANT_CPU_M32R
+
+#include "sim-main.h"
+#include "cpu-sim.h"
+#include "cpu-opc.h"
+
+/* The profiling data is recorded here, but is accessed via the profiling
+ mechanism. After all, this is information for profiling. */
+
+#if WITH_PROFILE_MODEL_P
+
+/* Track function unit usage for an instruction. */
+
+void
+model_profile_insn (SIM_CPU *current_cpu, ARGBUF *abuf)
+{
+ const MODEL *model = CPU_MODEL (current_cpu);
+ const INSN_TIMING *timing = MODEL_TIMING (model);
+ const CGEN_INSN *insn = abuf->opcode;
+ const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
+ const UNIT *unit_end = unit + MAX_UNITS;
+ PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
+
+ do
+ {
+ switch (unit->name)
+ {
+ case UNIT_M32R_D_U_STORE :
+ PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
+ m32r_model_mark_unbusy_reg (current_cpu, abuf);
+ break;
+ case UNIT_M32R_D_U_LOAD :
+ PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
+ m32r_model_mark_busy_reg (current_cpu, abuf);
+ break;
+ case UNIT_M32R_D_U_EXEC :
+ PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
+ m32r_model_mark_unbusy_reg (current_cpu, abuf);
+ break;
+ case UNIT_TEST_U_EXEC :
+ PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
+ break;
+ }
+ ++unit;
+ }
+ while (unit != unit_end && unit->name != UNIT_NONE);
+}
+
+/* Track function unit usage for an instruction. */
+
+void
+model_profile_cti_insn (SIM_CPU *current_cpu, ARGBUF *abuf, int taken_p)
+{
+ const MODEL *model = CPU_MODEL (current_cpu);
+ const INSN_TIMING *timing = MODEL_TIMING (model);
+ const CGEN_INSN *insn = abuf->opcode;
+ const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
+ const UNIT *unit_end = unit + MAX_UNITS;
+ PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
+
+ do
+ {
+ switch (unit->name)
+ {
+ case UNIT_M32R_D_U_STORE :
+ PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
+ m32r_model_mark_unbusy_reg (current_cpu, abuf);
+ break;
+ case UNIT_M32R_D_U_LOAD :
+ PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
+ m32r_model_mark_busy_reg (current_cpu, abuf);
+ break;
+ case UNIT_M32R_D_U_EXEC :
+ PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
+ if (taken_p) PROFILE_MODEL_CTI_STALL_COUNT (profile) += 2;
+ m32r_model_mark_unbusy_reg (current_cpu, abuf);
+ break;
+ case UNIT_TEST_U_EXEC :
+ PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
+ break;
+ }
+ if (taken_p)
+ PROFILE_MODEL_TAKEN_COUNT (profile) += 1;
+ else
+ PROFILE_MODEL_UNTAKEN_COUNT (profile) += 1;
+ ++unit;
+ }
+ while (unit != unit_end && unit->name != UNIT_NONE);
+}
+
+/* We assume UNIT_NONE == 0 because the tables don't always terminate
+ entries with it. */
+
+/* Model timing data for `m32r/d'. */
+
+static const INSN_TIMING m32r_d_timing[] = {
+ { { (UQI) UNIT_NONE } }, /* illegal insn */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* add */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* add3 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* and */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* and3 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* or */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* or3 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* xor */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* xor3 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addi */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addv */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addv3 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addx */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc8 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc8.s */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc24 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc24.l */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* beq */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* beqz */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bgez */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bgtz */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* blez */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bltz */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnez */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl8 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl8.s */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl24 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl24.l */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc8 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc8.s */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc24 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc24.l */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bne */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra8 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra8.s */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra24 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra24.l */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmp */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpi */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpu */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpui */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* div */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* divu */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* rem */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* remu */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* jl */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* jmp */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-d */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-d2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb-2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb-d */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb-d2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh-2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh-d */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh-d2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub-2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub-d */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub-d2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh-2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh-d */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh-d2 */
+ { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-plus */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ld24 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi8 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi8a */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi16 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi16a */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* lock */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* machi */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* maclo */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* macwhi */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* macwlo */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 3, 3 } }, /* mul */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mulhi */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mullo */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mulwhi */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mulwlo */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mv */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvfachi */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvfaclo */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvfacmi */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvfc */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvtachi */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvtaclo */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvtc */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* neg */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 0, 0 } }, /* nop */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* not */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* rac */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* rach */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* rte */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* seth */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sll */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sll3 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* slli */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sra */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sra3 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srai */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srl */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srl3 */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srli */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-2 */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-d */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-d2 */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb-2 */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb-d */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb-d2 */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth-2 */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth-d */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth-d2 */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-plus */
+ { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-minus */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sub */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* subv */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* subx */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* trap */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* unlock */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* push */
+ { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* pop */
+};
+
+/* Model timing data for `test'. */
+
+static const INSN_TIMING test_timing[] = {
+ { { (UQI) UNIT_NONE } }, /* illegal insn */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* add */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* add3 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* and */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* and3 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* or */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* or3 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* xor */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* xor3 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addi */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addv */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addv3 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addx */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc8 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc8.s */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc24 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc24.l */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* beq */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* beqz */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bgez */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bgtz */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* blez */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bltz */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnez */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl8 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl8.s */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl24 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl24.l */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc8 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc8.s */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc24 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc24.l */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bne */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra8 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra8.s */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra24 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra24.l */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmp */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpi */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpu */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpui */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* div */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* divu */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rem */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* remu */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* jl */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* jmp */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-d */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-d2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb-2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb-d */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb-d2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh-2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh-d */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh-d2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub-2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub-d */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub-d2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh-2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh-d */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh-d2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-plus */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld24 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi8 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi8a */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi16 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi16a */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lock */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* machi */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* maclo */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* macwhi */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* macwlo */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mul */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mulhi */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mullo */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mulwhi */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mulwlo */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mv */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvfachi */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvfaclo */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvfacmi */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvfc */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvtachi */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvtaclo */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvtc */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* neg */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* nop */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* not */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rac */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rach */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rte */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* seth */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sll */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sll3 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* slli */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sra */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sra3 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srai */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srl */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srl3 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srli */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-d */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-d2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb-2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb-d */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb-d2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth-2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth-d */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth-d2 */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-plus */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-minus */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sub */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* subv */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* subx */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* trap */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* unlock */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* push */
+ { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* pop */
+};
+
+#endif /* WITH_PROFILE_MODEL_P */
+
+#if WITH_PROFILE_MODEL_P
+#define TIMING_DATA(td) td
+#else
+#define TIMING_DATA(td) 0
+#endif
+
+const MODEL m32r_models[] = {
+ { "m32r/d", &machs[MACH_M32R], TIMING_DATA (& m32r_d_timing[0]) },
+ { "test", &machs[MACH_M32R], TIMING_DATA (& test_timing[0]) },
+ { 0 }
+};
+
+/* The properties of this cpu's implementation. */
+
+const IMP_PROPERTIES m32r_imp_properties = {
+ sizeof (SIM_CPU)
+#if WITH_SCACHE
+ , sizeof (SCACHE)
+#endif
+};
+
/* Simulator instruction semantics for m32r.
-This file is machine generated.
+Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
-Copyright (C) 1996, 1997 Free Software Foundation, Inc.
-
-This file is part of the GNU Binutils and/or GDB, the GNU debugger.
+This file is part of the GNU Simulators.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
*/
+#define WANT_CPU
+#define WANT_CPU_M32R
+
#include "sim-main.h"
-#include "mem-ops.h"
-#include "sem-ops.h"
-#include "decode.h"
+#include "cgen-mem.h"
+#include "cgen-ops.h"
#include "cpu-sim.h"
+#if ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE)
+
+#undef GET_ATTR
+#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->opcode, CGEN_INSN_##attr)
+
/* Perform add: add $dr,$sr. */
CIA
-SEM_FN_NAME (add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ADDSI (* FLD (f_r1), * FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform add3: add3 $dr,$sr,$slo16. */
CIA
-SEM_FN_NAME (add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_1.f
+#define FLD(f) abuf->fields.fmt_1_add3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ADDSI (* FLD (f_r2), FLD (f_simm16));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform and: and $dr,$sr. */
CIA
-SEM_FN_NAME (and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ANDSI (* FLD (f_r1), * FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform and3: and3 $dr,$sr,$uimm16. */
CIA
-SEM_FN_NAME (and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_2.f
+#define FLD(f) abuf->fields.fmt_2_and3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ANDSI (* FLD (f_r2), FLD (f_uimm16));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform or: or $dr,$sr. */
CIA
-SEM_FN_NAME (or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ORSI (* FLD (f_r1), * FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform or3: or3 $dr,$sr,$ulo16. */
CIA
-SEM_FN_NAME (or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_3.f
+#define FLD(f) abuf->fields.fmt_3_or3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ORSI (* FLD (f_r2), FLD (f_uimm16));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform xor: xor $dr,$sr. */
CIA
-SEM_FN_NAME (xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = XORSI (* FLD (f_r1), * FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform xor3: xor3 $dr,$sr,$uimm16. */
CIA
-SEM_FN_NAME (xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_2.f
+#define FLD(f) abuf->fields.fmt_2_and3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = XORSI (* FLD (f_r2), FLD (f_uimm16));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform addi: addi $dr,$simm8. */
CIA
-SEM_FN_NAME (addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_4.f
+#define FLD(f) abuf->fields.fmt_4_addi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ADDSI (* FLD (f_r1), FLD (f_simm8));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform addv: addv $dr,$sr. */
CIA
-SEM_FN_NAME (addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
do {
BI temp1;SI temp0;
-temp0 = ADDSI (* FLD (f_r1), * FLD (f_r2));
-temp1 = ADDOFSI (* FLD (f_r1), * FLD (f_r2), 0);
+ temp0 = ADDSI (* FLD (f_r1), * FLD (f_r2));
+ temp1 = ADDOFSI (* FLD (f_r1), * FLD (f_r2), 0);
* FLD (f_r1) = temp0;
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
-CPU (h_cond) = temp1;
- TRACE_RESULT (current_cpu, "h_cond", 'x', temp1);
+ CPU (h_cond) = temp1;
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform addv3: addv3 $dr,$sr,$simm16. */
CIA
-SEM_FN_NAME (addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_5.f
+#define FLD(f) abuf->fields.fmt_5_addv3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
do {
BI temp1;SI temp0;
-temp0 = ADDSI (* FLD (f_r2), FLD (f_simm16));
-temp1 = ADDOFSI (* FLD (f_r2), FLD (f_simm16), 0);
+ temp0 = ADDSI (* FLD (f_r2), FLD (f_simm16));
+ temp1 = ADDOFSI (* FLD (f_r2), FLD (f_simm16), 0);
* FLD (f_r1) = temp0;
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
-CPU (h_cond) = temp1;
- TRACE_RESULT (current_cpu, "h_cond", 'x', temp1);
+ CPU (h_cond) = temp1;
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform addx: addx $dr,$sr. */
CIA
-SEM_FN_NAME (addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_6_addx.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
do {
BI temp1;SI temp0;
-temp0 = ADDCSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
-temp1 = ADDCFSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
+ temp0 = ADDCSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
+ temp1 = ADDCFSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
* FLD (f_r1) = temp0;
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
-CPU (h_cond) = temp1;
- TRACE_RESULT (current_cpu, "h_cond", 'x', temp1);
+ CPU (h_cond) = temp1;
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform bc8: bc $disp8. */
CIA
-SEM_FN_NAME (bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_6.f
+#define FLD(f) abuf->fields.fmt_7_bc8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (CPU (h_cond))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (CPU (h_cond)) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
/* Perform bc24: bc $disp24. */
CIA
-SEM_FN_NAME (bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_7.f
+#define FLD(f) abuf->fields.fmt_8_bc24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (CPU (h_cond))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (CPU (h_cond)) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
/* Perform beq: beq $src1,$src2,$disp16. */
CIA
-SEM_FN_NAME (beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_8.f
+#define FLD(f) abuf->fields.fmt_9_beq.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (EQSI (* FLD (f_r1), * FLD (f_r2)))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (EQSI (* FLD (f_r1), * FLD (f_r2))) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform beqz: beqz $src2,$disp16. */
CIA
-SEM_FN_NAME (beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_9.f
+#define FLD(f) abuf->fields.fmt_10_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (EQSI (* FLD (f_r2), 0))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (EQSI (* FLD (f_r2), 0)) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform bgez: bgez $src2,$disp16. */
CIA
-SEM_FN_NAME (bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_9.f
+#define FLD(f) abuf->fields.fmt_10_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (GESI (* FLD (f_r2), 0))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (GESI (* FLD (f_r2), 0)) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform bgtz: bgtz $src2,$disp16. */
CIA
-SEM_FN_NAME (bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_9.f
+#define FLD(f) abuf->fields.fmt_10_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (GTSI (* FLD (f_r2), 0))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (GTSI (* FLD (f_r2), 0)) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform blez: blez $src2,$disp16. */
CIA
-SEM_FN_NAME (blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_9.f
+#define FLD(f) abuf->fields.fmt_10_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (LESI (* FLD (f_r2), 0))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (LESI (* FLD (f_r2), 0)) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform bltz: bltz $src2,$disp16. */
CIA
-SEM_FN_NAME (bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_9.f
+#define FLD(f) abuf->fields.fmt_10_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (LTSI (* FLD (f_r2), 0))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (LTSI (* FLD (f_r2), 0)) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform bnez: bnez $src2,$disp16. */
CIA
-SEM_FN_NAME (bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_9.f
+#define FLD(f) abuf->fields.fmt_10_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (NESI (* FLD (f_r2), 0))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (NESI (* FLD (f_r2), 0)) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform bl8: bl $disp8. */
CIA
-SEM_FN_NAME (bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_6.f
+#define FLD(f) abuf->fields.fmt_11_bl8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-{
-CPU (h_gr[14]) = ADDSI (ANDSI (CPU (pc), -4), 4);
- TRACE_RESULT (current_cpu, "h_gr[14]", 'x', ADDSI (ANDSI (CPU (pc), -4), 4));
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+do {
+ CPU (h_gr[14]) = ADDSI (ANDSI (CPU (h_pc), -4), 4);
+ TRACE_RESULT (current_cpu, "h-gr", 'x', CPU (h_gr[14]));
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
taken_p = 1;
-}
+} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform bl24: bl $disp24. */
CIA
-SEM_FN_NAME (bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_7.f
+#define FLD(f) abuf->fields.fmt_12_bl24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-{
-CPU (h_gr[14]) = ADDSI (CPU (pc), 4);
- TRACE_RESULT (current_cpu, "h_gr[14]", 'x', ADDSI (CPU (pc), 4));
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+do {
+ CPU (h_gr[14]) = ADDSI (CPU (h_pc), 4);
+ TRACE_RESULT (current_cpu, "h-gr", 'x', CPU (h_gr[14]));
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
taken_p = 1;
-}
+} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform bnc8: bnc $disp8. */
CIA
-SEM_FN_NAME (bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_6.f
+#define FLD(f) abuf->fields.fmt_7_bc8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (NOTBI (CPU (h_cond)))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (NOTBI (CPU (h_cond))) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
/* Perform bnc24: bnc $disp24. */
CIA
-SEM_FN_NAME (bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_7.f
+#define FLD(f) abuf->fields.fmt_8_bc24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (NOTBI (CPU (h_cond)))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (NOTBI (CPU (h_cond))) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
/* Perform bne: bne $src1,$src2,$disp16. */
CIA
-SEM_FN_NAME (bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_8.f
+#define FLD(f) abuf->fields.fmt_9_beq.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-if (NESI (* FLD (f_r1), * FLD (f_r2)))
-{
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+if (NESI (* FLD (f_r1), * FLD (f_r2))) {
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
taken_p = 1;
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform bra8: bra $disp8. */
CIA
-SEM_FN_NAME (bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_6.f
+#define FLD(f) abuf->fields.fmt_13_bra8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
taken_p = 1;
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
/* Perform bra24: bra $disp24. */
CIA
-SEM_FN_NAME (bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_7.f
+#define FLD(f) abuf->fields.fmt_14_bra24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
- new_pc = SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
taken_p = 1;
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
/* Perform cmp: cmp $src1,$src2. */
CIA
-SEM_FN_NAME (cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_cond) = LTSI (* FLD (f_r1), * FLD (f_r2));
- TRACE_RESULT (current_cpu, "h_cond", 'x', LTSI (* FLD (f_r1), * FLD (f_r2)));
+ CPU (h_cond) = LTSI (* FLD (f_r1), * FLD (f_r2));
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform cmpi: cmpi $src2,$simm16. */
CIA
-SEM_FN_NAME (cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_11.f
+#define FLD(f) abuf->fields.fmt_16_cmpi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_cond) = LTSI (* FLD (f_r2), FLD (f_simm16));
- TRACE_RESULT (current_cpu, "h_cond", 'x', LTSI (* FLD (f_r2), FLD (f_simm16)));
+ CPU (h_cond) = LTSI (* FLD (f_r2), FLD (f_simm16));
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform cmpu: cmpu $src1,$src2. */
CIA
-SEM_FN_NAME (cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_cond) = LTUSI (* FLD (f_r1), * FLD (f_r2));
- TRACE_RESULT (current_cpu, "h_cond", 'x', LTUSI (* FLD (f_r1), * FLD (f_r2)));
+ CPU (h_cond) = LTUSI (* FLD (f_r1), * FLD (f_r2));
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform cmpui: cmpui $src2,$uimm16. */
CIA
-SEM_FN_NAME (cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_12.f
+#define FLD(f) abuf->fields.fmt_17_cmpui.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_cond) = LTUSI (* FLD (f_r2), FLD (f_uimm16));
- TRACE_RESULT (current_cpu, "h_cond", 'x', LTUSI (* FLD (f_r2), FLD (f_uimm16)));
+ CPU (h_cond) = LTUSI (* FLD (f_r2), FLD (f_uimm16));
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform div: div $dr,$sr. */
CIA
-SEM_FN_NAME (div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_13.f
+#define FLD(f) abuf->fields.fmt_18_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-if (NESI (* FLD (f_r2), 0))
-{
+if (NESI (* FLD (f_r2), 0)) {
* FLD (f_r1) = DIVSI (* FLD (f_r1), * FLD (f_r2));
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform divu: divu $dr,$sr. */
CIA
-SEM_FN_NAME (divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_13.f
+#define FLD(f) abuf->fields.fmt_18_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-if (NESI (* FLD (f_r2), 0))
-{
+if (NESI (* FLD (f_r2), 0)) {
* FLD (f_r1) = UDIVSI (* FLD (f_r1), * FLD (f_r2));
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform rem: rem $dr,$sr. */
CIA
-SEM_FN_NAME (rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_13.f
+#define FLD(f) abuf->fields.fmt_18_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-if (NESI (* FLD (f_r2), 0))
-{
+if (NESI (* FLD (f_r2), 0)) {
* FLD (f_r1) = MODSI (* FLD (f_r1), * FLD (f_r2));
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform remu: remu $dr,$sr. */
CIA
-SEM_FN_NAME (remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_13.f
+#define FLD(f) abuf->fields.fmt_18_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-if (NESI (* FLD (f_r2), 0))
-{
+if (NESI (* FLD (f_r2), 0)) {
* FLD (f_r1) = UMODSI (* FLD (f_r1), * FLD (f_r2));
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
}
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform jl: jl $sr. */
CIA
-SEM_FN_NAME (jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_14.f
+#define FLD(f) abuf->fields.fmt_19_jl.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
do {
- SI temp1;SI temp0;
-temp0 = ADDSI (ANDSI (CPU (pc), -4), 4);
-temp1 = * FLD (f_r2);
-CPU (h_gr[14]) = temp0;
- TRACE_RESULT (current_cpu, "h_gr[14]", 'x', temp0);
- new_pc = SEM_BRANCH_VIA_ADDR (sem_arg, temp1);
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+ USI temp1;SI temp0;
+ temp0 = ADDSI (ANDSI (CPU (h_pc), -4), 4);
+ temp1 = * FLD (f_r2);
+ CPU (h_gr[14]) = temp0;
+ TRACE_RESULT (current_cpu, "h-gr", 'x', CPU (h_gr[14]));
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
taken_p = 1;
} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform jmp: jmp $sr. */
CIA
-SEM_FN_NAME (jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_14.f
+#define FLD(f) abuf->fields.fmt_20_jmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
- new_pc = SEM_BRANCH_VIA_ADDR (sem_arg, * FLD (f_r2));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, * FLD (f_r2)));
taken_p = 1;
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_cti_insn (current_cpu, abuf, taken_p);
}
#endif
/* Perform ld: ld $dr,@$sr. */
CIA
-SEM_FN_NAME (ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_21_ld.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = GETMEMSI (current_cpu, * FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ld-d: ld $dr,@($slo16,$sr). */
CIA
-SEM_FN_NAME (ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_1.f
+#define FLD(f) abuf->fields.fmt_22_ld_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = GETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ldb: ldb $dr,@$sr. */
CIA
-SEM_FN_NAME (ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_23_ldb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = EXTQISI (GETMEMQI (current_cpu, * FLD (f_r2)));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ldb-d: ldb $dr,@($slo16,$sr). */
CIA
-SEM_FN_NAME (ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_1.f
+#define FLD(f) abuf->fields.fmt_24_ldb_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = EXTQISI (GETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ldh: ldh $dr,@$sr. */
CIA
-SEM_FN_NAME (ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_25_ldh.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = EXTHISI (GETMEMHI (current_cpu, * FLD (f_r2)));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ldh-d: ldh $dr,@($slo16,$sr). */
CIA
-SEM_FN_NAME (ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_1.f
+#define FLD(f) abuf->fields.fmt_26_ldh_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = EXTHISI (GETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ldub: ldub $dr,@$sr. */
CIA
-SEM_FN_NAME (ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_23_ldb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ZEXTQISI (GETMEMQI (current_cpu, * FLD (f_r2)));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ldub-d: ldub $dr,@($slo16,$sr). */
CIA
-SEM_FN_NAME (ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_1.f
+#define FLD(f) abuf->fields.fmt_24_ldb_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ZEXTQISI (GETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform lduh: lduh $dr,@$sr. */
CIA
-SEM_FN_NAME (lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_25_ldh.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ZEXTHISI (GETMEMHI (current_cpu, * FLD (f_r2)));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform lduh-d: lduh $dr,@($slo16,$sr). */
CIA
-SEM_FN_NAME (lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_1.f
+#define FLD(f) abuf->fields.fmt_26_ldh_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = ZEXTHISI (GETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ld-plus: ld $dr,@$sr+. */
CIA
-SEM_FN_NAME (ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_21_ld.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
do {
SI temp1;SI temp0;
-temp0 = GETMEMSI (current_cpu, * FLD (f_r2));
-temp1 = ADDSI (* FLD (f_r2), 4);
+ temp0 = GETMEMSI (current_cpu, * FLD (f_r2));
+ temp1 = ADDSI (* FLD (f_r2), 4);
* FLD (f_r1) = temp0;
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
* FLD (f_r2) = temp1;
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ld24: ld24 $dr,$uimm24. */
CIA
-SEM_FN_NAME (ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_15.f
+#define FLD(f) abuf->fields.fmt_27_ld24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = FLD (f_uimm24);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ldi8: ldi $dr,$simm8. */
CIA
-SEM_FN_NAME (ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_4.f
+#define FLD(f) abuf->fields.fmt_28_ldi8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = FLD (f_simm8);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform ldi16: ldi $dr,$slo16. */
CIA
-SEM_FN_NAME (ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_16.f
+#define FLD(f) abuf->fields.fmt_29_ldi16.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = FLD (f_simm16);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform lock: lock $dr,@$sr. */
CIA
-SEM_FN_NAME (lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
do_lock (current_cpu, * FLD (f_r1), * FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform machi: machi $src1,$src2. */
CIA
-SEM_FN_NAME (machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_30_machi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = SRADI (SHLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (ANDSI (* FLD (f_r1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16))))), 8), 8);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (ANDSI (* FLD (f_r1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16))))), 8), 8));
+ CPU (h_accum) = SRADI (SLLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (ANDSI (* FLD (f_r1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16))))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform maclo: maclo $src1,$src2. */
CIA
-SEM_FN_NAME (maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_30_machi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = SRADI (SHLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (SHLSI (* FLD (f_r1), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2))))), 8), 8);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (SHLSI (* FLD (f_r1), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2))))), 8), 8));
+ CPU (h_accum) = SRADI (SLLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (SLLSI (* FLD (f_r1), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2))))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform macwhi: macwhi $src1,$src2. */
CIA
-SEM_FN_NAME (macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_30_machi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = SRADI (SHLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16))))), 8), 8);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16))))), 8), 8));
+ CPU (h_accum) = SRADI (SLLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16))))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform macwlo: macwlo $src1,$src2. */
CIA
-SEM_FN_NAME (macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_30_machi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = SRADI (SHLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (* FLD (f_r2))))), 8), 8);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (* FLD (f_r2))))), 8), 8));
+ CPU (h_accum) = SRADI (SLLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (* FLD (f_r2))))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mul: mul $dr,$sr. */
CIA
-SEM_FN_NAME (mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = MULSI (* FLD (f_r1), * FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mulhi: mulhi $src1,$src2. */
CIA
-SEM_FN_NAME (mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = SRADI (SHLDI (MULDI (EXTSIDI (ANDSI (* FLD (f_r1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16)))), 16), 16);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (MULDI (EXTSIDI (ANDSI (* FLD (f_r1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16)))), 16), 16));
+ CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (f_r1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16)))), 16), 16);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mullo: mullo $src1,$src2. */
CIA
-SEM_FN_NAME (mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = SRADI (SHLDI (MULDI (EXTSIDI (SHLSI (* FLD (f_r1), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2)))), 16), 16);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (MULDI (EXTSIDI (SHLSI (* FLD (f_r1), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2)))), 16), 16));
+ CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (f_r1), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2)))), 16), 16);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mulwhi: mulwhi $src1,$src2. */
CIA
-SEM_FN_NAME (mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = SRADI (SHLDI (MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16)))), 8), 8);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16)))), 8), 8));
+ CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16)))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mulwlo: mulwlo $src1,$src2. */
CIA
-SEM_FN_NAME (mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = SRADI (SHLDI (MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (* FLD (f_r2)))), 8), 8);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (* FLD (f_r2)))), 8), 8));
+ CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (* FLD (f_r2)))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mv: mv $dr,$sr. */
CIA
-SEM_FN_NAME (mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_31_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = * FLD (f_r2);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mvfachi: mvfachi $dr. */
CIA
-SEM_FN_NAME (mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_17.f
+#define FLD(f) abuf->fields.fmt_32_mvfachi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = TRUNCDISI (SRADI (CPU (h_accum), 32));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mvfaclo: mvfaclo $dr. */
CIA
-SEM_FN_NAME (mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_17.f
+#define FLD(f) abuf->fields.fmt_32_mvfachi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = TRUNCDISI (CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mvfacmi: mvfacmi $dr. */
CIA
-SEM_FN_NAME (mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_17.f
+#define FLD(f) abuf->fields.fmt_32_mvfachi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = TRUNCDISI (SRADI (CPU (h_accum), 16));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mvfc: mvfc $dr,$scr. */
CIA
-SEM_FN_NAME (mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_18.f
+#define FLD(f) abuf->fields.fmt_33_mvfc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-* FLD (f_r1) = h_cr_get (FLD (f_r2));
+* FLD (f_r1) = m32r_h_cr_get (current_cpu, FLD (f_r2));
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mvtachi: mvtachi $src1. */
CIA
-SEM_FN_NAME (mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_19.f
+#define FLD(f) abuf->fields.fmt_34_mvtachi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = ORDI (ANDDI (CPU (h_accum), MAKEDI (0, 0xffffffff)), SHLDI (EXTSIDI (* FLD (f_r1)), 32));
- TRACE_RESULT (current_cpu, "h_accum", 'D', ORDI (ANDDI (CPU (h_accum), MAKEDI (0, 0xffffffff)), SHLDI (EXTSIDI (* FLD (f_r1)), 32)));
+ CPU (h_accum) = ORDI (ANDDI (CPU (h_accum), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (f_r1)), 32));
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mvtaclo: mvtaclo $src1. */
CIA
-SEM_FN_NAME (mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_19.f
+#define FLD(f) abuf->fields.fmt_34_mvtachi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-CPU (h_accum) = ORDI (ANDDI (CPU (h_accum), MAKEDI (0xffffffff, 0)), EXTSIDI (* FLD (f_r1)));
- TRACE_RESULT (current_cpu, "h_accum", 'D', ORDI (ANDDI (CPU (h_accum), MAKEDI (0xffffffff, 0)), EXTSIDI (* FLD (f_r1))));
+ CPU (h_accum) = ORDI (ANDDI (CPU (h_accum), MAKEDI (0xffffffff, 0)), EXTSIDI (* FLD (f_r1)));
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform mvtc: mvtc $sr,$dcr. */
CIA
-SEM_FN_NAME (mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_20.f
+#define FLD(f) abuf->fields.fmt_35_mvtc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-h_cr_set (FLD (f_r1), * FLD (f_r2));
- TRACE_RESULT (current_cpu, "dcr", 'x', h_cr_get (FLD (f_r1)));
+m32r_h_cr_set (current_cpu, FLD (f_r1), * FLD (f_r2));
+ TRACE_RESULT (current_cpu, "dcr", 'x', m32r_h_cr_get (current_cpu, FLD (f_r1)));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform neg: neg $dr,$sr. */
CIA
-SEM_FN_NAME (neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_31_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = NEGSI (* FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform nop: nop. */
CIA
-SEM_FN_NAME (nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_21.f
+#define FLD(f) abuf->fields.fmt_36_nop.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
/* Perform not: not $dr,$sr. */
CIA
-SEM_FN_NAME (not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_31_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = INVSI (* FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform rac: rac. */
CIA
-SEM_FN_NAME (rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_21.f
+#define FLD(f) abuf->fields.fmt_37_rac.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-{
+do {
DI tmp_tmp1;
-tmp_tmp1 = ANDDI (CPU (h_accum), MAKEDI (16777215, 0xffffffff));
-if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (16383, 0xffff8000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff))))
-{
+ tmp_tmp1 = ANDDI (CPU (h_accum), MAKEDI (16777215, 0xffffffff));
+if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (16383, 0xffff8000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
tmp_tmp1 = MAKEDI (16383, 0xffff8000);
} else {
-if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0))))
-{
+if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
tmp_tmp1 = MAKEDI (16760832, 0);
} else {
tmp_tmp1 = ANDDI (ADDDI (CPU (h_accum), MAKEDI (0, 16384)), MAKEDI (16777215, 0xffff8000));
}
}
- tmp_tmp1 = SHLDI (tmp_tmp1, 1);
-CPU (h_accum) = SRADI (SHLDI (tmp_tmp1, 7), 7);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (tmp_tmp1, 7), 7));
-}
+ tmp_tmp1 = SLLDI (tmp_tmp1, 1);
+ CPU (h_accum) = SRADI (SLLDI (tmp_tmp1, 7), 7);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
+} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
/* Perform rach: rach. */
CIA
-SEM_FN_NAME (rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_21.f
+#define FLD(f) abuf->fields.fmt_37_rac.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-{
+do {
DI tmp_tmp1;
-tmp_tmp1 = ANDDI (CPU (h_accum), MAKEDI (16777215, 0xffffffff));
-if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff))))
-{
+ tmp_tmp1 = ANDDI (CPU (h_accum), MAKEDI (16777215, 0xffffffff));
+if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
tmp_tmp1 = MAKEDI (16383, 0x80000000);
} else {
-if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0))))
-{
+if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
tmp_tmp1 = MAKEDI (16760832, 0);
} else {
tmp_tmp1 = ANDDI (ADDDI (CPU (h_accum), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
}
}
- tmp_tmp1 = SHLDI (tmp_tmp1, 1);
-CPU (h_accum) = SRADI (SHLDI (tmp_tmp1, 7), 7);
- TRACE_RESULT (current_cpu, "h_accum", 'D', SRADI (SHLDI (tmp_tmp1, 7), 7));
-}
+ tmp_tmp1 = SLLDI (tmp_tmp1, 1);
+ CPU (h_accum) = SRADI (SLLDI (tmp_tmp1, 7), 7);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
+} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
/* Perform rte: rte. */
CIA
-SEM_FN_NAME (rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_21.f
+#define FLD(f) abuf->fields.fmt_36_nop.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
-{
-CPU (h_sm) = CPU (h_bsm);
- TRACE_RESULT (current_cpu, "h_sm", 'x', CPU (h_bsm));
-CPU (h_ie) = CPU (h_bie);
- TRACE_RESULT (current_cpu, "h_ie", 'x', CPU (h_bie));
-CPU (h_cond) = CPU (h_bcond);
- TRACE_RESULT (current_cpu, "h_cond", 'x', CPU (h_bcond));
- new_pc = SEM_BRANCH_VIA_ADDR (sem_arg, CPU (h_bpc));
- TRACE_RESULT (current_cpu, "new_pc", 'x', SEM_NEW_PC_ADDR (new_pc));
+do {
+ CPU (h_sm) = CPU (h_bsm);
+ TRACE_RESULT (current_cpu, "h-sm", 'x', CPU (h_sm));
+ CPU (h_ie) = CPU (h_bie);
+ TRACE_RESULT (current_cpu, "h-ie", 'x', CPU (h_ie));
+ CPU (h_cond) = CPU (h_bcond);
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
+ BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, CPU (h_bpc)));
taken_p = 1;
-}
+ TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
+} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
/* Perform seth: seth $dr,$hi16. */
CIA
-SEM_FN_NAME (seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_22.f
+#define FLD(f) abuf->fields.fmt_38_seth.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-* FLD (f_r1) = SHLSI (FLD (f_hi16), 16);
+* FLD (f_r1) = SLLSI (FLD (f_hi16), 16);
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform sll: sll $dr,$sr. */
CIA
-SEM_FN_NAME (sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-* FLD (f_r1) = SHLSI (* FLD (f_r1), ANDSI (* FLD (f_r2), 31));
+* FLD (f_r1) = SLLSI (* FLD (f_r1), ANDSI (* FLD (f_r2), 31));
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform sll3: sll3 $dr,$sr,$simm16. */
CIA
-SEM_FN_NAME (sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_5.f
+#define FLD(f) abuf->fields.fmt_5_addv3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-* FLD (f_r1) = SHLSI (* FLD (f_r2), ANDSI (FLD (f_simm16), 31));
+* FLD (f_r1) = SLLSI (* FLD (f_r2), ANDSI (FLD (f_simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform slli: slli $dr,$uimm5. */
CIA
-SEM_FN_NAME (slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_23.f
+#define FLD(f) abuf->fields.fmt_39_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-* FLD (f_r1) = SHLSI (* FLD (f_r1), FLD (f_uimm5));
+* FLD (f_r1) = SLLSI (* FLD (f_r1), FLD (f_uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform sra: sra $dr,$sr. */
CIA
-SEM_FN_NAME (sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = SRASI (* FLD (f_r1), ANDSI (* FLD (f_r2), 31));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform sra3: sra3 $dr,$sr,$simm16. */
CIA
-SEM_FN_NAME (sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_5.f
+#define FLD(f) abuf->fields.fmt_5_addv3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = SRASI (* FLD (f_r2), ANDSI (FLD (f_simm16), 31));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform srai: srai $dr,$uimm5. */
CIA
-SEM_FN_NAME (srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_23.f
+#define FLD(f) abuf->fields.fmt_39_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = SRASI (* FLD (f_r1), FLD (f_uimm5));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform srl: srl $dr,$sr. */
CIA
-SEM_FN_NAME (srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = SRLSI (* FLD (f_r1), ANDSI (* FLD (f_r2), 31));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform srl3: srl3 $dr,$sr,$simm16. */
CIA
-SEM_FN_NAME (srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_5.f
+#define FLD(f) abuf->fields.fmt_5_addv3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = SRLSI (* FLD (f_r2), ANDSI (FLD (f_simm16), 31));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform srli: srli $dr,$uimm5. */
CIA
-SEM_FN_NAME (srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_23.f
+#define FLD(f) abuf->fields.fmt_39_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = SRLSI (* FLD (f_r1), FLD (f_uimm5));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform st: st $src1,@$src2. */
CIA
-SEM_FN_NAME (st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
- TRACE_RESULT (current_cpu, "memory", 'x', * FLD (f_r1));
+ TRACE_RESULT (current_cpu, "h-memory", 'x', GETMEMSI (current_cpu, * FLD (f_r2)));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform st-d: st $src1,@($slo16,$src2). */
CIA
-SEM_FN_NAME (st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_24.f
+#define FLD(f) abuf->fields.fmt_40_st_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
SETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
- TRACE_RESULT (current_cpu, "memory", 'x', * FLD (f_r1));
+ TRACE_RESULT (current_cpu, "h-memory", 'x', GETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform stb: stb $src1,@$src2. */
CIA
-SEM_FN_NAME (stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
SETMEMQI (current_cpu, * FLD (f_r2), * FLD (f_r1));
- TRACE_RESULT (current_cpu, "memory", 'x', * FLD (f_r1));
+ TRACE_RESULT (current_cpu, "h-memory", 'x', GETMEMQI (current_cpu, * FLD (f_r2)));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform stb-d: stb $src1,@($slo16,$src2). */
CIA
-SEM_FN_NAME (stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_24.f
+#define FLD(f) abuf->fields.fmt_40_st_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
SETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
- TRACE_RESULT (current_cpu, "memory", 'x', * FLD (f_r1));
+ TRACE_RESULT (current_cpu, "h-memory", 'x', GETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform sth: sth $src1,@$src2. */
CIA
-SEM_FN_NAME (sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
SETMEMHI (current_cpu, * FLD (f_r2), * FLD (f_r1));
- TRACE_RESULT (current_cpu, "memory", 'x', * FLD (f_r1));
+ TRACE_RESULT (current_cpu, "h-memory", 'x', GETMEMHI (current_cpu, * FLD (f_r2)));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform sth-d: sth $src1,@($slo16,$src2). */
CIA
-SEM_FN_NAME (sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_24.f
+#define FLD(f) abuf->fields.fmt_40_st_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
SETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
- TRACE_RESULT (current_cpu, "memory", 'x', * FLD (f_r1));
+ TRACE_RESULT (current_cpu, "h-memory", 'x', GETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform st-plus: st $src1,@+$src2. */
CIA
-SEM_FN_NAME (st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-{
+do {
* FLD (f_r2) = ADDSI (* FLD (f_r2), 4);
TRACE_RESULT (current_cpu, "src2", 'x', * FLD (f_r2));
SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
- TRACE_RESULT (current_cpu, "memory", 'x', * FLD (f_r1));
-}
+ TRACE_RESULT (current_cpu, "h-memory", 'x', GETMEMSI (current_cpu, * FLD (f_r2)));
+} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform st-minus: st $src1,@-$src2. */
CIA
-SEM_FN_NAME (st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
-{
+do {
* FLD (f_r2) = SUBSI (* FLD (f_r2), 4);
TRACE_RESULT (current_cpu, "src2", 'x', * FLD (f_r2));
SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
- TRACE_RESULT (current_cpu, "memory", 'x', * FLD (f_r1));
-}
+ TRACE_RESULT (current_cpu, "h-memory", 'x', GETMEMSI (current_cpu, * FLD (f_r2)));
+} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform sub: sub $dr,$sr. */
CIA
-SEM_FN_NAME (sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
* FLD (f_r1) = SUBSI (* FLD (f_r1), * FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform subv: subv $dr,$sr. */
CIA
-SEM_FN_NAME (subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_0_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
do {
BI temp1;SI temp0;
-temp0 = SUBSI (* FLD (f_r1), * FLD (f_r2));
-temp1 = SUBOFSI (* FLD (f_r1), * FLD (f_r2), 0);
+ temp0 = SUBSI (* FLD (f_r1), * FLD (f_r2));
+ temp1 = SUBOFSI (* FLD (f_r1), * FLD (f_r2), 0);
* FLD (f_r1) = temp0;
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
-CPU (h_cond) = temp1;
- TRACE_RESULT (current_cpu, "h_cond", 'x', temp1);
+ CPU (h_cond) = temp1;
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform subx: subx $dr,$sr. */
CIA
-SEM_FN_NAME (subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_0.f
+#define FLD(f) abuf->fields.fmt_6_addx.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
do {
BI temp1;SI temp0;
-temp0 = SUBCSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
-temp1 = SUBCFSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
+ temp0 = SUBCSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
+ temp1 = SUBCFSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
* FLD (f_r1) = temp0;
TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
-CPU (h_cond) = temp1;
- TRACE_RESULT (current_cpu, "h_cond", 'x', temp1);
+ CPU (h_cond) = temp1;
+ TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
- model_mark_set_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_set_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
/* Perform trap: trap $uimm4. */
CIA
-SEM_FN_NAME (trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_25.f
+#define FLD(f) abuf->fields.fmt_41_trap.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
int taken_p = 0;
/* Perform unlock: unlock $src1,@$src2. */
CIA
-SEM_FN_NAME (unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+SEM_FN_NAME (m32r,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
-#define FLD(f) abuf->fields.fmt_10.f
+#define FLD(f) abuf->fields.fmt_15_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg);
do_unlock (current_cpu, * FLD (f_r1), * FLD (f_r2));
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
- model_mark_get_h_gr (current_cpu, abuf);
+ m32r_model_mark_get_h_gr (current_cpu, abuf);
model_profile_insn (current_cpu, abuf);
}
#endif
#undef FLD
}
+/* FIXME: Add "no return" attribute to illegal insn handlers.
+ They all call longjmp. */
+
+PCADDR
+SEM_FN_NAME (m32r,illegal) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+{
+ sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/);
+ return 0;
+}
+
+#endif /* ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE) */
projects / platform / upstream / binutils.git / commitdiff