ARM: dts: rockchip: Add SFC to RV1108

Add a devicetree entry for the Rockchip SFC for the RV1108 SOC.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210812134546.31340-5-jon.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 1a61a6a..24d5684 100644 (file)
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -546,6 +546,17 @@
                status = "disabled";
        };
 
+       sfc: spi@301c0000 {
+               compatible = "rockchip,sfc";
+               reg = <0x301c0000 0x4000>;
+               interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+               clock-names = "clk_sfc", "hclk_sfc";
+               pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
+               pinctrl-names = "default";
+               status = "disabled";
+       };
+
        gmac: eth@30200000 {
                compatible = "rockchip,rv1108-gmac";
                reg = <0x30200000 0x10000>;
@@ -714,6 +725,32 @@
                        };
                };
 
+               sfc {
+                       sfc_bus4: sfc-bus4 {
+                               rockchip,pins =
+                                       <2 RK_PA0 3 &pcfg_pull_none>,
+                                       <2 RK_PA1 3 &pcfg_pull_none>,
+                                       <2 RK_PA2 3 &pcfg_pull_none>,
+                                       <2 RK_PA3 3 &pcfg_pull_none>;
+                       };
+
+                       sfc_bus2: sfc-bus2 {
+                               rockchip,pins =
+                                       <2 RK_PA0 3 &pcfg_pull_none>,
+                                       <2 RK_PA1 3 &pcfg_pull_none>;
+                       };
+
+                       sfc_cs0: sfc-cs0 {
+                               rockchip,pins =
+                                       <2 RK_PB4 3 &pcfg_pull_none>;
+                       };
+
+                       sfc_clk: sfc-clk {
+                               rockchip,pins =
+                                       <2 RK_PB7 2 &pcfg_pull_none>;
+                       };
+               };
+
                gmac {
                        rmii_pins: rmii-pins {
                                rockchip,pins = <1 RK_PC5 2 &pcfg_pull_none>,