staging: rtl8188eu: remove unused power flows and transitions
authorMartin Kaiser <martin@kaiser.cx>
Sun, 18 Jul 2021 17:36:07 +0000 (19:36 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 21 Jul 2021 08:31:22 +0000 (10:31 +0200)
The driver defines a couple of "flows" to move the chip into a certain
power state. Each flow is a sequence of "transitions".

This patch removes flows and transitions which are not used.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Link: https://lore.kernel.org/r/20210718173610.894-7-martin@kaiser.cx
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8188eu/hal/pwrseq.c
drivers/staging/rtl8188eu/include/pwrseq.h
drivers/staging/rtl8188eu/include/rtl8188e_hal.h

index f7890a8..80bf969 100644 (file)
@@ -17,13 +17,6 @@ struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
        RTL8188E_TRANS_END
 };
 
-/* 3Radio off Array */
-struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-                                         RTL8188E_TRANS_END_STEPS] = {
-       RTL8188E_TRANS_ACT_TO_CARDEMU
-       RTL8188E_TRANS_END
-};
-
 /* 3Card Disable Array */
 struct wl_pwr_cfg rtl8188E_card_disable_flow
        [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
@@ -34,43 +27,6 @@ struct wl_pwr_cfg rtl8188E_card_disable_flow
                RTL8188E_TRANS_END
 };
 
-/* 3 Card Enable Array */
-struct wl_pwr_cfg rtl8188E_card_enable_flow
-       [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-        RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
-        RTL8188E_TRANS_END_STEPS] = {
-               RTL8188E_TRANS_CARDDIS_TO_CARDEMU
-               RTL8188E_TRANS_CARDEMU_TO_ACT
-               RTL8188E_TRANS_END
-};
-
-/* 3Suspend Array */
-struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-                                       RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
-                                       RTL8188E_TRANS_END_STEPS] = {
-       RTL8188E_TRANS_ACT_TO_CARDEMU
-       RTL8188E_TRANS_CARDEMU_TO_SUS
-       RTL8188E_TRANS_END
-};
-
-/* 3 Resume Array */
-struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-                                      RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
-                                      RTL8188E_TRANS_END_STEPS] = {
-       RTL8188E_TRANS_SUS_TO_CARDEMU
-       RTL8188E_TRANS_CARDEMU_TO_ACT
-       RTL8188E_TRANS_END
-};
-
-/* 3HWPDN Array */
-struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-                                     RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
-                                     RTL8188E_TRANS_END_STEPS] = {
-       RTL8188E_TRANS_ACT_TO_CARDEMU
-       RTL8188E_TRANS_CARDEMU_TO_PDN
-       RTL8188E_TRANS_END
-};
-
 /* 3 Enter LPS */
 struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
                                          RTL8188E_TRANS_END_STEPS] = {
@@ -78,11 +34,3 @@ struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
        RTL8188E_TRANS_ACT_TO_LPS
        RTL8188E_TRANS_END
 };
-
-/* 3 Leave LPS */
-struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
-                                         RTL8188E_TRANS_END_STEPS] = {
-       /* FW behavior */
-       RTL8188E_TRANS_LPS_TO_ACT
-       RTL8188E_TRANS_END
-};
index c4b7606..caa6bf7 100644 (file)
  *     4: LPS--Low Power State
  *     5: SUS--Suspend
  *
- *     The transition from different states are defined below
- *     TRANS_CARDEMU_TO_ACT
- *     TRANS_ACT_TO_CARDEMU
- *     TRANS_CARDEMU_TO_SUS
- *     TRANS_SUS_TO_CARDEMU
- *     TRANS_CARDEMU_TO_PDN
- *     TRANS_ACT_TO_LPS
- *     TRANS_LPS_TO_ACT
- *
- *     TRANS_END
- *
  *   PWR SEQ Version: rtl8188E_PwrSeq_V09.h
  */
 #define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS    10
 #define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS    10
-#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS    10
-#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS    10
 #define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS    10
-#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS    10
 #define RTL8188E_TRANS_ACT_TO_LPS_STEPS                15
-#define RTL8188E_TRANS_LPS_TO_ACT_STEPS                15
 #define RTL8188E_TRANS_END_STEPS               1
 
 #define RTL8188E_TRANS_CARDEMU_TO_ACT                                  \
        {0x0005, PWR_CUT_ALL_MSK, PWR_CMD_POLLING, BIT(1), 0}, \
        /*wait till 0x04[9] = 0 polling until return 0 to disable*/
 
-#define RTL8188E_TRANS_CARDEMU_TO_SUS                                  \
-       /* format
-        * { offset, cut_msk, cmd, msk,
-        * value },
-        * comments here
-        */                                                             \
-       {0x0005, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)}, \
-       /* 0x04[12:11] = 2b'01enable WL suspend */                      \
-       {0x0007, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, 0xFF, BIT(7)}, \
-       /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */\
-       {0x0041, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(4), 0}, \
-       /*Clear SIC_EN register 0x40[12] = 1'b0 */                      \
-       {0xfe10, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(4), BIT(4)}, \
-       /*Set USB suspend enable local register  0xfe10[4]=1 */
-
-#define RTL8188E_TRANS_SUS_TO_CARDEMU                                  \
-       /* format
-        * { offset, cut_msk, cmd, msk,
-        * value },
-        * comments here
-        */                                                             \
-       {0x0005, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(3) | BIT(4), 0}, \
-       /*0x04[12:11] = 2b'01enable WL suspend*/
-
 #define RTL8188E_TRANS_CARDEMU_TO_CARDDIS                              \
        /* format
         * { offset, cut_msk, cmd, msk,
        {0xfe10, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(4), BIT(4)}, \
        /*Set USB suspend enable local register  0xfe10[4]=1 */
 
-#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU                              \
-       /* format
-        * { offset, cut_msk, cmd, msk,
-        * value },
-        * comments here
-        */                                                             \
-       {0x0005, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(3) | BIT(4), 0}, \
-       /*0x04[12:11] = 2b'01enable WL suspend*/
-
-#define RTL8188E_TRANS_CARDEMU_TO_PDN                                  \
-       /* format
-        * { offset, cut_msk, cmd, msk,
-        * value },
-        * comments here
-        */                                                             \
-       {0x0006, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(0), 0}, \
-       /* 0x04[16] = 0*/                                               \
-       {0x0005, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(7), BIT(7)}, \
-       /* 0x04[15] = 1*/
-
-#define RTL8188E_TRANS_PDN_TO_CARDEMU                                  \
-       /* format
-        * { offset, cut_msk, cmd, msk,
-        * value },
-        * comments here
-        */                                                             \
-       {0x0005, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(7), 0}, \
-       /* 0x04[15] = 0*/
-
 /* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
 #define RTL8188E_TRANS_ACT_TO_LPS                                      \
        /* format
        {0x0553, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(5), BIT(5)}, \
        /*Respond TxOK to scheduler*/
 
-#define RTL8188E_TRANS_LPS_TO_ACT                                      \
-       /* format
-        * { offset, cut_msk, cmd, msk,
-        * value },
-        * comments here
-        */                                                             \
-       {0xFE58, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, 0xFF, 0x84}, \
-       /*USB RPWM*/    \
-       {0x0002, PWR_CUT_ALL_MSK, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, \
-       /*Delay*/       \
-       {0x0008, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(4), 0}, \
-       /* 0x08[4] = 0 switch TSF to 40M */                             \
-       {0x0109, PWR_CUT_ALL_MSK, PWR_CMD_POLLING, BIT(7), 0}, \
-       /* Polling 0x109[7]=0  TSF in 40M */                            \
-       {0x0029, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(6) | BIT(7), 0}, \
-       /* 0x29[7:6] = 2b'00  enable BB clock */                        \
-       {0x0101, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(1), BIT(1)}, \
-       /* 0x101[1] = 1 */                                              \
-       {0x0100, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, 0xFF, 0xFF}, \
-       /* 0x100[7:0] = 0xFF enable WMAC TRX */                         \
-       {0x0002, PWR_CUT_ALL_MSK, \
-       PWR_CMD_WRITE, BIT(1) | BIT(0), BIT(1) | BIT(0)}, \
-       /* 0x02[1:0] = 2b'11 enable BB macro */                         \
-       {0x0522, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, 0xFF, 0}, /*.  0x522 = 0*/
-
 #define RTL8188E_TRANS_END                                             \
        /* format
         * { offset, cut_msk, cmd, msk,
 
 extern struct wl_pwr_cfg rtl8188E_power_on_flow
                [RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS];
-extern struct wl_pwr_cfg rtl8188E_radio_off_flow
-               [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS];
 extern struct wl_pwr_cfg rtl8188E_card_disable_flow
                [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
                RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
                RTL8188E_TRANS_END_STEPS];
-extern struct wl_pwr_cfg rtl8188E_card_enable_flow
-               [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-               RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
-               RTL8188E_TRANS_END_STEPS];
-extern struct wl_pwr_cfg rtl8188E_suspend_flow[
-               RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-               RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
-               RTL8188E_TRANS_END_STEPS];
-extern struct wl_pwr_cfg rtl8188E_resume_flow
-               [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-               RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
-               RTL8188E_TRANS_END_STEPS];
-extern struct wl_pwr_cfg rtl8188E_hwpdn_flow
-               [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
-               RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS];
 extern struct wl_pwr_cfg rtl8188E_enter_lps_flow
                [RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS];
-extern struct wl_pwr_cfg rtl8188E_leave_lps_flow
-               [RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS];
 
 #endif /* __HAL8188EPWRSEQ_H__ */
index f585cbe..e508b4b 100644 (file)
 
 /* RTL8188E Power Configuration CMDs for USB/SDIO interfaces */
 #define Rtl8188E_NIC_PWR_ON_FLOW               rtl8188E_power_on_flow
-#define Rtl8188E_NIC_RF_OFF_FLOW               rtl8188E_radio_off_flow
 #define Rtl8188E_NIC_DISABLE_FLOW              rtl8188E_card_disable_flow
-#define Rtl8188E_NIC_ENABLE_FLOW               rtl8188E_card_enable_flow
-#define Rtl8188E_NIC_SUSPEND_FLOW              rtl8188E_suspend_flow
-#define Rtl8188E_NIC_RESUME_FLOW               rtl8188E_resume_flow
-#define Rtl8188E_NIC_PDN_FLOW                  rtl8188E_hwpdn_flow
 #define Rtl8188E_NIC_LPS_ENTER_FLOW            rtl8188E_enter_lps_flow
-#define Rtl8188E_NIC_LPS_LEAVE_FLOW            rtl8188E_leave_lps_flow
 
 #define DRVINFO_SZ     4 /*  unit is 8bytes */
 #define PageNum_128(_Len)      (u32)(((_Len) >> 7) + ((_Len) & 0x7F ? 1 : 0))