drm/amdgpu: reserve at least 4MB of VRAM for page tables v2

This hopefully helps reduce the contention for page tables.

v2: adjust maximum reported VRAM size as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 0e2ec608530ba4b9b8a738e28bfe3803982c8724..c28dc079a0a15c91c4aa2da91b549f378acf9a7c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -619,9 +619,12 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                struct drm_amdgpu_info_vram_gtt vram_gtt;
 
                vram_gtt.vram_size = adev->gmc.real_vram_size -
-                       atomic64_read(&adev->vram_pin_size);
-               vram_gtt.vram_cpu_accessible_size = adev->gmc.visible_vram_size -
-                       atomic64_read(&adev->visible_pin_size);
+                       atomic64_read(&adev->vram_pin_size) -
+                       AMDGPU_VM_RESERVED_VRAM;
+               vram_gtt.vram_cpu_accessible_size =
+                       min(adev->gmc.visible_vram_size -
+                           atomic64_read(&adev->visible_pin_size),
+                           vram_gtt.vram_size);
                vram_gtt.gtt_size = adev->mman.bdev.man[TTM_PL_TT].size;
                vram_gtt.gtt_size *= PAGE_SIZE;
                vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size);
@@ -634,15 +637,18 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                memset(&mem, 0, sizeof(mem));
                mem.vram.total_heap_size = adev->gmc.real_vram_size;
                mem.vram.usable_heap_size = adev->gmc.real_vram_size -
-                       atomic64_read(&adev->vram_pin_size);
+                       atomic64_read(&adev->vram_pin_size) -
+                       AMDGPU_VM_RESERVED_VRAM;
                mem.vram.heap_usage =
                        amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
                mem.vram.max_allocation = mem.vram.usable_heap_size * 3 / 4;
 
                mem.cpu_accessible_vram.total_heap_size =
                        adev->gmc.visible_vram_size;
-               mem.cpu_accessible_vram.usable_heap_size = adev->gmc.visible_vram_size -
-                       atomic64_read(&adev->visible_pin_size);
+               mem.cpu_accessible_vram.usable_heap_size =
+                       min(adev->gmc.visible_vram_size -
+                           atomic64_read(&adev->visible_pin_size),
+                           mem.vram.usable_heap_size);
                mem.cpu_accessible_vram.heap_usage =
                        amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
                mem.cpu_accessible_vram.max_allocation =

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 2eda3a8c330d37472d3957c7a3d750cf060481a7..3352a87b822ebf757672c62b40d87e2b620377d1 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -99,6 +99,9 @@ struct amdgpu_bo_list_entry;
 #define AMDGPU_VM_FAULT_STOP_FIRST     1
 #define AMDGPU_VM_FAULT_STOP_ALWAYS    2
 
+/* Reserve 4MB VRAM for page tables */
+#define AMDGPU_VM_RESERVED_VRAM                (4ULL << 20)
+
 /* max number of VMHUB */
 #define AMDGPU_MAX_VMHUBS                      3
 #define AMDGPU_GFXHUB_0                                0

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index 3a9d8c15fe9fc732326c9f59aae0c68495235b14..8887b3964e43182e8904c4e6efddad0acc403196 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -23,6 +23,7 @@
  */
 
 #include "amdgpu.h"
+#include "amdgpu_vm.h"
 
 struct amdgpu_vram_mgr {
        struct drm_mm mm;
@@ -275,7 +276,7 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
        struct drm_mm_node *nodes;
        enum drm_mm_insert_mode mode;
        unsigned long lpfn, num_nodes, pages_per_node, pages_left;
-       uint64_t vis_usage = 0, mem_bytes;
+       uint64_t vis_usage = 0, mem_bytes, max_bytes;
        unsigned i;
        int r;
 
@@ -283,9 +284,13 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
        if (!lpfn)
                lpfn = man->size;
 
+       max_bytes = adev->gmc.mc_vram_size;
+       if (tbo->type != ttm_bo_type_kernel)
+               max_bytes -= AMDGPU_VM_RESERVED_VRAM;
+
        /* bail out quickly if there's likely not enough VRAM for this BO */
        mem_bytes = (u64)mem->num_pages << PAGE_SHIFT;
-       if (atomic64_add_return(mem_bytes, &mgr->usage) > adev->gmc.mc_vram_size) {
+       if (atomic64_add_return(mem_bytes, &mgr->usage) > max_bytes) {
                atomic64_sub(mem_bytes, &mgr->usage);
                mem->mm_node = NULL;
                return 0;