// FIXME: SYCL specification considers unannotated pointers and references
// to be pointing to the generic address space. See section 5.9.3 of
// SYCL 2020 specification.
- // Currently, there is no way of representing SYCL's and HIP/CUDA's default
+ // Currently, there is no way of representing SYCL's and HIP's default
// address space language semantic along with the semantics of embedded C's
// default address space in the same address space map. Hence the map needs
// to be reset to allow mapping to the desired value of 'Default' entry for
- // SYCL and HIP/CUDA.
+ // SYCL and HIP.
setAddressSpaceMap(
/*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
- // The address mapping from HIP/CUDA language for device code is only
- // defined for SPIR-V.
- (getTriple().isSPIRV() && Opts.CUDAIsDevice));
+ // The address mapping from HIP language for device code is only defined
+ // for SPIR-V.
+ (getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice));
}
void setSupportedOpenCLOpts() override {
}
ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
- if (getContext().getLangOpts().CUDAIsDevice) {
+ if (getContext().getLangOpts().HIP) {
// Coerce pointer arguments with default address space to CrossWorkGroup
- // pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the
- // SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address space.
+ // pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
+ // maps cuda_device to SPIR-V's CrossWorkGroup address space.
llvm::Type *LTy = CGT.ConvertType(Ty);
auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
+++ /dev/null
-// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
-
-// REQUIRES: clang-driver
-
-// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
-// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1
-// RUN: llvm-dis %t.bc -o %t.ll
-// RUN: FileCheck %s --input-file=%t.ll
-
-// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
-// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1
-// RUN: llvm-dis %t.bc -o %t.ll
-// RUN: FileCheck %s --input-file=%t.ll
-
-// CHECK: define spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef %output.coerce)
-
-__attribute__((global)) void kernel(int* output) { *output = 1; }