Documentation: DT: Add Freescale DSPI driver
authorChao Fu <B44548@freescale.com>
Fri, 16 Aug 2013 03:08:54 +0000 (11:08 +0800)
committerMark Brown <broonie@linaro.org>
Thu, 22 Aug 2013 10:33:13 +0000 (11:33 +0100)
This patch adds the document for DSPI driver under
Documentation/devicetree/bindings/spi/.

Signed-off-by: Chao Fu <b44548@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
new file mode 100644 (file)
index 0000000..a1fb303
--- /dev/null
@@ -0,0 +1,42 @@
+ARM Freescale DSPI controller
+
+Required properties:
+- compatible : "fsl,vf610-dspi"
+- reg : Offset and length of the register set for the device
+- interrupts : Should contain SPI controller interrupt
+- clocks: from common clock binding: handle to dspi clock.
+- clock-names: from common clock binding: Shall be "dspi".
+- pinctrl-0: pin control group to be used for this controller.
+- pinctrl-names: must contain a "default" entry.
+- spi-num-chipselects : the number of the chipselect signals.
+- bus-num : the slave chip chipselect signal number.
+Example:
+
+dspi0@4002c000 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       compatible = "fsl,vf610-dspi";
+       reg = <0x4002c000 0x1000>;
+       interrupts = <0 67 0x04>;
+       clocks = <&clks VF610_CLK_DSPI0>;
+       clock-names = "dspi";
+       spi-num-chipselects = <5>;
+       bus-num = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_dspi0_1>;
+       status = "okay";
+
+       sflash: at26df081a@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "atmel,at26df081a";
+               spi-max-frequency = <16000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <0>;
+               linux,modalias = "m25p80";
+               modal = "at26df081a";
+       };
+};
+
+