EDAC/i10nm: fix refcount leak in pci_get_dev_wrapper()
authorYang Yingliang <yangyingliang@huawei.com>
Mon, 28 Nov 2022 06:55:12 +0000 (14:55 +0800)
committerTony Luck <tony.luck@intel.com>
Mon, 28 Nov 2022 17:42:41 +0000 (09:42 -0800)
As the comment of pci_get_domain_bus_and_slot() says, it returns
a PCI device with refcount incremented, so it doesn't need to
call an extra pci_dev_get() in pci_get_dev_wrapper(), and the PCI
device needs to be put in the error path.

Fixes: d4dc89d069aa ("EDAC, i10nm: Add a driver for Intel 10nm server processors")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20221128065512.3572550-1-yangyingliang@huawei.com
drivers/edac/i10nm_base.c

index a22ea05..8af4d25 100644 (file)
@@ -304,11 +304,10 @@ static struct pci_dev *pci_get_dev_wrapper(int dom, unsigned int bus,
        if (unlikely(pci_enable_device(pdev) < 0)) {
                edac_dbg(2, "Failed to enable device %02x:%02x.%x\n",
                         bus, dev, fun);
+               pci_dev_put(pdev);
                return NULL;
        }
 
-       pci_dev_get(pdev);
-
        return pdev;
 }