dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings
authorYixun Lan <yixun.lan@amlogic.com>
Thu, 3 May 2018 13:26:22 +0000 (21:26 +0800)
committerJerome Brunet <jbrunet@baylibre.com>
Tue, 15 May 2018 12:07:11 +0000 (14:07 +0200)
Add dt-bindings headers for the Meson-AXG's AO clock and
reset controller.

Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
include/dt-bindings/clock/axg-aoclkc.h [new file with mode: 0644]
include/dt-bindings/reset/axg-aoclkc.h [new file with mode: 0644]

diff --git a/include/dt-bindings/clock/axg-aoclkc.h b/include/dt-bindings/clock/axg-aoclkc.h
new file mode 100644 (file)
index 0000000..6195501
--- /dev/null
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (c) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * Copyright (c) 2018 Amlogic, inc.
+ * Author: Qiufang Dai <qiufang.dai@amlogic.com>
+ */
+
+#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK
+#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK
+
+#define CLKID_AO_REMOTE                0
+#define CLKID_AO_I2C_MASTER    1
+#define CLKID_AO_I2C_SLAVE     2
+#define CLKID_AO_UART1         3
+#define CLKID_AO_UART2         4
+#define CLKID_AO_IR_BLASTER    5
+#define CLKID_AO_SAR_ADC       6
+#define CLKID_AO_CLK81         7
+#define CLKID_AO_SAR_ADC_SEL   8
+#define CLKID_AO_SAR_ADC_DIV   9
+#define CLKID_AO_SAR_ADC_CLK   10
+#define CLKID_AO_ALT_XTAL      11
+
+#endif
diff --git a/include/dt-bindings/reset/axg-aoclkc.h b/include/dt-bindings/reset/axg-aoclkc.h
new file mode 100644 (file)
index 0000000..d342c0b
--- /dev/null
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (c) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * Copyright (c) 2018 Amlogic, inc.
+ * Author: Qiufang Dai <qiufang.dai@amlogic.com>
+ */
+
+#ifndef DT_BINDINGS_RESET_AMLOGIC_MESON_AXG_AOCLK
+#define DT_BINDINGS_RESET_AMLOGIC_MESON_AXG_AOCLK
+
+#define RESET_AO_REMOTE                0
+#define RESET_AO_I2C_MASTER    1
+#define RESET_AO_I2C_SLAVE     2
+#define RESET_AO_UART1         3
+#define RESET_AO_UART2         4
+#define RESET_AO_IR_BLASTER    5
+
+#endif