drm/i915/hdmi: Go for scrambling only if platform supports TMDS clock > 340MHz

There are cases, where devices have an HDMI1.4 retimer, and TMDS clock rate
is capped to 340MHz via VBT. In such cases scrambling might be supported
by the platform and an HDMI2.0 sink for lower TMDS rates, but not
supported by the retimer, causing blankouts.

So avoid enabling scrambling, if the TMDS clock is capped to <= 340MHz.

v2: Added comment, documenting the rationale to check for TMDS clock,
before going for scrambling. (Arun)

v3: Fixed the function name to check if source supports scrambling. (Jani)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221222040851.3029514-1-ankit.k.nautiyal@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index c0ce6d3..7468b57 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2240,6 +2240,25 @@ static bool intel_hdmi_is_cloned(const struct intel_crtc_state *crtc_state)
                !is_power_of_2(crtc_state->uapi.encoder_mask);
 }
 
+static bool source_supports_scrambling(struct intel_encoder *encoder)
+{
+       /*
+        * Gen 10+ support HDMI 2.0 : the max tmds clock is 594MHz, and
+        * scrambling is supported.
+        * But there seem to be cases where certain platforms that support
+        * HDMI 2.0, have an HDMI1.4 retimer chip, and the max tmds clock is
+        * capped by VBT to less than 340MHz.
+        *
+        * In such cases when an HDMI2.0 sink is connected, it creates a
+        * problem : the platform and the sink both support scrambling but the
+        * HDMI 1.4 retimer chip doesn't.
+        *
+        * So go for scrambling, based on the max tmds clock taking into account,
+        * restrictions coming from VBT.
+        */
+       return intel_hdmi_source_max_tmds_clock(encoder) > 340000;
+}
+
 int intel_hdmi_compute_config(struct intel_encoder *encoder,
                              struct intel_crtc_state *pipe_config,
                              struct drm_connector_state *conn_state)
@@ -2302,7 +2321,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 
        pipe_config->lane_count = 4;
 
-       if (scdc->scrambling.supported && DISPLAY_VER(dev_priv) >= 10) {
+       if (scdc->scrambling.supported && source_supports_scrambling(encoder)) {
                if (scdc->scrambling.low_rates)
                        pipe_config->hdmi_scrambling = true;