ARM: dts: meson8b-odroidc1: ethernet support

The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY
which supports 10/100/1000 Mbps ethernet.
The PHY reset and interrupt lines are controlled by the SoC via
two GPIO lines (GPIOH_4 and GPIOH_3 respectively).
The PHY energy efficient ethernet (eee) mode is marked as broken
using "eee-broken-1000t" because, during tests, high packet losses
were experienced without it.

Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 9ff6ca4..d5e8305 100644 (file)
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -99,3 +99,33 @@
 &usb1 {
        status = "okay";
 };
+
+&ethmac {
+       status = "okay";
+
+       snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
+       snps,reset-active-low;
+       snps,reset-delays-us = <0 10000 30000>;
+
+       pinctrl-0 = <&eth_rgmii_pins>;
+       pinctrl-names = "default";
+
+       phy-mode = "rgmii";
+       phy-handle = <&eth_phy>;
+       amlogic,tx-delay-ns = <4>;
+
+       mdio {
+               compatible = "snps,dwmac-mdio";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               /* Realtek RTL8211F (0x001cc916) */
+               eth_phy: ethernet-phy@0 {
+                       reg = <0>;
+                       eee-broken-1000t;
+                       interrupt-parent = <&gpio_intc>;
+                       /* GPIOH_3 */
+                       interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
+               };
+       };
+};