radeonsi,radv: run ac_nir_lower_resinfo
authorMarek Olšák <marek.olsak@amd.com>
Thu, 21 Jul 2022 13:48:29 +0000 (09:48 -0400)
committerMarge Bot <emma+marge@anholt.net>
Wed, 3 Aug 2022 17:44:15 +0000 (17:44 +0000)
Emulating image_get_resinfo should be faster than using the hw.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

src/amd/vulkan/radv_pipeline.c
src/gallium/drivers/radeonsi/si_shader.c

index 5be524e..3847f98 100644 (file)
@@ -4865,6 +4865,10 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
          if (lowered_ngg)
             radv_lower_ngg(device, &stages[i], pipeline_key);
 
+         if (radv_use_llvm_for_stage(device, i) &&
+             stages[i].nir->info.uses_resource_info_query)
+            NIR_PASS(_, stages[i].nir, ac_nir_lower_resinfo, device->physical_device->rad_info.gfx_level);
+
          NIR_PASS(_, stages[i].nir, ac_nir_lower_global_access);
          NIR_PASS_V(stages[i].nir, radv_nir_lower_abi, device->physical_device->rad_info.gfx_level,
                     &stages[i].info, &stages[i].args, pipeline_key,
index 63cafa8..15d7793 100644 (file)
@@ -1607,6 +1607,9 @@ struct nir_shader *si_get_nir_shader(struct si_shader *shader, bool *free_nir,
    if (sel->stage <= MESA_SHADER_GEOMETRY)
       NIR_PASS(progress, nir, si_nir_kill_outputs, key);
 
+   if (nir->info.uses_resource_info_query)
+      NIR_PASS(progress, nir, ac_nir_lower_resinfo, sel->screen->info.gfx_level);
+
    bool inline_uniforms = false;
    uint32_t *inlined_uniform_values;
    si_get_inline_uniform_state((union si_shader_key*)key, sel->pipe_shader_type,