intel/compiler: fix dynamic alpha-to-coverage handling
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Fri, 25 Aug 2023 15:02:05 +0000 (18:02 +0300)
committerMarge Bot <emma+marge@anholt.net>
Tue, 29 Aug 2023 23:19:12 +0000 (23:19 +0000)
Got the wrong logic operation. Let's reuse the nicer NIR builder
helper.

Fixes a bunch of KHR-GL46.sample_variables.mask.rgba8.*.samples*.mask*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: fd7debc8bb ("intel/fs: make alpha_to_coverage a tristate")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9568
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24716>

src/gallium/drivers/zink/ci/zink-anv-tgl-flakes.txt
src/intel/compiler/brw_nir_lower_alpha_to_coverage.c

index e9b9b1c..78639eb 100644 (file)
@@ -1,6 +1,3 @@
-# driver seems flaky
-KHR-GL46.sample_variables.mask.rgba8.*.samples.*.mask.*
-
 # ???
 spec@arb_query_buffer_object@qbo
 spec@arb_query_buffer_object@qbo@query-GL_PRIMITIVES_SUBMITTED-ASYNC_CPU_READ_BEFORE-GL_UNSIGNED_INT64_ARB
index 250d47a..eb13698 100644 (file)
@@ -175,9 +175,7 @@ brw_nir_lower_alpha_to_coverage(nir_shader *shader,
       nir_def *push_flags =
          nir_load_uniform(&b, 1, 32, nir_imm_int(&b, prog_data->msaa_flags_param * 4));
       nir_def *alpha_to_coverage =
-         nir_i2b(&b,
-                 nir_iadd_imm(&b, push_flags,
-                              BRW_WM_MSAA_FLAG_ALPHA_TO_COVERAGE));
+         nir_test_mask(&b, push_flags, BRW_WM_MSAA_FLAG_ALPHA_TO_COVERAGE);
       dither_mask = nir_bcsel(&b, alpha_to_coverage,
                               dither_mask, sample_mask_write->src[0].ssa);
    }